drivers/net/wireless/iwlwifi/iwl-core.c

   1 /******************************************************************************
   2  *
   3  * GPL LICENSE SUMMARY
   4  *
   5  * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of version 2 of the GNU General Public License as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19  * USA
  20  *
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *****************************************************************************/
  28
  29 #include <linux/kernel.h>
  30 #include <linux/module.h>
  31 #include <linux/etherdevice.h>
  32 #include <net/mac80211.h>
  33
  34 #include "iwl-eeprom.h"
  35 #include "iwl-dev.h" /* FIXME: remove */
  36 #include "iwl-debug.h"
  37 #include "iwl-core.h"
  38 #include "iwl-io.h"
  39 #include "iwl-power.h"
  40 #include "iwl-sta.h"
  41 #include "iwl-helpers.h"
  42
  43
  44 MODULE_DESCRIPTION("iwl core");
  45 MODULE_VERSION(IWLWIFI_VERSION);
  46 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  47 MODULE_LICENSE("GPL");
  48
  49 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np)    \
  50         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,      \
  51                                     IWL_RATE_SISO_##s##M_PLCP, \
  52                                     IWL_RATE_MIMO2_##s##M_PLCP,\
  53                                     IWL_RATE_MIMO3_##s##M_PLCP,\
  54                                     IWL_RATE_##r##M_IEEE,      \
  55                                     IWL_RATE_##ip##M_INDEX,    \
  56                                     IWL_RATE_##in##M_INDEX,    \
  57                                     IWL_RATE_##rp##M_INDEX,    \
  58                                     IWL_RATE_##rn##M_INDEX,    \
  59                                     IWL_RATE_##pp##M_INDEX,    \
  60                                     IWL_RATE_##np##M_INDEX }
  61
  62 static irqreturn_t iwl_isr(int irq, void *data);
  63
  64 /*
  65  * Parameter order:
  66  *   rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  67  *
  68  * If there isn't a valid next or previous rate then INV is used which
  69  * maps to IWL_RATE_INVALID
  70  *
  71  */
  72 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  73         IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  74         IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  75         IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  76         IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18),      /* 11mbps */
  77         IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  78         IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11),       /*  9mbps */
  79         IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  80         IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  81         IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  82         IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  83         IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  84         IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  85         IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  86         /* FIXME:RS:          ^^    should be INV (legacy) */
  87 };
  88 EXPORT_SYMBOL(iwl_rates);
  89
  90 /**
  91  * translate ucode response to mac80211 tx status control values
  92  */
  93 void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
  94                                   struct ieee80211_tx_info *info)
  95 {
  96         int rate_index;
  97         struct ieee80211_tx_rate *r = &info->control.rates[0];
  98
  99         info->antenna_sel_tx =
 100                 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
 101         if (rate_n_flags & RATE_MCS_HT_MSK)
 102                 r->flags |= IEEE80211_TX_RC_MCS;
 103         if (rate_n_flags & RATE_MCS_GF_MSK)
 104                 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
 105         if (rate_n_flags & RATE_MCS_FAT_MSK)
 106                 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
 107         if (rate_n_flags & RATE_MCS_DUP_MSK)
 108                 r->flags |= IEEE80211_TX_RC_DUP_DATA;
 109         if (rate_n_flags & RATE_MCS_SGI_MSK)
 110                 r->flags |= IEEE80211_TX_RC_SHORT_GI;
 111         rate_index = iwl_hwrate_to_plcp_idx(rate_n_flags);
 112         if (info->band == IEEE80211_BAND_5GHZ)
 113                 rate_index -= IWL_FIRST_OFDM_RATE;
 114         r->idx = rate_index;
 115 }
 116 EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
 117
 118 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
 119 {
 120         int idx = 0;
 121
 122         /* HT rate format */
 123         if (rate_n_flags & RATE_MCS_HT_MSK) {
 124                 idx = (rate_n_flags & 0xff);
 125
 126                 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
 127                         idx = idx - IWL_RATE_MIMO3_6M_PLCP;
 128                 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
 129                         idx = idx - IWL_RATE_MIMO2_6M_PLCP;
 130
 131                 idx += IWL_FIRST_OFDM_RATE;
 132                 /* skip 9M not supported in ht*/
 133                 if (idx >= IWL_RATE_9M_INDEX)
 134                         idx += 1;
 135                 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
 136                         return idx;
 137
 138         /* legacy rate format, search for match in table */
 139         } else {
 140                 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
 141                         if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
 142                                 return idx;
 143         }
 144
 145         return -1;
 146 }
 147 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
 148
 149 u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
 150 {
 151         int i;
 152         u8 ind = ant;
 153         for (i = 0; i < RATE_ANT_NUM - 1; i++) {
 154                 ind = (ind + 1) < RATE_ANT_NUM ?  ind + 1 : 0;
 155                 if (priv->hw_params.valid_tx_ant & BIT(ind))
 156                         return ind;
 157         }
 158         return ant;
 159 }
 160
 161 const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
 162 EXPORT_SYMBOL(iwl_bcast_addr);
 163
 164
 165 /* This function both allocates and initializes hw and priv. */
 166 struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
 167                 struct ieee80211_ops *hw_ops)
 168 {
 169         struct iwl_priv *priv;
 170
 171         /* mac80211 allocates memory for this device instance, including
 172          *   space for this driver's private structure */
 173         struct ieee80211_hw *hw =
 174                 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
 175         if (hw == NULL) {
 176                 printk(KERN_ERR "%s: Can not allocate network device\n",
 177                        cfg->name);
 178                 goto out;
 179         }
 180
 181         priv = hw->priv;
 182         priv->hw = hw;
 183
 184 out:
 185         return hw;
 186 }
 187 EXPORT_SYMBOL(iwl_alloc_all);
 188
 189 void iwl_hw_detect(struct iwl_priv *priv)
 190 {
 191         priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
 192         priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
 193         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
 194 }
 195 EXPORT_SYMBOL(iwl_hw_detect);
 196
 197 int iwl_hw_nic_init(struct iwl_priv *priv)
 198 {
 199         unsigned long flags;
 200         struct iwl_rx_queue *rxq = &priv->rxq;
 201         int ret;
 202
 203         /* nic_init */
 204         spin_lock_irqsave(&priv->lock, flags);
 205         priv->cfg->ops->lib->apm_ops.init(priv);
 206         iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
 207         spin_unlock_irqrestore(&priv->lock, flags);
 208
 209         ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
 210
 211         priv->cfg->ops->lib->apm_ops.config(priv);
 212
 213         /* Allocate the RX queue, or reset if it is already allocated */
 214         if (!rxq->bd) {
 215                 ret = iwl_rx_queue_alloc(priv);
 216                 if (ret) {
 217                         IWL_ERR(priv, "Unable to initialize Rx queue\n");
 218                         return -ENOMEM;
 219                 }
 220         } else
 221                 iwl_rx_queue_reset(priv, rxq);
 222
 223         iwl_rx_replenish(priv);
 224
 225         iwl_rx_init(priv, rxq);
 226
 227         spin_lock_irqsave(&priv->lock, flags);
 228
 229         rxq->need_update = 1;
 230         iwl_rx_queue_update_write_ptr(priv, rxq);
 231
 232         spin_unlock_irqrestore(&priv->lock, flags);
 233
 234         /* Allocate and init all Tx and Command queues */
 235         ret = iwl_txq_ctx_reset(priv);
 236         if (ret)
 237                 return ret;
 238
 239         set_bit(STATUS_INIT, &priv->status);
 240
 241         return 0;
 242 }
 243 EXPORT_SYMBOL(iwl_hw_nic_init);
 244
 245 /*
 246  * QoS  support
 247 */
 248 void iwl_activate_qos(struct iwl_priv *priv, u8 force)
 249 {
 250         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 251                 return;
 252
 253         priv->qos_data.def_qos_parm.qos_flags = 0;
 254
 255         if (priv->qos_data.qos_cap.q_AP.queue_request &&
 256             !priv->qos_data.qos_cap.q_AP.txop_request)
 257                 priv->qos_data.def_qos_parm.qos_flags |=
 258                         QOS_PARAM_FLG_TXOP_TYPE_MSK;
 259         if (priv->qos_data.qos_active)
 260                 priv->qos_data.def_qos_parm.qos_flags |=
 261                         QOS_PARAM_FLG_UPDATE_EDCA_MSK;
 262
 263         if (priv->current_ht_config.is_ht)
 264                 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
 265
 266         if (force || iwl_is_associated(priv)) {
 267                 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
 268                                 priv->qos_data.qos_active,
 269                                 priv->qos_data.def_qos_parm.qos_flags);
 270
 271                 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
 272                                        sizeof(struct iwl_qosparam_cmd),
 273                                        &priv->qos_data.def_qos_parm, NULL);
 274         }
 275 }
 276 EXPORT_SYMBOL(iwl_activate_qos);
 277
 278 /*
 279  * AC        CWmin         CW max      AIFSN      TXOP Limit    TXOP Limit
 280  *                                              (802.11b)      (802.11a/g)
 281  * AC_BK      15            1023        7           0               0
 282  * AC_BE      15            1023        3           0               0
 283  * AC_VI       7              15        2          6.016ms       3.008ms
 284  * AC_VO       3               7        2          3.264ms       1.504ms
 285  */
 286 void iwl_reset_qos(struct iwl_priv *priv)
 287 {
 288         u16 cw_min = 15;
 289         u16 cw_max = 1023;
 290         u8 aifs = 2;
 291         bool is_legacy = false;
 292         unsigned long flags;
 293         int i;
 294
 295         spin_lock_irqsave(&priv->lock, flags);
 296         /* QoS always active in AP and ADHOC mode
 297          * In STA mode wait for association
 298          */
 299         if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
 300             priv->iw_mode == NL80211_IFTYPE_AP)
 301                 priv->qos_data.qos_active = 1;
 302         else
 303                 priv->qos_data.qos_active = 0;
 304
 305         /* check for legacy mode */
 306         if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
 307             (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
 308             (priv->iw_mode == NL80211_IFTYPE_STATION &&
 309             (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
 310                 cw_min = 31;
 311                 is_legacy = 1;
 312         }
 313
 314         if (priv->qos_data.qos_active)
 315                 aifs = 3;
 316
 317         /* AC_BE */
 318         priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
 319         priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
 320         priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
 321         priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
 322         priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
 323
 324         if (priv->qos_data.qos_active) {
 325                 /* AC_BK */
 326                 i = 1;
 327                 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
 328                 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
 329                 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
 330                 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
 331                 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
 332
 333                 /* AC_VI */
 334                 i = 2;
 335                 priv->qos_data.def_qos_parm.ac[i].cw_min =
 336                         cpu_to_le16((cw_min + 1) / 2 - 1);
 337                 priv->qos_data.def_qos_parm.ac[i].cw_max =
 338                         cpu_to_le16(cw_min);
 339                 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
 340                 if (is_legacy)
 341                         priv->qos_data.def_qos_parm.ac[i].edca_txop =
 342                                 cpu_to_le16(6016);
 343                 else
 344                         priv->qos_data.def_qos_parm.ac[i].edca_txop =
 345                                 cpu_to_le16(3008);
 346                 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
 347
 348                 /* AC_VO */
 349                 i = 3;
 350                 priv->qos_data.def_qos_parm.ac[i].cw_min =
 351                         cpu_to_le16((cw_min + 1) / 4 - 1);
 352                 priv->qos_data.def_qos_parm.ac[i].cw_max =
 353                         cpu_to_le16((cw_min + 1) / 2 - 1);
 354                 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
 355                 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
 356                 if (is_legacy)
 357                         priv->qos_data.def_qos_parm.ac[i].edca_txop =
 358                                 cpu_to_le16(3264);
 359                 else
 360                         priv->qos_data.def_qos_parm.ac[i].edca_txop =
 361                                 cpu_to_le16(1504);
 362         } else {
 363                 for (i = 1; i < 4; i++) {
 364                         priv->qos_data.def_qos_parm.ac[i].cw_min =
 365                                 cpu_to_le16(cw_min);
 366                         priv->qos_data.def_qos_parm.ac[i].cw_max =
 367                                 cpu_to_le16(cw_max);
 368                         priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
 369                         priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
 370                         priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
 371                 }
 372         }
 373         IWL_DEBUG_QOS(priv, "set QoS to default \n");
 374
 375         spin_unlock_irqrestore(&priv->lock, flags);
 376 }
 377 EXPORT_SYMBOL(iwl_reset_qos);
 378
 379 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
 380 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
 381 static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
 382                               struct ieee80211_sta_ht_cap *ht_info,
 383                               enum ieee80211_band band)
 384 {
 385         u16 max_bit_rate = 0;
 386         u8 rx_chains_num = priv->hw_params.rx_chains_num;
 387         u8 tx_chains_num = priv->hw_params.tx_chains_num;
 388
 389         ht_info->cap = 0;
 390         memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
 391
 392         ht_info->ht_supported = true;
 393
 394         ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
 395         ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
 396         ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
 397                              (WLAN_HT_CAP_SM_PS_DISABLED << 2));
 398
 399         max_bit_rate = MAX_BIT_RATE_20_MHZ;
 400         if (priv->hw_params.fat_channel & BIT(band)) {
 401                 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
 402                 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
 403                 ht_info->mcs.rx_mask[4] = 0x01;
 404                 max_bit_rate = MAX_BIT_RATE_40_MHZ;
 405         }
 406
 407         if (priv->cfg->mod_params->amsdu_size_8K)
 408                 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
 409
 410         ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
 411         ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
 412
 413         ht_info->mcs.rx_mask[0] = 0xFF;
 414         if (rx_chains_num >= 2)
 415                 ht_info->mcs.rx_mask[1] = 0xFF;
 416         if (rx_chains_num >= 3)
 417                 ht_info->mcs.rx_mask[2] = 0xFF;
 418
 419         /* Highest supported Rx data rate */
 420         max_bit_rate *= rx_chains_num;
 421         WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
 422         ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
 423
 424         /* Tx MCS capabilities */
 425         ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
 426         if (tx_chains_num != rx_chains_num) {
 427                 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
 428                 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
 429                                 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
 430         }
 431 }
 432
 433 static void iwlcore_init_hw_rates(struct iwl_priv *priv,
 434                               struct ieee80211_rate *rates)
 435 {
 436         int i;
 437
 438         for (i = 0; i < IWL_RATE_COUNT; i++) {
 439                 rates[i].bitrate = iwl_rates[i].ieee * 5;
 440                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
 441                 rates[i].hw_value_short = i;
 442                 rates[i].flags = 0;
 443                 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
 444                         /*
 445                          * If CCK != 1M then set short preamble rate flag.
 446                          */
 447                         rates[i].flags |=
 448                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
 449                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
 450                 }
 451         }
 452 }
 453
 454
 455 /**
 456  * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
 457  */
 458 int iwlcore_init_geos(struct iwl_priv *priv)
 459 {
 460         struct iwl_channel_info *ch;
 461         struct ieee80211_supported_band *sband;
 462         struct ieee80211_channel *channels;
 463         struct ieee80211_channel *geo_ch;
 464         struct ieee80211_rate *rates;
 465         int i = 0;
 466
 467         if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
 468             priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
 469                 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
 470                 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
 471                 return 0;
 472         }
 473
 474         channels = kzalloc(sizeof(struct ieee80211_channel) *
 475                            priv->channel_count, GFP_KERNEL);
 476         if (!channels)
 477                 return -ENOMEM;
 478
 479         rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
 480                         GFP_KERNEL);
 481         if (!rates) {
 482                 kfree(channels);
 483                 return -ENOMEM;
 484         }
 485
 486         /* 5.2GHz channels start after the 2.4GHz channels */
 487         sband = &priv->bands[IEEE80211_BAND_5GHZ];
 488         sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
 489         /* just OFDM */
 490         sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
 491         sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
 492
 493         if (priv->cfg->sku & IWL_SKU_N)
 494                 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
 495                                          IEEE80211_BAND_5GHZ);
 496
 497         sband = &priv->bands[IEEE80211_BAND_2GHZ];
 498         sband->channels = channels;
 499         /* OFDM & CCK */
 500         sband->bitrates = rates;
 501         sband->n_bitrates = IWL_RATE_COUNT;
 502
 503         if (priv->cfg->sku & IWL_SKU_N)
 504                 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
 505                                          IEEE80211_BAND_2GHZ);
 506
 507         priv->ieee_channels = channels;
 508         priv->ieee_rates = rates;
 509
 510         for (i = 0;  i < priv->channel_count; i++) {
 511                 ch = &priv->channel_info[i];
 512
 513                 /* FIXME: might be removed if scan is OK */
 514                 if (!is_channel_valid(ch))
 515                         continue;
 516
 517                 if (is_channel_a_band(ch))
 518                         sband =  &priv->bands[IEEE80211_BAND_5GHZ];
 519                 else
 520                         sband =  &priv->bands[IEEE80211_BAND_2GHZ];
 521
 522                 geo_ch = &sband->channels[sband->n_channels++];
 523
 524                 geo_ch->center_freq =
 525                                 ieee80211_channel_to_frequency(ch->channel);
 526                 geo_ch->max_power = ch->max_power_avg;
 527                 geo_ch->max_antenna_gain = 0xff;
 528                 geo_ch->hw_value = ch->channel;
 529
 530                 if (is_channel_valid(ch)) {
 531                         if (!(ch->flags & EEPROM_CHANNEL_IBSS))
 532                                 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
 533
 534                         if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
 535                                 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
 536
 537                         if (ch->flags & EEPROM_CHANNEL_RADAR)
 538                                 geo_ch->flags |= IEEE80211_CHAN_RADAR;
 539
 540                         geo_ch->flags |= ch->fat_extension_channel;
 541
 542                         if (ch->max_power_avg > priv->tx_power_channel_lmt)
 543                                 priv->tx_power_channel_lmt = ch->max_power_avg;
 544                 } else {
 545                         geo_ch->flags |= IEEE80211_CHAN_DISABLED;
 546                 }
 547
 548                 /* Save flags for reg domain usage */
 549                 geo_ch->orig_flags = geo_ch->flags;
 550
 551                 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
 552                                 ch->channel, geo_ch->center_freq,
 553                                 is_channel_a_band(ch) ?  "5.2" : "2.4",
 554                                 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
 555                                 "restricted" : "valid",
 556                                  geo_ch->flags);
 557         }
 558
 559         if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
 560              priv->cfg->sku & IWL_SKU_A) {
 561                 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
 562                         "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
 563                            priv->pci_dev->device,
 564                            priv->pci_dev->subsystem_device);
 565                 priv->cfg->sku &= ~IWL_SKU_A;
 566         }
 567
 568         IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
 569                    priv->bands[IEEE80211_BAND_2GHZ].n_channels,
 570                    priv->bands[IEEE80211_BAND_5GHZ].n_channels);
 571
 572         set_bit(STATUS_GEO_CONFIGURED, &priv->status);
 573
 574         return 0;
 575 }
 576 EXPORT_SYMBOL(iwlcore_init_geos);
 577
 578 /*
 579  * iwlcore_free_geos - undo allocations in iwlcore_init_geos
 580  */
 581 void iwlcore_free_geos(struct iwl_priv *priv)
 582 {
 583         kfree(priv->ieee_channels);
 584         kfree(priv->ieee_rates);
 585         clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
 586 }
 587 EXPORT_SYMBOL(iwlcore_free_geos);
 588
 589 static bool is_single_rx_stream(struct iwl_priv *priv)
 590 {
 591         return !priv->current_ht_config.is_ht ||
 592                ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
 593                 (priv->current_ht_config.mcs.rx_mask[2] == 0));
 594 }
 595
 596 static u8 iwl_is_channel_extension(struct iwl_priv *priv,
 597                                    enum ieee80211_band band,
 598                                    u16 channel, u8 extension_chan_offset)
 599 {
 600         const struct iwl_channel_info *ch_info;
 601
 602         ch_info = iwl_get_channel_info(priv, band, channel);
 603         if (!is_channel_valid(ch_info))
 604                 return 0;
 605
 606         if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
 607                 return !(ch_info->fat_extension_channel &
 608                                         IEEE80211_CHAN_NO_HT40PLUS);
 609         else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
 610                 return !(ch_info->fat_extension_channel &
 611                                         IEEE80211_CHAN_NO_HT40MINUS);
 612
 613         return 0;
 614 }
 615
 616 u8 iwl_is_fat_tx_allowed(struct iwl_priv *priv,
 617                          struct ieee80211_sta_ht_cap *sta_ht_inf)
 618 {
 619         struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
 620
 621         if ((!iwl_ht_conf->is_ht) ||
 622             (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ))
 623                 return 0;
 624
 625         /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
 626          * the bit will not set if it is pure 40MHz case
 627          */
 628         if (sta_ht_inf) {
 629                 if (!sta_ht_inf->ht_supported)
 630                         return 0;
 631         }
 632         return iwl_is_channel_extension(priv, priv->band,
 633                         le16_to_cpu(priv->staging_rxon.channel),
 634                         iwl_ht_conf->extension_chan_offset);
 635 }
 636 EXPORT_SYMBOL(iwl_is_fat_tx_allowed);
 637
 638 static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
 639 {
 640         u16 new_val = 0;
 641         u16 beacon_factor = 0;
 642
 643         beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
 644         new_val = beacon_val / beacon_factor;
 645
 646         if (!new_val)
 647                 new_val = max_beacon_val;
 648
 649         return new_val;
 650 }
 651
 652 void iwl_setup_rxon_timing(struct iwl_priv *priv)
 653 {
 654         u64 tsf;
 655         s32 interval_tm, rem;
 656         unsigned long flags;
 657         struct ieee80211_conf *conf = NULL;
 658         u16 beacon_int;
 659
 660         conf = ieee80211_get_hw_conf(priv->hw);
 661
 662         spin_lock_irqsave(&priv->lock, flags);
 663         priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
 664         priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
 665
 666         if (priv->iw_mode == NL80211_IFTYPE_STATION) {
 667                 beacon_int = priv->beacon_int;
 668                 priv->rxon_timing.atim_window = 0;
 669         } else {
 670                 beacon_int = priv->vif->bss_conf.beacon_int;
 671
 672                 /* TODO: we need to get atim_window from upper stack
 673                  * for now we set to 0 */
 674                 priv->rxon_timing.atim_window = 0;
 675         }
 676
 677         beacon_int = iwl_adjust_beacon_interval(beacon_int,
 678                                 priv->hw_params.max_beacon_itrvl * 1024);
 679         priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
 680
 681         tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
 682         interval_tm = beacon_int * 1024;
 683         rem = do_div(tsf, interval_tm);
 684         priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
 685
 686         spin_unlock_irqrestore(&priv->lock, flags);
 687         IWL_DEBUG_ASSOC(priv,
 688                         "beacon interval %d beacon timer %d beacon tim %d\n",
 689                         le16_to_cpu(priv->rxon_timing.beacon_interval),
 690                         le32_to_cpu(priv->rxon_timing.beacon_init_val),
 691                         le16_to_cpu(priv->rxon_timing.atim_window));
 692 }
 693 EXPORT_SYMBOL(iwl_setup_rxon_timing);
 694
 695 void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
 696 {
 697         struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
 698
 699         if (hw_decrypt)
 700                 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
 701         else
 702                 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
 703
 704 }
 705 EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
 706
 707 /**
 708  * iwl_check_rxon_cmd - validate RXON structure is valid
 709  *
 710  * NOTE:  This is really only useful during development and can eventually
 711  * be #ifdef'd out once the driver is stable and folks aren't actively
 712  * making changes
 713  */
 714 int iwl_check_rxon_cmd(struct iwl_priv *priv)
 715 {
 716         int error = 0;
 717         int counter = 1;
 718         struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
 719
 720         if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
 721                 error |= le32_to_cpu(rxon->flags &
 722                                 (RXON_FLG_TGJ_NARROW_BAND_MSK |
 723                                  RXON_FLG_RADAR_DETECT_MSK));
 724                 if (error)
 725                         IWL_WARN(priv, "check 24G fields %d | %d\n",
 726                                     counter++, error);
 727         } else {
 728                 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
 729                                 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
 730                 if (error)
 731                         IWL_WARN(priv, "check 52 fields %d | %d\n",
 732                                     counter++, error);
 733                 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
 734                 if (error)
 735                         IWL_WARN(priv, "check 52 CCK %d | %d\n",
 736                                     counter++, error);
 737         }
 738         error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
 739         if (error)
 740                 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
 741
 742         /* make sure basic rates 6Mbps and 1Mbps are supported */
 743         error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
 744                   ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
 745         if (error)
 746                 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
 747
 748         error |= (le16_to_cpu(rxon->assoc_id) > 2007);
 749         if (error)
 750                 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
 751
 752         error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
 753                         == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
 754         if (error)
 755                 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
 756                             counter++, error);
 757
 758         error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
 759                         == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
 760         if (error)
 761                 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
 762                             counter++, error);
 763
 764         error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
 765                         RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
 766         if (error)
 767                 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
 768                             counter++, error);
 769
 770         if (error)
 771                 IWL_WARN(priv, "Tuning to channel %d\n",
 772                             le16_to_cpu(rxon->channel));
 773
 774         if (error) {
 775                 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
 776                 return -1;
 777         }
 778         return 0;
 779 }
 780 EXPORT_SYMBOL(iwl_check_rxon_cmd);
 781
 782 /**
 783  * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
 784  * @priv: staging_rxon is compared to active_rxon
 785  *
 786  * If the RXON structure is changing enough to require a new tune,
 787  * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
 788  * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
 789  */
 790 int iwl_full_rxon_required(struct iwl_priv *priv)
 791 {
 792
 793         /* These items are only settable from the full RXON command */
 794         if (!(iwl_is_associated(priv)) ||
 795             compare_ether_addr(priv->staging_rxon.bssid_addr,
 796                                priv->active_rxon.bssid_addr) ||
 797             compare_ether_addr(priv->staging_rxon.node_addr,
 798                                priv->active_rxon.node_addr) ||
 799             compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
 800                                priv->active_rxon.wlap_bssid_addr) ||
 801             (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
 802             (priv->staging_rxon.channel != priv->active_rxon.channel) ||
 803             (priv->staging_rxon.air_propagation !=
 804              priv->active_rxon.air_propagation) ||
 805             (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
 806              priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
 807             (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
 808              priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
 809             (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
 810              priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
 811             (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
 812                 return 1;
 813
 814         /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
 815          * be updated with the RXON_ASSOC command -- however only some
 816          * flag transitions are allowed using RXON_ASSOC */
 817
 818         /* Check if we are not switching bands */
 819         if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
 820             (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
 821                 return 1;
 822
 823         /* Check if we are switching association toggle */
 824         if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
 825                 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
 826                 return 1;
 827
 828         return 0;
 829 }
 830 EXPORT_SYMBOL(iwl_full_rxon_required);
 831
 832 u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
 833 {
 834         int i;
 835         int rate_mask;
 836
 837         /* Set rate mask*/
 838         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
 839                 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
 840         else
 841                 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
 842
 843         /* Find lowest valid rate */
 844         for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
 845                                         i = iwl_rates[i].next_ieee) {
 846                 if (rate_mask & (1 << i))
 847                         return iwl_rates[i].plcp;
 848         }
 849
 850         /* No valid rate was found. Assign the lowest one */
 851         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
 852                 return IWL_RATE_1M_PLCP;
 853         else
 854                 return IWL_RATE_6M_PLCP;
 855 }
 856 EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
 857
 858 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
 859 {
 860         struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
 861
 862         if (!ht_info->is_ht) {
 863                 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
 864                         RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
 865                         RXON_FLG_FAT_PROT_MSK |
 866                         RXON_FLG_HT_PROT_MSK);
 867                 return;
 868         }
 869
 870         /* FIXME: if the definition of ht_protection changed, the "translation"
 871          * will be needed for rxon->flags
 872          */
 873         rxon->flags |= cpu_to_le32(ht_info->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
 874
 875         /* Set up channel bandwidth:
 876          * 20 MHz only, 20/40 mixed or pure 40 if fat ok */
 877         /* clear the HT channel mode before set the mode */
 878         rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
 879                          RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
 880         if (iwl_is_fat_tx_allowed(priv, NULL)) {
 881                 /* pure 40 fat */
 882                 if (ht_info->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
 883                         rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
 884                         /* Note: control channel is opposite of extension channel */
 885                         switch (ht_info->extension_chan_offset) {
 886                         case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
 887                                 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
 888                                 break;
 889                         case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
 890                                 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
 891                                 break;
 892                         }
 893                 } else {
 894                         /* Note: control channel is opposite of extension channel */
 895                         switch (ht_info->extension_chan_offset) {
 896                         case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
 897                                 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
 898                                 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
 899                                 break;
 900                         case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
 901                                 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
 902                                 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
 903                                 break;
 904                         case IEEE80211_HT_PARAM_CHA_SEC_NONE:
 905                         default:
 906                                 /* channel location only valid if in Mixed mode */
 907                                 IWL_ERR(priv, "invalid extension channel offset\n");
 908                                 break;
 909                         }
 910                 }
 911         } else {
 912                 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
 913         }
 914
 915         if (priv->cfg->ops->hcmd->set_rxon_chain)
 916                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 917
 918         IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
 919                         "rxon flags 0x%X operation mode :0x%X "
 920                         "extension channel offset 0x%x\n",
 921                         ht_info->mcs.rx_mask[0],
 922                         ht_info->mcs.rx_mask[1],
 923                         ht_info->mcs.rx_mask[2],
 924                         le32_to_cpu(rxon->flags), ht_info->ht_protection,
 925                         ht_info->extension_chan_offset);
 926         return;
 927 }
 928 EXPORT_SYMBOL(iwl_set_rxon_ht);
 929
 930 #define IWL_NUM_RX_CHAINS_MULTIPLE      3
 931 #define IWL_NUM_RX_CHAINS_SINGLE        2
 932 #define IWL_NUM_IDLE_CHAINS_DUAL        2
 933 #define IWL_NUM_IDLE_CHAINS_SINGLE      1
 934
 935 /* Determine how many receiver/antenna chains to use.
 936  * More provides better reception via diversity.  Fewer saves power.
 937  * MIMO (dual stream) requires at least 2, but works better with 3.
 938  * This does not determine *which* chains to use, just how many.
 939  */
 940 static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
 941 {
 942         bool is_single = is_single_rx_stream(priv);
 943         bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
 944
 945         /* # of Rx chains to use when expecting MIMO. */
 946         if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
 947                                                  WLAN_HT_CAP_SM_PS_STATIC)))
 948                 return IWL_NUM_RX_CHAINS_SINGLE;
 949         else
 950                 return IWL_NUM_RX_CHAINS_MULTIPLE;
 951 }
 952
 953 static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
 954 {
 955         int idle_cnt;
 956         bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
 957         /* # Rx chains when idling and maybe trying to save power */
 958         switch (priv->current_ht_config.sm_ps) {
 959         case WLAN_HT_CAP_SM_PS_STATIC:
 960         case WLAN_HT_CAP_SM_PS_DYNAMIC:
 961                 idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
 962                                         IWL_NUM_IDLE_CHAINS_SINGLE;
 963                 break;
 964         case WLAN_HT_CAP_SM_PS_DISABLED:
 965                 idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
 966                 break;
 967         case WLAN_HT_CAP_SM_PS_INVALID:
 968         default:
 969                 IWL_ERR(priv, "invalid mimo ps mode %d\n",
 970                            priv->current_ht_config.sm_ps);
 971                 WARN_ON(1);
 972                 idle_cnt = -1;
 973                 break;
 974         }
 975         return idle_cnt;
 976 }
 977
 978 /* up to 4 chains */
 979 static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
 980 {
 981         u8 res;
 982         res = (chain_bitmap & BIT(0)) >> 0;
 983         res += (chain_bitmap & BIT(1)) >> 1;
 984         res += (chain_bitmap & BIT(2)) >> 2;
 985         res += (chain_bitmap & BIT(4)) >> 4;
 986         return res;
 987 }
 988
 989 /**
 990  * iwl_is_monitor_mode - Determine if interface in monitor mode
 991  *
 992  * priv->iw_mode is set in add_interface, but add_interface is
 993  * never called for monitor mode. The only way mac80211 informs us about
 994  * monitor mode is through configuring filters (call to configure_filter).
 995  */
 996 bool iwl_is_monitor_mode(struct iwl_priv *priv)
 997 {
 998         return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
 999 }
1000 EXPORT_SYMBOL(iwl_is_monitor_mode);
1001
1002 /**
1003  * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1004  *
1005  * Selects how many and which Rx receivers/antennas/chains to use.
1006  * This should not be used for scan command ... it puts data in wrong place.
1007  */
1008 void iwl_set_rxon_chain(struct iwl_priv *priv)
1009 {
1010         bool is_single = is_single_rx_stream(priv);
1011         bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
1012         u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1013         u32 active_chains;
1014         u16 rx_chain;
1015
1016         /* Tell uCode which antennas are actually connected.
1017          * Before first association, we assume all antennas are connected.
1018          * Just after first association, iwl_chain_noise_calibration()
1019          *    checks which antennas actually *are* connected. */
1020          if (priv->chain_noise_data.active_chains)
1021                 active_chains = priv->chain_noise_data.active_chains;
1022         else
1023                 active_chains = priv->hw_params.valid_rx_ant;
1024
1025         rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
1026
1027         /* How many receivers should we use? */
1028         active_rx_cnt = iwl_get_active_rx_chain_count(priv);
1029         idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
1030
1031
1032         /* correct rx chain count according hw settings
1033          * and chain noise calibration
1034          */
1035         valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
1036         if (valid_rx_cnt < active_rx_cnt)
1037                 active_rx_cnt = valid_rx_cnt;
1038
1039         if (valid_rx_cnt < idle_rx_cnt)
1040                 idle_rx_cnt = valid_rx_cnt;
1041
1042         rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1043         rx_chain |= idle_rx_cnt  << RXON_RX_CHAIN_CNT_POS;
1044
1045         /* copied from 'iwl_bg_request_scan()' */
1046         /* Force use of chains B and C (0x6) for Rx for 4965
1047          * Avoid A (0x1) because of its off-channel reception on A-band.
1048          * MIMO is not used here, but value is required */
1049         if (iwl_is_monitor_mode(priv) &&
1050             !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
1051             ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
1052                 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
1053                 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
1054                 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1055                 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
1056         }
1057
1058         priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
1059
1060         if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
1061                 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1062         else
1063                 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1064
1065         IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
1066                         priv->staging_rxon.rx_chain,
1067                         active_rx_cnt, idle_rx_cnt);
1068
1069         WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1070                 active_rx_cnt < idle_rx_cnt);
1071 }
1072 EXPORT_SYMBOL(iwl_set_rxon_chain);
1073
1074 /**
1075  * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
1076  * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1077  * @channel: Any channel valid for the requested phymode
1078
1079  * In addition to setting the staging RXON, priv->phymode is also set.
1080  *
1081  * NOTE:  Does not commit to the hardware; it sets appropriate bit fields
1082  * in the staging RXON flag structure based on the phymode
1083  */
1084 int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
1085 {
1086         enum ieee80211_band band = ch->band;
1087         u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1088
1089         if (!iwl_get_channel_info(priv, band, channel)) {
1090                 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
1091                                channel, band);
1092                 return -EINVAL;
1093         }
1094
1095         if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1096             (priv->band == band))
1097                 return 0;
1098
1099         priv->staging_rxon.channel = cpu_to_le16(channel);
1100         if (band == IEEE80211_BAND_5GHZ)
1101                 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1102         else
1103                 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1104
1105         priv->band = band;
1106
1107         IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
1108
1109         return 0;
1110 }
1111 EXPORT_SYMBOL(iwl_set_rxon_channel);
1112
1113 void iwl_set_flags_for_band(struct iwl_priv *priv,
1114                             enum ieee80211_band band)
1115 {
1116         if (band == IEEE80211_BAND_5GHZ) {
1117                 priv->staging_rxon.flags &=
1118                     ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1119                       | RXON_FLG_CCK_MSK);
1120                 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1121         } else {
1122                 /* Copied from iwl_post_associate() */
1123                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1124                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1125                 else
1126                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1127
1128                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1129                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1130
1131                 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1132                 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1133                 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1134         }
1135 }
1136 EXPORT_SYMBOL(iwl_set_flags_for_band);
1137
1138 /*
1139  * initialize rxon structure with default values from eeprom
1140  */
1141 void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1142 {
1143         const struct iwl_channel_info *ch_info;
1144
1145         memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1146
1147         switch (mode) {
1148         case NL80211_IFTYPE_AP:
1149                 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1150                 break;
1151
1152         case NL80211_IFTYPE_STATION:
1153                 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1154                 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1155                 break;
1156
1157         case NL80211_IFTYPE_ADHOC:
1158                 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1159                 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1160                 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1161                                                   RXON_FILTER_ACCEPT_GRP_MSK;
1162                 break;
1163
1164         default:
1165                 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1166                 break;
1167         }
1168
1169 #if 0
1170         /* TODO:  Figure out when short_preamble would be set and cache from
1171          * that */
1172         if (!hw_to_local(priv->hw)->short_preamble)
1173                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1174         else
1175                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1176 #endif
1177
1178         ch_info = iwl_get_channel_info(priv, priv->band,
1179                                        le16_to_cpu(priv->active_rxon.channel));
1180
1181         if (!ch_info)
1182                 ch_info = &priv->channel_info[0];
1183
1184         /*
1185          * in some case A channels are all non IBSS
1186          * in this case force B/G channel
1187          */
1188         if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1189             !(is_channel_ibss(ch_info)))
1190                 ch_info = &priv->channel_info[0];
1191
1192         priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1193         priv->band = ch_info->band;
1194
1195         iwl_set_flags_for_band(priv, priv->band);
1196
1197         priv->staging_rxon.ofdm_basic_rates =
1198             (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1199         priv->staging_rxon.cck_basic_rates =
1200             (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1201
1202         /* clear both MIX and PURE40 mode flag */
1203         priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1204                                         RXON_FLG_CHANNEL_MODE_PURE_40);
1205         memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1206         memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1207         priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1208         priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1209         priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
1210 }
1211 EXPORT_SYMBOL(iwl_connection_init_rx_config);
1212
1213 static void iwl_set_rate(struct iwl_priv *priv)
1214 {
1215         const struct ieee80211_supported_band *hw = NULL;
1216         struct ieee80211_rate *rate;
1217         int i;
1218
1219         hw = iwl_get_hw_mode(priv, priv->band);
1220         if (!hw) {
1221                 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1222                 return;
1223         }
1224
1225         priv->active_rate = 0;
1226         priv->active_rate_basic = 0;
1227
1228         for (i = 0; i < hw->n_bitrates; i++) {
1229                 rate = &(hw->bitrates[i]);
1230                 if (rate->hw_value < IWL_RATE_COUNT)
1231                         priv->active_rate |= (1 << rate->hw_value);
1232         }
1233
1234         IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
1235                        priv->active_rate, priv->active_rate_basic);
1236
1237         /*
1238          * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1239          * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1240          * OFDM
1241          */
1242         if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1243                 priv->staging_rxon.cck_basic_rates =
1244                     ((priv->active_rate_basic &
1245                       IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1246         else
1247                 priv->staging_rxon.cck_basic_rates =
1248                     (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1249
1250         if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1251                 priv->staging_rxon.ofdm_basic_rates =
1252                     ((priv->active_rate_basic &
1253                       (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1254                       IWL_FIRST_OFDM_RATE) & 0xFF;
1255         else
1256                 priv->staging_rxon.ofdm_basic_rates =
1257                    (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1258 }
1259
1260 void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1261 {
1262         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1263         struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1264         struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
1265         IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
1266                       le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
1267         rxon->channel = csa->channel;
1268         priv->staging_rxon.channel = csa->channel;
1269 }
1270 EXPORT_SYMBOL(iwl_rx_csa);
1271
1272 #ifdef CONFIG_IWLWIFI_DEBUG
1273 static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1274 {
1275         struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1276
1277         IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
1278         iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
1279         IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1280         IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1281         IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
1282                         le32_to_cpu(rxon->filter_flags));
1283         IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1284         IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
1285                         rxon->ofdm_basic_rates);
1286         IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1287         IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1288         IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1289         IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1290 }
1291 #endif
1292
1293 static const char *desc_lookup_text[] = {
1294         "OK",
1295         "FAIL",
1296         "BAD_PARAM",
1297         "BAD_CHECKSUM",
1298         "NMI_INTERRUPT_WDG",
1299         "SYSASSERT",
1300         "FATAL_ERROR",
1301         "BAD_COMMAND",
1302         "HW_ERROR_TUNE_LOCK",
1303         "HW_ERROR_TEMPERATURE",
1304         "ILLEGAL_CHAN_FREQ",
1305         "VCC_NOT_STABLE",
1306         "FH_ERROR",
1307         "NMI_INTERRUPT_HOST",
1308         "NMI_INTERRUPT_ACTION_PT",
1309         "NMI_INTERRUPT_UNKNOWN",
1310         "UCODE_VERSION_MISMATCH",
1311         "HW_ERROR_ABS_LOCK",
1312         "HW_ERROR_CAL_LOCK_FAIL",
1313         "NMI_INTERRUPT_INST_ACTION_PT",
1314         "NMI_INTERRUPT_DATA_ACTION_PT",
1315         "NMI_TRM_HW_ER",
1316         "NMI_INTERRUPT_TRM",
1317         "NMI_INTERRUPT_BREAK_POINT"
1318         "DEBUG_0",
1319         "DEBUG_1",
1320         "DEBUG_2",
1321         "DEBUG_3",
1322         "UNKNOWN"
1323 };
1324
1325 static const char *desc_lookup(int i)
1326 {
1327         int max = ARRAY_SIZE(desc_lookup_text) - 1;
1328
1329         if (i < 0 || i > max)
1330                 i = max;
1331
1332         return desc_lookup_text[i];
1333 }
1334
1335 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1336 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1337
1338 static void iwl_dump_nic_error_log(struct iwl_priv *priv)
1339 {
1340         u32 data2, line;
1341         u32 desc, time, count, base, data1;
1342         u32 blink1, blink2, ilink1, ilink2;
1343
1344         if (priv->ucode_type == UCODE_INIT)
1345                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1346         else
1347                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1348
1349         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1350                 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1351                 return;
1352         }
1353
1354         count = iwl_read_targ_mem(priv, base);
1355
1356         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1357                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1358                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1359                         priv->status, count);
1360         }
1361
1362         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1363         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1364         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1365         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1366         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1367         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1368         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1369         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1370         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1371
1372         IWL_ERR(priv, "Desc                               Time       "
1373                 "data1      data2      line\n");
1374         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1375                 desc_lookup(desc), desc, time, data1, data2, line);
1376         IWL_ERR(priv, "blink1  blink2  ilink1  ilink2\n");
1377         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1378                 ilink1, ilink2);
1379
1380 }
1381
1382 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1383
1384 /**
1385  * iwl_print_event_log - Dump error event log to syslog
1386  *
1387  */
1388 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1389                                 u32 num_events, u32 mode)
1390 {
1391         u32 i;
1392         u32 base;       /* SRAM byte address of event log header */
1393         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1394         u32 ptr;        /* SRAM byte address of log data */
1395         u32 ev, time, data; /* event log data */
1396
1397         if (num_events == 0)
1398                 return;
1399         if (priv->ucode_type == UCODE_INIT)
1400                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1401         else
1402                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1403
1404         if (mode == 0)
1405                 event_size = 2 * sizeof(u32);
1406         else
1407                 event_size = 3 * sizeof(u32);
1408
1409         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1410
1411         /* "time" is actually "data" for mode 0 (no timestamp).
1412         * place event id # at far right for easier visual parsing. */
1413         for (i = 0; i < num_events; i++) {
1414                 ev = iwl_read_targ_mem(priv, ptr);
1415                 ptr += sizeof(u32);
1416                 time = iwl_read_targ_mem(priv, ptr);
1417                 ptr += sizeof(u32);
1418                 if (mode == 0) {
1419                         /* data, ev */
1420                         IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1421                 } else {
1422                         data = iwl_read_targ_mem(priv, ptr);
1423                         ptr += sizeof(u32);
1424                         IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1425                                         time, data, ev);
1426                 }
1427         }
1428 }
1429
1430 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1431 {
1432         u32 base;       /* SRAM byte address of event log header */
1433         u32 capacity;   /* event log capacity in # entries */
1434         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1435         u32 num_wraps;  /* # times uCode wrapped to top of log */
1436         u32 next_entry; /* index of next entry to be written by uCode */
1437         u32 size;       /* # entries that we'll print */
1438
1439         if (priv->ucode_type == UCODE_INIT)
1440                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1441         else
1442                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1443
1444         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1445                 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1446                 return;
1447         }
1448
1449         /* event log header */
1450         capacity = iwl_read_targ_mem(priv, base);
1451         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1452         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1453         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1454
1455         size = num_wraps ? capacity : next_entry;
1456
1457         /* bail out if nothing in log */
1458         if (size == 0) {
1459                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1460                 return;
1461         }
1462
1463         IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1464                         size, num_wraps);
1465
1466         /* if uCode has wrapped back to top of log, start at the oldest entry,
1467          * i.e the next one that uCode would fill. */
1468         if (num_wraps)
1469                 iwl_print_event_log(priv, next_entry,
1470                                         capacity - next_entry, mode);
1471         /* (then/else) start at top of log */
1472         iwl_print_event_log(priv, 0, next_entry, mode);
1473
1474 }
1475 /**
1476  * iwl_irq_handle_error - called for HW or SW error interrupt from card
1477  */
1478 void iwl_irq_handle_error(struct iwl_priv *priv)
1479 {
1480         /* Set the FW error flag -- cleared on iwl_down */
1481         set_bit(STATUS_FW_ERROR, &priv->status);
1482
1483         /* Cancel currently queued command. */
1484         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1485
1486 #ifdef CONFIG_IWLWIFI_DEBUG
1487         if (priv->debug_level & IWL_DL_FW_ERRORS) {
1488                 iwl_dump_nic_error_log(priv);
1489                 iwl_dump_nic_event_log(priv);
1490                 iwl_print_rx_config_cmd(priv);
1491         }
1492 #endif
1493
1494         wake_up_interruptible(&priv->wait_command_queue);
1495
1496         /* Keep the restart process from trying to send host
1497          * commands by clearing the INIT status bit */
1498         clear_bit(STATUS_READY, &priv->status);
1499
1500         if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1501                 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
1502                           "Restarting adapter due to uCode error.\n");
1503
1504                 if (priv->cfg->mod_params->restart_fw)
1505                         queue_work(priv->workqueue, &priv->restart);
1506         }
1507 }
1508 EXPORT_SYMBOL(iwl_irq_handle_error);
1509
1510 void iwl_configure_filter(struct ieee80211_hw *hw,
1511                           unsigned int changed_flags,
1512                           unsigned int *total_flags,
1513                           int mc_count, struct dev_addr_list *mc_list)
1514 {
1515         struct iwl_priv *priv = hw->priv;
1516         __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1517
1518         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
1519                         changed_flags, *total_flags);
1520
1521         if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1522                 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1523                         *filter_flags |= RXON_FILTER_PROMISC_MSK;
1524                 else
1525                         *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1526         }
1527         if (changed_flags & FIF_ALLMULTI) {
1528                 if (*total_flags & FIF_ALLMULTI)
1529                         *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1530                 else
1531                         *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1532         }
1533         if (changed_flags & FIF_CONTROL) {
1534                 if (*total_flags & FIF_CONTROL)
1535                         *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1536                 else
1537                         *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1538         }
1539         if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1540                 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1541                         *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1542                 else
1543                         *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1544         }
1545
1546         /* We avoid iwl_commit_rxon here to commit the new filter flags
1547          * since mac80211 will call ieee80211_hw_config immediately.
1548          * (mc_list is not supported at this time). Otherwise, we need to
1549          * queue a background iwl_commit_rxon work.
1550          */
1551
1552         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1553                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1554 }
1555 EXPORT_SYMBOL(iwl_configure_filter);
1556
1557 int iwl_setup_mac(struct iwl_priv *priv)
1558 {
1559         int ret;
1560         struct ieee80211_hw *hw = priv->hw;
1561         hw->rate_control_algorithm = "iwl-agn-rs";
1562
1563         /* Tell mac80211 our characteristics */
1564         hw->flags = IEEE80211_HW_SIGNAL_DBM |
1565                     IEEE80211_HW_NOISE_DBM |
1566                     IEEE80211_HW_AMPDU_AGGREGATION |
1567                     IEEE80211_HW_SPECTRUM_MGMT |
1568                     IEEE80211_HW_SUPPORTS_PS;
1569         hw->wiphy->interface_modes =
1570                 BIT(NL80211_IFTYPE_STATION) |
1571                 BIT(NL80211_IFTYPE_ADHOC);
1572
1573         hw->wiphy->custom_regulatory = true;
1574
1575         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
1576         /* we create the 802.11 header and a zero-length SSID element */
1577         hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
1578
1579         /* Default value; 4 EDCA QOS priorities */
1580         hw->queues = 4;
1581
1582         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
1583
1584         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
1585                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1586                         &priv->bands[IEEE80211_BAND_2GHZ];
1587         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
1588                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1589                         &priv->bands[IEEE80211_BAND_5GHZ];
1590
1591         ret = ieee80211_register_hw(priv->hw);
1592         if (ret) {
1593                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
1594                 return ret;
1595         }
1596         priv->mac80211_registered = 1;
1597
1598         return 0;
1599 }
1600 EXPORT_SYMBOL(iwl_setup_mac);
1601
1602 int iwl_set_hw_params(struct iwl_priv *priv)
1603 {
1604         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1605         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1606         if (priv->cfg->mod_params->amsdu_size_8K)
1607                 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1608         else
1609                 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1610         priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1611
1612         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1613
1614         if (priv->cfg->mod_params->disable_11n)
1615                 priv->cfg->sku &= ~IWL_SKU_N;
1616
1617         /* Device-specific setup */
1618         return priv->cfg->ops->lib->set_hw_params(priv);
1619 }
1620 EXPORT_SYMBOL(iwl_set_hw_params);
1621
1622 int iwl_init_drv(struct iwl_priv *priv)
1623 {
1624         int ret;
1625
1626         priv->ibss_beacon = NULL;
1627
1628         spin_lock_init(&priv->lock);
1629         spin_lock_init(&priv->sta_lock);
1630         spin_lock_init(&priv->hcmd_lock);
1631
1632         INIT_LIST_HEAD(&priv->free_frames);
1633
1634         mutex_init(&priv->mutex);
1635
1636         /* Clear the driver's (not device's) station table */
1637         iwl_clear_stations_table(priv);
1638
1639         priv->data_retry_limit = -1;
1640         priv->ieee_channels = NULL;
1641         priv->ieee_rates = NULL;
1642         priv->band = IEEE80211_BAND_2GHZ;
1643
1644         priv->iw_mode = NL80211_IFTYPE_STATION;
1645
1646         priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
1647
1648         /* Choose which receivers/antennas to use */
1649         if (priv->cfg->ops->hcmd->set_rxon_chain)
1650                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1651
1652         iwl_init_scan_params(priv);
1653
1654         iwl_reset_qos(priv);
1655
1656         priv->qos_data.qos_active = 0;
1657         priv->qos_data.qos_cap.val = 0;
1658
1659         priv->rates_mask = IWL_RATES_MASK;
1660         /* If power management is turned on, default to CAM mode */
1661         priv->power_mode = IWL_POWER_MODE_CAM;
1662         priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MAX;
1663
1664         ret = iwl_init_channel_map(priv);
1665         if (ret) {
1666                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
1667                 goto err;
1668         }
1669
1670         ret = iwlcore_init_geos(priv);
1671         if (ret) {
1672                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
1673                 goto err_free_channel_map;
1674         }
1675         iwlcore_init_hw_rates(priv, priv->ieee_rates);
1676
1677         return 0;
1678
1679 err_free_channel_map:
1680         iwl_free_channel_map(priv);
1681 err:
1682         return ret;
1683 }
1684 EXPORT_SYMBOL(iwl_init_drv);
1685
1686 int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1687 {
1688         int ret = 0;
1689         if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
1690                 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1691                          tx_power,
1692                          IWL_TX_POWER_TARGET_POWER_MIN);
1693                 return -EINVAL;
1694         }
1695
1696         if (tx_power > IWL_TX_POWER_TARGET_POWER_MAX) {
1697                 IWL_WARN(priv, "Requested user TXPOWER %d above upper limit %d.\n",
1698                          tx_power,
1699                          IWL_TX_POWER_TARGET_POWER_MAX);
1700                 return -EINVAL;
1701         }
1702
1703         if (priv->tx_power_user_lmt != tx_power)
1704                 force = true;
1705
1706         priv->tx_power_user_lmt = tx_power;
1707
1708         /* if nic is not up don't send command */
1709         if (!iwl_is_ready_rf(priv))
1710                 return ret;
1711
1712         if (force && priv->cfg->ops->lib->send_tx_power)
1713                 ret = priv->cfg->ops->lib->send_tx_power(priv);
1714
1715         return ret;
1716 }
1717 EXPORT_SYMBOL(iwl_set_tx_power);
1718
1719 void iwl_uninit_drv(struct iwl_priv *priv)
1720 {
1721         iwl_calib_free_results(priv);
1722         iwlcore_free_geos(priv);
1723         iwl_free_channel_map(priv);
1724         kfree(priv->scan);
1725 }
1726 EXPORT_SYMBOL(iwl_uninit_drv);
1727
1728
1729 void iwl_disable_interrupts(struct iwl_priv *priv)
1730 {
1731         clear_bit(STATUS_INT_ENABLED, &priv->status);
1732
1733         /* disable interrupts from uCode/NIC to host */
1734         iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1735
1736         /* acknowledge/clear/reset any interrupts still pending
1737          * from uCode or flow handler (Rx/Tx DMA) */
1738         iwl_write32(priv, CSR_INT, 0xffffffff);
1739         iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
1740         IWL_DEBUG_ISR(priv, "Disabled interrupts\n");
1741 }
1742 EXPORT_SYMBOL(iwl_disable_interrupts);
1743
1744 void iwl_enable_interrupts(struct iwl_priv *priv)
1745 {
1746         IWL_DEBUG_ISR(priv, "Enabling interrupts\n");
1747         set_bit(STATUS_INT_ENABLED, &priv->status);
1748         iwl_write32(priv, CSR_INT_MASK, priv->inta_mask);
1749 }
1750 EXPORT_SYMBOL(iwl_enable_interrupts);
1751
1752
1753 #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1754
1755 /* Free dram table */
1756 void iwl_free_isr_ict(struct iwl_priv *priv)
1757 {
1758         if (priv->ict_tbl_vir) {
1759                 pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
1760                                         PAGE_SIZE, priv->ict_tbl_vir,
1761                                         priv->ict_tbl_dma);
1762                 priv->ict_tbl_vir = NULL;
1763         }
1764 }
1765 EXPORT_SYMBOL(iwl_free_isr_ict);
1766
1767
1768 /* allocate dram shared table it is a PAGE_SIZE aligned
1769  * also reset all data related to ICT table interrupt.
1770  */
1771 int iwl_alloc_isr_ict(struct iwl_priv *priv)
1772 {
1773
1774         if (priv->cfg->use_isr_legacy)
1775                 return 0;
1776         /* allocate shrared data table */
1777         priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
1778                                                   ICT_COUNT) + PAGE_SIZE,
1779                                                   &priv->ict_tbl_dma);
1780         if (!priv->ict_tbl_vir)
1781                 return -ENOMEM;
1782
1783         /* align table to PAGE_SIZE boundry */
1784         priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
1785
1786         IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1787                              (unsigned long long)priv->ict_tbl_dma,
1788                              (unsigned long long)priv->aligned_ict_tbl_dma,
1789                         (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1790
1791         priv->ict_tbl =  priv->ict_tbl_vir +
1792                           (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
1793
1794         IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
1795                              priv->ict_tbl, priv->ict_tbl_vir,
1796                         (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1797
1798         /* reset table and index to all 0 */
1799         memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
1800         priv->ict_index = 0;
1801
1802         /* add periodic RX interrupt */
1803         priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
1804         return 0;
1805 }
1806 EXPORT_SYMBOL(iwl_alloc_isr_ict);
1807
1808 /* Device is going up inform it about using ICT interrupt table,
1809  * also we need to tell the driver to start using ICT interrupt.
1810  */
1811 int iwl_reset_ict(struct iwl_priv *priv)
1812 {
1813         u32 val;
1814         unsigned long flags;
1815
1816         if (!priv->ict_tbl_vir)
1817                 return 0;
1818
1819         spin_lock_irqsave(&priv->lock, flags);
1820         iwl_disable_interrupts(priv);
1821
1822         memset(&priv->ict_tbl[0],0, sizeof(u32) * ICT_COUNT);
1823
1824         val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
1825
1826         val |= CSR_DRAM_INT_TBL_ENABLE;
1827         val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
1828
1829         IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
1830                         "aligned dma address %Lx\n",
1831                         val, (unsigned long long)priv->aligned_ict_tbl_dma);
1832
1833         iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
1834         priv->use_ict = true;
1835         priv->ict_index = 0;
1836         iwl_write32(priv, CSR_INT, priv->inta_mask);
1837         iwl_enable_interrupts(priv);
1838         spin_unlock_irqrestore(&priv->lock, flags);
1839
1840         return 0;
1841 }
1842 EXPORT_SYMBOL(iwl_reset_ict);
1843
1844 /* Device is going down disable ict interrupt usage */
1845 void iwl_disable_ict(struct iwl_priv *priv)
1846 {
1847         unsigned long flags;
1848
1849         spin_lock_irqsave(&priv->lock, flags);
1850         priv->use_ict = false;
1851         spin_unlock_irqrestore(&priv->lock, flags);
1852 }
1853 EXPORT_SYMBOL(iwl_disable_ict);
1854
1855 /* interrupt handler using ict table, with this interrupt driver will
1856  * stop using INTA register to get device's interrupt, reading this register
1857  * is expensive, device will write interrupts in ICT dram table, increment
1858  * index then will fire interrupt to driver, driver will OR all ICT table
1859  * entries from current index up to table entry with 0 value. the result is
1860  * the interrupt we need to service, driver will set the entries back to 0 and
1861  * set index.
1862  */
1863 irqreturn_t iwl_isr_ict(int irq, void *data)
1864 {
1865         struct iwl_priv *priv = data;
1866         u32 inta, inta_mask;
1867         u32 val = 0;
1868
1869         if (!priv)
1870                 return IRQ_NONE;
1871
1872         /* dram interrupt table not set yet,
1873          * use legacy interrupt.
1874          */
1875         if (!priv->use_ict)
1876                 return iwl_isr(irq, data);
1877
1878         spin_lock(&priv->lock);
1879
1880         /* Disable (but don't clear!) interrupts here to avoid
1881          * back-to-back ISRs and sporadic interrupts from our NIC.
1882          * If we have something to service, the tasklet will re-enable ints.
1883          * If we *don't* have something, we'll re-enable before leaving here.
1884          */
1885         inta_mask = iwl_read32(priv, CSR_INT_MASK);  /* just for debug */
1886         iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1887
1888
1889         /* Ignore interrupt if there's nothing in NIC to service.
1890          * This may be due to IRQ shared with another device,
1891          * or due to sporadic interrupts thrown from our NIC. */
1892         if (!priv->ict_tbl[priv->ict_index]) {
1893                 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1894                 goto none;
1895         }
1896
1897         /* read all entries that not 0 start with ict_index */
1898         while (priv->ict_tbl[priv->ict_index]) {
1899
1900                 val |= priv->ict_tbl[priv->ict_index];
1901                 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
1902                                         priv->ict_index,
1903                                         priv->ict_tbl[priv->ict_index]);
1904                 priv->ict_tbl[priv->ict_index] = 0;
1905                 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
1906                                                                 ICT_COUNT);
1907
1908         }
1909
1910         /* We should not get this value, just ignore it. */
1911         if (val == 0xffffffff)
1912                 val = 0;
1913
1914         inta = (0xff & val) | ((0xff00 & val) << 16);
1915         IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1916                         inta, inta_mask, val);
1917
1918         inta &= priv->inta_mask;
1919         priv->inta |= inta;
1920
1921         /* iwl_irq_tasklet() will service interrupts and re-enable them */
1922         if (likely(inta))
1923                 tasklet_schedule(&priv->irq_tasklet);
1924         else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
1925                 /* Allow interrupt if was disabled by this handler and
1926                  * no tasklet was schedules, We should not enable interrupt,
1927                  * tasklet will enable it.
1928                  */
1929                 iwl_enable_interrupts(priv);
1930         }
1931
1932         spin_unlock(&priv->lock);
1933         return IRQ_HANDLED;
1934
1935  none:
1936         /* re-enable interrupts here since we don't have anything to service.
1937          * only Re-enable if disabled by irq.
1938          */
1939         if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1940                 iwl_enable_interrupts(priv);
1941
1942         spin_unlock(&priv->lock);
1943         return IRQ_NONE;
1944 }
1945 EXPORT_SYMBOL(iwl_isr_ict);
1946
1947
1948 static irqreturn_t iwl_isr(int irq, void *data)
1949 {
1950         struct iwl_priv *priv = data;
1951         u32 inta, inta_mask;
1952 #ifdef CONFIG_IWLWIFI_DEBUG
1953         u32 inta_fh;
1954 #endif
1955         if (!priv)
1956                 return IRQ_NONE;
1957
1958         spin_lock(&priv->lock);
1959
1960         /* Disable (but don't clear!) interrupts here to avoid
1961          *    back-to-back ISRs and sporadic interrupts from our NIC.
1962          * If we have something to service, the tasklet will re-enable ints.
1963          * If we *don't* have something, we'll re-enable before leaving here. */
1964         inta_mask = iwl_read32(priv, CSR_INT_MASK);  /* just for debug */
1965         iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1966
1967         /* Discover which interrupts are active/pending */
1968         inta = iwl_read32(priv, CSR_INT);
1969
1970         /* Ignore interrupt if there's nothing in NIC to service.
1971          * This may be due to IRQ shared with another device,
1972          * or due to sporadic interrupts thrown from our NIC. */
1973         if (!inta) {
1974                 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1975                 goto none;
1976         }
1977
1978         if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1979                 /* Hardware disappeared. It might have already raised
1980                  * an interrupt */
1981                 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1982                 goto unplugged;
1983         }
1984
1985 #ifdef CONFIG_IWLWIFI_DEBUG
1986         if (priv->debug_level & (IWL_DL_ISR)) {
1987                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1988                 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
1989                               "fh 0x%08x\n", inta, inta_mask, inta_fh);
1990         }
1991 #endif
1992
1993         priv->inta |= inta;
1994         /* iwl_irq_tasklet() will service interrupts and re-enable them */
1995         if (likely(inta))
1996                 tasklet_schedule(&priv->irq_tasklet);
1997         else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1998                 iwl_enable_interrupts(priv);
1999
2000  unplugged:
2001         spin_unlock(&priv->lock);
2002         return IRQ_HANDLED;
2003
2004  none:
2005         /* re-enable interrupts here since we don't have anything to service. */
2006         /* only Re-enable if diabled by irq  and no schedules tasklet. */
2007         if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
2008                 iwl_enable_interrupts(priv);
2009
2010         spin_unlock(&priv->lock);
2011         return IRQ_NONE;
2012 }
2013
2014 irqreturn_t iwl_isr_legacy(int irq, void *data)
2015 {
2016         struct iwl_priv *priv = data;
2017         u32 inta, inta_mask;
2018         u32 inta_fh;
2019         if (!priv)
2020                 return IRQ_NONE;
2021
2022         spin_lock(&priv->lock);
2023
2024         /* Disable (but don't clear!) interrupts here to avoid
2025          *    back-to-back ISRs and sporadic interrupts from our NIC.
2026          * If we have something to service, the tasklet will re-enable ints.
2027          * If we *don't* have something, we'll re-enable before leaving here. */
2028         inta_mask = iwl_read32(priv, CSR_INT_MASK);  /* just for debug */
2029         iwl_write32(priv, CSR_INT_MASK, 0x00000000);
2030
2031         /* Discover which interrupts are active/pending */
2032         inta = iwl_read32(priv, CSR_INT);
2033         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
2034
2035         /* Ignore interrupt if there's nothing in NIC to service.
2036          * This may be due to IRQ shared with another device,
2037          * or due to sporadic interrupts thrown from our NIC. */
2038         if (!inta && !inta_fh) {
2039                 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
2040                 goto none;
2041         }
2042
2043         if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
2044                 /* Hardware disappeared. It might have already raised
2045                  * an interrupt */
2046                 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
2047                 goto unplugged;
2048         }
2049
2050         IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
2051                       inta, inta_mask, inta_fh);
2052
2053         inta &= ~CSR_INT_BIT_SCD;
2054
2055         /* iwl_irq_tasklet() will service interrupts and re-enable them */
2056         if (likely(inta || inta_fh))
2057                 tasklet_schedule(&priv->irq_tasklet);
2058
2059  unplugged:
2060         spin_unlock(&priv->lock);
2061         return IRQ_HANDLED;
2062
2063  none:
2064         /* re-enable interrupts here since we don't have anything to service. */
2065         /* only Re-enable if diabled by irq */
2066         if (test_bit(STATUS_INT_ENABLED, &priv->status))
2067                 iwl_enable_interrupts(priv);
2068         spin_unlock(&priv->lock);
2069         return IRQ_NONE;
2070 }
2071 EXPORT_SYMBOL(iwl_isr_legacy);
2072
2073 int iwl_send_bt_config(struct iwl_priv *priv)
2074 {
2075         struct iwl_bt_cmd bt_cmd = {
2076                 .flags = 3,
2077                 .lead_time = 0xAA,
2078                 .max_kill = 1,
2079                 .kill_ack_mask = 0,
2080                 .kill_cts_mask = 0,
2081         };
2082
2083         return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
2084                                 sizeof(struct iwl_bt_cmd), &bt_cmd);
2085 }
2086 EXPORT_SYMBOL(iwl_send_bt_config);
2087
2088 int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
2089 {
2090         u32 stat_flags = 0;
2091         struct iwl_host_cmd cmd = {
2092                 .id = REPLY_STATISTICS_CMD,
2093                 .meta.flags = flags,
2094                 .len = sizeof(stat_flags),
2095                 .data = (u8 *) &stat_flags,
2096         };
2097         return iwl_send_cmd(priv, &cmd);
2098 }
2099 EXPORT_SYMBOL(iwl_send_statistics_request);
2100
2101 /**
2102  * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
2103  *   using sample data 100 bytes apart.  If these sample points are good,
2104  *   it's a pretty good bet that everything between them is good, too.
2105  */
2106 static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2107 {
2108         u32 val;
2109         int ret = 0;
2110         u32 errcnt = 0;
2111         u32 i;
2112
2113         IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2114
2115         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2116                 /* read data comes through single port, auto-incr addr */
2117                 /* NOTE: Use the debugless read so we don't flood kernel log
2118                  * if IWL_DL_IO is set */
2119                 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2120                         i + IWL49_RTC_INST_LOWER_BOUND);
2121                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2122                 if (val != le32_to_cpu(*image)) {
2123                         ret = -EIO;
2124                         errcnt++;
2125                         if (errcnt >= 3)
2126                                 break;
2127                 }
2128         }
2129
2130         return ret;
2131 }
2132
2133 /**
2134  * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
2135  *     looking at all data.
2136  */
2137 static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
2138                                  u32 len)
2139 {
2140         u32 val;
2141         u32 save_len = len;
2142         int ret = 0;
2143         u32 errcnt;
2144
2145         IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2146
2147         iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2148                            IWL49_RTC_INST_LOWER_BOUND);
2149
2150         errcnt = 0;
2151         for (; len > 0; len -= sizeof(u32), image++) {
2152                 /* read data comes through single port, auto-incr addr */
2153                 /* NOTE: Use the debugless read so we don't flood kernel log
2154                  * if IWL_DL_IO is set */
2155                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2156                 if (val != le32_to_cpu(*image)) {
2157                         IWL_ERR(priv, "uCode INST section is invalid at "
2158                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
2159                                   save_len - len, val, le32_to_cpu(*image));
2160                         ret = -EIO;
2161                         errcnt++;
2162                         if (errcnt >= 20)
2163                                 break;
2164                 }
2165         }
2166
2167         if (!errcnt)
2168                 IWL_DEBUG_INFO(priv,
2169                     "ucode image in INSTRUCTION memory is good\n");
2170
2171         return ret;
2172 }
2173
2174 /**
2175  * iwl_verify_ucode - determine which instruction image is in SRAM,
2176  *    and verify its contents
2177  */
2178 int iwl_verify_ucode(struct iwl_priv *priv)
2179 {
2180         __le32 *image;
2181         u32 len;
2182         int ret;
2183
2184         /* Try bootstrap */
2185         image = (__le32 *)priv->ucode_boot.v_addr;
2186         len = priv->ucode_boot.len;
2187         ret = iwlcore_verify_inst_sparse(priv, image, len);
2188         if (!ret) {
2189                 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2190                 return 0;
2191         }
2192
2193         /* Try initialize */
2194         image = (__le32 *)priv->ucode_init.v_addr;
2195         len = priv->ucode_init.len;
2196         ret = iwlcore_verify_inst_sparse(priv, image, len);
2197         if (!ret) {
2198                 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2199                 return 0;
2200         }
2201
2202         /* Try runtime/protocol */
2203         image = (__le32 *)priv->ucode_code.v_addr;
2204         len = priv->ucode_code.len;
2205         ret = iwlcore_verify_inst_sparse(priv, image, len);
2206         if (!ret) {
2207                 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2208                 return 0;
2209         }
2210
2211         IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2212
2213         /* Since nothing seems to match, show first several data entries in
2214          * instruction SRAM, so maybe visual inspection will give a clue.
2215          * Selection of bootstrap image (vs. other images) is arbitrary. */
2216         image = (__le32 *)priv->ucode_boot.v_addr;
2217         len = priv->ucode_boot.len;
2218         ret = iwl_verify_inst_full(priv, image, len);
2219
2220         return ret;
2221 }
2222 EXPORT_SYMBOL(iwl_verify_ucode);
2223
2224
2225 void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2226 {
2227         struct iwl_ct_kill_config cmd;
2228         unsigned long flags;
2229         int ret = 0;
2230
2231         spin_lock_irqsave(&priv->lock, flags);
2232         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2233                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2234         spin_unlock_irqrestore(&priv->lock, flags);
2235
2236         cmd.critical_temperature_R =
2237                 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2238
2239         ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2240                                sizeof(cmd), &cmd);
2241         if (ret)
2242                 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2243         else
2244                 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD succeeded, "
2245                         "critical temperature is %d\n",
2246                         cmd.critical_temperature_R);
2247 }
2248 EXPORT_SYMBOL(iwl_rf_kill_ct_config);
2249
2250
2251 /*
2252  * CARD_STATE_CMD
2253  *
2254  * Use: Sets the device's internal card state to enable, disable, or halt
2255  *
2256  * When in the 'enable' state the card operates as normal.
2257  * When in the 'disable' state, the card enters into a low power mode.
2258  * When in the 'halt' state, the card is shut down and must be fully
2259  * restarted to come back on.
2260  */
2261 int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
2262 {
2263         struct iwl_host_cmd cmd = {
2264                 .id = REPLY_CARD_STATE_CMD,
2265                 .len = sizeof(u32),
2266                 .data = &flags,
2267                 .meta.flags = meta_flag,
2268         };
2269
2270         return iwl_send_cmd(priv, &cmd);
2271 }
2272 EXPORT_SYMBOL(iwl_send_card_state);
2273
2274 void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2275                            struct iwl_rx_mem_buffer *rxb)
2276 {
2277 #ifdef CONFIG_IWLWIFI_DEBUG
2278         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2279         struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2280         IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2281                      sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2282 #endif
2283 }
2284 EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2285
2286 void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2287                                       struct iwl_rx_mem_buffer *rxb)
2288 {
2289         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2290         IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
2291                         "notification for %s:\n",
2292                         le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
2293         iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
2294 }
2295 EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
2296
2297 void iwl_rx_reply_error(struct iwl_priv *priv,
2298                         struct iwl_rx_mem_buffer *rxb)
2299 {
2300         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2301
2302         IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2303                 "seq 0x%04X ser 0x%08X\n",
2304                 le32_to_cpu(pkt->u.err_resp.error_type),
2305                 get_cmd_string(pkt->u.err_resp.cmd_id),
2306                 pkt->u.err_resp.cmd_id,
2307                 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2308                 le32_to_cpu(pkt->u.err_resp.error_info));
2309 }
2310 EXPORT_SYMBOL(iwl_rx_reply_error);
2311
2312 void iwl_clear_isr_stats(struct iwl_priv *priv)
2313 {
2314         memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2315 }
2316 EXPORT_SYMBOL(iwl_clear_isr_stats);
2317
2318 int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2319                            const struct ieee80211_tx_queue_params *params)
2320 {
2321         struct iwl_priv *priv = hw->priv;
2322         unsigned long flags;
2323         int q;
2324
2325         IWL_DEBUG_MAC80211(priv, "enter\n");
2326
2327         if (!iwl_is_ready_rf(priv)) {
2328                 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2329                 return -EIO;
2330         }
2331
2332         if (queue >= AC_NUM) {
2333                 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2334                 return 0;
2335         }
2336
2337         q = AC_NUM - 1 - queue;
2338
2339         spin_lock_irqsave(&priv->lock, flags);
2340
2341         priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2342         priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2343         priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2344         priv->qos_data.def_qos_parm.ac[q].edca_txop =
2345                         cpu_to_le16((params->txop * 32));
2346
2347         priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2348         priv->qos_data.qos_active = 1;
2349
2350         if (priv->iw_mode == NL80211_IFTYPE_AP)
2351                 iwl_activate_qos(priv, 1);
2352         else if (priv->assoc_id && iwl_is_associated(priv))
2353                 iwl_activate_qos(priv, 0);
2354
2355         spin_unlock_irqrestore(&priv->lock, flags);
2356
2357         IWL_DEBUG_MAC80211(priv, "leave\n");
2358         return 0;
2359 }
2360 EXPORT_SYMBOL(iwl_mac_conf_tx);
2361
2362 static void iwl_ht_conf(struct iwl_priv *priv,
2363                             struct ieee80211_bss_conf *bss_conf)
2364 {
2365         struct ieee80211_sta_ht_cap *ht_conf;
2366         struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
2367         struct ieee80211_sta *sta;
2368
2369         IWL_DEBUG_MAC80211(priv, "enter: \n");
2370
2371         if (!iwl_conf->is_ht)
2372                 return;
2373
2374
2375         /*
2376          * It is totally wrong to base global information on something
2377          * that is valid only when associated, alas, this driver works
2378          * that way and I don't know how to fix it.
2379          */
2380
2381         rcu_read_lock();
2382         sta = ieee80211_find_sta(priv->hw, priv->bssid);
2383         if (!sta) {
2384                 rcu_read_unlock();
2385                 return;
2386         }
2387         ht_conf = &sta->ht_cap;
2388
2389         if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
2390                 iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
2391         if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
2392                 iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
2393
2394         iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
2395         iwl_conf->max_amsdu_size =
2396                 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
2397
2398         iwl_conf->supported_chan_width =
2399                 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
2400
2401         /*
2402          * XXX: The HT configuration needs to be moved into iwl_mac_config()
2403          *      to be done there correctly.
2404          */
2405
2406         iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
2407         if (conf_is_ht40_minus(&priv->hw->conf))
2408                 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2409         else if (conf_is_ht40_plus(&priv->hw->conf))
2410                 iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2411
2412         /* If no above or below channel supplied disable FAT channel */
2413         if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
2414             iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
2415                 iwl_conf->supported_chan_width = 0;
2416
2417         iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
2418
2419         memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
2420
2421         iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
2422         iwl_conf->ht_protection =
2423                 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
2424         iwl_conf->non_GF_STA_present =
2425                 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
2426
2427         rcu_read_unlock();
2428
2429         IWL_DEBUG_MAC80211(priv, "leave\n");
2430 }
2431
2432 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2433 void iwl_bss_info_changed(struct ieee80211_hw *hw,
2434                           struct ieee80211_vif *vif,
2435                           struct ieee80211_bss_conf *bss_conf,
2436                           u32 changes)
2437 {
2438         struct iwl_priv *priv = hw->priv;
2439         int ret;
2440
2441         IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2442
2443         if (!iwl_is_alive(priv))
2444                 return;
2445
2446         mutex_lock(&priv->mutex);
2447
2448         if (changes & BSS_CHANGED_BEACON &&
2449             priv->iw_mode == NL80211_IFTYPE_AP) {
2450                 dev_kfree_skb(priv->ibss_beacon);
2451                 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2452         }
2453
2454         if (changes & BSS_CHANGED_BEACON_INT) {
2455                 priv->beacon_int = bss_conf->beacon_int;
2456                 /* TODO: in AP mode, do something to make this take effect */
2457         }
2458
2459         if (changes & BSS_CHANGED_BSSID) {
2460                 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
2461
2462                 /*
2463                  * If there is currently a HW scan going on in the
2464                  * background then we need to cancel it else the RXON
2465                  * below/in post_associate will fail.
2466                  */
2467                 if (iwl_scan_cancel_timeout(priv, 100)) {
2468                         IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2469                         IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2470                         mutex_unlock(&priv->mutex);
2471                         return;
2472                 }
2473
2474                 /* mac80211 only sets assoc when in STATION mode */
2475                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
2476                     bss_conf->assoc) {
2477                         memcpy(priv->staging_rxon.bssid_addr,
2478                                bss_conf->bssid, ETH_ALEN);
2479
2480                         /* currently needed in a few places */
2481                         memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2482                 } else {
2483                         priv->staging_rxon.filter_flags &=
2484                                 ~RXON_FILTER_ASSOC_MSK;
2485                 }
2486
2487         }
2488
2489         /*
2490          * This needs to be after setting the BSSID in case
2491          * mac80211 decides to do both changes at once because
2492          * it will invoke post_associate.
2493          */
2494         if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2495             changes & BSS_CHANGED_BEACON) {
2496                 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2497
2498                 if (beacon)
2499                         iwl_mac_beacon_update(hw, beacon);
2500         }
2501
2502         if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2503                 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2504                                    bss_conf->use_short_preamble);
2505                 if (bss_conf->use_short_preamble)
2506                         priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2507                 else
2508                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2509         }
2510
2511         if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2512                 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2513                 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2514                         priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2515                 else
2516                         priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2517         }
2518
2519         if (changes & BSS_CHANGED_BASIC_RATES) {
2520                 /* XXX use this information
2521                  *
2522                  * To do that, remove code from iwl_set_rate() and put something
2523                  * like this here:
2524                  *
2525                 if (A-band)
2526                         priv->staging_rxon.ofdm_basic_rates =
2527                                 bss_conf->basic_rates;
2528                 else
2529                         priv->staging_rxon.ofdm_basic_rates =
2530                                 bss_conf->basic_rates >> 4;
2531                         priv->staging_rxon.cck_basic_rates =
2532                                 bss_conf->basic_rates & 0xF;
2533                  */
2534         }
2535
2536         if (changes & BSS_CHANGED_HT) {
2537                 iwl_ht_conf(priv, bss_conf);
2538
2539                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2540                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2541         }
2542
2543         if (changes & BSS_CHANGED_ASSOC) {
2544                 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
2545                 if (bss_conf->assoc) {
2546                         priv->assoc_id = bss_conf->aid;
2547                         priv->beacon_int = bss_conf->beacon_int;
2548                         priv->power_data.dtim_period = bss_conf->dtim_period;
2549                         priv->timestamp = bss_conf->timestamp;
2550                         priv->assoc_capability = bss_conf->assoc_capability;
2551
2552                         /*
2553                          * We have just associated, don't start scan too early
2554                          * leave time for EAPOL exchange to complete.
2555                          *
2556                          * XXX: do this in mac80211
2557                          */
2558                         priv->next_scan_jiffies = jiffies +
2559                                         IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
2560                         if (!iwl_is_rfkill(priv))
2561                                 priv->cfg->ops->lib->post_associate(priv);
2562                 } else
2563                         priv->assoc_id = 0;
2564
2565         }
2566
2567         if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2568                 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2569                                    changes);
2570                 ret = iwl_send_rxon_assoc(priv);
2571                 if (!ret) {
2572                         /* Sync active_rxon with latest change. */
2573                         memcpy((void *)&priv->active_rxon,
2574                                 &priv->staging_rxon,
2575                                 sizeof(struct iwl_rxon_cmd));
2576                 }
2577         }
2578
2579         mutex_unlock(&priv->mutex);
2580
2581         IWL_DEBUG_MAC80211(priv, "leave\n");
2582 }
2583 EXPORT_SYMBOL(iwl_bss_info_changed);
2584
2585 int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2586 {
2587         struct iwl_priv *priv = hw->priv;
2588         unsigned long flags;
2589         __le64 timestamp;
2590
2591         IWL_DEBUG_MAC80211(priv, "enter\n");
2592
2593         if (!iwl_is_ready_rf(priv)) {
2594                 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2595                 return -EIO;
2596         }
2597
2598         if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2599                 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2600                 return -EIO;
2601         }
2602
2603         spin_lock_irqsave(&priv->lock, flags);
2604
2605         if (priv->ibss_beacon)
2606                 dev_kfree_skb(priv->ibss_beacon);
2607
2608         priv->ibss_beacon = skb;
2609
2610         priv->assoc_id = 0;
2611         timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2612         priv->timestamp = le64_to_cpu(timestamp);
2613
2614         IWL_DEBUG_MAC80211(priv, "leave\n");
2615         spin_unlock_irqrestore(&priv->lock, flags);
2616
2617         iwl_reset_qos(priv);
2618
2619         priv->cfg->ops->lib->post_associate(priv);
2620
2621
2622         return 0;
2623 }
2624 EXPORT_SYMBOL(iwl_mac_beacon_update);
2625
2626 int iwl_set_mode(struct iwl_priv *priv, int mode)
2627 {
2628         if (mode == NL80211_IFTYPE_ADHOC) {
2629                 const struct iwl_channel_info *ch_info;
2630
2631                 ch_info = iwl_get_channel_info(priv,
2632                         priv->band,
2633                         le16_to_cpu(priv->staging_rxon.channel));
2634
2635                 if (!ch_info || !is_channel_ibss(ch_info)) {
2636                         IWL_ERR(priv, "channel %d not IBSS channel\n",
2637                                   le16_to_cpu(priv->staging_rxon.channel));
2638                         return -EINVAL;
2639                 }
2640         }
2641
2642         iwl_connection_init_rx_config(priv, mode);
2643
2644         if (priv->cfg->ops->hcmd->set_rxon_chain)
2645                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2646
2647         memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2648
2649         iwl_clear_stations_table(priv);
2650
2651         /* dont commit rxon if rf-kill is on*/
2652         if (!iwl_is_ready_rf(priv))
2653                 return -EAGAIN;
2654
2655         iwlcore_commit_rxon(priv);
2656
2657         return 0;
2658 }
2659 EXPORT_SYMBOL(iwl_set_mode);
2660
2661 int iwl_mac_add_interface(struct ieee80211_hw *hw,
2662                                  struct ieee80211_if_init_conf *conf)
2663 {
2664         struct iwl_priv *priv = hw->priv;
2665         unsigned long flags;
2666
2667         IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2668
2669         if (priv->vif) {
2670                 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2671                 return -EOPNOTSUPP;
2672         }
2673
2674         spin_lock_irqsave(&priv->lock, flags);
2675         priv->vif = conf->vif;
2676         priv->iw_mode = conf->type;
2677
2678         spin_unlock_irqrestore(&priv->lock, flags);
2679
2680         mutex_lock(&priv->mutex);
2681
2682         if (conf->mac_addr) {
2683                 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2684                 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2685         }
2686
2687         if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2688                 /* we are not ready, will run again when ready */
2689                 set_bit(STATUS_MODE_PENDING, &priv->status);
2690
2691         mutex_unlock(&priv->mutex);
2692
2693         IWL_DEBUG_MAC80211(priv, "leave\n");
2694         return 0;
2695 }
2696 EXPORT_SYMBOL(iwl_mac_add_interface);
2697
2698 void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2699                                      struct ieee80211_if_init_conf *conf)
2700 {
2701         struct iwl_priv *priv = hw->priv;
2702
2703         IWL_DEBUG_MAC80211(priv, "enter\n");
2704
2705         mutex_lock(&priv->mutex);
2706
2707         if (iwl_is_ready_rf(priv)) {
2708                 iwl_scan_cancel_timeout(priv, 100);
2709                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2710                 iwlcore_commit_rxon(priv);
2711         }
2712         if (priv->vif == conf->vif) {
2713                 priv->vif = NULL;
2714                 memset(priv->bssid, 0, ETH_ALEN);
2715         }
2716         mutex_unlock(&priv->mutex);
2717
2718         IWL_DEBUG_MAC80211(priv, "leave\n");
2719
2720 }
2721 EXPORT_SYMBOL(iwl_mac_remove_interface);
2722
2723 /**
2724  * iwl_mac_config - mac80211 config callback
2725  *
2726  * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2727  * be set inappropriately and the driver currently sets the hardware up to
2728  * use it whenever needed.
2729  */
2730 int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2731 {
2732         struct iwl_priv *priv = hw->priv;
2733         const struct iwl_channel_info *ch_info;
2734         struct ieee80211_conf *conf = &hw->conf;
2735         unsigned long flags = 0;
2736         int ret = 0;
2737         u16 ch;
2738         int scan_active = 0;
2739
2740         mutex_lock(&priv->mutex);
2741
2742         IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2743                                         conf->channel->hw_value, changed);
2744
2745         if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2746                         test_bit(STATUS_SCANNING, &priv->status))) {
2747                 scan_active = 1;
2748                 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2749         }
2750
2751
2752         /* during scanning mac80211 will delay channel setting until
2753          * scan finish with changed = 0
2754          */
2755         if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2756                 if (scan_active)
2757                         goto set_ch_out;
2758
2759                 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2760                 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2761                 if (!is_channel_valid(ch_info)) {
2762                         IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2763                         ret = -EINVAL;
2764                         goto set_ch_out;
2765                 }
2766
2767                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2768                         !is_channel_ibss(ch_info)) {
2769                         IWL_ERR(priv, "channel %d in band %d not "
2770                                 "IBSS channel\n",
2771                                 conf->channel->hw_value, conf->channel->band);
2772                         ret = -EINVAL;
2773                         goto set_ch_out;
2774                 }
2775
2776                 priv->current_ht_config.is_ht = conf_is_ht(conf);
2777
2778                 spin_lock_irqsave(&priv->lock, flags);
2779
2780
2781                 /* if we are switching from ht to 2.4 clear flags
2782                  * from any ht related info since 2.4 does not
2783                  * support ht */
2784                 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2785                         priv->staging_rxon.flags = 0;
2786
2787                 iwl_set_rxon_channel(priv, conf->channel);
2788
2789                 iwl_set_flags_for_band(priv, conf->channel->band);
2790                 spin_unlock_irqrestore(&priv->lock, flags);
2791  set_ch_out:
2792                 /* The list of supported rates and rate mask can be different
2793                  * for each band; since the band may have changed, reset
2794                  * the rate mask to what mac80211 lists */
2795                 iwl_set_rate(priv);
2796         }
2797
2798         if (changed & IEEE80211_CONF_CHANGE_PS &&
2799             priv->iw_mode == NL80211_IFTYPE_STATION) {
2800                 priv->power_data.power_disabled =
2801                         !(conf->flags & IEEE80211_CONF_PS);
2802                 ret = iwl_power_update_mode(priv, 0);
2803                 if (ret)
2804                         IWL_DEBUG_MAC80211(priv, "Error setting power level\n");
2805         }
2806
2807         if (changed & IEEE80211_CONF_CHANGE_POWER) {
2808                 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2809                         priv->tx_power_user_lmt, conf->power_level);
2810
2811                 iwl_set_tx_power(priv, conf->power_level, false);
2812         }
2813
2814         /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2815         if (priv->cfg->ops->hcmd->set_rxon_chain)
2816                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2817
2818         if (!iwl_is_ready(priv)) {
2819                 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2820                 goto out;
2821         }
2822
2823         if (scan_active)
2824                 goto out;
2825
2826         if (memcmp(&priv->active_rxon,
2827                    &priv->staging_rxon, sizeof(priv->staging_rxon)))
2828                 iwlcore_commit_rxon(priv);
2829         else
2830                 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2831
2832
2833 out:
2834         IWL_DEBUG_MAC80211(priv, "leave\n");
2835         mutex_unlock(&priv->mutex);
2836         return ret;
2837 }
2838 EXPORT_SYMBOL(iwl_mac_config);
2839
2840 int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2841                          struct ieee80211_tx_queue_stats *stats)
2842 {
2843         struct iwl_priv *priv = hw->priv;
2844         int i, avail;
2845         struct iwl_tx_queue *txq;
2846         struct iwl_queue *q;
2847         unsigned long flags;
2848
2849         IWL_DEBUG_MAC80211(priv, "enter\n");
2850
2851         if (!iwl_is_ready_rf(priv)) {
2852                 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2853                 return -EIO;
2854         }
2855
2856         spin_lock_irqsave(&priv->lock, flags);
2857
2858         for (i = 0; i < AC_NUM; i++) {
2859                 txq = &priv->txq[i];
2860                 q = &txq->q;
2861                 avail = iwl_queue_space(q);
2862
2863                 stats[i].len = q->n_window - avail;
2864                 stats[i].limit = q->n_window - q->high_mark;
2865                 stats[i].count = q->n_window;
2866
2867         }
2868         spin_unlock_irqrestore(&priv->lock, flags);
2869
2870         IWL_DEBUG_MAC80211(priv, "leave\n");
2871
2872         return 0;
2873 }
2874 EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2875
2876 void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2877 {
2878         struct iwl_priv *priv = hw->priv;
2879         unsigned long flags;
2880
2881         mutex_lock(&priv->mutex);
2882         IWL_DEBUG_MAC80211(priv, "enter\n");
2883
2884         spin_lock_irqsave(&priv->lock, flags);
2885         memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
2886         spin_unlock_irqrestore(&priv->lock, flags);
2887
2888         iwl_reset_qos(priv);
2889
2890         spin_lock_irqsave(&priv->lock, flags);
2891         priv->assoc_id = 0;
2892         priv->assoc_capability = 0;
2893         priv->assoc_station_added = 0;
2894
2895         /* new association get rid of ibss beacon skb */
2896         if (priv->ibss_beacon)
2897                 dev_kfree_skb(priv->ibss_beacon);
2898
2899         priv->ibss_beacon = NULL;
2900
2901         priv->beacon_int = priv->vif->bss_conf.beacon_int;
2902         priv->timestamp = 0;
2903         if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2904                 priv->beacon_int = 0;
2905
2906         spin_unlock_irqrestore(&priv->lock, flags);
2907
2908         if (!iwl_is_ready_rf(priv)) {
2909                 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2910                 mutex_unlock(&priv->mutex);
2911                 return;
2912         }
2913
2914         /* we are restarting association process
2915          * clear RXON_FILTER_ASSOC_MSK bit
2916          */
2917         if (priv->iw_mode != NL80211_IFTYPE_AP) {
2918                 iwl_scan_cancel_timeout(priv, 100);
2919                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2920                 iwlcore_commit_rxon(priv);
2921         }
2922
2923         if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2924                 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2925                 mutex_unlock(&priv->mutex);
2926                 return;
2927         }
2928
2929         iwl_set_rate(priv);
2930
2931         mutex_unlock(&priv->mutex);
2932
2933         IWL_DEBUG_MAC80211(priv, "leave\n");
2934 }
2935 EXPORT_SYMBOL(iwl_mac_reset_tsf);
2936
2937 #ifdef CONFIG_PM
2938
2939 int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2940 {
2941         struct iwl_priv *priv = pci_get_drvdata(pdev);
2942
2943         /*
2944          * This function is called when system goes into suspend state
2945          * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2946          * first but since iwl_mac_stop() has no knowledge of who the caller is,
2947          * it will not call apm_ops.stop() to stop the DMA operation.
2948          * Calling apm_ops.stop here to make sure we stop the DMA.
2949          */
2950         priv->cfg->ops->lib->apm_ops.stop(priv);
2951
2952         pci_save_state(pdev);
2953         pci_disable_device(pdev);
2954         pci_set_power_state(pdev, PCI_D3hot);
2955
2956         return 0;
2957 }
2958 EXPORT_SYMBOL(iwl_pci_suspend);
2959
2960 int iwl_pci_resume(struct pci_dev *pdev)
2961 {
2962         struct iwl_priv *priv = pci_get_drvdata(pdev);
2963         int ret;
2964
2965         pci_set_power_state(pdev, PCI_D0);
2966         ret = pci_enable_device(pdev);
2967         if (ret)
2968                 return ret;
2969         pci_restore_state(pdev);
2970         iwl_enable_interrupts(priv);
2971
2972         return 0;
2973 }
2974 EXPORT_SYMBOL(iwl_pci_resume);
2975
2976 #endif /* CONFIG_PM */