drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31
  32 #include <linux/kernel.h>
  33 #include <linux/module.h>
  34 #include <linux/init.h>
  35 #include <linux/pci.h>
  36 #include <linux/pci-aspm.h>
  37 #include <linux/slab.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/delay.h>
  40 #include <linux/sched.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/netdevice.h>
  43 #include <linux/wireless.h>
  44 #include <linux/firmware.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/if_arp.h>
  47
  48 #include <net/mac80211.h>
  49
  50 #include <asm/div64.h>
  51
  52 #define DRV_NAME        "iwlagn"
  53
  54 #include "iwl-eeprom.h"
  55 #include "iwl-dev.h"
  56 #include "iwl-core.h"
  57 #include "iwl-io.h"
  58 #include "iwl-helpers.h"
  59 #include "iwl-sta.h"
  60 #include "iwl-agn-calib.h"
  61 #include "iwl-agn.h"
  62
  63
  64 /******************************************************************************
  65  *
  66  * module boiler plate
  67  *
  68  ******************************************************************************/
  69
  70 /*
  71  * module name, copyright, version, etc.
  72  */
  73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  74
  75 #ifdef CONFIG_IWLWIFI_DEBUG
  76 #define VD "d"
  77 #else
  78 #define VD
  79 #endif
  80
  81 #define DRV_VERSION     IWLWIFI_VERSION VD
  82
  83
  84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  85 MODULE_VERSION(DRV_VERSION);
  86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  87 MODULE_LICENSE("GPL");
  88 MODULE_ALIAS("iwl4965");
  89
  90 static int iwlagn_ant_coupling;
  91 static bool iwlagn_bt_ch_announce = 1;
  92
  93 void iwl_update_chain_flags(struct iwl_priv *priv)
  94 {
  95         struct iwl_rxon_context *ctx;
  96
  97         if (priv->cfg->ops->hcmd->set_rxon_chain) {
  98                 for_each_context(priv, ctx) {
  99                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
 100                         iwlcore_commit_rxon(priv, ctx);
 101                 }
 102         }
 103 }
 104
 105 static void iwl_clear_free_frames(struct iwl_priv *priv)
 106 {
 107         struct list_head *element;
 108
 109         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 110                        priv->frames_count);
 111
 112         while (!list_empty(&priv->free_frames)) {
 113                 element = priv->free_frames.next;
 114                 list_del(element);
 115                 kfree(list_entry(element, struct iwl_frame, list));
 116                 priv->frames_count--;
 117         }
 118
 119         if (priv->frames_count) {
 120                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 121                             priv->frames_count);
 122                 priv->frames_count = 0;
 123         }
 124 }
 125
 126 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 127 {
 128         struct iwl_frame *frame;
 129         struct list_head *element;
 130         if (list_empty(&priv->free_frames)) {
 131                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 132                 if (!frame) {
 133                         IWL_ERR(priv, "Could not allocate frame!\n");
 134                         return NULL;
 135                 }
 136
 137                 priv->frames_count++;
 138                 return frame;
 139         }
 140
 141         element = priv->free_frames.next;
 142         list_del(element);
 143         return list_entry(element, struct iwl_frame, list);
 144 }
 145
 146 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 147 {
 148         memset(frame, 0, sizeof(*frame));
 149         list_add(&frame->list, &priv->free_frames);
 150 }
 151
 152 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 153                                  struct ieee80211_hdr *hdr,
 154                                  int left)
 155 {
 156         lockdep_assert_held(&priv->mutex);
 157
 158         if (!priv->beacon_skb)
 159                 return 0;
 160
 161         if (priv->beacon_skb->len > left)
 162                 return 0;
 163
 164         memcpy(hdr, priv->beacon_skb->data, priv->beacon_skb->len);
 165
 166         return priv->beacon_skb->len;
 167 }
 168
 169 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 170 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 171                                struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 172                                u8 *beacon, u32 frame_size)
 173 {
 174         u16 tim_idx;
 175         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 176
 177         /*
 178          * The index is relative to frame start but we start looking at the
 179          * variable-length part of the beacon.
 180          */
 181         tim_idx = mgmt->u.beacon.variable - beacon;
 182
 183         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 184         while ((tim_idx < (frame_size - 2)) &&
 185                         (beacon[tim_idx] != WLAN_EID_TIM))
 186                 tim_idx += beacon[tim_idx+1] + 2;
 187
 188         /* If TIM field was found, set variables */
 189         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 190                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 191                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 192         } else
 193                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 194 }
 195
 196 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 197                                        struct iwl_frame *frame)
 198 {
 199         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 200         u32 frame_size;
 201         u32 rate_flags;
 202         u32 rate;
 203         /*
 204          * We have to set up the TX command, the TX Beacon command, and the
 205          * beacon contents.
 206          */
 207
 208         lockdep_assert_held(&priv->mutex);
 209
 210         if (!priv->beacon_ctx) {
 211                 IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
 212                 return 0;
 213         }
 214
 215         /* Initialize memory */
 216         tx_beacon_cmd = &frame->u.beacon;
 217         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 218
 219         /* Set up TX beacon contents */
 220         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 221                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 222         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 223                 return 0;
 224         if (!frame_size)
 225                 return 0;
 226
 227         /* Set up TX command fields */
 228         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 229         tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
 230         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 231         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 232                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 233
 234         /* Set up TX beacon command fields */
 235         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 236                            frame_size);
 237
 238         /* Set up packet rate and flags */
 239         rate = iwl_rate_get_lowest_plcp(priv, priv->beacon_ctx);
 240         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
 241                                               priv->hw_params.valid_tx_ant);
 242         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 243         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 244                 rate_flags |= RATE_MCS_CCK_MSK;
 245         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 246                         rate_flags);
 247
 248         return sizeof(*tx_beacon_cmd) + frame_size;
 249 }
 250
 251 int iwlagn_send_beacon_cmd(struct iwl_priv *priv)
 252 {
 253         struct iwl_frame *frame;
 254         unsigned int frame_size;
 255         int rc;
 256
 257         frame = iwl_get_free_frame(priv);
 258         if (!frame) {
 259                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 260                           "command.\n");
 261                 return -ENOMEM;
 262         }
 263
 264         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 265         if (!frame_size) {
 266                 IWL_ERR(priv, "Error configuring the beacon command\n");
 267                 iwl_free_frame(priv, frame);
 268                 return -EINVAL;
 269         }
 270
 271         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 272                               &frame->u.cmd[0]);
 273
 274         iwl_free_frame(priv, frame);
 275
 276         return rc;
 277 }
 278
 279 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 280 {
 281         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 282
 283         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 284         if (sizeof(dma_addr_t) > sizeof(u32))
 285                 addr |=
 286                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 287
 288         return addr;
 289 }
 290
 291 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 292 {
 293         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 294
 295         return le16_to_cpu(tb->hi_n_len) >> 4;
 296 }
 297
 298 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 299                                   dma_addr_t addr, u16 len)
 300 {
 301         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 302         u16 hi_n_len = len << 4;
 303
 304         put_unaligned_le32(addr, &tb->lo);
 305         if (sizeof(dma_addr_t) > sizeof(u32))
 306                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 307
 308         tb->hi_n_len = cpu_to_le16(hi_n_len);
 309
 310         tfd->num_tbs = idx + 1;
 311 }
 312
 313 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 314 {
 315         return tfd->num_tbs & 0x1f;
 316 }
 317
 318 /**
 319  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 320  * @priv - driver private data
 321  * @txq - tx queue
 322  *
 323  * Does NOT advance any TFD circular buffer read/write indexes
 324  * Does NOT free the TFD itself (which is within circular buffer)
 325  */
 326 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 327 {
 328         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 329         struct iwl_tfd *tfd;
 330         struct pci_dev *dev = priv->pci_dev;
 331         int index = txq->q.read_ptr;
 332         int i;
 333         int num_tbs;
 334
 335         tfd = &tfd_tmp[index];
 336
 337         /* Sanity check on number of chunks */
 338         num_tbs = iwl_tfd_get_num_tbs(tfd);
 339
 340         if (num_tbs >= IWL_NUM_OF_TBS) {
 341                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 342                 /* @todo issue fatal error, it is quite serious situation */
 343                 return;
 344         }
 345
 346         /* Unmap tx_cmd */
 347         if (num_tbs)
 348                 pci_unmap_single(dev,
 349                                 dma_unmap_addr(&txq->meta[index], mapping),
 350                                 dma_unmap_len(&txq->meta[index], len),
 351                                 PCI_DMA_BIDIRECTIONAL);
 352
 353         /* Unmap chunks, if any. */
 354         for (i = 1; i < num_tbs; i++)
 355                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 356                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 357
 358         /* free SKB */
 359         if (txq->txb) {
 360                 struct sk_buff *skb;
 361
 362                 skb = txq->txb[txq->q.read_ptr].skb;
 363
 364                 /* can be called from irqs-disabled context */
 365                 if (skb) {
 366                         dev_kfree_skb_any(skb);
 367                         txq->txb[txq->q.read_ptr].skb = NULL;
 368                 }
 369         }
 370 }
 371
 372 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 373                                  struct iwl_tx_queue *txq,
 374                                  dma_addr_t addr, u16 len,
 375                                  u8 reset, u8 pad)
 376 {
 377         struct iwl_queue *q;
 378         struct iwl_tfd *tfd, *tfd_tmp;
 379         u32 num_tbs;
 380
 381         q = &txq->q;
 382         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 383         tfd = &tfd_tmp[q->write_ptr];
 384
 385         if (reset)
 386                 memset(tfd, 0, sizeof(*tfd));
 387
 388         num_tbs = iwl_tfd_get_num_tbs(tfd);
 389
 390         /* Each TFD can point to a maximum 20 Tx buffers */
 391         if (num_tbs >= IWL_NUM_OF_TBS) {
 392                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 393                           IWL_NUM_OF_TBS);
 394                 return -EINVAL;
 395         }
 396
 397         BUG_ON(addr & ~DMA_BIT_MASK(36));
 398         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 399                 IWL_ERR(priv, "Unaligned address = %llx\n",
 400                           (unsigned long long)addr);
 401
 402         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 403
 404         return 0;
 405 }
 406
 407 /*
 408  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 409  * given Tx queue, and enable the DMA channel used for that queue.
 410  *
 411  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 412  * channels supported in hardware.
 413  */
 414 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 415                          struct iwl_tx_queue *txq)
 416 {
 417         int txq_id = txq->q.id;
 418
 419         /* Circular buffer (TFD queue in DRAM) physical base address */
 420         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 421                              txq->q.dma_addr >> 8);
 422
 423         return 0;
 424 }
 425
 426 /******************************************************************************
 427  *
 428  * Generic RX handler implementations
 429  *
 430  ******************************************************************************/
 431 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 432                                 struct iwl_rx_mem_buffer *rxb)
 433 {
 434         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 435         struct iwl_alive_resp *palive;
 436         struct delayed_work *pwork;
 437
 438         palive = &pkt->u.alive_frame;
 439
 440         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 441                        "0x%01X 0x%01X\n",
 442                        palive->is_valid, palive->ver_type,
 443                        palive->ver_subtype);
 444
 445         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 446                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 447                 memcpy(&priv->card_alive_init,
 448                        &pkt->u.alive_frame,
 449                        sizeof(struct iwl_init_alive_resp));
 450                 pwork = &priv->init_alive_start;
 451         } else {
 452                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 453                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 454                        sizeof(struct iwl_alive_resp));
 455                 pwork = &priv->alive_start;
 456         }
 457
 458         /* We delay the ALIVE response by 5ms to
 459          * give the HW RF Kill time to activate... */
 460         if (palive->is_valid == UCODE_VALID_OK)
 461                 queue_delayed_work(priv->workqueue, pwork,
 462                                    msecs_to_jiffies(5));
 463         else
 464                 IWL_WARN(priv, "uCode did not respond OK.\n");
 465 }
 466
 467 static void iwl_bg_beacon_update(struct work_struct *work)
 468 {
 469         struct iwl_priv *priv =
 470                 container_of(work, struct iwl_priv, beacon_update);
 471         struct sk_buff *beacon;
 472
 473         mutex_lock(&priv->mutex);
 474         if (!priv->beacon_ctx) {
 475                 IWL_ERR(priv, "updating beacon w/o beacon context!\n");
 476                 goto out;
 477         }
 478
 479         if (priv->beacon_ctx->vif->type != NL80211_IFTYPE_AP) {
 480                 /*
 481                  * The ucode will send beacon notifications even in
 482                  * IBSS mode, but we don't want to process them. But
 483                  * we need to defer the type check to here due to
 484                  * requiring locking around the beacon_ctx access.
 485                  */
 486                 goto out;
 487         }
 488
 489         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 490         beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif);
 491         if (!beacon) {
 492                 IWL_ERR(priv, "update beacon failed -- keeping old\n");
 493                 goto out;
 494         }
 495
 496         /* new beacon skb is allocated every time; dispose previous.*/
 497         dev_kfree_skb(priv->beacon_skb);
 498
 499         priv->beacon_skb = beacon;
 500
 501         iwlagn_send_beacon_cmd(priv);
 502  out:
 503         mutex_unlock(&priv->mutex);
 504 }
 505
 506 static void iwl_bg_bt_runtime_config(struct work_struct *work)
 507 {
 508         struct iwl_priv *priv =
 509                 container_of(work, struct iwl_priv, bt_runtime_config);
 510
 511         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 512                 return;
 513
 514         /* dont send host command if rf-kill is on */
 515         if (!iwl_is_ready_rf(priv))
 516                 return;
 517         priv->cfg->ops->hcmd->send_bt_config(priv);
 518 }
 519
 520 static void iwl_bg_bt_full_concurrency(struct work_struct *work)
 521 {
 522         struct iwl_priv *priv =
 523                 container_of(work, struct iwl_priv, bt_full_concurrency);
 524         struct iwl_rxon_context *ctx;
 525
 526         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 527                 return;
 528
 529         /* dont send host command if rf-kill is on */
 530         if (!iwl_is_ready_rf(priv))
 531                 return;
 532
 533         IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
 534                        priv->bt_full_concurrent ?
 535                        "full concurrency" : "3-wire");
 536
 537         /*
 538          * LQ & RXON updated cmds must be sent before BT Config cmd
 539          * to avoid 3-wire collisions
 540          */
 541         mutex_lock(&priv->mutex);
 542         for_each_context(priv, ctx) {
 543                 if (priv->cfg->ops->hcmd->set_rxon_chain)
 544                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
 545                 iwlcore_commit_rxon(priv, ctx);
 546         }
 547         mutex_unlock(&priv->mutex);
 548
 549         priv->cfg->ops->hcmd->send_bt_config(priv);
 550 }
 551
 552 /**
 553  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 554  *
 555  * This callback is provided in order to send a statistics request.
 556  *
 557  * This timer function is continually reset to execute within
 558  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 559  * was received.  We need to ensure we receive the statistics in order
 560  * to update the temperature used for calibrating the TXPOWER.
 561  */
 562 static void iwl_bg_statistics_periodic(unsigned long data)
 563 {
 564         struct iwl_priv *priv = (struct iwl_priv *)data;
 565
 566         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 567                 return;
 568
 569         /* dont send host command if rf-kill is on */
 570         if (!iwl_is_ready_rf(priv))
 571                 return;
 572
 573         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 574 }
 575
 576
 577 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 578                                         u32 start_idx, u32 num_events,
 579                                         u32 mode)
 580 {
 581         u32 i;
 582         u32 ptr;        /* SRAM byte address of log data */
 583         u32 ev, time, data; /* event log data */
 584         unsigned long reg_flags;
 585
 586         if (mode == 0)
 587                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 588         else
 589                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 590
 591         /* Make sure device is powered up for SRAM reads */
 592         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 593         if (iwl_grab_nic_access(priv)) {
 594                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 595                 return;
 596         }
 597
 598         /* Set starting address; reads will auto-increment */
 599         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 600         rmb();
 601
 602         /*
 603          * "time" is actually "data" for mode 0 (no timestamp).
 604          * place event id # at far right for easier visual parsing.
 605          */
 606         for (i = 0; i < num_events; i++) {
 607                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 608                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 609                 if (mode == 0) {
 610                         trace_iwlwifi_dev_ucode_cont_event(priv,
 611                                                         0, time, ev);
 612                 } else {
 613                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 614                         trace_iwlwifi_dev_ucode_cont_event(priv,
 615                                                 time, data, ev);
 616                 }
 617         }
 618         /* Allow device to power down */
 619         iwl_release_nic_access(priv);
 620         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 621 }
 622
 623 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 624 {
 625         u32 capacity;   /* event log capacity in # entries */
 626         u32 base;       /* SRAM byte address of event log header */
 627         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 628         u32 num_wraps;  /* # times uCode wrapped to top of log */
 629         u32 next_entry; /* index of next entry to be written by uCode */
 630
 631         if (priv->ucode_type == UCODE_INIT)
 632                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 633         else
 634                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 635         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 636                 capacity = iwl_read_targ_mem(priv, base);
 637                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 638                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 639                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 640         } else
 641                 return;
 642
 643         if (num_wraps == priv->event_log.num_wraps) {
 644                 iwl_print_cont_event_trace(priv,
 645                                        base, priv->event_log.next_entry,
 646                                        next_entry - priv->event_log.next_entry,
 647                                        mode);
 648                 priv->event_log.non_wraps_count++;
 649         } else {
 650                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 651                         priv->event_log.wraps_more_count++;
 652                 else
 653                         priv->event_log.wraps_once_count++;
 654                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 655                                 num_wraps - priv->event_log.num_wraps,
 656                                 next_entry, priv->event_log.next_entry);
 657                 if (next_entry < priv->event_log.next_entry) {
 658                         iwl_print_cont_event_trace(priv, base,
 659                                priv->event_log.next_entry,
 660                                capacity - priv->event_log.next_entry,
 661                                mode);
 662
 663                         iwl_print_cont_event_trace(priv, base, 0,
 664                                 next_entry, mode);
 665                 } else {
 666                         iwl_print_cont_event_trace(priv, base,
 667                                next_entry, capacity - next_entry,
 668                                mode);
 669
 670                         iwl_print_cont_event_trace(priv, base, 0,
 671                                 next_entry, mode);
 672                 }
 673         }
 674         priv->event_log.num_wraps = num_wraps;
 675         priv->event_log.next_entry = next_entry;
 676 }
 677
 678 /**
 679  * iwl_bg_ucode_trace - Timer callback to log ucode event
 680  *
 681  * The timer is continually set to execute every
 682  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 683  * this function is to perform continuous uCode event logging operation
 684  * if enabled
 685  */
 686 static void iwl_bg_ucode_trace(unsigned long data)
 687 {
 688         struct iwl_priv *priv = (struct iwl_priv *)data;
 689
 690         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 691                 return;
 692
 693         if (priv->event_log.ucode_trace) {
 694                 iwl_continuous_event_trace(priv);
 695                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 696                 mod_timer(&priv->ucode_trace,
 697                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 698         }
 699 }
 700
 701 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 702                                 struct iwl_rx_mem_buffer *rxb)
 703 {
 704         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 705         struct iwl4965_beacon_notif *beacon =
 706                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 707 #ifdef CONFIG_IWLWIFI_DEBUG
 708         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 709
 710         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 711                 "tsf %d %d rate %d\n",
 712                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 713                 beacon->beacon_notify_hdr.failure_frame,
 714                 le32_to_cpu(beacon->ibss_mgr_status),
 715                 le32_to_cpu(beacon->high_tsf),
 716                 le32_to_cpu(beacon->low_tsf), rate);
 717 #endif
 718
 719         priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
 720
 721         if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
 722                 queue_work(priv->workqueue, &priv->beacon_update);
 723 }
 724
 725 /* Handle notification from uCode that card's power state is changing
 726  * due to software, hardware, or critical temperature RFKILL */
 727 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 728                                     struct iwl_rx_mem_buffer *rxb)
 729 {
 730         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 731         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 732         unsigned long status = priv->status;
 733
 734         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 735                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 736                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 737                           (flags & CT_CARD_DISABLED) ?
 738                           "Reached" : "Not reached");
 739
 740         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 741                      CT_CARD_DISABLED)) {
 742
 743                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 744                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 745
 746                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 747                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 748
 749                 if (!(flags & RXON_CARD_DISABLED)) {
 750                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 751                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 752                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 753                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 754                 }
 755                 if (flags & CT_CARD_DISABLED)
 756                         iwl_tt_enter_ct_kill(priv);
 757         }
 758         if (!(flags & CT_CARD_DISABLED))
 759                 iwl_tt_exit_ct_kill(priv);
 760
 761         if (flags & HW_CARD_DISABLED)
 762                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 763         else
 764                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 765
 766
 767         if (!(flags & RXON_CARD_DISABLED))
 768                 iwl_scan_cancel(priv);
 769
 770         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 771              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 772                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 773                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 774         else
 775                 wake_up_interruptible(&priv->wait_command_queue);
 776 }
 777
 778 static void iwl_bg_tx_flush(struct work_struct *work)
 779 {
 780         struct iwl_priv *priv =
 781                 container_of(work, struct iwl_priv, tx_flush);
 782
 783         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 784                 return;
 785
 786         /* do nothing if rf-kill is on */
 787         if (!iwl_is_ready_rf(priv))
 788                 return;
 789
 790         if (priv->cfg->ops->lib->txfifo_flush) {
 791                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
 792                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
 793         }
 794 }
 795
 796 /**
 797  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 798  *
 799  * Setup the RX handlers for each of the reply types sent from the uCode
 800  * to the host.
 801  *
 802  * This function chains into the hardware specific files for them to setup
 803  * any hardware specific handlers as well.
 804  */
 805 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 806 {
 807         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 808         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 809         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 810         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 811                         iwl_rx_spectrum_measure_notif;
 812         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 813         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 814             iwl_rx_pm_debug_statistics_notif;
 815         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 816
 817         /*
 818          * The same handler is used for both the REPLY to a discrete
 819          * statistics request from the host as well as for the periodic
 820          * statistics notifications (after received beacons) from the uCode.
 821          */
 822         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 823         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 824
 825         iwl_setup_rx_scan_handlers(priv);
 826
 827         /* status change handler */
 828         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 829
 830         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 831             iwl_rx_missed_beacon_notif;
 832         /* Rx handlers */
 833         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 834         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 835         /* block ack */
 836         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
 837         /* Set up hardware specific Rx handlers */
 838         priv->cfg->ops->lib->rx_handler_setup(priv);
 839 }
 840
 841 /**
 842  * iwl_rx_handle - Main entry function for receiving responses from uCode
 843  *
 844  * Uses the priv->rx_handlers callback function array to invoke
 845  * the appropriate handlers, including command responses,
 846  * frame-received notifications, and other notifications.
 847  */
 848 void iwl_rx_handle(struct iwl_priv *priv)
 849 {
 850         struct iwl_rx_mem_buffer *rxb;
 851         struct iwl_rx_packet *pkt;
 852         struct iwl_rx_queue *rxq = &priv->rxq;
 853         u32 r, i;
 854         int reclaim;
 855         unsigned long flags;
 856         u8 fill_rx = 0;
 857         u32 count = 8;
 858         int total_empty;
 859
 860         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 861          * buffer that the driver may process (last buffer filled by ucode). */
 862         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 863         i = rxq->read;
 864
 865         /* Rx interrupt, but nothing sent from uCode */
 866         if (i == r)
 867                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 868
 869         /* calculate total frames need to be restock after handling RX */
 870         total_empty = r - rxq->write_actual;
 871         if (total_empty < 0)
 872                 total_empty += RX_QUEUE_SIZE;
 873
 874         if (total_empty > (RX_QUEUE_SIZE / 2))
 875                 fill_rx = 1;
 876
 877         while (i != r) {
 878                 int len;
 879
 880                 rxb = rxq->queue[i];
 881
 882                 /* If an RXB doesn't have a Rx queue slot associated with it,
 883                  * then a bug has been introduced in the queue refilling
 884                  * routines -- catch it here */
 885                 BUG_ON(rxb == NULL);
 886
 887                 rxq->queue[i] = NULL;
 888
 889                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 890                                PAGE_SIZE << priv->hw_params.rx_page_order,
 891                                PCI_DMA_FROMDEVICE);
 892                 pkt = rxb_addr(rxb);
 893
 894                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 895                 len += sizeof(u32); /* account for status word */
 896                 trace_iwlwifi_dev_rx(priv, pkt, len);
 897
 898                 /* Reclaim a command buffer only if this packet is a response
 899                  *   to a (driver-originated) command.
 900                  * If the packet (e.g. Rx frame) originated from uCode,
 901                  *   there is no command buffer to reclaim.
 902                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 903                  *   but apparently a few don't get set; catch them here. */
 904                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 905                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 906                         (pkt->hdr.cmd != REPLY_RX) &&
 907                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 908                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 909                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 910                         (pkt->hdr.cmd != REPLY_TX);
 911
 912                 /* Based on type of command response or notification,
 913                  *   handle those that need handling via function in
 914                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 915                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 916                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 917                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 918                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 919                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 920                 } else {
 921                         /* No handling needed */
 922                         IWL_DEBUG_RX(priv,
 923                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 924                                 r, i, get_cmd_string(pkt->hdr.cmd),
 925                                 pkt->hdr.cmd);
 926                 }
 927
 928                 /*
 929                  * XXX: After here, we should always check rxb->page
 930                  * against NULL before touching it or its virtual
 931                  * memory (pkt). Because some rx_handler might have
 932                  * already taken or freed the pages.
 933                  */
 934
 935                 if (reclaim) {
 936                         /* Invoke any callbacks, transfer the buffer to caller,
 937                          * and fire off the (possibly) blocking iwl_send_cmd()
 938                          * as we reclaim the driver command queue */
 939                         if (rxb->page)
 940                                 iwl_tx_cmd_complete(priv, rxb);
 941                         else
 942                                 IWL_WARN(priv, "Claim null rxb?\n");
 943                 }
 944
 945                 /* Reuse the page if possible. For notification packets and
 946                  * SKBs that fail to Rx correctly, add them back into the
 947                  * rx_free list for reuse later. */
 948                 spin_lock_irqsave(&rxq->lock, flags);
 949                 if (rxb->page != NULL) {
 950                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
 951                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
 952                                 PCI_DMA_FROMDEVICE);
 953                         list_add_tail(&rxb->list, &rxq->rx_free);
 954                         rxq->free_count++;
 955                 } else
 956                         list_add_tail(&rxb->list, &rxq->rx_used);
 957
 958                 spin_unlock_irqrestore(&rxq->lock, flags);
 959
 960                 i = (i + 1) & RX_QUEUE_MASK;
 961                 /* If there are a lot of unused frames,
 962                  * restock the Rx queue so ucode wont assert. */
 963                 if (fill_rx) {
 964                         count++;
 965                         if (count >= 8) {
 966                                 rxq->read = i;
 967                                 iwlagn_rx_replenish_now(priv);
 968                                 count = 0;
 969                         }
 970                 }
 971         }
 972
 973         /* Backtrack one entry */
 974         rxq->read = i;
 975         if (fill_rx)
 976                 iwlagn_rx_replenish_now(priv);
 977         else
 978                 iwlagn_rx_queue_restock(priv);
 979 }
 980
 981 /* call this function to flush any scheduled tasklet */
 982 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
 983 {
 984         /* wait to make sure we flush pending tasklet*/
 985         synchronize_irq(priv->pci_dev->irq);
 986         tasklet_kill(&priv->irq_tasklet);
 987 }
 988
 989 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
 990 {
 991         u32 inta, handled = 0;
 992         u32 inta_fh;
 993         unsigned long flags;
 994         u32 i;
 995 #ifdef CONFIG_IWLWIFI_DEBUG
 996         u32 inta_mask;
 997 #endif
 998
 999         spin_lock_irqsave(&priv->lock, flags);
1000
1001         /* Ack/clear/reset pending uCode interrupts.
1002          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1003          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1004         inta = iwl_read32(priv, CSR_INT);
1005         iwl_write32(priv, CSR_INT, inta);
1006
1007         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1008          * Any new interrupts that happen after this, either while we're
1009          * in this tasklet, or later, will show up in next ISR/tasklet. */
1010         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1011         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1012
1013 #ifdef CONFIG_IWLWIFI_DEBUG
1014         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1015                 /* just for debug */
1016                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1017                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1018                               inta, inta_mask, inta_fh);
1019         }
1020 #endif
1021
1022         spin_unlock_irqrestore(&priv->lock, flags);
1023
1024         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1025          * atomic, make sure that inta covers all the interrupts that
1026          * we've discovered, even if FH interrupt came in just after
1027          * reading CSR_INT. */
1028         if (inta_fh & CSR49_FH_INT_RX_MASK)
1029                 inta |= CSR_INT_BIT_FH_RX;
1030         if (inta_fh & CSR49_FH_INT_TX_MASK)
1031                 inta |= CSR_INT_BIT_FH_TX;
1032
1033         /* Now service all interrupt bits discovered above. */
1034         if (inta & CSR_INT_BIT_HW_ERR) {
1035                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1036
1037                 /* Tell the device to stop sending interrupts */
1038                 iwl_disable_interrupts(priv);
1039
1040                 priv->isr_stats.hw++;
1041                 iwl_irq_handle_error(priv);
1042
1043                 handled |= CSR_INT_BIT_HW_ERR;
1044
1045                 return;
1046         }
1047
1048 #ifdef CONFIG_IWLWIFI_DEBUG
1049         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1050                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1051                 if (inta & CSR_INT_BIT_SCD) {
1052                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1053                                       "the frame/frames.\n");
1054                         priv->isr_stats.sch++;
1055                 }
1056
1057                 /* Alive notification via Rx interrupt will do the real work */
1058                 if (inta & CSR_INT_BIT_ALIVE) {
1059                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1060                         priv->isr_stats.alive++;
1061                 }
1062         }
1063 #endif
1064         /* Safely ignore these bits for debug checks below */
1065         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1066
1067         /* HW RF KILL switch toggled */
1068         if (inta & CSR_INT_BIT_RF_KILL) {
1069                 int hw_rf_kill = 0;
1070                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1071                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1072                         hw_rf_kill = 1;
1073
1074                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1075                                 hw_rf_kill ? "disable radio" : "enable radio");
1076
1077                 priv->isr_stats.rfkill++;
1078
1079                 /* driver only loads ucode once setting the interface up.
1080                  * the driver allows loading the ucode even if the radio
1081                  * is killed. Hence update the killswitch state here. The
1082                  * rfkill handler will care about restarting if needed.
1083                  */
1084                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1085                         if (hw_rf_kill)
1086                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1087                         else
1088                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1089                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1090                 }
1091
1092                 handled |= CSR_INT_BIT_RF_KILL;
1093         }
1094
1095         /* Chip got too hot and stopped itself */
1096         if (inta & CSR_INT_BIT_CT_KILL) {
1097                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1098                 priv->isr_stats.ctkill++;
1099                 handled |= CSR_INT_BIT_CT_KILL;
1100         }
1101
1102         /* Error detected by uCode */
1103         if (inta & CSR_INT_BIT_SW_ERR) {
1104                 IWL_ERR(priv, "Microcode SW error detected. "
1105                         " Restarting 0x%X.\n", inta);
1106                 priv->isr_stats.sw++;
1107                 iwl_irq_handle_error(priv);
1108                 handled |= CSR_INT_BIT_SW_ERR;
1109         }
1110
1111         /*
1112          * uCode wakes up after power-down sleep.
1113          * Tell device about any new tx or host commands enqueued,
1114          * and about any Rx buffers made available while asleep.
1115          */
1116         if (inta & CSR_INT_BIT_WAKEUP) {
1117                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1118                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1119                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1120                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1121                 priv->isr_stats.wakeup++;
1122                 handled |= CSR_INT_BIT_WAKEUP;
1123         }
1124
1125         /* All uCode command responses, including Tx command responses,
1126          * Rx "responses" (frame-received notification), and other
1127          * notifications from uCode come through here*/
1128         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1129                 iwl_rx_handle(priv);
1130                 priv->isr_stats.rx++;
1131                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1132         }
1133
1134         /* This "Tx" DMA channel is used only for loading uCode */
1135         if (inta & CSR_INT_BIT_FH_TX) {
1136                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1137                 priv->isr_stats.tx++;
1138                 handled |= CSR_INT_BIT_FH_TX;
1139                 /* Wake up uCode load routine, now that load is complete */
1140                 priv->ucode_write_complete = 1;
1141                 wake_up_interruptible(&priv->wait_command_queue);
1142         }
1143
1144         if (inta & ~handled) {
1145                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1146                 priv->isr_stats.unhandled++;
1147         }
1148
1149         if (inta & ~(priv->inta_mask)) {
1150                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1151                          inta & ~priv->inta_mask);
1152                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1153         }
1154
1155         /* Re-enable all interrupts */
1156         /* only Re-enable if diabled by irq */
1157         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1158                 iwl_enable_interrupts(priv);
1159
1160 #ifdef CONFIG_IWLWIFI_DEBUG
1161         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1162                 inta = iwl_read32(priv, CSR_INT);
1163                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1164                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1165                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1166                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1167         }
1168 #endif
1169 }
1170
1171 /* tasklet for iwlagn interrupt */
1172 static void iwl_irq_tasklet(struct iwl_priv *priv)
1173 {
1174         u32 inta = 0;
1175         u32 handled = 0;
1176         unsigned long flags;
1177         u32 i;
1178 #ifdef CONFIG_IWLWIFI_DEBUG
1179         u32 inta_mask;
1180 #endif
1181
1182         spin_lock_irqsave(&priv->lock, flags);
1183
1184         /* Ack/clear/reset pending uCode interrupts.
1185          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1186          */
1187         /* There is a hardware bug in the interrupt mask function that some
1188          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1189          * they are disabled in the CSR_INT_MASK register. Furthermore the
1190          * ICT interrupt handling mechanism has another bug that might cause
1191          * these unmasked interrupts fail to be detected. We workaround the
1192          * hardware bugs here by ACKing all the possible interrupts so that
1193          * interrupt coalescing can still be achieved.
1194          */
1195         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1196
1197         inta = priv->_agn.inta;
1198
1199 #ifdef CONFIG_IWLWIFI_DEBUG
1200         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1201                 /* just for debug */
1202                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1203                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1204                                 inta, inta_mask);
1205         }
1206 #endif
1207
1208         spin_unlock_irqrestore(&priv->lock, flags);
1209
1210         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1211         priv->_agn.inta = 0;
1212
1213         /* Now service all interrupt bits discovered above. */
1214         if (inta & CSR_INT_BIT_HW_ERR) {
1215                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1216
1217                 /* Tell the device to stop sending interrupts */
1218                 iwl_disable_interrupts(priv);
1219
1220                 priv->isr_stats.hw++;
1221                 iwl_irq_handle_error(priv);
1222
1223                 handled |= CSR_INT_BIT_HW_ERR;
1224
1225                 return;
1226         }
1227
1228 #ifdef CONFIG_IWLWIFI_DEBUG
1229         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1230                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1231                 if (inta & CSR_INT_BIT_SCD) {
1232                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1233                                       "the frame/frames.\n");
1234                         priv->isr_stats.sch++;
1235                 }
1236
1237                 /* Alive notification via Rx interrupt will do the real work */
1238                 if (inta & CSR_INT_BIT_ALIVE) {
1239                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1240                         priv->isr_stats.alive++;
1241                 }
1242         }
1243 #endif
1244         /* Safely ignore these bits for debug checks below */
1245         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1246
1247         /* HW RF KILL switch toggled */
1248         if (inta & CSR_INT_BIT_RF_KILL) {
1249                 int hw_rf_kill = 0;
1250                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1251                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1252                         hw_rf_kill = 1;
1253
1254                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1255                                 hw_rf_kill ? "disable radio" : "enable radio");
1256
1257                 priv->isr_stats.rfkill++;
1258
1259                 /* driver only loads ucode once setting the interface up.
1260                  * the driver allows loading the ucode even if the radio
1261                  * is killed. Hence update the killswitch state here. The
1262                  * rfkill handler will care about restarting if needed.
1263                  */
1264                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1265                         if (hw_rf_kill)
1266                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1267                         else
1268                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1269                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1270                 }
1271
1272                 handled |= CSR_INT_BIT_RF_KILL;
1273         }
1274
1275         /* Chip got too hot and stopped itself */
1276         if (inta & CSR_INT_BIT_CT_KILL) {
1277                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1278                 priv->isr_stats.ctkill++;
1279                 handled |= CSR_INT_BIT_CT_KILL;
1280         }
1281
1282         /* Error detected by uCode */
1283         if (inta & CSR_INT_BIT_SW_ERR) {
1284                 IWL_ERR(priv, "Microcode SW error detected. "
1285                         " Restarting 0x%X.\n", inta);
1286                 priv->isr_stats.sw++;
1287                 iwl_irq_handle_error(priv);
1288                 handled |= CSR_INT_BIT_SW_ERR;
1289         }
1290
1291         /* uCode wakes up after power-down sleep */
1292         if (inta & CSR_INT_BIT_WAKEUP) {
1293                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1294                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1295                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1296                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1297
1298                 priv->isr_stats.wakeup++;
1299
1300                 handled |= CSR_INT_BIT_WAKEUP;
1301         }
1302
1303         /* All uCode command responses, including Tx command responses,
1304          * Rx "responses" (frame-received notification), and other
1305          * notifications from uCode come through here*/
1306         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1307                         CSR_INT_BIT_RX_PERIODIC)) {
1308                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1309                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1310                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1311                         iwl_write32(priv, CSR_FH_INT_STATUS,
1312                                         CSR49_FH_INT_RX_MASK);
1313                 }
1314                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1315                         handled |= CSR_INT_BIT_RX_PERIODIC;
1316                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1317                 }
1318                 /* Sending RX interrupt require many steps to be done in the
1319                  * the device:
1320                  * 1- write interrupt to current index in ICT table.
1321                  * 2- dma RX frame.
1322                  * 3- update RX shared data to indicate last write index.
1323                  * 4- send interrupt.
1324                  * This could lead to RX race, driver could receive RX interrupt
1325                  * but the shared data changes does not reflect this;
1326                  * periodic interrupt will detect any dangling Rx activity.
1327                  */
1328
1329                 /* Disable periodic interrupt; we use it as just a one-shot. */
1330                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1331                             CSR_INT_PERIODIC_DIS);
1332                 iwl_rx_handle(priv);
1333
1334                 /*
1335                  * Enable periodic interrupt in 8 msec only if we received
1336                  * real RX interrupt (instead of just periodic int), to catch
1337                  * any dangling Rx interrupt.  If it was just the periodic
1338                  * interrupt, there was no dangling Rx activity, and no need
1339                  * to extend the periodic interrupt; one-shot is enough.
1340                  */
1341                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1342                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1343                                     CSR_INT_PERIODIC_ENA);
1344
1345                 priv->isr_stats.rx++;
1346         }
1347
1348         /* This "Tx" DMA channel is used only for loading uCode */
1349         if (inta & CSR_INT_BIT_FH_TX) {
1350                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1351                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1352                 priv->isr_stats.tx++;
1353                 handled |= CSR_INT_BIT_FH_TX;
1354                 /* Wake up uCode load routine, now that load is complete */
1355                 priv->ucode_write_complete = 1;
1356                 wake_up_interruptible(&priv->wait_command_queue);
1357         }
1358
1359         if (inta & ~handled) {
1360                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1361                 priv->isr_stats.unhandled++;
1362         }
1363
1364         if (inta & ~(priv->inta_mask)) {
1365                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1366                          inta & ~priv->inta_mask);
1367         }
1368
1369         /* Re-enable all interrupts */
1370         /* only Re-enable if diabled by irq */
1371         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1372                 iwl_enable_interrupts(priv);
1373 }
1374
1375 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1376 #define ACK_CNT_RATIO (50)
1377 #define BA_TIMEOUT_CNT (5)
1378 #define BA_TIMEOUT_MAX (16)
1379
1380 /**
1381  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1382  *
1383  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1384  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1385  * operation state.
1386  */
1387 bool iwl_good_ack_health(struct iwl_priv *priv,
1388                                 struct iwl_rx_packet *pkt)
1389 {
1390         bool rc = true;
1391         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1392         int ba_timeout_delta;
1393
1394         actual_ack_cnt_delta =
1395                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1396                 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1397         expected_ack_cnt_delta =
1398                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1399                 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1400         ba_timeout_delta =
1401                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1402                 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1403         if ((priv->_agn.agg_tids_count > 0) &&
1404             (expected_ack_cnt_delta > 0) &&
1405             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1406                 < ACK_CNT_RATIO) &&
1407             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1408                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1409                                 " expected_ack_cnt = %d\n",
1410                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1411
1412 #ifdef CONFIG_IWLWIFI_DEBUGFS
1413                 /*
1414                  * This is ifdef'ed on DEBUGFS because otherwise the
1415                  * statistics aren't available. If DEBUGFS is set but
1416                  * DEBUG is not, these will just compile out.
1417                  */
1418                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1419                                 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1420                 IWL_DEBUG_RADIO(priv,
1421                                 "ack_or_ba_timeout_collision delta = %d\n",
1422                                 priv->_agn.delta_statistics.tx.
1423                                 ack_or_ba_timeout_collision);
1424 #endif
1425                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1426                                 ba_timeout_delta);
1427                 if (!actual_ack_cnt_delta &&
1428                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1429                         rc = false;
1430         }
1431         return rc;
1432 }
1433
1434
1435 /*****************************************************************************
1436  *
1437  * sysfs attributes
1438  *
1439  *****************************************************************************/
1440
1441 #ifdef CONFIG_IWLWIFI_DEBUG
1442
1443 /*
1444  * The following adds a new attribute to the sysfs representation
1445  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1446  * used for controlling the debug level.
1447  *
1448  * See the level definitions in iwl for details.
1449  *
1450  * The debug_level being managed using sysfs below is a per device debug
1451  * level that is used instead of the global debug level if it (the per
1452  * device debug level) is set.
1453  */
1454 static ssize_t show_debug_level(struct device *d,
1455                                 struct device_attribute *attr, char *buf)
1456 {
1457         struct iwl_priv *priv = dev_get_drvdata(d);
1458         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1459 }
1460 static ssize_t store_debug_level(struct device *d,
1461                                 struct device_attribute *attr,
1462                                  const char *buf, size_t count)
1463 {
1464         struct iwl_priv *priv = dev_get_drvdata(d);
1465         unsigned long val;
1466         int ret;
1467
1468         ret = strict_strtoul(buf, 0, &val);
1469         if (ret)
1470                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1471         else {
1472                 priv->debug_level = val;
1473                 if (iwl_alloc_traffic_mem(priv))
1474                         IWL_ERR(priv,
1475                                 "Not enough memory to generate traffic log\n");
1476         }
1477         return strnlen(buf, count);
1478 }
1479
1480 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1481                         show_debug_level, store_debug_level);
1482
1483
1484 #endif /* CONFIG_IWLWIFI_DEBUG */
1485
1486
1487 static ssize_t show_temperature(struct device *d,
1488                                 struct device_attribute *attr, char *buf)
1489 {
1490         struct iwl_priv *priv = dev_get_drvdata(d);
1491
1492         if (!iwl_is_alive(priv))
1493                 return -EAGAIN;
1494
1495         return sprintf(buf, "%d\n", priv->temperature);
1496 }
1497
1498 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1499
1500 static ssize_t show_tx_power(struct device *d,
1501                              struct device_attribute *attr, char *buf)
1502 {
1503         struct iwl_priv *priv = dev_get_drvdata(d);
1504
1505         if (!iwl_is_ready_rf(priv))
1506                 return sprintf(buf, "off\n");
1507         else
1508                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1509 }
1510
1511 static ssize_t store_tx_power(struct device *d,
1512                               struct device_attribute *attr,
1513                               const char *buf, size_t count)
1514 {
1515         struct iwl_priv *priv = dev_get_drvdata(d);
1516         unsigned long val;
1517         int ret;
1518
1519         ret = strict_strtoul(buf, 10, &val);
1520         if (ret)
1521                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1522         else {
1523                 ret = iwl_set_tx_power(priv, val, false);
1524                 if (ret)
1525                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1526                                 ret);
1527                 else
1528                         ret = count;
1529         }
1530         return ret;
1531 }
1532
1533 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1534
1535 static struct attribute *iwl_sysfs_entries[] = {
1536         &dev_attr_temperature.attr,
1537         &dev_attr_tx_power.attr,
1538 #ifdef CONFIG_IWLWIFI_DEBUG
1539         &dev_attr_debug_level.attr,
1540 #endif
1541         NULL
1542 };
1543
1544 static struct attribute_group iwl_attribute_group = {
1545         .name = NULL,           /* put in device directory */
1546         .attrs = iwl_sysfs_entries,
1547 };
1548
1549 /******************************************************************************
1550  *
1551  * uCode download functions
1552  *
1553  ******************************************************************************/
1554
1555 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1556 {
1557         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1558         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1559         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1560         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1561         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1562         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1563 }
1564
1565 static void iwl_nic_start(struct iwl_priv *priv)
1566 {
1567         /* Remove all resets to allow NIC to operate */
1568         iwl_write32(priv, CSR_RESET, 0);
1569 }
1570
1571 struct iwlagn_ucode_capabilities {
1572         u32 max_probe_length;
1573         u32 standard_phy_calibration_size;
1574         bool pan;
1575 };
1576
1577 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1578 static int iwl_mac_setup_register(struct iwl_priv *priv,
1579                                   struct iwlagn_ucode_capabilities *capa);
1580
1581 #define UCODE_EXPERIMENTAL_INDEX        100
1582 #define UCODE_EXPERIMENTAL_TAG          "exp"
1583
1584 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1585 {
1586         const char *name_pre = priv->cfg->fw_name_pre;
1587         char tag[8];
1588
1589         if (first) {
1590 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1591                 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1592                 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1593         } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1594 #endif
1595                 priv->fw_index = priv->cfg->ucode_api_max;
1596                 sprintf(tag, "%d", priv->fw_index);
1597         } else {
1598                 priv->fw_index--;
1599                 sprintf(tag, "%d", priv->fw_index);
1600         }
1601
1602         if (priv->fw_index < priv->cfg->ucode_api_min) {
1603                 IWL_ERR(priv, "no suitable firmware found!\n");
1604                 return -ENOENT;
1605         }
1606
1607         sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1608
1609         IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1610                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1611                                 ? "EXPERIMENTAL " : "",
1612                        priv->firmware_name);
1613
1614         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1615                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1616                                        iwl_ucode_callback);
1617 }
1618
1619 struct iwlagn_firmware_pieces {
1620         const void *inst, *data, *init, *init_data, *boot;
1621         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1622
1623         u32 build;
1624
1625         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1626         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1627 };
1628
1629 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1630                                        const struct firmware *ucode_raw,
1631                                        struct iwlagn_firmware_pieces *pieces)
1632 {
1633         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1634         u32 api_ver, hdr_size;
1635         const u8 *src;
1636
1637         priv->ucode_ver = le32_to_cpu(ucode->ver);
1638         api_ver = IWL_UCODE_API(priv->ucode_ver);
1639
1640         switch (api_ver) {
1641         default:
1642                 /*
1643                  * 4965 doesn't revision the firmware file format
1644                  * along with the API version, it always uses v1
1645                  * file format.
1646                  */
1647                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1648                                 CSR_HW_REV_TYPE_4965) {
1649                         hdr_size = 28;
1650                         if (ucode_raw->size < hdr_size) {
1651                                 IWL_ERR(priv, "File size too small!\n");
1652                                 return -EINVAL;
1653                         }
1654                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1655                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1656                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1657                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1658                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1659                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1660                         src = ucode->u.v2.data;
1661                         break;
1662                 }
1663                 /* fall through for 4965 */
1664         case 0:
1665         case 1:
1666         case 2:
1667                 hdr_size = 24;
1668                 if (ucode_raw->size < hdr_size) {
1669                         IWL_ERR(priv, "File size too small!\n");
1670                         return -EINVAL;
1671                 }
1672                 pieces->build = 0;
1673                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1674                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1675                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1676                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1677                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1678                 src = ucode->u.v1.data;
1679                 break;
1680         }
1681
1682         /* Verify size of file vs. image size info in file's header */
1683         if (ucode_raw->size != hdr_size + pieces->inst_size +
1684                                 pieces->data_size + pieces->init_size +
1685                                 pieces->init_data_size + pieces->boot_size) {
1686
1687                 IWL_ERR(priv,
1688                         "uCode file size %d does not match expected size\n",
1689                         (int)ucode_raw->size);
1690                 return -EINVAL;
1691         }
1692
1693         pieces->inst = src;
1694         src += pieces->inst_size;
1695         pieces->data = src;
1696         src += pieces->data_size;
1697         pieces->init = src;
1698         src += pieces->init_size;
1699         pieces->init_data = src;
1700         src += pieces->init_data_size;
1701         pieces->boot = src;
1702         src += pieces->boot_size;
1703
1704         return 0;
1705 }
1706
1707 static int iwlagn_wanted_ucode_alternative = 1;
1708
1709 static int iwlagn_load_firmware(struct iwl_priv *priv,
1710                                 const struct firmware *ucode_raw,
1711                                 struct iwlagn_firmware_pieces *pieces,
1712                                 struct iwlagn_ucode_capabilities *capa)
1713 {
1714         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1715         struct iwl_ucode_tlv *tlv;
1716         size_t len = ucode_raw->size;
1717         const u8 *data;
1718         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1719         u64 alternatives;
1720         u32 tlv_len;
1721         enum iwl_ucode_tlv_type tlv_type;
1722         const u8 *tlv_data;
1723
1724         if (len < sizeof(*ucode)) {
1725                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1726                 return -EINVAL;
1727         }
1728
1729         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1730                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1731                         le32_to_cpu(ucode->magic));
1732                 return -EINVAL;
1733         }
1734
1735         /*
1736          * Check which alternatives are present, and "downgrade"
1737          * when the chosen alternative is not present, warning
1738          * the user when that happens. Some files may not have
1739          * any alternatives, so don't warn in that case.
1740          */
1741         alternatives = le64_to_cpu(ucode->alternatives);
1742         tmp = wanted_alternative;
1743         if (wanted_alternative > 63)
1744                 wanted_alternative = 63;
1745         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1746                 wanted_alternative--;
1747         if (wanted_alternative && wanted_alternative != tmp)
1748                 IWL_WARN(priv,
1749                          "uCode alternative %d not available, choosing %d\n",
1750                          tmp, wanted_alternative);
1751
1752         priv->ucode_ver = le32_to_cpu(ucode->ver);
1753         pieces->build = le32_to_cpu(ucode->build);
1754         data = ucode->data;
1755
1756         len -= sizeof(*ucode);
1757
1758         while (len >= sizeof(*tlv)) {
1759                 u16 tlv_alt;
1760
1761                 len -= sizeof(*tlv);
1762                 tlv = (void *)data;
1763
1764                 tlv_len = le32_to_cpu(tlv->length);
1765                 tlv_type = le16_to_cpu(tlv->type);
1766                 tlv_alt = le16_to_cpu(tlv->alternative);
1767                 tlv_data = tlv->data;
1768
1769                 if (len < tlv_len) {
1770                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1771                                 len, tlv_len);
1772                         return -EINVAL;
1773                 }
1774                 len -= ALIGN(tlv_len, 4);
1775                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1776
1777                 /*
1778                  * Alternative 0 is always valid.
1779                  *
1780                  * Skip alternative TLVs that are not selected.
1781                  */
1782                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1783                         continue;
1784
1785                 switch (tlv_type) {
1786                 case IWL_UCODE_TLV_INST:
1787                         pieces->inst = tlv_data;
1788                         pieces->inst_size = tlv_len;
1789                         break;
1790                 case IWL_UCODE_TLV_DATA:
1791                         pieces->data = tlv_data;
1792                         pieces->data_size = tlv_len;
1793                         break;
1794                 case IWL_UCODE_TLV_INIT:
1795                         pieces->init = tlv_data;
1796                         pieces->init_size = tlv_len;
1797                         break;
1798                 case IWL_UCODE_TLV_INIT_DATA:
1799                         pieces->init_data = tlv_data;
1800                         pieces->init_data_size = tlv_len;
1801                         break;
1802                 case IWL_UCODE_TLV_BOOT:
1803                         pieces->boot = tlv_data;
1804                         pieces->boot_size = tlv_len;
1805                         break;
1806                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1807                         if (tlv_len != sizeof(u32))
1808                                 goto invalid_tlv_len;
1809                         capa->max_probe_length =
1810                                         le32_to_cpup((__le32 *)tlv_data);
1811                         break;
1812                 case IWL_UCODE_TLV_PAN:
1813                         if (tlv_len)
1814                                 goto invalid_tlv_len;
1815                         capa->pan = true;
1816                         break;
1817                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1818                         if (tlv_len != sizeof(u32))
1819                                 goto invalid_tlv_len;
1820                         pieces->init_evtlog_ptr =
1821                                         le32_to_cpup((__le32 *)tlv_data);
1822                         break;
1823                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1824                         if (tlv_len != sizeof(u32))
1825                                 goto invalid_tlv_len;
1826                         pieces->init_evtlog_size =
1827                                         le32_to_cpup((__le32 *)tlv_data);
1828                         break;
1829                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1830                         if (tlv_len != sizeof(u32))
1831                                 goto invalid_tlv_len;
1832                         pieces->init_errlog_ptr =
1833                                         le32_to_cpup((__le32 *)tlv_data);
1834                         break;
1835                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1836                         if (tlv_len != sizeof(u32))
1837                                 goto invalid_tlv_len;
1838                         pieces->inst_evtlog_ptr =
1839                                         le32_to_cpup((__le32 *)tlv_data);
1840                         break;
1841                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1842                         if (tlv_len != sizeof(u32))
1843                                 goto invalid_tlv_len;
1844                         pieces->inst_evtlog_size =
1845                                         le32_to_cpup((__le32 *)tlv_data);
1846                         break;
1847                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1848                         if (tlv_len != sizeof(u32))
1849                                 goto invalid_tlv_len;
1850                         pieces->inst_errlog_ptr =
1851                                         le32_to_cpup((__le32 *)tlv_data);
1852                         break;
1853                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1854                         if (tlv_len)
1855                                 goto invalid_tlv_len;
1856                         priv->enhance_sensitivity_table = true;
1857                         break;
1858                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1859                         if (tlv_len != sizeof(u32))
1860                                 goto invalid_tlv_len;
1861                         capa->standard_phy_calibration_size =
1862                                         le32_to_cpup((__le32 *)tlv_data);
1863                         break;
1864                 default:
1865                         IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
1866                         break;
1867                 }
1868         }
1869
1870         if (len) {
1871                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1872                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1873                 return -EINVAL;
1874         }
1875
1876         return 0;
1877
1878  invalid_tlv_len:
1879         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
1880         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
1881
1882         return -EINVAL;
1883 }
1884
1885 /**
1886  * iwl_ucode_callback - callback when firmware was loaded
1887  *
1888  * If loaded successfully, copies the firmware into buffers
1889  * for the card to fetch (via DMA).
1890  */
1891 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1892 {
1893         struct iwl_priv *priv = context;
1894         struct iwl_ucode_header *ucode;
1895         int err;
1896         struct iwlagn_firmware_pieces pieces;
1897         const unsigned int api_max = priv->cfg->ucode_api_max;
1898         const unsigned int api_min = priv->cfg->ucode_api_min;
1899         u32 api_ver;
1900         char buildstr[25];
1901         u32 build;
1902         struct iwlagn_ucode_capabilities ucode_capa = {
1903                 .max_probe_length = 200,
1904                 .standard_phy_calibration_size =
1905                         IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE,
1906         };
1907
1908         memset(&pieces, 0, sizeof(pieces));
1909
1910         if (!ucode_raw) {
1911                 if (priv->fw_index <= priv->cfg->ucode_api_max)
1912                         IWL_ERR(priv,
1913                                 "request for firmware file '%s' failed.\n",
1914                                 priv->firmware_name);
1915                 goto try_again;
1916         }
1917
1918         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1919                        priv->firmware_name, ucode_raw->size);
1920
1921         /* Make sure that we got at least the API version number */
1922         if (ucode_raw->size < 4) {
1923                 IWL_ERR(priv, "File size way too small!\n");
1924                 goto try_again;
1925         }
1926
1927         /* Data from ucode file:  header followed by uCode images */
1928         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1929
1930         if (ucode->ver)
1931                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
1932         else
1933                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
1934                                            &ucode_capa);
1935
1936         if (err)
1937                 goto try_again;
1938
1939         api_ver = IWL_UCODE_API(priv->ucode_ver);
1940         build = pieces.build;
1941
1942         /*
1943          * api_ver should match the api version forming part of the
1944          * firmware filename ... but we don't check for that and only rely
1945          * on the API version read from firmware header from here on forward
1946          */
1947         /* no api version check required for experimental uCode */
1948         if (priv->fw_index != UCODE_EXPERIMENTAL_INDEX) {
1949                 if (api_ver < api_min || api_ver > api_max) {
1950                         IWL_ERR(priv,
1951                                 "Driver unable to support your firmware API. "
1952                                 "Driver supports v%u, firmware is v%u.\n",
1953                                 api_max, api_ver);
1954                         goto try_again;
1955                 }
1956
1957                 if (api_ver != api_max)
1958                         IWL_ERR(priv,
1959                                 "Firmware has old API version. Expected v%u, "
1960                                 "got v%u. New firmware can be obtained "
1961                                 "from http://www.intellinuxwireless.org.\n",
1962                                 api_max, api_ver);
1963         }
1964
1965         if (build)
1966                 sprintf(buildstr, " build %u%s", build,
1967                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1968                                 ? " (EXP)" : "");
1969         else
1970                 buildstr[0] = '\0';
1971
1972         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
1973                  IWL_UCODE_MAJOR(priv->ucode_ver),
1974                  IWL_UCODE_MINOR(priv->ucode_ver),
1975                  IWL_UCODE_API(priv->ucode_ver),
1976                  IWL_UCODE_SERIAL(priv->ucode_ver),
1977                  buildstr);
1978
1979         snprintf(priv->hw->wiphy->fw_version,
1980                  sizeof(priv->hw->wiphy->fw_version),
1981                  "%u.%u.%u.%u%s",
1982                  IWL_UCODE_MAJOR(priv->ucode_ver),
1983                  IWL_UCODE_MINOR(priv->ucode_ver),
1984                  IWL_UCODE_API(priv->ucode_ver),
1985                  IWL_UCODE_SERIAL(priv->ucode_ver),
1986                  buildstr);
1987
1988         /*
1989          * For any of the failures below (before allocating pci memory)
1990          * we will try to load a version with a smaller API -- maybe the
1991          * user just got a corrupted version of the latest API.
1992          */
1993
1994         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1995                        priv->ucode_ver);
1996         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
1997                        pieces.inst_size);
1998         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
1999                        pieces.data_size);
2000         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
2001                        pieces.init_size);
2002         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
2003                        pieces.init_data_size);
2004         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
2005                        pieces.boot_size);
2006
2007         /* Verify that uCode images will fit in card's SRAM */
2008         if (pieces.inst_size > priv->hw_params.max_inst_size) {
2009                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
2010                         pieces.inst_size);
2011                 goto try_again;
2012         }
2013
2014         if (pieces.data_size > priv->hw_params.max_data_size) {
2015                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
2016                         pieces.data_size);
2017                 goto try_again;
2018         }
2019
2020         if (pieces.init_size > priv->hw_params.max_inst_size) {
2021                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
2022                         pieces.init_size);
2023                 goto try_again;
2024         }
2025
2026         if (pieces.init_data_size > priv->hw_params.max_data_size) {
2027                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
2028                         pieces.init_data_size);
2029                 goto try_again;
2030         }
2031
2032         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
2033                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
2034                         pieces.boot_size);
2035                 goto try_again;
2036         }
2037
2038         /* Allocate ucode buffers for card's bus-master loading ... */
2039
2040         /* Runtime instructions and 2 copies of data:
2041          * 1) unmodified from disk
2042          * 2) backup cache for save/restore during power-downs */
2043         priv->ucode_code.len = pieces.inst_size;
2044         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2045
2046         priv->ucode_data.len = pieces.data_size;
2047         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2048
2049         priv->ucode_data_backup.len = pieces.data_size;
2050         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2051
2052         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2053             !priv->ucode_data_backup.v_addr)
2054                 goto err_pci_alloc;
2055
2056         /* Initialization instructions and data */
2057         if (pieces.init_size && pieces.init_data_size) {
2058                 priv->ucode_init.len = pieces.init_size;
2059                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2060
2061                 priv->ucode_init_data.len = pieces.init_data_size;
2062                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2063
2064                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2065                         goto err_pci_alloc;
2066         }
2067
2068         /* Bootstrap (instructions only, no data) */
2069         if (pieces.boot_size) {
2070                 priv->ucode_boot.len = pieces.boot_size;
2071                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2072
2073                 if (!priv->ucode_boot.v_addr)
2074                         goto err_pci_alloc;
2075         }
2076
2077         /* Now that we can no longer fail, copy information */
2078
2079         /*
2080          * The (size - 16) / 12 formula is based on the information recorded
2081          * for each event, which is of mode 1 (including timestamp) for all
2082          * new microcodes that include this information.
2083          */
2084         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
2085         if (pieces.init_evtlog_size)
2086                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
2087         else
2088                 priv->_agn.init_evtlog_size =
2089                         priv->cfg->base_params->max_event_log_size;
2090         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
2091         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
2092         if (pieces.inst_evtlog_size)
2093                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
2094         else
2095                 priv->_agn.inst_evtlog_size =
2096                         priv->cfg->base_params->max_event_log_size;
2097         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
2098
2099         if (ucode_capa.pan) {
2100                 priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN);
2101                 priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN;
2102         } else
2103                 priv->sta_key_max_num = STA_KEY_MAX_NUM;
2104
2105         /* Copy images into buffers for card's bus-master reads ... */
2106
2107         /* Runtime instructions (first block of data in file) */
2108         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
2109                         pieces.inst_size);
2110         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
2111
2112         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2113                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2114
2115         /*
2116          * Runtime data
2117          * NOTE:  Copy into backup buffer will be done in iwl_up()
2118          */
2119         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2120                         pieces.data_size);
2121         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2122         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2123
2124         /* Initialization instructions */
2125         if (pieces.init_size) {
2126                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2127                                 pieces.init_size);
2128                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2129         }
2130
2131         /* Initialization data */
2132         if (pieces.init_data_size) {
2133                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2134                                pieces.init_data_size);
2135                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2136                        pieces.init_data_size);
2137         }
2138
2139         /* Bootstrap instructions */
2140         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2141                         pieces.boot_size);
2142         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2143
2144         /*
2145          * figure out the offset of chain noise reset and gain commands
2146          * base on the size of standard phy calibration commands table size
2147          */
2148         if (ucode_capa.standard_phy_calibration_size >
2149             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
2150                 ucode_capa.standard_phy_calibration_size =
2151                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
2152
2153         priv->_agn.phy_calib_chain_noise_reset_cmd =
2154                 ucode_capa.standard_phy_calibration_size;
2155         priv->_agn.phy_calib_chain_noise_gain_cmd =
2156                 ucode_capa.standard_phy_calibration_size + 1;
2157
2158         /**************************************************
2159          * This is still part of probe() in a sense...
2160          *
2161          * 9. Setup and register with mac80211 and debugfs
2162          **************************************************/
2163         err = iwl_mac_setup_register(priv, &ucode_capa);
2164         if (err)
2165                 goto out_unbind;
2166
2167         err = iwl_dbgfs_register(priv, DRV_NAME);
2168         if (err)
2169                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2170
2171         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
2172                                         &iwl_attribute_group);
2173         if (err) {
2174                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2175                 goto out_unbind;
2176         }
2177
2178         /* We have our copies now, allow OS release its copies */
2179         release_firmware(ucode_raw);
2180         complete(&priv->_agn.firmware_loading_complete);
2181         return;
2182
2183  try_again:
2184         /* try next, if any */
2185         if (iwl_request_firmware(priv, false))
2186                 goto out_unbind;
2187         release_firmware(ucode_raw);
2188         return;
2189
2190  err_pci_alloc:
2191         IWL_ERR(priv, "failed to allocate pci memory\n");
2192         iwl_dealloc_ucode_pci(priv);
2193  out_unbind:
2194         complete(&priv->_agn.firmware_loading_complete);
2195         device_release_driver(&priv->pci_dev->dev);
2196         release_firmware(ucode_raw);
2197 }
2198
2199 static const char *desc_lookup_text[] = {
2200         "OK",
2201         "FAIL",
2202         "BAD_PARAM",
2203         "BAD_CHECKSUM",
2204         "NMI_INTERRUPT_WDG",
2205         "SYSASSERT",
2206         "FATAL_ERROR",
2207         "BAD_COMMAND",
2208         "HW_ERROR_TUNE_LOCK",
2209         "HW_ERROR_TEMPERATURE",
2210         "ILLEGAL_CHAN_FREQ",
2211         "VCC_NOT_STABLE",
2212         "FH_ERROR",
2213         "NMI_INTERRUPT_HOST",
2214         "NMI_INTERRUPT_ACTION_PT",
2215         "NMI_INTERRUPT_UNKNOWN",
2216         "UCODE_VERSION_MISMATCH",
2217         "HW_ERROR_ABS_LOCK",
2218         "HW_ERROR_CAL_LOCK_FAIL",
2219         "NMI_INTERRUPT_INST_ACTION_PT",
2220         "NMI_INTERRUPT_DATA_ACTION_PT",
2221         "NMI_TRM_HW_ER",
2222         "NMI_INTERRUPT_TRM",
2223         "NMI_INTERRUPT_BREAK_POINT"
2224         "DEBUG_0",
2225         "DEBUG_1",
2226         "DEBUG_2",
2227         "DEBUG_3",
2228 };
2229
2230 static struct { char *name; u8 num; } advanced_lookup[] = {
2231         { "NMI_INTERRUPT_WDG", 0x34 },
2232         { "SYSASSERT", 0x35 },
2233         { "UCODE_VERSION_MISMATCH", 0x37 },
2234         { "BAD_COMMAND", 0x38 },
2235         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
2236         { "FATAL_ERROR", 0x3D },
2237         { "NMI_TRM_HW_ERR", 0x46 },
2238         { "NMI_INTERRUPT_TRM", 0x4C },
2239         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
2240         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
2241         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
2242         { "NMI_INTERRUPT_HOST", 0x66 },
2243         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
2244         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
2245         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
2246         { "ADVANCED_SYSASSERT", 0 },
2247 };
2248
2249 static const char *desc_lookup(u32 num)
2250 {
2251         int i;
2252         int max = ARRAY_SIZE(desc_lookup_text);
2253
2254         if (num < max)
2255                 return desc_lookup_text[num];
2256
2257         max = ARRAY_SIZE(advanced_lookup) - 1;
2258         for (i = 0; i < max; i++) {
2259                 if (advanced_lookup[i].num == num)
2260                         break;;
2261         }
2262         return advanced_lookup[i].name;
2263 }
2264
2265 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2266 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2267
2268 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2269 {
2270         u32 data2, line;
2271         u32 desc, time, count, base, data1;
2272         u32 blink1, blink2, ilink1, ilink2;
2273         u32 pc, hcmd;
2274
2275         if (priv->ucode_type == UCODE_INIT) {
2276                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2277                 if (!base)
2278                         base = priv->_agn.init_errlog_ptr;
2279         } else {
2280                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2281                 if (!base)
2282                         base = priv->_agn.inst_errlog_ptr;
2283         }
2284
2285         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2286                 IWL_ERR(priv,
2287                         "Not valid error log pointer 0x%08X for %s uCode\n",
2288                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2289                 return;
2290         }
2291
2292         count = iwl_read_targ_mem(priv, base);
2293
2294         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2295                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2296                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2297                         priv->status, count);
2298         }
2299
2300         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2301         priv->isr_stats.err_code = desc;
2302         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2303         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2304         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2305         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2306         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2307         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2308         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2309         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2310         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2311         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2312
2313         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2314                                       blink1, blink2, ilink1, ilink2);
2315
2316         IWL_ERR(priv, "Desc                                  Time       "
2317                 "data1      data2      line\n");
2318         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
2319                 desc_lookup(desc), desc, time, data1, data2, line);
2320         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2321         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2322                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2323 }
2324
2325 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2326
2327 /**
2328  * iwl_print_event_log - Dump error event log to syslog
2329  *
2330  */
2331 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2332                                u32 num_events, u32 mode,
2333                                int pos, char **buf, size_t bufsz)
2334 {
2335         u32 i;
2336         u32 base;       /* SRAM byte address of event log header */
2337         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2338         u32 ptr;        /* SRAM byte address of log data */
2339         u32 ev, time, data; /* event log data */
2340         unsigned long reg_flags;
2341
2342         if (num_events == 0)
2343                 return pos;
2344
2345         if (priv->ucode_type == UCODE_INIT) {
2346                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2347                 if (!base)
2348                         base = priv->_agn.init_evtlog_ptr;
2349         } else {
2350                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2351                 if (!base)
2352                         base = priv->_agn.inst_evtlog_ptr;
2353         }
2354
2355         if (mode == 0)
2356                 event_size = 2 * sizeof(u32);
2357         else
2358                 event_size = 3 * sizeof(u32);
2359
2360         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2361
2362         /* Make sure device is powered up for SRAM reads */
2363         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2364         iwl_grab_nic_access(priv);
2365
2366         /* Set starting address; reads will auto-increment */
2367         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2368         rmb();
2369
2370         /* "time" is actually "data" for mode 0 (no timestamp).
2371         * place event id # at far right for easier visual parsing. */
2372         for (i = 0; i < num_events; i++) {
2373                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2374                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2375                 if (mode == 0) {
2376                         /* data, ev */
2377                         if (bufsz) {
2378                                 pos += scnprintf(*buf + pos, bufsz - pos,
2379                                                 "EVT_LOG:0x%08x:%04u\n",
2380                                                 time, ev);
2381                         } else {
2382                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2383                                         time, ev);
2384                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2385                                         time, ev);
2386                         }
2387                 } else {
2388                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2389                         if (bufsz) {
2390                                 pos += scnprintf(*buf + pos, bufsz - pos,
2391                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2392                                                  time, data, ev);
2393                         } else {
2394                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2395                                         time, data, ev);
2396                                 trace_iwlwifi_dev_ucode_event(priv, time,
2397                                         data, ev);
2398                         }
2399                 }
2400         }
2401
2402         /* Allow device to power down */
2403         iwl_release_nic_access(priv);
2404         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2405         return pos;
2406 }
2407
2408 /**
2409  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2410  */
2411 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2412                                     u32 num_wraps, u32 next_entry,
2413                                     u32 size, u32 mode,
2414                                     int pos, char **buf, size_t bufsz)
2415 {
2416         /*
2417          * display the newest DEFAULT_LOG_ENTRIES entries
2418          * i.e the entries just before the next ont that uCode would fill.
2419          */
2420         if (num_wraps) {
2421                 if (next_entry < size) {
2422                         pos = iwl_print_event_log(priv,
2423                                                 capacity - (size - next_entry),
2424                                                 size - next_entry, mode,
2425                                                 pos, buf, bufsz);
2426                         pos = iwl_print_event_log(priv, 0,
2427                                                   next_entry, mode,
2428                                                   pos, buf, bufsz);
2429                 } else
2430                         pos = iwl_print_event_log(priv, next_entry - size,
2431                                                   size, mode, pos, buf, bufsz);
2432         } else {
2433                 if (next_entry < size) {
2434                         pos = iwl_print_event_log(priv, 0, next_entry,
2435                                                   mode, pos, buf, bufsz);
2436                 } else {
2437                         pos = iwl_print_event_log(priv, next_entry - size,
2438                                                   size, mode, pos, buf, bufsz);
2439                 }
2440         }
2441         return pos;
2442 }
2443
2444 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2445
2446 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2447                             char **buf, bool display)
2448 {
2449         u32 base;       /* SRAM byte address of event log header */
2450         u32 capacity;   /* event log capacity in # entries */
2451         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2452         u32 num_wraps;  /* # times uCode wrapped to top of log */
2453         u32 next_entry; /* index of next entry to be written by uCode */
2454         u32 size;       /* # entries that we'll print */
2455         u32 logsize;
2456         int pos = 0;
2457         size_t bufsz = 0;
2458
2459         if (priv->ucode_type == UCODE_INIT) {
2460                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2461                 logsize = priv->_agn.init_evtlog_size;
2462                 if (!base)
2463                         base = priv->_agn.init_evtlog_ptr;
2464         } else {
2465                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2466                 logsize = priv->_agn.inst_evtlog_size;
2467                 if (!base)
2468                         base = priv->_agn.inst_evtlog_ptr;
2469         }
2470
2471         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2472                 IWL_ERR(priv,
2473                         "Invalid event log pointer 0x%08X for %s uCode\n",
2474                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2475                 return -EINVAL;
2476         }
2477
2478         /* event log header */
2479         capacity = iwl_read_targ_mem(priv, base);
2480         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2481         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2482         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2483
2484         if (capacity > logsize) {
2485                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2486                         capacity, logsize);
2487                 capacity = logsize;
2488         }
2489
2490         if (next_entry > logsize) {
2491                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2492                         next_entry, logsize);
2493                 next_entry = logsize;
2494         }
2495
2496         size = num_wraps ? capacity : next_entry;
2497
2498         /* bail out if nothing in log */
2499         if (size == 0) {
2500                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2501                 return pos;
2502         }
2503
2504         /* enable/disable bt channel announcement */
2505         priv->bt_ch_announce = iwlagn_bt_ch_announce;
2506
2507 #ifdef CONFIG_IWLWIFI_DEBUG
2508         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2509                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2510                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2511 #else
2512         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2513                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2514 #endif
2515         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2516                 size);
2517
2518 #ifdef CONFIG_IWLWIFI_DEBUG
2519         if (display) {
2520                 if (full_log)
2521                         bufsz = capacity * 48;
2522                 else
2523                         bufsz = size * 48;
2524                 *buf = kmalloc(bufsz, GFP_KERNEL);
2525                 if (!*buf)
2526                         return -ENOMEM;
2527         }
2528         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2529                 /*
2530                  * if uCode has wrapped back to top of log,
2531                  * start at the oldest entry,
2532                  * i.e the next one that uCode would fill.
2533                  */
2534                 if (num_wraps)
2535                         pos = iwl_print_event_log(priv, next_entry,
2536                                                 capacity - next_entry, mode,
2537                                                 pos, buf, bufsz);
2538                 /* (then/else) start at top of log */
2539                 pos = iwl_print_event_log(priv, 0,
2540                                           next_entry, mode, pos, buf, bufsz);
2541         } else
2542                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2543                                                 next_entry, size, mode,
2544                                                 pos, buf, bufsz);
2545 #else
2546         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2547                                         next_entry, size, mode,
2548                                         pos, buf, bufsz);
2549 #endif
2550         return pos;
2551 }
2552
2553 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2554 {
2555         struct iwl_ct_kill_config cmd;
2556         struct iwl_ct_kill_throttling_config adv_cmd;
2557         unsigned long flags;
2558         int ret = 0;
2559
2560         spin_lock_irqsave(&priv->lock, flags);
2561         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2562                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2563         spin_unlock_irqrestore(&priv->lock, flags);
2564         priv->thermal_throttle.ct_kill_toggle = false;
2565
2566         if (priv->cfg->base_params->support_ct_kill_exit) {
2567                 adv_cmd.critical_temperature_enter =
2568                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2569                 adv_cmd.critical_temperature_exit =
2570                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2571
2572                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2573                                        sizeof(adv_cmd), &adv_cmd);
2574                 if (ret)
2575                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2576                 else
2577                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2578                                         "succeeded, "
2579                                         "critical temperature enter is %d,"
2580                                         "exit is %d\n",
2581                                        priv->hw_params.ct_kill_threshold,
2582                                        priv->hw_params.ct_kill_exit_threshold);
2583         } else {
2584                 cmd.critical_temperature_R =
2585                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2586
2587                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2588                                        sizeof(cmd), &cmd);
2589                 if (ret)
2590                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2591                 else
2592                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2593                                         "succeeded, "
2594                                         "critical temperature is %d\n",
2595                                         priv->hw_params.ct_kill_threshold);
2596         }
2597 }
2598
2599 static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg)
2600 {
2601         struct iwl_calib_cfg_cmd calib_cfg_cmd;
2602         struct iwl_host_cmd cmd = {
2603                 .id = CALIBRATION_CFG_CMD,
2604                 .len = sizeof(struct iwl_calib_cfg_cmd),
2605                 .data = &calib_cfg_cmd,
2606         };
2607
2608         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
2609         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
2610         calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg);
2611
2612         return iwl_send_cmd(priv, &cmd);
2613 }
2614
2615
2616 /**
2617  * iwl_alive_start - called after REPLY_ALIVE notification received
2618  *                   from protocol/runtime uCode (initialization uCode's
2619  *                   Alive gets handled by iwl_init_alive_start()).
2620  */
2621 static void iwl_alive_start(struct iwl_priv *priv)
2622 {
2623         int ret = 0;
2624         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2625
2626         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2627
2628         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2629                 /* We had an error bringing up the hardware, so take it
2630                  * all the way back down so we can try again */
2631                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2632                 goto restart;
2633         }
2634
2635         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2636          * This is a paranoid check, because we would not have gotten the
2637          * "runtime" alive if code weren't properly loaded.  */
2638         if (iwl_verify_ucode(priv)) {
2639                 /* Runtime instruction load was bad;
2640                  * take it all the way back down so we can try again */
2641                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2642                 goto restart;
2643         }
2644
2645         ret = priv->cfg->ops->lib->alive_notify(priv);
2646         if (ret) {
2647                 IWL_WARN(priv,
2648                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2649                 goto restart;
2650         }
2651
2652
2653         /* After the ALIVE response, we can send host commands to the uCode */
2654         set_bit(STATUS_ALIVE, &priv->status);
2655
2656         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2657                 /* Enable timer to monitor the driver queues */
2658                 mod_timer(&priv->monitor_recover,
2659                         jiffies +
2660                         msecs_to_jiffies(
2661                           priv->cfg->base_params->monitor_recover_period));
2662         }
2663
2664         if (iwl_is_rfkill(priv))
2665                 return;
2666
2667         /* download priority table before any calibration request */
2668         if (priv->cfg->bt_params &&
2669             priv->cfg->bt_params->advanced_bt_coexist) {
2670                 /* Configure Bluetooth device coexistence support */
2671                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
2672                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
2673                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
2674                 priv->cfg->ops->hcmd->send_bt_config(priv);
2675                 priv->bt_valid = IWLAGN_BT_VALID_ENABLE_FLAGS;
2676                 iwlagn_send_prio_tbl(priv);
2677
2678                 /* FIXME: w/a to force change uCode BT state machine */
2679                 iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
2680                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2681                 iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE,
2682                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2683         }
2684         if (priv->hw_params.calib_rt_cfg)
2685                 iwlagn_send_calib_cfg_rt(priv, priv->hw_params.calib_rt_cfg);
2686
2687         ieee80211_wake_queues(priv->hw);
2688
2689         priv->active_rate = IWL_RATES_MASK;
2690
2691         /* Configure Tx antenna selection based on H/W config */
2692         if (priv->cfg->ops->hcmd->set_tx_ant)
2693                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2694
2695         if (iwl_is_associated_ctx(ctx)) {
2696                 struct iwl_rxon_cmd *active_rxon =
2697                                 (struct iwl_rxon_cmd *)&ctx->active;
2698                 /* apply any changes in staging */
2699                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2700                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2701         } else {
2702                 struct iwl_rxon_context *tmp;
2703                 /* Initialize our rx_config data */
2704                 for_each_context(priv, tmp)
2705                         iwl_connection_init_rx_config(priv, tmp);
2706
2707                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2708                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
2709         }
2710
2711         if (priv->cfg->bt_params &&
2712             !priv->cfg->bt_params->advanced_bt_coexist) {
2713                 /* Configure Bluetooth device coexistence support */
2714                 priv->cfg->ops->hcmd->send_bt_config(priv);
2715         }
2716
2717         iwl_reset_run_time_calib(priv);
2718
2719         /* Configure the adapter for unassociated operation */
2720         iwlcore_commit_rxon(priv, ctx);
2721
2722         /* At this point, the NIC is initialized and operational */
2723         iwl_rf_kill_ct_config(priv);
2724
2725         iwl_leds_init(priv);
2726
2727         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2728         set_bit(STATUS_READY, &priv->status);
2729         wake_up_interruptible(&priv->wait_command_queue);
2730
2731         iwl_power_update_mode(priv, true);
2732         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2733
2734
2735         return;
2736
2737  restart:
2738         queue_work(priv->workqueue, &priv->restart);
2739 }
2740
2741 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2742
2743 static void __iwl_down(struct iwl_priv *priv)
2744 {
2745         unsigned long flags;
2746         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2747
2748         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2749
2750         iwl_scan_cancel_timeout(priv, 200);
2751
2752         exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
2753
2754         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2755          * to prevent rearm timer */
2756         if (priv->cfg->ops->lib->recover_from_tx_stall)
2757                 del_timer_sync(&priv->monitor_recover);
2758
2759         iwl_clear_ucode_stations(priv, NULL);
2760         iwl_dealloc_bcast_stations(priv);
2761         iwl_clear_driver_stations(priv);
2762
2763         /* reset BT coex data */
2764         priv->bt_status = 0;
2765         if (priv->cfg->bt_params)
2766                 priv->bt_traffic_load =
2767                          priv->cfg->bt_params->bt_init_traffic_load;
2768         else
2769                 priv->bt_traffic_load = 0;
2770         priv->bt_sco_active = false;
2771         priv->bt_full_concurrent = false;
2772         priv->bt_ci_compliance = 0;
2773
2774         /* Unblock any waiting calls */
2775         wake_up_interruptible_all(&priv->wait_command_queue);
2776
2777         /* Wipe out the EXIT_PENDING status bit if we are not actually
2778          * exiting the module */
2779         if (!exit_pending)
2780                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2781
2782         /* stop and reset the on-board processor */
2783         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2784
2785         /* tell the device to stop sending interrupts */
2786         spin_lock_irqsave(&priv->lock, flags);
2787         iwl_disable_interrupts(priv);
2788         spin_unlock_irqrestore(&priv->lock, flags);
2789         iwl_synchronize_irq(priv);
2790
2791         if (priv->mac80211_registered)
2792                 ieee80211_stop_queues(priv->hw);
2793
2794         /* If we have not previously called iwl_init() then
2795          * clear all bits but the RF Kill bit and return */
2796         if (!iwl_is_init(priv)) {
2797                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2798                                         STATUS_RF_KILL_HW |
2799                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2800                                         STATUS_GEO_CONFIGURED |
2801                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2802                                         STATUS_EXIT_PENDING;
2803                 goto exit;
2804         }
2805
2806         /* ...otherwise clear out all the status bits but the RF Kill
2807          * bit and continue taking the NIC down. */
2808         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2809                                 STATUS_RF_KILL_HW |
2810                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2811                                 STATUS_GEO_CONFIGURED |
2812                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2813                                 STATUS_FW_ERROR |
2814                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2815                                 STATUS_EXIT_PENDING;
2816
2817         /* device going down, Stop using ICT table */
2818         iwl_disable_ict(priv);
2819
2820         iwlagn_txq_ctx_stop(priv);
2821         iwlagn_rxq_stop(priv);
2822
2823         /* Power-down device's busmaster DMA clocks */
2824         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2825         udelay(5);
2826
2827         /* Make sure (redundant) we've released our request to stay awake */
2828         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2829
2830         /* Stop the device, and put it in low power state */
2831         iwl_apm_stop(priv);
2832
2833  exit:
2834         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2835
2836         dev_kfree_skb(priv->beacon_skb);
2837         priv->beacon_skb = NULL;
2838
2839         /* clear out any free frames */
2840         iwl_clear_free_frames(priv);
2841 }
2842
2843 static void iwl_down(struct iwl_priv *priv)
2844 {
2845         mutex_lock(&priv->mutex);
2846         __iwl_down(priv);
2847         mutex_unlock(&priv->mutex);
2848
2849         iwl_cancel_deferred_work(priv);
2850 }
2851
2852 #define HW_READY_TIMEOUT (50)
2853
2854 static int iwl_set_hw_ready(struct iwl_priv *priv)
2855 {
2856         int ret = 0;
2857
2858         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2859                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2860
2861         /* See if we got it */
2862         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2863                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2864                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2865                                 HW_READY_TIMEOUT);
2866         if (ret != -ETIMEDOUT)
2867                 priv->hw_ready = true;
2868         else
2869                 priv->hw_ready = false;
2870
2871         IWL_DEBUG_INFO(priv, "hardware %s\n",
2872                       (priv->hw_ready == 1) ? "ready" : "not ready");
2873         return ret;
2874 }
2875
2876 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2877 {
2878         int ret = 0;
2879
2880         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2881
2882         ret = iwl_set_hw_ready(priv);
2883         if (priv->hw_ready)
2884                 return ret;
2885
2886         /* If HW is not ready, prepare the conditions to check again */
2887         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2888                         CSR_HW_IF_CONFIG_REG_PREPARE);
2889
2890         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2891                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2892                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2893
2894         /* HW should be ready by now, check again. */
2895         if (ret != -ETIMEDOUT)
2896                 iwl_set_hw_ready(priv);
2897
2898         return ret;
2899 }
2900
2901 #define MAX_HW_RESTARTS 5
2902
2903 static int __iwl_up(struct iwl_priv *priv)
2904 {
2905         struct iwl_rxon_context *ctx;
2906         int i;
2907         int ret;
2908
2909         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2910                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2911                 return -EIO;
2912         }
2913
2914         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2915                 IWL_ERR(priv, "ucode not available for device bringup\n");
2916                 return -EIO;
2917         }
2918
2919         for_each_context(priv, ctx) {
2920                 ret = iwlagn_alloc_bcast_station(priv, ctx);
2921                 if (ret) {
2922                         iwl_dealloc_bcast_stations(priv);
2923                         return ret;
2924                 }
2925         }
2926
2927         iwl_prepare_card_hw(priv);
2928
2929         if (!priv->hw_ready) {
2930                 IWL_WARN(priv, "Exit HW not ready\n");
2931                 return -EIO;
2932         }
2933
2934         /* If platform's RF_KILL switch is NOT set to KILL */
2935         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2936                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2937         else
2938                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2939
2940         if (iwl_is_rfkill(priv)) {
2941                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2942
2943                 iwl_enable_interrupts(priv);
2944                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2945                 return 0;
2946         }
2947
2948         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2949
2950         /* must be initialised before iwl_hw_nic_init */
2951         if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
2952                 priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
2953         else
2954                 priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
2955
2956         ret = iwlagn_hw_nic_init(priv);
2957         if (ret) {
2958                 IWL_ERR(priv, "Unable to init nic\n");
2959                 return ret;
2960         }
2961
2962         /* make sure rfkill handshake bits are cleared */
2963         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2964         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2965                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2966
2967         /* clear (again), then enable host interrupts */
2968         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2969         iwl_enable_interrupts(priv);
2970
2971         /* really make sure rfkill handshake bits are cleared */
2972         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2973         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2974
2975         /* Copy original ucode data image from disk into backup cache.
2976          * This will be used to initialize the on-board processor's
2977          * data SRAM for a clean start when the runtime program first loads. */
2978         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2979                priv->ucode_data.len);
2980
2981         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2982
2983                 /* load bootstrap state machine,
2984                  * load bootstrap program into processor's memory,
2985                  * prepare to load the "initialize" uCode */
2986                 ret = priv->cfg->ops->lib->load_ucode(priv);
2987
2988                 if (ret) {
2989                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2990                                 ret);
2991                         continue;
2992                 }
2993
2994                 /* start card; "initialize" will load runtime ucode */
2995                 iwl_nic_start(priv);
2996
2997                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2998
2999                 return 0;
3000         }
3001
3002         set_bit(STATUS_EXIT_PENDING, &priv->status);
3003         __iwl_down(priv);
3004         clear_bit(STATUS_EXIT_PENDING, &priv->status);
3005
3006         /* tried to restart and config the device for as long as our
3007          * patience could withstand */
3008         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
3009         return -EIO;
3010 }
3011
3012
3013 /*****************************************************************************
3014  *
3015  * Workqueue callbacks
3016  *
3017  *****************************************************************************/
3018
3019 static void iwl_bg_init_alive_start(struct work_struct *data)
3020 {
3021         struct iwl_priv *priv =
3022             container_of(data, struct iwl_priv, init_alive_start.work);
3023
3024         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3025                 return;
3026
3027         mutex_lock(&priv->mutex);
3028         priv->cfg->ops->lib->init_alive_start(priv);
3029         mutex_unlock(&priv->mutex);
3030 }
3031
3032 static void iwl_bg_alive_start(struct work_struct *data)
3033 {
3034         struct iwl_priv *priv =
3035             container_of(data, struct iwl_priv, alive_start.work);
3036
3037         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3038                 return;
3039
3040         /* enable dram interrupt */
3041         iwl_reset_ict(priv);
3042
3043         mutex_lock(&priv->mutex);
3044         iwl_alive_start(priv);
3045         mutex_unlock(&priv->mutex);
3046 }
3047
3048 static void iwl_bg_run_time_calib_work(struct work_struct *work)
3049 {
3050         struct iwl_priv *priv = container_of(work, struct iwl_priv,
3051                         run_time_calib_work);
3052
3053         mutex_lock(&priv->mutex);
3054
3055         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3056             test_bit(STATUS_SCANNING, &priv->status)) {
3057                 mutex_unlock(&priv->mutex);
3058                 return;
3059         }
3060
3061         if (priv->start_calib) {
3062                 if (priv->cfg->bt_params &&
3063                     priv->cfg->bt_params->bt_statistics) {
3064                         iwl_chain_noise_calibration(priv,
3065                                         (void *)&priv->_agn.statistics_bt);
3066                         iwl_sensitivity_calibration(priv,
3067                                         (void *)&priv->_agn.statistics_bt);
3068                 } else {
3069                         iwl_chain_noise_calibration(priv,
3070                                         (void *)&priv->_agn.statistics);
3071                         iwl_sensitivity_calibration(priv,
3072                                         (void *)&priv->_agn.statistics);
3073                 }
3074         }
3075
3076         mutex_unlock(&priv->mutex);
3077 }
3078
3079 static void iwl_bg_restart(struct work_struct *data)
3080 {
3081         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3082
3083         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3084                 return;
3085
3086         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3087                 struct iwl_rxon_context *ctx;
3088                 bool bt_sco, bt_full_concurrent;
3089                 u8 bt_ci_compliance;
3090                 u8 bt_load;
3091                 u8 bt_status;
3092
3093                 mutex_lock(&priv->mutex);
3094                 for_each_context(priv, ctx)
3095                         ctx->vif = NULL;
3096                 priv->is_open = 0;
3097
3098                 /*
3099                  * __iwl_down() will clear the BT status variables,
3100                  * which is correct, but when we restart we really
3101                  * want to keep them so restore them afterwards.
3102                  *
3103                  * The restart process will later pick them up and
3104                  * re-configure the hw when we reconfigure the BT
3105                  * command.
3106                  */
3107                 bt_sco = priv->bt_sco_active;
3108                 bt_full_concurrent = priv->bt_full_concurrent;
3109                 bt_ci_compliance = priv->bt_ci_compliance;
3110                 bt_load = priv->bt_traffic_load;
3111                 bt_status = priv->bt_status;
3112
3113                 __iwl_down(priv);
3114
3115                 priv->bt_sco_active = bt_sco;
3116                 priv->bt_full_concurrent = bt_full_concurrent;
3117                 priv->bt_ci_compliance = bt_ci_compliance;
3118                 priv->bt_traffic_load = bt_load;
3119                 priv->bt_status = bt_status;
3120
3121                 mutex_unlock(&priv->mutex);
3122                 iwl_cancel_deferred_work(priv);
3123                 ieee80211_restart_hw(priv->hw);
3124         } else {
3125                 iwl_down(priv);
3126
3127                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3128                         return;
3129
3130                 mutex_lock(&priv->mutex);
3131                 __iwl_up(priv);
3132                 mutex_unlock(&priv->mutex);
3133         }
3134 }
3135
3136 static void iwl_bg_rx_replenish(struct work_struct *data)
3137 {
3138         struct iwl_priv *priv =
3139             container_of(data, struct iwl_priv, rx_replenish);
3140
3141         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3142                 return;
3143
3144         mutex_lock(&priv->mutex);
3145         iwlagn_rx_replenish(priv);
3146         mutex_unlock(&priv->mutex);
3147 }
3148
3149 /*****************************************************************************
3150  *
3151  * mac80211 entry point functions
3152  *
3153  *****************************************************************************/
3154
3155 #define UCODE_READY_TIMEOUT     (4 * HZ)
3156
3157 /*
3158  * Not a mac80211 entry point function, but it fits in with all the
3159  * other mac80211 functions grouped here.
3160  */
3161 static int iwl_mac_setup_register(struct iwl_priv *priv,
3162                                   struct iwlagn_ucode_capabilities *capa)
3163 {
3164         int ret;
3165         struct ieee80211_hw *hw = priv->hw;
3166         struct iwl_rxon_context *ctx;
3167
3168         hw->rate_control_algorithm = "iwl-agn-rs";
3169
3170         /* Tell mac80211 our characteristics */
3171         hw->flags = IEEE80211_HW_SIGNAL_DBM |
3172                     IEEE80211_HW_AMPDU_AGGREGATION |
3173                     IEEE80211_HW_NEED_DTIM_PERIOD |
3174                     IEEE80211_HW_SPECTRUM_MGMT;
3175
3176         if (!priv->cfg->base_params->broken_powersave)
3177                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3178                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3179
3180         if (priv->cfg->sku & IWL_SKU_N)
3181                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3182                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3183
3184         hw->sta_data_size = sizeof(struct iwl_station_priv);
3185         hw->vif_data_size = sizeof(struct iwl_vif_priv);
3186
3187         for_each_context(priv, ctx) {
3188                 hw->wiphy->interface_modes |= ctx->interface_modes;
3189                 hw->wiphy->interface_modes |= ctx->exclusive_interface_modes;
3190         }
3191
3192         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3193                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
3194
3195         /*
3196          * For now, disable PS by default because it affects
3197          * RX performance significantly.
3198          */
3199         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3200
3201         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
3202         /* we create the 802.11 header and a zero-length SSID element */
3203         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
3204
3205         /* Default value; 4 EDCA QOS priorities */
3206         hw->queues = 4;
3207
3208         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
3209
3210         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3211                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3212                         &priv->bands[IEEE80211_BAND_2GHZ];
3213         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3214                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3215                         &priv->bands[IEEE80211_BAND_5GHZ];
3216
3217         ret = ieee80211_register_hw(priv->hw);
3218         if (ret) {
3219                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3220                 return ret;
3221         }
3222         priv->mac80211_registered = 1;
3223
3224         return 0;
3225 }
3226
3227
3228 int iwlagn_mac_start(struct ieee80211_hw *hw)
3229 {
3230         struct iwl_priv *priv = hw->priv;
3231         int ret;
3232
3233         IWL_DEBUG_MAC80211(priv, "enter\n");
3234
3235         /* we should be verifying the device is ready to be opened */
3236         mutex_lock(&priv->mutex);
3237         ret = __iwl_up(priv);
3238         mutex_unlock(&priv->mutex);
3239
3240         if (ret)
3241                 return ret;
3242
3243         if (iwl_is_rfkill(priv))
3244                 goto out;
3245
3246         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3247
3248         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3249          * mac80211 will not be run successfully. */
3250         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3251                         test_bit(STATUS_READY, &priv->status),
3252                         UCODE_READY_TIMEOUT);
3253         if (!ret) {
3254                 if (!test_bit(STATUS_READY, &priv->status)) {
3255                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3256                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3257                         return -ETIMEDOUT;
3258                 }
3259         }
3260
3261         iwl_led_start(priv);
3262
3263 out:
3264         priv->is_open = 1;
3265         IWL_DEBUG_MAC80211(priv, "leave\n");
3266         return 0;
3267 }
3268
3269 void iwlagn_mac_stop(struct ieee80211_hw *hw)
3270 {
3271         struct iwl_priv *priv = hw->priv;
3272
3273         IWL_DEBUG_MAC80211(priv, "enter\n");
3274
3275         if (!priv->is_open)
3276                 return;
3277
3278         priv->is_open = 0;
3279
3280         iwl_down(priv);
3281
3282         flush_workqueue(priv->workqueue);
3283
3284         /* enable interrupts again in order to receive rfkill changes */
3285         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3286         iwl_enable_interrupts(priv);
3287
3288         IWL_DEBUG_MAC80211(priv, "leave\n");
3289 }
3290
3291 int iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3292 {
3293         struct iwl_priv *priv = hw->priv;
3294
3295         IWL_DEBUG_MACDUMP(priv, "enter\n");
3296
3297         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3298                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3299
3300         if (iwlagn_tx_skb(priv, skb))
3301                 dev_kfree_skb_any(skb);
3302
3303         IWL_DEBUG_MACDUMP(priv, "leave\n");
3304         return NETDEV_TX_OK;
3305 }
3306
3307 void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,
3308                                 struct ieee80211_vif *vif,
3309                                 struct ieee80211_key_conf *keyconf,
3310                                 struct ieee80211_sta *sta,
3311                                 u32 iv32, u16 *phase1key)
3312 {
3313         struct iwl_priv *priv = hw->priv;
3314         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3315
3316         IWL_DEBUG_MAC80211(priv, "enter\n");
3317
3318         iwl_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
3319                             iv32, phase1key);
3320
3321         IWL_DEBUG_MAC80211(priv, "leave\n");
3322 }
3323
3324 int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3325                        struct ieee80211_vif *vif, struct ieee80211_sta *sta,
3326                        struct ieee80211_key_conf *key)
3327 {
3328         struct iwl_priv *priv = hw->priv;
3329         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3330         struct iwl_rxon_context *ctx = vif_priv->ctx;
3331         int ret;
3332         u8 sta_id;
3333         bool is_default_wep_key = false;
3334
3335         IWL_DEBUG_MAC80211(priv, "enter\n");
3336
3337         if (priv->cfg->mod_params->sw_crypto) {
3338                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3339                 return -EOPNOTSUPP;
3340         }
3341
3342         sta_id = iwl_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
3343         if (sta_id == IWL_INVALID_STATION)
3344                 return -EINVAL;
3345
3346         mutex_lock(&priv->mutex);
3347         iwl_scan_cancel_timeout(priv, 100);
3348
3349         /*
3350          * If we are getting WEP group key and we didn't receive any key mapping
3351          * so far, we are in legacy wep mode (group key only), otherwise we are
3352          * in 1X mode.
3353          * In legacy wep mode, we use another host command to the uCode.
3354          */
3355         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3356              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
3357             !sta) {
3358                 if (cmd == SET_KEY)
3359                         is_default_wep_key = !ctx->key_mapping_keys;
3360                 else
3361                         is_default_wep_key =
3362                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3363         }
3364
3365         switch (cmd) {
3366         case SET_KEY:
3367                 if (is_default_wep_key)
3368                         ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key);
3369                 else
3370                         ret = iwl_set_dynamic_key(priv, vif_priv->ctx,
3371                                                   key, sta_id);
3372
3373                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3374                 break;
3375         case DISABLE_KEY:
3376                 if (is_default_wep_key)
3377                         ret = iwl_remove_default_wep_key(priv, ctx, key);
3378                 else
3379                         ret = iwl_remove_dynamic_key(priv, ctx, key, sta_id);
3380
3381                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3382                 break;
3383         default:
3384                 ret = -EINVAL;
3385         }
3386
3387         mutex_unlock(&priv->mutex);
3388         IWL_DEBUG_MAC80211(priv, "leave\n");
3389
3390         return ret;
3391 }
3392
3393 int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
3394                             struct ieee80211_vif *vif,
3395                             enum ieee80211_ampdu_mlme_action action,
3396                             struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3397 {
3398         struct iwl_priv *priv = hw->priv;
3399         int ret = -EINVAL;
3400
3401         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3402                      sta->addr, tid);
3403
3404         if (!(priv->cfg->sku & IWL_SKU_N))
3405                 return -EACCES;
3406
3407         mutex_lock(&priv->mutex);
3408
3409         switch (action) {
3410         case IEEE80211_AMPDU_RX_START:
3411                 IWL_DEBUG_HT(priv, "start Rx\n");
3412                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3413                 break;
3414         case IEEE80211_AMPDU_RX_STOP:
3415                 IWL_DEBUG_HT(priv, "stop Rx\n");
3416                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3417                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3418                         ret = 0;
3419                 break;
3420         case IEEE80211_AMPDU_TX_START:
3421                 IWL_DEBUG_HT(priv, "start Tx\n");
3422                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3423                 if (ret == 0) {
3424                         priv->_agn.agg_tids_count++;
3425                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3426                                      priv->_agn.agg_tids_count);
3427                 }
3428                 break;
3429         case IEEE80211_AMPDU_TX_STOP:
3430                 IWL_DEBUG_HT(priv, "stop Tx\n");
3431                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3432                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3433                         priv->_agn.agg_tids_count--;
3434                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3435                                      priv->_agn.agg_tids_count);
3436                 }
3437                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3438                         ret = 0;
3439                 if (priv->cfg->ht_params &&
3440                     priv->cfg->ht_params->use_rts_for_aggregation) {
3441                         struct iwl_station_priv *sta_priv =
3442                                 (void *) sta->drv_priv;
3443                         /*
3444                          * switch off RTS/CTS if it was previously enabled
3445                          */
3446
3447                         sta_priv->lq_sta.lq.general_params.flags &=
3448                                 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3449                         iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
3450                                         &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3451                 }
3452                 break;
3453         case IEEE80211_AMPDU_TX_OPERATIONAL:
3454                 if (priv->cfg->ht_params &&
3455                     priv->cfg->ht_params->use_rts_for_aggregation) {
3456                         struct iwl_station_priv *sta_priv =
3457                                 (void *) sta->drv_priv;
3458
3459                         /*
3460                          * switch to RTS/CTS if it is the prefer protection
3461                          * method for HT traffic
3462                          */
3463
3464                         sta_priv->lq_sta.lq.general_params.flags |=
3465                                 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3466                         iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
3467                                         &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3468                 }
3469                 ret = 0;
3470                 break;
3471         }
3472         mutex_unlock(&priv->mutex);
3473
3474         return ret;
3475 }
3476
3477 static void iwlagn_mac_sta_notify(struct ieee80211_hw *hw,
3478                                   struct ieee80211_vif *vif,
3479                                   enum sta_notify_cmd cmd,
3480                                   struct ieee80211_sta *sta)
3481 {
3482         struct iwl_priv *priv = hw->priv;
3483         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3484         int sta_id;
3485
3486         switch (cmd) {
3487         case STA_NOTIFY_SLEEP:
3488                 WARN_ON(!sta_priv->client);
3489                 sta_priv->asleep = true;
3490                 if (atomic_read(&sta_priv->pending_frames) > 0)
3491                         ieee80211_sta_block_awake(hw, sta, true);
3492                 break;
3493         case STA_NOTIFY_AWAKE:
3494                 WARN_ON(!sta_priv->client);
3495                 if (!sta_priv->asleep)
3496                         break;
3497                 sta_priv->asleep = false;
3498                 sta_id = iwl_sta_id(sta);
3499                 if (sta_id != IWL_INVALID_STATION)
3500                         iwl_sta_modify_ps_wake(priv, sta_id);
3501                 break;
3502         default:
3503                 break;
3504         }
3505 }
3506
3507 int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3508                        struct ieee80211_vif *vif,
3509                        struct ieee80211_sta *sta)
3510 {
3511         struct iwl_priv *priv = hw->priv;
3512         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3513         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3514         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3515         int ret;
3516         u8 sta_id;
3517
3518         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3519                         sta->addr);
3520         mutex_lock(&priv->mutex);
3521         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3522                         sta->addr);
3523         sta_priv->common.sta_id = IWL_INVALID_STATION;
3524
3525         atomic_set(&sta_priv->pending_frames, 0);
3526         if (vif->type == NL80211_IFTYPE_AP)
3527                 sta_priv->client = true;
3528
3529         ret = iwl_add_station_common(priv, vif_priv->ctx, sta->addr,
3530                                      is_ap, sta, &sta_id);
3531         if (ret) {
3532                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3533                         sta->addr, ret);
3534                 /* Should we return success if return code is EEXIST ? */
3535                 mutex_unlock(&priv->mutex);
3536                 return ret;
3537         }
3538
3539         sta_priv->common.sta_id = sta_id;
3540
3541         /* Initialize rate scaling */
3542         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3543                        sta->addr);
3544         iwl_rs_rate_init(priv, sta, sta_id);
3545         mutex_unlock(&priv->mutex);
3546
3547         return 0;
3548 }
3549
3550 void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
3551                                struct ieee80211_channel_switch *ch_switch)
3552 {
3553         struct iwl_priv *priv = hw->priv;
3554         const struct iwl_channel_info *ch_info;
3555         struct ieee80211_conf *conf = &hw->conf;
3556         struct ieee80211_channel *channel = ch_switch->channel;
3557         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3558         /*
3559          * MULTI-FIXME
3560          * When we add support for multiple interfaces, we need to
3561          * revisit this. The channel switch command in the device
3562          * only affects the BSS context, but what does that really
3563          * mean? And what if we get a CSA on the second interface?
3564          * This needs a lot of work.
3565          */
3566         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3567         u16 ch;
3568         unsigned long flags = 0;
3569
3570         IWL_DEBUG_MAC80211(priv, "enter\n");
3571
3572         if (iwl_is_rfkill(priv))
3573                 goto out_exit;
3574
3575         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3576             test_bit(STATUS_SCANNING, &priv->status))
3577                 goto out_exit;
3578
3579         if (!iwl_is_associated_ctx(ctx))
3580                 goto out_exit;
3581
3582         /* channel switch in progress */
3583         if (priv->switch_rxon.switch_in_progress == true)
3584                 goto out_exit;
3585
3586         mutex_lock(&priv->mutex);
3587         if (priv->cfg->ops->lib->set_channel_switch) {
3588
3589                 ch = channel->hw_value;
3590                 if (le16_to_cpu(ctx->active.channel) != ch) {
3591                         ch_info = iwl_get_channel_info(priv,
3592                                                        channel->band,
3593                                                        ch);
3594                         if (!is_channel_valid(ch_info)) {
3595                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3596                                 goto out;
3597                         }
3598                         spin_lock_irqsave(&priv->lock, flags);
3599
3600                         priv->current_ht_config.smps = conf->smps_mode;
3601
3602                         /* Configure HT40 channels */
3603                         ctx->ht.enabled = conf_is_ht(conf);
3604                         if (ctx->ht.enabled) {
3605                                 if (conf_is_ht40_minus(conf)) {
3606                                         ctx->ht.extension_chan_offset =
3607                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3608                                         ctx->ht.is_40mhz = true;
3609                                 } else if (conf_is_ht40_plus(conf)) {
3610                                         ctx->ht.extension_chan_offset =
3611                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3612                                         ctx->ht.is_40mhz = true;
3613                                 } else {
3614                                         ctx->ht.extension_chan_offset =
3615                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3616                                         ctx->ht.is_40mhz = false;
3617                                 }
3618                         } else
3619                                 ctx->ht.is_40mhz = false;
3620
3621                         if ((le16_to_cpu(ctx->staging.channel) != ch))
3622                                 ctx->staging.flags = 0;
3623
3624                         iwl_set_rxon_channel(priv, channel, ctx);
3625                         iwl_set_rxon_ht(priv, ht_conf);
3626                         iwl_set_flags_for_band(priv, ctx, channel->band,
3627                                                ctx->vif);
3628                         spin_unlock_irqrestore(&priv->lock, flags);
3629
3630                         iwl_set_rate(priv);
3631                         /*
3632                          * at this point, staging_rxon has the
3633                          * configuration for channel switch
3634                          */
3635                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3636                                                                     ch_switch))
3637                                 priv->switch_rxon.switch_in_progress = false;
3638                 }
3639         }
3640 out:
3641         mutex_unlock(&priv->mutex);
3642 out_exit:
3643         if (!priv->switch_rxon.switch_in_progress)
3644                 ieee80211_chswitch_done(ctx->vif, false);
3645         IWL_DEBUG_MAC80211(priv, "leave\n");
3646 }
3647
3648 void iwlagn_configure_filter(struct ieee80211_hw *hw,
3649                              unsigned int changed_flags,
3650                              unsigned int *total_flags,
3651                              u64 multicast)
3652 {
3653         struct iwl_priv *priv = hw->priv;
3654         __le32 filter_or = 0, filter_nand = 0;
3655         struct iwl_rxon_context *ctx;
3656
3657 #define CHK(test, flag) do { \
3658         if (*total_flags & (test))              \
3659                 filter_or |= (flag);            \
3660         else                                    \
3661                 filter_nand |= (flag);          \
3662         } while (0)
3663
3664         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
3665                         changed_flags, *total_flags);
3666
3667         CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3668         CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3669         CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3670
3671 #undef CHK
3672
3673         mutex_lock(&priv->mutex);
3674
3675         for_each_context(priv, ctx) {
3676                 ctx->staging.filter_flags &= ~filter_nand;
3677                 ctx->staging.filter_flags |= filter_or;
3678
3679                 /*
3680                  * Not committing directly because hardware can perform a scan,
3681                  * but we'll eventually commit the filter flags change anyway.
3682                  */
3683         }
3684
3685         mutex_unlock(&priv->mutex);
3686
3687         /*
3688          * Receiving all multicast frames is always enabled by the
3689          * default flags setup in iwl_connection_init_rx_config()
3690          * since we currently do not support programming multicast
3691          * filters into the device.
3692          */
3693         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3694                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3695 }
3696
3697 void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)
3698 {
3699         struct iwl_priv *priv = hw->priv;
3700
3701         mutex_lock(&priv->mutex);
3702         IWL_DEBUG_MAC80211(priv, "enter\n");
3703
3704         /* do not support "flush" */
3705         if (!priv->cfg->ops->lib->txfifo_flush)
3706                 goto done;
3707
3708         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3709                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3710                 goto done;
3711         }
3712         if (iwl_is_rfkill(priv)) {
3713                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3714                 goto done;
3715         }
3716
3717         /*
3718          * mac80211 will not push any more frames for transmit
3719          * until the flush is completed
3720          */
3721         if (drop) {
3722                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3723                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3724                         IWL_ERR(priv, "flush request fail\n");
3725                         goto done;
3726                 }
3727         }
3728         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3729         iwlagn_wait_tx_queue_empty(priv);
3730 done:
3731         mutex_unlock(&priv->mutex);
3732         IWL_DEBUG_MAC80211(priv, "leave\n");
3733 }
3734
3735 /*****************************************************************************
3736  *
3737  * driver setup and teardown
3738  *
3739  *****************************************************************************/
3740
3741 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3742 {
3743         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3744
3745         init_waitqueue_head(&priv->wait_command_queue);
3746
3747         INIT_WORK(&priv->restart, iwl_bg_restart);
3748         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3749         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3750         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3751         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3752         INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
3753         INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
3754         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3755         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3756
3757         iwl_setup_scan_deferred_work(priv);
3758
3759         if (priv->cfg->ops->lib->setup_deferred_work)
3760                 priv->cfg->ops->lib->setup_deferred_work(priv);
3761
3762         init_timer(&priv->statistics_periodic);
3763         priv->statistics_periodic.data = (unsigned long)priv;
3764         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3765
3766         init_timer(&priv->ucode_trace);
3767         priv->ucode_trace.data = (unsigned long)priv;
3768         priv->ucode_trace.function = iwl_bg_ucode_trace;
3769
3770         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3771                 init_timer(&priv->monitor_recover);
3772                 priv->monitor_recover.data = (unsigned long)priv;
3773                 priv->monitor_recover.function =
3774                         priv->cfg->ops->lib->recover_from_tx_stall;
3775         }
3776
3777         if (!priv->cfg->base_params->use_isr_legacy)
3778                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3779                         iwl_irq_tasklet, (unsigned long)priv);
3780         else
3781                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3782                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3783 }
3784
3785 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3786 {
3787         if (priv->cfg->ops->lib->cancel_deferred_work)
3788                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3789
3790         cancel_delayed_work_sync(&priv->init_alive_start);
3791         cancel_delayed_work(&priv->alive_start);
3792         cancel_work_sync(&priv->run_time_calib_work);
3793         cancel_work_sync(&priv->beacon_update);
3794
3795         iwl_cancel_scan_deferred_work(priv);
3796
3797         cancel_work_sync(&priv->bt_full_concurrency);
3798         cancel_work_sync(&priv->bt_runtime_config);
3799
3800         del_timer_sync(&priv->statistics_periodic);
3801         del_timer_sync(&priv->ucode_trace);
3802 }
3803
3804 static void iwl_init_hw_rates(struct iwl_priv *priv,
3805                               struct ieee80211_rate *rates)
3806 {
3807         int i;
3808
3809         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3810                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3811                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3812                 rates[i].hw_value_short = i;
3813                 rates[i].flags = 0;
3814                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3815                         /*
3816                          * If CCK != 1M then set short preamble rate flag.
3817                          */
3818                         rates[i].flags |=
3819                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3820                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3821                 }
3822         }
3823 }
3824
3825 static int iwl_init_drv(struct iwl_priv *priv)
3826 {
3827         int ret;
3828
3829         spin_lock_init(&priv->sta_lock);
3830         spin_lock_init(&priv->hcmd_lock);
3831
3832         INIT_LIST_HEAD(&priv->free_frames);
3833
3834         mutex_init(&priv->mutex);
3835         mutex_init(&priv->sync_cmd_mutex);
3836
3837         priv->ieee_channels = NULL;
3838         priv->ieee_rates = NULL;
3839         priv->band = IEEE80211_BAND_2GHZ;
3840
3841         priv->iw_mode = NL80211_IFTYPE_STATION;
3842         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3843         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3844         priv->_agn.agg_tids_count = 0;
3845
3846         /* initialize force reset */
3847         priv->force_reset[IWL_RF_RESET].reset_duration =
3848                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3849         priv->force_reset[IWL_FW_RESET].reset_duration =
3850                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3851
3852         /* Choose which receivers/antennas to use */
3853         if (priv->cfg->ops->hcmd->set_rxon_chain)
3854                 priv->cfg->ops->hcmd->set_rxon_chain(priv,
3855                                         &priv->contexts[IWL_RXON_CTX_BSS]);
3856
3857         iwl_init_scan_params(priv);
3858
3859         /* init bt coex */
3860         if (priv->cfg->bt_params &&
3861             priv->cfg->bt_params->advanced_bt_coexist) {
3862                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
3863                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
3864                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
3865                 priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
3866                 priv->bt_duration = BT_DURATION_LIMIT_DEF;
3867                 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
3868                 priv->dynamic_agg_thresh = BT_AGG_THRESHOLD_DEF;
3869         }
3870
3871         /* Set the tx_power_user_lmt to the lowest power level
3872          * this value will get overwritten by channel max power avg
3873          * from eeprom */
3874         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3875         priv->tx_power_next = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3876
3877         ret = iwl_init_channel_map(priv);
3878         if (ret) {
3879                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3880                 goto err;
3881         }
3882
3883         ret = iwlcore_init_geos(priv);
3884         if (ret) {
3885                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3886                 goto err_free_channel_map;
3887         }
3888         iwl_init_hw_rates(priv, priv->ieee_rates);
3889
3890         return 0;
3891
3892 err_free_channel_map:
3893         iwl_free_channel_map(priv);
3894 err:
3895         return ret;
3896 }
3897
3898 static void iwl_uninit_drv(struct iwl_priv *priv)
3899 {
3900         iwl_calib_free_results(priv);
3901         iwlcore_free_geos(priv);
3902         iwl_free_channel_map(priv);
3903         kfree(priv->scan_cmd);
3904 }
3905
3906 struct ieee80211_ops iwlagn_hw_ops = {
3907         .tx = iwlagn_mac_tx,
3908         .start = iwlagn_mac_start,
3909         .stop = iwlagn_mac_stop,
3910         .add_interface = iwl_mac_add_interface,
3911         .remove_interface = iwl_mac_remove_interface,
3912         .change_interface = iwl_mac_change_interface,
3913         .config = iwlagn_mac_config,
3914         .configure_filter = iwlagn_configure_filter,
3915         .set_key = iwlagn_mac_set_key,
3916         .update_tkip_key = iwlagn_mac_update_tkip_key,
3917         .conf_tx = iwl_mac_conf_tx,
3918         .bss_info_changed = iwlagn_bss_info_changed,
3919         .ampdu_action = iwlagn_mac_ampdu_action,
3920         .hw_scan = iwl_mac_hw_scan,
3921         .sta_notify = iwlagn_mac_sta_notify,
3922         .sta_add = iwlagn_mac_sta_add,
3923         .sta_remove = iwl_mac_sta_remove,
3924         .channel_switch = iwlagn_mac_channel_switch,
3925         .flush = iwlagn_mac_flush,
3926         .tx_last_beacon = iwl_mac_tx_last_beacon,
3927 };
3928
3929 static void iwl_hw_detect(struct iwl_priv *priv)
3930 {
3931         priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
3932         priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
3933         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
3934         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
3935 }
3936
3937 static int iwl_set_hw_params(struct iwl_priv *priv)
3938 {
3939         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
3940         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
3941         if (priv->cfg->mod_params->amsdu_size_8K)
3942                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
3943         else
3944                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
3945
3946         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
3947
3948         if (priv->cfg->mod_params->disable_11n)
3949                 priv->cfg->sku &= ~IWL_SKU_N;
3950
3951         /* Device-specific setup */
3952         return priv->cfg->ops->lib->set_hw_params(priv);
3953 }
3954
3955 static const u8 iwlagn_bss_ac_to_fifo[] = {
3956         IWL_TX_FIFO_VO,
3957         IWL_TX_FIFO_VI,
3958         IWL_TX_FIFO_BE,
3959         IWL_TX_FIFO_BK,
3960 };
3961
3962 static const u8 iwlagn_bss_ac_to_queue[] = {
3963         0, 1, 2, 3,
3964 };
3965
3966 static const u8 iwlagn_pan_ac_to_fifo[] = {
3967         IWL_TX_FIFO_VO_IPAN,
3968         IWL_TX_FIFO_VI_IPAN,
3969         IWL_TX_FIFO_BE_IPAN,
3970         IWL_TX_FIFO_BK_IPAN,
3971 };
3972
3973 static const u8 iwlagn_pan_ac_to_queue[] = {
3974         7, 6, 5, 4,
3975 };
3976
3977 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3978 {
3979         int err = 0, i;
3980         struct iwl_priv *priv;
3981         struct ieee80211_hw *hw;
3982         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3983         unsigned long flags;
3984         u16 pci_cmd, num_mac;
3985
3986         /************************
3987          * 1. Allocating HW data
3988          ************************/
3989
3990         /* Disabling hardware scan means that mac80211 will perform scans
3991          * "the hard way", rather than using device's scan. */
3992         if (cfg->mod_params->disable_hw_scan) {
3993                 dev_printk(KERN_DEBUG, &(pdev->dev),
3994                         "sw scan support is deprecated\n");
3995                 iwlagn_hw_ops.hw_scan = NULL;
3996 #ifdef CONFIG_IWL4965
3997                 iwl4965_hw_ops.hw_scan = NULL;
3998 #endif
3999         }
4000
4001         hw = iwl_alloc_all(cfg);
4002         if (!hw) {
4003                 err = -ENOMEM;
4004                 goto out;
4005         }
4006         priv = hw->priv;
4007         /* At this point both hw and priv are allocated. */
4008
4009         /*
4010          * The default context is always valid,
4011          * more may be discovered when firmware
4012          * is loaded.
4013          */
4014         priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
4015
4016         for (i = 0; i < NUM_IWL_RXON_CTX; i++)
4017                 priv->contexts[i].ctxid = i;
4018
4019         priv->contexts[IWL_RXON_CTX_BSS].always_active = true;
4020         priv->contexts[IWL_RXON_CTX_BSS].is_active = true;
4021         priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
4022         priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
4023         priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
4024         priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
4025         priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
4026         priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
4027         priv->contexts[IWL_RXON_CTX_BSS].ac_to_fifo = iwlagn_bss_ac_to_fifo;
4028         priv->contexts[IWL_RXON_CTX_BSS].ac_to_queue = iwlagn_bss_ac_to_queue;
4029         priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes =
4030                 BIT(NL80211_IFTYPE_ADHOC);
4031         priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
4032                 BIT(NL80211_IFTYPE_STATION);
4033         priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;
4034         priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
4035         priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
4036         priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
4037
4038         priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON;
4039         priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd = REPLY_WIPAN_RXON_TIMING;
4040         priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd = REPLY_WIPAN_RXON_ASSOC;
4041         priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM;
4042         priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN;
4043         priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY;
4044         priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID;
4045         priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION;
4046         priv->contexts[IWL_RXON_CTX_PAN].ac_to_fifo = iwlagn_pan_ac_to_fifo;
4047         priv->contexts[IWL_RXON_CTX_PAN].ac_to_queue = iwlagn_pan_ac_to_queue;
4048         priv->contexts[IWL_RXON_CTX_PAN].mcast_queue = IWL_IPAN_MCAST_QUEUE;
4049         priv->contexts[IWL_RXON_CTX_PAN].interface_modes =
4050                 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP);
4051         priv->contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP;
4052         priv->contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA;
4053         priv->contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P;
4054
4055         BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
4056
4057         SET_IEEE80211_DEV(hw, &pdev->dev);
4058
4059         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
4060         priv->cfg = cfg;
4061         priv->pci_dev = pdev;
4062         priv->inta_mask = CSR_INI_SET_MASK;
4063
4064         /* is antenna coupling more than 35dB ? */
4065         priv->bt_ant_couple_ok =
4066                 (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
4067                 true : false;
4068
4069         /* enable/disable bt channel announcement */
4070         priv->bt_ch_announce = iwlagn_bt_ch_announce;
4071
4072         if (iwl_alloc_traffic_mem(priv))
4073                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
4074
4075         /**************************
4076          * 2. Initializing PCI bus
4077          **************************/
4078         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
4079                                 PCIE_LINK_STATE_CLKPM);
4080
4081         if (pci_enable_device(pdev)) {
4082                 err = -ENODEV;
4083                 goto out_ieee80211_free_hw;
4084         }
4085
4086         pci_set_master(pdev);
4087
4088         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
4089         if (!err)
4090                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
4091         if (err) {
4092                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4093                 if (!err)
4094                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4095                 /* both attempts failed: */
4096                 if (err) {
4097                         IWL_WARN(priv, "No suitable DMA available.\n");
4098                         goto out_pci_disable_device;
4099                 }
4100         }
4101
4102         err = pci_request_regions(pdev, DRV_NAME);
4103         if (err)
4104                 goto out_pci_disable_device;
4105
4106         pci_set_drvdata(pdev, priv);
4107
4108
4109         /***********************
4110          * 3. Read REV register
4111          ***********************/
4112         priv->hw_base = pci_iomap(pdev, 0, 0);
4113         if (!priv->hw_base) {
4114                 err = -ENODEV;
4115                 goto out_pci_release_regions;
4116         }
4117
4118         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4119                 (unsigned long long) pci_resource_len(pdev, 0));
4120         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4121
4122         /* these spin locks will be used in apm_ops.init and EEPROM access
4123          * we should init now
4124          */
4125         spin_lock_init(&priv->reg_lock);
4126         spin_lock_init(&priv->lock);
4127
4128         /*
4129          * stop and reset the on-board processor just in case it is in a
4130          * strange state ... like being left stranded by a primary kernel
4131          * and this is now the kdump kernel trying to start up
4132          */
4133         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4134
4135         iwl_hw_detect(priv);
4136         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
4137                 priv->cfg->name, priv->hw_rev);
4138
4139         /* We disable the RETRY_TIMEOUT register (0x41) to keep
4140          * PCI Tx retries from interfering with C3 CPU state */
4141         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4142
4143         iwl_prepare_card_hw(priv);
4144         if (!priv->hw_ready) {
4145                 IWL_WARN(priv, "Failed, HW not ready\n");
4146                 goto out_iounmap;
4147         }
4148
4149         /*****************
4150          * 4. Read EEPROM
4151          *****************/
4152         /* Read the EEPROM */
4153         err = iwl_eeprom_init(priv);
4154         if (err) {
4155                 IWL_ERR(priv, "Unable to init EEPROM\n");
4156                 goto out_iounmap;
4157         }
4158         err = iwl_eeprom_check_version(priv);
4159         if (err)
4160                 goto out_free_eeprom;
4161
4162         /* extract MAC Address */
4163         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
4164         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
4165         priv->hw->wiphy->addresses = priv->addresses;
4166         priv->hw->wiphy->n_addresses = 1;
4167         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
4168         if (num_mac > 1) {
4169                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
4170                        ETH_ALEN);
4171                 priv->addresses[1].addr[5]++;
4172                 priv->hw->wiphy->n_addresses++;
4173         }
4174
4175         /************************
4176          * 5. Setup HW constants
4177          ************************/
4178         if (iwl_set_hw_params(priv)) {
4179                 IWL_ERR(priv, "failed to set hw parameters\n");
4180                 goto out_free_eeprom;
4181         }
4182
4183         /*******************
4184          * 6. Setup priv
4185          *******************/
4186
4187         err = iwl_init_drv(priv);
4188         if (err)
4189                 goto out_free_eeprom;
4190         /* At this point both hw and priv are initialized. */
4191
4192         /********************
4193          * 7. Setup services
4194          ********************/
4195         spin_lock_irqsave(&priv->lock, flags);
4196         iwl_disable_interrupts(priv);
4197         spin_unlock_irqrestore(&priv->lock, flags);
4198
4199         pci_enable_msi(priv->pci_dev);
4200
4201         iwl_alloc_isr_ict(priv);
4202         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4203                           IRQF_SHARED, DRV_NAME, priv);
4204         if (err) {
4205                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4206                 goto out_disable_msi;
4207         }
4208
4209         iwl_setup_deferred_work(priv);
4210         iwl_setup_rx_handlers(priv);
4211
4212         /*********************************************
4213          * 8. Enable interrupts and read RFKILL state
4214          *********************************************/
4215
4216         /* enable interrupts if needed: hw bug w/a */
4217         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
4218         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
4219                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
4220                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
4221         }
4222
4223         iwl_enable_interrupts(priv);
4224
4225         /* If platform's RF_KILL switch is NOT set to KILL */
4226         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
4227                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4228         else
4229                 set_bit(STATUS_RF_KILL_HW, &priv->status);
4230
4231         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
4232                 test_bit(STATUS_RF_KILL_HW, &priv->status));
4233
4234         iwl_power_initialize(priv);
4235         iwl_tt_initialize(priv);
4236
4237         init_completion(&priv->_agn.firmware_loading_complete);
4238
4239         err = iwl_request_firmware(priv, true);
4240         if (err)
4241                 goto out_destroy_workqueue;
4242
4243         return 0;
4244
4245  out_destroy_workqueue:
4246         destroy_workqueue(priv->workqueue);
4247         priv->workqueue = NULL;
4248         free_irq(priv->pci_dev->irq, priv);
4249         iwl_free_isr_ict(priv);
4250  out_disable_msi:
4251         pci_disable_msi(priv->pci_dev);
4252         iwl_uninit_drv(priv);
4253  out_free_eeprom:
4254         iwl_eeprom_free(priv);
4255  out_iounmap:
4256         pci_iounmap(pdev, priv->hw_base);
4257  out_pci_release_regions:
4258         pci_set_drvdata(pdev, NULL);
4259         pci_release_regions(pdev);
4260  out_pci_disable_device:
4261         pci_disable_device(pdev);
4262  out_ieee80211_free_hw:
4263         iwl_free_traffic_mem(priv);
4264         ieee80211_free_hw(priv->hw);
4265  out:
4266         return err;
4267 }
4268
4269 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4270 {
4271         struct iwl_priv *priv = pci_get_drvdata(pdev);
4272         unsigned long flags;
4273
4274         if (!priv)
4275                 return;
4276
4277         wait_for_completion(&priv->_agn.firmware_loading_complete);
4278
4279         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4280
4281         iwl_dbgfs_unregister(priv);
4282         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4283
4284         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4285          * to be called and iwl_down since we are removing the device
4286          * we need to set STATUS_EXIT_PENDING bit.
4287          */
4288         set_bit(STATUS_EXIT_PENDING, &priv->status);
4289         if (priv->mac80211_registered) {
4290                 ieee80211_unregister_hw(priv->hw);
4291                 priv->mac80211_registered = 0;
4292         } else {
4293                 iwl_down(priv);
4294         }
4295
4296         /*
4297          * Make sure device is reset to low power before unloading driver.
4298          * This may be redundant with iwl_down(), but there are paths to
4299          * run iwl_down() without calling apm_ops.stop(), and there are
4300          * paths to avoid running iwl_down() at all before leaving driver.
4301          * This (inexpensive) call *makes sure* device is reset.
4302          */
4303         iwl_apm_stop(priv);
4304
4305         iwl_tt_exit(priv);
4306
4307         /* make sure we flush any pending irq or
4308          * tasklet for the driver
4309          */
4310         spin_lock_irqsave(&priv->lock, flags);
4311         iwl_disable_interrupts(priv);
4312         spin_unlock_irqrestore(&priv->lock, flags);
4313
4314         iwl_synchronize_irq(priv);
4315
4316         iwl_dealloc_ucode_pci(priv);
4317
4318         if (priv->rxq.bd)
4319                 iwlagn_rx_queue_free(priv, &priv->rxq);
4320         iwlagn_hw_txq_ctx_free(priv);
4321
4322         iwl_eeprom_free(priv);
4323
4324
4325         /*netif_stop_queue(dev); */
4326         flush_workqueue(priv->workqueue);
4327
4328         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4329          * priv->workqueue... so we can't take down the workqueue
4330          * until now... */
4331         destroy_workqueue(priv->workqueue);
4332         priv->workqueue = NULL;
4333         iwl_free_traffic_mem(priv);
4334
4335         free_irq(priv->pci_dev->irq, priv);
4336         pci_disable_msi(priv->pci_dev);
4337         pci_iounmap(pdev, priv->hw_base);
4338         pci_release_regions(pdev);
4339         pci_disable_device(pdev);
4340         pci_set_drvdata(pdev, NULL);
4341
4342         iwl_uninit_drv(priv);
4343
4344         iwl_free_isr_ict(priv);
4345
4346         dev_kfree_skb(priv->beacon_skb);
4347
4348         ieee80211_free_hw(priv->hw);
4349 }
4350
4351
4352 /*****************************************************************************
4353  *
4354  * driver and module entry point
4355  *
4356  *****************************************************************************/
4357
4358 /* Hardware specific file defines the PCI IDs table for that hardware module */
4359 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4360 #ifdef CONFIG_IWL4965
4361         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4362         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4363 #endif /* CONFIG_IWL4965 */
4364 #ifdef CONFIG_IWL5000
4365 /* 5100 Series WiFi */
4366         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4367         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4368         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4369         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4370         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4371         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4372         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4373         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4374         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4375         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4376         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4377         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4378         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4379         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4380         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4381         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4382         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4383         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4384         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4385         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4386         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4387         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4388         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4389         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4390
4391 /* 5300 Series WiFi */
4392         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4393         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4394         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4395         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4396         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4397         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4398         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4399         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4400         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4401         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4402         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4403         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4404
4405 /* 5350 Series WiFi/WiMax */
4406         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4407         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4408         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4409
4410 /* 5150 Series Wifi/WiMax */
4411         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4412         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4413         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4414         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4415         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4416         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4417
4418         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4419         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4420         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4421         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4422
4423 /* 6x00 Series */
4424         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4425         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4426         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4427         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4428         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4429         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4430         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4431         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4432         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4433         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4434
4435 /* 6x00 Series Gen2a */
4436         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4437         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4438         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4439         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4440         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4441         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4442         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4443
4444 /* 6x00 Series Gen2b */
4445         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4446         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4447         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4448         {IWL_PCI_DEVICE(0x008A, 0x5327, iwl6000g2b_bg_cfg)},
4449         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4450         {IWL_PCI_DEVICE(0x008B, 0x5317, iwl6000g2b_bg_cfg)},
4451         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4452         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4453         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4454         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4455         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4456         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4457         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4458         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4459         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4460         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4461
4462 /* 6x50 WiFi/WiMax Series */
4463         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4464         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4465         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4466         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4467         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4468         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4469
4470 /* 6x50 WiFi/WiMax Series Gen2 */
4471         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6050g2_bgn_cfg)},
4472         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6050g2_bgn_cfg)},
4473         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6050g2_bgn_cfg)},
4474         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6050g2_bgn_cfg)},
4475         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6050g2_bgn_cfg)},
4476         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6050g2_bgn_cfg)},
4477
4478 /* 1000 Series WiFi */
4479         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4480         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4481         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4482         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4483         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4484         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4485         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4486         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4487         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4488         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4489         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4490         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4491
4492 /* 100 Series WiFi */
4493         {IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg)},
4494         {IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg)},
4495         {IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg)},
4496         {IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg)},
4497         {IWL_PCI_DEVICE(0x08AE, 0x1017, iwl100_bg_cfg)},
4498
4499 /* 130 Series WiFi */
4500         {IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg)},
4501         {IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg)},
4502         {IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg)},
4503         {IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg)},
4504         {IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg)},
4505         {IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg)},
4506
4507 #endif /* CONFIG_IWL5000 */
4508
4509         {0}
4510 };
4511 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4512
4513 static struct pci_driver iwl_driver = {
4514         .name = DRV_NAME,
4515         .id_table = iwl_hw_card_ids,
4516         .probe = iwl_pci_probe,
4517         .remove = __devexit_p(iwl_pci_remove),
4518         .driver.pm = IWL_PM_OPS,
4519 };
4520
4521 static int __init iwl_init(void)
4522 {
4523
4524         int ret;
4525         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4526         pr_info(DRV_COPYRIGHT "\n");
4527
4528         ret = iwlagn_rate_control_register();
4529         if (ret) {
4530                 pr_err("Unable to register rate control algorithm: %d\n", ret);
4531                 return ret;
4532         }
4533
4534         ret = pci_register_driver(&iwl_driver);
4535         if (ret) {
4536                 pr_err("Unable to initialize PCI module\n");
4537                 goto error_register;
4538         }
4539
4540         return ret;
4541
4542 error_register:
4543         iwlagn_rate_control_unregister();
4544         return ret;
4545 }
4546
4547 static void __exit iwl_exit(void)
4548 {
4549         pci_unregister_driver(&iwl_driver);
4550         iwlagn_rate_control_unregister();
4551 }
4552
4553 module_exit(iwl_exit);
4554 module_init(iwl_init);
4555
4556 #ifdef CONFIG_IWLWIFI_DEBUG
4557 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4558 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4559 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4560 MODULE_PARM_DESC(debug, "debug output mask");
4561 #endif
4562
4563 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4564 MODULE_PARM_DESC(swcrypto50,
4565                  "using crypto in software (default 0 [hardware]) (deprecated)");
4566 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4567 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4568 module_param_named(queues_num50,
4569                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4570 MODULE_PARM_DESC(queues_num50,
4571                  "number of hw queues in 50xx series (deprecated)");
4572 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4573 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4574 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4575 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4576 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4577 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4578 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4579                    int, S_IRUGO);
4580 MODULE_PARM_DESC(amsdu_size_8K50,
4581                  "enable 8K amsdu size in 50XX series (deprecated)");
4582 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4583                    int, S_IRUGO);
4584 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4585 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4586 MODULE_PARM_DESC(fw_restart50,
4587                  "restart firmware in case of error (deprecated)");
4588 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4589 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4590 module_param_named(
4591         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4592 MODULE_PARM_DESC(disable_hw_scan,
4593                  "disable hardware scanning (default 0) (deprecated)");
4594
4595 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4596                    S_IRUGO);
4597 MODULE_PARM_DESC(ucode_alternative,
4598                  "specify ucode alternative to use from ucode file");
4599
4600 module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
4601 MODULE_PARM_DESC(antenna_coupling,
4602                  "specify antenna coupling in dB (defualt: 0 dB)");
4603
4604 module_param_named(bt_ch_announce, iwlagn_bt_ch_announce, bool, S_IRUGO);
4605 MODULE_PARM_DESC(bt_ch_announce,
4606                  "Enable BT channel announcement mode (default: enable)");