drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31
  32 #include <linux/kernel.h>
  33 #include <linux/module.h>
  34 #include <linux/init.h>
  35 #include <linux/pci.h>
  36 #include <linux/pci-aspm.h>
  37 #include <linux/slab.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/delay.h>
  40 #include <linux/sched.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/netdevice.h>
  43 #include <linux/wireless.h>
  44 #include <linux/firmware.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/if_arp.h>
  47
  48 #include <net/mac80211.h>
  49
  50 #include <asm/div64.h>
  51
  52 #define DRV_NAME        "iwlagn"
  53
  54 #include "iwl-eeprom.h"
  55 #include "iwl-dev.h"
  56 #include "iwl-core.h"
  57 #include "iwl-io.h"
  58 #include "iwl-helpers.h"
  59 #include "iwl-sta.h"
  60 #include "iwl-agn-calib.h"
  61 #include "iwl-agn.h"
  62
  63
  64 /******************************************************************************
  65  *
  66  * module boiler plate
  67  *
  68  ******************************************************************************/
  69
  70 /*
  71  * module name, copyright, version, etc.
  72  */
  73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  74
  75 #ifdef CONFIG_IWLWIFI_DEBUG
  76 #define VD "d"
  77 #else
  78 #define VD
  79 #endif
  80
  81 #define DRV_VERSION     IWLWIFI_VERSION VD
  82
  83
  84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  85 MODULE_VERSION(DRV_VERSION);
  86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  87 MODULE_LICENSE("GPL");
  88 MODULE_ALIAS("iwl4965");
  89
  90 static int iwlagn_ant_coupling;
  91 static bool iwlagn_bt_ch_announce = 1;
  92
  93 /**
  94  * iwlagn_commit_rxon - commit staging_rxon to hardware
  95  *
  96  * The RXON command in staging_rxon is committed to the hardware and
  97  * the active_rxon structure is updated with the new data.  This
  98  * function correctly transitions out of the RXON_ASSOC_MSK state if
  99  * a HW tune is required based on the RXON structure changes.
 100  */
 101 int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
 102 {
 103         /* cast away the const for active_rxon in this function */
 104         struct iwl_rxon_cmd *active_rxon = (void *)&ctx->active;
 105         int ret;
 106         bool new_assoc =
 107                 !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
 108         bool old_assoc = !!(ctx->active.filter_flags & RXON_FILTER_ASSOC_MSK);
 109
 110         if (!iwl_is_alive(priv))
 111                 return -EBUSY;
 112
 113         if (!ctx->is_active)
 114                 return 0;
 115
 116         /* always get timestamp with Rx frame */
 117         ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK;
 118
 119         ret = iwl_check_rxon_cmd(priv, ctx);
 120         if (ret) {
 121                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 122                 return -EINVAL;
 123         }
 124
 125         /*
 126          * receive commit_rxon request
 127          * abort any previous channel switch if still in process
 128          */
 129         if (priv->switch_rxon.switch_in_progress &&
 130             (priv->switch_rxon.channel != ctx->staging.channel)) {
 131                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 132                       le16_to_cpu(priv->switch_rxon.channel));
 133                 iwl_chswitch_done(priv, false);
 134         }
 135
 136         /* If we don't need to send a full RXON, we can use
 137          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 138          * and other flags for the current radio configuration. */
 139         if (!iwl_full_rxon_required(priv, ctx)) {
 140                 ret = iwl_send_rxon_assoc(priv, ctx);
 141                 if (ret) {
 142                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 143                         return ret;
 144                 }
 145
 146                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
 147                 iwl_print_rx_config_cmd(priv, ctx);
 148                 return 0;
 149         }
 150
 151         /* If we are currently associated and the new config requires
 152          * an RXON_ASSOC and the new config wants the associated mask enabled,
 153          * we must clear the associated from the active configuration
 154          * before we apply the new config */
 155         if (iwl_is_associated_ctx(ctx) && new_assoc) {
 156                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 157                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 158
 159                 ret = iwl_send_cmd_pdu(priv, ctx->rxon_cmd,
 160                                        sizeof(struct iwl_rxon_cmd),
 161                                        active_rxon);
 162
 163                 /* If the mask clearing failed then we set
 164                  * active_rxon back to what it was previously */
 165                 if (ret) {
 166                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 167                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 168                         return ret;
 169                 }
 170                 iwl_clear_ucode_stations(priv, ctx);
 171                 iwl_restore_stations(priv, ctx);
 172                 ret = iwl_restore_default_wep_keys(priv, ctx);
 173                 if (ret) {
 174                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 175                         return ret;
 176                 }
 177         }
 178
 179         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 180                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 181                        "* channel = %d\n"
 182                        "* bssid = %pM\n",
 183                        (new_assoc ? "" : "out"),
 184                        le16_to_cpu(ctx->staging.channel),
 185                        ctx->staging.bssid_addr);
 186
 187         iwl_set_rxon_hwcrypto(priv, ctx, !priv->cfg->mod_params->sw_crypto);
 188
 189         if (!old_assoc) {
 190                 /*
 191                  * First of all, before setting associated, we need to
 192                  * send RXON timing so the device knows about the DTIM
 193                  * period and other timing values
 194                  */
 195                 ret = iwl_send_rxon_timing(priv, ctx);
 196                 if (ret) {
 197                         IWL_ERR(priv, "Error setting RXON timing!\n");
 198                         return ret;
 199                 }
 200         }
 201
 202         if (priv->cfg->ops->hcmd->set_pan_params) {
 203                 ret = priv->cfg->ops->hcmd->set_pan_params(priv);
 204                 if (ret)
 205                         return ret;
 206         }
 207
 208         /* Apply the new configuration
 209          * RXON unassoc clears the station table in uCode so restoration of
 210          * stations is needed after it (the RXON command) completes
 211          */
 212         if (!new_assoc) {
 213                 ret = iwl_send_cmd_pdu(priv, ctx->rxon_cmd,
 214                               sizeof(struct iwl_rxon_cmd), &ctx->staging);
 215                 if (ret) {
 216                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 217                         return ret;
 218                 }
 219                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
 220                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
 221                 iwl_clear_ucode_stations(priv, ctx);
 222                 iwl_restore_stations(priv, ctx);
 223                 ret = iwl_restore_default_wep_keys(priv, ctx);
 224                 if (ret) {
 225                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 226                         return ret;
 227                 }
 228         }
 229         if (new_assoc) {
 230                 priv->start_calib = 0;
 231                 /* Apply the new configuration
 232                  * RXON assoc doesn't clear the station table in uCode,
 233                  */
 234                 ret = iwl_send_cmd_pdu(priv, ctx->rxon_cmd,
 235                               sizeof(struct iwl_rxon_cmd), &ctx->staging);
 236                 if (ret) {
 237                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 238                         return ret;
 239                 }
 240                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
 241         }
 242         iwl_print_rx_config_cmd(priv, ctx);
 243
 244         iwl_init_sensitivity(priv);
 245
 246         /* If we issue a new RXON command which required a tune then we must
 247          * send a new TXPOWER command or we won't be able to Tx any frames */
 248         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 249         if (ret) {
 250                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 251                 return ret;
 252         }
 253
 254         return 0;
 255 }
 256
 257 void iwl_update_chain_flags(struct iwl_priv *priv)
 258 {
 259         struct iwl_rxon_context *ctx;
 260
 261         if (priv->cfg->ops->hcmd->set_rxon_chain) {
 262                 for_each_context(priv, ctx) {
 263                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
 264                         iwlcore_commit_rxon(priv, ctx);
 265                 }
 266         }
 267 }
 268
 269 static void iwl_clear_free_frames(struct iwl_priv *priv)
 270 {
 271         struct list_head *element;
 272
 273         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 274                        priv->frames_count);
 275
 276         while (!list_empty(&priv->free_frames)) {
 277                 element = priv->free_frames.next;
 278                 list_del(element);
 279                 kfree(list_entry(element, struct iwl_frame, list));
 280                 priv->frames_count--;
 281         }
 282
 283         if (priv->frames_count) {
 284                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 285                             priv->frames_count);
 286                 priv->frames_count = 0;
 287         }
 288 }
 289
 290 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 291 {
 292         struct iwl_frame *frame;
 293         struct list_head *element;
 294         if (list_empty(&priv->free_frames)) {
 295                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 296                 if (!frame) {
 297                         IWL_ERR(priv, "Could not allocate frame!\n");
 298                         return NULL;
 299                 }
 300
 301                 priv->frames_count++;
 302                 return frame;
 303         }
 304
 305         element = priv->free_frames.next;
 306         list_del(element);
 307         return list_entry(element, struct iwl_frame, list);
 308 }
 309
 310 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 311 {
 312         memset(frame, 0, sizeof(*frame));
 313         list_add(&frame->list, &priv->free_frames);
 314 }
 315
 316 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 317                                  struct ieee80211_hdr *hdr,
 318                                  int left)
 319 {
 320         lockdep_assert_held(&priv->mutex);
 321
 322         if (!priv->beacon_skb)
 323                 return 0;
 324
 325         if (priv->beacon_skb->len > left)
 326                 return 0;
 327
 328         memcpy(hdr, priv->beacon_skb->data, priv->beacon_skb->len);
 329
 330         return priv->beacon_skb->len;
 331 }
 332
 333 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 334 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 335                                struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 336                                u8 *beacon, u32 frame_size)
 337 {
 338         u16 tim_idx;
 339         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 340
 341         /*
 342          * The index is relative to frame start but we start looking at the
 343          * variable-length part of the beacon.
 344          */
 345         tim_idx = mgmt->u.beacon.variable - beacon;
 346
 347         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 348         while ((tim_idx < (frame_size - 2)) &&
 349                         (beacon[tim_idx] != WLAN_EID_TIM))
 350                 tim_idx += beacon[tim_idx+1] + 2;
 351
 352         /* If TIM field was found, set variables */
 353         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 354                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 355                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 356         } else
 357                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 358 }
 359
 360 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 361                                        struct iwl_frame *frame)
 362 {
 363         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 364         u32 frame_size;
 365         u32 rate_flags;
 366         u32 rate;
 367         /*
 368          * We have to set up the TX command, the TX Beacon command, and the
 369          * beacon contents.
 370          */
 371
 372         lockdep_assert_held(&priv->mutex);
 373
 374         if (!priv->beacon_ctx) {
 375                 IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
 376                 return 0;
 377         }
 378
 379         /* Initialize memory */
 380         tx_beacon_cmd = &frame->u.beacon;
 381         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 382
 383         /* Set up TX beacon contents */
 384         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 385                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 386         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 387                 return 0;
 388         if (!frame_size)
 389                 return 0;
 390
 391         /* Set up TX command fields */
 392         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 393         tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
 394         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 395         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 396                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 397
 398         /* Set up TX beacon command fields */
 399         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 400                            frame_size);
 401
 402         /* Set up packet rate and flags */
 403         rate = iwl_rate_get_lowest_plcp(priv, priv->beacon_ctx);
 404         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
 405                                               priv->hw_params.valid_tx_ant);
 406         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 407         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 408                 rate_flags |= RATE_MCS_CCK_MSK;
 409         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 410                         rate_flags);
 411
 412         return sizeof(*tx_beacon_cmd) + frame_size;
 413 }
 414 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 415 {
 416         struct iwl_frame *frame;
 417         unsigned int frame_size;
 418         int rc;
 419
 420         frame = iwl_get_free_frame(priv);
 421         if (!frame) {
 422                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 423                           "command.\n");
 424                 return -ENOMEM;
 425         }
 426
 427         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 428         if (!frame_size) {
 429                 IWL_ERR(priv, "Error configuring the beacon command\n");
 430                 iwl_free_frame(priv, frame);
 431                 return -EINVAL;
 432         }
 433
 434         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 435                               &frame->u.cmd[0]);
 436
 437         iwl_free_frame(priv, frame);
 438
 439         return rc;
 440 }
 441
 442 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 443 {
 444         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 445
 446         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 447         if (sizeof(dma_addr_t) > sizeof(u32))
 448                 addr |=
 449                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 450
 451         return addr;
 452 }
 453
 454 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 455 {
 456         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 457
 458         return le16_to_cpu(tb->hi_n_len) >> 4;
 459 }
 460
 461 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 462                                   dma_addr_t addr, u16 len)
 463 {
 464         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 465         u16 hi_n_len = len << 4;
 466
 467         put_unaligned_le32(addr, &tb->lo);
 468         if (sizeof(dma_addr_t) > sizeof(u32))
 469                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 470
 471         tb->hi_n_len = cpu_to_le16(hi_n_len);
 472
 473         tfd->num_tbs = idx + 1;
 474 }
 475
 476 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 477 {
 478         return tfd->num_tbs & 0x1f;
 479 }
 480
 481 /**
 482  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 483  * @priv - driver private data
 484  * @txq - tx queue
 485  *
 486  * Does NOT advance any TFD circular buffer read/write indexes
 487  * Does NOT free the TFD itself (which is within circular buffer)
 488  */
 489 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 490 {
 491         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 492         struct iwl_tfd *tfd;
 493         struct pci_dev *dev = priv->pci_dev;
 494         int index = txq->q.read_ptr;
 495         int i;
 496         int num_tbs;
 497
 498         tfd = &tfd_tmp[index];
 499
 500         /* Sanity check on number of chunks */
 501         num_tbs = iwl_tfd_get_num_tbs(tfd);
 502
 503         if (num_tbs >= IWL_NUM_OF_TBS) {
 504                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 505                 /* @todo issue fatal error, it is quite serious situation */
 506                 return;
 507         }
 508
 509         /* Unmap tx_cmd */
 510         if (num_tbs)
 511                 pci_unmap_single(dev,
 512                                 dma_unmap_addr(&txq->meta[index], mapping),
 513                                 dma_unmap_len(&txq->meta[index], len),
 514                                 PCI_DMA_BIDIRECTIONAL);
 515
 516         /* Unmap chunks, if any. */
 517         for (i = 1; i < num_tbs; i++)
 518                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 519                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 520
 521         /* free SKB */
 522         if (txq->txb) {
 523                 struct sk_buff *skb;
 524
 525                 skb = txq->txb[txq->q.read_ptr].skb;
 526
 527                 /* can be called from irqs-disabled context */
 528                 if (skb) {
 529                         dev_kfree_skb_any(skb);
 530                         txq->txb[txq->q.read_ptr].skb = NULL;
 531                 }
 532         }
 533 }
 534
 535 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 536                                  struct iwl_tx_queue *txq,
 537                                  dma_addr_t addr, u16 len,
 538                                  u8 reset, u8 pad)
 539 {
 540         struct iwl_queue *q;
 541         struct iwl_tfd *tfd, *tfd_tmp;
 542         u32 num_tbs;
 543
 544         q = &txq->q;
 545         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 546         tfd = &tfd_tmp[q->write_ptr];
 547
 548         if (reset)
 549                 memset(tfd, 0, sizeof(*tfd));
 550
 551         num_tbs = iwl_tfd_get_num_tbs(tfd);
 552
 553         /* Each TFD can point to a maximum 20 Tx buffers */
 554         if (num_tbs >= IWL_NUM_OF_TBS) {
 555                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 556                           IWL_NUM_OF_TBS);
 557                 return -EINVAL;
 558         }
 559
 560         BUG_ON(addr & ~DMA_BIT_MASK(36));
 561         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 562                 IWL_ERR(priv, "Unaligned address = %llx\n",
 563                           (unsigned long long)addr);
 564
 565         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 566
 567         return 0;
 568 }
 569
 570 /*
 571  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 572  * given Tx queue, and enable the DMA channel used for that queue.
 573  *
 574  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 575  * channels supported in hardware.
 576  */
 577 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 578                          struct iwl_tx_queue *txq)
 579 {
 580         int txq_id = txq->q.id;
 581
 582         /* Circular buffer (TFD queue in DRAM) physical base address */
 583         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 584                              txq->q.dma_addr >> 8);
 585
 586         return 0;
 587 }
 588
 589 /******************************************************************************
 590  *
 591  * Generic RX handler implementations
 592  *
 593  ******************************************************************************/
 594 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 595                                 struct iwl_rx_mem_buffer *rxb)
 596 {
 597         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 598         struct iwl_alive_resp *palive;
 599         struct delayed_work *pwork;
 600
 601         palive = &pkt->u.alive_frame;
 602
 603         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 604                        "0x%01X 0x%01X\n",
 605                        palive->is_valid, palive->ver_type,
 606                        palive->ver_subtype);
 607
 608         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 609                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 610                 memcpy(&priv->card_alive_init,
 611                        &pkt->u.alive_frame,
 612                        sizeof(struct iwl_init_alive_resp));
 613                 pwork = &priv->init_alive_start;
 614         } else {
 615                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 616                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 617                        sizeof(struct iwl_alive_resp));
 618                 pwork = &priv->alive_start;
 619         }
 620
 621         /* We delay the ALIVE response by 5ms to
 622          * give the HW RF Kill time to activate... */
 623         if (palive->is_valid == UCODE_VALID_OK)
 624                 queue_delayed_work(priv->workqueue, pwork,
 625                                    msecs_to_jiffies(5));
 626         else
 627                 IWL_WARN(priv, "uCode did not respond OK.\n");
 628 }
 629
 630 static void iwl_bg_beacon_update(struct work_struct *work)
 631 {
 632         struct iwl_priv *priv =
 633                 container_of(work, struct iwl_priv, beacon_update);
 634         struct sk_buff *beacon;
 635
 636         mutex_lock(&priv->mutex);
 637         if (!priv->beacon_ctx) {
 638                 IWL_ERR(priv, "updating beacon w/o beacon context!\n");
 639                 goto out;
 640         }
 641
 642         if (priv->beacon_ctx->vif->type != NL80211_IFTYPE_AP) {
 643                 /*
 644                  * The ucode will send beacon notifications even in
 645                  * IBSS mode, but we don't want to process them. But
 646                  * we need to defer the type check to here due to
 647                  * requiring locking around the beacon_ctx access.
 648                  */
 649                 goto out;
 650         }
 651
 652         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 653         beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif);
 654         if (!beacon) {
 655                 IWL_ERR(priv, "update beacon failed -- keeping old\n");
 656                 goto out;
 657         }
 658
 659         /* new beacon skb is allocated every time; dispose previous.*/
 660         dev_kfree_skb(priv->beacon_skb);
 661
 662         priv->beacon_skb = beacon;
 663
 664         iwl_send_beacon_cmd(priv);
 665  out:
 666         mutex_unlock(&priv->mutex);
 667 }
 668
 669 static void iwl_bg_bt_runtime_config(struct work_struct *work)
 670 {
 671         struct iwl_priv *priv =
 672                 container_of(work, struct iwl_priv, bt_runtime_config);
 673
 674         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 675                 return;
 676
 677         /* dont send host command if rf-kill is on */
 678         if (!iwl_is_ready_rf(priv))
 679                 return;
 680         priv->cfg->ops->hcmd->send_bt_config(priv);
 681 }
 682
 683 static void iwl_bg_bt_full_concurrency(struct work_struct *work)
 684 {
 685         struct iwl_priv *priv =
 686                 container_of(work, struct iwl_priv, bt_full_concurrency);
 687         struct iwl_rxon_context *ctx;
 688
 689         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 690                 return;
 691
 692         /* dont send host command if rf-kill is on */
 693         if (!iwl_is_ready_rf(priv))
 694                 return;
 695
 696         IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
 697                        priv->bt_full_concurrent ?
 698                        "full concurrency" : "3-wire");
 699
 700         /*
 701          * LQ & RXON updated cmds must be sent before BT Config cmd
 702          * to avoid 3-wire collisions
 703          */
 704         mutex_lock(&priv->mutex);
 705         for_each_context(priv, ctx) {
 706                 if (priv->cfg->ops->hcmd->set_rxon_chain)
 707                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
 708                 iwlcore_commit_rxon(priv, ctx);
 709         }
 710         mutex_unlock(&priv->mutex);
 711
 712         priv->cfg->ops->hcmd->send_bt_config(priv);
 713 }
 714
 715 /**
 716  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 717  *
 718  * This callback is provided in order to send a statistics request.
 719  *
 720  * This timer function is continually reset to execute within
 721  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 722  * was received.  We need to ensure we receive the statistics in order
 723  * to update the temperature used for calibrating the TXPOWER.
 724  */
 725 static void iwl_bg_statistics_periodic(unsigned long data)
 726 {
 727         struct iwl_priv *priv = (struct iwl_priv *)data;
 728
 729         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 730                 return;
 731
 732         /* dont send host command if rf-kill is on */
 733         if (!iwl_is_ready_rf(priv))
 734                 return;
 735
 736         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 737 }
 738
 739
 740 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 741                                         u32 start_idx, u32 num_events,
 742                                         u32 mode)
 743 {
 744         u32 i;
 745         u32 ptr;        /* SRAM byte address of log data */
 746         u32 ev, time, data; /* event log data */
 747         unsigned long reg_flags;
 748
 749         if (mode == 0)
 750                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 751         else
 752                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 753
 754         /* Make sure device is powered up for SRAM reads */
 755         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 756         if (iwl_grab_nic_access(priv)) {
 757                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 758                 return;
 759         }
 760
 761         /* Set starting address; reads will auto-increment */
 762         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 763         rmb();
 764
 765         /*
 766          * "time" is actually "data" for mode 0 (no timestamp).
 767          * place event id # at far right for easier visual parsing.
 768          */
 769         for (i = 0; i < num_events; i++) {
 770                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 771                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 772                 if (mode == 0) {
 773                         trace_iwlwifi_dev_ucode_cont_event(priv,
 774                                                         0, time, ev);
 775                 } else {
 776                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 777                         trace_iwlwifi_dev_ucode_cont_event(priv,
 778                                                 time, data, ev);
 779                 }
 780         }
 781         /* Allow device to power down */
 782         iwl_release_nic_access(priv);
 783         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 784 }
 785
 786 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 787 {
 788         u32 capacity;   /* event log capacity in # entries */
 789         u32 base;       /* SRAM byte address of event log header */
 790         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 791         u32 num_wraps;  /* # times uCode wrapped to top of log */
 792         u32 next_entry; /* index of next entry to be written by uCode */
 793
 794         if (priv->ucode_type == UCODE_INIT)
 795                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 796         else
 797                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 798         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 799                 capacity = iwl_read_targ_mem(priv, base);
 800                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 801                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 802                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 803         } else
 804                 return;
 805
 806         if (num_wraps == priv->event_log.num_wraps) {
 807                 iwl_print_cont_event_trace(priv,
 808                                        base, priv->event_log.next_entry,
 809                                        next_entry - priv->event_log.next_entry,
 810                                        mode);
 811                 priv->event_log.non_wraps_count++;
 812         } else {
 813                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 814                         priv->event_log.wraps_more_count++;
 815                 else
 816                         priv->event_log.wraps_once_count++;
 817                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 818                                 num_wraps - priv->event_log.num_wraps,
 819                                 next_entry, priv->event_log.next_entry);
 820                 if (next_entry < priv->event_log.next_entry) {
 821                         iwl_print_cont_event_trace(priv, base,
 822                                priv->event_log.next_entry,
 823                                capacity - priv->event_log.next_entry,
 824                                mode);
 825
 826                         iwl_print_cont_event_trace(priv, base, 0,
 827                                 next_entry, mode);
 828                 } else {
 829                         iwl_print_cont_event_trace(priv, base,
 830                                next_entry, capacity - next_entry,
 831                                mode);
 832
 833                         iwl_print_cont_event_trace(priv, base, 0,
 834                                 next_entry, mode);
 835                 }
 836         }
 837         priv->event_log.num_wraps = num_wraps;
 838         priv->event_log.next_entry = next_entry;
 839 }
 840
 841 /**
 842  * iwl_bg_ucode_trace - Timer callback to log ucode event
 843  *
 844  * The timer is continually set to execute every
 845  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 846  * this function is to perform continuous uCode event logging operation
 847  * if enabled
 848  */
 849 static void iwl_bg_ucode_trace(unsigned long data)
 850 {
 851         struct iwl_priv *priv = (struct iwl_priv *)data;
 852
 853         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 854                 return;
 855
 856         if (priv->event_log.ucode_trace) {
 857                 iwl_continuous_event_trace(priv);
 858                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 859                 mod_timer(&priv->ucode_trace,
 860                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 861         }
 862 }
 863
 864 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 865                                 struct iwl_rx_mem_buffer *rxb)
 866 {
 867         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 868         struct iwl4965_beacon_notif *beacon =
 869                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 870 #ifdef CONFIG_IWLWIFI_DEBUG
 871         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 872
 873         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 874                 "tsf %d %d rate %d\n",
 875                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 876                 beacon->beacon_notify_hdr.failure_frame,
 877                 le32_to_cpu(beacon->ibss_mgr_status),
 878                 le32_to_cpu(beacon->high_tsf),
 879                 le32_to_cpu(beacon->low_tsf), rate);
 880 #endif
 881
 882         priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
 883
 884         if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
 885                 queue_work(priv->workqueue, &priv->beacon_update);
 886 }
 887
 888 /* Handle notification from uCode that card's power state is changing
 889  * due to software, hardware, or critical temperature RFKILL */
 890 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 891                                     struct iwl_rx_mem_buffer *rxb)
 892 {
 893         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 894         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 895         unsigned long status = priv->status;
 896
 897         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 898                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 899                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 900                           (flags & CT_CARD_DISABLED) ?
 901                           "Reached" : "Not reached");
 902
 903         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 904                      CT_CARD_DISABLED)) {
 905
 906                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 907                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 908
 909                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 910                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 911
 912                 if (!(flags & RXON_CARD_DISABLED)) {
 913                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 914                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 915                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 916                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 917                 }
 918                 if (flags & CT_CARD_DISABLED)
 919                         iwl_tt_enter_ct_kill(priv);
 920         }
 921         if (!(flags & CT_CARD_DISABLED))
 922                 iwl_tt_exit_ct_kill(priv);
 923
 924         if (flags & HW_CARD_DISABLED)
 925                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 926         else
 927                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 928
 929
 930         if (!(flags & RXON_CARD_DISABLED))
 931                 iwl_scan_cancel(priv);
 932
 933         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 934              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 935                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 936                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 937         else
 938                 wake_up_interruptible(&priv->wait_command_queue);
 939 }
 940
 941 static void iwl_bg_tx_flush(struct work_struct *work)
 942 {
 943         struct iwl_priv *priv =
 944                 container_of(work, struct iwl_priv, tx_flush);
 945
 946         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 947                 return;
 948
 949         /* do nothing if rf-kill is on */
 950         if (!iwl_is_ready_rf(priv))
 951                 return;
 952
 953         if (priv->cfg->ops->lib->txfifo_flush) {
 954                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
 955                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
 956         }
 957 }
 958
 959 /**
 960  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 961  *
 962  * Setup the RX handlers for each of the reply types sent from the uCode
 963  * to the host.
 964  *
 965  * This function chains into the hardware specific files for them to setup
 966  * any hardware specific handlers as well.
 967  */
 968 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 969 {
 970         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 971         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 972         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 973         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 974                         iwl_rx_spectrum_measure_notif;
 975         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 976         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 977             iwl_rx_pm_debug_statistics_notif;
 978         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 979
 980         /*
 981          * The same handler is used for both the REPLY to a discrete
 982          * statistics request from the host as well as for the periodic
 983          * statistics notifications (after received beacons) from the uCode.
 984          */
 985         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 986         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 987
 988         iwl_setup_rx_scan_handlers(priv);
 989
 990         /* status change handler */
 991         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 992
 993         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 994             iwl_rx_missed_beacon_notif;
 995         /* Rx handlers */
 996         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 997         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 998         /* block ack */
 999         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
1000         /* Set up hardware specific Rx handlers */
1001         priv->cfg->ops->lib->rx_handler_setup(priv);
1002 }
1003
1004 /**
1005  * iwl_rx_handle - Main entry function for receiving responses from uCode
1006  *
1007  * Uses the priv->rx_handlers callback function array to invoke
1008  * the appropriate handlers, including command responses,
1009  * frame-received notifications, and other notifications.
1010  */
1011 void iwl_rx_handle(struct iwl_priv *priv)
1012 {
1013         struct iwl_rx_mem_buffer *rxb;
1014         struct iwl_rx_packet *pkt;
1015         struct iwl_rx_queue *rxq = &priv->rxq;
1016         u32 r, i;
1017         int reclaim;
1018         unsigned long flags;
1019         u8 fill_rx = 0;
1020         u32 count = 8;
1021         int total_empty;
1022
1023         /* uCode's read index (stored in shared DRAM) indicates the last Rx
1024          * buffer that the driver may process (last buffer filled by ucode). */
1025         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
1026         i = rxq->read;
1027
1028         /* Rx interrupt, but nothing sent from uCode */
1029         if (i == r)
1030                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1031
1032         /* calculate total frames need to be restock after handling RX */
1033         total_empty = r - rxq->write_actual;
1034         if (total_empty < 0)
1035                 total_empty += RX_QUEUE_SIZE;
1036
1037         if (total_empty > (RX_QUEUE_SIZE / 2))
1038                 fill_rx = 1;
1039
1040         while (i != r) {
1041                 int len;
1042
1043                 rxb = rxq->queue[i];
1044
1045                 /* If an RXB doesn't have a Rx queue slot associated with it,
1046                  * then a bug has been introduced in the queue refilling
1047                  * routines -- catch it here */
1048                 BUG_ON(rxb == NULL);
1049
1050                 rxq->queue[i] = NULL;
1051
1052                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1053                                PAGE_SIZE << priv->hw_params.rx_page_order,
1054                                PCI_DMA_FROMDEVICE);
1055                 pkt = rxb_addr(rxb);
1056
1057                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
1058                 len += sizeof(u32); /* account for status word */
1059                 trace_iwlwifi_dev_rx(priv, pkt, len);
1060
1061                 /* Reclaim a command buffer only if this packet is a response
1062                  *   to a (driver-originated) command.
1063                  * If the packet (e.g. Rx frame) originated from uCode,
1064                  *   there is no command buffer to reclaim.
1065                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1066                  *   but apparently a few don't get set; catch them here. */
1067                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1068                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
1069                         (pkt->hdr.cmd != REPLY_RX) &&
1070                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
1071                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
1072                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1073                         (pkt->hdr.cmd != REPLY_TX);
1074
1075                 /* Based on type of command response or notification,
1076                  *   handle those that need handling via function in
1077                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
1078                 if (priv->rx_handlers[pkt->hdr.cmd]) {
1079                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
1080                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1081                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1082                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1083                 } else {
1084                         /* No handling needed */
1085                         IWL_DEBUG_RX(priv,
1086                                 "r %d i %d No handler needed for %s, 0x%02x\n",
1087                                 r, i, get_cmd_string(pkt->hdr.cmd),
1088                                 pkt->hdr.cmd);
1089                 }
1090
1091                 /*
1092                  * XXX: After here, we should always check rxb->page
1093                  * against NULL before touching it or its virtual
1094                  * memory (pkt). Because some rx_handler might have
1095                  * already taken or freed the pages.
1096                  */
1097
1098                 if (reclaim) {
1099                         /* Invoke any callbacks, transfer the buffer to caller,
1100                          * and fire off the (possibly) blocking iwl_send_cmd()
1101                          * as we reclaim the driver command queue */
1102                         if (rxb->page)
1103                                 iwl_tx_cmd_complete(priv, rxb);
1104                         else
1105                                 IWL_WARN(priv, "Claim null rxb?\n");
1106                 }
1107
1108                 /* Reuse the page if possible. For notification packets and
1109                  * SKBs that fail to Rx correctly, add them back into the
1110                  * rx_free list for reuse later. */
1111                 spin_lock_irqsave(&rxq->lock, flags);
1112                 if (rxb->page != NULL) {
1113                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1114                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1115                                 PCI_DMA_FROMDEVICE);
1116                         list_add_tail(&rxb->list, &rxq->rx_free);
1117                         rxq->free_count++;
1118                 } else
1119                         list_add_tail(&rxb->list, &rxq->rx_used);
1120
1121                 spin_unlock_irqrestore(&rxq->lock, flags);
1122
1123                 i = (i + 1) & RX_QUEUE_MASK;
1124                 /* If there are a lot of unused frames,
1125                  * restock the Rx queue so ucode wont assert. */
1126                 if (fill_rx) {
1127                         count++;
1128                         if (count >= 8) {
1129                                 rxq->read = i;
1130                                 iwlagn_rx_replenish_now(priv);
1131                                 count = 0;
1132                         }
1133                 }
1134         }
1135
1136         /* Backtrack one entry */
1137         rxq->read = i;
1138         if (fill_rx)
1139                 iwlagn_rx_replenish_now(priv);
1140         else
1141                 iwlagn_rx_queue_restock(priv);
1142 }
1143
1144 /* call this function to flush any scheduled tasklet */
1145 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1146 {
1147         /* wait to make sure we flush pending tasklet*/
1148         synchronize_irq(priv->pci_dev->irq);
1149         tasklet_kill(&priv->irq_tasklet);
1150 }
1151
1152 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1153 {
1154         u32 inta, handled = 0;
1155         u32 inta_fh;
1156         unsigned long flags;
1157         u32 i;
1158 #ifdef CONFIG_IWLWIFI_DEBUG
1159         u32 inta_mask;
1160 #endif
1161
1162         spin_lock_irqsave(&priv->lock, flags);
1163
1164         /* Ack/clear/reset pending uCode interrupts.
1165          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1166          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1167         inta = iwl_read32(priv, CSR_INT);
1168         iwl_write32(priv, CSR_INT, inta);
1169
1170         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1171          * Any new interrupts that happen after this, either while we're
1172          * in this tasklet, or later, will show up in next ISR/tasklet. */
1173         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1174         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1175
1176 #ifdef CONFIG_IWLWIFI_DEBUG
1177         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1178                 /* just for debug */
1179                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1180                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1181                               inta, inta_mask, inta_fh);
1182         }
1183 #endif
1184
1185         spin_unlock_irqrestore(&priv->lock, flags);
1186
1187         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1188          * atomic, make sure that inta covers all the interrupts that
1189          * we've discovered, even if FH interrupt came in just after
1190          * reading CSR_INT. */
1191         if (inta_fh & CSR49_FH_INT_RX_MASK)
1192                 inta |= CSR_INT_BIT_FH_RX;
1193         if (inta_fh & CSR49_FH_INT_TX_MASK)
1194                 inta |= CSR_INT_BIT_FH_TX;
1195
1196         /* Now service all interrupt bits discovered above. */
1197         if (inta & CSR_INT_BIT_HW_ERR) {
1198                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1199
1200                 /* Tell the device to stop sending interrupts */
1201                 iwl_disable_interrupts(priv);
1202
1203                 priv->isr_stats.hw++;
1204                 iwl_irq_handle_error(priv);
1205
1206                 handled |= CSR_INT_BIT_HW_ERR;
1207
1208                 return;
1209         }
1210
1211 #ifdef CONFIG_IWLWIFI_DEBUG
1212         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1213                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1214                 if (inta & CSR_INT_BIT_SCD) {
1215                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1216                                       "the frame/frames.\n");
1217                         priv->isr_stats.sch++;
1218                 }
1219
1220                 /* Alive notification via Rx interrupt will do the real work */
1221                 if (inta & CSR_INT_BIT_ALIVE) {
1222                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1223                         priv->isr_stats.alive++;
1224                 }
1225         }
1226 #endif
1227         /* Safely ignore these bits for debug checks below */
1228         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1229
1230         /* HW RF KILL switch toggled */
1231         if (inta & CSR_INT_BIT_RF_KILL) {
1232                 int hw_rf_kill = 0;
1233                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1234                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1235                         hw_rf_kill = 1;
1236
1237                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1238                                 hw_rf_kill ? "disable radio" : "enable radio");
1239
1240                 priv->isr_stats.rfkill++;
1241
1242                 /* driver only loads ucode once setting the interface up.
1243                  * the driver allows loading the ucode even if the radio
1244                  * is killed. Hence update the killswitch state here. The
1245                  * rfkill handler will care about restarting if needed.
1246                  */
1247                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1248                         if (hw_rf_kill)
1249                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1250                         else
1251                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1252                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1253                 }
1254
1255                 handled |= CSR_INT_BIT_RF_KILL;
1256         }
1257
1258         /* Chip got too hot and stopped itself */
1259         if (inta & CSR_INT_BIT_CT_KILL) {
1260                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1261                 priv->isr_stats.ctkill++;
1262                 handled |= CSR_INT_BIT_CT_KILL;
1263         }
1264
1265         /* Error detected by uCode */
1266         if (inta & CSR_INT_BIT_SW_ERR) {
1267                 IWL_ERR(priv, "Microcode SW error detected. "
1268                         " Restarting 0x%X.\n", inta);
1269                 priv->isr_stats.sw++;
1270                 iwl_irq_handle_error(priv);
1271                 handled |= CSR_INT_BIT_SW_ERR;
1272         }
1273
1274         /*
1275          * uCode wakes up after power-down sleep.
1276          * Tell device about any new tx or host commands enqueued,
1277          * and about any Rx buffers made available while asleep.
1278          */
1279         if (inta & CSR_INT_BIT_WAKEUP) {
1280                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1281                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1282                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1283                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1284                 priv->isr_stats.wakeup++;
1285                 handled |= CSR_INT_BIT_WAKEUP;
1286         }
1287
1288         /* All uCode command responses, including Tx command responses,
1289          * Rx "responses" (frame-received notification), and other
1290          * notifications from uCode come through here*/
1291         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1292                 iwl_rx_handle(priv);
1293                 priv->isr_stats.rx++;
1294                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1295         }
1296
1297         /* This "Tx" DMA channel is used only for loading uCode */
1298         if (inta & CSR_INT_BIT_FH_TX) {
1299                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1300                 priv->isr_stats.tx++;
1301                 handled |= CSR_INT_BIT_FH_TX;
1302                 /* Wake up uCode load routine, now that load is complete */
1303                 priv->ucode_write_complete = 1;
1304                 wake_up_interruptible(&priv->wait_command_queue);
1305         }
1306
1307         if (inta & ~handled) {
1308                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1309                 priv->isr_stats.unhandled++;
1310         }
1311
1312         if (inta & ~(priv->inta_mask)) {
1313                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1314                          inta & ~priv->inta_mask);
1315                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1316         }
1317
1318         /* Re-enable all interrupts */
1319         /* only Re-enable if diabled by irq */
1320         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1321                 iwl_enable_interrupts(priv);
1322
1323 #ifdef CONFIG_IWLWIFI_DEBUG
1324         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1325                 inta = iwl_read32(priv, CSR_INT);
1326                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1327                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1328                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1329                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1330         }
1331 #endif
1332 }
1333
1334 /* tasklet for iwlagn interrupt */
1335 static void iwl_irq_tasklet(struct iwl_priv *priv)
1336 {
1337         u32 inta = 0;
1338         u32 handled = 0;
1339         unsigned long flags;
1340         u32 i;
1341 #ifdef CONFIG_IWLWIFI_DEBUG
1342         u32 inta_mask;
1343 #endif
1344
1345         spin_lock_irqsave(&priv->lock, flags);
1346
1347         /* Ack/clear/reset pending uCode interrupts.
1348          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1349          */
1350         /* There is a hardware bug in the interrupt mask function that some
1351          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1352          * they are disabled in the CSR_INT_MASK register. Furthermore the
1353          * ICT interrupt handling mechanism has another bug that might cause
1354          * these unmasked interrupts fail to be detected. We workaround the
1355          * hardware bugs here by ACKing all the possible interrupts so that
1356          * interrupt coalescing can still be achieved.
1357          */
1358         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1359
1360         inta = priv->_agn.inta;
1361
1362 #ifdef CONFIG_IWLWIFI_DEBUG
1363         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1364                 /* just for debug */
1365                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1366                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1367                                 inta, inta_mask);
1368         }
1369 #endif
1370
1371         spin_unlock_irqrestore(&priv->lock, flags);
1372
1373         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1374         priv->_agn.inta = 0;
1375
1376         /* Now service all interrupt bits discovered above. */
1377         if (inta & CSR_INT_BIT_HW_ERR) {
1378                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1379
1380                 /* Tell the device to stop sending interrupts */
1381                 iwl_disable_interrupts(priv);
1382
1383                 priv->isr_stats.hw++;
1384                 iwl_irq_handle_error(priv);
1385
1386                 handled |= CSR_INT_BIT_HW_ERR;
1387
1388                 return;
1389         }
1390
1391 #ifdef CONFIG_IWLWIFI_DEBUG
1392         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1393                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1394                 if (inta & CSR_INT_BIT_SCD) {
1395                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1396                                       "the frame/frames.\n");
1397                         priv->isr_stats.sch++;
1398                 }
1399
1400                 /* Alive notification via Rx interrupt will do the real work */
1401                 if (inta & CSR_INT_BIT_ALIVE) {
1402                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1403                         priv->isr_stats.alive++;
1404                 }
1405         }
1406 #endif
1407         /* Safely ignore these bits for debug checks below */
1408         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1409
1410         /* HW RF KILL switch toggled */
1411         if (inta & CSR_INT_BIT_RF_KILL) {
1412                 int hw_rf_kill = 0;
1413                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1414                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1415                         hw_rf_kill = 1;
1416
1417                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1418                                 hw_rf_kill ? "disable radio" : "enable radio");
1419
1420                 priv->isr_stats.rfkill++;
1421
1422                 /* driver only loads ucode once setting the interface up.
1423                  * the driver allows loading the ucode even if the radio
1424                  * is killed. Hence update the killswitch state here. The
1425                  * rfkill handler will care about restarting if needed.
1426                  */
1427                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1428                         if (hw_rf_kill)
1429                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1430                         else
1431                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1432                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1433                 }
1434
1435                 handled |= CSR_INT_BIT_RF_KILL;
1436         }
1437
1438         /* Chip got too hot and stopped itself */
1439         if (inta & CSR_INT_BIT_CT_KILL) {
1440                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1441                 priv->isr_stats.ctkill++;
1442                 handled |= CSR_INT_BIT_CT_KILL;
1443         }
1444
1445         /* Error detected by uCode */
1446         if (inta & CSR_INT_BIT_SW_ERR) {
1447                 IWL_ERR(priv, "Microcode SW error detected. "
1448                         " Restarting 0x%X.\n", inta);
1449                 priv->isr_stats.sw++;
1450                 iwl_irq_handle_error(priv);
1451                 handled |= CSR_INT_BIT_SW_ERR;
1452         }
1453
1454         /* uCode wakes up after power-down sleep */
1455         if (inta & CSR_INT_BIT_WAKEUP) {
1456                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1457                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1458                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1459                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1460
1461                 priv->isr_stats.wakeup++;
1462
1463                 handled |= CSR_INT_BIT_WAKEUP;
1464         }
1465
1466         /* All uCode command responses, including Tx command responses,
1467          * Rx "responses" (frame-received notification), and other
1468          * notifications from uCode come through here*/
1469         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1470                         CSR_INT_BIT_RX_PERIODIC)) {
1471                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1472                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1473                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1474                         iwl_write32(priv, CSR_FH_INT_STATUS,
1475                                         CSR49_FH_INT_RX_MASK);
1476                 }
1477                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1478                         handled |= CSR_INT_BIT_RX_PERIODIC;
1479                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1480                 }
1481                 /* Sending RX interrupt require many steps to be done in the
1482                  * the device:
1483                  * 1- write interrupt to current index in ICT table.
1484                  * 2- dma RX frame.
1485                  * 3- update RX shared data to indicate last write index.
1486                  * 4- send interrupt.
1487                  * This could lead to RX race, driver could receive RX interrupt
1488                  * but the shared data changes does not reflect this;
1489                  * periodic interrupt will detect any dangling Rx activity.
1490                  */
1491
1492                 /* Disable periodic interrupt; we use it as just a one-shot. */
1493                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1494                             CSR_INT_PERIODIC_DIS);
1495                 iwl_rx_handle(priv);
1496
1497                 /*
1498                  * Enable periodic interrupt in 8 msec only if we received
1499                  * real RX interrupt (instead of just periodic int), to catch
1500                  * any dangling Rx interrupt.  If it was just the periodic
1501                  * interrupt, there was no dangling Rx activity, and no need
1502                  * to extend the periodic interrupt; one-shot is enough.
1503                  */
1504                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1505                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1506                                     CSR_INT_PERIODIC_ENA);
1507
1508                 priv->isr_stats.rx++;
1509         }
1510
1511         /* This "Tx" DMA channel is used only for loading uCode */
1512         if (inta & CSR_INT_BIT_FH_TX) {
1513                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1514                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1515                 priv->isr_stats.tx++;
1516                 handled |= CSR_INT_BIT_FH_TX;
1517                 /* Wake up uCode load routine, now that load is complete */
1518                 priv->ucode_write_complete = 1;
1519                 wake_up_interruptible(&priv->wait_command_queue);
1520         }
1521
1522         if (inta & ~handled) {
1523                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1524                 priv->isr_stats.unhandled++;
1525         }
1526
1527         if (inta & ~(priv->inta_mask)) {
1528                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1529                          inta & ~priv->inta_mask);
1530         }
1531
1532         /* Re-enable all interrupts */
1533         /* only Re-enable if diabled by irq */
1534         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1535                 iwl_enable_interrupts(priv);
1536 }
1537
1538 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1539 #define ACK_CNT_RATIO (50)
1540 #define BA_TIMEOUT_CNT (5)
1541 #define BA_TIMEOUT_MAX (16)
1542
1543 /**
1544  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1545  *
1546  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1547  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1548  * operation state.
1549  */
1550 bool iwl_good_ack_health(struct iwl_priv *priv,
1551                                 struct iwl_rx_packet *pkt)
1552 {
1553         bool rc = true;
1554         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1555         int ba_timeout_delta;
1556
1557         actual_ack_cnt_delta =
1558                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1559                 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1560         expected_ack_cnt_delta =
1561                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1562                 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1563         ba_timeout_delta =
1564                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1565                 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1566         if ((priv->_agn.agg_tids_count > 0) &&
1567             (expected_ack_cnt_delta > 0) &&
1568             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1569                 < ACK_CNT_RATIO) &&
1570             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1571                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1572                                 " expected_ack_cnt = %d\n",
1573                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1574
1575 #ifdef CONFIG_IWLWIFI_DEBUGFS
1576                 /*
1577                  * This is ifdef'ed on DEBUGFS because otherwise the
1578                  * statistics aren't available. If DEBUGFS is set but
1579                  * DEBUG is not, these will just compile out.
1580                  */
1581                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1582                                 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1583                 IWL_DEBUG_RADIO(priv,
1584                                 "ack_or_ba_timeout_collision delta = %d\n",
1585                                 priv->_agn.delta_statistics.tx.
1586                                 ack_or_ba_timeout_collision);
1587 #endif
1588                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1589                                 ba_timeout_delta);
1590                 if (!actual_ack_cnt_delta &&
1591                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1592                         rc = false;
1593         }
1594         return rc;
1595 }
1596
1597
1598 /*****************************************************************************
1599  *
1600  * sysfs attributes
1601  *
1602  *****************************************************************************/
1603
1604 #ifdef CONFIG_IWLWIFI_DEBUG
1605
1606 /*
1607  * The following adds a new attribute to the sysfs representation
1608  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1609  * used for controlling the debug level.
1610  *
1611  * See the level definitions in iwl for details.
1612  *
1613  * The debug_level being managed using sysfs below is a per device debug
1614  * level that is used instead of the global debug level if it (the per
1615  * device debug level) is set.
1616  */
1617 static ssize_t show_debug_level(struct device *d,
1618                                 struct device_attribute *attr, char *buf)
1619 {
1620         struct iwl_priv *priv = dev_get_drvdata(d);
1621         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1622 }
1623 static ssize_t store_debug_level(struct device *d,
1624                                 struct device_attribute *attr,
1625                                  const char *buf, size_t count)
1626 {
1627         struct iwl_priv *priv = dev_get_drvdata(d);
1628         unsigned long val;
1629         int ret;
1630
1631         ret = strict_strtoul(buf, 0, &val);
1632         if (ret)
1633                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1634         else {
1635                 priv->debug_level = val;
1636                 if (iwl_alloc_traffic_mem(priv))
1637                         IWL_ERR(priv,
1638                                 "Not enough memory to generate traffic log\n");
1639         }
1640         return strnlen(buf, count);
1641 }
1642
1643 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1644                         show_debug_level, store_debug_level);
1645
1646
1647 #endif /* CONFIG_IWLWIFI_DEBUG */
1648
1649
1650 static ssize_t show_temperature(struct device *d,
1651                                 struct device_attribute *attr, char *buf)
1652 {
1653         struct iwl_priv *priv = dev_get_drvdata(d);
1654
1655         if (!iwl_is_alive(priv))
1656                 return -EAGAIN;
1657
1658         return sprintf(buf, "%d\n", priv->temperature);
1659 }
1660
1661 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1662
1663 static ssize_t show_tx_power(struct device *d,
1664                              struct device_attribute *attr, char *buf)
1665 {
1666         struct iwl_priv *priv = dev_get_drvdata(d);
1667
1668         if (!iwl_is_ready_rf(priv))
1669                 return sprintf(buf, "off\n");
1670         else
1671                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1672 }
1673
1674 static ssize_t store_tx_power(struct device *d,
1675                               struct device_attribute *attr,
1676                               const char *buf, size_t count)
1677 {
1678         struct iwl_priv *priv = dev_get_drvdata(d);
1679         unsigned long val;
1680         int ret;
1681
1682         ret = strict_strtoul(buf, 10, &val);
1683         if (ret)
1684                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1685         else {
1686                 ret = iwl_set_tx_power(priv, val, false);
1687                 if (ret)
1688                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1689                                 ret);
1690                 else
1691                         ret = count;
1692         }
1693         return ret;
1694 }
1695
1696 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1697
1698 static struct attribute *iwl_sysfs_entries[] = {
1699         &dev_attr_temperature.attr,
1700         &dev_attr_tx_power.attr,
1701 #ifdef CONFIG_IWLWIFI_DEBUG
1702         &dev_attr_debug_level.attr,
1703 #endif
1704         NULL
1705 };
1706
1707 static struct attribute_group iwl_attribute_group = {
1708         .name = NULL,           /* put in device directory */
1709         .attrs = iwl_sysfs_entries,
1710 };
1711
1712 /******************************************************************************
1713  *
1714  * uCode download functions
1715  *
1716  ******************************************************************************/
1717
1718 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1719 {
1720         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1721         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1722         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1723         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1724         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1725         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1726 }
1727
1728 static void iwl_nic_start(struct iwl_priv *priv)
1729 {
1730         /* Remove all resets to allow NIC to operate */
1731         iwl_write32(priv, CSR_RESET, 0);
1732 }
1733
1734 struct iwlagn_ucode_capabilities {
1735         u32 max_probe_length;
1736         u32 standard_phy_calibration_size;
1737         bool pan;
1738 };
1739
1740 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1741 static int iwl_mac_setup_register(struct iwl_priv *priv,
1742                                   struct iwlagn_ucode_capabilities *capa);
1743
1744 #define UCODE_EXPERIMENTAL_INDEX        100
1745 #define UCODE_EXPERIMENTAL_TAG          "exp"
1746
1747 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1748 {
1749         const char *name_pre = priv->cfg->fw_name_pre;
1750         char tag[8];
1751
1752         if (first) {
1753 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1754                 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1755                 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1756         } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1757 #endif
1758                 priv->fw_index = priv->cfg->ucode_api_max;
1759                 sprintf(tag, "%d", priv->fw_index);
1760         } else {
1761                 priv->fw_index--;
1762                 sprintf(tag, "%d", priv->fw_index);
1763         }
1764
1765         if (priv->fw_index < priv->cfg->ucode_api_min) {
1766                 IWL_ERR(priv, "no suitable firmware found!\n");
1767                 return -ENOENT;
1768         }
1769
1770         sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1771
1772         IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1773                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1774                                 ? "EXPERIMENTAL " : "",
1775                        priv->firmware_name);
1776
1777         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1778                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1779                                        iwl_ucode_callback);
1780 }
1781
1782 struct iwlagn_firmware_pieces {
1783         const void *inst, *data, *init, *init_data, *boot;
1784         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1785
1786         u32 build;
1787
1788         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1789         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1790 };
1791
1792 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1793                                        const struct firmware *ucode_raw,
1794                                        struct iwlagn_firmware_pieces *pieces)
1795 {
1796         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1797         u32 api_ver, hdr_size;
1798         const u8 *src;
1799
1800         priv->ucode_ver = le32_to_cpu(ucode->ver);
1801         api_ver = IWL_UCODE_API(priv->ucode_ver);
1802
1803         switch (api_ver) {
1804         default:
1805                 /*
1806                  * 4965 doesn't revision the firmware file format
1807                  * along with the API version, it always uses v1
1808                  * file format.
1809                  */
1810                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1811                                 CSR_HW_REV_TYPE_4965) {
1812                         hdr_size = 28;
1813                         if (ucode_raw->size < hdr_size) {
1814                                 IWL_ERR(priv, "File size too small!\n");
1815                                 return -EINVAL;
1816                         }
1817                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1818                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1819                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1820                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1821                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1822                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1823                         src = ucode->u.v2.data;
1824                         break;
1825                 }
1826                 /* fall through for 4965 */
1827         case 0:
1828         case 1:
1829         case 2:
1830                 hdr_size = 24;
1831                 if (ucode_raw->size < hdr_size) {
1832                         IWL_ERR(priv, "File size too small!\n");
1833                         return -EINVAL;
1834                 }
1835                 pieces->build = 0;
1836                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1837                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1838                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1839                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1840                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1841                 src = ucode->u.v1.data;
1842                 break;
1843         }
1844
1845         /* Verify size of file vs. image size info in file's header */
1846         if (ucode_raw->size != hdr_size + pieces->inst_size +
1847                                 pieces->data_size + pieces->init_size +
1848                                 pieces->init_data_size + pieces->boot_size) {
1849
1850                 IWL_ERR(priv,
1851                         "uCode file size %d does not match expected size\n",
1852                         (int)ucode_raw->size);
1853                 return -EINVAL;
1854         }
1855
1856         pieces->inst = src;
1857         src += pieces->inst_size;
1858         pieces->data = src;
1859         src += pieces->data_size;
1860         pieces->init = src;
1861         src += pieces->init_size;
1862         pieces->init_data = src;
1863         src += pieces->init_data_size;
1864         pieces->boot = src;
1865         src += pieces->boot_size;
1866
1867         return 0;
1868 }
1869
1870 static int iwlagn_wanted_ucode_alternative = 1;
1871
1872 static int iwlagn_load_firmware(struct iwl_priv *priv,
1873                                 const struct firmware *ucode_raw,
1874                                 struct iwlagn_firmware_pieces *pieces,
1875                                 struct iwlagn_ucode_capabilities *capa)
1876 {
1877         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1878         struct iwl_ucode_tlv *tlv;
1879         size_t len = ucode_raw->size;
1880         const u8 *data;
1881         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1882         u64 alternatives;
1883         u32 tlv_len;
1884         enum iwl_ucode_tlv_type tlv_type;
1885         const u8 *tlv_data;
1886
1887         if (len < sizeof(*ucode)) {
1888                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1889                 return -EINVAL;
1890         }
1891
1892         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1893                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1894                         le32_to_cpu(ucode->magic));
1895                 return -EINVAL;
1896         }
1897
1898         /*
1899          * Check which alternatives are present, and "downgrade"
1900          * when the chosen alternative is not present, warning
1901          * the user when that happens. Some files may not have
1902          * any alternatives, so don't warn in that case.
1903          */
1904         alternatives = le64_to_cpu(ucode->alternatives);
1905         tmp = wanted_alternative;
1906         if (wanted_alternative > 63)
1907                 wanted_alternative = 63;
1908         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1909                 wanted_alternative--;
1910         if (wanted_alternative && wanted_alternative != tmp)
1911                 IWL_WARN(priv,
1912                          "uCode alternative %d not available, choosing %d\n",
1913                          tmp, wanted_alternative);
1914
1915         priv->ucode_ver = le32_to_cpu(ucode->ver);
1916         pieces->build = le32_to_cpu(ucode->build);
1917         data = ucode->data;
1918
1919         len -= sizeof(*ucode);
1920
1921         while (len >= sizeof(*tlv)) {
1922                 u16 tlv_alt;
1923
1924                 len -= sizeof(*tlv);
1925                 tlv = (void *)data;
1926
1927                 tlv_len = le32_to_cpu(tlv->length);
1928                 tlv_type = le16_to_cpu(tlv->type);
1929                 tlv_alt = le16_to_cpu(tlv->alternative);
1930                 tlv_data = tlv->data;
1931
1932                 if (len < tlv_len) {
1933                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1934                                 len, tlv_len);
1935                         return -EINVAL;
1936                 }
1937                 len -= ALIGN(tlv_len, 4);
1938                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1939
1940                 /*
1941                  * Alternative 0 is always valid.
1942                  *
1943                  * Skip alternative TLVs that are not selected.
1944                  */
1945                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1946                         continue;
1947
1948                 switch (tlv_type) {
1949                 case IWL_UCODE_TLV_INST:
1950                         pieces->inst = tlv_data;
1951                         pieces->inst_size = tlv_len;
1952                         break;
1953                 case IWL_UCODE_TLV_DATA:
1954                         pieces->data = tlv_data;
1955                         pieces->data_size = tlv_len;
1956                         break;
1957                 case IWL_UCODE_TLV_INIT:
1958                         pieces->init = tlv_data;
1959                         pieces->init_size = tlv_len;
1960                         break;
1961                 case IWL_UCODE_TLV_INIT_DATA:
1962                         pieces->init_data = tlv_data;
1963                         pieces->init_data_size = tlv_len;
1964                         break;
1965                 case IWL_UCODE_TLV_BOOT:
1966                         pieces->boot = tlv_data;
1967                         pieces->boot_size = tlv_len;
1968                         break;
1969                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1970                         if (tlv_len != sizeof(u32))
1971                                 goto invalid_tlv_len;
1972                         capa->max_probe_length =
1973                                         le32_to_cpup((__le32 *)tlv_data);
1974                         break;
1975                 case IWL_UCODE_TLV_PAN:
1976                         if (tlv_len)
1977                                 goto invalid_tlv_len;
1978                         capa->pan = true;
1979                         break;
1980                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1981                         if (tlv_len != sizeof(u32))
1982                                 goto invalid_tlv_len;
1983                         pieces->init_evtlog_ptr =
1984                                         le32_to_cpup((__le32 *)tlv_data);
1985                         break;
1986                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1987                         if (tlv_len != sizeof(u32))
1988                                 goto invalid_tlv_len;
1989                         pieces->init_evtlog_size =
1990                                         le32_to_cpup((__le32 *)tlv_data);
1991                         break;
1992                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1993                         if (tlv_len != sizeof(u32))
1994                                 goto invalid_tlv_len;
1995                         pieces->init_errlog_ptr =
1996                                         le32_to_cpup((__le32 *)tlv_data);
1997                         break;
1998                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1999                         if (tlv_len != sizeof(u32))
2000                                 goto invalid_tlv_len;
2001                         pieces->inst_evtlog_ptr =
2002                                         le32_to_cpup((__le32 *)tlv_data);
2003                         break;
2004                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
2005                         if (tlv_len != sizeof(u32))
2006                                 goto invalid_tlv_len;
2007                         pieces->inst_evtlog_size =
2008                                         le32_to_cpup((__le32 *)tlv_data);
2009                         break;
2010                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
2011                         if (tlv_len != sizeof(u32))
2012                                 goto invalid_tlv_len;
2013                         pieces->inst_errlog_ptr =
2014                                         le32_to_cpup((__le32 *)tlv_data);
2015                         break;
2016                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
2017                         if (tlv_len)
2018                                 goto invalid_tlv_len;
2019                         priv->enhance_sensitivity_table = true;
2020                         break;
2021                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
2022                         if (tlv_len != sizeof(u32))
2023                                 goto invalid_tlv_len;
2024                         capa->standard_phy_calibration_size =
2025                                         le32_to_cpup((__le32 *)tlv_data);
2026                         break;
2027                 default:
2028                         IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
2029                         break;
2030                 }
2031         }
2032
2033         if (len) {
2034                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
2035                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
2036                 return -EINVAL;
2037         }
2038
2039         return 0;
2040
2041  invalid_tlv_len:
2042         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
2043         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
2044
2045         return -EINVAL;
2046 }
2047
2048 /**
2049  * iwl_ucode_callback - callback when firmware was loaded
2050  *
2051  * If loaded successfully, copies the firmware into buffers
2052  * for the card to fetch (via DMA).
2053  */
2054 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
2055 {
2056         struct iwl_priv *priv = context;
2057         struct iwl_ucode_header *ucode;
2058         int err;
2059         struct iwlagn_firmware_pieces pieces;
2060         const unsigned int api_max = priv->cfg->ucode_api_max;
2061         const unsigned int api_min = priv->cfg->ucode_api_min;
2062         u32 api_ver;
2063         char buildstr[25];
2064         u32 build;
2065         struct iwlagn_ucode_capabilities ucode_capa = {
2066                 .max_probe_length = 200,
2067                 .standard_phy_calibration_size =
2068                         IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE,
2069         };
2070
2071         memset(&pieces, 0, sizeof(pieces));
2072
2073         if (!ucode_raw) {
2074                 if (priv->fw_index <= priv->cfg->ucode_api_max)
2075                         IWL_ERR(priv,
2076                                 "request for firmware file '%s' failed.\n",
2077                                 priv->firmware_name);
2078                 goto try_again;
2079         }
2080
2081         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
2082                        priv->firmware_name, ucode_raw->size);
2083
2084         /* Make sure that we got at least the API version number */
2085         if (ucode_raw->size < 4) {
2086                 IWL_ERR(priv, "File size way too small!\n");
2087                 goto try_again;
2088         }
2089
2090         /* Data from ucode file:  header followed by uCode images */
2091         ucode = (struct iwl_ucode_header *)ucode_raw->data;
2092
2093         if (ucode->ver)
2094                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
2095         else
2096                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
2097                                            &ucode_capa);
2098
2099         if (err)
2100                 goto try_again;
2101
2102         api_ver = IWL_UCODE_API(priv->ucode_ver);
2103         build = pieces.build;
2104
2105         /*
2106          * api_ver should match the api version forming part of the
2107          * firmware filename ... but we don't check for that and only rely
2108          * on the API version read from firmware header from here on forward
2109          */
2110         /* no api version check required for experimental uCode */
2111         if (priv->fw_index != UCODE_EXPERIMENTAL_INDEX) {
2112                 if (api_ver < api_min || api_ver > api_max) {
2113                         IWL_ERR(priv,
2114                                 "Driver unable to support your firmware API. "
2115                                 "Driver supports v%u, firmware is v%u.\n",
2116                                 api_max, api_ver);
2117                         goto try_again;
2118                 }
2119
2120                 if (api_ver != api_max)
2121                         IWL_ERR(priv,
2122                                 "Firmware has old API version. Expected v%u, "
2123                                 "got v%u. New firmware can be obtained "
2124                                 "from http://www.intellinuxwireless.org.\n",
2125                                 api_max, api_ver);
2126         }
2127
2128         if (build)
2129                 sprintf(buildstr, " build %u%s", build,
2130                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
2131                                 ? " (EXP)" : "");
2132         else
2133                 buildstr[0] = '\0';
2134
2135         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
2136                  IWL_UCODE_MAJOR(priv->ucode_ver),
2137                  IWL_UCODE_MINOR(priv->ucode_ver),
2138                  IWL_UCODE_API(priv->ucode_ver),
2139                  IWL_UCODE_SERIAL(priv->ucode_ver),
2140                  buildstr);
2141
2142         snprintf(priv->hw->wiphy->fw_version,
2143                  sizeof(priv->hw->wiphy->fw_version),
2144                  "%u.%u.%u.%u%s",
2145                  IWL_UCODE_MAJOR(priv->ucode_ver),
2146                  IWL_UCODE_MINOR(priv->ucode_ver),
2147                  IWL_UCODE_API(priv->ucode_ver),
2148                  IWL_UCODE_SERIAL(priv->ucode_ver),
2149                  buildstr);
2150
2151         /*
2152          * For any of the failures below (before allocating pci memory)
2153          * we will try to load a version with a smaller API -- maybe the
2154          * user just got a corrupted version of the latest API.
2155          */
2156
2157         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2158                        priv->ucode_ver);
2159         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
2160                        pieces.inst_size);
2161         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
2162                        pieces.data_size);
2163         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
2164                        pieces.init_size);
2165         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
2166                        pieces.init_data_size);
2167         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
2168                        pieces.boot_size);
2169
2170         /* Verify that uCode images will fit in card's SRAM */
2171         if (pieces.inst_size > priv->hw_params.max_inst_size) {
2172                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
2173                         pieces.inst_size);
2174                 goto try_again;
2175         }
2176
2177         if (pieces.data_size > priv->hw_params.max_data_size) {
2178                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
2179                         pieces.data_size);
2180                 goto try_again;
2181         }
2182
2183         if (pieces.init_size > priv->hw_params.max_inst_size) {
2184                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
2185                         pieces.init_size);
2186                 goto try_again;
2187         }
2188
2189         if (pieces.init_data_size > priv->hw_params.max_data_size) {
2190                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
2191                         pieces.init_data_size);
2192                 goto try_again;
2193         }
2194
2195         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
2196                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
2197                         pieces.boot_size);
2198                 goto try_again;
2199         }
2200
2201         /* Allocate ucode buffers for card's bus-master loading ... */
2202
2203         /* Runtime instructions and 2 copies of data:
2204          * 1) unmodified from disk
2205          * 2) backup cache for save/restore during power-downs */
2206         priv->ucode_code.len = pieces.inst_size;
2207         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2208
2209         priv->ucode_data.len = pieces.data_size;
2210         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2211
2212         priv->ucode_data_backup.len = pieces.data_size;
2213         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2214
2215         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2216             !priv->ucode_data_backup.v_addr)
2217                 goto err_pci_alloc;
2218
2219         /* Initialization instructions and data */
2220         if (pieces.init_size && pieces.init_data_size) {
2221                 priv->ucode_init.len = pieces.init_size;
2222                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2223
2224                 priv->ucode_init_data.len = pieces.init_data_size;
2225                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2226
2227                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2228                         goto err_pci_alloc;
2229         }
2230
2231         /* Bootstrap (instructions only, no data) */
2232         if (pieces.boot_size) {
2233                 priv->ucode_boot.len = pieces.boot_size;
2234                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2235
2236                 if (!priv->ucode_boot.v_addr)
2237                         goto err_pci_alloc;
2238         }
2239
2240         /* Now that we can no longer fail, copy information */
2241
2242         /*
2243          * The (size - 16) / 12 formula is based on the information recorded
2244          * for each event, which is of mode 1 (including timestamp) for all
2245          * new microcodes that include this information.
2246          */
2247         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
2248         if (pieces.init_evtlog_size)
2249                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
2250         else
2251                 priv->_agn.init_evtlog_size =
2252                         priv->cfg->base_params->max_event_log_size;
2253         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
2254         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
2255         if (pieces.inst_evtlog_size)
2256                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
2257         else
2258                 priv->_agn.inst_evtlog_size =
2259                         priv->cfg->base_params->max_event_log_size;
2260         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
2261
2262         if (ucode_capa.pan) {
2263                 priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN);
2264                 priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN;
2265         } else
2266                 priv->sta_key_max_num = STA_KEY_MAX_NUM;
2267
2268         /* Copy images into buffers for card's bus-master reads ... */
2269
2270         /* Runtime instructions (first block of data in file) */
2271         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
2272                         pieces.inst_size);
2273         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
2274
2275         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2276                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2277
2278         /*
2279          * Runtime data
2280          * NOTE:  Copy into backup buffer will be done in iwl_up()
2281          */
2282         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2283                         pieces.data_size);
2284         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2285         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2286
2287         /* Initialization instructions */
2288         if (pieces.init_size) {
2289                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2290                                 pieces.init_size);
2291                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2292         }
2293
2294         /* Initialization data */
2295         if (pieces.init_data_size) {
2296                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2297                                pieces.init_data_size);
2298                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2299                        pieces.init_data_size);
2300         }
2301
2302         /* Bootstrap instructions */
2303         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2304                         pieces.boot_size);
2305         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2306
2307         /*
2308          * figure out the offset of chain noise reset and gain commands
2309          * base on the size of standard phy calibration commands table size
2310          */
2311         if (ucode_capa.standard_phy_calibration_size >
2312             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
2313                 ucode_capa.standard_phy_calibration_size =
2314                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
2315
2316         priv->_agn.phy_calib_chain_noise_reset_cmd =
2317                 ucode_capa.standard_phy_calibration_size;
2318         priv->_agn.phy_calib_chain_noise_gain_cmd =
2319                 ucode_capa.standard_phy_calibration_size + 1;
2320
2321         /**************************************************
2322          * This is still part of probe() in a sense...
2323          *
2324          * 9. Setup and register with mac80211 and debugfs
2325          **************************************************/
2326         err = iwl_mac_setup_register(priv, &ucode_capa);
2327         if (err)
2328                 goto out_unbind;
2329
2330         err = iwl_dbgfs_register(priv, DRV_NAME);
2331         if (err)
2332                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2333
2334         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
2335                                         &iwl_attribute_group);
2336         if (err) {
2337                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2338                 goto out_unbind;
2339         }
2340
2341         /* We have our copies now, allow OS release its copies */
2342         release_firmware(ucode_raw);
2343         complete(&priv->_agn.firmware_loading_complete);
2344         return;
2345
2346  try_again:
2347         /* try next, if any */
2348         if (iwl_request_firmware(priv, false))
2349                 goto out_unbind;
2350         release_firmware(ucode_raw);
2351         return;
2352
2353  err_pci_alloc:
2354         IWL_ERR(priv, "failed to allocate pci memory\n");
2355         iwl_dealloc_ucode_pci(priv);
2356  out_unbind:
2357         complete(&priv->_agn.firmware_loading_complete);
2358         device_release_driver(&priv->pci_dev->dev);
2359         release_firmware(ucode_raw);
2360 }
2361
2362 static const char *desc_lookup_text[] = {
2363         "OK",
2364         "FAIL",
2365         "BAD_PARAM",
2366         "BAD_CHECKSUM",
2367         "NMI_INTERRUPT_WDG",
2368         "SYSASSERT",
2369         "FATAL_ERROR",
2370         "BAD_COMMAND",
2371         "HW_ERROR_TUNE_LOCK",
2372         "HW_ERROR_TEMPERATURE",
2373         "ILLEGAL_CHAN_FREQ",
2374         "VCC_NOT_STABLE",
2375         "FH_ERROR",
2376         "NMI_INTERRUPT_HOST",
2377         "NMI_INTERRUPT_ACTION_PT",
2378         "NMI_INTERRUPT_UNKNOWN",
2379         "UCODE_VERSION_MISMATCH",
2380         "HW_ERROR_ABS_LOCK",
2381         "HW_ERROR_CAL_LOCK_FAIL",
2382         "NMI_INTERRUPT_INST_ACTION_PT",
2383         "NMI_INTERRUPT_DATA_ACTION_PT",
2384         "NMI_TRM_HW_ER",
2385         "NMI_INTERRUPT_TRM",
2386         "NMI_INTERRUPT_BREAK_POINT"
2387         "DEBUG_0",
2388         "DEBUG_1",
2389         "DEBUG_2",
2390         "DEBUG_3",
2391 };
2392
2393 static struct { char *name; u8 num; } advanced_lookup[] = {
2394         { "NMI_INTERRUPT_WDG", 0x34 },
2395         { "SYSASSERT", 0x35 },
2396         { "UCODE_VERSION_MISMATCH", 0x37 },
2397         { "BAD_COMMAND", 0x38 },
2398         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
2399         { "FATAL_ERROR", 0x3D },
2400         { "NMI_TRM_HW_ERR", 0x46 },
2401         { "NMI_INTERRUPT_TRM", 0x4C },
2402         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
2403         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
2404         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
2405         { "NMI_INTERRUPT_HOST", 0x66 },
2406         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
2407         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
2408         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
2409         { "ADVANCED_SYSASSERT", 0 },
2410 };
2411
2412 static const char *desc_lookup(u32 num)
2413 {
2414         int i;
2415         int max = ARRAY_SIZE(desc_lookup_text);
2416
2417         if (num < max)
2418                 return desc_lookup_text[num];
2419
2420         max = ARRAY_SIZE(advanced_lookup) - 1;
2421         for (i = 0; i < max; i++) {
2422                 if (advanced_lookup[i].num == num)
2423                         break;;
2424         }
2425         return advanced_lookup[i].name;
2426 }
2427
2428 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2429 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2430
2431 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2432 {
2433         u32 data2, line;
2434         u32 desc, time, count, base, data1;
2435         u32 blink1, blink2, ilink1, ilink2;
2436         u32 pc, hcmd;
2437
2438         if (priv->ucode_type == UCODE_INIT) {
2439                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2440                 if (!base)
2441                         base = priv->_agn.init_errlog_ptr;
2442         } else {
2443                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2444                 if (!base)
2445                         base = priv->_agn.inst_errlog_ptr;
2446         }
2447
2448         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2449                 IWL_ERR(priv,
2450                         "Not valid error log pointer 0x%08X for %s uCode\n",
2451                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2452                 return;
2453         }
2454
2455         count = iwl_read_targ_mem(priv, base);
2456
2457         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2458                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2459                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2460                         priv->status, count);
2461         }
2462
2463         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2464         priv->isr_stats.err_code = desc;
2465         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2466         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2467         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2468         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2469         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2470         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2471         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2472         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2473         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2474         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2475
2476         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2477                                       blink1, blink2, ilink1, ilink2);
2478
2479         IWL_ERR(priv, "Desc                                  Time       "
2480                 "data1      data2      line\n");
2481         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
2482                 desc_lookup(desc), desc, time, data1, data2, line);
2483         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2484         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2485                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2486 }
2487
2488 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2489
2490 /**
2491  * iwl_print_event_log - Dump error event log to syslog
2492  *
2493  */
2494 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2495                                u32 num_events, u32 mode,
2496                                int pos, char **buf, size_t bufsz)
2497 {
2498         u32 i;
2499         u32 base;       /* SRAM byte address of event log header */
2500         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2501         u32 ptr;        /* SRAM byte address of log data */
2502         u32 ev, time, data; /* event log data */
2503         unsigned long reg_flags;
2504
2505         if (num_events == 0)
2506                 return pos;
2507
2508         if (priv->ucode_type == UCODE_INIT) {
2509                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2510                 if (!base)
2511                         base = priv->_agn.init_evtlog_ptr;
2512         } else {
2513                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2514                 if (!base)
2515                         base = priv->_agn.inst_evtlog_ptr;
2516         }
2517
2518         if (mode == 0)
2519                 event_size = 2 * sizeof(u32);
2520         else
2521                 event_size = 3 * sizeof(u32);
2522
2523         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2524
2525         /* Make sure device is powered up for SRAM reads */
2526         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2527         iwl_grab_nic_access(priv);
2528
2529         /* Set starting address; reads will auto-increment */
2530         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2531         rmb();
2532
2533         /* "time" is actually "data" for mode 0 (no timestamp).
2534         * place event id # at far right for easier visual parsing. */
2535         for (i = 0; i < num_events; i++) {
2536                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2537                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2538                 if (mode == 0) {
2539                         /* data, ev */
2540                         if (bufsz) {
2541                                 pos += scnprintf(*buf + pos, bufsz - pos,
2542                                                 "EVT_LOG:0x%08x:%04u\n",
2543                                                 time, ev);
2544                         } else {
2545                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2546                                         time, ev);
2547                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2548                                         time, ev);
2549                         }
2550                 } else {
2551                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2552                         if (bufsz) {
2553                                 pos += scnprintf(*buf + pos, bufsz - pos,
2554                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2555                                                  time, data, ev);
2556                         } else {
2557                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2558                                         time, data, ev);
2559                                 trace_iwlwifi_dev_ucode_event(priv, time,
2560                                         data, ev);
2561                         }
2562                 }
2563         }
2564
2565         /* Allow device to power down */
2566         iwl_release_nic_access(priv);
2567         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2568         return pos;
2569 }
2570
2571 /**
2572  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2573  */
2574 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2575                                     u32 num_wraps, u32 next_entry,
2576                                     u32 size, u32 mode,
2577                                     int pos, char **buf, size_t bufsz)
2578 {
2579         /*
2580          * display the newest DEFAULT_LOG_ENTRIES entries
2581          * i.e the entries just before the next ont that uCode would fill.
2582          */
2583         if (num_wraps) {
2584                 if (next_entry < size) {
2585                         pos = iwl_print_event_log(priv,
2586                                                 capacity - (size - next_entry),
2587                                                 size - next_entry, mode,
2588                                                 pos, buf, bufsz);
2589                         pos = iwl_print_event_log(priv, 0,
2590                                                   next_entry, mode,
2591                                                   pos, buf, bufsz);
2592                 } else
2593                         pos = iwl_print_event_log(priv, next_entry - size,
2594                                                   size, mode, pos, buf, bufsz);
2595         } else {
2596                 if (next_entry < size) {
2597                         pos = iwl_print_event_log(priv, 0, next_entry,
2598                                                   mode, pos, buf, bufsz);
2599                 } else {
2600                         pos = iwl_print_event_log(priv, next_entry - size,
2601                                                   size, mode, pos, buf, bufsz);
2602                 }
2603         }
2604         return pos;
2605 }
2606
2607 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2608
2609 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2610                             char **buf, bool display)
2611 {
2612         u32 base;       /* SRAM byte address of event log header */
2613         u32 capacity;   /* event log capacity in # entries */
2614         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2615         u32 num_wraps;  /* # times uCode wrapped to top of log */
2616         u32 next_entry; /* index of next entry to be written by uCode */
2617         u32 size;       /* # entries that we'll print */
2618         u32 logsize;
2619         int pos = 0;
2620         size_t bufsz = 0;
2621
2622         if (priv->ucode_type == UCODE_INIT) {
2623                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2624                 logsize = priv->_agn.init_evtlog_size;
2625                 if (!base)
2626                         base = priv->_agn.init_evtlog_ptr;
2627         } else {
2628                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2629                 logsize = priv->_agn.inst_evtlog_size;
2630                 if (!base)
2631                         base = priv->_agn.inst_evtlog_ptr;
2632         }
2633
2634         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2635                 IWL_ERR(priv,
2636                         "Invalid event log pointer 0x%08X for %s uCode\n",
2637                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2638                 return -EINVAL;
2639         }
2640
2641         /* event log header */
2642         capacity = iwl_read_targ_mem(priv, base);
2643         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2644         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2645         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2646
2647         if (capacity > logsize) {
2648                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2649                         capacity, logsize);
2650                 capacity = logsize;
2651         }
2652
2653         if (next_entry > logsize) {
2654                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2655                         next_entry, logsize);
2656                 next_entry = logsize;
2657         }
2658
2659         size = num_wraps ? capacity : next_entry;
2660
2661         /* bail out if nothing in log */
2662         if (size == 0) {
2663                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2664                 return pos;
2665         }
2666
2667         /* enable/disable bt channel announcement */
2668         priv->bt_ch_announce = iwlagn_bt_ch_announce;
2669
2670 #ifdef CONFIG_IWLWIFI_DEBUG
2671         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2672                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2673                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2674 #else
2675         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2676                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2677 #endif
2678         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2679                 size);
2680
2681 #ifdef CONFIG_IWLWIFI_DEBUG
2682         if (display) {
2683                 if (full_log)
2684                         bufsz = capacity * 48;
2685                 else
2686                         bufsz = size * 48;
2687                 *buf = kmalloc(bufsz, GFP_KERNEL);
2688                 if (!*buf)
2689                         return -ENOMEM;
2690         }
2691         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2692                 /*
2693                  * if uCode has wrapped back to top of log,
2694                  * start at the oldest entry,
2695                  * i.e the next one that uCode would fill.
2696                  */
2697                 if (num_wraps)
2698                         pos = iwl_print_event_log(priv, next_entry,
2699                                                 capacity - next_entry, mode,
2700                                                 pos, buf, bufsz);
2701                 /* (then/else) start at top of log */
2702                 pos = iwl_print_event_log(priv, 0,
2703                                           next_entry, mode, pos, buf, bufsz);
2704         } else
2705                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2706                                                 next_entry, size, mode,
2707                                                 pos, buf, bufsz);
2708 #else
2709         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2710                                         next_entry, size, mode,
2711                                         pos, buf, bufsz);
2712 #endif
2713         return pos;
2714 }
2715
2716 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2717 {
2718         struct iwl_ct_kill_config cmd;
2719         struct iwl_ct_kill_throttling_config adv_cmd;
2720         unsigned long flags;
2721         int ret = 0;
2722
2723         spin_lock_irqsave(&priv->lock, flags);
2724         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2725                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2726         spin_unlock_irqrestore(&priv->lock, flags);
2727         priv->thermal_throttle.ct_kill_toggle = false;
2728
2729         if (priv->cfg->base_params->support_ct_kill_exit) {
2730                 adv_cmd.critical_temperature_enter =
2731                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2732                 adv_cmd.critical_temperature_exit =
2733                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2734
2735                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2736                                        sizeof(adv_cmd), &adv_cmd);
2737                 if (ret)
2738                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2739                 else
2740                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2741                                         "succeeded, "
2742                                         "critical temperature enter is %d,"
2743                                         "exit is %d\n",
2744                                        priv->hw_params.ct_kill_threshold,
2745                                        priv->hw_params.ct_kill_exit_threshold);
2746         } else {
2747                 cmd.critical_temperature_R =
2748                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2749
2750                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2751                                        sizeof(cmd), &cmd);
2752                 if (ret)
2753                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2754                 else
2755                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2756                                         "succeeded, "
2757                                         "critical temperature is %d\n",
2758                                         priv->hw_params.ct_kill_threshold);
2759         }
2760 }
2761
2762 static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg)
2763 {
2764         struct iwl_calib_cfg_cmd calib_cfg_cmd;
2765         struct iwl_host_cmd cmd = {
2766                 .id = CALIBRATION_CFG_CMD,
2767                 .len = sizeof(struct iwl_calib_cfg_cmd),
2768                 .data = &calib_cfg_cmd,
2769         };
2770
2771         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
2772         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
2773         calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg);
2774
2775         return iwl_send_cmd(priv, &cmd);
2776 }
2777
2778
2779 /**
2780  * iwl_alive_start - called after REPLY_ALIVE notification received
2781  *                   from protocol/runtime uCode (initialization uCode's
2782  *                   Alive gets handled by iwl_init_alive_start()).
2783  */
2784 static void iwl_alive_start(struct iwl_priv *priv)
2785 {
2786         int ret = 0;
2787         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2788
2789         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2790
2791         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2792                 /* We had an error bringing up the hardware, so take it
2793                  * all the way back down so we can try again */
2794                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2795                 goto restart;
2796         }
2797
2798         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2799          * This is a paranoid check, because we would not have gotten the
2800          * "runtime" alive if code weren't properly loaded.  */
2801         if (iwl_verify_ucode(priv)) {
2802                 /* Runtime instruction load was bad;
2803                  * take it all the way back down so we can try again */
2804                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2805                 goto restart;
2806         }
2807
2808         ret = priv->cfg->ops->lib->alive_notify(priv);
2809         if (ret) {
2810                 IWL_WARN(priv,
2811                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2812                 goto restart;
2813         }
2814
2815
2816         /* After the ALIVE response, we can send host commands to the uCode */
2817         set_bit(STATUS_ALIVE, &priv->status);
2818
2819         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2820                 /* Enable timer to monitor the driver queues */
2821                 mod_timer(&priv->monitor_recover,
2822                         jiffies +
2823                         msecs_to_jiffies(
2824                           priv->cfg->base_params->monitor_recover_period));
2825         }
2826
2827         if (iwl_is_rfkill(priv))
2828                 return;
2829
2830         /* download priority table before any calibration request */
2831         if (priv->cfg->bt_params &&
2832             priv->cfg->bt_params->advanced_bt_coexist) {
2833                 /* Configure Bluetooth device coexistence support */
2834                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
2835                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
2836                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
2837                 priv->cfg->ops->hcmd->send_bt_config(priv);
2838                 priv->bt_valid = IWLAGN_BT_VALID_ENABLE_FLAGS;
2839                 iwlagn_send_prio_tbl(priv);
2840
2841                 /* FIXME: w/a to force change uCode BT state machine */
2842                 iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
2843                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2844                 iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE,
2845                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2846         }
2847         if (priv->hw_params.calib_rt_cfg)
2848                 iwlagn_send_calib_cfg_rt(priv, priv->hw_params.calib_rt_cfg);
2849
2850         ieee80211_wake_queues(priv->hw);
2851
2852         priv->active_rate = IWL_RATES_MASK;
2853
2854         /* Configure Tx antenna selection based on H/W config */
2855         if (priv->cfg->ops->hcmd->set_tx_ant)
2856                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2857
2858         if (iwl_is_associated_ctx(ctx)) {
2859                 struct iwl_rxon_cmd *active_rxon =
2860                                 (struct iwl_rxon_cmd *)&ctx->active;
2861                 /* apply any changes in staging */
2862                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2863                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2864         } else {
2865                 struct iwl_rxon_context *tmp;
2866                 /* Initialize our rx_config data */
2867                 for_each_context(priv, tmp)
2868                         iwl_connection_init_rx_config(priv, tmp);
2869
2870                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2871                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
2872         }
2873
2874         if (priv->cfg->bt_params &&
2875             !priv->cfg->bt_params->advanced_bt_coexist) {
2876                 /* Configure Bluetooth device coexistence support */
2877                 priv->cfg->ops->hcmd->send_bt_config(priv);
2878         }
2879
2880         iwl_reset_run_time_calib(priv);
2881
2882         /* Configure the adapter for unassociated operation */
2883         iwlcore_commit_rxon(priv, ctx);
2884
2885         /* At this point, the NIC is initialized and operational */
2886         iwl_rf_kill_ct_config(priv);
2887
2888         iwl_leds_init(priv);
2889
2890         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2891         set_bit(STATUS_READY, &priv->status);
2892         wake_up_interruptible(&priv->wait_command_queue);
2893
2894         iwl_power_update_mode(priv, true);
2895         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2896
2897
2898         return;
2899
2900  restart:
2901         queue_work(priv->workqueue, &priv->restart);
2902 }
2903
2904 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2905
2906 static void __iwl_down(struct iwl_priv *priv)
2907 {
2908         unsigned long flags;
2909         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2910
2911         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2912
2913         iwl_scan_cancel_timeout(priv, 200);
2914
2915         exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
2916
2917         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2918          * to prevent rearm timer */
2919         if (priv->cfg->ops->lib->recover_from_tx_stall)
2920                 del_timer_sync(&priv->monitor_recover);
2921
2922         iwl_clear_ucode_stations(priv, NULL);
2923         iwl_dealloc_bcast_stations(priv);
2924         iwl_clear_driver_stations(priv);
2925
2926         /* reset BT coex data */
2927         priv->bt_status = 0;
2928         if (priv->cfg->bt_params)
2929                 priv->bt_traffic_load =
2930                          priv->cfg->bt_params->bt_init_traffic_load;
2931         else
2932                 priv->bt_traffic_load = 0;
2933         priv->bt_sco_active = false;
2934         priv->bt_full_concurrent = false;
2935         priv->bt_ci_compliance = 0;
2936
2937         /* Unblock any waiting calls */
2938         wake_up_interruptible_all(&priv->wait_command_queue);
2939
2940         /* Wipe out the EXIT_PENDING status bit if we are not actually
2941          * exiting the module */
2942         if (!exit_pending)
2943                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2944
2945         /* stop and reset the on-board processor */
2946         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2947
2948         /* tell the device to stop sending interrupts */
2949         spin_lock_irqsave(&priv->lock, flags);
2950         iwl_disable_interrupts(priv);
2951         spin_unlock_irqrestore(&priv->lock, flags);
2952         iwl_synchronize_irq(priv);
2953
2954         if (priv->mac80211_registered)
2955                 ieee80211_stop_queues(priv->hw);
2956
2957         /* If we have not previously called iwl_init() then
2958          * clear all bits but the RF Kill bit and return */
2959         if (!iwl_is_init(priv)) {
2960                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2961                                         STATUS_RF_KILL_HW |
2962                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2963                                         STATUS_GEO_CONFIGURED |
2964                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2965                                         STATUS_EXIT_PENDING;
2966                 goto exit;
2967         }
2968
2969         /* ...otherwise clear out all the status bits but the RF Kill
2970          * bit and continue taking the NIC down. */
2971         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2972                                 STATUS_RF_KILL_HW |
2973                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2974                                 STATUS_GEO_CONFIGURED |
2975                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2976                                 STATUS_FW_ERROR |
2977                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2978                                 STATUS_EXIT_PENDING;
2979
2980         /* device going down, Stop using ICT table */
2981         iwl_disable_ict(priv);
2982
2983         iwlagn_txq_ctx_stop(priv);
2984         iwlagn_rxq_stop(priv);
2985
2986         /* Power-down device's busmaster DMA clocks */
2987         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2988         udelay(5);
2989
2990         /* Make sure (redundant) we've released our request to stay awake */
2991         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2992
2993         /* Stop the device, and put it in low power state */
2994         iwl_apm_stop(priv);
2995
2996  exit:
2997         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2998
2999         dev_kfree_skb(priv->beacon_skb);
3000         priv->beacon_skb = NULL;
3001
3002         /* clear out any free frames */
3003         iwl_clear_free_frames(priv);
3004 }
3005
3006 static void iwl_down(struct iwl_priv *priv)
3007 {
3008         mutex_lock(&priv->mutex);
3009         __iwl_down(priv);
3010         mutex_unlock(&priv->mutex);
3011
3012         iwl_cancel_deferred_work(priv);
3013 }
3014
3015 #define HW_READY_TIMEOUT (50)
3016
3017 static int iwl_set_hw_ready(struct iwl_priv *priv)
3018 {
3019         int ret = 0;
3020
3021         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
3022                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
3023
3024         /* See if we got it */
3025         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
3026                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
3027                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
3028                                 HW_READY_TIMEOUT);
3029         if (ret != -ETIMEDOUT)
3030                 priv->hw_ready = true;
3031         else
3032                 priv->hw_ready = false;
3033
3034         IWL_DEBUG_INFO(priv, "hardware %s\n",
3035                       (priv->hw_ready == 1) ? "ready" : "not ready");
3036         return ret;
3037 }
3038
3039 static int iwl_prepare_card_hw(struct iwl_priv *priv)
3040 {
3041         int ret = 0;
3042
3043         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
3044
3045         ret = iwl_set_hw_ready(priv);
3046         if (priv->hw_ready)
3047                 return ret;
3048
3049         /* If HW is not ready, prepare the conditions to check again */
3050         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
3051                         CSR_HW_IF_CONFIG_REG_PREPARE);
3052
3053         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
3054                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
3055                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
3056
3057         /* HW should be ready by now, check again. */
3058         if (ret != -ETIMEDOUT)
3059                 iwl_set_hw_ready(priv);
3060
3061         return ret;
3062 }
3063
3064 #define MAX_HW_RESTARTS 5
3065
3066 static int __iwl_up(struct iwl_priv *priv)
3067 {
3068         struct iwl_rxon_context *ctx;
3069         int i;
3070         int ret;
3071
3072         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3073                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
3074                 return -EIO;
3075         }
3076
3077         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
3078                 IWL_ERR(priv, "ucode not available for device bringup\n");
3079                 return -EIO;
3080         }
3081
3082         for_each_context(priv, ctx) {
3083                 ret = iwlagn_alloc_bcast_station(priv, ctx);
3084                 if (ret) {
3085                         iwl_dealloc_bcast_stations(priv);
3086                         return ret;
3087                 }
3088         }
3089
3090         iwl_prepare_card_hw(priv);
3091
3092         if (!priv->hw_ready) {
3093                 IWL_WARN(priv, "Exit HW not ready\n");
3094                 return -EIO;
3095         }
3096
3097         /* If platform's RF_KILL switch is NOT set to KILL */
3098         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3099                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3100         else
3101                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3102
3103         if (iwl_is_rfkill(priv)) {
3104                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
3105
3106                 iwl_enable_interrupts(priv);
3107                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
3108                 return 0;
3109         }
3110
3111         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3112
3113         /* must be initialised before iwl_hw_nic_init */
3114         if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
3115                 priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
3116         else
3117                 priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
3118
3119         ret = iwlagn_hw_nic_init(priv);
3120         if (ret) {
3121                 IWL_ERR(priv, "Unable to init nic\n");
3122                 return ret;
3123         }
3124
3125         /* make sure rfkill handshake bits are cleared */
3126         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3127         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
3128                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3129
3130         /* clear (again), then enable host interrupts */
3131         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3132         iwl_enable_interrupts(priv);
3133
3134         /* really make sure rfkill handshake bits are cleared */
3135         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3136         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3137
3138         /* Copy original ucode data image from disk into backup cache.
3139          * This will be used to initialize the on-board processor's
3140          * data SRAM for a clean start when the runtime program first loads. */
3141         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
3142                priv->ucode_data.len);
3143
3144         for (i = 0; i < MAX_HW_RESTARTS; i++) {
3145
3146                 /* load bootstrap state machine,
3147                  * load bootstrap program into processor's memory,
3148                  * prepare to load the "initialize" uCode */
3149                 ret = priv->cfg->ops->lib->load_ucode(priv);
3150
3151                 if (ret) {
3152                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
3153                                 ret);
3154                         continue;
3155                 }
3156
3157                 /* start card; "initialize" will load runtime ucode */
3158                 iwl_nic_start(priv);
3159
3160                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
3161
3162                 return 0;
3163         }
3164
3165         set_bit(STATUS_EXIT_PENDING, &priv->status);
3166         __iwl_down(priv);
3167         clear_bit(STATUS_EXIT_PENDING, &priv->status);
3168
3169         /* tried to restart and config the device for as long as our
3170          * patience could withstand */
3171         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
3172         return -EIO;
3173 }
3174
3175
3176 /*****************************************************************************
3177  *
3178  * Workqueue callbacks
3179  *
3180  *****************************************************************************/
3181
3182 static void iwl_bg_init_alive_start(struct work_struct *data)
3183 {
3184         struct iwl_priv *priv =
3185             container_of(data, struct iwl_priv, init_alive_start.work);
3186
3187         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3188                 return;
3189
3190         mutex_lock(&priv->mutex);
3191         priv->cfg->ops->lib->init_alive_start(priv);
3192         mutex_unlock(&priv->mutex);
3193 }
3194
3195 static void iwl_bg_alive_start(struct work_struct *data)
3196 {
3197         struct iwl_priv *priv =
3198             container_of(data, struct iwl_priv, alive_start.work);
3199
3200         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3201                 return;
3202
3203         /* enable dram interrupt */
3204         iwl_reset_ict(priv);
3205
3206         mutex_lock(&priv->mutex);
3207         iwl_alive_start(priv);
3208         mutex_unlock(&priv->mutex);
3209 }
3210
3211 static void iwl_bg_run_time_calib_work(struct work_struct *work)
3212 {
3213         struct iwl_priv *priv = container_of(work, struct iwl_priv,
3214                         run_time_calib_work);
3215
3216         mutex_lock(&priv->mutex);
3217
3218         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3219             test_bit(STATUS_SCANNING, &priv->status)) {
3220                 mutex_unlock(&priv->mutex);
3221                 return;
3222         }
3223
3224         if (priv->start_calib) {
3225                 if (priv->cfg->bt_params &&
3226                     priv->cfg->bt_params->bt_statistics) {
3227                         iwl_chain_noise_calibration(priv,
3228                                         (void *)&priv->_agn.statistics_bt);
3229                         iwl_sensitivity_calibration(priv,
3230                                         (void *)&priv->_agn.statistics_bt);
3231                 } else {
3232                         iwl_chain_noise_calibration(priv,
3233                                         (void *)&priv->_agn.statistics);
3234                         iwl_sensitivity_calibration(priv,
3235                                         (void *)&priv->_agn.statistics);
3236                 }
3237         }
3238
3239         mutex_unlock(&priv->mutex);
3240 }
3241
3242 static void iwl_bg_restart(struct work_struct *data)
3243 {
3244         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3245
3246         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3247                 return;
3248
3249         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3250                 struct iwl_rxon_context *ctx;
3251                 bool bt_sco, bt_full_concurrent;
3252                 u8 bt_ci_compliance;
3253                 u8 bt_load;
3254                 u8 bt_status;
3255
3256                 mutex_lock(&priv->mutex);
3257                 for_each_context(priv, ctx)
3258                         ctx->vif = NULL;
3259                 priv->is_open = 0;
3260
3261                 /*
3262                  * __iwl_down() will clear the BT status variables,
3263                  * which is correct, but when we restart we really
3264                  * want to keep them so restore them afterwards.
3265                  *
3266                  * The restart process will later pick them up and
3267                  * re-configure the hw when we reconfigure the BT
3268                  * command.
3269                  */
3270                 bt_sco = priv->bt_sco_active;
3271                 bt_full_concurrent = priv->bt_full_concurrent;
3272                 bt_ci_compliance = priv->bt_ci_compliance;
3273                 bt_load = priv->bt_traffic_load;
3274                 bt_status = priv->bt_status;
3275
3276                 __iwl_down(priv);
3277
3278                 priv->bt_sco_active = bt_sco;
3279                 priv->bt_full_concurrent = bt_full_concurrent;
3280                 priv->bt_ci_compliance = bt_ci_compliance;
3281                 priv->bt_traffic_load = bt_load;
3282                 priv->bt_status = bt_status;
3283
3284                 mutex_unlock(&priv->mutex);
3285                 iwl_cancel_deferred_work(priv);
3286                 ieee80211_restart_hw(priv->hw);
3287         } else {
3288                 iwl_down(priv);
3289
3290                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3291                         return;
3292
3293                 mutex_lock(&priv->mutex);
3294                 __iwl_up(priv);
3295                 mutex_unlock(&priv->mutex);
3296         }
3297 }
3298
3299 static void iwl_bg_rx_replenish(struct work_struct *data)
3300 {
3301         struct iwl_priv *priv =
3302             container_of(data, struct iwl_priv, rx_replenish);
3303
3304         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3305                 return;
3306
3307         mutex_lock(&priv->mutex);
3308         iwlagn_rx_replenish(priv);
3309         mutex_unlock(&priv->mutex);
3310 }
3311
3312 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3313
3314 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3315 {
3316         struct iwl_rxon_context *ctx;
3317         struct ieee80211_conf *conf = NULL;
3318         int ret = 0;
3319
3320         if (!vif || !priv->is_open)
3321                 return;
3322
3323         ctx = iwl_rxon_ctx_from_vif(vif);
3324
3325         if (vif->type == NL80211_IFTYPE_AP) {
3326                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3327                 return;
3328         }
3329
3330         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3331                 return;
3332
3333         iwl_scan_cancel_timeout(priv, 200);
3334
3335         conf = ieee80211_get_hw_conf(priv->hw);
3336
3337         ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3338         iwlcore_commit_rxon(priv, ctx);
3339
3340         ret = iwl_send_rxon_timing(priv, ctx);
3341         if (ret)
3342                 IWL_WARN(priv, "RXON timing - "
3343                             "Attempting to continue.\n");
3344
3345         ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
3346
3347         iwl_set_rxon_ht(priv, &priv->current_ht_config);
3348
3349         if (priv->cfg->ops->hcmd->set_rxon_chain)
3350                 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
3351
3352         ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3353
3354         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3355                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
3356
3357         if (vif->bss_conf.use_short_preamble)
3358                 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3359         else
3360                 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3361
3362         if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
3363                 if (vif->bss_conf.use_short_slot)
3364                         ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
3365                 else
3366                         ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3367         }
3368
3369         iwlcore_commit_rxon(priv, ctx);
3370
3371         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3372                         vif->bss_conf.aid, ctx->active.bssid_addr);
3373
3374         switch (vif->type) {
3375         case NL80211_IFTYPE_STATION:
3376                 break;
3377         case NL80211_IFTYPE_ADHOC:
3378                 iwl_send_beacon_cmd(priv);
3379                 break;
3380         default:
3381                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3382                           __func__, vif->type);
3383                 break;
3384         }
3385
3386         /* the chain noise calibration will enabled PM upon completion
3387          * If chain noise has already been run, then we need to enable
3388          * power management here */
3389         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
3390                 iwl_power_update_mode(priv, false);
3391
3392         /* Enable Rx differential gain and sensitivity calibrations */
3393         iwl_chain_noise_reset(priv);
3394         priv->start_calib = 1;
3395
3396 }
3397
3398 /*****************************************************************************
3399  *
3400  * mac80211 entry point functions
3401  *
3402  *****************************************************************************/
3403
3404 #define UCODE_READY_TIMEOUT     (4 * HZ)
3405
3406 /*
3407  * Not a mac80211 entry point function, but it fits in with all the
3408  * other mac80211 functions grouped here.
3409  */
3410 static int iwl_mac_setup_register(struct iwl_priv *priv,
3411                                   struct iwlagn_ucode_capabilities *capa)
3412 {
3413         int ret;
3414         struct ieee80211_hw *hw = priv->hw;
3415         struct iwl_rxon_context *ctx;
3416
3417         hw->rate_control_algorithm = "iwl-agn-rs";
3418
3419         /* Tell mac80211 our characteristics */
3420         hw->flags = IEEE80211_HW_SIGNAL_DBM |
3421                     IEEE80211_HW_AMPDU_AGGREGATION |
3422                     IEEE80211_HW_NEED_DTIM_PERIOD |
3423                     IEEE80211_HW_SPECTRUM_MGMT;
3424
3425         if (!priv->cfg->base_params->broken_powersave)
3426                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3427                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3428
3429         if (priv->cfg->sku & IWL_SKU_N)
3430                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3431                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3432
3433         hw->sta_data_size = sizeof(struct iwl_station_priv);
3434         hw->vif_data_size = sizeof(struct iwl_vif_priv);
3435
3436         for_each_context(priv, ctx) {
3437                 hw->wiphy->interface_modes |= ctx->interface_modes;
3438                 hw->wiphy->interface_modes |= ctx->exclusive_interface_modes;
3439         }
3440
3441         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3442                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
3443
3444         /*
3445          * For now, disable PS by default because it affects
3446          * RX performance significantly.
3447          */
3448         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3449
3450         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
3451         /* we create the 802.11 header and a zero-length SSID element */
3452         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
3453
3454         /* Default value; 4 EDCA QOS priorities */
3455         hw->queues = 4;
3456
3457         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
3458
3459         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3460                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3461                         &priv->bands[IEEE80211_BAND_2GHZ];
3462         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3463                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3464                         &priv->bands[IEEE80211_BAND_5GHZ];
3465
3466         ret = ieee80211_register_hw(priv->hw);
3467         if (ret) {
3468                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3469                 return ret;
3470         }
3471         priv->mac80211_registered = 1;
3472
3473         return 0;
3474 }
3475
3476
3477 static int iwl_mac_start(struct ieee80211_hw *hw)
3478 {
3479         struct iwl_priv *priv = hw->priv;
3480         int ret;
3481
3482         IWL_DEBUG_MAC80211(priv, "enter\n");
3483
3484         /* we should be verifying the device is ready to be opened */
3485         mutex_lock(&priv->mutex);
3486         ret = __iwl_up(priv);
3487         mutex_unlock(&priv->mutex);
3488
3489         if (ret)
3490                 return ret;
3491
3492         if (iwl_is_rfkill(priv))
3493                 goto out;
3494
3495         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3496
3497         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3498          * mac80211 will not be run successfully. */
3499         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3500                         test_bit(STATUS_READY, &priv->status),
3501                         UCODE_READY_TIMEOUT);
3502         if (!ret) {
3503                 if (!test_bit(STATUS_READY, &priv->status)) {
3504                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3505                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3506                         return -ETIMEDOUT;
3507                 }
3508         }
3509
3510         iwl_led_start(priv);
3511
3512 out:
3513         priv->is_open = 1;
3514         IWL_DEBUG_MAC80211(priv, "leave\n");
3515         return 0;
3516 }
3517
3518 static void iwl_mac_stop(struct ieee80211_hw *hw)
3519 {
3520         struct iwl_priv *priv = hw->priv;
3521
3522         IWL_DEBUG_MAC80211(priv, "enter\n");
3523
3524         if (!priv->is_open)
3525                 return;
3526
3527         priv->is_open = 0;
3528
3529         iwl_down(priv);
3530
3531         flush_workqueue(priv->workqueue);
3532
3533         /* enable interrupts again in order to receive rfkill changes */
3534         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3535         iwl_enable_interrupts(priv);
3536
3537         IWL_DEBUG_MAC80211(priv, "leave\n");
3538 }
3539
3540 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3541 {
3542         struct iwl_priv *priv = hw->priv;
3543
3544         IWL_DEBUG_MACDUMP(priv, "enter\n");
3545
3546         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3547                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3548
3549         if (iwlagn_tx_skb(priv, skb))
3550                 dev_kfree_skb_any(skb);
3551
3552         IWL_DEBUG_MACDUMP(priv, "leave\n");
3553         return NETDEV_TX_OK;
3554 }
3555
3556 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3557 {
3558         struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
3559         int ret = 0;
3560
3561         lockdep_assert_held(&priv->mutex);
3562
3563         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3564                 return;
3565
3566         /* The following should be done only at AP bring up */
3567         if (!iwl_is_associated_ctx(ctx)) {
3568
3569                 /* RXON - unassoc (to set timing command) */
3570                 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3571                 iwlcore_commit_rxon(priv, ctx);
3572
3573                 /* RXON Timing */
3574                 ret = iwl_send_rxon_timing(priv, ctx);
3575                 if (ret)
3576                         IWL_WARN(priv, "RXON timing failed - "
3577                                         "Attempting to continue.\n");
3578
3579                 /* AP has all antennas */
3580                 priv->chain_noise_data.active_chains =
3581                         priv->hw_params.valid_rx_ant;
3582                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3583                 if (priv->cfg->ops->hcmd->set_rxon_chain)
3584                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
3585
3586                 ctx->staging.assoc_id = 0;
3587
3588                 if (vif->bss_conf.use_short_preamble)
3589                         ctx->staging.flags |=
3590                                 RXON_FLG_SHORT_PREAMBLE_MSK;
3591                 else
3592                         ctx->staging.flags &=
3593                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3594
3595                 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
3596                         if (vif->bss_conf.use_short_slot)
3597                                 ctx->staging.flags |=
3598                                         RXON_FLG_SHORT_SLOT_MSK;
3599                         else
3600                                 ctx->staging.flags &=
3601                                         ~RXON_FLG_SHORT_SLOT_MSK;
3602                 }
3603                 /* need to send beacon cmd before committing assoc RXON! */
3604                 iwl_send_beacon_cmd(priv);
3605                 /* restore RXON assoc */
3606                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
3607                 iwlcore_commit_rxon(priv, ctx);
3608         }
3609         iwl_send_beacon_cmd(priv);
3610
3611         /* FIXME - we need to add code here to detect a totally new
3612          * configuration, reset the AP, unassoc, rxon timing, assoc,
3613          * clear sta table, add BCAST sta... */
3614 }
3615
3616 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3617                                     struct ieee80211_vif *vif,
3618                                     struct ieee80211_key_conf *keyconf,
3619                                     struct ieee80211_sta *sta,
3620                                     u32 iv32, u16 *phase1key)
3621 {
3622
3623         struct iwl_priv *priv = hw->priv;
3624         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3625
3626         IWL_DEBUG_MAC80211(priv, "enter\n");
3627
3628         iwl_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
3629                             iv32, phase1key);
3630
3631         IWL_DEBUG_MAC80211(priv, "leave\n");
3632 }
3633
3634 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3635                            struct ieee80211_vif *vif,
3636                            struct ieee80211_sta *sta,
3637                            struct ieee80211_key_conf *key)
3638 {
3639         struct iwl_priv *priv = hw->priv;
3640         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3641         struct iwl_rxon_context *ctx = vif_priv->ctx;
3642         int ret;
3643         u8 sta_id;
3644         bool is_default_wep_key = false;
3645
3646         IWL_DEBUG_MAC80211(priv, "enter\n");
3647
3648         if (priv->cfg->mod_params->sw_crypto) {
3649                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3650                 return -EOPNOTSUPP;
3651         }
3652
3653         sta_id = iwl_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
3654         if (sta_id == IWL_INVALID_STATION)
3655                 return -EINVAL;
3656
3657         mutex_lock(&priv->mutex);
3658         iwl_scan_cancel_timeout(priv, 100);
3659
3660         /*
3661          * If we are getting WEP group key and we didn't receive any key mapping
3662          * so far, we are in legacy wep mode (group key only), otherwise we are
3663          * in 1X mode.
3664          * In legacy wep mode, we use another host command to the uCode.
3665          */
3666         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3667              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
3668             !sta) {
3669                 if (cmd == SET_KEY)
3670                         is_default_wep_key = !ctx->key_mapping_keys;
3671                 else
3672                         is_default_wep_key =
3673                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3674         }
3675
3676         switch (cmd) {
3677         case SET_KEY:
3678                 if (is_default_wep_key)
3679                         ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key);
3680                 else
3681                         ret = iwl_set_dynamic_key(priv, vif_priv->ctx,
3682                                                   key, sta_id);
3683
3684                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3685                 break;
3686         case DISABLE_KEY:
3687                 if (is_default_wep_key)
3688                         ret = iwl_remove_default_wep_key(priv, ctx, key);
3689                 else
3690                         ret = iwl_remove_dynamic_key(priv, ctx, key, sta_id);
3691
3692                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3693                 break;
3694         default:
3695                 ret = -EINVAL;
3696         }
3697
3698         mutex_unlock(&priv->mutex);
3699         IWL_DEBUG_MAC80211(priv, "leave\n");
3700
3701         return ret;
3702 }
3703
3704 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3705                                 struct ieee80211_vif *vif,
3706                                 enum ieee80211_ampdu_mlme_action action,
3707                                 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3708 {
3709         struct iwl_priv *priv = hw->priv;
3710         int ret = -EINVAL;
3711
3712         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3713                      sta->addr, tid);
3714
3715         if (!(priv->cfg->sku & IWL_SKU_N))
3716                 return -EACCES;
3717
3718         mutex_lock(&priv->mutex);
3719
3720         switch (action) {
3721         case IEEE80211_AMPDU_RX_START:
3722                 IWL_DEBUG_HT(priv, "start Rx\n");
3723                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3724                 break;
3725         case IEEE80211_AMPDU_RX_STOP:
3726                 IWL_DEBUG_HT(priv, "stop Rx\n");
3727                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3728                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3729                         ret = 0;
3730                 break;
3731         case IEEE80211_AMPDU_TX_START:
3732                 IWL_DEBUG_HT(priv, "start Tx\n");
3733                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3734                 if (ret == 0) {
3735                         priv->_agn.agg_tids_count++;
3736                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3737                                      priv->_agn.agg_tids_count);
3738                 }
3739                 break;
3740         case IEEE80211_AMPDU_TX_STOP:
3741                 IWL_DEBUG_HT(priv, "stop Tx\n");
3742                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3743                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3744                         priv->_agn.agg_tids_count--;
3745                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3746                                      priv->_agn.agg_tids_count);
3747                 }
3748                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3749                         ret = 0;
3750                 if (priv->cfg->ht_params &&
3751                     priv->cfg->ht_params->use_rts_for_aggregation) {
3752                         struct iwl_station_priv *sta_priv =
3753                                 (void *) sta->drv_priv;
3754                         /*
3755                          * switch off RTS/CTS if it was previously enabled
3756                          */
3757
3758                         sta_priv->lq_sta.lq.general_params.flags &=
3759                                 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3760                         iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
3761                                         &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3762                 }
3763                 break;
3764         case IEEE80211_AMPDU_TX_OPERATIONAL:
3765                 if (priv->cfg->ht_params &&
3766                     priv->cfg->ht_params->use_rts_for_aggregation) {
3767                         struct iwl_station_priv *sta_priv =
3768                                 (void *) sta->drv_priv;
3769
3770                         /*
3771                          * switch to RTS/CTS if it is the prefer protection
3772                          * method for HT traffic
3773                          */
3774
3775                         sta_priv->lq_sta.lq.general_params.flags |=
3776                                 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3777                         iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
3778                                         &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3779                 }
3780                 ret = 0;
3781                 break;
3782         }
3783         mutex_unlock(&priv->mutex);
3784
3785         return ret;
3786 }
3787
3788 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3789                                struct ieee80211_vif *vif,
3790                                enum sta_notify_cmd cmd,
3791                                struct ieee80211_sta *sta)
3792 {
3793         struct iwl_priv *priv = hw->priv;
3794         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3795         int sta_id;
3796
3797         switch (cmd) {
3798         case STA_NOTIFY_SLEEP:
3799                 WARN_ON(!sta_priv->client);
3800                 sta_priv->asleep = true;
3801                 if (atomic_read(&sta_priv->pending_frames) > 0)
3802                         ieee80211_sta_block_awake(hw, sta, true);
3803                 break;
3804         case STA_NOTIFY_AWAKE:
3805                 WARN_ON(!sta_priv->client);
3806                 if (!sta_priv->asleep)
3807                         break;
3808                 sta_priv->asleep = false;
3809                 sta_id = iwl_sta_id(sta);
3810                 if (sta_id != IWL_INVALID_STATION)
3811                         iwl_sta_modify_ps_wake(priv, sta_id);
3812                 break;
3813         default:
3814                 break;
3815         }
3816 }
3817
3818 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3819                               struct ieee80211_vif *vif,
3820                               struct ieee80211_sta *sta)
3821 {
3822         struct iwl_priv *priv = hw->priv;
3823         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3824         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3825         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3826         int ret;
3827         u8 sta_id;
3828
3829         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3830                         sta->addr);
3831         mutex_lock(&priv->mutex);
3832         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3833                         sta->addr);
3834         sta_priv->common.sta_id = IWL_INVALID_STATION;
3835
3836         atomic_set(&sta_priv->pending_frames, 0);
3837         if (vif->type == NL80211_IFTYPE_AP)
3838                 sta_priv->client = true;
3839
3840         ret = iwl_add_station_common(priv, vif_priv->ctx, sta->addr,
3841                                      is_ap, sta, &sta_id);
3842         if (ret) {
3843                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3844                         sta->addr, ret);
3845                 /* Should we return success if return code is EEXIST ? */
3846                 mutex_unlock(&priv->mutex);
3847                 return ret;
3848         }
3849
3850         sta_priv->common.sta_id = sta_id;
3851
3852         /* Initialize rate scaling */
3853         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3854                        sta->addr);
3855         iwl_rs_rate_init(priv, sta, sta_id);
3856         mutex_unlock(&priv->mutex);
3857
3858         return 0;
3859 }
3860
3861 static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3862                                    struct ieee80211_channel_switch *ch_switch)
3863 {
3864         struct iwl_priv *priv = hw->priv;
3865         const struct iwl_channel_info *ch_info;
3866         struct ieee80211_conf *conf = &hw->conf;
3867         struct ieee80211_channel *channel = ch_switch->channel;
3868         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3869         /*
3870          * MULTI-FIXME
3871          * When we add support for multiple interfaces, we need to
3872          * revisit this. The channel switch command in the device
3873          * only affects the BSS context, but what does that really
3874          * mean? And what if we get a CSA on the second interface?
3875          * This needs a lot of work.
3876          */
3877         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3878         u16 ch;
3879         unsigned long flags = 0;
3880
3881         IWL_DEBUG_MAC80211(priv, "enter\n");
3882
3883         if (iwl_is_rfkill(priv))
3884                 goto out_exit;
3885
3886         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3887             test_bit(STATUS_SCANNING, &priv->status))
3888                 goto out_exit;
3889
3890         if (!iwl_is_associated_ctx(ctx))
3891                 goto out_exit;
3892
3893         /* channel switch in progress */
3894         if (priv->switch_rxon.switch_in_progress == true)
3895                 goto out_exit;
3896
3897         mutex_lock(&priv->mutex);
3898         if (priv->cfg->ops->lib->set_channel_switch) {
3899
3900                 ch = channel->hw_value;
3901                 if (le16_to_cpu(ctx->active.channel) != ch) {
3902                         ch_info = iwl_get_channel_info(priv,
3903                                                        channel->band,
3904                                                        ch);
3905                         if (!is_channel_valid(ch_info)) {
3906                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3907                                 goto out;
3908                         }
3909                         spin_lock_irqsave(&priv->lock, flags);
3910
3911                         priv->current_ht_config.smps = conf->smps_mode;
3912
3913                         /* Configure HT40 channels */
3914                         ctx->ht.enabled = conf_is_ht(conf);
3915                         if (ctx->ht.enabled) {
3916                                 if (conf_is_ht40_minus(conf)) {
3917                                         ctx->ht.extension_chan_offset =
3918                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3919                                         ctx->ht.is_40mhz = true;
3920                                 } else if (conf_is_ht40_plus(conf)) {
3921                                         ctx->ht.extension_chan_offset =
3922                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3923                                         ctx->ht.is_40mhz = true;
3924                                 } else {
3925                                         ctx->ht.extension_chan_offset =
3926                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3927                                         ctx->ht.is_40mhz = false;
3928                                 }
3929                         } else
3930                                 ctx->ht.is_40mhz = false;
3931
3932                         if ((le16_to_cpu(ctx->staging.channel) != ch))
3933                                 ctx->staging.flags = 0;
3934
3935                         iwl_set_rxon_channel(priv, channel, ctx);
3936                         iwl_set_rxon_ht(priv, ht_conf);
3937                         iwl_set_flags_for_band(priv, ctx, channel->band,
3938                                                ctx->vif);
3939                         spin_unlock_irqrestore(&priv->lock, flags);
3940
3941                         iwl_set_rate(priv);
3942                         /*
3943                          * at this point, staging_rxon has the
3944                          * configuration for channel switch
3945                          */
3946                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3947                                                                     ch_switch))
3948                                 priv->switch_rxon.switch_in_progress = false;
3949                 }
3950         }
3951 out:
3952         mutex_unlock(&priv->mutex);
3953 out_exit:
3954         if (!priv->switch_rxon.switch_in_progress)
3955                 ieee80211_chswitch_done(ctx->vif, false);
3956         IWL_DEBUG_MAC80211(priv, "leave\n");
3957 }
3958
3959 static void iwlagn_configure_filter(struct ieee80211_hw *hw,
3960                                     unsigned int changed_flags,
3961                                     unsigned int *total_flags,
3962                                     u64 multicast)
3963 {
3964         struct iwl_priv *priv = hw->priv;
3965         __le32 filter_or = 0, filter_nand = 0;
3966         struct iwl_rxon_context *ctx;
3967
3968 #define CHK(test, flag) do { \
3969         if (*total_flags & (test))              \
3970                 filter_or |= (flag);            \
3971         else                                    \
3972                 filter_nand |= (flag);          \
3973         } while (0)
3974
3975         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
3976                         changed_flags, *total_flags);
3977
3978         CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3979         CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3980         CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3981
3982 #undef CHK
3983
3984         mutex_lock(&priv->mutex);
3985
3986         for_each_context(priv, ctx) {
3987                 ctx->staging.filter_flags &= ~filter_nand;
3988                 ctx->staging.filter_flags |= filter_or;
3989                 iwlcore_commit_rxon(priv, ctx);
3990         }
3991
3992         mutex_unlock(&priv->mutex);
3993
3994         /*
3995          * Receiving all multicast frames is always enabled by the
3996          * default flags setup in iwl_connection_init_rx_config()
3997          * since we currently do not support programming multicast
3998          * filters into the device.
3999          */
4000         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
4001                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
4002 }
4003
4004 static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop)
4005 {
4006         struct iwl_priv *priv = hw->priv;
4007
4008         mutex_lock(&priv->mutex);
4009         IWL_DEBUG_MAC80211(priv, "enter\n");
4010
4011         /* do not support "flush" */
4012         if (!priv->cfg->ops->lib->txfifo_flush)
4013                 goto done;
4014
4015         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4016                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
4017                 goto done;
4018         }
4019         if (iwl_is_rfkill(priv)) {
4020                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
4021                 goto done;
4022         }
4023
4024         /*
4025          * mac80211 will not push any more frames for transmit
4026          * until the flush is completed
4027          */
4028         if (drop) {
4029                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
4030                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
4031                         IWL_ERR(priv, "flush request fail\n");
4032                         goto done;
4033                 }
4034         }
4035         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
4036         iwlagn_wait_tx_queue_empty(priv);
4037 done:
4038         mutex_unlock(&priv->mutex);
4039         IWL_DEBUG_MAC80211(priv, "leave\n");
4040 }
4041
4042 /*****************************************************************************
4043  *
4044  * driver setup and teardown
4045  *
4046  *****************************************************************************/
4047
4048 static void iwl_setup_deferred_work(struct iwl_priv *priv)
4049 {
4050         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
4051
4052         init_waitqueue_head(&priv->wait_command_queue);
4053
4054         INIT_WORK(&priv->restart, iwl_bg_restart);
4055         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
4056         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
4057         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
4058         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
4059         INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
4060         INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
4061         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
4062         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
4063
4064         iwl_setup_scan_deferred_work(priv);
4065
4066         if (priv->cfg->ops->lib->setup_deferred_work)
4067                 priv->cfg->ops->lib->setup_deferred_work(priv);
4068
4069         init_timer(&priv->statistics_periodic);
4070         priv->statistics_periodic.data = (unsigned long)priv;
4071         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
4072
4073         init_timer(&priv->ucode_trace);
4074         priv->ucode_trace.data = (unsigned long)priv;
4075         priv->ucode_trace.function = iwl_bg_ucode_trace;
4076
4077         if (priv->cfg->ops->lib->recover_from_tx_stall) {
4078                 init_timer(&priv->monitor_recover);
4079                 priv->monitor_recover.data = (unsigned long)priv;
4080                 priv->monitor_recover.function =
4081                         priv->cfg->ops->lib->recover_from_tx_stall;
4082         }
4083
4084         if (!priv->cfg->base_params->use_isr_legacy)
4085                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
4086                         iwl_irq_tasklet, (unsigned long)priv);
4087         else
4088                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
4089                         iwl_irq_tasklet_legacy, (unsigned long)priv);
4090 }
4091
4092 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
4093 {
4094         if (priv->cfg->ops->lib->cancel_deferred_work)
4095                 priv->cfg->ops->lib->cancel_deferred_work(priv);
4096
4097         cancel_delayed_work_sync(&priv->init_alive_start);
4098         cancel_delayed_work(&priv->alive_start);
4099         cancel_work_sync(&priv->run_time_calib_work);
4100         cancel_work_sync(&priv->beacon_update);
4101
4102         iwl_cancel_scan_deferred_work(priv);
4103
4104         cancel_work_sync(&priv->bt_full_concurrency);
4105         cancel_work_sync(&priv->bt_runtime_config);
4106
4107         del_timer_sync(&priv->statistics_periodic);
4108         del_timer_sync(&priv->ucode_trace);
4109 }
4110
4111 static void iwl_init_hw_rates(struct iwl_priv *priv,
4112                               struct ieee80211_rate *rates)
4113 {
4114         int i;
4115
4116         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
4117                 rates[i].bitrate = iwl_rates[i].ieee * 5;
4118                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4119                 rates[i].hw_value_short = i;
4120                 rates[i].flags = 0;
4121                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
4122                         /*
4123                          * If CCK != 1M then set short preamble rate flag.
4124                          */
4125                         rates[i].flags |=
4126                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
4127                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
4128                 }
4129         }
4130 }
4131
4132 static int iwl_init_drv(struct iwl_priv *priv)
4133 {
4134         int ret;
4135
4136         spin_lock_init(&priv->sta_lock);
4137         spin_lock_init(&priv->hcmd_lock);
4138
4139         INIT_LIST_HEAD(&priv->free_frames);
4140
4141         mutex_init(&priv->mutex);
4142         mutex_init(&priv->sync_cmd_mutex);
4143
4144         priv->ieee_channels = NULL;
4145         priv->ieee_rates = NULL;
4146         priv->band = IEEE80211_BAND_2GHZ;
4147
4148         priv->iw_mode = NL80211_IFTYPE_STATION;
4149         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
4150         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
4151         priv->_agn.agg_tids_count = 0;
4152
4153         /* initialize force reset */
4154         priv->force_reset[IWL_RF_RESET].reset_duration =
4155                 IWL_DELAY_NEXT_FORCE_RF_RESET;
4156         priv->force_reset[IWL_FW_RESET].reset_duration =
4157                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
4158
4159         /* Choose which receivers/antennas to use */
4160         if (priv->cfg->ops->hcmd->set_rxon_chain)
4161                 priv->cfg->ops->hcmd->set_rxon_chain(priv,
4162                                         &priv->contexts[IWL_RXON_CTX_BSS]);
4163
4164         iwl_init_scan_params(priv);
4165
4166         /* init bt coex */
4167         if (priv->cfg->bt_params &&
4168             priv->cfg->bt_params->advanced_bt_coexist) {
4169                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
4170                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
4171                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
4172                 priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
4173                 priv->bt_duration = BT_DURATION_LIMIT_DEF;
4174                 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
4175                 priv->dynamic_agg_thresh = BT_AGG_THRESHOLD_DEF;
4176         }
4177
4178         /* Set the tx_power_user_lmt to the lowest power level
4179          * this value will get overwritten by channel max power avg
4180          * from eeprom */
4181         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
4182
4183         ret = iwl_init_channel_map(priv);
4184         if (ret) {
4185                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
4186                 goto err;
4187         }
4188
4189         ret = iwlcore_init_geos(priv);
4190         if (ret) {
4191                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
4192                 goto err_free_channel_map;
4193         }
4194         iwl_init_hw_rates(priv, priv->ieee_rates);
4195
4196         return 0;
4197
4198 err_free_channel_map:
4199         iwl_free_channel_map(priv);
4200 err:
4201         return ret;
4202 }
4203
4204 static void iwl_uninit_drv(struct iwl_priv *priv)
4205 {
4206         iwl_calib_free_results(priv);
4207         iwlcore_free_geos(priv);
4208         iwl_free_channel_map(priv);
4209         kfree(priv->scan_cmd);
4210 }
4211
4212 static struct ieee80211_ops iwl_hw_ops = {
4213         .tx = iwl_mac_tx,
4214         .start = iwl_mac_start,
4215         .stop = iwl_mac_stop,
4216         .add_interface = iwl_mac_add_interface,
4217         .remove_interface = iwl_mac_remove_interface,
4218         .config = iwl_mac_config,
4219         .configure_filter = iwlagn_configure_filter,
4220         .set_key = iwl_mac_set_key,
4221         .update_tkip_key = iwl_mac_update_tkip_key,
4222         .conf_tx = iwl_mac_conf_tx,
4223         .reset_tsf = iwl_mac_reset_tsf,
4224         .bss_info_changed = iwl_bss_info_changed,
4225         .ampdu_action = iwl_mac_ampdu_action,
4226         .hw_scan = iwl_mac_hw_scan,
4227         .sta_notify = iwl_mac_sta_notify,
4228         .sta_add = iwlagn_mac_sta_add,
4229         .sta_remove = iwl_mac_sta_remove,
4230         .channel_switch = iwl_mac_channel_switch,
4231         .flush = iwl_mac_flush,
4232         .tx_last_beacon = iwl_mac_tx_last_beacon,
4233 };
4234
4235 static void iwl_hw_detect(struct iwl_priv *priv)
4236 {
4237         priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
4238         priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
4239         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
4240         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
4241 }
4242
4243 static int iwl_set_hw_params(struct iwl_priv *priv)
4244 {
4245         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
4246         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
4247         if (priv->cfg->mod_params->amsdu_size_8K)
4248                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
4249         else
4250                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
4251
4252         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
4253
4254         if (priv->cfg->mod_params->disable_11n)
4255                 priv->cfg->sku &= ~IWL_SKU_N;
4256
4257         /* Device-specific setup */
4258         return priv->cfg->ops->lib->set_hw_params(priv);
4259 }
4260
4261 static const u8 iwlagn_bss_ac_to_fifo[] = {
4262         IWL_TX_FIFO_VO,
4263         IWL_TX_FIFO_VI,
4264         IWL_TX_FIFO_BE,
4265         IWL_TX_FIFO_BK,
4266 };
4267
4268 static const u8 iwlagn_bss_ac_to_queue[] = {
4269         0, 1, 2, 3,
4270 };
4271
4272 static const u8 iwlagn_pan_ac_to_fifo[] = {
4273         IWL_TX_FIFO_VO_IPAN,
4274         IWL_TX_FIFO_VI_IPAN,
4275         IWL_TX_FIFO_BE_IPAN,
4276         IWL_TX_FIFO_BK_IPAN,
4277 };
4278
4279 static const u8 iwlagn_pan_ac_to_queue[] = {
4280         7, 6, 5, 4,
4281 };
4282
4283 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4284 {
4285         int err = 0, i;
4286         struct iwl_priv *priv;
4287         struct ieee80211_hw *hw;
4288         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
4289         unsigned long flags;
4290         u16 pci_cmd, num_mac;
4291
4292         /************************
4293          * 1. Allocating HW data
4294          ************************/
4295
4296         /* Disabling hardware scan means that mac80211 will perform scans
4297          * "the hard way", rather than using device's scan. */
4298         if (cfg->mod_params->disable_hw_scan) {
4299                 dev_printk(KERN_DEBUG, &(pdev->dev),
4300                         "sw scan support is deprecated\n");
4301                 iwl_hw_ops.hw_scan = NULL;
4302         }
4303
4304         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
4305         if (!hw) {
4306                 err = -ENOMEM;
4307                 goto out;
4308         }
4309         priv = hw->priv;
4310         /* At this point both hw and priv are allocated. */
4311
4312         /*
4313          * The default context is always valid,
4314          * more may be discovered when firmware
4315          * is loaded.
4316          */
4317         priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
4318
4319         for (i = 0; i < NUM_IWL_RXON_CTX; i++)
4320                 priv->contexts[i].ctxid = i;
4321
4322         priv->contexts[IWL_RXON_CTX_BSS].always_active = true;
4323         priv->contexts[IWL_RXON_CTX_BSS].is_active = true;
4324         priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
4325         priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
4326         priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
4327         priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
4328         priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
4329         priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
4330         priv->contexts[IWL_RXON_CTX_BSS].ac_to_fifo = iwlagn_bss_ac_to_fifo;
4331         priv->contexts[IWL_RXON_CTX_BSS].ac_to_queue = iwlagn_bss_ac_to_queue;
4332         priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes =
4333                 BIT(NL80211_IFTYPE_ADHOC);
4334         priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
4335                 BIT(NL80211_IFTYPE_STATION);
4336         priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
4337         priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
4338         priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
4339
4340         priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON;
4341         priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd = REPLY_WIPAN_RXON_TIMING;
4342         priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd = REPLY_WIPAN_RXON_ASSOC;
4343         priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM;
4344         priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN;
4345         priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY;
4346         priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID;
4347         priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION;
4348         priv->contexts[IWL_RXON_CTX_PAN].ac_to_fifo = iwlagn_pan_ac_to_fifo;
4349         priv->contexts[IWL_RXON_CTX_PAN].ac_to_queue = iwlagn_pan_ac_to_queue;
4350         priv->contexts[IWL_RXON_CTX_PAN].mcast_queue = IWL_IPAN_MCAST_QUEUE;
4351         priv->contexts[IWL_RXON_CTX_PAN].interface_modes =
4352                 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP);
4353         priv->contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP;
4354         priv->contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA;
4355         priv->contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P;
4356
4357         BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
4358
4359         SET_IEEE80211_DEV(hw, &pdev->dev);
4360
4361         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
4362         priv->cfg = cfg;
4363         priv->pci_dev = pdev;
4364         priv->inta_mask = CSR_INI_SET_MASK;
4365
4366         /* is antenna coupling more than 35dB ? */
4367         priv->bt_ant_couple_ok =
4368                 (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
4369                 true : false;
4370
4371         /* enable/disable bt channel announcement */
4372         priv->bt_ch_announce = iwlagn_bt_ch_announce;
4373
4374         if (iwl_alloc_traffic_mem(priv))
4375                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
4376
4377         /**************************
4378          * 2. Initializing PCI bus
4379          **************************/
4380         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
4381                                 PCIE_LINK_STATE_CLKPM);
4382
4383         if (pci_enable_device(pdev)) {
4384                 err = -ENODEV;
4385                 goto out_ieee80211_free_hw;
4386         }
4387
4388         pci_set_master(pdev);
4389
4390         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
4391         if (!err)
4392                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
4393         if (err) {
4394                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4395                 if (!err)
4396                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4397                 /* both attempts failed: */
4398                 if (err) {
4399                         IWL_WARN(priv, "No suitable DMA available.\n");
4400                         goto out_pci_disable_device;
4401                 }
4402         }
4403
4404         err = pci_request_regions(pdev, DRV_NAME);
4405         if (err)
4406                 goto out_pci_disable_device;
4407
4408         pci_set_drvdata(pdev, priv);
4409
4410
4411         /***********************
4412          * 3. Read REV register
4413          ***********************/
4414         priv->hw_base = pci_iomap(pdev, 0, 0);
4415         if (!priv->hw_base) {
4416                 err = -ENODEV;
4417                 goto out_pci_release_regions;
4418         }
4419
4420         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4421                 (unsigned long long) pci_resource_len(pdev, 0));
4422         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4423
4424         /* these spin locks will be used in apm_ops.init and EEPROM access
4425          * we should init now
4426          */
4427         spin_lock_init(&priv->reg_lock);
4428         spin_lock_init(&priv->lock);
4429
4430         /*
4431          * stop and reset the on-board processor just in case it is in a
4432          * strange state ... like being left stranded by a primary kernel
4433          * and this is now the kdump kernel trying to start up
4434          */
4435         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4436
4437         iwl_hw_detect(priv);
4438         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
4439                 priv->cfg->name, priv->hw_rev);
4440
4441         /* We disable the RETRY_TIMEOUT register (0x41) to keep
4442          * PCI Tx retries from interfering with C3 CPU state */
4443         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4444
4445         iwl_prepare_card_hw(priv);
4446         if (!priv->hw_ready) {
4447                 IWL_WARN(priv, "Failed, HW not ready\n");
4448                 goto out_iounmap;
4449         }
4450
4451         /*****************
4452          * 4. Read EEPROM
4453          *****************/
4454         /* Read the EEPROM */
4455         err = iwl_eeprom_init(priv);
4456         if (err) {
4457                 IWL_ERR(priv, "Unable to init EEPROM\n");
4458                 goto out_iounmap;
4459         }
4460         err = iwl_eeprom_check_version(priv);
4461         if (err)
4462                 goto out_free_eeprom;
4463
4464         /* extract MAC Address */
4465         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
4466         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
4467         priv->hw->wiphy->addresses = priv->addresses;
4468         priv->hw->wiphy->n_addresses = 1;
4469         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
4470         if (num_mac > 1) {
4471                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
4472                        ETH_ALEN);
4473                 priv->addresses[1].addr[5]++;
4474                 priv->hw->wiphy->n_addresses++;
4475         }
4476
4477         /************************
4478          * 5. Setup HW constants
4479          ************************/
4480         if (iwl_set_hw_params(priv)) {
4481                 IWL_ERR(priv, "failed to set hw parameters\n");
4482                 goto out_free_eeprom;
4483         }
4484
4485         /*******************
4486          * 6. Setup priv
4487          *******************/
4488
4489         err = iwl_init_drv(priv);
4490         if (err)
4491                 goto out_free_eeprom;
4492         /* At this point both hw and priv are initialized. */
4493
4494         /********************
4495          * 7. Setup services
4496          ********************/
4497         spin_lock_irqsave(&priv->lock, flags);
4498         iwl_disable_interrupts(priv);
4499         spin_unlock_irqrestore(&priv->lock, flags);
4500
4501         pci_enable_msi(priv->pci_dev);
4502
4503         iwl_alloc_isr_ict(priv);
4504         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4505                           IRQF_SHARED, DRV_NAME, priv);
4506         if (err) {
4507                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4508                 goto out_disable_msi;
4509         }
4510
4511         iwl_setup_deferred_work(priv);
4512         iwl_setup_rx_handlers(priv);
4513
4514         /*********************************************
4515          * 8. Enable interrupts and read RFKILL state
4516          *********************************************/
4517
4518         /* enable interrupts if needed: hw bug w/a */
4519         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
4520         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
4521                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
4522                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
4523         }
4524
4525         iwl_enable_interrupts(priv);
4526
4527         /* If platform's RF_KILL switch is NOT set to KILL */
4528         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
4529                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4530         else
4531                 set_bit(STATUS_RF_KILL_HW, &priv->status);
4532
4533         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
4534                 test_bit(STATUS_RF_KILL_HW, &priv->status));
4535
4536         iwl_power_initialize(priv);
4537         iwl_tt_initialize(priv);
4538
4539         init_completion(&priv->_agn.firmware_loading_complete);
4540
4541         err = iwl_request_firmware(priv, true);
4542         if (err)
4543                 goto out_destroy_workqueue;
4544
4545         return 0;
4546
4547  out_destroy_workqueue:
4548         destroy_workqueue(priv->workqueue);
4549         priv->workqueue = NULL;
4550         free_irq(priv->pci_dev->irq, priv);
4551         iwl_free_isr_ict(priv);
4552  out_disable_msi:
4553         pci_disable_msi(priv->pci_dev);
4554         iwl_uninit_drv(priv);
4555  out_free_eeprom:
4556         iwl_eeprom_free(priv);
4557  out_iounmap:
4558         pci_iounmap(pdev, priv->hw_base);
4559  out_pci_release_regions:
4560         pci_set_drvdata(pdev, NULL);
4561         pci_release_regions(pdev);
4562  out_pci_disable_device:
4563         pci_disable_device(pdev);
4564  out_ieee80211_free_hw:
4565         iwl_free_traffic_mem(priv);
4566         ieee80211_free_hw(priv->hw);
4567  out:
4568         return err;
4569 }
4570
4571 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4572 {
4573         struct iwl_priv *priv = pci_get_drvdata(pdev);
4574         unsigned long flags;
4575
4576         if (!priv)
4577                 return;
4578
4579         wait_for_completion(&priv->_agn.firmware_loading_complete);
4580
4581         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4582
4583         iwl_dbgfs_unregister(priv);
4584         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4585
4586         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4587          * to be called and iwl_down since we are removing the device
4588          * we need to set STATUS_EXIT_PENDING bit.
4589          */
4590         set_bit(STATUS_EXIT_PENDING, &priv->status);
4591         if (priv->mac80211_registered) {
4592                 ieee80211_unregister_hw(priv->hw);
4593                 priv->mac80211_registered = 0;
4594         } else {
4595                 iwl_down(priv);
4596         }
4597
4598         /*
4599          * Make sure device is reset to low power before unloading driver.
4600          * This may be redundant with iwl_down(), but there are paths to
4601          * run iwl_down() without calling apm_ops.stop(), and there are
4602          * paths to avoid running iwl_down() at all before leaving driver.
4603          * This (inexpensive) call *makes sure* device is reset.
4604          */
4605         iwl_apm_stop(priv);
4606
4607         iwl_tt_exit(priv);
4608
4609         /* make sure we flush any pending irq or
4610          * tasklet for the driver
4611          */
4612         spin_lock_irqsave(&priv->lock, flags);
4613         iwl_disable_interrupts(priv);
4614         spin_unlock_irqrestore(&priv->lock, flags);
4615
4616         iwl_synchronize_irq(priv);
4617
4618         iwl_dealloc_ucode_pci(priv);
4619
4620         if (priv->rxq.bd)
4621                 iwlagn_rx_queue_free(priv, &priv->rxq);
4622         iwlagn_hw_txq_ctx_free(priv);
4623
4624         iwl_eeprom_free(priv);
4625
4626
4627         /*netif_stop_queue(dev); */
4628         flush_workqueue(priv->workqueue);
4629
4630         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4631          * priv->workqueue... so we can't take down the workqueue
4632          * until now... */
4633         destroy_workqueue(priv->workqueue);
4634         priv->workqueue = NULL;
4635         iwl_free_traffic_mem(priv);
4636
4637         free_irq(priv->pci_dev->irq, priv);
4638         pci_disable_msi(priv->pci_dev);
4639         pci_iounmap(pdev, priv->hw_base);
4640         pci_release_regions(pdev);
4641         pci_disable_device(pdev);
4642         pci_set_drvdata(pdev, NULL);
4643
4644         iwl_uninit_drv(priv);
4645
4646         iwl_free_isr_ict(priv);
4647
4648         dev_kfree_skb(priv->beacon_skb);
4649
4650         ieee80211_free_hw(priv->hw);
4651 }
4652
4653
4654 /*****************************************************************************
4655  *
4656  * driver and module entry point
4657  *
4658  *****************************************************************************/
4659
4660 /* Hardware specific file defines the PCI IDs table for that hardware module */
4661 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4662 #ifdef CONFIG_IWL4965
4663         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4664         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4665 #endif /* CONFIG_IWL4965 */
4666 #ifdef CONFIG_IWL5000
4667 /* 5100 Series WiFi */
4668         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4669         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4670         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4671         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4672         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4673         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4674         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4675         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4676         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4677         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4678         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4679         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4680         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4681         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4682         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4683         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4684         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4685         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4686         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4687         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4688         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4689         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4690         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4691         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4692
4693 /* 5300 Series WiFi */
4694         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4695         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4696         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4697         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4698         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4699         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4700         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4701         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4702         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4703         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4704         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4705         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4706
4707 /* 5350 Series WiFi/WiMax */
4708         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4709         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4710         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4711
4712 /* 5150 Series Wifi/WiMax */
4713         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4714         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4715         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4716         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4717         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4718         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4719
4720         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4721         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4722         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4723         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4724
4725 /* 6x00 Series */
4726         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4727         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4728         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4729         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4730         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4731         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4732         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4733         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4734         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4735         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4736
4737 /* 6x00 Series Gen2a */
4738         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4739         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4740         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4741         {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4742         {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4743         {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4744         {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4745         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4746         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4747         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4748         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4749         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4750         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4751         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4752
4753 /* 6x00 Series Gen2b */
4754         {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4755         {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4756         {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4757         {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4758         {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4759         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4760         {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4761         {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4762         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4763         {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4764         {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4765         {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4766         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4767         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4768         {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4769         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4770         {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4771         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4772         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4773         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4774         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4775         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4776         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4777         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4778         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4779         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4780         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4781         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4782
4783 /* 6x50 WiFi/WiMax Series */
4784         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4785         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4786         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4787         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4788         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4789         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4790
4791 /* 6x50 WiFi/WiMax Series Gen2 */
4792         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6050g2_bgn_cfg)},
4793         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6050g2_bgn_cfg)},
4794         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6050g2_bgn_cfg)},
4795         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6050g2_bgn_cfg)},
4796         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6050g2_bgn_cfg)},
4797         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6050g2_bgn_cfg)},
4798
4799 /* 1000 Series WiFi */
4800         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4801         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4802         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4803         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4804         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4805         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4806         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4807         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4808         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4809         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4810         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4811         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4812
4813 /* 100 Series WiFi */
4814         {IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg)},
4815         {IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg)},
4816         {IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg)},
4817         {IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg)},
4818         {IWL_PCI_DEVICE(0x08AE, 0x1017, iwl100_bg_cfg)},
4819
4820 /* 130 Series WiFi */
4821         {IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg)},
4822         {IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg)},
4823         {IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg)},
4824         {IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg)},
4825         {IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg)},
4826         {IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg)},
4827
4828 #endif /* CONFIG_IWL5000 */
4829
4830         {0}
4831 };
4832 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4833
4834 static struct pci_driver iwl_driver = {
4835         .name = DRV_NAME,
4836         .id_table = iwl_hw_card_ids,
4837         .probe = iwl_pci_probe,
4838         .remove = __devexit_p(iwl_pci_remove),
4839 #ifdef CONFIG_PM
4840         .suspend = iwl_pci_suspend,
4841         .resume = iwl_pci_resume,
4842 #endif
4843 };
4844
4845 static int __init iwl_init(void)
4846 {
4847
4848         int ret;
4849         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4850         pr_info(DRV_COPYRIGHT "\n");
4851
4852         ret = iwlagn_rate_control_register();
4853         if (ret) {
4854                 pr_err("Unable to register rate control algorithm: %d\n", ret);
4855                 return ret;
4856         }
4857
4858         ret = pci_register_driver(&iwl_driver);
4859         if (ret) {
4860                 pr_err("Unable to initialize PCI module\n");
4861                 goto error_register;
4862         }
4863
4864         return ret;
4865
4866 error_register:
4867         iwlagn_rate_control_unregister();
4868         return ret;
4869 }
4870
4871 static void __exit iwl_exit(void)
4872 {
4873         pci_unregister_driver(&iwl_driver);
4874         iwlagn_rate_control_unregister();
4875 }
4876
4877 module_exit(iwl_exit);
4878 module_init(iwl_init);
4879
4880 #ifdef CONFIG_IWLWIFI_DEBUG
4881 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4882 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4883 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4884 MODULE_PARM_DESC(debug, "debug output mask");
4885 #endif
4886
4887 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4888 MODULE_PARM_DESC(swcrypto50,
4889                  "using crypto in software (default 0 [hardware]) (deprecated)");
4890 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4891 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4892 module_param_named(queues_num50,
4893                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4894 MODULE_PARM_DESC(queues_num50,
4895                  "number of hw queues in 50xx series (deprecated)");
4896 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4897 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4898 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4899 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4900 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4901 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4902 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4903                    int, S_IRUGO);
4904 MODULE_PARM_DESC(amsdu_size_8K50,
4905                  "enable 8K amsdu size in 50XX series (deprecated)");
4906 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4907                    int, S_IRUGO);
4908 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4909 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4910 MODULE_PARM_DESC(fw_restart50,
4911                  "restart firmware in case of error (deprecated)");
4912 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4913 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4914 module_param_named(
4915         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4916 MODULE_PARM_DESC(disable_hw_scan,
4917                  "disable hardware scanning (default 0) (deprecated)");
4918
4919 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4920                    S_IRUGO);
4921 MODULE_PARM_DESC(ucode_alternative,
4922                  "specify ucode alternative to use from ucode file");
4923
4924 module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
4925 MODULE_PARM_DESC(antenna_coupling,
4926                  "specify antenna coupling in dB (defualt: 0 dB)");
4927
4928 module_param_named(bt_ch_announce, iwlagn_bt_ch_announce, bool, S_IRUGO);
4929 MODULE_PARM_DESC(bt_ch_announce,
4930                  "Enable BT channel announcement mode (default: enable)");