drivers/net/wireless/iwlwifi/iwl-4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <net/mac80211.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39
  40 #include "iwl-eeprom.h"
  41 #include "iwl-dev.h"
  42 #include "iwl-core.h"
  43 #include "iwl-io.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-calib.h"
  46 #include "iwl-sta.h"
  47
  48 static int iwl4965_send_tx_power(struct iwl_priv *priv);
  49 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
  50
  51 /* Highest firmware API version supported */
  52 #define IWL4965_UCODE_API_MAX 2
  53
  54 /* Lowest firmware API version supported */
  55 #define IWL4965_UCODE_API_MIN 2
  56
  57 #define IWL4965_FW_PRE "iwlwifi-4965-"
  58 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
  59 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
  60
  61
  62 /* module parameters */
  63 static struct iwl_mod_params iwl4965_mod_params = {
  64         .num_of_queues = IWL49_NUM_QUEUES,
  65         .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
  66         .amsdu_size_8K = 1,
  67         .restart_fw = 1,
  68         /* the rest are 0 by default */
  69 };
  70
  71 /* check contents of special bootstrap uCode SRAM */
  72 static int iwl4965_verify_bsm(struct iwl_priv *priv)
  73 {
  74         __le32 *image = priv->ucode_boot.v_addr;
  75         u32 len = priv->ucode_boot.len;
  76         u32 reg;
  77         u32 val;
  78
  79         IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
  80
  81         /* verify BSM SRAM contents */
  82         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  83         for (reg = BSM_SRAM_LOWER_BOUND;
  84              reg < BSM_SRAM_LOWER_BOUND + len;
  85              reg += sizeof(u32), image++) {
  86                 val = iwl_read_prph(priv, reg);
  87                 if (val != le32_to_cpu(*image)) {
  88                         IWL_ERR(priv, "BSM uCode verification failed at "
  89                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  90                                   BSM_SRAM_LOWER_BOUND,
  91                                   reg - BSM_SRAM_LOWER_BOUND, len,
  92                                   val, le32_to_cpu(*image));
  93                         return -EIO;
  94                 }
  95         }
  96
  97         IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
  98
  99         return 0;
 100 }
 101
 102 /**
 103  * iwl4965_load_bsm - Load bootstrap instructions
 104  *
 105  * BSM operation:
 106  *
 107  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 108  * in special SRAM that does not power down during RFKILL.  When powering back
 109  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 110  * the bootstrap program into the on-board processor, and starts it.
 111  *
 112  * The bootstrap program loads (via DMA) instructions and data for a new
 113  * program from host DRAM locations indicated by the host driver in the
 114  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 115  * automatically.
 116  *
 117  * When initializing the NIC, the host driver points the BSM to the
 118  * "initialize" uCode image.  This uCode sets up some internal data, then
 119  * notifies host via "initialize alive" that it is complete.
 120  *
 121  * The host then replaces the BSM_DRAM_* pointer values to point to the
 122  * normal runtime uCode instructions and a backup uCode data cache buffer
 123  * (filled initially with starting data values for the on-board processor),
 124  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 125  * which begins normal operation.
 126  *
 127  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 128  * the backup data cache in DRAM before SRAM is powered down.
 129  *
 130  * When powering back up, the BSM loads the bootstrap program.  This reloads
 131  * the runtime uCode instructions and the backup data cache into SRAM,
 132  * and re-launches the runtime uCode from where it left off.
 133  */
 134 static int iwl4965_load_bsm(struct iwl_priv *priv)
 135 {
 136         __le32 *image = priv->ucode_boot.v_addr;
 137         u32 len = priv->ucode_boot.len;
 138         dma_addr_t pinst;
 139         dma_addr_t pdata;
 140         u32 inst_len;
 141         u32 data_len;
 142         int i;
 143         u32 done;
 144         u32 reg_offset;
 145         int ret;
 146
 147         IWL_DEBUG_INFO(priv, "Begin load bsm\n");
 148
 149         priv->ucode_type = UCODE_RT;
 150
 151         /* make sure bootstrap program is no larger than BSM's SRAM size */
 152         if (len > IWL49_MAX_BSM_SIZE)
 153                 return -EINVAL;
 154
 155         /* Tell bootstrap uCode where to find the "Initialize" uCode
 156          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 157          * NOTE:  iwl_init_alive_start() will replace these values,
 158          *        after the "initialize" uCode has run, to point to
 159          *        runtime/protocol instructions and backup data cache.
 160          */
 161         pinst = priv->ucode_init.p_addr >> 4;
 162         pdata = priv->ucode_init_data.p_addr >> 4;
 163         inst_len = priv->ucode_init.len;
 164         data_len = priv->ucode_init_data.len;
 165
 166         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 167         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 168         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 169         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 170
 171         /* Fill BSM memory with bootstrap instructions */
 172         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 173              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 174              reg_offset += sizeof(u32), image++)
 175                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
 176
 177         ret = iwl4965_verify_bsm(priv);
 178         if (ret)
 179                 return ret;
 180
 181         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 182         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
 183         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
 184         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 185
 186         /* Load bootstrap code into instruction SRAM now,
 187          *   to prepare to load "initialize" uCode */
 188         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 189
 190         /* Wait for load of bootstrap uCode to finish */
 191         for (i = 0; i < 100; i++) {
 192                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
 193                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 194                         break;
 195                 udelay(10);
 196         }
 197         if (i < 100)
 198                 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
 199         else {
 200                 IWL_ERR(priv, "BSM write did not complete!\n");
 201                 return -EIO;
 202         }
 203
 204         /* Enable future boot loads whenever power management unit triggers it
 205          *   (e.g. when powering back up after power-save shutdown) */
 206         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 207
 208
 209         return 0;
 210 }
 211
 212 /**
 213  * iwl4965_set_ucode_ptrs - Set uCode address location
 214  *
 215  * Tell initialization uCode where to find runtime uCode.
 216  *
 217  * BSM registers initially contain pointers to initialization uCode.
 218  * We need to replace them to load runtime uCode inst and data,
 219  * and to save runtime data when powering down.
 220  */
 221 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
 222 {
 223         dma_addr_t pinst;
 224         dma_addr_t pdata;
 225         int ret = 0;
 226
 227         /* bits 35:4 for 4965 */
 228         pinst = priv->ucode_code.p_addr >> 4;
 229         pdata = priv->ucode_data_backup.p_addr >> 4;
 230
 231         /* Tell bootstrap uCode where to find image to load */
 232         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 233         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 234         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
 235                                  priv->ucode_data.len);
 236
 237         /* Inst byte count must be last to set up, bit 31 signals uCode
 238          *   that all new ptr/size info is in place */
 239         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
 240                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
 241         IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
 242
 243         return ret;
 244 }
 245
 246 /**
 247  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
 248  *
 249  * Called after REPLY_ALIVE notification received from "initialize" uCode.
 250  *
 251  * The 4965 "initialize" ALIVE reply contains calibration data for:
 252  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
 253  *   (3945 does not contain this data).
 254  *
 255  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 256 */
 257 static void iwl4965_init_alive_start(struct iwl_priv *priv)
 258 {
 259         /* Check alive response for "valid" sign from uCode */
 260         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
 261                 /* We had an error bringing up the hardware, so take it
 262                  * all the way back down so we can try again */
 263                 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
 264                 goto restart;
 265         }
 266
 267         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 268          * This is a paranoid check, because we would not have gotten the
 269          * "initialize" alive if code weren't properly loaded.  */
 270         if (iwl_verify_ucode(priv)) {
 271                 /* Runtime instruction load was bad;
 272                  * take it all the way back down so we can try again */
 273                 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
 274                 goto restart;
 275         }
 276
 277         /* Calculate temperature */
 278         priv->temperature = iwl4965_hw_get_temperature(priv);
 279
 280         /* Send pointers to protocol/runtime uCode image ... init code will
 281          * load and launch runtime uCode, which will send us another "Alive"
 282          * notification. */
 283         IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 284         if (iwl4965_set_ucode_ptrs(priv)) {
 285                 /* Runtime instruction load won't happen;
 286                  * take it all the way back down so we can try again */
 287                 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
 288                 goto restart;
 289         }
 290         return;
 291
 292 restart:
 293         queue_work(priv->workqueue, &priv->restart);
 294 }
 295
 296 static bool is_fat_channel(__le32 rxon_flags)
 297 {
 298         int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
 299                                     >> RXON_FLG_CHANNEL_MODE_POS;
 300         return ((chan_mod == CHANNEL_MODE_PURE_40) ||
 301                   (chan_mod == CHANNEL_MODE_MIXED));
 302 }
 303
 304 /*
 305  * EEPROM handlers
 306  */
 307 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
 308 {
 309         return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
 310 }
 311
 312 /*
 313  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
 314  * must be called under priv->lock and mac access
 315  */
 316 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
 317 {
 318         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
 319 }
 320
 321 static int iwl4965_apm_init(struct iwl_priv *priv)
 322 {
 323         int ret = 0;
 324
 325         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 326                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
 327
 328         /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
 329         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 330                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 331
 332         /* set "initialization complete" bit to move adapter
 333          * D0U* --> D0A* state */
 334         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 335
 336         /* wait for clock stabilization */
 337         ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
 338                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 339         if (ret < 0) {
 340                 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
 341                 goto out;
 342         }
 343
 344         /* enable DMA */
 345         iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 346                                                 APMG_CLK_VAL_BSM_CLK_RQT);
 347
 348         udelay(20);
 349
 350         /* disable L1-Active */
 351         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 352                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 353
 354 out:
 355         return ret;
 356 }
 357
 358
 359 static void iwl4965_nic_config(struct iwl_priv *priv)
 360 {
 361         unsigned long flags;
 362         u16 radio_cfg;
 363         u16 lctl;
 364
 365         spin_lock_irqsave(&priv->lock, flags);
 366
 367         lctl = iwl_pcie_link_ctl(priv);
 368
 369         /* HW bug W/A - negligible power consumption */
 370         /* L1-ASPM is enabled by BIOS */
 371         if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
 372                 /* L1-ASPM enabled: disable L0S  */
 373                 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 374         else
 375                 /* L1-ASPM disabled: enable L0S */
 376                 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 377
 378         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
 379
 380         /* write radio config values to register */
 381         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 382                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 383                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 384                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 385                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 386
 387         /* set CSR_HW_CONFIG_REG for uCode use */
 388         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 389                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 390                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 391
 392         priv->calib_info = (struct iwl_eeprom_calib_info *)
 393                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
 394
 395         spin_unlock_irqrestore(&priv->lock, flags);
 396 }
 397
 398 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
 399 {
 400         unsigned long flags;
 401
 402         spin_lock_irqsave(&priv->lock, flags);
 403
 404         /* set stop master bit */
 405         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
 406
 407         iwl_poll_direct_bit(priv, CSR_RESET,
 408                         CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
 409
 410         spin_unlock_irqrestore(&priv->lock, flags);
 411         IWL_DEBUG_INFO(priv, "stop master\n");
 412
 413         return 0;
 414 }
 415
 416 static void iwl4965_apm_stop(struct iwl_priv *priv)
 417 {
 418         unsigned long flags;
 419
 420         iwl4965_apm_stop_master(priv);
 421
 422         spin_lock_irqsave(&priv->lock, flags);
 423
 424         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 425
 426         udelay(10);
 427         /* clear "init complete"  move adapter D0A* --> D0U state */
 428         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 429         spin_unlock_irqrestore(&priv->lock, flags);
 430 }
 431
 432 static int iwl4965_apm_reset(struct iwl_priv *priv)
 433 {
 434         int ret = 0;
 435
 436         iwl4965_apm_stop_master(priv);
 437
 438
 439         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 440
 441         udelay(10);
 442
 443         /* FIXME: put here L1A -L0S w/a */
 444
 445         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 446
 447         ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
 448                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 449         if (ret < 0)
 450                 goto out;
 451
 452         udelay(10);
 453
 454         /* Enable DMA and BSM Clock */
 455         iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 456                                               APMG_CLK_VAL_BSM_CLK_RQT);
 457
 458         udelay(10);
 459
 460         /* disable L1A */
 461         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 462                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 463
 464         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
 465         wake_up_interruptible(&priv->wait_command_queue);
 466
 467 out:
 468         return ret;
 469 }
 470
 471 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 472  * Called after every association, but this runs only once!
 473  *  ... once chain noise is calibrated the first time, it's good forever.  */
 474 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
 475 {
 476         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
 477
 478         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
 479                 struct iwl_calib_diff_gain_cmd cmd;
 480
 481                 memset(&cmd, 0, sizeof(cmd));
 482                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 483                 cmd.diff_gain_a = 0;
 484                 cmd.diff_gain_b = 0;
 485                 cmd.diff_gain_c = 0;
 486                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 487                                  sizeof(cmd), &cmd))
 488                         IWL_ERR(priv,
 489                                 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
 490                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
 491                 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
 492         }
 493 }
 494
 495 static void iwl4965_gain_computation(struct iwl_priv *priv,
 496                 u32 *average_noise,
 497                 u16 min_average_noise_antenna_i,
 498                 u32 min_average_noise)
 499 {
 500         int i, ret;
 501         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 502
 503         data->delta_gain_code[min_average_noise_antenna_i] = 0;
 504
 505         for (i = 0; i < NUM_RX_CHAINS; i++) {
 506                 s32 delta_g = 0;
 507
 508                 if (!(data->disconn_array[i]) &&
 509                     (data->delta_gain_code[i] ==
 510                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
 511                         delta_g = average_noise[i] - min_average_noise;
 512                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
 513                         data->delta_gain_code[i] =
 514                                 min(data->delta_gain_code[i],
 515                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
 516
 517                         data->delta_gain_code[i] =
 518                                 (data->delta_gain_code[i] | (1 << 2));
 519                 } else {
 520                         data->delta_gain_code[i] = 0;
 521                 }
 522         }
 523         IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
 524                      data->delta_gain_code[0],
 525                      data->delta_gain_code[1],
 526                      data->delta_gain_code[2]);
 527
 528         /* Differential gain gets sent to uCode only once */
 529         if (!data->radio_write) {
 530                 struct iwl_calib_diff_gain_cmd cmd;
 531                 data->radio_write = 1;
 532
 533                 memset(&cmd, 0, sizeof(cmd));
 534                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 535                 cmd.diff_gain_a = data->delta_gain_code[0];
 536                 cmd.diff_gain_b = data->delta_gain_code[1];
 537                 cmd.diff_gain_c = data->delta_gain_code[2];
 538                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 539                                       sizeof(cmd), &cmd);
 540                 if (ret)
 541                         IWL_DEBUG_CALIB(priv, "fail sending cmd "
 542                                      "REPLY_PHY_CALIBRATION_CMD \n");
 543
 544                 /* TODO we might want recalculate
 545                  * rx_chain in rxon cmd */
 546
 547                 /* Mark so we run this algo only once! */
 548                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
 549         }
 550         data->chain_noise_a = 0;
 551         data->chain_noise_b = 0;
 552         data->chain_noise_c = 0;
 553         data->chain_signal_a = 0;
 554         data->chain_signal_b = 0;
 555         data->chain_signal_c = 0;
 556         data->beacon_count = 0;
 557 }
 558
 559 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
 560                         __le32 *tx_flags)
 561 {
 562         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 563                 *tx_flags |= TX_CMD_FLG_RTS_MSK;
 564                 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
 565         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 566                 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 567                 *tx_flags |= TX_CMD_FLG_CTS_MSK;
 568         }
 569 }
 570
 571 static void iwl4965_bg_txpower_work(struct work_struct *work)
 572 {
 573         struct iwl_priv *priv = container_of(work, struct iwl_priv,
 574                         txpower_work);
 575
 576         /* If a scan happened to start before we got here
 577          * then just return; the statistics notification will
 578          * kick off another scheduled work to compensate for
 579          * any temperature delta we missed here. */
 580         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
 581             test_bit(STATUS_SCANNING, &priv->status))
 582                 return;
 583
 584         mutex_lock(&priv->mutex);
 585
 586         /* Regardless of if we are associated, we must reconfigure the
 587          * TX power since frames can be sent on non-radar channels while
 588          * not associated */
 589         iwl4965_send_tx_power(priv);
 590
 591         /* Update last_temperature to keep is_calib_needed from running
 592          * when it isn't needed... */
 593         priv->last_temperature = priv->temperature;
 594
 595         mutex_unlock(&priv->mutex);
 596 }
 597
 598 /*
 599  * Acquire priv->lock before calling this function !
 600  */
 601 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
 602 {
 603         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
 604                              (index & 0xff) | (txq_id << 8));
 605         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
 606 }
 607
 608 /**
 609  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
 610  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
 611  * @scd_retry: (1) Indicates queue will be used in aggregation mode
 612  *
 613  * NOTE:  Acquire priv->lock before calling this function !
 614  */
 615 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
 616                                         struct iwl_tx_queue *txq,
 617                                         int tx_fifo_id, int scd_retry)
 618 {
 619         int txq_id = txq->q.id;
 620
 621         /* Find out whether to activate Tx queue */
 622         int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
 623
 624         /* Set up and activate */
 625         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
 626                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
 627                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
 628                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
 629                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
 630                          IWL49_SCD_QUEUE_STTS_REG_MSK);
 631
 632         txq->sched_retry = scd_retry;
 633
 634         IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
 635                        active ? "Activate" : "Deactivate",
 636                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
 637 }
 638
 639 static const u16 default_queue_to_tx_fifo[] = {
 640         IWL_TX_FIFO_AC3,
 641         IWL_TX_FIFO_AC2,
 642         IWL_TX_FIFO_AC1,
 643         IWL_TX_FIFO_AC0,
 644         IWL49_CMD_FIFO_NUM,
 645         IWL_TX_FIFO_HCCA_1,
 646         IWL_TX_FIFO_HCCA_2
 647 };
 648
 649 static int iwl4965_alive_notify(struct iwl_priv *priv)
 650 {
 651         u32 a;
 652         unsigned long flags;
 653         int i, chan;
 654         u32 reg_val;
 655
 656         spin_lock_irqsave(&priv->lock, flags);
 657
 658         /* Clear 4965's internal Tx Scheduler data base */
 659         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
 660         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
 661         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
 662                 iwl_write_targ_mem(priv, a, 0);
 663         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
 664                 iwl_write_targ_mem(priv, a, 0);
 665         for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
 666                 iwl_write_targ_mem(priv, a, 0);
 667
 668         /* Tel 4965 where to find Tx byte count tables */
 669         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
 670                         priv->scd_bc_tbls.dma >> 10);
 671
 672         /* Enable DMA channel */
 673         for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
 674                 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
 675                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
 676                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
 677
 678         /* Update FH chicken bits */
 679         reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
 680         iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
 681                            reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
 682
 683         /* Disable chain mode for all queues */
 684         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
 685
 686         /* Initialize each Tx queue (including the command queue) */
 687         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
 688
 689                 /* TFD circular buffer read/write indexes */
 690                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
 691                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
 692
 693                 /* Max Tx Window size for Scheduler-ACK mode */
 694                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 695                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
 696                                 (SCD_WIN_SIZE <<
 697                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
 698                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
 699
 700                 /* Frame limit */
 701                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 702                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
 703                                 sizeof(u32),
 704                                 (SCD_FRAME_LIMIT <<
 705                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
 706                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
 707
 708         }
 709         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
 710                                  (1 << priv->hw_params.max_txq_num) - 1);
 711
 712         /* Activate all Tx DMA/FIFO channels */
 713         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
 714
 715         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 716
 717         /* Map each Tx/cmd queue to its corresponding fifo */
 718         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
 719                 int ac = default_queue_to_tx_fifo[i];
 720                 iwl_txq_ctx_activate(priv, i);
 721                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
 722         }
 723
 724         spin_unlock_irqrestore(&priv->lock, flags);
 725
 726         return 0;
 727 }
 728
 729 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
 730         .min_nrg_cck = 97,
 731         .max_nrg_cck = 0,
 732
 733         .auto_corr_min_ofdm = 85,
 734         .auto_corr_min_ofdm_mrc = 170,
 735         .auto_corr_min_ofdm_x1 = 105,
 736         .auto_corr_min_ofdm_mrc_x1 = 220,
 737
 738         .auto_corr_max_ofdm = 120,
 739         .auto_corr_max_ofdm_mrc = 210,
 740         .auto_corr_max_ofdm_x1 = 140,
 741         .auto_corr_max_ofdm_mrc_x1 = 270,
 742
 743         .auto_corr_min_cck = 125,
 744         .auto_corr_max_cck = 200,
 745         .auto_corr_min_cck_mrc = 200,
 746         .auto_corr_max_cck_mrc = 400,
 747
 748         .nrg_th_cck = 100,
 749         .nrg_th_ofdm = 100,
 750 };
 751
 752 static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
 753 {
 754         /* want Kelvin */
 755         priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
 756 }
 757
 758 /**
 759  * iwl4965_hw_set_hw_params
 760  *
 761  * Called when initializing driver
 762  */
 763 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
 764 {
 765
 766         if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
 767             (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
 768                 IWL_ERR(priv,
 769                         "invalid queues_num, should be between %d and %d\n",
 770                         IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
 771                 return -EINVAL;
 772         }
 773
 774         priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
 775         priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
 776         priv->hw_params.scd_bc_tbls_size =
 777                         IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
 778         priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
 779         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
 780         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
 781         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
 782         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
 783         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 784         priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
 785
 786         priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
 787
 788         priv->hw_params.tx_chains_num = 2;
 789         priv->hw_params.rx_chains_num = 2;
 790         priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
 791         priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
 792         if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
 793                 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
 794
 795         priv->hw_params.sens = &iwl4965_sensitivity;
 796
 797         return 0;
 798 }
 799
 800 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
 801 {
 802         s32 sign = 1;
 803
 804         if (num < 0) {
 805                 sign = -sign;
 806                 num = -num;
 807         }
 808         if (denom < 0) {
 809                 sign = -sign;
 810                 denom = -denom;
 811         }
 812         *res = 1;
 813         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 814
 815         return 1;
 816 }
 817
 818 /**
 819  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
 820  *
 821  * Determines power supply voltage compensation for txpower calculations.
 822  * Returns number of 1/2-dB steps to subtract from gain table index,
 823  * to compensate for difference between power supply voltage during
 824  * factory measurements, vs. current power supply voltage.
 825  *
 826  * Voltage indication is higher for lower voltage.
 827  * Lower voltage requires more gain (lower gain table index).
 828  */
 829 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
 830                                             s32 current_voltage)
 831 {
 832         s32 comp = 0;
 833
 834         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
 835             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
 836                 return 0;
 837
 838         iwl4965_math_div_round(current_voltage - eeprom_voltage,
 839                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
 840
 841         if (current_voltage > eeprom_voltage)
 842                 comp *= 2;
 843         if ((comp < -2) || (comp > 2))
 844                 comp = 0;
 845
 846         return comp;
 847 }
 848
 849 static s32 iwl4965_get_tx_atten_grp(u16 channel)
 850 {
 851         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
 852             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
 853                 return CALIB_CH_GROUP_5;
 854
 855         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
 856             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
 857                 return CALIB_CH_GROUP_1;
 858
 859         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
 860             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
 861                 return CALIB_CH_GROUP_2;
 862
 863         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
 864             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
 865                 return CALIB_CH_GROUP_3;
 866
 867         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
 868             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
 869                 return CALIB_CH_GROUP_4;
 870
 871         return -1;
 872 }
 873
 874 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
 875 {
 876         s32 b = -1;
 877
 878         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 879                 if (priv->calib_info->band_info[b].ch_from == 0)
 880                         continue;
 881
 882                 if ((channel >= priv->calib_info->band_info[b].ch_from)
 883                     && (channel <= priv->calib_info->band_info[b].ch_to))
 884                         break;
 885         }
 886
 887         return b;
 888 }
 889
 890 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 891 {
 892         s32 val;
 893
 894         if (x2 == x1)
 895                 return y1;
 896         else {
 897                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 898                 return val + y2;
 899         }
 900 }
 901
 902 /**
 903  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
 904  *
 905  * Interpolates factory measurements from the two sample channels within a
 906  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 907  * differences in channel frequencies, which is proportional to differences
 908  * in channel number.
 909  */
 910 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
 911                                     struct iwl_eeprom_calib_ch_info *chan_info)
 912 {
 913         s32 s = -1;
 914         u32 c;
 915         u32 m;
 916         const struct iwl_eeprom_calib_measure *m1;
 917         const struct iwl_eeprom_calib_measure *m2;
 918         struct iwl_eeprom_calib_measure *omeas;
 919         u32 ch_i1;
 920         u32 ch_i2;
 921
 922         s = iwl4965_get_sub_band(priv, channel);
 923         if (s >= EEPROM_TX_POWER_BANDS) {
 924                 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
 925                 return -1;
 926         }
 927
 928         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
 929         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
 930         chan_info->ch_num = (u8) channel;
 931
 932         IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
 933                           channel, s, ch_i1, ch_i2);
 934
 935         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
 936                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
 937                         m1 = &(priv->calib_info->band_info[s].ch1.
 938                                measurements[c][m]);
 939                         m2 = &(priv->calib_info->band_info[s].ch2.
 940                                measurements[c][m]);
 941                         omeas = &(chan_info->measurements[c][m]);
 942
 943                         omeas->actual_pow =
 944                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 945                                                            m1->actual_pow,
 946                                                            ch_i2,
 947                                                            m2->actual_pow);
 948                         omeas->gain_idx =
 949                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 950                                                            m1->gain_idx, ch_i2,
 951                                                            m2->gain_idx);
 952                         omeas->temperature =
 953                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 954                                                            m1->temperature,
 955                                                            ch_i2,
 956                                                            m2->temperature);
 957                         omeas->pa_det =
 958                             (s8) iwl4965_interpolate_value(channel, ch_i1,
 959                                                            m1->pa_det, ch_i2,
 960                                                            m2->pa_det);
 961
 962                         IWL_DEBUG_TXPOWER(priv,
 963                                 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
 964                                 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
 965                         IWL_DEBUG_TXPOWER(priv,
 966                                 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
 967                                 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
 968                         IWL_DEBUG_TXPOWER(priv,
 969                                 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
 970                                 m1->pa_det, m2->pa_det, omeas->pa_det);
 971                         IWL_DEBUG_TXPOWER(priv,
 972                                 "chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
 973                                 m1->temperature, m2->temperature,
 974                                 omeas->temperature);
 975                 }
 976         }
 977
 978         return 0;
 979 }
 980
 981 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
 982  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
 983 static s32 back_off_table[] = {
 984         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
 985         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
 986         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
 987         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
 988         10                      /* CCK */
 989 };
 990
 991 /* Thermal compensation values for txpower for various frequency ranges ...
 992  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
 993 static struct iwl4965_txpower_comp_entry {
 994         s32 degrees_per_05db_a;
 995         s32 degrees_per_05db_a_denom;
 996 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
 997         {9, 2},                 /* group 0 5.2, ch  34-43 */
 998         {4, 1},                 /* group 1 5.2, ch  44-70 */
 999         {4, 1},                 /* group 2 5.2, ch  71-124 */
1000         {4, 1},                 /* group 3 5.2, ch 125-200 */
1001         {3, 1}                  /* group 4 2.4, ch   all */
1002 };
1003
1004 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1005 {
1006         if (!band) {
1007                 if ((rate_power_index & 7) <= 4)
1008                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1009         }
1010         return MIN_TX_GAIN_INDEX;
1011 }
1012
1013 struct gain_entry {
1014         u8 dsp;
1015         u8 radio;
1016 };
1017
1018 static const struct gain_entry gain_table[2][108] = {
1019         /* 5.2GHz power gain index table */
1020         {
1021          {123, 0x3F},           /* highest txpower */
1022          {117, 0x3F},
1023          {110, 0x3F},
1024          {104, 0x3F},
1025          {98, 0x3F},
1026          {110, 0x3E},
1027          {104, 0x3E},
1028          {98, 0x3E},
1029          {110, 0x3D},
1030          {104, 0x3D},
1031          {98, 0x3D},
1032          {110, 0x3C},
1033          {104, 0x3C},
1034          {98, 0x3C},
1035          {110, 0x3B},
1036          {104, 0x3B},
1037          {98, 0x3B},
1038          {110, 0x3A},
1039          {104, 0x3A},
1040          {98, 0x3A},
1041          {110, 0x39},
1042          {104, 0x39},
1043          {98, 0x39},
1044          {110, 0x38},
1045          {104, 0x38},
1046          {98, 0x38},
1047          {110, 0x37},
1048          {104, 0x37},
1049          {98, 0x37},
1050          {110, 0x36},
1051          {104, 0x36},
1052          {98, 0x36},
1053          {110, 0x35},
1054          {104, 0x35},
1055          {98, 0x35},
1056          {110, 0x34},
1057          {104, 0x34},
1058          {98, 0x34},
1059          {110, 0x33},
1060          {104, 0x33},
1061          {98, 0x33},
1062          {110, 0x32},
1063          {104, 0x32},
1064          {98, 0x32},
1065          {110, 0x31},
1066          {104, 0x31},
1067          {98, 0x31},
1068          {110, 0x30},
1069          {104, 0x30},
1070          {98, 0x30},
1071          {110, 0x25},
1072          {104, 0x25},
1073          {98, 0x25},
1074          {110, 0x24},
1075          {104, 0x24},
1076          {98, 0x24},
1077          {110, 0x23},
1078          {104, 0x23},
1079          {98, 0x23},
1080          {110, 0x22},
1081          {104, 0x18},
1082          {98, 0x18},
1083          {110, 0x17},
1084          {104, 0x17},
1085          {98, 0x17},
1086          {110, 0x16},
1087          {104, 0x16},
1088          {98, 0x16},
1089          {110, 0x15},
1090          {104, 0x15},
1091          {98, 0x15},
1092          {110, 0x14},
1093          {104, 0x14},
1094          {98, 0x14},
1095          {110, 0x13},
1096          {104, 0x13},
1097          {98, 0x13},
1098          {110, 0x12},
1099          {104, 0x08},
1100          {98, 0x08},
1101          {110, 0x07},
1102          {104, 0x07},
1103          {98, 0x07},
1104          {110, 0x06},
1105          {104, 0x06},
1106          {98, 0x06},
1107          {110, 0x05},
1108          {104, 0x05},
1109          {98, 0x05},
1110          {110, 0x04},
1111          {104, 0x04},
1112          {98, 0x04},
1113          {110, 0x03},
1114          {104, 0x03},
1115          {98, 0x03},
1116          {110, 0x02},
1117          {104, 0x02},
1118          {98, 0x02},
1119          {110, 0x01},
1120          {104, 0x01},
1121          {98, 0x01},
1122          {110, 0x00},
1123          {104, 0x00},
1124          {98, 0x00},
1125          {93, 0x00},
1126          {88, 0x00},
1127          {83, 0x00},
1128          {78, 0x00},
1129          },
1130         /* 2.4GHz power gain index table */
1131         {
1132          {110, 0x3f},           /* highest txpower */
1133          {104, 0x3f},
1134          {98, 0x3f},
1135          {110, 0x3e},
1136          {104, 0x3e},
1137          {98, 0x3e},
1138          {110, 0x3d},
1139          {104, 0x3d},
1140          {98, 0x3d},
1141          {110, 0x3c},
1142          {104, 0x3c},
1143          {98, 0x3c},
1144          {110, 0x3b},
1145          {104, 0x3b},
1146          {98, 0x3b},
1147          {110, 0x3a},
1148          {104, 0x3a},
1149          {98, 0x3a},
1150          {110, 0x39},
1151          {104, 0x39},
1152          {98, 0x39},
1153          {110, 0x38},
1154          {104, 0x38},
1155          {98, 0x38},
1156          {110, 0x37},
1157          {104, 0x37},
1158          {98, 0x37},
1159          {110, 0x36},
1160          {104, 0x36},
1161          {98, 0x36},
1162          {110, 0x35},
1163          {104, 0x35},
1164          {98, 0x35},
1165          {110, 0x34},
1166          {104, 0x34},
1167          {98, 0x34},
1168          {110, 0x33},
1169          {104, 0x33},
1170          {98, 0x33},
1171          {110, 0x32},
1172          {104, 0x32},
1173          {98, 0x32},
1174          {110, 0x31},
1175          {104, 0x31},
1176          {98, 0x31},
1177          {110, 0x30},
1178          {104, 0x30},
1179          {98, 0x30},
1180          {110, 0x6},
1181          {104, 0x6},
1182          {98, 0x6},
1183          {110, 0x5},
1184          {104, 0x5},
1185          {98, 0x5},
1186          {110, 0x4},
1187          {104, 0x4},
1188          {98, 0x4},
1189          {110, 0x3},
1190          {104, 0x3},
1191          {98, 0x3},
1192          {110, 0x2},
1193          {104, 0x2},
1194          {98, 0x2},
1195          {110, 0x1},
1196          {104, 0x1},
1197          {98, 0x1},
1198          {110, 0x0},
1199          {104, 0x0},
1200          {98, 0x0},
1201          {97, 0},
1202          {96, 0},
1203          {95, 0},
1204          {94, 0},
1205          {93, 0},
1206          {92, 0},
1207          {91, 0},
1208          {90, 0},
1209          {89, 0},
1210          {88, 0},
1211          {87, 0},
1212          {86, 0},
1213          {85, 0},
1214          {84, 0},
1215          {83, 0},
1216          {82, 0},
1217          {81, 0},
1218          {80, 0},
1219          {79, 0},
1220          {78, 0},
1221          {77, 0},
1222          {76, 0},
1223          {75, 0},
1224          {74, 0},
1225          {73, 0},
1226          {72, 0},
1227          {71, 0},
1228          {70, 0},
1229          {69, 0},
1230          {68, 0},
1231          {67, 0},
1232          {66, 0},
1233          {65, 0},
1234          {64, 0},
1235          {63, 0},
1236          {62, 0},
1237          {61, 0},
1238          {60, 0},
1239          {59, 0},
1240          }
1241 };
1242
1243 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1244                                     u8 is_fat, u8 ctrl_chan_high,
1245                                     struct iwl4965_tx_power_db *tx_power_tbl)
1246 {
1247         u8 saturation_power;
1248         s32 target_power;
1249         s32 user_target_power;
1250         s32 power_limit;
1251         s32 current_temp;
1252         s32 reg_limit;
1253         s32 current_regulatory;
1254         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1255         int i;
1256         int c;
1257         const struct iwl_channel_info *ch_info = NULL;
1258         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1259         const struct iwl_eeprom_calib_measure *measurement;
1260         s16 voltage;
1261         s32 init_voltage;
1262         s32 voltage_compensation;
1263         s32 degrees_per_05db_num;
1264         s32 degrees_per_05db_denom;
1265         s32 factory_temp;
1266         s32 temperature_comp[2];
1267         s32 factory_gain_index[2];
1268         s32 factory_actual_pwr[2];
1269         s32 power_index;
1270
1271         /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1272          *   are used for indexing into txpower table) */
1273         user_target_power = 2 * priv->tx_power_user_lmt;
1274
1275         /* Get current (RXON) channel, band, width */
1276         IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_fat %d\n", channel, band,
1277                           is_fat);
1278
1279         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1280
1281         if (!is_channel_valid(ch_info))
1282                 return -EINVAL;
1283
1284         /* get txatten group, used to select 1) thermal txpower adjustment
1285          *   and 2) mimo txpower balance between Tx chains. */
1286         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1287         if (txatten_grp < 0) {
1288                 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
1289                           channel);
1290                 return -EINVAL;
1291         }
1292
1293         IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
1294                           channel, txatten_grp);
1295
1296         if (is_fat) {
1297                 if (ctrl_chan_high)
1298                         channel -= 2;
1299                 else
1300                         channel += 2;
1301         }
1302
1303         /* hardware txpower limits ...
1304          * saturation (clipping distortion) txpowers are in half-dBm */
1305         if (band)
1306                 saturation_power = priv->calib_info->saturation_power24;
1307         else
1308                 saturation_power = priv->calib_info->saturation_power52;
1309
1310         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1311             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1312                 if (band)
1313                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1314                 else
1315                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1316         }
1317
1318         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1319          *   max_power_avg values are in dBm, convert * 2 */
1320         if (is_fat)
1321                 reg_limit = ch_info->fat_max_power_avg * 2;
1322         else
1323                 reg_limit = ch_info->max_power_avg * 2;
1324
1325         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1326             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1327                 if (band)
1328                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1329                 else
1330                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1331         }
1332
1333         /* Interpolate txpower calibration values for this channel,
1334          *   based on factory calibration tests on spaced channels. */
1335         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1336
1337         /* calculate tx gain adjustment based on power supply voltage */
1338         voltage = priv->calib_info->voltage;
1339         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1340         voltage_compensation =
1341             iwl4965_get_voltage_compensation(voltage, init_voltage);
1342
1343         IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
1344                           init_voltage,
1345                           voltage, voltage_compensation);
1346
1347         /* get current temperature (Celsius) */
1348         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1349         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1350         current_temp = KELVIN_TO_CELSIUS(current_temp);
1351
1352         /* select thermal txpower adjustment params, based on channel group
1353          *   (same frequency group used for mimo txatten adjustment) */
1354         degrees_per_05db_num =
1355             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1356         degrees_per_05db_denom =
1357             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1358
1359         /* get per-chain txpower values from factory measurements */
1360         for (c = 0; c < 2; c++) {
1361                 measurement = &ch_eeprom_info.measurements[c][1];
1362
1363                 /* txgain adjustment (in half-dB steps) based on difference
1364                  *   between factory and current temperature */
1365                 factory_temp = measurement->temperature;
1366                 iwl4965_math_div_round((current_temp - factory_temp) *
1367                                        degrees_per_05db_denom,
1368                                        degrees_per_05db_num,
1369                                        &temperature_comp[c]);
1370
1371                 factory_gain_index[c] = measurement->gain_idx;
1372                 factory_actual_pwr[c] = measurement->actual_pow;
1373
1374                 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1375                 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
1376                                   "curr tmp %d, comp %d steps\n",
1377                                   factory_temp, current_temp,
1378                                   temperature_comp[c]);
1379
1380                 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
1381                                   factory_gain_index[c],
1382                                   factory_actual_pwr[c]);
1383         }
1384
1385         /* for each of 33 bit-rates (including 1 for CCK) */
1386         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1387                 u8 is_mimo_rate;
1388                 union iwl4965_tx_power_dual_stream tx_power;
1389
1390                 /* for mimo, reduce each chain's txpower by half
1391                  * (3dB, 6 steps), so total output power is regulatory
1392                  * compliant. */
1393                 if (i & 0x8) {
1394                         current_regulatory = reg_limit -
1395                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1396                         is_mimo_rate = 1;
1397                 } else {
1398                         current_regulatory = reg_limit;
1399                         is_mimo_rate = 0;
1400                 }
1401
1402                 /* find txpower limit, either hardware or regulatory */
1403                 power_limit = saturation_power - back_off_table[i];
1404                 if (power_limit > current_regulatory)
1405                         power_limit = current_regulatory;
1406
1407                 /* reduce user's txpower request if necessary
1408                  * for this rate on this channel */
1409                 target_power = user_target_power;
1410                 if (target_power > power_limit)
1411                         target_power = power_limit;
1412
1413                 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
1414                                   i, saturation_power - back_off_table[i],
1415                                   current_regulatory, user_target_power,
1416                                   target_power);
1417
1418                 /* for each of 2 Tx chains (radio transmitters) */
1419                 for (c = 0; c < 2; c++) {
1420                         s32 atten_value;
1421
1422                         if (is_mimo_rate)
1423                                 atten_value =
1424                                     (s32)le32_to_cpu(priv->card_alive_init.
1425                                     tx_atten[txatten_grp][c]);
1426                         else
1427                                 atten_value = 0;
1428
1429                         /* calculate index; higher index means lower txpower */
1430                         power_index = (u8) (factory_gain_index[c] -
1431                                             (target_power -
1432                                              factory_actual_pwr[c]) -
1433                                             temperature_comp[c] -
1434                                             voltage_compensation +
1435                                             atten_value);
1436
1437 /*                      IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
1438                                                 power_index); */
1439
1440                         if (power_index < get_min_power_index(i, band))
1441                                 power_index = get_min_power_index(i, band);
1442
1443                         /* adjust 5 GHz index to support negative indexes */
1444                         if (!band)
1445                                 power_index += 9;
1446
1447                         /* CCK, rate 32, reduce txpower for CCK */
1448                         if (i == POWER_TABLE_CCK_ENTRY)
1449                                 power_index +=
1450                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1451
1452                         /* stay within the table! */
1453                         if (power_index > 107) {
1454                                 IWL_WARN(priv, "txpower index %d > 107\n",
1455                                             power_index);
1456                                 power_index = 107;
1457                         }
1458                         if (power_index < 0) {
1459                                 IWL_WARN(priv, "txpower index %d < 0\n",
1460                                             power_index);
1461                                 power_index = 0;
1462                         }
1463
1464                         /* fill txpower command for this rate/chain */
1465                         tx_power.s.radio_tx_gain[c] =
1466                                 gain_table[band][power_index].radio;
1467                         tx_power.s.dsp_predis_atten[c] =
1468                                 gain_table[band][power_index].dsp;
1469
1470                         IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
1471                                           "gain 0x%02x dsp %d\n",
1472                                           c, atten_value, power_index,
1473                                         tx_power.s.radio_tx_gain[c],
1474                                         tx_power.s.dsp_predis_atten[c]);
1475                 } /* for each chain */
1476
1477                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1478
1479         } /* for each rate */
1480
1481         return 0;
1482 }
1483
1484 /**
1485  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1486  *
1487  * Uses the active RXON for channel, band, and characteristics (fat, high)
1488  * The power limit is taken from priv->tx_power_user_lmt.
1489  */
1490 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1491 {
1492         struct iwl4965_txpowertable_cmd cmd = { 0 };
1493         int ret;
1494         u8 band = 0;
1495         bool is_fat = false;
1496         u8 ctrl_chan_high = 0;
1497
1498         if (test_bit(STATUS_SCANNING, &priv->status)) {
1499                 /* If this gets hit a lot, switch it to a BUG() and catch
1500                  * the stack trace to find out who is calling this during
1501                  * a scan. */
1502                 IWL_WARN(priv, "TX Power requested while scanning!\n");
1503                 return -EAGAIN;
1504         }
1505
1506         band = priv->band == IEEE80211_BAND_2GHZ;
1507
1508         is_fat =  is_fat_channel(priv->active_rxon.flags);
1509
1510         if (is_fat &&
1511             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1512                 ctrl_chan_high = 1;
1513
1514         cmd.band = band;
1515         cmd.channel = priv->active_rxon.channel;
1516
1517         ret = iwl4965_fill_txpower_tbl(priv, band,
1518                                 le16_to_cpu(priv->active_rxon.channel),
1519                                 is_fat, ctrl_chan_high, &cmd.tx_power);
1520         if (ret)
1521                 goto out;
1522
1523         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1524
1525 out:
1526         return ret;
1527 }
1528
1529 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1530 {
1531         int ret = 0;
1532         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1533         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1534         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1535
1536         if ((rxon1->flags == rxon2->flags) &&
1537             (rxon1->filter_flags == rxon2->filter_flags) &&
1538             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1539             (rxon1->ofdm_ht_single_stream_basic_rates ==
1540              rxon2->ofdm_ht_single_stream_basic_rates) &&
1541             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1542              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1543             (rxon1->rx_chain == rxon2->rx_chain) &&
1544             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1545                 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC.  Not resending.\n");
1546                 return 0;
1547         }
1548
1549         rxon_assoc.flags = priv->staging_rxon.flags;
1550         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1551         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1552         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1553         rxon_assoc.reserved = 0;
1554         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1555             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1556         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1557             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1558         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1559
1560         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1561                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1562         if (ret)
1563                 return ret;
1564
1565         return ret;
1566 }
1567
1568 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1569 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1570 {
1571         int rc;
1572         u8 band = 0;
1573         bool is_fat = false;
1574         u8 ctrl_chan_high = 0;
1575         struct iwl4965_channel_switch_cmd cmd = { 0 };
1576         const struct iwl_channel_info *ch_info;
1577
1578         band = priv->band == IEEE80211_BAND_2GHZ;
1579
1580         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1581
1582         is_fat = is_fat_channel(priv->staging_rxon.flags);
1583
1584         if (is_fat &&
1585             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1586                 ctrl_chan_high = 1;
1587
1588         cmd.band = band;
1589         cmd.expect_beacon = 0;
1590         cmd.channel = cpu_to_le16(channel);
1591         cmd.rxon_flags = priv->active_rxon.flags;
1592         cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1593         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1594         if (ch_info)
1595                 cmd.expect_beacon = is_channel_radar(ch_info);
1596         else
1597                 cmd.expect_beacon = 1;
1598
1599         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1600                                       ctrl_chan_high, &cmd.tx_power);
1601         if (rc) {
1602                 IWL_DEBUG_11H(priv, "error:%d  fill txpower_tbl\n", rc);
1603                 return rc;
1604         }
1605
1606         rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1607         return rc;
1608 }
1609 #endif
1610
1611 /**
1612  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1613  */
1614 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1615                                             struct iwl_tx_queue *txq,
1616                                             u16 byte_cnt)
1617 {
1618         struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1619         int txq_id = txq->q.id;
1620         int write_ptr = txq->q.write_ptr;
1621         int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1622         __le16 bc_ent;
1623
1624         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1625
1626         bc_ent = cpu_to_le16(len & 0xFFF);
1627         /* Set up byte count within first 256 entries */
1628         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1629
1630         /* If within first 64 entries, duplicate at end */
1631         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1632                 scd_bc_tbl[txq_id].
1633                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1634 }
1635
1636 /**
1637  * sign_extend - Sign extend a value using specified bit as sign-bit
1638  *
1639  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1640  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1641  *
1642  * @param oper value to sign extend
1643  * @param index 0 based bit index (0<=index<32) to sign bit
1644  */
1645 static s32 sign_extend(u32 oper, int index)
1646 {
1647         u8 shift = 31 - index;
1648
1649         return (s32)(oper << shift) >> shift;
1650 }
1651
1652 /**
1653  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1654  * @statistics: Provides the temperature reading from the uCode
1655  *
1656  * A return of <0 indicates bogus data in the statistics
1657  */
1658 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv)
1659 {
1660         s32 temperature;
1661         s32 vt;
1662         s32 R1, R2, R3;
1663         u32 R4;
1664
1665         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1666                 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1667                 IWL_DEBUG_TEMP(priv, "Running FAT temperature calibration\n");
1668                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1669                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1670                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1671                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1672         } else {
1673                 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
1674                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1675                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1676                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1677                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1678         }
1679
1680         /*
1681          * Temperature is only 23 bits, so sign extend out to 32.
1682          *
1683          * NOTE If we haven't received a statistics notification yet
1684          * with an updated temperature, use R4 provided to us in the
1685          * "initialize" ALIVE response.
1686          */
1687         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1688                 vt = sign_extend(R4, 23);
1689         else
1690                 vt = sign_extend(
1691                         le32_to_cpu(priv->statistics.general.temperature), 23);
1692
1693         IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1694
1695         if (R3 == R1) {
1696                 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
1697                 return -1;
1698         }
1699
1700         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1701          * Add offset to center the adjustment around 0 degrees Centigrade. */
1702         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1703         temperature /= (R3 - R1);
1704         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1705
1706         IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
1707                         temperature, KELVIN_TO_CELSIUS(temperature));
1708
1709         return temperature;
1710 }
1711
1712 /* Adjust Txpower only if temperature variance is greater than threshold. */
1713 #define IWL_TEMPERATURE_THRESHOLD   3
1714
1715 /**
1716  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1717  *
1718  * If the temperature changed has changed sufficiently, then a recalibration
1719  * is needed.
1720  *
1721  * Assumes caller will replace priv->last_temperature once calibration
1722  * executed.
1723  */
1724 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1725 {
1726         int temp_diff;
1727
1728         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1729                 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
1730                 return 0;
1731         }
1732
1733         temp_diff = priv->temperature - priv->last_temperature;
1734
1735         /* get absolute value */
1736         if (temp_diff < 0) {
1737                 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d, \n", temp_diff);
1738                 temp_diff = -temp_diff;
1739         } else if (temp_diff == 0)
1740                 IWL_DEBUG_POWER(priv, "Same temp, \n");
1741         else
1742                 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d, \n", temp_diff);
1743
1744         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1745                 IWL_DEBUG_POWER(priv, "Thermal txpower calib not needed\n");
1746                 return 0;
1747         }
1748
1749         IWL_DEBUG_POWER(priv, "Thermal txpower calib needed\n");
1750
1751         return 1;
1752 }
1753
1754 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1755 {
1756         s32 temp;
1757
1758         temp = iwl4965_hw_get_temperature(priv);
1759         if (temp < 0)
1760                 return;
1761
1762         if (priv->temperature != temp) {
1763                 if (priv->temperature)
1764                         IWL_DEBUG_TEMP(priv, "Temperature changed "
1765                                        "from %dC to %dC\n",
1766                                        KELVIN_TO_CELSIUS(priv->temperature),
1767                                        KELVIN_TO_CELSIUS(temp));
1768                 else
1769                         IWL_DEBUG_TEMP(priv, "Temperature "
1770                                        "initialized to %dC\n",
1771                                        KELVIN_TO_CELSIUS(temp));
1772         }
1773
1774         priv->temperature = temp;
1775         set_bit(STATUS_TEMPERATURE, &priv->status);
1776
1777         if (!priv->disable_tx_power_cal &&
1778              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1779              iwl4965_is_temp_calib_needed(priv))
1780                 queue_work(priv->workqueue, &priv->txpower_work);
1781 }
1782
1783 /**
1784  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1785  */
1786 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1787                                             u16 txq_id)
1788 {
1789         /* Simply stop the queue, but don't change any configuration;
1790          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1791         iwl_write_prph(priv,
1792                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1793                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1794                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1795 }
1796
1797 /**
1798  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1799  * priv->lock must be held by the caller
1800  */
1801 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1802                                    u16 ssn_idx, u8 tx_fifo)
1803 {
1804         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1805             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1806                 IWL_WARN(priv,
1807                         "queue number out of range: %d, must be %d to %d\n",
1808                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1809                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1810                 return -EINVAL;
1811         }
1812
1813         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1814
1815         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1816
1817         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1818         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1819         /* supposes that ssn_idx is valid (!= 0xFFF) */
1820         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1821
1822         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1823         iwl_txq_ctx_deactivate(priv, txq_id);
1824         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1825
1826         return 0;
1827 }
1828
1829 /**
1830  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1831  */
1832 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1833                                         u16 txq_id)
1834 {
1835         u32 tbl_dw_addr;
1836         u32 tbl_dw;
1837         u16 scd_q2ratid;
1838
1839         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1840
1841         tbl_dw_addr = priv->scd_base_addr +
1842                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1843
1844         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1845
1846         if (txq_id & 0x1)
1847                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1848         else
1849                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1850
1851         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1852
1853         return 0;
1854 }
1855
1856
1857 /**
1858  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1859  *
1860  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1861  *        i.e. it must be one of the higher queues used for aggregation
1862  */
1863 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1864                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1865 {
1866         unsigned long flags;
1867         u16 ra_tid;
1868
1869         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1870             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1871                 IWL_WARN(priv,
1872                         "queue number out of range: %d, must be %d to %d\n",
1873                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1874                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1875                 return -EINVAL;
1876         }
1877
1878         ra_tid = BUILD_RAxTID(sta_id, tid);
1879
1880         /* Modify device's station table to Tx this TID */
1881         iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1882
1883         spin_lock_irqsave(&priv->lock, flags);
1884
1885         /* Stop this Tx queue before configuring it */
1886         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1887
1888         /* Map receiver-address / traffic-ID to this queue */
1889         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1890
1891         /* Set this queue as a chain-building queue */
1892         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1893
1894         /* Place first TFD at index corresponding to start sequence number.
1895          * Assumes that ssn_idx is valid (!= 0xFFF) */
1896         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1897         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1898         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1899
1900         /* Set up Tx window size and frame limit for this queue */
1901         iwl_write_targ_mem(priv,
1902                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1903                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1904                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1905
1906         iwl_write_targ_mem(priv, priv->scd_base_addr +
1907                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1908                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1909                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1910
1911         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1912
1913         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1914         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1915
1916         spin_unlock_irqrestore(&priv->lock, flags);
1917
1918         return 0;
1919 }
1920
1921
1922 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1923 {
1924         switch (cmd_id) {
1925         case REPLY_RXON:
1926                 return (u16) sizeof(struct iwl4965_rxon_cmd);
1927         default:
1928                 return len;
1929         }
1930 }
1931
1932 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1933 {
1934         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1935         addsta->mode = cmd->mode;
1936         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1937         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1938         addsta->station_flags = cmd->station_flags;
1939         addsta->station_flags_msk = cmd->station_flags_msk;
1940         addsta->tid_disable_tx = cmd->tid_disable_tx;
1941         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1942         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1943         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1944         addsta->reserved1 = cpu_to_le16(0);
1945         addsta->reserved2 = cpu_to_le32(0);
1946
1947         return (u16)sizeof(struct iwl4965_addsta_cmd);
1948 }
1949
1950 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1951 {
1952         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1953 }
1954
1955 /**
1956  * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1957  */
1958 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1959                                       struct iwl_ht_agg *agg,
1960                                       struct iwl4965_tx_resp *tx_resp,
1961                                       int txq_id, u16 start_idx)
1962 {
1963         u16 status;
1964         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1965         struct ieee80211_tx_info *info = NULL;
1966         struct ieee80211_hdr *hdr = NULL;
1967         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1968         int i, sh, idx;
1969         u16 seq;
1970         if (agg->wait_for_ba)
1971                 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
1972
1973         agg->frame_count = tx_resp->frame_count;
1974         agg->start_idx = start_idx;
1975         agg->rate_n_flags = rate_n_flags;
1976         agg->bitmap = 0;
1977
1978         /* num frames attempted by Tx command */
1979         if (agg->frame_count == 1) {
1980                 /* Only one frame was attempted; no block-ack will arrive */
1981                 status = le16_to_cpu(frame_status[0].status);
1982                 idx = start_idx;
1983
1984                 /* FIXME: code repetition */
1985                 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
1986                                    agg->frame_count, agg->start_idx, idx);
1987
1988                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
1989                 info->status.rates[0].count = tx_resp->failure_frame + 1;
1990                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1991                 info->flags |= iwl_is_tx_success(status) ?
1992                         IEEE80211_TX_STAT_ACK : 0;
1993                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
1994                 /* FIXME: code repetition end */
1995
1996                 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
1997                                     status & 0xff, tx_resp->failure_frame);
1998                 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
1999
2000                 agg->wait_for_ba = 0;
2001         } else {
2002                 /* Two or more frames were attempted; expect block-ack */
2003                 u64 bitmap = 0;
2004                 int start = agg->start_idx;
2005
2006                 /* Construct bit-map of pending frames within Tx window */
2007                 for (i = 0; i < agg->frame_count; i++) {
2008                         u16 sc;
2009                         status = le16_to_cpu(frame_status[i].status);
2010                         seq  = le16_to_cpu(frame_status[i].sequence);
2011                         idx = SEQ_TO_INDEX(seq);
2012                         txq_id = SEQ_TO_QUEUE(seq);
2013
2014                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2015                                       AGG_TX_STATE_ABORT_MSK))
2016                                 continue;
2017
2018                         IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
2019                                            agg->frame_count, txq_id, idx);
2020
2021                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2022
2023                         sc = le16_to_cpu(hdr->seq_ctrl);
2024                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2025                                 IWL_ERR(priv,
2026                                         "BUG_ON idx doesn't match seq control"
2027                                         " idx=%d, seq_idx=%d, seq=%d\n",
2028                                         idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
2029                                 return -1;
2030                         }
2031
2032                         IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
2033                                            i, idx, SEQ_TO_SN(sc));
2034
2035                         sh = idx - start;
2036                         if (sh > 64) {
2037                                 sh = (start - idx) + 0xff;
2038                                 bitmap = bitmap << sh;
2039                                 sh = 0;
2040                                 start = idx;
2041                         } else if (sh < -64)
2042                                 sh  = 0xff - (start - idx);
2043                         else if (sh < 0) {
2044                                 sh = start - idx;
2045                                 start = idx;
2046                                 bitmap = bitmap << sh;
2047                                 sh = 0;
2048                         }
2049                         bitmap |= 1ULL << sh;
2050                         IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
2051                                            start, (unsigned long long)bitmap);
2052                 }
2053
2054                 agg->bitmap = bitmap;
2055                 agg->start_idx = start;
2056                 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
2057                                    agg->frame_count, agg->start_idx,
2058                                    (unsigned long long)agg->bitmap);
2059
2060                 if (bitmap)
2061                         agg->wait_for_ba = 1;
2062         }
2063         return 0;
2064 }
2065
2066 /**
2067  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2068  */
2069 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2070                                 struct iwl_rx_mem_buffer *rxb)
2071 {
2072         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2073         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2074         int txq_id = SEQ_TO_QUEUE(sequence);
2075         int index = SEQ_TO_INDEX(sequence);
2076         struct iwl_tx_queue *txq = &priv->txq[txq_id];
2077         struct ieee80211_hdr *hdr;
2078         struct ieee80211_tx_info *info;
2079         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2080         u32  status = le32_to_cpu(tx_resp->u.status);
2081         int tid = MAX_TID_COUNT;
2082         int sta_id;
2083         int freed;
2084         u8 *qc = NULL;
2085
2086         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2087                 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
2088                           "is out of range [0-%d] %d %d\n", txq_id,
2089                           index, txq->q.n_bd, txq->q.write_ptr,
2090                           txq->q.read_ptr);
2091                 return;
2092         }
2093
2094         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2095         memset(&info->status, 0, sizeof(info->status));
2096
2097         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2098         if (ieee80211_is_data_qos(hdr->frame_control)) {
2099                 qc = ieee80211_get_qos_ctl(hdr);
2100                 tid = qc[0] & 0xf;
2101         }
2102
2103         sta_id = iwl_get_ra_sta_id(priv, hdr);
2104         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2105                 IWL_ERR(priv, "Station not known\n");
2106                 return;
2107         }
2108
2109         if (txq->sched_retry) {
2110                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2111                 struct iwl_ht_agg *agg = NULL;
2112
2113                 WARN_ON(!qc);
2114
2115                 agg = &priv->stations[sta_id].tid[tid].agg;
2116
2117                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2118
2119                 /* check if BAR is needed */
2120                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2121                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2122
2123                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2124                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2125                         IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2126                                            "%d index %d\n", scd_ssn , index);
2127                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2128                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2129
2130                         if (priv->mac80211_registered &&
2131                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2132                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2133                                 if (agg->state == IWL_AGG_OFF)
2134                                         iwl_wake_queue(priv, txq_id);
2135                                 else
2136                                         iwl_wake_queue(priv, txq->swq_id);
2137                         }
2138                 }
2139         } else {
2140                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2141                 info->flags |= iwl_is_tx_success(status) ?
2142                                         IEEE80211_TX_STAT_ACK : 0;
2143                 iwl_hwrate_to_tx_control(priv,
2144                                         le32_to_cpu(tx_resp->rate_n_flags),
2145                                         info);
2146
2147                 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
2148                                    "rate_n_flags 0x%x retries %d\n",
2149                                    txq_id,
2150                                    iwl_get_tx_fail_reason(status), status,
2151                                    le32_to_cpu(tx_resp->rate_n_flags),
2152                                    tx_resp->failure_frame);
2153
2154                 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2155                 if (qc && likely(sta_id != IWL_INVALID_STATION))
2156                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2157
2158                 if (priv->mac80211_registered &&
2159                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
2160                         iwl_wake_queue(priv, txq_id);
2161         }
2162
2163         if (qc && likely(sta_id != IWL_INVALID_STATION))
2164                 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2165
2166         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2167                 IWL_ERR(priv, "TODO:  Implement Tx ABORT REQUIRED!!!\n");
2168 }
2169
2170 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2171                              struct iwl_rx_phy_res *rx_resp)
2172 {
2173         /* data from PHY/DSP regarding signal strength, etc.,
2174          *   contents are always there, not configurable by host.  */
2175         struct iwl4965_rx_non_cfg_phy *ncphy =
2176             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2177         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2178                         >> IWL49_AGC_DB_POS;
2179
2180         u32 valid_antennae =
2181             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2182                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2183         u8 max_rssi = 0;
2184         u32 i;
2185
2186         /* Find max rssi among 3 possible receivers.
2187          * These values are measured by the digital signal processor (DSP).
2188          * They should stay fairly constant even as the signal strength varies,
2189          *   if the radio's automatic gain control (AGC) is working right.
2190          * AGC value (see below) will provide the "interesting" info. */
2191         for (i = 0; i < 3; i++)
2192                 if (valid_antennae & (1 << i))
2193                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2194
2195         IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2196                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2197                 max_rssi, agc);
2198
2199         /* dBm = max_rssi dB - agc dB - constant.
2200          * Higher AGC (higher radio gain) means lower signal. */
2201         return max_rssi - agc - IWL49_RSSI_OFFSET;
2202 }
2203
2204
2205 /* Set up 4965-specific Rx frame reply handlers */
2206 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2207 {
2208         /* Legacy Rx frames */
2209         priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2210         /* Tx response */
2211         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2212 }
2213
2214 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2215 {
2216         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2217 }
2218
2219 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2220 {
2221         cancel_work_sync(&priv->txpower_work);
2222 }
2223
2224 static struct iwl_hcmd_ops iwl4965_hcmd = {
2225         .rxon_assoc = iwl4965_send_rxon_assoc,
2226         .commit_rxon = iwl_commit_rxon,
2227         .set_rxon_chain = iwl_set_rxon_chain,
2228 };
2229
2230 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2231         .get_hcmd_size = iwl4965_get_hcmd_size,
2232         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2233         .chain_noise_reset = iwl4965_chain_noise_reset,
2234         .gain_computation = iwl4965_gain_computation,
2235         .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
2236         .calc_rssi = iwl4965_calc_rssi,
2237 };
2238
2239 static struct iwl_lib_ops iwl4965_lib = {
2240         .set_hw_params = iwl4965_hw_set_hw_params,
2241         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2242         .txq_set_sched = iwl4965_txq_set_sched,
2243         .txq_agg_enable = iwl4965_txq_agg_enable,
2244         .txq_agg_disable = iwl4965_txq_agg_disable,
2245         .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2246         .txq_free_tfd = iwl_hw_txq_free_tfd,
2247         .txq_init = iwl_hw_tx_queue_init,
2248         .rx_handler_setup = iwl4965_rx_handler_setup,
2249         .setup_deferred_work = iwl4965_setup_deferred_work,
2250         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2251         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2252         .alive_notify = iwl4965_alive_notify,
2253         .init_alive_start = iwl4965_init_alive_start,
2254         .load_ucode = iwl4965_load_bsm,
2255         .apm_ops = {
2256                 .init = iwl4965_apm_init,
2257                 .reset = iwl4965_apm_reset,
2258                 .stop = iwl4965_apm_stop,
2259                 .config = iwl4965_nic_config,
2260                 .set_pwr_src = iwl_set_pwr_src,
2261         },
2262         .eeprom_ops = {
2263                 .regulatory_bands = {
2264                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2265                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2266                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2267                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2268                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2269                         EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
2270                         EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2271                 },
2272                 .verify_signature  = iwlcore_eeprom_verify_signature,
2273                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2274                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2275                 .calib_version = iwl4965_eeprom_calib_version,
2276                 .query_addr = iwlcore_eeprom_query_addr,
2277         },
2278         .send_tx_power  = iwl4965_send_tx_power,
2279         .update_chain_flags = iwl_update_chain_flags,
2280         .post_associate = iwl_post_associate,
2281         .config_ap = iwl_config_ap,
2282         .isr = iwl_isr_legacy,
2283         .temp_ops = {
2284                 .temperature = iwl4965_temperature_calib,
2285                 .set_ct_kill = iwl4965_set_ct_threshold,
2286         },
2287 };
2288
2289 static struct iwl_ops iwl4965_ops = {
2290         .lib = &iwl4965_lib,
2291         .hcmd = &iwl4965_hcmd,
2292         .utils = &iwl4965_hcmd_utils,
2293 };
2294
2295 struct iwl_cfg iwl4965_agn_cfg = {
2296         .name = "4965AGN",
2297         .fw_name_pre = IWL4965_FW_PRE,
2298         .ucode_api_max = IWL4965_UCODE_API_MAX,
2299         .ucode_api_min = IWL4965_UCODE_API_MIN,
2300         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2301         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2302         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2303         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2304         .ops = &iwl4965_ops,
2305         .mod_params = &iwl4965_mod_params,
2306         .use_isr_legacy = true
2307 };
2308
2309 /* Module firmware */
2310 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2311
2312 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
2313 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2314 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
2315 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2316 module_param_named(debug, iwl4965_mod_params.debug, uint, 0444);
2317 MODULE_PARM_DESC(debug, "debug output mask");
2318 module_param_named(
2319         disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
2320 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2321
2322 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
2323 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2324 /* 11n */
2325 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, 0444);
2326 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2327 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
2328 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2329
2330 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
2331 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");