drivers/net/wireless/iwlwifi/iwl-4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <net/mac80211.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39
  40 #include "iwl-eeprom.h"
  41 #include "iwl-dev.h"
  42 #include "iwl-core.h"
  43 #include "iwl-io.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-calib.h"
  46 #include "iwl-sta.h"
  47
  48 static int iwl4965_send_tx_power(struct iwl_priv *priv);
  49 static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
  50
  51 /* Highest firmware API version supported */
  52 #define IWL4965_UCODE_API_MAX 2
  53
  54 /* Lowest firmware API version supported */
  55 #define IWL4965_UCODE_API_MIN 2
  56
  57 #define IWL4965_FW_PRE "iwlwifi-4965-"
  58 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
  59 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
  60
  61
  62 /* module parameters */
  63 static struct iwl_mod_params iwl4965_mod_params = {
  64         .num_of_queues = IWL49_NUM_QUEUES,
  65         .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
  66         .amsdu_size_8K = 1,
  67         .restart_fw = 1,
  68         /* the rest are 0 by default */
  69 };
  70
  71 /* check contents of special bootstrap uCode SRAM */
  72 static int iwl4965_verify_bsm(struct iwl_priv *priv)
  73 {
  74         __le32 *image = priv->ucode_boot.v_addr;
  75         u32 len = priv->ucode_boot.len;
  76         u32 reg;
  77         u32 val;
  78
  79         IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
  80
  81         /* verify BSM SRAM contents */
  82         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  83         for (reg = BSM_SRAM_LOWER_BOUND;
  84              reg < BSM_SRAM_LOWER_BOUND + len;
  85              reg += sizeof(u32), image++) {
  86                 val = iwl_read_prph(priv, reg);
  87                 if (val != le32_to_cpu(*image)) {
  88                         IWL_ERR(priv, "BSM uCode verification failed at "
  89                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  90                                   BSM_SRAM_LOWER_BOUND,
  91                                   reg - BSM_SRAM_LOWER_BOUND, len,
  92                                   val, le32_to_cpu(*image));
  93                         return -EIO;
  94                 }
  95         }
  96
  97         IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
  98
  99         return 0;
 100 }
 101
 102 /**
 103  * iwl4965_load_bsm - Load bootstrap instructions
 104  *
 105  * BSM operation:
 106  *
 107  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 108  * in special SRAM that does not power down during RFKILL.  When powering back
 109  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 110  * the bootstrap program into the on-board processor, and starts it.
 111  *
 112  * The bootstrap program loads (via DMA) instructions and data for a new
 113  * program from host DRAM locations indicated by the host driver in the
 114  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 115  * automatically.
 116  *
 117  * When initializing the NIC, the host driver points the BSM to the
 118  * "initialize" uCode image.  This uCode sets up some internal data, then
 119  * notifies host via "initialize alive" that it is complete.
 120  *
 121  * The host then replaces the BSM_DRAM_* pointer values to point to the
 122  * normal runtime uCode instructions and a backup uCode data cache buffer
 123  * (filled initially with starting data values for the on-board processor),
 124  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 125  * which begins normal operation.
 126  *
 127  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 128  * the backup data cache in DRAM before SRAM is powered down.
 129  *
 130  * When powering back up, the BSM loads the bootstrap program.  This reloads
 131  * the runtime uCode instructions and the backup data cache into SRAM,
 132  * and re-launches the runtime uCode from where it left off.
 133  */
 134 static int iwl4965_load_bsm(struct iwl_priv *priv)
 135 {
 136         __le32 *image = priv->ucode_boot.v_addr;
 137         u32 len = priv->ucode_boot.len;
 138         dma_addr_t pinst;
 139         dma_addr_t pdata;
 140         u32 inst_len;
 141         u32 data_len;
 142         int i;
 143         u32 done;
 144         u32 reg_offset;
 145         int ret;
 146
 147         IWL_DEBUG_INFO(priv, "Begin load bsm\n");
 148
 149         priv->ucode_type = UCODE_INIT;
 150
 151         /* make sure bootstrap program is no larger than BSM's SRAM size */
 152         if (len > IWL49_MAX_BSM_SIZE)
 153                 return -EINVAL;
 154
 155         /* Tell bootstrap uCode where to find the "Initialize" uCode
 156          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 157          * NOTE:  iwl_init_alive_start() will replace these values,
 158          *        after the "initialize" uCode has run, to point to
 159          *        runtime/protocol instructions and backup data cache.
 160          */
 161         pinst = priv->ucode_init.p_addr >> 4;
 162         pdata = priv->ucode_init_data.p_addr >> 4;
 163         inst_len = priv->ucode_init.len;
 164         data_len = priv->ucode_init_data.len;
 165
 166         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 167         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 168         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 169         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 170
 171         /* Fill BSM memory with bootstrap instructions */
 172         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 173              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 174              reg_offset += sizeof(u32), image++)
 175                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
 176
 177         ret = iwl4965_verify_bsm(priv);
 178         if (ret)
 179                 return ret;
 180
 181         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 182         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
 183         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
 184         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 185
 186         /* Load bootstrap code into instruction SRAM now,
 187          *   to prepare to load "initialize" uCode */
 188         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 189
 190         /* Wait for load of bootstrap uCode to finish */
 191         for (i = 0; i < 100; i++) {
 192                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
 193                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 194                         break;
 195                 udelay(10);
 196         }
 197         if (i < 100)
 198                 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
 199         else {
 200                 IWL_ERR(priv, "BSM write did not complete!\n");
 201                 return -EIO;
 202         }
 203
 204         /* Enable future boot loads whenever power management unit triggers it
 205          *   (e.g. when powering back up after power-save shutdown) */
 206         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 207
 208
 209         return 0;
 210 }
 211
 212 /**
 213  * iwl4965_set_ucode_ptrs - Set uCode address location
 214  *
 215  * Tell initialization uCode where to find runtime uCode.
 216  *
 217  * BSM registers initially contain pointers to initialization uCode.
 218  * We need to replace them to load runtime uCode inst and data,
 219  * and to save runtime data when powering down.
 220  */
 221 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
 222 {
 223         dma_addr_t pinst;
 224         dma_addr_t pdata;
 225         int ret = 0;
 226
 227         /* bits 35:4 for 4965 */
 228         pinst = priv->ucode_code.p_addr >> 4;
 229         pdata = priv->ucode_data_backup.p_addr >> 4;
 230
 231         /* Tell bootstrap uCode where to find image to load */
 232         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 233         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 234         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
 235                                  priv->ucode_data.len);
 236
 237         /* Inst byte count must be last to set up, bit 31 signals uCode
 238          *   that all new ptr/size info is in place */
 239         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
 240                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
 241         IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
 242
 243         return ret;
 244 }
 245
 246 /**
 247  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
 248  *
 249  * Called after REPLY_ALIVE notification received from "initialize" uCode.
 250  *
 251  * The 4965 "initialize" ALIVE reply contains calibration data for:
 252  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
 253  *   (3945 does not contain this data).
 254  *
 255  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 256 */
 257 static void iwl4965_init_alive_start(struct iwl_priv *priv)
 258 {
 259         int ret;
 260
 261         /* Check alive response for "valid" sign from uCode */
 262         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
 263                 /* We had an error bringing up the hardware, so take it
 264                  * all the way back down so we can try again */
 265                 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
 266                 goto restart;
 267         }
 268
 269         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 270          * This is a paranoid check, because we would not have gotten the
 271          * "initialize" alive if code weren't properly loaded.  */
 272         if (iwl_verify_ucode(priv)) {
 273                 /* Runtime instruction load was bad;
 274                  * take it all the way back down so we can try again */
 275                 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
 276                 goto restart;
 277         }
 278
 279         /* Calculate temperature */
 280         priv->temperature = iwl4965_hw_get_temperature(priv);
 281
 282         /* Send pointers to protocol/runtime uCode image ... init code will
 283          * load and launch runtime uCode, which will send us another "Alive"
 284          * notification. */
 285         IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 286         if (iwl4965_set_ucode_ptrs(priv)) {
 287                 /* Runtime instruction load won't happen;
 288                  * take it all the way back down so we can try again */
 289                 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
 290                 goto restart;
 291         }
 292         priv->ucode_type = UCODE_RT;
 293         if (test_bit(STATUS_RT_UCODE_ALIVE, &priv->status)) {
 294                 IWL_WARN(priv, "Runtime uCode already alive? "
 295                         "Waiting for alive anyway\n");
 296                 clear_bit(STATUS_RT_UCODE_ALIVE, &priv->status);
 297         }
 298         ret = wait_event_interruptible_timeout(
 299                         priv->wait_command_queue,
 300                         test_bit(STATUS_RT_UCODE_ALIVE, &priv->status),
 301                         UCODE_ALIVE_TIMEOUT);
 302         if (!ret) {
 303                 /* FIXME: if STATUS_RT_UCODE_ALIVE timeout
 304                  * go back to restart the download Init uCode again
 305                  * this might cause to trap in the restart loop
 306                  */
 307                 priv->ucode_type = UCODE_NONE;
 308                 if (!test_bit(STATUS_RT_UCODE_ALIVE, &priv->status)) {
 309                         IWL_ERR(priv, "Runtime timeout after %dms\n",
 310                                 jiffies_to_msecs(UCODE_ALIVE_TIMEOUT));
 311                         goto restart;
 312                 }
 313         }
 314         return;
 315
 316 restart:
 317         queue_work(priv->workqueue, &priv->restart);
 318 }
 319
 320 static bool is_fat_channel(__le32 rxon_flags)
 321 {
 322         int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
 323                                     >> RXON_FLG_CHANNEL_MODE_POS;
 324         return ((chan_mod == CHANNEL_MODE_PURE_40) ||
 325                   (chan_mod == CHANNEL_MODE_MIXED));
 326 }
 327
 328 /*
 329  * EEPROM handlers
 330  */
 331 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
 332 {
 333         return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
 334 }
 335
 336 /*
 337  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
 338  * must be called under priv->lock and mac access
 339  */
 340 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
 341 {
 342         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
 343 }
 344
 345 static int iwl4965_apm_init(struct iwl_priv *priv)
 346 {
 347         int ret = 0;
 348
 349         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 350                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
 351
 352         /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
 353         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 354                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 355
 356         /* set "initialization complete" bit to move adapter
 357          * D0U* --> D0A* state */
 358         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 359
 360         /* wait for clock stabilization */
 361         ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
 362                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 363         if (ret < 0) {
 364                 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
 365                 goto out;
 366         }
 367
 368         /* enable DMA */
 369         iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 370                                                 APMG_CLK_VAL_BSM_CLK_RQT);
 371
 372         udelay(20);
 373
 374         /* disable L1-Active */
 375         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 376                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 377
 378 out:
 379         return ret;
 380 }
 381
 382
 383 static void iwl4965_nic_config(struct iwl_priv *priv)
 384 {
 385         unsigned long flags;
 386         u16 radio_cfg;
 387         u16 lctl;
 388
 389         spin_lock_irqsave(&priv->lock, flags);
 390
 391         lctl = iwl_pcie_link_ctl(priv);
 392
 393         /* HW bug W/A - negligible power consumption */
 394         /* L1-ASPM is enabled by BIOS */
 395         if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
 396                 /* L1-ASPM enabled: disable L0S  */
 397                 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 398         else
 399                 /* L1-ASPM disabled: enable L0S */
 400                 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 401
 402         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
 403
 404         /* write radio config values to register */
 405         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 406                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 407                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 408                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 409                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 410
 411         /* set CSR_HW_CONFIG_REG for uCode use */
 412         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 413                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 414                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 415
 416         priv->calib_info = (struct iwl_eeprom_calib_info *)
 417                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
 418
 419         spin_unlock_irqrestore(&priv->lock, flags);
 420 }
 421
 422 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
 423 {
 424         unsigned long flags;
 425
 426         spin_lock_irqsave(&priv->lock, flags);
 427
 428         /* set stop master bit */
 429         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
 430
 431         iwl_poll_direct_bit(priv, CSR_RESET,
 432                         CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
 433
 434         spin_unlock_irqrestore(&priv->lock, flags);
 435         IWL_DEBUG_INFO(priv, "stop master\n");
 436
 437         return 0;
 438 }
 439
 440 static void iwl4965_apm_stop(struct iwl_priv *priv)
 441 {
 442         unsigned long flags;
 443
 444         iwl4965_apm_stop_master(priv);
 445
 446         spin_lock_irqsave(&priv->lock, flags);
 447
 448         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 449
 450         udelay(10);
 451         /* clear "init complete"  move adapter D0A* --> D0U state */
 452         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 453         spin_unlock_irqrestore(&priv->lock, flags);
 454 }
 455
 456 static int iwl4965_apm_reset(struct iwl_priv *priv)
 457 {
 458         int ret = 0;
 459
 460         iwl4965_apm_stop_master(priv);
 461
 462
 463         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 464
 465         udelay(10);
 466
 467         /* FIXME: put here L1A -L0S w/a */
 468
 469         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 470
 471         ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
 472                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 473         if (ret < 0)
 474                 goto out;
 475
 476         udelay(10);
 477
 478         /* Enable DMA and BSM Clock */
 479         iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 480                                               APMG_CLK_VAL_BSM_CLK_RQT);
 481
 482         udelay(10);
 483
 484         /* disable L1A */
 485         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 486                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 487
 488         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
 489         wake_up_interruptible(&priv->wait_command_queue);
 490
 491 out:
 492         return ret;
 493 }
 494
 495 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 496  * Called after every association, but this runs only once!
 497  *  ... once chain noise is calibrated the first time, it's good forever.  */
 498 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
 499 {
 500         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
 501
 502         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
 503                 struct iwl_calib_diff_gain_cmd cmd;
 504
 505                 memset(&cmd, 0, sizeof(cmd));
 506                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 507                 cmd.diff_gain_a = 0;
 508                 cmd.diff_gain_b = 0;
 509                 cmd.diff_gain_c = 0;
 510                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 511                                  sizeof(cmd), &cmd))
 512                         IWL_ERR(priv,
 513                                 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
 514                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
 515                 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
 516         }
 517 }
 518
 519 static void iwl4965_gain_computation(struct iwl_priv *priv,
 520                 u32 *average_noise,
 521                 u16 min_average_noise_antenna_i,
 522                 u32 min_average_noise)
 523 {
 524         int i, ret;
 525         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 526
 527         data->delta_gain_code[min_average_noise_antenna_i] = 0;
 528
 529         for (i = 0; i < NUM_RX_CHAINS; i++) {
 530                 s32 delta_g = 0;
 531
 532                 if (!(data->disconn_array[i]) &&
 533                     (data->delta_gain_code[i] ==
 534                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
 535                         delta_g = average_noise[i] - min_average_noise;
 536                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
 537                         data->delta_gain_code[i] =
 538                                 min(data->delta_gain_code[i],
 539                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
 540
 541                         data->delta_gain_code[i] =
 542                                 (data->delta_gain_code[i] | (1 << 2));
 543                 } else {
 544                         data->delta_gain_code[i] = 0;
 545                 }
 546         }
 547         IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
 548                      data->delta_gain_code[0],
 549                      data->delta_gain_code[1],
 550                      data->delta_gain_code[2]);
 551
 552         /* Differential gain gets sent to uCode only once */
 553         if (!data->radio_write) {
 554                 struct iwl_calib_diff_gain_cmd cmd;
 555                 data->radio_write = 1;
 556
 557                 memset(&cmd, 0, sizeof(cmd));
 558                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 559                 cmd.diff_gain_a = data->delta_gain_code[0];
 560                 cmd.diff_gain_b = data->delta_gain_code[1];
 561                 cmd.diff_gain_c = data->delta_gain_code[2];
 562                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 563                                       sizeof(cmd), &cmd);
 564                 if (ret)
 565                         IWL_DEBUG_CALIB(priv, "fail sending cmd "
 566                                      "REPLY_PHY_CALIBRATION_CMD \n");
 567
 568                 /* TODO we might want recalculate
 569                  * rx_chain in rxon cmd */
 570
 571                 /* Mark so we run this algo only once! */
 572                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
 573         }
 574         data->chain_noise_a = 0;
 575         data->chain_noise_b = 0;
 576         data->chain_noise_c = 0;
 577         data->chain_signal_a = 0;
 578         data->chain_signal_b = 0;
 579         data->chain_signal_c = 0;
 580         data->beacon_count = 0;
 581 }
 582
 583 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
 584                         __le32 *tx_flags)
 585 {
 586         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 587                 *tx_flags |= TX_CMD_FLG_RTS_MSK;
 588                 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
 589         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 590                 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 591                 *tx_flags |= TX_CMD_FLG_CTS_MSK;
 592         }
 593 }
 594
 595 static void iwl4965_bg_txpower_work(struct work_struct *work)
 596 {
 597         struct iwl_priv *priv = container_of(work, struct iwl_priv,
 598                         txpower_work);
 599
 600         /* If a scan happened to start before we got here
 601          * then just return; the statistics notification will
 602          * kick off another scheduled work to compensate for
 603          * any temperature delta we missed here. */
 604         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
 605             test_bit(STATUS_SCANNING, &priv->status))
 606                 return;
 607
 608         mutex_lock(&priv->mutex);
 609
 610         /* Regardless of if we are associated, we must reconfigure the
 611          * TX power since frames can be sent on non-radar channels while
 612          * not associated */
 613         iwl4965_send_tx_power(priv);
 614
 615         /* Update last_temperature to keep is_calib_needed from running
 616          * when it isn't needed... */
 617         priv->last_temperature = priv->temperature;
 618
 619         mutex_unlock(&priv->mutex);
 620 }
 621
 622 /*
 623  * Acquire priv->lock before calling this function !
 624  */
 625 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
 626 {
 627         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
 628                              (index & 0xff) | (txq_id << 8));
 629         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
 630 }
 631
 632 /**
 633  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
 634  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
 635  * @scd_retry: (1) Indicates queue will be used in aggregation mode
 636  *
 637  * NOTE:  Acquire priv->lock before calling this function !
 638  */
 639 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
 640                                         struct iwl_tx_queue *txq,
 641                                         int tx_fifo_id, int scd_retry)
 642 {
 643         int txq_id = txq->q.id;
 644
 645         /* Find out whether to activate Tx queue */
 646         int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
 647
 648         /* Set up and activate */
 649         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
 650                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
 651                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
 652                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
 653                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
 654                          IWL49_SCD_QUEUE_STTS_REG_MSK);
 655
 656         txq->sched_retry = scd_retry;
 657
 658         IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
 659                        active ? "Activate" : "Deactivate",
 660                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
 661 }
 662
 663 static const u16 default_queue_to_tx_fifo[] = {
 664         IWL_TX_FIFO_AC3,
 665         IWL_TX_FIFO_AC2,
 666         IWL_TX_FIFO_AC1,
 667         IWL_TX_FIFO_AC0,
 668         IWL49_CMD_FIFO_NUM,
 669         IWL_TX_FIFO_HCCA_1,
 670         IWL_TX_FIFO_HCCA_2
 671 };
 672
 673 static int iwl4965_alive_notify(struct iwl_priv *priv)
 674 {
 675         u32 a;
 676         unsigned long flags;
 677         int i, chan;
 678         u32 reg_val;
 679
 680         spin_lock_irqsave(&priv->lock, flags);
 681
 682         /* Clear 4965's internal Tx Scheduler data base */
 683         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
 684         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
 685         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
 686                 iwl_write_targ_mem(priv, a, 0);
 687         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
 688                 iwl_write_targ_mem(priv, a, 0);
 689         for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
 690                 iwl_write_targ_mem(priv, a, 0);
 691
 692         /* Tel 4965 where to find Tx byte count tables */
 693         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
 694                         priv->scd_bc_tbls.dma >> 10);
 695
 696         /* Enable DMA channel */
 697         for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
 698                 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
 699                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
 700                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
 701
 702         /* Update FH chicken bits */
 703         reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
 704         iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
 705                            reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
 706
 707         /* Disable chain mode for all queues */
 708         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
 709
 710         /* Initialize each Tx queue (including the command queue) */
 711         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
 712
 713                 /* TFD circular buffer read/write indexes */
 714                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
 715                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
 716
 717                 /* Max Tx Window size for Scheduler-ACK mode */
 718                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 719                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
 720                                 (SCD_WIN_SIZE <<
 721                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
 722                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
 723
 724                 /* Frame limit */
 725                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 726                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
 727                                 sizeof(u32),
 728                                 (SCD_FRAME_LIMIT <<
 729                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
 730                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
 731
 732         }
 733         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
 734                                  (1 << priv->hw_params.max_txq_num) - 1);
 735
 736         /* Activate all Tx DMA/FIFO channels */
 737         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
 738
 739         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 740
 741         /* Map each Tx/cmd queue to its corresponding fifo */
 742         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
 743                 int ac = default_queue_to_tx_fifo[i];
 744                 iwl_txq_ctx_activate(priv, i);
 745                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
 746         }
 747
 748         spin_unlock_irqrestore(&priv->lock, flags);
 749
 750         return 0;
 751 }
 752
 753 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
 754         .min_nrg_cck = 97,
 755         .max_nrg_cck = 0, /* not used, set to 0 */
 756
 757         .auto_corr_min_ofdm = 85,
 758         .auto_corr_min_ofdm_mrc = 170,
 759         .auto_corr_min_ofdm_x1 = 105,
 760         .auto_corr_min_ofdm_mrc_x1 = 220,
 761
 762         .auto_corr_max_ofdm = 120,
 763         .auto_corr_max_ofdm_mrc = 210,
 764         .auto_corr_max_ofdm_x1 = 140,
 765         .auto_corr_max_ofdm_mrc_x1 = 270,
 766
 767         .auto_corr_min_cck = 125,
 768         .auto_corr_max_cck = 200,
 769         .auto_corr_min_cck_mrc = 200,
 770         .auto_corr_max_cck_mrc = 400,
 771
 772         .nrg_th_cck = 100,
 773         .nrg_th_ofdm = 100,
 774 };
 775
 776 static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
 777 {
 778         /* want Kelvin */
 779         priv->hw_params.ct_kill_threshold =
 780                 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
 781 }
 782
 783 /**
 784  * iwl4965_hw_set_hw_params
 785  *
 786  * Called when initializing driver
 787  */
 788 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
 789 {
 790
 791         if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
 792             (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
 793                 IWL_ERR(priv,
 794                         "invalid queues_num, should be between %d and %d\n",
 795                         IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
 796                 return -EINVAL;
 797         }
 798
 799         priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
 800         priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
 801         priv->hw_params.scd_bc_tbls_size =
 802                         IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
 803         priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
 804         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
 805         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
 806         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
 807         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
 808         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 809         priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
 810
 811         priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
 812
 813         priv->hw_params.tx_chains_num = 2;
 814         priv->hw_params.rx_chains_num = 2;
 815         priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
 816         priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
 817         if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
 818                 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
 819
 820         priv->hw_params.sens = &iwl4965_sensitivity;
 821
 822         return 0;
 823 }
 824
 825 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
 826 {
 827         s32 sign = 1;
 828
 829         if (num < 0) {
 830                 sign = -sign;
 831                 num = -num;
 832         }
 833         if (denom < 0) {
 834                 sign = -sign;
 835                 denom = -denom;
 836         }
 837         *res = 1;
 838         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 839
 840         return 1;
 841 }
 842
 843 /**
 844  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
 845  *
 846  * Determines power supply voltage compensation for txpower calculations.
 847  * Returns number of 1/2-dB steps to subtract from gain table index,
 848  * to compensate for difference between power supply voltage during
 849  * factory measurements, vs. current power supply voltage.
 850  *
 851  * Voltage indication is higher for lower voltage.
 852  * Lower voltage requires more gain (lower gain table index).
 853  */
 854 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
 855                                             s32 current_voltage)
 856 {
 857         s32 comp = 0;
 858
 859         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
 860             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
 861                 return 0;
 862
 863         iwl4965_math_div_round(current_voltage - eeprom_voltage,
 864                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
 865
 866         if (current_voltage > eeprom_voltage)
 867                 comp *= 2;
 868         if ((comp < -2) || (comp > 2))
 869                 comp = 0;
 870
 871         return comp;
 872 }
 873
 874 static s32 iwl4965_get_tx_atten_grp(u16 channel)
 875 {
 876         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
 877             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
 878                 return CALIB_CH_GROUP_5;
 879
 880         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
 881             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
 882                 return CALIB_CH_GROUP_1;
 883
 884         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
 885             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
 886                 return CALIB_CH_GROUP_2;
 887
 888         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
 889             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
 890                 return CALIB_CH_GROUP_3;
 891
 892         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
 893             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
 894                 return CALIB_CH_GROUP_4;
 895
 896         return -1;
 897 }
 898
 899 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
 900 {
 901         s32 b = -1;
 902
 903         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 904                 if (priv->calib_info->band_info[b].ch_from == 0)
 905                         continue;
 906
 907                 if ((channel >= priv->calib_info->band_info[b].ch_from)
 908                     && (channel <= priv->calib_info->band_info[b].ch_to))
 909                         break;
 910         }
 911
 912         return b;
 913 }
 914
 915 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 916 {
 917         s32 val;
 918
 919         if (x2 == x1)
 920                 return y1;
 921         else {
 922                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 923                 return val + y2;
 924         }
 925 }
 926
 927 /**
 928  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
 929  *
 930  * Interpolates factory measurements from the two sample channels within a
 931  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 932  * differences in channel frequencies, which is proportional to differences
 933  * in channel number.
 934  */
 935 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
 936                                     struct iwl_eeprom_calib_ch_info *chan_info)
 937 {
 938         s32 s = -1;
 939         u32 c;
 940         u32 m;
 941         const struct iwl_eeprom_calib_measure *m1;
 942         const struct iwl_eeprom_calib_measure *m2;
 943         struct iwl_eeprom_calib_measure *omeas;
 944         u32 ch_i1;
 945         u32 ch_i2;
 946
 947         s = iwl4965_get_sub_band(priv, channel);
 948         if (s >= EEPROM_TX_POWER_BANDS) {
 949                 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
 950                 return -1;
 951         }
 952
 953         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
 954         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
 955         chan_info->ch_num = (u8) channel;
 956
 957         IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
 958                           channel, s, ch_i1, ch_i2);
 959
 960         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
 961                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
 962                         m1 = &(priv->calib_info->band_info[s].ch1.
 963                                measurements[c][m]);
 964                         m2 = &(priv->calib_info->band_info[s].ch2.
 965                                measurements[c][m]);
 966                         omeas = &(chan_info->measurements[c][m]);
 967
 968                         omeas->actual_pow =
 969                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 970                                                            m1->actual_pow,
 971                                                            ch_i2,
 972                                                            m2->actual_pow);
 973                         omeas->gain_idx =
 974                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 975                                                            m1->gain_idx, ch_i2,
 976                                                            m2->gain_idx);
 977                         omeas->temperature =
 978                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 979                                                            m1->temperature,
 980                                                            ch_i2,
 981                                                            m2->temperature);
 982                         omeas->pa_det =
 983                             (s8) iwl4965_interpolate_value(channel, ch_i1,
 984                                                            m1->pa_det, ch_i2,
 985                                                            m2->pa_det);
 986
 987                         IWL_DEBUG_TXPOWER(priv,
 988                                 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
 989                                 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
 990                         IWL_DEBUG_TXPOWER(priv,
 991                                 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
 992                                 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
 993                         IWL_DEBUG_TXPOWER(priv,
 994                                 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
 995                                 m1->pa_det, m2->pa_det, omeas->pa_det);
 996                         IWL_DEBUG_TXPOWER(priv,
 997                                 "chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
 998                                 m1->temperature, m2->temperature,
 999                                 omeas->temperature);
1000                 }
1001         }
1002
1003         return 0;
1004 }
1005
1006 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1007  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1008 static s32 back_off_table[] = {
1009         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1010         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1011         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1012         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1013         10                      /* CCK */
1014 };
1015
1016 /* Thermal compensation values for txpower for various frequency ranges ...
1017  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1018 static struct iwl4965_txpower_comp_entry {
1019         s32 degrees_per_05db_a;
1020         s32 degrees_per_05db_a_denom;
1021 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1022         {9, 2},                 /* group 0 5.2, ch  34-43 */
1023         {4, 1},                 /* group 1 5.2, ch  44-70 */
1024         {4, 1},                 /* group 2 5.2, ch  71-124 */
1025         {4, 1},                 /* group 3 5.2, ch 125-200 */
1026         {3, 1}                  /* group 4 2.4, ch   all */
1027 };
1028
1029 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1030 {
1031         if (!band) {
1032                 if ((rate_power_index & 7) <= 4)
1033                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1034         }
1035         return MIN_TX_GAIN_INDEX;
1036 }
1037
1038 struct gain_entry {
1039         u8 dsp;
1040         u8 radio;
1041 };
1042
1043 static const struct gain_entry gain_table[2][108] = {
1044         /* 5.2GHz power gain index table */
1045         {
1046          {123, 0x3F},           /* highest txpower */
1047          {117, 0x3F},
1048          {110, 0x3F},
1049          {104, 0x3F},
1050          {98, 0x3F},
1051          {110, 0x3E},
1052          {104, 0x3E},
1053          {98, 0x3E},
1054          {110, 0x3D},
1055          {104, 0x3D},
1056          {98, 0x3D},
1057          {110, 0x3C},
1058          {104, 0x3C},
1059          {98, 0x3C},
1060          {110, 0x3B},
1061          {104, 0x3B},
1062          {98, 0x3B},
1063          {110, 0x3A},
1064          {104, 0x3A},
1065          {98, 0x3A},
1066          {110, 0x39},
1067          {104, 0x39},
1068          {98, 0x39},
1069          {110, 0x38},
1070          {104, 0x38},
1071          {98, 0x38},
1072          {110, 0x37},
1073          {104, 0x37},
1074          {98, 0x37},
1075          {110, 0x36},
1076          {104, 0x36},
1077          {98, 0x36},
1078          {110, 0x35},
1079          {104, 0x35},
1080          {98, 0x35},
1081          {110, 0x34},
1082          {104, 0x34},
1083          {98, 0x34},
1084          {110, 0x33},
1085          {104, 0x33},
1086          {98, 0x33},
1087          {110, 0x32},
1088          {104, 0x32},
1089          {98, 0x32},
1090          {110, 0x31},
1091          {104, 0x31},
1092          {98, 0x31},
1093          {110, 0x30},
1094          {104, 0x30},
1095          {98, 0x30},
1096          {110, 0x25},
1097          {104, 0x25},
1098          {98, 0x25},
1099          {110, 0x24},
1100          {104, 0x24},
1101          {98, 0x24},
1102          {110, 0x23},
1103          {104, 0x23},
1104          {98, 0x23},
1105          {110, 0x22},
1106          {104, 0x18},
1107          {98, 0x18},
1108          {110, 0x17},
1109          {104, 0x17},
1110          {98, 0x17},
1111          {110, 0x16},
1112          {104, 0x16},
1113          {98, 0x16},
1114          {110, 0x15},
1115          {104, 0x15},
1116          {98, 0x15},
1117          {110, 0x14},
1118          {104, 0x14},
1119          {98, 0x14},
1120          {110, 0x13},
1121          {104, 0x13},
1122          {98, 0x13},
1123          {110, 0x12},
1124          {104, 0x08},
1125          {98, 0x08},
1126          {110, 0x07},
1127          {104, 0x07},
1128          {98, 0x07},
1129          {110, 0x06},
1130          {104, 0x06},
1131          {98, 0x06},
1132          {110, 0x05},
1133          {104, 0x05},
1134          {98, 0x05},
1135          {110, 0x04},
1136          {104, 0x04},
1137          {98, 0x04},
1138          {110, 0x03},
1139          {104, 0x03},
1140          {98, 0x03},
1141          {110, 0x02},
1142          {104, 0x02},
1143          {98, 0x02},
1144          {110, 0x01},
1145          {104, 0x01},
1146          {98, 0x01},
1147          {110, 0x00},
1148          {104, 0x00},
1149          {98, 0x00},
1150          {93, 0x00},
1151          {88, 0x00},
1152          {83, 0x00},
1153          {78, 0x00},
1154          },
1155         /* 2.4GHz power gain index table */
1156         {
1157          {110, 0x3f},           /* highest txpower */
1158          {104, 0x3f},
1159          {98, 0x3f},
1160          {110, 0x3e},
1161          {104, 0x3e},
1162          {98, 0x3e},
1163          {110, 0x3d},
1164          {104, 0x3d},
1165          {98, 0x3d},
1166          {110, 0x3c},
1167          {104, 0x3c},
1168          {98, 0x3c},
1169          {110, 0x3b},
1170          {104, 0x3b},
1171          {98, 0x3b},
1172          {110, 0x3a},
1173          {104, 0x3a},
1174          {98, 0x3a},
1175          {110, 0x39},
1176          {104, 0x39},
1177          {98, 0x39},
1178          {110, 0x38},
1179          {104, 0x38},
1180          {98, 0x38},
1181          {110, 0x37},
1182          {104, 0x37},
1183          {98, 0x37},
1184          {110, 0x36},
1185          {104, 0x36},
1186          {98, 0x36},
1187          {110, 0x35},
1188          {104, 0x35},
1189          {98, 0x35},
1190          {110, 0x34},
1191          {104, 0x34},
1192          {98, 0x34},
1193          {110, 0x33},
1194          {104, 0x33},
1195          {98, 0x33},
1196          {110, 0x32},
1197          {104, 0x32},
1198          {98, 0x32},
1199          {110, 0x31},
1200          {104, 0x31},
1201          {98, 0x31},
1202          {110, 0x30},
1203          {104, 0x30},
1204          {98, 0x30},
1205          {110, 0x6},
1206          {104, 0x6},
1207          {98, 0x6},
1208          {110, 0x5},
1209          {104, 0x5},
1210          {98, 0x5},
1211          {110, 0x4},
1212          {104, 0x4},
1213          {98, 0x4},
1214          {110, 0x3},
1215          {104, 0x3},
1216          {98, 0x3},
1217          {110, 0x2},
1218          {104, 0x2},
1219          {98, 0x2},
1220          {110, 0x1},
1221          {104, 0x1},
1222          {98, 0x1},
1223          {110, 0x0},
1224          {104, 0x0},
1225          {98, 0x0},
1226          {97, 0},
1227          {96, 0},
1228          {95, 0},
1229          {94, 0},
1230          {93, 0},
1231          {92, 0},
1232          {91, 0},
1233          {90, 0},
1234          {89, 0},
1235          {88, 0},
1236          {87, 0},
1237          {86, 0},
1238          {85, 0},
1239          {84, 0},
1240          {83, 0},
1241          {82, 0},
1242          {81, 0},
1243          {80, 0},
1244          {79, 0},
1245          {78, 0},
1246          {77, 0},
1247          {76, 0},
1248          {75, 0},
1249          {74, 0},
1250          {73, 0},
1251          {72, 0},
1252          {71, 0},
1253          {70, 0},
1254          {69, 0},
1255          {68, 0},
1256          {67, 0},
1257          {66, 0},
1258          {65, 0},
1259          {64, 0},
1260          {63, 0},
1261          {62, 0},
1262          {61, 0},
1263          {60, 0},
1264          {59, 0},
1265          }
1266 };
1267
1268 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1269                                     u8 is_fat, u8 ctrl_chan_high,
1270                                     struct iwl4965_tx_power_db *tx_power_tbl)
1271 {
1272         u8 saturation_power;
1273         s32 target_power;
1274         s32 user_target_power;
1275         s32 power_limit;
1276         s32 current_temp;
1277         s32 reg_limit;
1278         s32 current_regulatory;
1279         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1280         int i;
1281         int c;
1282         const struct iwl_channel_info *ch_info = NULL;
1283         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1284         const struct iwl_eeprom_calib_measure *measurement;
1285         s16 voltage;
1286         s32 init_voltage;
1287         s32 voltage_compensation;
1288         s32 degrees_per_05db_num;
1289         s32 degrees_per_05db_denom;
1290         s32 factory_temp;
1291         s32 temperature_comp[2];
1292         s32 factory_gain_index[2];
1293         s32 factory_actual_pwr[2];
1294         s32 power_index;
1295
1296         /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1297          *   are used for indexing into txpower table) */
1298         user_target_power = 2 * priv->tx_power_user_lmt;
1299
1300         /* Get current (RXON) channel, band, width */
1301         IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_fat %d\n", channel, band,
1302                           is_fat);
1303
1304         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1305
1306         if (!is_channel_valid(ch_info))
1307                 return -EINVAL;
1308
1309         /* get txatten group, used to select 1) thermal txpower adjustment
1310          *   and 2) mimo txpower balance between Tx chains. */
1311         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1312         if (txatten_grp < 0) {
1313                 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
1314                           channel);
1315                 return -EINVAL;
1316         }
1317
1318         IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
1319                           channel, txatten_grp);
1320
1321         if (is_fat) {
1322                 if (ctrl_chan_high)
1323                         channel -= 2;
1324                 else
1325                         channel += 2;
1326         }
1327
1328         /* hardware txpower limits ...
1329          * saturation (clipping distortion) txpowers are in half-dBm */
1330         if (band)
1331                 saturation_power = priv->calib_info->saturation_power24;
1332         else
1333                 saturation_power = priv->calib_info->saturation_power52;
1334
1335         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1336             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1337                 if (band)
1338                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1339                 else
1340                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1341         }
1342
1343         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1344          *   max_power_avg values are in dBm, convert * 2 */
1345         if (is_fat)
1346                 reg_limit = ch_info->fat_max_power_avg * 2;
1347         else
1348                 reg_limit = ch_info->max_power_avg * 2;
1349
1350         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1351             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1352                 if (band)
1353                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1354                 else
1355                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1356         }
1357
1358         /* Interpolate txpower calibration values for this channel,
1359          *   based on factory calibration tests on spaced channels. */
1360         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1361
1362         /* calculate tx gain adjustment based on power supply voltage */
1363         voltage = priv->calib_info->voltage;
1364         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1365         voltage_compensation =
1366             iwl4965_get_voltage_compensation(voltage, init_voltage);
1367
1368         IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
1369                           init_voltage,
1370                           voltage, voltage_compensation);
1371
1372         /* get current temperature (Celsius) */
1373         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1374         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1375         current_temp = KELVIN_TO_CELSIUS(current_temp);
1376
1377         /* select thermal txpower adjustment params, based on channel group
1378          *   (same frequency group used for mimo txatten adjustment) */
1379         degrees_per_05db_num =
1380             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1381         degrees_per_05db_denom =
1382             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1383
1384         /* get per-chain txpower values from factory measurements */
1385         for (c = 0; c < 2; c++) {
1386                 measurement = &ch_eeprom_info.measurements[c][1];
1387
1388                 /* txgain adjustment (in half-dB steps) based on difference
1389                  *   between factory and current temperature */
1390                 factory_temp = measurement->temperature;
1391                 iwl4965_math_div_round((current_temp - factory_temp) *
1392                                        degrees_per_05db_denom,
1393                                        degrees_per_05db_num,
1394                                        &temperature_comp[c]);
1395
1396                 factory_gain_index[c] = measurement->gain_idx;
1397                 factory_actual_pwr[c] = measurement->actual_pow;
1398
1399                 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1400                 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
1401                                   "curr tmp %d, comp %d steps\n",
1402                                   factory_temp, current_temp,
1403                                   temperature_comp[c]);
1404
1405                 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
1406                                   factory_gain_index[c],
1407                                   factory_actual_pwr[c]);
1408         }
1409
1410         /* for each of 33 bit-rates (including 1 for CCK) */
1411         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1412                 u8 is_mimo_rate;
1413                 union iwl4965_tx_power_dual_stream tx_power;
1414
1415                 /* for mimo, reduce each chain's txpower by half
1416                  * (3dB, 6 steps), so total output power is regulatory
1417                  * compliant. */
1418                 if (i & 0x8) {
1419                         current_regulatory = reg_limit -
1420                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1421                         is_mimo_rate = 1;
1422                 } else {
1423                         current_regulatory = reg_limit;
1424                         is_mimo_rate = 0;
1425                 }
1426
1427                 /* find txpower limit, either hardware or regulatory */
1428                 power_limit = saturation_power - back_off_table[i];
1429                 if (power_limit > current_regulatory)
1430                         power_limit = current_regulatory;
1431
1432                 /* reduce user's txpower request if necessary
1433                  * for this rate on this channel */
1434                 target_power = user_target_power;
1435                 if (target_power > power_limit)
1436                         target_power = power_limit;
1437
1438                 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
1439                                   i, saturation_power - back_off_table[i],
1440                                   current_regulatory, user_target_power,
1441                                   target_power);
1442
1443                 /* for each of 2 Tx chains (radio transmitters) */
1444                 for (c = 0; c < 2; c++) {
1445                         s32 atten_value;
1446
1447                         if (is_mimo_rate)
1448                                 atten_value =
1449                                     (s32)le32_to_cpu(priv->card_alive_init.
1450                                     tx_atten[txatten_grp][c]);
1451                         else
1452                                 atten_value = 0;
1453
1454                         /* calculate index; higher index means lower txpower */
1455                         power_index = (u8) (factory_gain_index[c] -
1456                                             (target_power -
1457                                              factory_actual_pwr[c]) -
1458                                             temperature_comp[c] -
1459                                             voltage_compensation +
1460                                             atten_value);
1461
1462 /*                      IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
1463                                                 power_index); */
1464
1465                         if (power_index < get_min_power_index(i, band))
1466                                 power_index = get_min_power_index(i, band);
1467
1468                         /* adjust 5 GHz index to support negative indexes */
1469                         if (!band)
1470                                 power_index += 9;
1471
1472                         /* CCK, rate 32, reduce txpower for CCK */
1473                         if (i == POWER_TABLE_CCK_ENTRY)
1474                                 power_index +=
1475                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1476
1477                         /* stay within the table! */
1478                         if (power_index > 107) {
1479                                 IWL_WARN(priv, "txpower index %d > 107\n",
1480                                             power_index);
1481                                 power_index = 107;
1482                         }
1483                         if (power_index < 0) {
1484                                 IWL_WARN(priv, "txpower index %d < 0\n",
1485                                             power_index);
1486                                 power_index = 0;
1487                         }
1488
1489                         /* fill txpower command for this rate/chain */
1490                         tx_power.s.radio_tx_gain[c] =
1491                                 gain_table[band][power_index].radio;
1492                         tx_power.s.dsp_predis_atten[c] =
1493                                 gain_table[band][power_index].dsp;
1494
1495                         IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
1496                                           "gain 0x%02x dsp %d\n",
1497                                           c, atten_value, power_index,
1498                                         tx_power.s.radio_tx_gain[c],
1499                                         tx_power.s.dsp_predis_atten[c]);
1500                 } /* for each chain */
1501
1502                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1503
1504         } /* for each rate */
1505
1506         return 0;
1507 }
1508
1509 /**
1510  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1511  *
1512  * Uses the active RXON for channel, band, and characteristics (fat, high)
1513  * The power limit is taken from priv->tx_power_user_lmt.
1514  */
1515 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1516 {
1517         struct iwl4965_txpowertable_cmd cmd = { 0 };
1518         int ret;
1519         u8 band = 0;
1520         bool is_fat = false;
1521         u8 ctrl_chan_high = 0;
1522
1523         if (test_bit(STATUS_SCANNING, &priv->status)) {
1524                 /* If this gets hit a lot, switch it to a BUG() and catch
1525                  * the stack trace to find out who is calling this during
1526                  * a scan. */
1527                 IWL_WARN(priv, "TX Power requested while scanning!\n");
1528                 return -EAGAIN;
1529         }
1530
1531         band = priv->band == IEEE80211_BAND_2GHZ;
1532
1533         is_fat =  is_fat_channel(priv->active_rxon.flags);
1534
1535         if (is_fat &&
1536             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1537                 ctrl_chan_high = 1;
1538
1539         cmd.band = band;
1540         cmd.channel = priv->active_rxon.channel;
1541
1542         ret = iwl4965_fill_txpower_tbl(priv, band,
1543                                 le16_to_cpu(priv->active_rxon.channel),
1544                                 is_fat, ctrl_chan_high, &cmd.tx_power);
1545         if (ret)
1546                 goto out;
1547
1548         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1549
1550 out:
1551         return ret;
1552 }
1553
1554 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1555 {
1556         int ret = 0;
1557         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1558         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1559         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1560
1561         if ((rxon1->flags == rxon2->flags) &&
1562             (rxon1->filter_flags == rxon2->filter_flags) &&
1563             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1564             (rxon1->ofdm_ht_single_stream_basic_rates ==
1565              rxon2->ofdm_ht_single_stream_basic_rates) &&
1566             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1567              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1568             (rxon1->rx_chain == rxon2->rx_chain) &&
1569             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1570                 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC.  Not resending.\n");
1571                 return 0;
1572         }
1573
1574         rxon_assoc.flags = priv->staging_rxon.flags;
1575         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1576         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1577         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1578         rxon_assoc.reserved = 0;
1579         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1580             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1581         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1582             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1583         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1584
1585         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1586                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1587         if (ret)
1588                 return ret;
1589
1590         return ret;
1591 }
1592
1593 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1594 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1595 {
1596         int rc;
1597         u8 band = 0;
1598         bool is_fat = false;
1599         u8 ctrl_chan_high = 0;
1600         struct iwl4965_channel_switch_cmd cmd = { 0 };
1601         const struct iwl_channel_info *ch_info;
1602
1603         band = priv->band == IEEE80211_BAND_2GHZ;
1604
1605         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1606
1607         is_fat = is_fat_channel(priv->staging_rxon.flags);
1608
1609         if (is_fat &&
1610             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1611                 ctrl_chan_high = 1;
1612
1613         cmd.band = band;
1614         cmd.expect_beacon = 0;
1615         cmd.channel = cpu_to_le16(channel);
1616         cmd.rxon_flags = priv->active_rxon.flags;
1617         cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1618         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1619         if (ch_info)
1620                 cmd.expect_beacon = is_channel_radar(ch_info);
1621         else
1622                 cmd.expect_beacon = 1;
1623
1624         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1625                                       ctrl_chan_high, &cmd.tx_power);
1626         if (rc) {
1627                 IWL_DEBUG_11H(priv, "error:%d  fill txpower_tbl\n", rc);
1628                 return rc;
1629         }
1630
1631         rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1632         return rc;
1633 }
1634 #endif
1635
1636 /**
1637  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1638  */
1639 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1640                                             struct iwl_tx_queue *txq,
1641                                             u16 byte_cnt)
1642 {
1643         struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1644         int txq_id = txq->q.id;
1645         int write_ptr = txq->q.write_ptr;
1646         int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1647         __le16 bc_ent;
1648
1649         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1650
1651         bc_ent = cpu_to_le16(len & 0xFFF);
1652         /* Set up byte count within first 256 entries */
1653         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1654
1655         /* If within first 64 entries, duplicate at end */
1656         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1657                 scd_bc_tbl[txq_id].
1658                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1659 }
1660
1661 /**
1662  * sign_extend - Sign extend a value using specified bit as sign-bit
1663  *
1664  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1665  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1666  *
1667  * @param oper value to sign extend
1668  * @param index 0 based bit index (0<=index<32) to sign bit
1669  */
1670 static s32 sign_extend(u32 oper, int index)
1671 {
1672         u8 shift = 31 - index;
1673
1674         return (s32)(oper << shift) >> shift;
1675 }
1676
1677 /**
1678  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1679  * @statistics: Provides the temperature reading from the uCode
1680  *
1681  * A return of <0 indicates bogus data in the statistics
1682  */
1683 static int iwl4965_hw_get_temperature(struct iwl_priv *priv)
1684 {
1685         s32 temperature;
1686         s32 vt;
1687         s32 R1, R2, R3;
1688         u32 R4;
1689
1690         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1691                 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1692                 IWL_DEBUG_TEMP(priv, "Running FAT temperature calibration\n");
1693                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1694                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1695                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1696                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1697         } else {
1698                 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
1699                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1700                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1701                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1702                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1703         }
1704
1705         /*
1706          * Temperature is only 23 bits, so sign extend out to 32.
1707          *
1708          * NOTE If we haven't received a statistics notification yet
1709          * with an updated temperature, use R4 provided to us in the
1710          * "initialize" ALIVE response.
1711          */
1712         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1713                 vt = sign_extend(R4, 23);
1714         else
1715                 vt = sign_extend(
1716                         le32_to_cpu(priv->statistics.general.temperature), 23);
1717
1718         IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1719
1720         if (R3 == R1) {
1721                 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
1722                 return -1;
1723         }
1724
1725         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1726          * Add offset to center the adjustment around 0 degrees Centigrade. */
1727         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1728         temperature /= (R3 - R1);
1729         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1730
1731         IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
1732                         temperature, KELVIN_TO_CELSIUS(temperature));
1733
1734         return temperature;
1735 }
1736
1737 /* Adjust Txpower only if temperature variance is greater than threshold. */
1738 #define IWL_TEMPERATURE_THRESHOLD   3
1739
1740 /**
1741  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1742  *
1743  * If the temperature changed has changed sufficiently, then a recalibration
1744  * is needed.
1745  *
1746  * Assumes caller will replace priv->last_temperature once calibration
1747  * executed.
1748  */
1749 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1750 {
1751         int temp_diff;
1752
1753         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1754                 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
1755                 return 0;
1756         }
1757
1758         temp_diff = priv->temperature - priv->last_temperature;
1759
1760         /* get absolute value */
1761         if (temp_diff < 0) {
1762                 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d, \n", temp_diff);
1763                 temp_diff = -temp_diff;
1764         } else if (temp_diff == 0)
1765                 IWL_DEBUG_POWER(priv, "Same temp, \n");
1766         else
1767                 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d, \n", temp_diff);
1768
1769         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1770                 IWL_DEBUG_POWER(priv, "Thermal txpower calib not needed\n");
1771                 return 0;
1772         }
1773
1774         IWL_DEBUG_POWER(priv, "Thermal txpower calib needed\n");
1775
1776         return 1;
1777 }
1778
1779 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1780 {
1781         s32 temp;
1782
1783         temp = iwl4965_hw_get_temperature(priv);
1784         if (temp < 0)
1785                 return;
1786
1787         if (priv->temperature != temp) {
1788                 if (priv->temperature)
1789                         IWL_DEBUG_TEMP(priv, "Temperature changed "
1790                                        "from %dC to %dC\n",
1791                                        KELVIN_TO_CELSIUS(priv->temperature),
1792                                        KELVIN_TO_CELSIUS(temp));
1793                 else
1794                         IWL_DEBUG_TEMP(priv, "Temperature "
1795                                        "initialized to %dC\n",
1796                                        KELVIN_TO_CELSIUS(temp));
1797         }
1798
1799         priv->temperature = temp;
1800         iwl_tt_handler(priv);
1801         set_bit(STATUS_TEMPERATURE, &priv->status);
1802
1803         if (!priv->disable_tx_power_cal &&
1804              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1805              iwl4965_is_temp_calib_needed(priv))
1806                 queue_work(priv->workqueue, &priv->txpower_work);
1807 }
1808
1809 /**
1810  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1811  */
1812 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1813                                             u16 txq_id)
1814 {
1815         /* Simply stop the queue, but don't change any configuration;
1816          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1817         iwl_write_prph(priv,
1818                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1819                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1820                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1821 }
1822
1823 /**
1824  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1825  * priv->lock must be held by the caller
1826  */
1827 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1828                                    u16 ssn_idx, u8 tx_fifo)
1829 {
1830         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1831             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1832                 IWL_WARN(priv,
1833                         "queue number out of range: %d, must be %d to %d\n",
1834                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1835                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1836                 return -EINVAL;
1837         }
1838
1839         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1840
1841         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1842
1843         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1844         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1845         /* supposes that ssn_idx is valid (!= 0xFFF) */
1846         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1847
1848         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1849         iwl_txq_ctx_deactivate(priv, txq_id);
1850         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1851
1852         return 0;
1853 }
1854
1855 /**
1856  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1857  */
1858 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1859                                         u16 txq_id)
1860 {
1861         u32 tbl_dw_addr;
1862         u32 tbl_dw;
1863         u16 scd_q2ratid;
1864
1865         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1866
1867         tbl_dw_addr = priv->scd_base_addr +
1868                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1869
1870         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1871
1872         if (txq_id & 0x1)
1873                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1874         else
1875                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1876
1877         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1878
1879         return 0;
1880 }
1881
1882
1883 /**
1884  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1885  *
1886  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1887  *        i.e. it must be one of the higher queues used for aggregation
1888  */
1889 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1890                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1891 {
1892         unsigned long flags;
1893         u16 ra_tid;
1894
1895         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1896             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1897                 IWL_WARN(priv,
1898                         "queue number out of range: %d, must be %d to %d\n",
1899                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1900                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1901                 return -EINVAL;
1902         }
1903
1904         ra_tid = BUILD_RAxTID(sta_id, tid);
1905
1906         /* Modify device's station table to Tx this TID */
1907         iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1908
1909         spin_lock_irqsave(&priv->lock, flags);
1910
1911         /* Stop this Tx queue before configuring it */
1912         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1913
1914         /* Map receiver-address / traffic-ID to this queue */
1915         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1916
1917         /* Set this queue as a chain-building queue */
1918         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1919
1920         /* Place first TFD at index corresponding to start sequence number.
1921          * Assumes that ssn_idx is valid (!= 0xFFF) */
1922         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1923         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1924         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1925
1926         /* Set up Tx window size and frame limit for this queue */
1927         iwl_write_targ_mem(priv,
1928                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1929                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1930                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1931
1932         iwl_write_targ_mem(priv, priv->scd_base_addr +
1933                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1934                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1935                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1936
1937         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1938
1939         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1940         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1941
1942         spin_unlock_irqrestore(&priv->lock, flags);
1943
1944         return 0;
1945 }
1946
1947
1948 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1949 {
1950         switch (cmd_id) {
1951         case REPLY_RXON:
1952                 return (u16) sizeof(struct iwl4965_rxon_cmd);
1953         default:
1954                 return len;
1955         }
1956 }
1957
1958 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1959 {
1960         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1961         addsta->mode = cmd->mode;
1962         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1963         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1964         addsta->station_flags = cmd->station_flags;
1965         addsta->station_flags_msk = cmd->station_flags_msk;
1966         addsta->tid_disable_tx = cmd->tid_disable_tx;
1967         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1968         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1969         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1970         addsta->reserved1 = cpu_to_le16(0);
1971         addsta->reserved2 = cpu_to_le32(0);
1972
1973         return (u16)sizeof(struct iwl4965_addsta_cmd);
1974 }
1975
1976 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1977 {
1978         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1979 }
1980
1981 /**
1982  * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1983  */
1984 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1985                                       struct iwl_ht_agg *agg,
1986                                       struct iwl4965_tx_resp *tx_resp,
1987                                       int txq_id, u16 start_idx)
1988 {
1989         u16 status;
1990         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1991         struct ieee80211_tx_info *info = NULL;
1992         struct ieee80211_hdr *hdr = NULL;
1993         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1994         int i, sh, idx;
1995         u16 seq;
1996         if (agg->wait_for_ba)
1997                 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
1998
1999         agg->frame_count = tx_resp->frame_count;
2000         agg->start_idx = start_idx;
2001         agg->rate_n_flags = rate_n_flags;
2002         agg->bitmap = 0;
2003
2004         /* num frames attempted by Tx command */
2005         if (agg->frame_count == 1) {
2006                 /* Only one frame was attempted; no block-ack will arrive */
2007                 status = le16_to_cpu(frame_status[0].status);
2008                 idx = start_idx;
2009
2010                 /* FIXME: code repetition */
2011                 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
2012                                    agg->frame_count, agg->start_idx, idx);
2013
2014                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
2015                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2016                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
2017                 info->flags |= iwl_is_tx_success(status) ?
2018                         IEEE80211_TX_STAT_ACK : 0;
2019                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
2020                 /* FIXME: code repetition end */
2021
2022                 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
2023                                     status & 0xff, tx_resp->failure_frame);
2024                 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
2025
2026                 agg->wait_for_ba = 0;
2027         } else {
2028                 /* Two or more frames were attempted; expect block-ack */
2029                 u64 bitmap = 0;
2030                 int start = agg->start_idx;
2031
2032                 /* Construct bit-map of pending frames within Tx window */
2033                 for (i = 0; i < agg->frame_count; i++) {
2034                         u16 sc;
2035                         status = le16_to_cpu(frame_status[i].status);
2036                         seq  = le16_to_cpu(frame_status[i].sequence);
2037                         idx = SEQ_TO_INDEX(seq);
2038                         txq_id = SEQ_TO_QUEUE(seq);
2039
2040                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2041                                       AGG_TX_STATE_ABORT_MSK))
2042                                 continue;
2043
2044                         IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
2045                                            agg->frame_count, txq_id, idx);
2046
2047                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2048
2049                         sc = le16_to_cpu(hdr->seq_ctrl);
2050                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2051                                 IWL_ERR(priv,
2052                                         "BUG_ON idx doesn't match seq control"
2053                                         " idx=%d, seq_idx=%d, seq=%d\n",
2054                                         idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
2055                                 return -1;
2056                         }
2057
2058                         IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
2059                                            i, idx, SEQ_TO_SN(sc));
2060
2061                         sh = idx - start;
2062                         if (sh > 64) {
2063                                 sh = (start - idx) + 0xff;
2064                                 bitmap = bitmap << sh;
2065                                 sh = 0;
2066                                 start = idx;
2067                         } else if (sh < -64)
2068                                 sh  = 0xff - (start - idx);
2069                         else if (sh < 0) {
2070                                 sh = start - idx;
2071                                 start = idx;
2072                                 bitmap = bitmap << sh;
2073                                 sh = 0;
2074                         }
2075                         bitmap |= 1ULL << sh;
2076                         IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
2077                                            start, (unsigned long long)bitmap);
2078                 }
2079
2080                 agg->bitmap = bitmap;
2081                 agg->start_idx = start;
2082                 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
2083                                    agg->frame_count, agg->start_idx,
2084                                    (unsigned long long)agg->bitmap);
2085
2086                 if (bitmap)
2087                         agg->wait_for_ba = 1;
2088         }
2089         return 0;
2090 }
2091
2092 /**
2093  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2094  */
2095 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2096                                 struct iwl_rx_mem_buffer *rxb)
2097 {
2098         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2099         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2100         int txq_id = SEQ_TO_QUEUE(sequence);
2101         int index = SEQ_TO_INDEX(sequence);
2102         struct iwl_tx_queue *txq = &priv->txq[txq_id];
2103         struct ieee80211_hdr *hdr;
2104         struct ieee80211_tx_info *info;
2105         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2106         u32  status = le32_to_cpu(tx_resp->u.status);
2107         int tid = MAX_TID_COUNT;
2108         int sta_id;
2109         int freed;
2110         u8 *qc = NULL;
2111
2112         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2113                 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
2114                           "is out of range [0-%d] %d %d\n", txq_id,
2115                           index, txq->q.n_bd, txq->q.write_ptr,
2116                           txq->q.read_ptr);
2117                 return;
2118         }
2119
2120         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2121         memset(&info->status, 0, sizeof(info->status));
2122
2123         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2124         if (ieee80211_is_data_qos(hdr->frame_control)) {
2125                 qc = ieee80211_get_qos_ctl(hdr);
2126                 tid = qc[0] & 0xf;
2127         }
2128
2129         sta_id = iwl_get_ra_sta_id(priv, hdr);
2130         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2131                 IWL_ERR(priv, "Station not known\n");
2132                 return;
2133         }
2134
2135         if (txq->sched_retry) {
2136                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2137                 struct iwl_ht_agg *agg = NULL;
2138
2139                 WARN_ON(!qc);
2140
2141                 agg = &priv->stations[sta_id].tid[tid].agg;
2142
2143                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2144
2145                 /* check if BAR is needed */
2146                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2147                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2148
2149                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2150                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2151                         IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2152                                            "%d index %d\n", scd_ssn , index);
2153                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2154                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2155
2156                         if (priv->mac80211_registered &&
2157                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2158                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2159                                 if (agg->state == IWL_AGG_OFF)
2160                                         iwl_wake_queue(priv, txq_id);
2161                                 else
2162                                         iwl_wake_queue(priv, txq->swq_id);
2163                         }
2164                 }
2165         } else {
2166                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2167                 info->flags |= iwl_is_tx_success(status) ?
2168                                         IEEE80211_TX_STAT_ACK : 0;
2169                 iwl_hwrate_to_tx_control(priv,
2170                                         le32_to_cpu(tx_resp->rate_n_flags),
2171                                         info);
2172
2173                 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
2174                                    "rate_n_flags 0x%x retries %d\n",
2175                                    txq_id,
2176                                    iwl_get_tx_fail_reason(status), status,
2177                                    le32_to_cpu(tx_resp->rate_n_flags),
2178                                    tx_resp->failure_frame);
2179
2180                 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2181                 if (qc && likely(sta_id != IWL_INVALID_STATION))
2182                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2183
2184                 if (priv->mac80211_registered &&
2185                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
2186                         iwl_wake_queue(priv, txq_id);
2187         }
2188
2189         if (qc && likely(sta_id != IWL_INVALID_STATION))
2190                 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2191
2192         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2193                 IWL_ERR(priv, "TODO:  Implement Tx ABORT REQUIRED!!!\n");
2194 }
2195
2196 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2197                              struct iwl_rx_phy_res *rx_resp)
2198 {
2199         /* data from PHY/DSP regarding signal strength, etc.,
2200          *   contents are always there, not configurable by host.  */
2201         struct iwl4965_rx_non_cfg_phy *ncphy =
2202             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2203         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2204                         >> IWL49_AGC_DB_POS;
2205
2206         u32 valid_antennae =
2207             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2208                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2209         u8 max_rssi = 0;
2210         u32 i;
2211
2212         /* Find max rssi among 3 possible receivers.
2213          * These values are measured by the digital signal processor (DSP).
2214          * They should stay fairly constant even as the signal strength varies,
2215          *   if the radio's automatic gain control (AGC) is working right.
2216          * AGC value (see below) will provide the "interesting" info. */
2217         for (i = 0; i < 3; i++)
2218                 if (valid_antennae & (1 << i))
2219                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2220
2221         IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2222                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2223                 max_rssi, agc);
2224
2225         /* dBm = max_rssi dB - agc dB - constant.
2226          * Higher AGC (higher radio gain) means lower signal. */
2227         return max_rssi - agc - IWL49_RSSI_OFFSET;
2228 }
2229
2230
2231 /* Set up 4965-specific Rx frame reply handlers */
2232 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2233 {
2234         /* Legacy Rx frames */
2235         priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2236         /* Tx response */
2237         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2238 }
2239
2240 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2241 {
2242         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2243 }
2244
2245 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2246 {
2247         cancel_work_sync(&priv->txpower_work);
2248 }
2249
2250 #define IWL4965_UCODE_GET(item)                                         \
2251 static u32 iwl4965_ucode_get_##item(const struct iwl_ucode_header *ucode,\
2252                                     u32 api_ver)                        \
2253 {                                                                       \
2254         return le32_to_cpu(ucode->u.v1.item);                           \
2255 }
2256
2257 static u32 iwl4965_ucode_get_header_size(u32 api_ver)
2258 {
2259         return UCODE_HEADER_SIZE(1);
2260 }
2261 static u32 iwl4965_ucode_get_build(const struct iwl_ucode_header *ucode,
2262                                    u32 api_ver)
2263 {
2264         return 0;
2265 }
2266 static u8 *iwl4965_ucode_get_data(const struct iwl_ucode_header *ucode,
2267                                   u32 api_ver)
2268 {
2269         return (u8 *) ucode->u.v1.data;
2270 }
2271
2272 IWL4965_UCODE_GET(inst_size);
2273 IWL4965_UCODE_GET(data_size);
2274 IWL4965_UCODE_GET(init_size);
2275 IWL4965_UCODE_GET(init_data_size);
2276 IWL4965_UCODE_GET(boot_size);
2277
2278 static struct iwl_hcmd_ops iwl4965_hcmd = {
2279         .rxon_assoc = iwl4965_send_rxon_assoc,
2280         .commit_rxon = iwl_commit_rxon,
2281         .set_rxon_chain = iwl_set_rxon_chain,
2282 };
2283
2284 static struct iwl_ucode_ops iwl4965_ucode = {
2285         .get_header_size = iwl4965_ucode_get_header_size,
2286         .get_build = iwl4965_ucode_get_build,
2287         .get_inst_size = iwl4965_ucode_get_inst_size,
2288         .get_data_size = iwl4965_ucode_get_data_size,
2289         .get_init_size = iwl4965_ucode_get_init_size,
2290         .get_init_data_size = iwl4965_ucode_get_init_data_size,
2291         .get_boot_size = iwl4965_ucode_get_boot_size,
2292         .get_data = iwl4965_ucode_get_data,
2293 };
2294 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2295         .get_hcmd_size = iwl4965_get_hcmd_size,
2296         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2297         .chain_noise_reset = iwl4965_chain_noise_reset,
2298         .gain_computation = iwl4965_gain_computation,
2299         .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
2300         .calc_rssi = iwl4965_calc_rssi,
2301 };
2302
2303 static struct iwl_lib_ops iwl4965_lib = {
2304         .set_hw_params = iwl4965_hw_set_hw_params,
2305         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2306         .txq_set_sched = iwl4965_txq_set_sched,
2307         .txq_agg_enable = iwl4965_txq_agg_enable,
2308         .txq_agg_disable = iwl4965_txq_agg_disable,
2309         .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2310         .txq_free_tfd = iwl_hw_txq_free_tfd,
2311         .txq_init = iwl_hw_tx_queue_init,
2312         .rx_handler_setup = iwl4965_rx_handler_setup,
2313         .setup_deferred_work = iwl4965_setup_deferred_work,
2314         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2315         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2316         .alive_notify = iwl4965_alive_notify,
2317         .init_alive_start = iwl4965_init_alive_start,
2318         .load_ucode = iwl4965_load_bsm,
2319         .apm_ops = {
2320                 .init = iwl4965_apm_init,
2321                 .reset = iwl4965_apm_reset,
2322                 .stop = iwl4965_apm_stop,
2323                 .config = iwl4965_nic_config,
2324                 .set_pwr_src = iwl_set_pwr_src,
2325         },
2326         .eeprom_ops = {
2327                 .regulatory_bands = {
2328                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2329                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2330                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2331                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2332                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2333                         EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
2334                         EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2335                 },
2336                 .verify_signature  = iwlcore_eeprom_verify_signature,
2337                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2338                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2339                 .calib_version = iwl4965_eeprom_calib_version,
2340                 .query_addr = iwlcore_eeprom_query_addr,
2341         },
2342         .send_tx_power  = iwl4965_send_tx_power,
2343         .update_chain_flags = iwl_update_chain_flags,
2344         .post_associate = iwl_post_associate,
2345         .config_ap = iwl_config_ap,
2346         .isr = iwl_isr_legacy,
2347         .temp_ops = {
2348                 .temperature = iwl4965_temperature_calib,
2349                 .set_ct_kill = iwl4965_set_ct_threshold,
2350         },
2351 };
2352
2353 static struct iwl_ops iwl4965_ops = {
2354         .ucode = &iwl4965_ucode,
2355         .lib = &iwl4965_lib,
2356         .hcmd = &iwl4965_hcmd,
2357         .utils = &iwl4965_hcmd_utils,
2358 };
2359
2360 struct iwl_cfg iwl4965_agn_cfg = {
2361         .name = "4965AGN",
2362         .fw_name_pre = IWL4965_FW_PRE,
2363         .ucode_api_max = IWL4965_UCODE_API_MAX,
2364         .ucode_api_min = IWL4965_UCODE_API_MIN,
2365         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2366         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2367         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2368         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2369         .ops = &iwl4965_ops,
2370         .mod_params = &iwl4965_mod_params,
2371         .use_isr_legacy = true
2372 };
2373
2374 /* Module firmware */
2375 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2376
2377 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
2378 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2379 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
2380 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2381 module_param_named(
2382         disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
2383 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2384
2385 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
2386 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2387 /* 11n */
2388 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, 0444);
2389 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2390 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
2391 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2392
2393 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
2394 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");