drivers/net/wireless/iwlegacy/iwl4965-base.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31
  32 #include <linux/kernel.h>
  33 #include <linux/module.h>
  34 #include <linux/init.h>
  35 #include <linux/pci.h>
  36 #include <linux/pci-aspm.h>
  37 #include <linux/slab.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/delay.h>
  40 #include <linux/sched.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/netdevice.h>
  43 #include <linux/wireless.h>
  44 #include <linux/firmware.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/if_arp.h>
  47
  48 #include <net/mac80211.h>
  49
  50 #include <asm/div64.h>
  51
  52 #define DRV_NAME        "iwl4965"
  53
  54 #include "iwl-eeprom.h"
  55 #include "iwl-dev.h"
  56 #include "iwl-core.h"
  57 #include "iwl-io.h"
  58 #include "iwl-helpers.h"
  59 #include "iwl-sta.h"
  60 #include "iwl-4965-calib.h"
  61 #include "iwl-4965.h"
  62 #include "iwl-4965-led.h"
  63
  64
  65 /******************************************************************************
  66  *
  67  * module boiler plate
  68  *
  69  ******************************************************************************/
  70
  71 /*
  72  * module name, copyright, version, etc.
  73  */
  74 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi 4965 driver for Linux"
  75
  76 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
  77 #define VD "d"
  78 #else
  79 #define VD
  80 #endif
  81
  82 #define DRV_VERSION     IWLWIFI_VERSION VD
  83
  84
  85 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  86 MODULE_VERSION(DRV_VERSION);
  87 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  88 MODULE_LICENSE("GPL");
  89 MODULE_ALIAS("iwl4965");
  90
  91 void iwl4965_update_chain_flags(struct iwl_priv *priv)
  92 {
  93         struct iwl_rxon_context *ctx;
  94
  95         if (priv->cfg->ops->hcmd->set_rxon_chain) {
  96                 for_each_context(priv, ctx) {
  97                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  98                         if (ctx->active.rx_chain != ctx->staging.rx_chain)
  99                                 iwl_legacy_commit_rxon(priv, ctx);
 100                 }
 101         }
 102 }
 103
 104 static void iwl4965_clear_free_frames(struct iwl_priv *priv)
 105 {
 106         struct list_head *element;
 107
 108         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 109                        priv->frames_count);
 110
 111         while (!list_empty(&priv->free_frames)) {
 112                 element = priv->free_frames.next;
 113                 list_del(element);
 114                 kfree(list_entry(element, struct iwl_frame, list));
 115                 priv->frames_count--;
 116         }
 117
 118         if (priv->frames_count) {
 119                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 120                             priv->frames_count);
 121                 priv->frames_count = 0;
 122         }
 123 }
 124
 125 static struct iwl_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
 126 {
 127         struct iwl_frame *frame;
 128         struct list_head *element;
 129         if (list_empty(&priv->free_frames)) {
 130                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 131                 if (!frame) {
 132                         IWL_ERR(priv, "Could not allocate frame!\n");
 133                         return NULL;
 134                 }
 135
 136                 priv->frames_count++;
 137                 return frame;
 138         }
 139
 140         element = priv->free_frames.next;
 141         list_del(element);
 142         return list_entry(element, struct iwl_frame, list);
 143 }
 144
 145 static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 146 {
 147         memset(frame, 0, sizeof(*frame));
 148         list_add(&frame->list, &priv->free_frames);
 149 }
 150
 151 static u32 iwl4965_fill_beacon_frame(struct iwl_priv *priv,
 152                                  struct ieee80211_hdr *hdr,
 153                                  int left)
 154 {
 155         lockdep_assert_held(&priv->mutex);
 156
 157         if (!priv->beacon_skb)
 158                 return 0;
 159
 160         if (priv->beacon_skb->len > left)
 161                 return 0;
 162
 163         memcpy(hdr, priv->beacon_skb->data, priv->beacon_skb->len);
 164
 165         return priv->beacon_skb->len;
 166 }
 167
 168 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 169 static void iwl4965_set_beacon_tim(struct iwl_priv *priv,
 170                                struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 171                                u8 *beacon, u32 frame_size)
 172 {
 173         u16 tim_idx;
 174         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 175
 176         /*
 177          * The index is relative to frame start but we start looking at the
 178          * variable-length part of the beacon.
 179          */
 180         tim_idx = mgmt->u.beacon.variable - beacon;
 181
 182         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 183         while ((tim_idx < (frame_size - 2)) &&
 184                         (beacon[tim_idx] != WLAN_EID_TIM))
 185                 tim_idx += beacon[tim_idx+1] + 2;
 186
 187         /* If TIM field was found, set variables */
 188         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 189                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 190                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 191         } else
 192                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 193 }
 194
 195 static unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
 196                                        struct iwl_frame *frame)
 197 {
 198         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 199         u32 frame_size;
 200         u32 rate_flags;
 201         u32 rate;
 202         /*
 203          * We have to set up the TX command, the TX Beacon command, and the
 204          * beacon contents.
 205          */
 206
 207         lockdep_assert_held(&priv->mutex);
 208
 209         if (!priv->beacon_ctx) {
 210                 IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
 211                 return 0;
 212         }
 213
 214         /* Initialize memory */
 215         tx_beacon_cmd = &frame->u.beacon;
 216         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 217
 218         /* Set up TX beacon contents */
 219         frame_size = iwl4965_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 220                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 221         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 222                 return 0;
 223         if (!frame_size)
 224                 return 0;
 225
 226         /* Set up TX command fields */
 227         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 228         tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
 229         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 230         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 231                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 232
 233         /* Set up TX beacon command fields */
 234         iwl4965_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 235                            frame_size);
 236
 237         /* Set up packet rate and flags */
 238         rate = iwl_legacy_get_lowest_plcp(priv, priv->beacon_ctx);
 239         priv->mgmt_tx_ant = iwl4965_toggle_tx_ant(priv, priv->mgmt_tx_ant,
 240                                               priv->hw_params.valid_tx_ant);
 241         rate_flags = iwl4965_ant_idx_to_flags(priv->mgmt_tx_ant);
 242         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 243                 rate_flags |= RATE_MCS_CCK_MSK;
 244         tx_beacon_cmd->tx.rate_n_flags = iwl4965_hw_set_rate_n_flags(rate,
 245                         rate_flags);
 246
 247         return sizeof(*tx_beacon_cmd) + frame_size;
 248 }
 249
 250 int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
 251 {
 252         struct iwl_frame *frame;
 253         unsigned int frame_size;
 254         int rc;
 255
 256         frame = iwl4965_get_free_frame(priv);
 257         if (!frame) {
 258                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 259                           "command.\n");
 260                 return -ENOMEM;
 261         }
 262
 263         frame_size = iwl4965_hw_get_beacon_cmd(priv, frame);
 264         if (!frame_size) {
 265                 IWL_ERR(priv, "Error configuring the beacon command\n");
 266                 iwl4965_free_frame(priv, frame);
 267                 return -EINVAL;
 268         }
 269
 270         rc = iwl_legacy_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 271                               &frame->u.cmd[0]);
 272
 273         iwl4965_free_frame(priv, frame);
 274
 275         return rc;
 276 }
 277
 278 static inline dma_addr_t iwl4965_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 279 {
 280         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 281
 282         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 283         if (sizeof(dma_addr_t) > sizeof(u32))
 284                 addr |=
 285                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 286
 287         return addr;
 288 }
 289
 290 static inline u16 iwl4965_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 291 {
 292         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 293
 294         return le16_to_cpu(tb->hi_n_len) >> 4;
 295 }
 296
 297 static inline void iwl4965_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 298                                   dma_addr_t addr, u16 len)
 299 {
 300         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 301         u16 hi_n_len = len << 4;
 302
 303         put_unaligned_le32(addr, &tb->lo);
 304         if (sizeof(dma_addr_t) > sizeof(u32))
 305                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 306
 307         tb->hi_n_len = cpu_to_le16(hi_n_len);
 308
 309         tfd->num_tbs = idx + 1;
 310 }
 311
 312 static inline u8 iwl4965_tfd_get_num_tbs(struct iwl_tfd *tfd)
 313 {
 314         return tfd->num_tbs & 0x1f;
 315 }
 316
 317 /**
 318  * iwl4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 319  * @priv - driver private data
 320  * @txq - tx queue
 321  *
 322  * Does NOT advance any TFD circular buffer read/write indexes
 323  * Does NOT free the TFD itself (which is within circular buffer)
 324  */
 325 void iwl4965_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 326 {
 327         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 328         struct iwl_tfd *tfd;
 329         struct pci_dev *dev = priv->pci_dev;
 330         int index = txq->q.read_ptr;
 331         int i;
 332         int num_tbs;
 333
 334         tfd = &tfd_tmp[index];
 335
 336         /* Sanity check on number of chunks */
 337         num_tbs = iwl4965_tfd_get_num_tbs(tfd);
 338
 339         if (num_tbs >= IWL_NUM_OF_TBS) {
 340                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 341                 /* @todo issue fatal error, it is quite serious situation */
 342                 return;
 343         }
 344
 345         /* Unmap tx_cmd */
 346         if (num_tbs)
 347                 pci_unmap_single(dev,
 348                                 dma_unmap_addr(&txq->meta[index], mapping),
 349                                 dma_unmap_len(&txq->meta[index], len),
 350                                 PCI_DMA_BIDIRECTIONAL);
 351
 352         /* Unmap chunks, if any. */
 353         for (i = 1; i < num_tbs; i++)
 354                 pci_unmap_single(dev, iwl4965_tfd_tb_get_addr(tfd, i),
 355                                 iwl4965_tfd_tb_get_len(tfd, i),
 356                                 PCI_DMA_TODEVICE);
 357
 358         /* free SKB */
 359         if (txq->txb) {
 360                 struct sk_buff *skb;
 361
 362                 skb = txq->txb[txq->q.read_ptr].skb;
 363
 364                 /* can be called from irqs-disabled context */
 365                 if (skb) {
 366                         dev_kfree_skb_any(skb);
 367                         txq->txb[txq->q.read_ptr].skb = NULL;
 368                 }
 369         }
 370 }
 371
 372 int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 373                                  struct iwl_tx_queue *txq,
 374                                  dma_addr_t addr, u16 len,
 375                                  u8 reset, u8 pad)
 376 {
 377         struct iwl_queue *q;
 378         struct iwl_tfd *tfd, *tfd_tmp;
 379         u32 num_tbs;
 380
 381         q = &txq->q;
 382         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 383         tfd = &tfd_tmp[q->write_ptr];
 384
 385         if (reset)
 386                 memset(tfd, 0, sizeof(*tfd));
 387
 388         num_tbs = iwl4965_tfd_get_num_tbs(tfd);
 389
 390         /* Each TFD can point to a maximum 20 Tx buffers */
 391         if (num_tbs >= IWL_NUM_OF_TBS) {
 392                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 393                           IWL_NUM_OF_TBS);
 394                 return -EINVAL;
 395         }
 396
 397         BUG_ON(addr & ~DMA_BIT_MASK(36));
 398         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 399                 IWL_ERR(priv, "Unaligned address = %llx\n",
 400                           (unsigned long long)addr);
 401
 402         iwl4965_tfd_set_tb(tfd, num_tbs, addr, len);
 403
 404         return 0;
 405 }
 406
 407 /*
 408  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 409  * given Tx queue, and enable the DMA channel used for that queue.
 410  *
 411  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 412  * channels supported in hardware.
 413  */
 414 int iwl4965_hw_tx_queue_init(struct iwl_priv *priv,
 415                          struct iwl_tx_queue *txq)
 416 {
 417         int txq_id = txq->q.id;
 418
 419         /* Circular buffer (TFD queue in DRAM) physical base address */
 420         iwl_legacy_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 421                              txq->q.dma_addr >> 8);
 422
 423         return 0;
 424 }
 425
 426 /******************************************************************************
 427  *
 428  * Generic RX handler implementations
 429  *
 430  ******************************************************************************/
 431 static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
 432                                 struct iwl_rx_mem_buffer *rxb)
 433 {
 434         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 435         struct iwl_alive_resp *palive;
 436         struct delayed_work *pwork;
 437
 438         palive = &pkt->u.alive_frame;
 439
 440         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 441                        "0x%01X 0x%01X\n",
 442                        palive->is_valid, palive->ver_type,
 443                        palive->ver_subtype);
 444
 445         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 446                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 447                 memcpy(&priv->card_alive_init,
 448                        &pkt->u.alive_frame,
 449                        sizeof(struct iwl_init_alive_resp));
 450                 pwork = &priv->init_alive_start;
 451         } else {
 452                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 453                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 454                        sizeof(struct iwl_alive_resp));
 455                 pwork = &priv->alive_start;
 456         }
 457
 458         /* We delay the ALIVE response by 5ms to
 459          * give the HW RF Kill time to activate... */
 460         if (palive->is_valid == UCODE_VALID_OK)
 461                 queue_delayed_work(priv->workqueue, pwork,
 462                                    msecs_to_jiffies(5));
 463         else
 464                 IWL_WARN(priv, "uCode did not respond OK.\n");
 465 }
 466
 467 /**
 468  * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
 469  *
 470  * This callback is provided in order to send a statistics request.
 471  *
 472  * This timer function is continually reset to execute within
 473  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 474  * was received.  We need to ensure we receive the statistics in order
 475  * to update the temperature used for calibrating the TXPOWER.
 476  */
 477 static void iwl4965_bg_statistics_periodic(unsigned long data)
 478 {
 479         struct iwl_priv *priv = (struct iwl_priv *)data;
 480
 481         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 482                 return;
 483
 484         /* dont send host command if rf-kill is on */
 485         if (!iwl_legacy_is_ready_rf(priv))
 486                 return;
 487
 488         iwl_legacy_send_statistics_request(priv, CMD_ASYNC, false);
 489 }
 490
 491
 492 static void iwl4965_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 493                                         u32 start_idx, u32 num_events,
 494                                         u32 mode)
 495 {
 496         u32 i;
 497         u32 ptr;        /* SRAM byte address of log data */
 498         u32 ev, time, data; /* event log data */
 499         unsigned long reg_flags;
 500
 501         if (mode == 0)
 502                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 503         else
 504                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 505
 506         /* Make sure device is powered up for SRAM reads */
 507         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 508         if (iwl_grab_nic_access(priv)) {
 509                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 510                 return;
 511         }
 512
 513         /* Set starting address; reads will auto-increment */
 514         _iwl_legacy_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 515         rmb();
 516
 517         /*
 518          * "time" is actually "data" for mode 0 (no timestamp).
 519          * place event id # at far right for easier visual parsing.
 520          */
 521         for (i = 0; i < num_events; i++) {
 522                 ev = _iwl_legacy_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 523                 time = _iwl_legacy_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 524                 if (mode == 0) {
 525                         trace_iwlwifi_legacy_dev_ucode_cont_event(priv,
 526                                                         0, time, ev);
 527                 } else {
 528                         data = _iwl_legacy_read_direct32(priv,
 529                                                 HBUS_TARG_MEM_RDAT);
 530                         trace_iwlwifi_legacy_dev_ucode_cont_event(priv,
 531                                                 time, data, ev);
 532                 }
 533         }
 534         /* Allow device to power down */
 535         iwl_release_nic_access(priv);
 536         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 537 }
 538
 539 static void iwl4965_continuous_event_trace(struct iwl_priv *priv)
 540 {
 541         u32 capacity;   /* event log capacity in # entries */
 542         u32 base;       /* SRAM byte address of event log header */
 543         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 544         u32 num_wraps;  /* # times uCode wrapped to top of log */
 545         u32 next_entry; /* index of next entry to be written by uCode */
 546
 547         if (priv->ucode_type == UCODE_INIT)
 548                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 549         else
 550                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 551         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 552                 capacity = iwl_legacy_read_targ_mem(priv, base);
 553                 num_wraps = iwl_legacy_read_targ_mem(priv,
 554                                                 base + (2 * sizeof(u32)));
 555                 mode = iwl_legacy_read_targ_mem(priv, base + (1 * sizeof(u32)));
 556                 next_entry = iwl_legacy_read_targ_mem(priv,
 557                                                 base + (3 * sizeof(u32)));
 558         } else
 559                 return;
 560
 561         if (num_wraps == priv->event_log.num_wraps) {
 562                 iwl4965_print_cont_event_trace(priv,
 563                                        base, priv->event_log.next_entry,
 564                                        next_entry - priv->event_log.next_entry,
 565                                        mode);
 566                 priv->event_log.non_wraps_count++;
 567         } else {
 568                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 569                         priv->event_log.wraps_more_count++;
 570                 else
 571                         priv->event_log.wraps_once_count++;
 572                 trace_iwlwifi_legacy_dev_ucode_wrap_event(priv,
 573                                 num_wraps - priv->event_log.num_wraps,
 574                                 next_entry, priv->event_log.next_entry);
 575                 if (next_entry < priv->event_log.next_entry) {
 576                         iwl4965_print_cont_event_trace(priv, base,
 577                                priv->event_log.next_entry,
 578                                capacity - priv->event_log.next_entry,
 579                                mode);
 580
 581                         iwl4965_print_cont_event_trace(priv, base, 0,
 582                                 next_entry, mode);
 583                 } else {
 584                         iwl4965_print_cont_event_trace(priv, base,
 585                                next_entry, capacity - next_entry,
 586                                mode);
 587
 588                         iwl4965_print_cont_event_trace(priv, base, 0,
 589                                 next_entry, mode);
 590                 }
 591         }
 592         priv->event_log.num_wraps = num_wraps;
 593         priv->event_log.next_entry = next_entry;
 594 }
 595
 596 /**
 597  * iwl4965_bg_ucode_trace - Timer callback to log ucode event
 598  *
 599  * The timer is continually set to execute every
 600  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 601  * this function is to perform continuous uCode event logging operation
 602  * if enabled
 603  */
 604 static void iwl4965_bg_ucode_trace(unsigned long data)
 605 {
 606         struct iwl_priv *priv = (struct iwl_priv *)data;
 607
 608         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 609                 return;
 610
 611         if (priv->event_log.ucode_trace) {
 612                 iwl4965_continuous_event_trace(priv);
 613                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 614                 mod_timer(&priv->ucode_trace,
 615                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 616         }
 617 }
 618
 619 static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
 620                                 struct iwl_rx_mem_buffer *rxb)
 621 {
 622         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 623         struct iwl4965_beacon_notif *beacon =
 624                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 625 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
 626         u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 627
 628         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 629                 "tsf %d %d rate %d\n",
 630                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 631                 beacon->beacon_notify_hdr.failure_frame,
 632                 le32_to_cpu(beacon->ibss_mgr_status),
 633                 le32_to_cpu(beacon->high_tsf),
 634                 le32_to_cpu(beacon->low_tsf), rate);
 635 #endif
 636
 637         priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
 638 }
 639
 640 static void iwl4965_perform_ct_kill_task(struct iwl_priv *priv)
 641 {
 642         unsigned long flags;
 643
 644         IWL_DEBUG_POWER(priv, "Stop all queues\n");
 645
 646         if (priv->mac80211_registered)
 647                 ieee80211_stop_queues(priv->hw);
 648
 649         iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 650                         CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
 651         iwl_read32(priv, CSR_UCODE_DRV_GP1);
 652
 653         spin_lock_irqsave(&priv->reg_lock, flags);
 654         if (!iwl_grab_nic_access(priv))
 655                 iwl_release_nic_access(priv);
 656         spin_unlock_irqrestore(&priv->reg_lock, flags);
 657 }
 658
 659 /* Handle notification from uCode that card's power state is changing
 660  * due to software, hardware, or critical temperature RFKILL */
 661 static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
 662                                     struct iwl_rx_mem_buffer *rxb)
 663 {
 664         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 665         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 666         unsigned long status = priv->status;
 667
 668         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 669                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 670                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 671                           (flags & CT_CARD_DISABLED) ?
 672                           "Reached" : "Not reached");
 673
 674         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 675                      CT_CARD_DISABLED)) {
 676
 677                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 678                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 679
 680                 iwl_legacy_write_direct32(priv, HBUS_TARG_MBX_C,
 681                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 682
 683                 if (!(flags & RXON_CARD_DISABLED)) {
 684                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 685                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 686                         iwl_legacy_write_direct32(priv, HBUS_TARG_MBX_C,
 687                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 688                 }
 689         }
 690
 691         if (flags & CT_CARD_DISABLED)
 692                 iwl4965_perform_ct_kill_task(priv);
 693
 694         if (flags & HW_CARD_DISABLED)
 695                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 696         else
 697                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 698
 699         if (!(flags & RXON_CARD_DISABLED))
 700                 iwl_legacy_scan_cancel(priv);
 701
 702         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 703              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 704                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 705                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 706         else
 707                 wake_up_interruptible(&priv->wait_command_queue);
 708 }
 709
 710 /**
 711  * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
 712  *
 713  * Setup the RX handlers for each of the reply types sent from the uCode
 714  * to the host.
 715  *
 716  * This function chains into the hardware specific files for them to setup
 717  * any hardware specific handlers as well.
 718  */
 719 static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
 720 {
 721         priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
 722         priv->rx_handlers[REPLY_ERROR] = iwl_legacy_rx_reply_error;
 723         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_legacy_rx_csa;
 724         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 725                         iwl_legacy_rx_spectrum_measure_notif;
 726         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_legacy_rx_pm_sleep_notif;
 727         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 728             iwl_legacy_rx_pm_debug_statistics_notif;
 729         priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
 730
 731         /*
 732          * The same handler is used for both the REPLY to a discrete
 733          * statistics request from the host as well as for the periodic
 734          * statistics notifications (after received beacons) from the uCode.
 735          */
 736         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_reply_statistics;
 737         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_rx_statistics;
 738
 739         iwl_legacy_setup_rx_scan_handlers(priv);
 740
 741         /* status change handler */
 742         priv->rx_handlers[CARD_STATE_NOTIFICATION] =
 743                                         iwl4965_rx_card_state_notif;
 744
 745         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 746             iwl4965_rx_missed_beacon_notif;
 747         /* Rx handlers */
 748         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
 749         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
 750         /* block ack */
 751         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
 752         /* Set up hardware specific Rx handlers */
 753         priv->cfg->ops->lib->rx_handler_setup(priv);
 754 }
 755
 756 /**
 757  * iwl4965_rx_handle - Main entry function for receiving responses from uCode
 758  *
 759  * Uses the priv->rx_handlers callback function array to invoke
 760  * the appropriate handlers, including command responses,
 761  * frame-received notifications, and other notifications.
 762  */
 763 void iwl4965_rx_handle(struct iwl_priv *priv)
 764 {
 765         struct iwl_rx_mem_buffer *rxb;
 766         struct iwl_rx_packet *pkt;
 767         struct iwl_rx_queue *rxq = &priv->rxq;
 768         u32 r, i;
 769         int reclaim;
 770         unsigned long flags;
 771         u8 fill_rx = 0;
 772         u32 count = 8;
 773         int total_empty;
 774
 775         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 776          * buffer that the driver may process (last buffer filled by ucode). */
 777         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 778         i = rxq->read;
 779
 780         /* Rx interrupt, but nothing sent from uCode */
 781         if (i == r)
 782                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 783
 784         /* calculate total frames need to be restock after handling RX */
 785         total_empty = r - rxq->write_actual;
 786         if (total_empty < 0)
 787                 total_empty += RX_QUEUE_SIZE;
 788
 789         if (total_empty > (RX_QUEUE_SIZE / 2))
 790                 fill_rx = 1;
 791
 792         while (i != r) {
 793                 int len;
 794
 795                 rxb = rxq->queue[i];
 796
 797                 /* If an RXB doesn't have a Rx queue slot associated with it,
 798                  * then a bug has been introduced in the queue refilling
 799                  * routines -- catch it here */
 800                 BUG_ON(rxb == NULL);
 801
 802                 rxq->queue[i] = NULL;
 803
 804                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 805                                PAGE_SIZE << priv->hw_params.rx_page_order,
 806                                PCI_DMA_FROMDEVICE);
 807                 pkt = rxb_addr(rxb);
 808
 809                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 810                 len += sizeof(u32); /* account for status word */
 811                 trace_iwlwifi_legacy_dev_rx(priv, pkt, len);
 812
 813                 /* Reclaim a command buffer only if this packet is a response
 814                  *   to a (driver-originated) command.
 815                  * If the packet (e.g. Rx frame) originated from uCode,
 816                  *   there is no command buffer to reclaim.
 817                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 818                  *   but apparently a few don't get set; catch them here. */
 819                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 820                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 821                         (pkt->hdr.cmd != REPLY_RX) &&
 822                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 823                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 824                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 825                         (pkt->hdr.cmd != REPLY_TX);
 826
 827                 /* Based on type of command response or notification,
 828                  *   handle those that need handling via function in
 829                  *   rx_handlers table.  See iwl4965_setup_rx_handlers() */
 830                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 831                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 832                                 i, iwl_legacy_get_cmd_string(pkt->hdr.cmd),
 833                                 pkt->hdr.cmd);
 834                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 835                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 836                 } else {
 837                         /* No handling needed */
 838                         IWL_DEBUG_RX(priv,
 839                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 840                                 r, i, iwl_legacy_get_cmd_string(pkt->hdr.cmd),
 841                                 pkt->hdr.cmd);
 842                 }
 843
 844                 /*
 845                  * XXX: After here, we should always check rxb->page
 846                  * against NULL before touching it or its virtual
 847                  * memory (pkt). Because some rx_handler might have
 848                  * already taken or freed the pages.
 849                  */
 850
 851                 if (reclaim) {
 852                         /* Invoke any callbacks, transfer the buffer to caller,
 853                          * and fire off the (possibly) blocking iwl_legacy_send_cmd()
 854                          * as we reclaim the driver command queue */
 855                         if (rxb->page)
 856                                 iwl_legacy_tx_cmd_complete(priv, rxb);
 857                         else
 858                                 IWL_WARN(priv, "Claim null rxb?\n");
 859                 }
 860
 861                 /* Reuse the page if possible. For notification packets and
 862                  * SKBs that fail to Rx correctly, add them back into the
 863                  * rx_free list for reuse later. */
 864                 spin_lock_irqsave(&rxq->lock, flags);
 865                 if (rxb->page != NULL) {
 866                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
 867                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
 868                                 PCI_DMA_FROMDEVICE);
 869                         list_add_tail(&rxb->list, &rxq->rx_free);
 870                         rxq->free_count++;
 871                 } else
 872                         list_add_tail(&rxb->list, &rxq->rx_used);
 873
 874                 spin_unlock_irqrestore(&rxq->lock, flags);
 875
 876                 i = (i + 1) & RX_QUEUE_MASK;
 877                 /* If there are a lot of unused frames,
 878                  * restock the Rx queue so ucode wont assert. */
 879                 if (fill_rx) {
 880                         count++;
 881                         if (count >= 8) {
 882                                 rxq->read = i;
 883                                 iwl4965_rx_replenish_now(priv);
 884                                 count = 0;
 885                         }
 886                 }
 887         }
 888
 889         /* Backtrack one entry */
 890         rxq->read = i;
 891         if (fill_rx)
 892                 iwl4965_rx_replenish_now(priv);
 893         else
 894                 iwl4965_rx_queue_restock(priv);
 895 }
 896
 897 /* call this function to flush any scheduled tasklet */
 898 static inline void iwl4965_synchronize_irq(struct iwl_priv *priv)
 899 {
 900         /* wait to make sure we flush pending tasklet*/
 901         synchronize_irq(priv->pci_dev->irq);
 902         tasklet_kill(&priv->irq_tasklet);
 903 }
 904
 905 static void iwl4965_irq_tasklet(struct iwl_priv *priv)
 906 {
 907         u32 inta, handled = 0;
 908         u32 inta_fh;
 909         unsigned long flags;
 910         u32 i;
 911 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
 912         u32 inta_mask;
 913 #endif
 914
 915         spin_lock_irqsave(&priv->lock, flags);
 916
 917         /* Ack/clear/reset pending uCode interrupts.
 918          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
 919          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
 920         inta = iwl_read32(priv, CSR_INT);
 921         iwl_write32(priv, CSR_INT, inta);
 922
 923         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
 924          * Any new interrupts that happen after this, either while we're
 925          * in this tasklet, or later, will show up in next ISR/tasklet. */
 926         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
 927         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
 928
 929 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
 930         if (iwl_legacy_get_debug_level(priv) & IWL_DL_ISR) {
 931                 /* just for debug */
 932                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
 933                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
 934                               inta, inta_mask, inta_fh);
 935         }
 936 #endif
 937
 938         spin_unlock_irqrestore(&priv->lock, flags);
 939
 940         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
 941          * atomic, make sure that inta covers all the interrupts that
 942          * we've discovered, even if FH interrupt came in just after
 943          * reading CSR_INT. */
 944         if (inta_fh & CSR49_FH_INT_RX_MASK)
 945                 inta |= CSR_INT_BIT_FH_RX;
 946         if (inta_fh & CSR49_FH_INT_TX_MASK)
 947                 inta |= CSR_INT_BIT_FH_TX;
 948
 949         /* Now service all interrupt bits discovered above. */
 950         if (inta & CSR_INT_BIT_HW_ERR) {
 951                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
 952
 953                 /* Tell the device to stop sending interrupts */
 954                 iwl_legacy_disable_interrupts(priv);
 955
 956                 priv->isr_stats.hw++;
 957                 iwl_legacy_irq_handle_error(priv);
 958
 959                 handled |= CSR_INT_BIT_HW_ERR;
 960
 961                 return;
 962         }
 963
 964 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
 965         if (iwl_legacy_get_debug_level(priv) & (IWL_DL_ISR)) {
 966                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
 967                 if (inta & CSR_INT_BIT_SCD) {
 968                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
 969                                       "the frame/frames.\n");
 970                         priv->isr_stats.sch++;
 971                 }
 972
 973                 /* Alive notification via Rx interrupt will do the real work */
 974                 if (inta & CSR_INT_BIT_ALIVE) {
 975                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
 976                         priv->isr_stats.alive++;
 977                 }
 978         }
 979 #endif
 980         /* Safely ignore these bits for debug checks below */
 981         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
 982
 983         /* HW RF KILL switch toggled */
 984         if (inta & CSR_INT_BIT_RF_KILL) {
 985                 int hw_rf_kill = 0;
 986                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
 987                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
 988                         hw_rf_kill = 1;
 989
 990                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
 991                                 hw_rf_kill ? "disable radio" : "enable radio");
 992
 993                 priv->isr_stats.rfkill++;
 994
 995                 /* driver only loads ucode once setting the interface up.
 996                  * the driver allows loading the ucode even if the radio
 997                  * is killed. Hence update the killswitch state here. The
 998                  * rfkill handler will care about restarting if needed.
 999                  */
1000                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1001                         if (hw_rf_kill)
1002                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1003                         else
1004                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1005                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1006                 }
1007
1008                 handled |= CSR_INT_BIT_RF_KILL;
1009         }
1010
1011         /* Chip got too hot and stopped itself */
1012         if (inta & CSR_INT_BIT_CT_KILL) {
1013                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1014                 priv->isr_stats.ctkill++;
1015                 handled |= CSR_INT_BIT_CT_KILL;
1016         }
1017
1018         /* Error detected by uCode */
1019         if (inta & CSR_INT_BIT_SW_ERR) {
1020                 IWL_ERR(priv, "Microcode SW error detected. "
1021                         " Restarting 0x%X.\n", inta);
1022                 priv->isr_stats.sw++;
1023                 iwl_legacy_irq_handle_error(priv);
1024                 handled |= CSR_INT_BIT_SW_ERR;
1025         }
1026
1027         /*
1028          * uCode wakes up after power-down sleep.
1029          * Tell device about any new tx or host commands enqueued,
1030          * and about any Rx buffers made available while asleep.
1031          */
1032         if (inta & CSR_INT_BIT_WAKEUP) {
1033                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1034                 iwl_legacy_rx_queue_update_write_ptr(priv, &priv->rxq);
1035                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1036                         iwl_legacy_txq_update_write_ptr(priv, &priv->txq[i]);
1037                 priv->isr_stats.wakeup++;
1038                 handled |= CSR_INT_BIT_WAKEUP;
1039         }
1040
1041         /* All uCode command responses, including Tx command responses,
1042          * Rx "responses" (frame-received notification), and other
1043          * notifications from uCode come through here*/
1044         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1045                 iwl4965_rx_handle(priv);
1046                 priv->isr_stats.rx++;
1047                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1048         }
1049
1050         /* This "Tx" DMA channel is used only for loading uCode */
1051         if (inta & CSR_INT_BIT_FH_TX) {
1052                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1053                 priv->isr_stats.tx++;
1054                 handled |= CSR_INT_BIT_FH_TX;
1055                 /* Wake up uCode load routine, now that load is complete */
1056                 priv->ucode_write_complete = 1;
1057                 wake_up_interruptible(&priv->wait_command_queue);
1058         }
1059
1060         if (inta & ~handled) {
1061                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1062                 priv->isr_stats.unhandled++;
1063         }
1064
1065         if (inta & ~(priv->inta_mask)) {
1066                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1067                          inta & ~priv->inta_mask);
1068                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1069         }
1070
1071         /* Re-enable all interrupts */
1072         /* only Re-enable if disabled by irq */
1073         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1074                 iwl_legacy_enable_interrupts(priv);
1075         /* Re-enable RF_KILL if it occurred */
1076         else if (handled & CSR_INT_BIT_RF_KILL)
1077                 iwl_legacy_enable_rfkill_int(priv);
1078
1079 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1080         if (iwl_legacy_get_debug_level(priv) & (IWL_DL_ISR)) {
1081                 inta = iwl_read32(priv, CSR_INT);
1082                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1083                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1084                 IWL_DEBUG_ISR(priv,
1085                         "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1086                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1087         }
1088 #endif
1089 }
1090
1091 /*****************************************************************************
1092  *
1093  * sysfs attributes
1094  *
1095  *****************************************************************************/
1096
1097 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1098
1099 /*
1100  * The following adds a new attribute to the sysfs representation
1101  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1102  * used for controlling the debug level.
1103  *
1104  * See the level definitions in iwl for details.
1105  *
1106  * The debug_level being managed using sysfs below is a per device debug
1107  * level that is used instead of the global debug level if it (the per
1108  * device debug level) is set.
1109  */
1110 static ssize_t iwl4965_show_debug_level(struct device *d,
1111                                 struct device_attribute *attr, char *buf)
1112 {
1113         struct iwl_priv *priv = dev_get_drvdata(d);
1114         return sprintf(buf, "0x%08X\n", iwl_legacy_get_debug_level(priv));
1115 }
1116 static ssize_t iwl4965_store_debug_level(struct device *d,
1117                                 struct device_attribute *attr,
1118                                  const char *buf, size_t count)
1119 {
1120         struct iwl_priv *priv = dev_get_drvdata(d);
1121         unsigned long val;
1122         int ret;
1123
1124         ret = strict_strtoul(buf, 0, &val);
1125         if (ret)
1126                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1127         else {
1128                 priv->debug_level = val;
1129                 if (iwl_legacy_alloc_traffic_mem(priv))
1130                         IWL_ERR(priv,
1131                                 "Not enough memory to generate traffic log\n");
1132         }
1133         return strnlen(buf, count);
1134 }
1135
1136 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1137                         iwl4965_show_debug_level, iwl4965_store_debug_level);
1138
1139
1140 #endif /* CONFIG_IWLWIFI_LEGACY_DEBUG */
1141
1142
1143 static ssize_t iwl4965_show_temperature(struct device *d,
1144                                 struct device_attribute *attr, char *buf)
1145 {
1146         struct iwl_priv *priv = dev_get_drvdata(d);
1147
1148         if (!iwl_legacy_is_alive(priv))
1149                 return -EAGAIN;
1150
1151         return sprintf(buf, "%d\n", priv->temperature);
1152 }
1153
1154 static DEVICE_ATTR(temperature, S_IRUGO, iwl4965_show_temperature, NULL);
1155
1156 static ssize_t iwl4965_show_tx_power(struct device *d,
1157                              struct device_attribute *attr, char *buf)
1158 {
1159         struct iwl_priv *priv = dev_get_drvdata(d);
1160
1161         if (!iwl_legacy_is_ready_rf(priv))
1162                 return sprintf(buf, "off\n");
1163         else
1164                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1165 }
1166
1167 static ssize_t iwl4965_store_tx_power(struct device *d,
1168                               struct device_attribute *attr,
1169                               const char *buf, size_t count)
1170 {
1171         struct iwl_priv *priv = dev_get_drvdata(d);
1172         unsigned long val;
1173         int ret;
1174
1175         ret = strict_strtoul(buf, 10, &val);
1176         if (ret)
1177                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1178         else {
1179                 ret = iwl_legacy_set_tx_power(priv, val, false);
1180                 if (ret)
1181                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1182                                 ret);
1183                 else
1184                         ret = count;
1185         }
1186         return ret;
1187 }
1188
1189 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO,
1190                         iwl4965_show_tx_power, iwl4965_store_tx_power);
1191
1192 static struct attribute *iwl_sysfs_entries[] = {
1193         &dev_attr_temperature.attr,
1194         &dev_attr_tx_power.attr,
1195 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1196         &dev_attr_debug_level.attr,
1197 #endif
1198         NULL
1199 };
1200
1201 static struct attribute_group iwl_attribute_group = {
1202         .name = NULL,           /* put in device directory */
1203         .attrs = iwl_sysfs_entries,
1204 };
1205
1206 /******************************************************************************
1207  *
1208  * uCode download functions
1209  *
1210  ******************************************************************************/
1211
1212 static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
1213 {
1214         iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1215         iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1216         iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1217         iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1218         iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1219         iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1220 }
1221
1222 static void iwl4965_nic_start(struct iwl_priv *priv)
1223 {
1224         /* Remove all resets to allow NIC to operate */
1225         iwl_write32(priv, CSR_RESET, 0);
1226 }
1227
1228 static void iwl4965_ucode_callback(const struct firmware *ucode_raw,
1229                                         void *context);
1230 static int iwl4965_mac_setup_register(struct iwl_priv *priv,
1231                                                 u32 max_probe_length);
1232
1233 static int __must_check iwl4965_request_firmware(struct iwl_priv *priv, bool first)
1234 {
1235         const char *name_pre = priv->cfg->fw_name_pre;
1236         char tag[8];
1237
1238         if (first) {
1239                 priv->fw_index = priv->cfg->ucode_api_max;
1240                 sprintf(tag, "%d", priv->fw_index);
1241         } else {
1242                 priv->fw_index--;
1243                 sprintf(tag, "%d", priv->fw_index);
1244         }
1245
1246         if (priv->fw_index < priv->cfg->ucode_api_min) {
1247                 IWL_ERR(priv, "no suitable firmware found!\n");
1248                 return -ENOENT;
1249         }
1250
1251         sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1252
1253         IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1254                        priv->firmware_name);
1255
1256         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1257                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1258                                        iwl4965_ucode_callback);
1259 }
1260
1261 struct iwl4965_firmware_pieces {
1262         const void *inst, *data, *init, *init_data, *boot;
1263         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1264 };
1265
1266 static int iwl4965_load_firmware(struct iwl_priv *priv,
1267                                        const struct firmware *ucode_raw,
1268                                        struct iwl4965_firmware_pieces *pieces)
1269 {
1270         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1271         u32 api_ver, hdr_size;
1272         const u8 *src;
1273
1274         priv->ucode_ver = le32_to_cpu(ucode->ver);
1275         api_ver = IWL_UCODE_API(priv->ucode_ver);
1276
1277         switch (api_ver) {
1278         default:
1279         case 0:
1280         case 1:
1281         case 2:
1282                 hdr_size = 24;
1283                 if (ucode_raw->size < hdr_size) {
1284                         IWL_ERR(priv, "File size too small!\n");
1285                         return -EINVAL;
1286                 }
1287                 pieces->inst_size = le32_to_cpu(ucode->v1.inst_size);
1288                 pieces->data_size = le32_to_cpu(ucode->v1.data_size);
1289                 pieces->init_size = le32_to_cpu(ucode->v1.init_size);
1290                 pieces->init_data_size =
1291                                 le32_to_cpu(ucode->v1.init_data_size);
1292                 pieces->boot_size = le32_to_cpu(ucode->v1.boot_size);
1293                 src = ucode->v1.data;
1294                 break;
1295         }
1296
1297         /* Verify size of file vs. image size info in file's header */
1298         if (ucode_raw->size != hdr_size + pieces->inst_size +
1299                                 pieces->data_size + pieces->init_size +
1300                                 pieces->init_data_size + pieces->boot_size) {
1301
1302                 IWL_ERR(priv,
1303                         "uCode file size %d does not match expected size\n",
1304                         (int)ucode_raw->size);
1305                 return -EINVAL;
1306         }
1307
1308         pieces->inst = src;
1309         src += pieces->inst_size;
1310         pieces->data = src;
1311         src += pieces->data_size;
1312         pieces->init = src;
1313         src += pieces->init_size;
1314         pieces->init_data = src;
1315         src += pieces->init_data_size;
1316         pieces->boot = src;
1317         src += pieces->boot_size;
1318
1319         return 0;
1320 }
1321
1322 /**
1323  * iwl4965_ucode_callback - callback when firmware was loaded
1324  *
1325  * If loaded successfully, copies the firmware into buffers
1326  * for the card to fetch (via DMA).
1327  */
1328 static void
1329 iwl4965_ucode_callback(const struct firmware *ucode_raw, void *context)
1330 {
1331         struct iwl_priv *priv = context;
1332         struct iwl_ucode_header *ucode;
1333         int err;
1334         struct iwl4965_firmware_pieces pieces;
1335         const unsigned int api_max = priv->cfg->ucode_api_max;
1336         const unsigned int api_min = priv->cfg->ucode_api_min;
1337         u32 api_ver;
1338
1339         u32 max_probe_length = 200;
1340         u32 standard_phy_calibration_size =
1341                         IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE;
1342
1343         memset(&pieces, 0, sizeof(pieces));
1344
1345         if (!ucode_raw) {
1346                 if (priv->fw_index <= priv->cfg->ucode_api_max)
1347                         IWL_ERR(priv,
1348                                 "request for firmware file '%s' failed.\n",
1349                                 priv->firmware_name);
1350                 goto try_again;
1351         }
1352
1353         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1354                        priv->firmware_name, ucode_raw->size);
1355
1356         /* Make sure that we got at least the API version number */
1357         if (ucode_raw->size < 4) {
1358                 IWL_ERR(priv, "File size way too small!\n");
1359                 goto try_again;
1360         }
1361
1362         /* Data from ucode file:  header followed by uCode images */
1363         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1364
1365         err = iwl4965_load_firmware(priv, ucode_raw, &pieces);
1366
1367         if (err)
1368                 goto try_again;
1369
1370         api_ver = IWL_UCODE_API(priv->ucode_ver);
1371
1372         /*
1373          * api_ver should match the api version forming part of the
1374          * firmware filename ... but we don't check for that and only rely
1375          * on the API version read from firmware header from here on forward
1376          */
1377         if (api_ver < api_min || api_ver > api_max) {
1378                 IWL_ERR(priv,
1379                         "Driver unable to support your firmware API. "
1380                         "Driver supports v%u, firmware is v%u.\n",
1381                         api_max, api_ver);
1382                 goto try_again;
1383         }
1384
1385         if (api_ver != api_max)
1386                 IWL_ERR(priv,
1387                         "Firmware has old API version. Expected v%u, "
1388                         "got v%u. New firmware can be obtained "
1389                         "from http://www.intellinuxwireless.org.\n",
1390                         api_max, api_ver);
1391
1392         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1393                  IWL_UCODE_MAJOR(priv->ucode_ver),
1394                  IWL_UCODE_MINOR(priv->ucode_ver),
1395                  IWL_UCODE_API(priv->ucode_ver),
1396                  IWL_UCODE_SERIAL(priv->ucode_ver));
1397
1398         snprintf(priv->hw->wiphy->fw_version,
1399                  sizeof(priv->hw->wiphy->fw_version),
1400                  "%u.%u.%u.%u",
1401                  IWL_UCODE_MAJOR(priv->ucode_ver),
1402                  IWL_UCODE_MINOR(priv->ucode_ver),
1403                  IWL_UCODE_API(priv->ucode_ver),
1404                  IWL_UCODE_SERIAL(priv->ucode_ver));
1405
1406         /*
1407          * For any of the failures below (before allocating pci memory)
1408          * we will try to load a version with a smaller API -- maybe the
1409          * user just got a corrupted version of the latest API.
1410          */
1411
1412         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1413                        priv->ucode_ver);
1414         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
1415                        pieces.inst_size);
1416         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
1417                        pieces.data_size);
1418         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
1419                        pieces.init_size);
1420         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
1421                        pieces.init_data_size);
1422         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
1423                        pieces.boot_size);
1424
1425         /* Verify that uCode images will fit in card's SRAM */
1426         if (pieces.inst_size > priv->hw_params.max_inst_size) {
1427                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
1428                         pieces.inst_size);
1429                 goto try_again;
1430         }
1431
1432         if (pieces.data_size > priv->hw_params.max_data_size) {
1433                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
1434                         pieces.data_size);
1435                 goto try_again;
1436         }
1437
1438         if (pieces.init_size > priv->hw_params.max_inst_size) {
1439                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
1440                         pieces.init_size);
1441                 goto try_again;
1442         }
1443
1444         if (pieces.init_data_size > priv->hw_params.max_data_size) {
1445                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
1446                         pieces.init_data_size);
1447                 goto try_again;
1448         }
1449
1450         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
1451                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
1452                         pieces.boot_size);
1453                 goto try_again;
1454         }
1455
1456         /* Allocate ucode buffers for card's bus-master loading ... */
1457
1458         /* Runtime instructions and 2 copies of data:
1459          * 1) unmodified from disk
1460          * 2) backup cache for save/restore during power-downs */
1461         priv->ucode_code.len = pieces.inst_size;
1462         iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1463
1464         priv->ucode_data.len = pieces.data_size;
1465         iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1466
1467         priv->ucode_data_backup.len = pieces.data_size;
1468         iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1469
1470         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1471             !priv->ucode_data_backup.v_addr)
1472                 goto err_pci_alloc;
1473
1474         /* Initialization instructions and data */
1475         if (pieces.init_size && pieces.init_data_size) {
1476                 priv->ucode_init.len = pieces.init_size;
1477                 iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1478
1479                 priv->ucode_init_data.len = pieces.init_data_size;
1480                 iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1481
1482                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1483                         goto err_pci_alloc;
1484         }
1485
1486         /* Bootstrap (instructions only, no data) */
1487         if (pieces.boot_size) {
1488                 priv->ucode_boot.len = pieces.boot_size;
1489                 iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1490
1491                 if (!priv->ucode_boot.v_addr)
1492                         goto err_pci_alloc;
1493         }
1494
1495         /* Now that we can no longer fail, copy information */
1496
1497         priv->sta_key_max_num = STA_KEY_MAX_NUM;
1498
1499         /* Copy images into buffers for card's bus-master reads ... */
1500
1501         /* Runtime instructions (first block of data in file) */
1502         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
1503                         pieces.inst_size);
1504         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
1505
1506         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1507                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1508
1509         /*
1510          * Runtime data
1511          * NOTE:  Copy into backup buffer will be done in iwl_up()
1512          */
1513         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
1514                         pieces.data_size);
1515         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
1516         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
1517
1518         /* Initialization instructions */
1519         if (pieces.init_size) {
1520                 IWL_DEBUG_INFO(priv,
1521                                 "Copying (but not loading) init instr len %Zd\n",
1522                                 pieces.init_size);
1523                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
1524         }
1525
1526         /* Initialization data */
1527         if (pieces.init_data_size) {
1528                 IWL_DEBUG_INFO(priv,
1529                                 "Copying (but not loading) init data len %Zd\n",
1530                                pieces.init_data_size);
1531                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
1532                        pieces.init_data_size);
1533         }
1534
1535         /* Bootstrap instructions */
1536         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
1537                         pieces.boot_size);
1538         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
1539
1540         /*
1541          * figure out the offset of chain noise reset and gain commands
1542          * base on the size of standard phy calibration commands table size
1543          */
1544         priv->_4965.phy_calib_chain_noise_reset_cmd =
1545                 standard_phy_calibration_size;
1546         priv->_4965.phy_calib_chain_noise_gain_cmd =
1547                 standard_phy_calibration_size + 1;
1548
1549         /**************************************************
1550          * This is still part of probe() in a sense...
1551          *
1552          * 9. Setup and register with mac80211 and debugfs
1553          **************************************************/
1554         err = iwl4965_mac_setup_register(priv, max_probe_length);
1555         if (err)
1556                 goto out_unbind;
1557
1558         err = iwl_legacy_dbgfs_register(priv, DRV_NAME);
1559         if (err)
1560                 IWL_ERR(priv,
1561                 "failed to create debugfs files. Ignoring error: %d\n", err);
1562
1563         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
1564                                         &iwl_attribute_group);
1565         if (err) {
1566                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
1567                 goto out_unbind;
1568         }
1569
1570         /* We have our copies now, allow OS release its copies */
1571         release_firmware(ucode_raw);
1572         complete(&priv->_4965.firmware_loading_complete);
1573         return;
1574
1575  try_again:
1576         /* try next, if any */
1577         if (iwl4965_request_firmware(priv, false))
1578                 goto out_unbind;
1579         release_firmware(ucode_raw);
1580         return;
1581
1582  err_pci_alloc:
1583         IWL_ERR(priv, "failed to allocate pci memory\n");
1584         iwl4965_dealloc_ucode_pci(priv);
1585  out_unbind:
1586         complete(&priv->_4965.firmware_loading_complete);
1587         device_release_driver(&priv->pci_dev->dev);
1588         release_firmware(ucode_raw);
1589 }
1590
1591 static const char * const desc_lookup_text[] = {
1592         "OK",
1593         "FAIL",
1594         "BAD_PARAM",
1595         "BAD_CHECKSUM",
1596         "NMI_INTERRUPT_WDG",
1597         "SYSASSERT",
1598         "FATAL_ERROR",
1599         "BAD_COMMAND",
1600         "HW_ERROR_TUNE_LOCK",
1601         "HW_ERROR_TEMPERATURE",
1602         "ILLEGAL_CHAN_FREQ",
1603         "VCC_NOT_STABLE",
1604         "FH_ERROR",
1605         "NMI_INTERRUPT_HOST",
1606         "NMI_INTERRUPT_ACTION_PT",
1607         "NMI_INTERRUPT_UNKNOWN",
1608         "UCODE_VERSION_MISMATCH",
1609         "HW_ERROR_ABS_LOCK",
1610         "HW_ERROR_CAL_LOCK_FAIL",
1611         "NMI_INTERRUPT_INST_ACTION_PT",
1612         "NMI_INTERRUPT_DATA_ACTION_PT",
1613         "NMI_TRM_HW_ER",
1614         "NMI_INTERRUPT_TRM",
1615         "NMI_INTERRUPT_BREAK_POINT"
1616         "DEBUG_0",
1617         "DEBUG_1",
1618         "DEBUG_2",
1619         "DEBUG_3",
1620 };
1621
1622 static struct { char *name; u8 num; } advanced_lookup[] = {
1623         { "NMI_INTERRUPT_WDG", 0x34 },
1624         { "SYSASSERT", 0x35 },
1625         { "UCODE_VERSION_MISMATCH", 0x37 },
1626         { "BAD_COMMAND", 0x38 },
1627         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
1628         { "FATAL_ERROR", 0x3D },
1629         { "NMI_TRM_HW_ERR", 0x46 },
1630         { "NMI_INTERRUPT_TRM", 0x4C },
1631         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
1632         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
1633         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
1634         { "NMI_INTERRUPT_HOST", 0x66 },
1635         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
1636         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
1637         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
1638         { "ADVANCED_SYSASSERT", 0 },
1639 };
1640
1641 static const char *iwl4965_desc_lookup(u32 num)
1642 {
1643         int i;
1644         int max = ARRAY_SIZE(desc_lookup_text);
1645
1646         if (num < max)
1647                 return desc_lookup_text[num];
1648
1649         max = ARRAY_SIZE(advanced_lookup) - 1;
1650         for (i = 0; i < max; i++) {
1651                 if (advanced_lookup[i].num == num)
1652                         break;
1653         }
1654         return advanced_lookup[i].name;
1655 }
1656
1657 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1658 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1659
1660 void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
1661 {
1662         u32 data2, line;
1663         u32 desc, time, count, base, data1;
1664         u32 blink1, blink2, ilink1, ilink2;
1665         u32 pc, hcmd;
1666
1667         if (priv->ucode_type == UCODE_INIT) {
1668                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1669         } else {
1670                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1671         }
1672
1673         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1674                 IWL_ERR(priv,
1675                         "Not valid error log pointer 0x%08X for %s uCode\n",
1676                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1677                 return;
1678         }
1679
1680         count = iwl_legacy_read_targ_mem(priv, base);
1681
1682         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1683                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1684                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1685                         priv->status, count);
1686         }
1687
1688         desc = iwl_legacy_read_targ_mem(priv, base + 1 * sizeof(u32));
1689         priv->isr_stats.err_code = desc;
1690         pc = iwl_legacy_read_targ_mem(priv, base + 2 * sizeof(u32));
1691         blink1 = iwl_legacy_read_targ_mem(priv, base + 3 * sizeof(u32));
1692         blink2 = iwl_legacy_read_targ_mem(priv, base + 4 * sizeof(u32));
1693         ilink1 = iwl_legacy_read_targ_mem(priv, base + 5 * sizeof(u32));
1694         ilink2 = iwl_legacy_read_targ_mem(priv, base + 6 * sizeof(u32));
1695         data1 = iwl_legacy_read_targ_mem(priv, base + 7 * sizeof(u32));
1696         data2 = iwl_legacy_read_targ_mem(priv, base + 8 * sizeof(u32));
1697         line = iwl_legacy_read_targ_mem(priv, base + 9 * sizeof(u32));
1698         time = iwl_legacy_read_targ_mem(priv, base + 11 * sizeof(u32));
1699         hcmd = iwl_legacy_read_targ_mem(priv, base + 22 * sizeof(u32));
1700
1701         trace_iwlwifi_legacy_dev_ucode_error(priv, desc,
1702                                         time, data1, data2, line,
1703                                       blink1, blink2, ilink1, ilink2);
1704
1705         IWL_ERR(priv, "Desc                                  Time       "
1706                 "data1      data2      line\n");
1707         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
1708                 iwl4965_desc_lookup(desc), desc, time, data1, data2, line);
1709         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
1710         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
1711                 pc, blink1, blink2, ilink1, ilink2, hcmd);
1712 }
1713
1714 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1715
1716 /**
1717  * iwl4965_print_event_log - Dump error event log to syslog
1718  *
1719  */
1720 static int iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
1721                                u32 num_events, u32 mode,
1722                                int pos, char **buf, size_t bufsz)
1723 {
1724         u32 i;
1725         u32 base;       /* SRAM byte address of event log header */
1726         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1727         u32 ptr;        /* SRAM byte address of log data */
1728         u32 ev, time, data; /* event log data */
1729         unsigned long reg_flags;
1730
1731         if (num_events == 0)
1732                 return pos;
1733
1734         if (priv->ucode_type == UCODE_INIT) {
1735                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1736         } else {
1737                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1738         }
1739
1740         if (mode == 0)
1741                 event_size = 2 * sizeof(u32);
1742         else
1743                 event_size = 3 * sizeof(u32);
1744
1745         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1746
1747         /* Make sure device is powered up for SRAM reads */
1748         spin_lock_irqsave(&priv->reg_lock, reg_flags);
1749         iwl_grab_nic_access(priv);
1750
1751         /* Set starting address; reads will auto-increment */
1752         _iwl_legacy_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1753         rmb();
1754
1755         /* "time" is actually "data" for mode 0 (no timestamp).
1756         * place event id # at far right for easier visual parsing. */
1757         for (i = 0; i < num_events; i++) {
1758                 ev = _iwl_legacy_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1759                 time = _iwl_legacy_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1760                 if (mode == 0) {
1761                         /* data, ev */
1762                         if (bufsz) {
1763                                 pos += scnprintf(*buf + pos, bufsz - pos,
1764                                                 "EVT_LOG:0x%08x:%04u\n",
1765                                                 time, ev);
1766                         } else {
1767                                 trace_iwlwifi_legacy_dev_ucode_event(priv, 0,
1768                                         time, ev);
1769                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1770                                         time, ev);
1771                         }
1772                 } else {
1773                         data = _iwl_legacy_read_direct32(priv,
1774                                                 HBUS_TARG_MEM_RDAT);
1775                         if (bufsz) {
1776                                 pos += scnprintf(*buf + pos, bufsz - pos,
1777                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
1778                                                  time, data, ev);
1779                         } else {
1780                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1781                                         time, data, ev);
1782                                 trace_iwlwifi_legacy_dev_ucode_event(priv, time,
1783                                         data, ev);
1784                         }
1785                 }
1786         }
1787
1788         /* Allow device to power down */
1789         iwl_release_nic_access(priv);
1790         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1791         return pos;
1792 }
1793
1794 /**
1795  * iwl4965_print_last_event_logs - Dump the newest # of event log to syslog
1796  */
1797 static int iwl4965_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1798                                     u32 num_wraps, u32 next_entry,
1799                                     u32 size, u32 mode,
1800                                     int pos, char **buf, size_t bufsz)
1801 {
1802         /*
1803          * display the newest DEFAULT_LOG_ENTRIES entries
1804          * i.e the entries just before the next ont that uCode would fill.
1805          */
1806         if (num_wraps) {
1807                 if (next_entry < size) {
1808                         pos = iwl4965_print_event_log(priv,
1809                                                 capacity - (size - next_entry),
1810                                                 size - next_entry, mode,
1811                                                 pos, buf, bufsz);
1812                         pos = iwl4965_print_event_log(priv, 0,
1813                                                   next_entry, mode,
1814                                                   pos, buf, bufsz);
1815                 } else
1816                         pos = iwl4965_print_event_log(priv, next_entry - size,
1817                                                   size, mode, pos, buf, bufsz);
1818         } else {
1819                 if (next_entry < size) {
1820                         pos = iwl4965_print_event_log(priv, 0, next_entry,
1821                                                   mode, pos, buf, bufsz);
1822                 } else {
1823                         pos = iwl4965_print_event_log(priv, next_entry - size,
1824                                                   size, mode, pos, buf, bufsz);
1825                 }
1826         }
1827         return pos;
1828 }
1829
1830 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1831
1832 int iwl4965_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1833                             char **buf, bool display)
1834 {
1835         u32 base;       /* SRAM byte address of event log header */
1836         u32 capacity;   /* event log capacity in # entries */
1837         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1838         u32 num_wraps;  /* # times uCode wrapped to top of log */
1839         u32 next_entry; /* index of next entry to be written by uCode */
1840         u32 size;       /* # entries that we'll print */
1841         int pos = 0;
1842         size_t bufsz = 0;
1843
1844         if (priv->ucode_type == UCODE_INIT) {
1845                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1846         } else {
1847                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1848         }
1849
1850         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1851                 IWL_ERR(priv,
1852                         "Invalid event log pointer 0x%08X for %s uCode\n",
1853                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1854                 return -EINVAL;
1855         }
1856
1857         /* event log header */
1858         capacity = iwl_legacy_read_targ_mem(priv, base);
1859         mode = iwl_legacy_read_targ_mem(priv, base + (1 * sizeof(u32)));
1860         num_wraps = iwl_legacy_read_targ_mem(priv, base + (2 * sizeof(u32)));
1861         next_entry = iwl_legacy_read_targ_mem(priv, base + (3 * sizeof(u32)));
1862
1863         size = num_wraps ? capacity : next_entry;
1864
1865         /* bail out if nothing in log */
1866         if (size == 0) {
1867                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1868                 return pos;
1869         }
1870
1871 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1872         if (!(iwl_legacy_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1873                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1874                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
1875 #else
1876         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1877                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
1878 #endif
1879         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
1880                 size);
1881
1882 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1883         if (display) {
1884                 if (full_log)
1885                         bufsz = capacity * 48;
1886                 else
1887                         bufsz = size * 48;
1888                 *buf = kmalloc(bufsz, GFP_KERNEL);
1889                 if (!*buf)
1890                         return -ENOMEM;
1891         }
1892         if ((iwl_legacy_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1893                 /*
1894                  * if uCode has wrapped back to top of log,
1895                  * start at the oldest entry,
1896                  * i.e the next one that uCode would fill.
1897                  */
1898                 if (num_wraps)
1899                         pos = iwl4965_print_event_log(priv, next_entry,
1900                                                 capacity - next_entry, mode,
1901                                                 pos, buf, bufsz);
1902                 /* (then/else) start at top of log */
1903                 pos = iwl4965_print_event_log(priv, 0,
1904                                           next_entry, mode, pos, buf, bufsz);
1905         } else
1906                 pos = iwl4965_print_last_event_logs(priv, capacity, num_wraps,
1907                                                 next_entry, size, mode,
1908                                                 pos, buf, bufsz);
1909 #else
1910         pos = iwl4965_print_last_event_logs(priv, capacity, num_wraps,
1911                                         next_entry, size, mode,
1912                                         pos, buf, bufsz);
1913 #endif
1914         return pos;
1915 }
1916
1917 static void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
1918 {
1919         struct iwl_ct_kill_config cmd;
1920         unsigned long flags;
1921         int ret = 0;
1922
1923         spin_lock_irqsave(&priv->lock, flags);
1924         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1925                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1926         spin_unlock_irqrestore(&priv->lock, flags);
1927
1928         cmd.critical_temperature_R =
1929                 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1930
1931         ret = iwl_legacy_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1932                                sizeof(cmd), &cmd);
1933         if (ret)
1934                 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1935         else
1936                 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1937                                 "succeeded, "
1938                                 "critical temperature is %d\n",
1939                                 priv->hw_params.ct_kill_threshold);
1940 }
1941
1942 static const s8 default_queue_to_tx_fifo[] = {
1943         IWL_TX_FIFO_VO,
1944         IWL_TX_FIFO_VI,
1945         IWL_TX_FIFO_BE,
1946         IWL_TX_FIFO_BK,
1947         IWL49_CMD_FIFO_NUM,
1948         IWL_TX_FIFO_UNUSED,
1949         IWL_TX_FIFO_UNUSED,
1950 };
1951
1952 static int iwl4965_alive_notify(struct iwl_priv *priv)
1953 {
1954         u32 a;
1955         unsigned long flags;
1956         int i, chan;
1957         u32 reg_val;
1958
1959         spin_lock_irqsave(&priv->lock, flags);
1960
1961         /* Clear 4965's internal Tx Scheduler data base */
1962         priv->scd_base_addr = iwl_legacy_read_prph(priv,
1963                                         IWL49_SCD_SRAM_BASE_ADDR);
1964         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
1965         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
1966                 iwl_legacy_write_targ_mem(priv, a, 0);
1967         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
1968                 iwl_legacy_write_targ_mem(priv, a, 0);
1969         for (; a < priv->scd_base_addr +
1970                IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
1971                 iwl_legacy_write_targ_mem(priv, a, 0);
1972
1973         /* Tel 4965 where to find Tx byte count tables */
1974         iwl_legacy_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
1975                         priv->scd_bc_tbls.dma >> 10);
1976
1977         /* Enable DMA channel */
1978         for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
1979                 iwl_legacy_write_direct32(priv,
1980                                 FH_TCSR_CHNL_TX_CONFIG_REG(chan),
1981                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
1982                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
1983
1984         /* Update FH chicken bits */
1985         reg_val = iwl_legacy_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
1986         iwl_legacy_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
1987                            reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
1988
1989         /* Disable chain mode for all queues */
1990         iwl_legacy_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
1991
1992         /* Initialize each Tx queue (including the command queue) */
1993         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
1994
1995                 /* TFD circular buffer read/write indexes */
1996                 iwl_legacy_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
1997                 iwl_legacy_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
1998
1999                 /* Max Tx Window size for Scheduler-ACK mode */
2000                 iwl_legacy_write_targ_mem(priv, priv->scd_base_addr +
2001                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
2002                                 (SCD_WIN_SIZE <<
2003                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
2004                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
2005
2006                 /* Frame limit */
2007                 iwl_legacy_write_targ_mem(priv, priv->scd_base_addr +
2008                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
2009                                 sizeof(u32),
2010                                 (SCD_FRAME_LIMIT <<
2011                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
2012                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
2013
2014         }
2015         iwl_legacy_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
2016                                  (1 << priv->hw_params.max_txq_num) - 1);
2017
2018         /* Activate all Tx DMA/FIFO channels */
2019         iwl4965_txq_set_sched(priv, IWL_MASK(0, 6));
2020
2021         iwl4965_set_wr_ptrs(priv, IWL_DEFAULT_CMD_QUEUE_NUM, 0);
2022
2023         /* make sure all queue are not stopped */
2024         memset(&priv->queue_stopped[0], 0, sizeof(priv->queue_stopped));
2025         for (i = 0; i < 4; i++)
2026                 atomic_set(&priv->queue_stop_count[i], 0);
2027
2028         /* reset to 0 to enable all the queue first */
2029         priv->txq_ctx_active_msk = 0;
2030         /* Map each Tx/cmd queue to its corresponding fifo */
2031         BUILD_BUG_ON(ARRAY_SIZE(default_queue_to_tx_fifo) != 7);
2032
2033         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
2034                 int ac = default_queue_to_tx_fifo[i];
2035
2036                 iwl_txq_ctx_activate(priv, i);
2037
2038                 if (ac == IWL_TX_FIFO_UNUSED)
2039                         continue;
2040
2041                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
2042         }
2043
2044         spin_unlock_irqrestore(&priv->lock, flags);
2045
2046         return 0;
2047 }
2048
2049 /**
2050  * iwl4965_alive_start - called after REPLY_ALIVE notification received
2051  *                   from protocol/runtime uCode (initialization uCode's
2052  *                   Alive gets handled by iwl_init_alive_start()).
2053  */
2054 static void iwl4965_alive_start(struct iwl_priv *priv)
2055 {
2056         int ret = 0;
2057         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2058
2059         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2060
2061         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2062                 /* We had an error bringing up the hardware, so take it
2063                  * all the way back down so we can try again */
2064                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2065                 goto restart;
2066         }
2067
2068         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2069          * This is a paranoid check, because we would not have gotten the
2070          * "runtime" alive if code weren't properly loaded.  */
2071         if (iwl4965_verify_ucode(priv)) {
2072                 /* Runtime instruction load was bad;
2073                  * take it all the way back down so we can try again */
2074                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2075                 goto restart;
2076         }
2077
2078         ret = iwl4965_alive_notify(priv);
2079         if (ret) {
2080                 IWL_WARN(priv,
2081                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2082                 goto restart;
2083         }
2084
2085
2086         /* After the ALIVE response, we can send host commands to the uCode */
2087         set_bit(STATUS_ALIVE, &priv->status);
2088
2089         /* Enable watchdog to monitor the driver tx queues */
2090         iwl_legacy_setup_watchdog(priv);
2091
2092         if (iwl_legacy_is_rfkill(priv))
2093                 return;
2094
2095         ieee80211_wake_queues(priv->hw);
2096
2097         priv->active_rate = IWL_RATES_MASK;
2098
2099         if (iwl_legacy_is_associated_ctx(ctx)) {
2100                 struct iwl_legacy_rxon_cmd *active_rxon =
2101                                 (struct iwl_legacy_rxon_cmd *)&ctx->active;
2102                 /* apply any changes in staging */
2103                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2104                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2105         } else {
2106                 struct iwl_rxon_context *tmp;
2107                 /* Initialize our rx_config data */
2108                 for_each_context(priv, tmp)
2109                         iwl_legacy_connection_init_rx_config(priv, tmp);
2110
2111                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2112                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
2113         }
2114
2115         /* Configure bluetooth coexistence if enabled */
2116         iwl_legacy_send_bt_config(priv);
2117
2118         iwl4965_reset_run_time_calib(priv);
2119
2120         set_bit(STATUS_READY, &priv->status);
2121
2122         /* Configure the adapter for unassociated operation */
2123         iwl_legacy_commit_rxon(priv, ctx);
2124
2125         /* At this point, the NIC is initialized and operational */
2126         iwl4965_rf_kill_ct_config(priv);
2127
2128         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2129         wake_up_interruptible(&priv->wait_command_queue);
2130
2131         iwl_legacy_power_update_mode(priv, true);
2132         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2133
2134         return;
2135
2136  restart:
2137         queue_work(priv->workqueue, &priv->restart);
2138 }
2139
2140 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
2141
2142 static void __iwl4965_down(struct iwl_priv *priv)
2143 {
2144         unsigned long flags;
2145         int exit_pending;
2146
2147         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2148
2149         iwl_legacy_scan_cancel_timeout(priv, 200);
2150
2151         exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
2152
2153         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2154          * to prevent rearm timer */
2155         del_timer_sync(&priv->watchdog);
2156
2157         iwl_legacy_clear_ucode_stations(priv, NULL);
2158         iwl_legacy_dealloc_bcast_stations(priv);
2159         iwl_legacy_clear_driver_stations(priv);
2160
2161         /* Unblock any waiting calls */
2162         wake_up_interruptible_all(&priv->wait_command_queue);
2163
2164         /* Wipe out the EXIT_PENDING status bit if we are not actually
2165          * exiting the module */
2166         if (!exit_pending)
2167                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2168
2169         /* stop and reset the on-board processor */
2170         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2171
2172         /* tell the device to stop sending interrupts */
2173         spin_lock_irqsave(&priv->lock, flags);
2174         iwl_legacy_disable_interrupts(priv);
2175         spin_unlock_irqrestore(&priv->lock, flags);
2176         iwl4965_synchronize_irq(priv);
2177
2178         if (priv->mac80211_registered)
2179                 ieee80211_stop_queues(priv->hw);
2180
2181         /* If we have not previously called iwl_init() then
2182          * clear all bits but the RF Kill bit and return */
2183         if (!iwl_legacy_is_init(priv)) {
2184                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2185                                         STATUS_RF_KILL_HW |
2186                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2187                                         STATUS_GEO_CONFIGURED |
2188                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2189                                         STATUS_EXIT_PENDING;
2190                 goto exit;
2191         }
2192
2193         /* ...otherwise clear out all the status bits but the RF Kill
2194          * bit and continue taking the NIC down. */
2195         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2196                                 STATUS_RF_KILL_HW |
2197                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2198                                 STATUS_GEO_CONFIGURED |
2199                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2200                                 STATUS_FW_ERROR |
2201                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2202                                 STATUS_EXIT_PENDING;
2203
2204         iwl4965_txq_ctx_stop(priv);
2205         iwl4965_rxq_stop(priv);
2206
2207         /* Power-down device's busmaster DMA clocks */
2208         iwl_legacy_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2209         udelay(5);
2210
2211         /* Make sure (redundant) we've released our request to stay awake */
2212         iwl_legacy_clear_bit(priv, CSR_GP_CNTRL,
2213                                 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2214
2215         /* Stop the device, and put it in low power state */
2216         iwl_legacy_apm_stop(priv);
2217
2218  exit:
2219         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2220
2221         dev_kfree_skb(priv->beacon_skb);
2222         priv->beacon_skb = NULL;
2223
2224         /* clear out any free frames */
2225         iwl4965_clear_free_frames(priv);
2226 }
2227
2228 static void iwl4965_down(struct iwl_priv *priv)
2229 {
2230         mutex_lock(&priv->mutex);
2231         __iwl4965_down(priv);
2232         mutex_unlock(&priv->mutex);
2233
2234         iwl4965_cancel_deferred_work(priv);
2235 }
2236
2237 #define HW_READY_TIMEOUT (50)
2238
2239 static int iwl4965_set_hw_ready(struct iwl_priv *priv)
2240 {
2241         int ret = 0;
2242
2243         iwl_legacy_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2244                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2245
2246         /* See if we got it */
2247         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2248                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2249                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2250                                 HW_READY_TIMEOUT);
2251         if (ret != -ETIMEDOUT)
2252                 priv->hw_ready = true;
2253         else
2254                 priv->hw_ready = false;
2255
2256         IWL_DEBUG_INFO(priv, "hardware %s\n",
2257                       (priv->hw_ready == 1) ? "ready" : "not ready");
2258         return ret;
2259 }
2260
2261 static int iwl4965_prepare_card_hw(struct iwl_priv *priv)
2262 {
2263         int ret = 0;
2264
2265         IWL_DEBUG_INFO(priv, "iwl4965_prepare_card_hw enter\n");
2266
2267         ret = iwl4965_set_hw_ready(priv);
2268         if (priv->hw_ready)
2269                 return ret;
2270
2271         /* If HW is not ready, prepare the conditions to check again */
2272         iwl_legacy_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2273                         CSR_HW_IF_CONFIG_REG_PREPARE);
2274
2275         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2276                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2277                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2278
2279         /* HW should be ready by now, check again. */
2280         if (ret != -ETIMEDOUT)
2281                 iwl4965_set_hw_ready(priv);
2282
2283         return ret;
2284 }
2285
2286 #define MAX_HW_RESTARTS 5
2287
2288 static int __iwl4965_up(struct iwl_priv *priv)
2289 {
2290         struct iwl_rxon_context *ctx;
2291         int i;
2292         int ret;
2293
2294         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2295                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2296                 return -EIO;
2297         }
2298
2299         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2300                 IWL_ERR(priv, "ucode not available for device bringup\n");
2301                 return -EIO;
2302         }
2303
2304         for_each_context(priv, ctx) {
2305                 ret = iwl4965_alloc_bcast_station(priv, ctx);
2306                 if (ret) {
2307                         iwl_legacy_dealloc_bcast_stations(priv);
2308                         return ret;
2309                 }
2310         }
2311
2312         iwl4965_prepare_card_hw(priv);
2313
2314         if (!priv->hw_ready) {
2315                 IWL_WARN(priv, "Exit HW not ready\n");
2316                 return -EIO;
2317         }
2318
2319         /* If platform's RF_KILL switch is NOT set to KILL */
2320         if (iwl_read32(priv,
2321                 CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2322                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2323         else
2324                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2325
2326         if (iwl_legacy_is_rfkill(priv)) {
2327                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2328
2329                 iwl_legacy_enable_interrupts(priv);
2330                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2331                 return 0;
2332         }
2333
2334         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2335
2336         /* must be initialised before iwl_hw_nic_init */
2337         priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
2338
2339         ret = iwl4965_hw_nic_init(priv);
2340         if (ret) {
2341                 IWL_ERR(priv, "Unable to init nic\n");
2342                 return ret;
2343         }
2344
2345         /* make sure rfkill handshake bits are cleared */
2346         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2347         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2348                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2349
2350         /* clear (again), then enable host interrupts */
2351         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2352         iwl_legacy_enable_interrupts(priv);
2353
2354         /* really make sure rfkill handshake bits are cleared */
2355         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2356         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2357
2358         /* Copy original ucode data image from disk into backup cache.
2359          * This will be used to initialize the on-board processor's
2360          * data SRAM for a clean start when the runtime program first loads. */
2361         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2362                priv->ucode_data.len);
2363
2364         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2365
2366                 /* load bootstrap state machine,
2367                  * load bootstrap program into processor's memory,
2368                  * prepare to load the "initialize" uCode */
2369                 ret = priv->cfg->ops->lib->load_ucode(priv);
2370
2371                 if (ret) {
2372                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2373                                 ret);
2374                         continue;
2375                 }
2376
2377                 /* start card; "initialize" will load runtime ucode */
2378                 iwl4965_nic_start(priv);
2379
2380                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2381
2382                 return 0;
2383         }
2384
2385         set_bit(STATUS_EXIT_PENDING, &priv->status);
2386         __iwl4965_down(priv);
2387         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2388
2389         /* tried to restart and config the device for as long as our
2390          * patience could withstand */
2391         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2392         return -EIO;
2393 }
2394
2395
2396 /*****************************************************************************
2397  *
2398  * Workqueue callbacks
2399  *
2400  *****************************************************************************/
2401
2402 static void iwl4965_bg_init_alive_start(struct work_struct *data)
2403 {
2404         struct iwl_priv *priv =
2405             container_of(data, struct iwl_priv, init_alive_start.work);
2406
2407         mutex_lock(&priv->mutex);
2408         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2409                 goto out;
2410
2411         priv->cfg->ops->lib->init_alive_start(priv);
2412 out:
2413         mutex_unlock(&priv->mutex);
2414 }
2415
2416 static void iwl4965_bg_alive_start(struct work_struct *data)
2417 {
2418         struct iwl_priv *priv =
2419             container_of(data, struct iwl_priv, alive_start.work);
2420
2421         mutex_lock(&priv->mutex);
2422         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2423                 goto out;
2424
2425         iwl4965_alive_start(priv);
2426 out:
2427         mutex_unlock(&priv->mutex);
2428 }
2429
2430 static void iwl4965_bg_run_time_calib_work(struct work_struct *work)
2431 {
2432         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2433                         run_time_calib_work);
2434
2435         mutex_lock(&priv->mutex);
2436
2437         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2438             test_bit(STATUS_SCANNING, &priv->status)) {
2439                 mutex_unlock(&priv->mutex);
2440                 return;
2441         }
2442
2443         if (priv->start_calib) {
2444                 iwl4965_chain_noise_calibration(priv,
2445                                 (void *)&priv->_4965.statistics);
2446                 iwl4965_sensitivity_calibration(priv,
2447                                 (void *)&priv->_4965.statistics);
2448         }
2449
2450         mutex_unlock(&priv->mutex);
2451 }
2452
2453 static void iwl4965_bg_restart(struct work_struct *data)
2454 {
2455         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2456
2457         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2458                 return;
2459
2460         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2461                 struct iwl_rxon_context *ctx;
2462
2463                 mutex_lock(&priv->mutex);
2464                 for_each_context(priv, ctx)
2465                         ctx->vif = NULL;
2466                 priv->is_open = 0;
2467
2468                 __iwl4965_down(priv);
2469
2470                 mutex_unlock(&priv->mutex);
2471                 iwl4965_cancel_deferred_work(priv);
2472                 ieee80211_restart_hw(priv->hw);
2473         } else {
2474                 iwl4965_down(priv);
2475
2476                 mutex_lock(&priv->mutex);
2477                 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2478                         mutex_unlock(&priv->mutex);
2479                         return;
2480                 }
2481
2482                 __iwl4965_up(priv);
2483                 mutex_unlock(&priv->mutex);
2484         }
2485 }
2486
2487 static void iwl4965_bg_rx_replenish(struct work_struct *data)
2488 {
2489         struct iwl_priv *priv =
2490             container_of(data, struct iwl_priv, rx_replenish);
2491
2492         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2493                 return;
2494
2495         mutex_lock(&priv->mutex);
2496         iwl4965_rx_replenish(priv);
2497         mutex_unlock(&priv->mutex);
2498 }
2499
2500 /*****************************************************************************
2501  *
2502  * mac80211 entry point functions
2503  *
2504  *****************************************************************************/
2505
2506 #define UCODE_READY_TIMEOUT     (4 * HZ)
2507
2508 /*
2509  * Not a mac80211 entry point function, but it fits in with all the
2510  * other mac80211 functions grouped here.
2511  */
2512 static int iwl4965_mac_setup_register(struct iwl_priv *priv,
2513                                   u32 max_probe_length)
2514 {
2515         int ret;
2516         struct ieee80211_hw *hw = priv->hw;
2517         struct iwl_rxon_context *ctx;
2518
2519         hw->rate_control_algorithm = "iwl-4965-rs";
2520
2521         /* Tell mac80211 our characteristics */
2522         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2523                     IEEE80211_HW_AMPDU_AGGREGATION |
2524                     IEEE80211_HW_NEED_DTIM_PERIOD |
2525                     IEEE80211_HW_SPECTRUM_MGMT |
2526                     IEEE80211_HW_REPORTS_TX_ACK_STATUS;
2527
2528         if (priv->cfg->sku & IWL_SKU_N)
2529                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2530                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2531
2532         hw->sta_data_size = sizeof(struct iwl_station_priv);
2533         hw->vif_data_size = sizeof(struct iwl_vif_priv);
2534
2535         for_each_context(priv, ctx) {
2536                 hw->wiphy->interface_modes |= ctx->interface_modes;
2537                 hw->wiphy->interface_modes |= ctx->exclusive_interface_modes;
2538         }
2539
2540         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2541                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
2542
2543         /*
2544          * For now, disable PS by default because it affects
2545          * RX performance significantly.
2546          */
2547         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2548
2549         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2550         /* we create the 802.11 header and a zero-length SSID element */
2551         hw->wiphy->max_scan_ie_len = max_probe_length - 24 - 2;
2552
2553         /* Default value; 4 EDCA QOS priorities */
2554         hw->queues = 4;
2555
2556         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2557
2558         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2559                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2560                         &priv->bands[IEEE80211_BAND_2GHZ];
2561         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2562                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2563                         &priv->bands[IEEE80211_BAND_5GHZ];
2564
2565         iwl_legacy_leds_init(priv);
2566
2567         ret = ieee80211_register_hw(priv->hw);
2568         if (ret) {
2569                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2570                 return ret;
2571         }
2572         priv->mac80211_registered = 1;
2573
2574         return 0;
2575 }
2576
2577
2578 int iwl4965_mac_start(struct ieee80211_hw *hw)
2579 {
2580         struct iwl_priv *priv = hw->priv;
2581         int ret;
2582
2583         IWL_DEBUG_MAC80211(priv, "enter\n");
2584
2585         /* we should be verifying the device is ready to be opened */
2586         mutex_lock(&priv->mutex);
2587         ret = __iwl4965_up(priv);
2588         mutex_unlock(&priv->mutex);
2589
2590         if (ret)
2591                 return ret;
2592
2593         if (iwl_legacy_is_rfkill(priv))
2594                 goto out;
2595
2596         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2597
2598         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2599          * mac80211 will not be run successfully. */
2600         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2601                         test_bit(STATUS_READY, &priv->status),
2602                         UCODE_READY_TIMEOUT);
2603         if (!ret) {
2604                 if (!test_bit(STATUS_READY, &priv->status)) {
2605                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2606                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2607                         return -ETIMEDOUT;
2608                 }
2609         }
2610
2611         iwl4965_led_enable(priv);
2612
2613 out:
2614         priv->is_open = 1;
2615         IWL_DEBUG_MAC80211(priv, "leave\n");
2616         return 0;
2617 }
2618
2619 void iwl4965_mac_stop(struct ieee80211_hw *hw)
2620 {
2621         struct iwl_priv *priv = hw->priv;
2622
2623         IWL_DEBUG_MAC80211(priv, "enter\n");
2624
2625         if (!priv->is_open)
2626                 return;
2627
2628         priv->is_open = 0;
2629
2630         iwl4965_down(priv);
2631
2632         flush_workqueue(priv->workqueue);
2633
2634         /* User space software may expect getting rfkill changes
2635          * even if interface is down */
2636         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2637         iwl_legacy_enable_rfkill_int(priv);
2638
2639         IWL_DEBUG_MAC80211(priv, "leave\n");
2640 }
2641
2642 void iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2643 {
2644         struct iwl_priv *priv = hw->priv;
2645
2646         IWL_DEBUG_MACDUMP(priv, "enter\n");
2647
2648         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2649                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2650
2651         if (iwl4965_tx_skb(priv, skb))
2652                 dev_kfree_skb_any(skb);
2653
2654         IWL_DEBUG_MACDUMP(priv, "leave\n");
2655 }
2656
2657 void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
2658                                 struct ieee80211_vif *vif,
2659                                 struct ieee80211_key_conf *keyconf,
2660                                 struct ieee80211_sta *sta,
2661                                 u32 iv32, u16 *phase1key)
2662 {
2663         struct iwl_priv *priv = hw->priv;
2664         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2665
2666         IWL_DEBUG_MAC80211(priv, "enter\n");
2667
2668         iwl4965_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
2669                             iv32, phase1key);
2670
2671         IWL_DEBUG_MAC80211(priv, "leave\n");
2672 }
2673
2674 int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2675                        struct ieee80211_vif *vif, struct ieee80211_sta *sta,
2676                        struct ieee80211_key_conf *key)
2677 {
2678         struct iwl_priv *priv = hw->priv;
2679         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2680         struct iwl_rxon_context *ctx = vif_priv->ctx;
2681         int ret;
2682         u8 sta_id;
2683         bool is_default_wep_key = false;
2684
2685         IWL_DEBUG_MAC80211(priv, "enter\n");
2686
2687         if (priv->cfg->mod_params->sw_crypto) {
2688                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2689                 return -EOPNOTSUPP;
2690         }
2691
2692         sta_id = iwl_legacy_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
2693         if (sta_id == IWL_INVALID_STATION)
2694                 return -EINVAL;
2695
2696         mutex_lock(&priv->mutex);
2697         iwl_legacy_scan_cancel_timeout(priv, 100);
2698
2699         /*
2700          * If we are getting WEP group key and we didn't receive any key mapping
2701          * so far, we are in legacy wep mode (group key only), otherwise we are
2702          * in 1X mode.
2703          * In legacy wep mode, we use another host command to the uCode.
2704          */
2705         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
2706              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
2707             !sta) {
2708                 if (cmd == SET_KEY)
2709                         is_default_wep_key = !ctx->key_mapping_keys;
2710                 else
2711                         is_default_wep_key =
2712                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2713         }
2714
2715         switch (cmd) {
2716         case SET_KEY:
2717                 if (is_default_wep_key)
2718                         ret = iwl4965_set_default_wep_key(priv,
2719                                                         vif_priv->ctx, key);
2720                 else
2721                         ret = iwl4965_set_dynamic_key(priv, vif_priv->ctx,
2722                                                   key, sta_id);
2723
2724                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2725                 break;
2726         case DISABLE_KEY:
2727                 if (is_default_wep_key)
2728                         ret = iwl4965_remove_default_wep_key(priv, ctx, key);
2729                 else
2730                         ret = iwl4965_remove_dynamic_key(priv, ctx,
2731                                                         key, sta_id);
2732
2733                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2734                 break;
2735         default:
2736                 ret = -EINVAL;
2737         }
2738
2739         mutex_unlock(&priv->mutex);
2740         IWL_DEBUG_MAC80211(priv, "leave\n");
2741
2742         return ret;
2743 }
2744
2745 int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
2746                             struct ieee80211_vif *vif,
2747                             enum ieee80211_ampdu_mlme_action action,
2748                             struct ieee80211_sta *sta, u16 tid, u16 *ssn,
2749                             u8 buf_size)
2750 {
2751         struct iwl_priv *priv = hw->priv;
2752         int ret = -EINVAL;
2753
2754         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2755                      sta->addr, tid);
2756
2757         if (!(priv->cfg->sku & IWL_SKU_N))
2758                 return -EACCES;
2759
2760         mutex_lock(&priv->mutex);
2761
2762         switch (action) {
2763         case IEEE80211_AMPDU_RX_START:
2764                 IWL_DEBUG_HT(priv, "start Rx\n");
2765                 ret = iwl4965_sta_rx_agg_start(priv, sta, tid, *ssn);
2766                 break;
2767         case IEEE80211_AMPDU_RX_STOP:
2768                 IWL_DEBUG_HT(priv, "stop Rx\n");
2769                 ret = iwl4965_sta_rx_agg_stop(priv, sta, tid);
2770                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2771                         ret = 0;
2772                 break;
2773         case IEEE80211_AMPDU_TX_START:
2774                 IWL_DEBUG_HT(priv, "start Tx\n");
2775                 ret = iwl4965_tx_agg_start(priv, vif, sta, tid, ssn);
2776                 if (ret == 0) {
2777                         priv->_4965.agg_tids_count++;
2778                         IWL_DEBUG_HT(priv, "priv->_4965.agg_tids_count = %u\n",
2779                                      priv->_4965.agg_tids_count);
2780                 }
2781                 break;
2782         case IEEE80211_AMPDU_TX_STOP:
2783                 IWL_DEBUG_HT(priv, "stop Tx\n");
2784                 ret = iwl4965_tx_agg_stop(priv, vif, sta, tid);
2785                 if ((ret == 0) && (priv->_4965.agg_tids_count > 0)) {
2786                         priv->_4965.agg_tids_count--;
2787                         IWL_DEBUG_HT(priv, "priv->_4965.agg_tids_count = %u\n",
2788                                      priv->_4965.agg_tids_count);
2789                 }
2790                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2791                         ret = 0;
2792                 break;
2793         case IEEE80211_AMPDU_TX_OPERATIONAL:
2794                 ret = 0;
2795                 break;
2796         }
2797         mutex_unlock(&priv->mutex);
2798
2799         return ret;
2800 }
2801
2802 int iwl4965_mac_sta_add(struct ieee80211_hw *hw,
2803                        struct ieee80211_vif *vif,
2804                        struct ieee80211_sta *sta)
2805 {
2806         struct iwl_priv *priv = hw->priv;
2807         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
2808         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2809         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
2810         int ret;
2811         u8 sta_id;
2812
2813         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
2814                         sta->addr);
2815         mutex_lock(&priv->mutex);
2816         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
2817                         sta->addr);
2818         sta_priv->common.sta_id = IWL_INVALID_STATION;
2819
2820         atomic_set(&sta_priv->pending_frames, 0);
2821
2822         ret = iwl_legacy_add_station_common(priv, vif_priv->ctx, sta->addr,
2823                                      is_ap, sta, &sta_id);
2824         if (ret) {
2825                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
2826                         sta->addr, ret);
2827                 /* Should we return success if return code is EEXIST ? */
2828                 mutex_unlock(&priv->mutex);
2829                 return ret;
2830         }
2831
2832         sta_priv->common.sta_id = sta_id;
2833
2834         /* Initialize rate scaling */
2835         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
2836                        sta->addr);
2837         iwl4965_rs_rate_init(priv, sta, sta_id);
2838         mutex_unlock(&priv->mutex);
2839
2840         return 0;
2841 }
2842
2843 void iwl4965_mac_channel_switch(struct ieee80211_hw *hw,
2844                                struct ieee80211_channel_switch *ch_switch)
2845 {
2846         struct iwl_priv *priv = hw->priv;
2847         const struct iwl_channel_info *ch_info;
2848         struct ieee80211_conf *conf = &hw->conf;
2849         struct ieee80211_channel *channel = ch_switch->channel;
2850         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2851
2852         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2853         u16 ch;
2854         unsigned long flags = 0;
2855
2856         IWL_DEBUG_MAC80211(priv, "enter\n");
2857
2858         mutex_lock(&priv->mutex);
2859
2860         if (iwl_legacy_is_rfkill(priv))
2861                 goto out;
2862
2863         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2864             test_bit(STATUS_SCANNING, &priv->status))
2865                 goto out;
2866
2867         if (!iwl_legacy_is_associated_ctx(ctx))
2868                 goto out;
2869
2870         /* channel switch in progress */
2871         if (priv->switch_rxon.switch_in_progress == true)
2872                 goto out;
2873
2874         if (priv->cfg->ops->lib->set_channel_switch) {
2875
2876                 ch = channel->hw_value;
2877                 if (le16_to_cpu(ctx->active.channel) != ch) {
2878                         ch_info = iwl_legacy_get_channel_info(priv,
2879                                                        channel->band,
2880                                                        ch);
2881                         if (!iwl_legacy_is_channel_valid(ch_info)) {
2882                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
2883                                 goto out;
2884                         }
2885                         spin_lock_irqsave(&priv->lock, flags);
2886
2887                         priv->current_ht_config.smps = conf->smps_mode;
2888
2889                         /* Configure HT40 channels */
2890                         ctx->ht.enabled = conf_is_ht(conf);
2891                         if (ctx->ht.enabled) {
2892                                 if (conf_is_ht40_minus(conf)) {
2893                                         ctx->ht.extension_chan_offset =
2894                                         IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2895                                         ctx->ht.is_40mhz = true;
2896                                 } else if (conf_is_ht40_plus(conf)) {
2897                                         ctx->ht.extension_chan_offset =
2898                                         IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2899                                         ctx->ht.is_40mhz = true;
2900                                 } else {
2901                                         ctx->ht.extension_chan_offset =
2902                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2903                                         ctx->ht.is_40mhz = false;
2904                                 }
2905                         } else
2906                                 ctx->ht.is_40mhz = false;
2907
2908                         if ((le16_to_cpu(ctx->staging.channel) != ch))
2909                                 ctx->staging.flags = 0;
2910
2911                         iwl_legacy_set_rxon_channel(priv, channel, ctx);
2912                         iwl_legacy_set_rxon_ht(priv, ht_conf);
2913                         iwl_legacy_set_flags_for_band(priv, ctx, channel->band,
2914                                                ctx->vif);
2915                         spin_unlock_irqrestore(&priv->lock, flags);
2916
2917                         iwl_legacy_set_rate(priv);
2918                         /*
2919                          * at this point, staging_rxon has the
2920                          * configuration for channel switch
2921                          */
2922                         if (priv->cfg->ops->lib->set_channel_switch(priv,
2923                                                                     ch_switch))
2924                                 priv->switch_rxon.switch_in_progress = false;
2925                 }
2926         }
2927 out:
2928         mutex_unlock(&priv->mutex);
2929         if (!priv->switch_rxon.switch_in_progress)
2930                 ieee80211_chswitch_done(ctx->vif, false);
2931         IWL_DEBUG_MAC80211(priv, "leave\n");
2932 }
2933
2934 void iwl4965_configure_filter(struct ieee80211_hw *hw,
2935                              unsigned int changed_flags,
2936                              unsigned int *total_flags,
2937                              u64 multicast)
2938 {
2939         struct iwl_priv *priv = hw->priv;
2940         __le32 filter_or = 0, filter_nand = 0;
2941         struct iwl_rxon_context *ctx;
2942
2943 #define CHK(test, flag) do { \
2944         if (*total_flags & (test))              \
2945                 filter_or |= (flag);            \
2946         else                                    \
2947                 filter_nand |= (flag);          \
2948         } while (0)
2949
2950         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
2951                         changed_flags, *total_flags);
2952
2953         CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
2954         /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
2955         CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_PROMISC_MSK);
2956         CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
2957
2958 #undef CHK
2959
2960         mutex_lock(&priv->mutex);
2961
2962         for_each_context(priv, ctx) {
2963                 ctx->staging.filter_flags &= ~filter_nand;
2964                 ctx->staging.filter_flags |= filter_or;
2965
2966                 /*
2967                  * Not committing directly because hardware can perform a scan,
2968                  * but we'll eventually commit the filter flags change anyway.
2969                  */
2970         }
2971
2972         mutex_unlock(&priv->mutex);
2973
2974         /*
2975          * Receiving all multicast frames is always enabled by the
2976          * default flags setup in iwl_legacy_connection_init_rx_config()
2977          * since we currently do not support programming multicast
2978          * filters into the device.
2979          */
2980         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
2981                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
2982 }
2983
2984 /*****************************************************************************
2985  *
2986  * driver setup and teardown
2987  *
2988  *****************************************************************************/
2989
2990 static void iwl4965_bg_txpower_work(struct work_struct *work)
2991 {
2992         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2993                         txpower_work);
2994
2995         mutex_lock(&priv->mutex);
2996
2997         /* If a scan happened to start before we got here
2998          * then just return; the statistics notification will
2999          * kick off another scheduled work to compensate for
3000          * any temperature delta we missed here. */
3001         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3002             test_bit(STATUS_SCANNING, &priv->status))
3003                 goto out;
3004
3005         /* Regardless of if we are associated, we must reconfigure the
3006          * TX power since frames can be sent on non-radar channels while
3007          * not associated */
3008         priv->cfg->ops->lib->send_tx_power(priv);
3009
3010         /* Update last_temperature to keep is_calib_needed from running
3011          * when it isn't needed... */
3012         priv->last_temperature = priv->temperature;
3013 out:
3014         mutex_unlock(&priv->mutex);
3015 }
3016
3017 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
3018 {
3019         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3020
3021         init_waitqueue_head(&priv->wait_command_queue);
3022
3023         INIT_WORK(&priv->restart, iwl4965_bg_restart);
3024         INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
3025         INIT_WORK(&priv->run_time_calib_work, iwl4965_bg_run_time_calib_work);
3026         INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
3027         INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
3028
3029         iwl_legacy_setup_scan_deferred_work(priv);
3030
3031         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
3032
3033         init_timer(&priv->statistics_periodic);
3034         priv->statistics_periodic.data = (unsigned long)priv;
3035         priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
3036
3037         init_timer(&priv->ucode_trace);
3038         priv->ucode_trace.data = (unsigned long)priv;
3039         priv->ucode_trace.function = iwl4965_bg_ucode_trace;
3040
3041         init_timer(&priv->watchdog);
3042         priv->watchdog.data = (unsigned long)priv;
3043         priv->watchdog.function = iwl_legacy_bg_watchdog;
3044
3045         tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3046                 iwl4965_irq_tasklet, (unsigned long)priv);
3047 }
3048
3049 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
3050 {
3051         cancel_work_sync(&priv->txpower_work);
3052         cancel_delayed_work_sync(&priv->init_alive_start);
3053         cancel_delayed_work(&priv->alive_start);
3054         cancel_work_sync(&priv->run_time_calib_work);
3055
3056         iwl_legacy_cancel_scan_deferred_work(priv);
3057
3058         del_timer_sync(&priv->statistics_periodic);
3059         del_timer_sync(&priv->ucode_trace);
3060 }
3061
3062 static void iwl4965_init_hw_rates(struct iwl_priv *priv,
3063                               struct ieee80211_rate *rates)
3064 {
3065         int i;
3066
3067         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3068                 rates[i].bitrate = iwlegacy_rates[i].ieee * 5;
3069                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3070                 rates[i].hw_value_short = i;
3071                 rates[i].flags = 0;
3072                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3073                         /*
3074                          * If CCK != 1M then set short preamble rate flag.
3075                          */
3076                         rates[i].flags |=
3077                                 (iwlegacy_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3078                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3079                 }
3080         }
3081 }
3082 /*
3083  * Acquire priv->lock before calling this function !
3084  */
3085 void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
3086 {
3087         iwl_legacy_write_direct32(priv, HBUS_TARG_WRPTR,
3088                              (index & 0xff) | (txq_id << 8));
3089         iwl_legacy_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
3090 }
3091
3092 void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
3093                                         struct iwl_tx_queue *txq,
3094                                         int tx_fifo_id, int scd_retry)
3095 {
3096         int txq_id = txq->q.id;
3097
3098         /* Find out whether to activate Tx queue */
3099         int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
3100
3101         /* Set up and activate */
3102         iwl_legacy_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
3103                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
3104                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
3105                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
3106                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
3107                          IWL49_SCD_QUEUE_STTS_REG_MSK);
3108
3109         txq->sched_retry = scd_retry;
3110
3111         IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
3112                        active ? "Activate" : "Deactivate",
3113                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
3114 }
3115
3116
3117 static int iwl4965_init_drv(struct iwl_priv *priv)
3118 {
3119         int ret;
3120
3121         spin_lock_init(&priv->sta_lock);
3122         spin_lock_init(&priv->hcmd_lock);
3123
3124         INIT_LIST_HEAD(&priv->free_frames);
3125
3126         mutex_init(&priv->mutex);
3127
3128         priv->ieee_channels = NULL;
3129         priv->ieee_rates = NULL;
3130         priv->band = IEEE80211_BAND_2GHZ;
3131
3132         priv->iw_mode = NL80211_IFTYPE_STATION;
3133         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3134         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3135         priv->_4965.agg_tids_count = 0;
3136
3137         /* initialize force reset */
3138         priv->force_reset[IWL_RF_RESET].reset_duration =
3139                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3140         priv->force_reset[IWL_FW_RESET].reset_duration =
3141                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3142
3143         /* Choose which receivers/antennas to use */
3144         if (priv->cfg->ops->hcmd->set_rxon_chain)
3145                 priv->cfg->ops->hcmd->set_rxon_chain(priv,
3146                                         &priv->contexts[IWL_RXON_CTX_BSS]);
3147
3148         iwl_legacy_init_scan_params(priv);
3149
3150         ret = iwl_legacy_init_channel_map(priv);
3151         if (ret) {
3152                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3153                 goto err;
3154         }
3155
3156         ret = iwl_legacy_init_geos(priv);
3157         if (ret) {
3158                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3159                 goto err_free_channel_map;
3160         }
3161         iwl4965_init_hw_rates(priv, priv->ieee_rates);
3162
3163         return 0;
3164
3165 err_free_channel_map:
3166         iwl_legacy_free_channel_map(priv);
3167 err:
3168         return ret;
3169 }
3170
3171 static void iwl4965_uninit_drv(struct iwl_priv *priv)
3172 {
3173         iwl4965_calib_free_results(priv);
3174         iwl_legacy_free_geos(priv);
3175         iwl_legacy_free_channel_map(priv);
3176         kfree(priv->scan_cmd);
3177 }
3178
3179 static void iwl4965_hw_detect(struct iwl_priv *priv)
3180 {
3181         priv->hw_rev = _iwl_legacy_read32(priv, CSR_HW_REV);
3182         priv->hw_wa_rev = _iwl_legacy_read32(priv, CSR_HW_REV_WA_REG);
3183         priv->rev_id = priv->pci_dev->revision;
3184         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
3185 }
3186
3187 static int iwl4965_set_hw_params(struct iwl_priv *priv)
3188 {
3189         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
3190         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
3191         if (priv->cfg->mod_params->amsdu_size_8K)
3192                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
3193         else
3194                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
3195
3196         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
3197
3198         if (priv->cfg->mod_params->disable_11n)
3199                 priv->cfg->sku &= ~IWL_SKU_N;
3200
3201         /* Device-specific setup */
3202         return priv->cfg->ops->lib->set_hw_params(priv);
3203 }
3204
3205 static const u8 iwl4965_bss_ac_to_fifo[] = {
3206         IWL_TX_FIFO_VO,
3207         IWL_TX_FIFO_VI,
3208         IWL_TX_FIFO_BE,
3209         IWL_TX_FIFO_BK,
3210 };
3211
3212 static const u8 iwl4965_bss_ac_to_queue[] = {
3213         0, 1, 2, 3,
3214 };
3215
3216 static int
3217 iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3218 {
3219         int err = 0, i;
3220         struct iwl_priv *priv;
3221         struct ieee80211_hw *hw;
3222         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3223         unsigned long flags;
3224         u16 pci_cmd;
3225
3226         /************************
3227          * 1. Allocating HW data
3228          ************************/
3229
3230         hw = iwl_legacy_alloc_all(cfg);
3231         if (!hw) {
3232                 err = -ENOMEM;
3233                 goto out;
3234         }
3235         priv = hw->priv;
3236         /* At this point both hw and priv are allocated. */
3237
3238         /*
3239          * The default context is always valid,
3240          * more may be discovered when firmware
3241          * is loaded.
3242          */
3243         priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
3244
3245         for (i = 0; i < NUM_IWL_RXON_CTX; i++)
3246                 priv->contexts[i].ctxid = i;
3247
3248         priv->contexts[IWL_RXON_CTX_BSS].always_active = true;
3249         priv->contexts[IWL_RXON_CTX_BSS].is_active = true;
3250         priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
3251         priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
3252         priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
3253         priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
3254         priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
3255         priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
3256         priv->contexts[IWL_RXON_CTX_BSS].ac_to_fifo = iwl4965_bss_ac_to_fifo;
3257         priv->contexts[IWL_RXON_CTX_BSS].ac_to_queue = iwl4965_bss_ac_to_queue;
3258         priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes =
3259                 BIT(NL80211_IFTYPE_ADHOC);
3260         priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
3261                 BIT(NL80211_IFTYPE_STATION);
3262         priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;
3263         priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
3264         priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
3265         priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
3266
3267         BUILD_BUG_ON(NUM_IWL_RXON_CTX != 1);
3268
3269         SET_IEEE80211_DEV(hw, &pdev->dev);
3270
3271         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3272         priv->cfg = cfg;
3273         priv->pci_dev = pdev;
3274         priv->inta_mask = CSR_INI_SET_MASK;
3275
3276         if (iwl_legacy_alloc_traffic_mem(priv))
3277                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3278
3279         /**************************
3280          * 2. Initializing PCI bus
3281          **************************/
3282         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3283                                 PCIE_LINK_STATE_CLKPM);
3284
3285         if (pci_enable_device(pdev)) {
3286                 err = -ENODEV;
3287                 goto out_ieee80211_free_hw;
3288         }
3289
3290         pci_set_master(pdev);
3291
3292         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3293         if (!err)
3294                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3295         if (err) {
3296                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3297                 if (!err)
3298                         err = pci_set_consistent_dma_mask(pdev,
3299                                                         DMA_BIT_MASK(32));
3300                 /* both attempts failed: */
3301                 if (err) {
3302                         IWL_WARN(priv, "No suitable DMA available.\n");
3303                         goto out_pci_disable_device;
3304                 }
3305         }
3306
3307         err = pci_request_regions(pdev, DRV_NAME);
3308         if (err)
3309                 goto out_pci_disable_device;
3310
3311         pci_set_drvdata(pdev, priv);
3312
3313
3314         /***********************
3315          * 3. Read REV register
3316          ***********************/
3317         priv->hw_base = pci_iomap(pdev, 0, 0);
3318         if (!priv->hw_base) {
3319                 err = -ENODEV;
3320                 goto out_pci_release_regions;
3321         }
3322
3323         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3324                 (unsigned long long) pci_resource_len(pdev, 0));
3325         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3326
3327         /* these spin locks will be used in apm_ops.init and EEPROM access
3328          * we should init now
3329          */
3330         spin_lock_init(&priv->reg_lock);
3331         spin_lock_init(&priv->lock);
3332
3333         /*
3334          * stop and reset the on-board processor just in case it is in a
3335          * strange state ... like being left stranded by a primary kernel
3336          * and this is now the kdump kernel trying to start up
3337          */
3338         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3339
3340         iwl4965_hw_detect(priv);
3341         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3342                 priv->cfg->name, priv->hw_rev);
3343
3344         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3345          * PCI Tx retries from interfering with C3 CPU state */
3346         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3347
3348         iwl4965_prepare_card_hw(priv);
3349         if (!priv->hw_ready) {
3350                 IWL_WARN(priv, "Failed, HW not ready\n");
3351                 goto out_iounmap;
3352         }
3353
3354         /*****************
3355          * 4. Read EEPROM
3356          *****************/
3357         /* Read the EEPROM */
3358         err = iwl_legacy_eeprom_init(priv);
3359         if (err) {
3360                 IWL_ERR(priv, "Unable to init EEPROM\n");
3361                 goto out_iounmap;
3362         }
3363         err = iwl4965_eeprom_check_version(priv);
3364         if (err)
3365                 goto out_free_eeprom;
3366
3367         if (err)
3368                 goto out_free_eeprom;
3369
3370         /* extract MAC Address */
3371         iwl4965_eeprom_get_mac(priv, priv->addresses[0].addr);
3372         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
3373         priv->hw->wiphy->addresses = priv->addresses;
3374         priv->hw->wiphy->n_addresses = 1;
3375
3376         /************************
3377          * 5. Setup HW constants
3378          ************************/
3379         if (iwl4965_set_hw_params(priv)) {
3380                 IWL_ERR(priv, "failed to set hw parameters\n");
3381                 goto out_free_eeprom;
3382         }
3383
3384         /*******************
3385          * 6. Setup priv
3386          *******************/
3387
3388         err = iwl4965_init_drv(priv);
3389         if (err)
3390                 goto out_free_eeprom;
3391         /* At this point both hw and priv are initialized. */
3392
3393         /********************
3394          * 7. Setup services
3395          ********************/
3396         spin_lock_irqsave(&priv->lock, flags);
3397         iwl_legacy_disable_interrupts(priv);
3398         spin_unlock_irqrestore(&priv->lock, flags);
3399
3400         pci_enable_msi(priv->pci_dev);
3401
3402         err = request_irq(priv->pci_dev->irq, iwl_legacy_isr,
3403                           IRQF_SHARED, DRV_NAME, priv);
3404         if (err) {
3405                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3406                 goto out_disable_msi;
3407         }
3408
3409         iwl4965_setup_deferred_work(priv);
3410         iwl4965_setup_rx_handlers(priv);
3411
3412         /*********************************************
3413          * 8. Enable interrupts and read RFKILL state
3414          *********************************************/
3415
3416         /* enable rfkill interrupt: hw bug w/a */
3417         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3418         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3419                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3420                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3421         }
3422
3423         iwl_legacy_enable_rfkill_int(priv);
3424
3425         /* If platform's RF_KILL switch is NOT set to KILL */
3426         if (iwl_read32(priv, CSR_GP_CNTRL) &
3427                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3428                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3429         else
3430                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3431
3432         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3433                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3434
3435         iwl_legacy_power_initialize(priv);
3436
3437         init_completion(&priv->_4965.firmware_loading_complete);
3438
3439         err = iwl4965_request_firmware(priv, true);
3440         if (err)
3441                 goto out_destroy_workqueue;
3442
3443         return 0;
3444
3445  out_destroy_workqueue:
3446         destroy_workqueue(priv->workqueue);
3447         priv->workqueue = NULL;
3448         free_irq(priv->pci_dev->irq, priv);
3449  out_disable_msi:
3450         pci_disable_msi(priv->pci_dev);
3451         iwl4965_uninit_drv(priv);
3452  out_free_eeprom:
3453         iwl_legacy_eeprom_free(priv);
3454  out_iounmap:
3455         pci_iounmap(pdev, priv->hw_base);
3456  out_pci_release_regions:
3457         pci_set_drvdata(pdev, NULL);
3458         pci_release_regions(pdev);
3459  out_pci_disable_device:
3460         pci_disable_device(pdev);
3461  out_ieee80211_free_hw:
3462         iwl_legacy_free_traffic_mem(priv);
3463         ieee80211_free_hw(priv->hw);
3464  out:
3465         return err;
3466 }
3467
3468 static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
3469 {
3470         struct iwl_priv *priv = pci_get_drvdata(pdev);
3471         unsigned long flags;
3472
3473         if (!priv)
3474                 return;
3475
3476         wait_for_completion(&priv->_4965.firmware_loading_complete);
3477
3478         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3479
3480         iwl_legacy_dbgfs_unregister(priv);
3481         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3482
3483         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3484          * to be called and iwl4965_down since we are removing the device
3485          * we need to set STATUS_EXIT_PENDING bit.
3486          */
3487         set_bit(STATUS_EXIT_PENDING, &priv->status);
3488
3489         iwl_legacy_leds_exit(priv);
3490
3491         if (priv->mac80211_registered) {
3492                 ieee80211_unregister_hw(priv->hw);
3493                 priv->mac80211_registered = 0;
3494         } else {
3495                 iwl4965_down(priv);
3496         }
3497
3498         /*
3499          * Make sure device is reset to low power before unloading driver.
3500          * This may be redundant with iwl4965_down(), but there are paths to
3501          * run iwl4965_down() without calling apm_ops.stop(), and there are
3502          * paths to avoid running iwl4965_down() at all before leaving driver.
3503          * This (inexpensive) call *makes sure* device is reset.
3504          */
3505         iwl_legacy_apm_stop(priv);
3506
3507         /* make sure we flush any pending irq or
3508          * tasklet for the driver
3509          */
3510         spin_lock_irqsave(&priv->lock, flags);
3511         iwl_legacy_disable_interrupts(priv);
3512         spin_unlock_irqrestore(&priv->lock, flags);
3513
3514         iwl4965_synchronize_irq(priv);
3515
3516         iwl4965_dealloc_ucode_pci(priv);
3517
3518         if (priv->rxq.bd)
3519                 iwl4965_rx_queue_free(priv, &priv->rxq);
3520         iwl4965_hw_txq_ctx_free(priv);
3521
3522         iwl_legacy_eeprom_free(priv);
3523
3524
3525         /*netif_stop_queue(dev); */
3526         flush_workqueue(priv->workqueue);
3527
3528         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3529          * priv->workqueue... so we can't take down the workqueue
3530          * until now... */
3531         destroy_workqueue(priv->workqueue);
3532         priv->workqueue = NULL;
3533         iwl_legacy_free_traffic_mem(priv);
3534
3535         free_irq(priv->pci_dev->irq, priv);
3536         pci_disable_msi(priv->pci_dev);
3537         pci_iounmap(pdev, priv->hw_base);
3538         pci_release_regions(pdev);
3539         pci_disable_device(pdev);
3540         pci_set_drvdata(pdev, NULL);
3541
3542         iwl4965_uninit_drv(priv);
3543
3544         dev_kfree_skb(priv->beacon_skb);
3545
3546         ieee80211_free_hw(priv->hw);
3547 }
3548
3549 /*
3550  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
3551  * must be called under priv->lock and mac access
3552  */
3553 void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
3554 {
3555         iwl_legacy_write_prph(priv, IWL49_SCD_TXFACT, mask);
3556 }
3557
3558 /*****************************************************************************
3559  *
3560  * driver and module entry point
3561  *
3562  *****************************************************************************/
3563
3564 /* Hardware specific file defines the PCI IDs table for that hardware module */
3565 static DEFINE_PCI_DEVICE_TABLE(iwl4965_hw_card_ids) = {
3566 #if defined(CONFIG_IWL4965_MODULE) || defined(CONFIG_IWL4965)
3567         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_cfg)},
3568         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_cfg)},
3569 #endif /* CONFIG_IWL4965 */
3570
3571         {0}
3572 };
3573 MODULE_DEVICE_TABLE(pci, iwl4965_hw_card_ids);
3574
3575 static struct pci_driver iwl4965_driver = {
3576         .name = DRV_NAME,
3577         .id_table = iwl4965_hw_card_ids,
3578         .probe = iwl4965_pci_probe,
3579         .remove = __devexit_p(iwl4965_pci_remove),
3580         .driver.pm = IWL_LEGACY_PM_OPS,
3581 };
3582
3583 static int __init iwl4965_init(void)
3584 {
3585
3586         int ret;
3587         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
3588         pr_info(DRV_COPYRIGHT "\n");
3589
3590         ret = iwl4965_rate_control_register();
3591         if (ret) {
3592                 pr_err("Unable to register rate control algorithm: %d\n", ret);
3593                 return ret;
3594         }
3595
3596         ret = pci_register_driver(&iwl4965_driver);
3597         if (ret) {
3598                 pr_err("Unable to initialize PCI module\n");
3599                 goto error_register;
3600         }
3601
3602         return ret;
3603
3604 error_register:
3605         iwl4965_rate_control_unregister();
3606         return ret;
3607 }
3608
3609 static void __exit iwl4965_exit(void)
3610 {
3611         pci_unregister_driver(&iwl4965_driver);
3612         iwl4965_rate_control_unregister();
3613 }
3614
3615 module_exit(iwl4965_exit);
3616 module_init(iwl4965_init);
3617
3618 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
3619 module_param_named(debug, iwlegacy_debug_level, uint, S_IRUGO | S_IWUSR);
3620 MODULE_PARM_DESC(debug, "debug output mask");
3621 #endif
3622
3623 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, S_IRUGO);
3624 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
3625 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, S_IRUGO);
3626 MODULE_PARM_DESC(queues_num, "number of hw queues.");
3627 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, S_IRUGO);
3628 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
3629 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K,
3630                    int, S_IRUGO);
3631 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
3632 module_param_named(fw_restart, iwl4965_mod_params.restart_fw, int, S_IRUGO);
3633 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");