drivers/net/wireless/iwlegacy/iwl-4965-lib.c

   1 /******************************************************************************
   2  *
   3  * GPL LICENSE SUMMARY
   4  *
   5  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of version 2 of the GNU General Public License as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19  * USA
  20  *
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29 #include <linux/etherdevice.h>
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/sched.h>
  34
  35 #include "iwl-dev.h"
  36 #include "iwl-core.h"
  37 #include "iwl-io.h"
  38 #include "iwl-helpers.h"
  39 #include "iwl-4965-hw.h"
  40 #include "iwl-4965.h"
  41 #include "iwl-sta.h"
  42
  43 void iwl4965_check_abort_status(struct iwl_priv *priv,
  44                             u8 frame_count, u32 status)
  45 {
  46         if (frame_count == 1 && status == TX_STATUS_FAIL_RFKILL_FLUSH) {
  47                 IWL_ERR(priv, "Tx flush command to flush out all frames\n");
  48                 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  49                         queue_work(priv->workqueue, &priv->tx_flush);
  50         }
  51 }
  52
  53 /*
  54  * EEPROM
  55  */
  56 struct iwl_mod_params iwl4965_mod_params = {
  57         .amsdu_size_8K = 1,
  58         .restart_fw = 1,
  59         /* the rest are 0 by default */
  60 };
  61
  62 void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  63 {
  64         unsigned long flags;
  65         int i;
  66         spin_lock_irqsave(&rxq->lock, flags);
  67         INIT_LIST_HEAD(&rxq->rx_free);
  68         INIT_LIST_HEAD(&rxq->rx_used);
  69         /* Fill the rx_used queue with _all_ of the Rx buffers */
  70         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  71                 /* In the reset function, these buffers may have been allocated
  72                  * to an SKB, so we need to unmap and free potential storage */
  73                 if (rxq->pool[i].page != NULL) {
  74                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  75                                 PAGE_SIZE << priv->hw_params.rx_page_order,
  76                                 PCI_DMA_FROMDEVICE);
  77                         __iwl_legacy_free_pages(priv, rxq->pool[i].page);
  78                         rxq->pool[i].page = NULL;
  79                 }
  80                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  81         }
  82
  83         for (i = 0; i < RX_QUEUE_SIZE; i++)
  84                 rxq->queue[i] = NULL;
  85
  86         /* Set us so that we have processed and used all buffers, but have
  87          * not restocked the Rx queue with fresh buffers */
  88         rxq->read = rxq->write = 0;
  89         rxq->write_actual = 0;
  90         rxq->free_count = 0;
  91         spin_unlock_irqrestore(&rxq->lock, flags);
  92 }
  93
  94 int iwl4965_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  95 {
  96         u32 rb_size;
  97         const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
  98         u32 rb_timeout = 0;
  99
 100         if (priv->cfg->mod_params->amsdu_size_8K)
 101                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
 102         else
 103                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
 104
 105         /* Stop Rx DMA */
 106         iwl_legacy_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 107
 108         /* Reset driver's Rx queue write index */
 109         iwl_legacy_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
 110
 111         /* Tell device where to find RBD circular buffer in DRAM */
 112         iwl_legacy_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
 113                            (u32)(rxq->bd_dma >> 8));
 114
 115         /* Tell device where in DRAM to update its Rx status */
 116         iwl_legacy_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
 117                            rxq->rb_stts_dma >> 4);
 118
 119         /* Enable Rx DMA
 120          * Direct rx interrupts to hosts
 121          * Rx buffer size 4 or 8k
 122          * RB timeout 0x10
 123          * 256 RBDs
 124          */
 125         iwl_legacy_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
 126                            FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
 127                            FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
 128                            FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
 129                            rb_size|
 130                            (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
 131                            (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
 132
 133         /* Set interrupt coalescing timer to default (2048 usecs) */
 134         iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_TIMEOUT_DEF);
 135
 136         return 0;
 137 }
 138
 139 static void iwl4965_set_pwr_vmain(struct iwl_priv *priv)
 140 {
 141 /*
 142  * (for documentation purposes)
 143  * to set power to V_AUX, do:
 144
 145                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 146                         iwl_legacy_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 147                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 148                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 149  */
 150
 151         iwl_legacy_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 152                                APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 153                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 154 }
 155
 156 int iwl4965_hw_nic_init(struct iwl_priv *priv)
 157 {
 158         unsigned long flags;
 159         struct iwl_rx_queue *rxq = &priv->rxq;
 160         int ret;
 161
 162         /* nic_init */
 163         spin_lock_irqsave(&priv->lock, flags);
 164         priv->cfg->ops->lib->apm_ops.init(priv);
 165
 166         /* Set interrupt coalescing calibration timer to default (512 usecs) */
 167         iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_CALIB_TIMEOUT_DEF);
 168
 169         spin_unlock_irqrestore(&priv->lock, flags);
 170
 171         iwl4965_set_pwr_vmain(priv);
 172
 173         priv->cfg->ops->lib->apm_ops.config(priv);
 174
 175         /* Allocate the RX queue, or reset if it is already allocated */
 176         if (!rxq->bd) {
 177                 ret = iwl_legacy_rx_queue_alloc(priv);
 178                 if (ret) {
 179                         IWL_ERR(priv, "Unable to initialize Rx queue\n");
 180                         return -ENOMEM;
 181                 }
 182         } else
 183                 iwl4965_rx_queue_reset(priv, rxq);
 184
 185         iwl4965_rx_replenish(priv);
 186
 187         iwl4965_rx_init(priv, rxq);
 188
 189         spin_lock_irqsave(&priv->lock, flags);
 190
 191         rxq->need_update = 1;
 192         iwl_legacy_rx_queue_update_write_ptr(priv, rxq);
 193
 194         spin_unlock_irqrestore(&priv->lock, flags);
 195
 196         /* Allocate or reset and init all Tx and Command queues */
 197         if (!priv->txq) {
 198                 ret = iwl4965_txq_ctx_alloc(priv);
 199                 if (ret)
 200                         return ret;
 201         } else
 202                 iwl4965_txq_ctx_reset(priv);
 203
 204         set_bit(STATUS_INIT, &priv->status);
 205
 206         return 0;
 207 }
 208
 209 /**
 210  * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
 211  */
 212 static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
 213                                           dma_addr_t dma_addr)
 214 {
 215         return cpu_to_le32((u32)(dma_addr >> 8));
 216 }
 217
 218 /**
 219  * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
 220  *
 221  * If there are slots in the RX queue that need to be restocked,
 222  * and we have free pre-allocated buffers, fill the ranks as much
 223  * as we can, pulling from rx_free.
 224  *
 225  * This moves the 'write' index forward to catch up with 'processed', and
 226  * also updates the memory address in the firmware to reference the new
 227  * target buffer.
 228  */
 229 void iwl4965_rx_queue_restock(struct iwl_priv *priv)
 230 {
 231         struct iwl_rx_queue *rxq = &priv->rxq;
 232         struct list_head *element;
 233         struct iwl_rx_mem_buffer *rxb;
 234         unsigned long flags;
 235
 236         spin_lock_irqsave(&rxq->lock, flags);
 237         while ((iwl_legacy_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
 238                 /* The overwritten rxb must be a used one */
 239                 rxb = rxq->queue[rxq->write];
 240                 BUG_ON(rxb && rxb->page);
 241
 242                 /* Get next free Rx buffer, remove from free list */
 243                 element = rxq->rx_free.next;
 244                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
 245                 list_del(element);
 246
 247                 /* Point to Rx buffer via next RBD in circular buffer */
 248                 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv,
 249                                                               rxb->page_dma);
 250                 rxq->queue[rxq->write] = rxb;
 251                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
 252                 rxq->free_count--;
 253         }
 254         spin_unlock_irqrestore(&rxq->lock, flags);
 255         /* If the pre-allocated buffer pool is dropping low, schedule to
 256          * refill it */
 257         if (rxq->free_count <= RX_LOW_WATERMARK)
 258                 queue_work(priv->workqueue, &priv->rx_replenish);
 259
 260
 261         /* If we've added more space for the firmware to place data, tell it.
 262          * Increment device's write pointer in multiples of 8. */
 263         if (rxq->write_actual != (rxq->write & ~0x7)) {
 264                 spin_lock_irqsave(&rxq->lock, flags);
 265                 rxq->need_update = 1;
 266                 spin_unlock_irqrestore(&rxq->lock, flags);
 267                 iwl_legacy_rx_queue_update_write_ptr(priv, rxq);
 268         }
 269 }
 270
 271 /**
 272  * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
 273  *
 274  * When moving to rx_free an SKB is allocated for the slot.
 275  *
 276  * Also restock the Rx queue via iwl_rx_queue_restock.
 277  * This is called as a scheduled work item (except for during initialization)
 278  */
 279 static void iwl4965_rx_allocate(struct iwl_priv *priv, gfp_t priority)
 280 {
 281         struct iwl_rx_queue *rxq = &priv->rxq;
 282         struct list_head *element;
 283         struct iwl_rx_mem_buffer *rxb;
 284         struct page *page;
 285         unsigned long flags;
 286         gfp_t gfp_mask = priority;
 287
 288         while (1) {
 289                 spin_lock_irqsave(&rxq->lock, flags);
 290                 if (list_empty(&rxq->rx_used)) {
 291                         spin_unlock_irqrestore(&rxq->lock, flags);
 292                         return;
 293                 }
 294                 spin_unlock_irqrestore(&rxq->lock, flags);
 295
 296                 if (rxq->free_count > RX_LOW_WATERMARK)
 297                         gfp_mask |= __GFP_NOWARN;
 298
 299                 if (priv->hw_params.rx_page_order > 0)
 300                         gfp_mask |= __GFP_COMP;
 301
 302                 /* Alloc a new receive buffer */
 303                 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
 304                 if (!page) {
 305                         if (net_ratelimit())
 306                                 IWL_DEBUG_INFO(priv, "alloc_pages failed, "
 307                                                "order: %d\n",
 308                                                priv->hw_params.rx_page_order);
 309
 310                         if ((rxq->free_count <= RX_LOW_WATERMARK) &&
 311                             net_ratelimit())
 312                                 IWL_CRIT(priv,
 313                                         "Failed to alloc_pages with %s. "
 314                                         "Only %u free buffers remaining.\n",
 315                                          priority == GFP_ATOMIC ?
 316                                                  "GFP_ATOMIC" : "GFP_KERNEL",
 317                                          rxq->free_count);
 318                         /* We don't reschedule replenish work here -- we will
 319                          * call the restock method and if it still needs
 320                          * more buffers it will schedule replenish */
 321                         return;
 322                 }
 323
 324                 spin_lock_irqsave(&rxq->lock, flags);
 325
 326                 if (list_empty(&rxq->rx_used)) {
 327                         spin_unlock_irqrestore(&rxq->lock, flags);
 328                         __free_pages(page, priv->hw_params.rx_page_order);
 329                         return;
 330                 }
 331                 element = rxq->rx_used.next;
 332                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
 333                 list_del(element);
 334
 335                 spin_unlock_irqrestore(&rxq->lock, flags);
 336
 337                 BUG_ON(rxb->page);
 338                 rxb->page = page;
 339                 /* Get physical address of the RB */
 340                 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
 341                                 PAGE_SIZE << priv->hw_params.rx_page_order,
 342                                 PCI_DMA_FROMDEVICE);
 343                 /* dma address must be no more than 36 bits */
 344                 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
 345                 /* and also 256 byte aligned! */
 346                 BUG_ON(rxb->page_dma & DMA_BIT_MASK(8));
 347
 348                 spin_lock_irqsave(&rxq->lock, flags);
 349
 350                 list_add_tail(&rxb->list, &rxq->rx_free);
 351                 rxq->free_count++;
 352                 priv->alloc_rxb_page++;
 353
 354                 spin_unlock_irqrestore(&rxq->lock, flags);
 355         }
 356 }
 357
 358 void iwl4965_rx_replenish(struct iwl_priv *priv)
 359 {
 360         unsigned long flags;
 361
 362         iwl4965_rx_allocate(priv, GFP_KERNEL);
 363
 364         spin_lock_irqsave(&priv->lock, flags);
 365         iwl4965_rx_queue_restock(priv);
 366         spin_unlock_irqrestore(&priv->lock, flags);
 367 }
 368
 369 void iwl4965_rx_replenish_now(struct iwl_priv *priv)
 370 {
 371         iwl4965_rx_allocate(priv, GFP_ATOMIC);
 372
 373         iwl4965_rx_queue_restock(priv);
 374 }
 375
 376 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
 377  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
 378  * This free routine walks the list of POOL entries and if SKB is set to
 379  * non NULL it is unmapped and freed
 380  */
 381 void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 382 {
 383         int i;
 384         for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
 385                 if (rxq->pool[i].page != NULL) {
 386                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
 387                                 PAGE_SIZE << priv->hw_params.rx_page_order,
 388                                 PCI_DMA_FROMDEVICE);
 389                         __iwl_legacy_free_pages(priv, rxq->pool[i].page);
 390                         rxq->pool[i].page = NULL;
 391                 }
 392         }
 393
 394         dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
 395                           rxq->bd_dma);
 396         dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
 397                           rxq->rb_stts, rxq->rb_stts_dma);
 398         rxq->bd = NULL;
 399         rxq->rb_stts  = NULL;
 400 }
 401
 402 int iwl4965_rxq_stop(struct iwl_priv *priv)
 403 {
 404
 405         /* stop Rx DMA */
 406         iwl_legacy_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 407         iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
 408                             FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
 409
 410         return 0;
 411 }
 412
 413 int iwl4965_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
 414 {
 415         int idx = 0;
 416         int band_offset = 0;
 417
 418         /* HT rate format: mac80211 wants an MCS number, which is just LSB */
 419         if (rate_n_flags & RATE_MCS_HT_MSK) {
 420                 idx = (rate_n_flags & 0xff);
 421                 return idx;
 422         /* Legacy rate format, search for match in table */
 423         } else {
 424                 if (band == IEEE80211_BAND_5GHZ)
 425                         band_offset = IWL_FIRST_OFDM_RATE;
 426                 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
 427                         if (iwlegacy_rates[idx].plcp == (rate_n_flags & 0xFF))
 428                                 return idx - band_offset;
 429         }
 430
 431         return -1;
 432 }
 433
 434 static int iwl4965_calc_rssi(struct iwl_priv *priv,
 435                              struct iwl_rx_phy_res *rx_resp)
 436 {
 437         /* data from PHY/DSP regarding signal strength, etc.,
 438          *   contents are always there, not configurable by host.  */
 439         struct iwl4965_rx_non_cfg_phy *ncphy =
 440             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
 441         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
 442                         >> IWL49_AGC_DB_POS;
 443
 444         u32 valid_antennae =
 445             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
 446                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
 447         u8 max_rssi = 0;
 448         u32 i;
 449
 450         /* Find max rssi among 3 possible receivers.
 451          * These values are measured by the digital signal processor (DSP).
 452          * They should stay fairly constant even as the signal strength varies,
 453          *   if the radio's automatic gain control (AGC) is working right.
 454          * AGC value (see below) will provide the "interesting" info. */
 455         for (i = 0; i < 3; i++)
 456                 if (valid_antennae & (1 << i))
 457                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
 458
 459         IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
 460                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
 461                 max_rssi, agc);
 462
 463         /* dBm = max_rssi dB - agc dB - constant.
 464          * Higher AGC (higher radio gain) means lower signal. */
 465         return max_rssi - agc - IWL4965_RSSI_OFFSET;
 466 }
 467
 468
 469 static u32 iwl4965_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
 470 {
 471         u32 decrypt_out = 0;
 472
 473         if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
 474                                         RX_RES_STATUS_STATION_FOUND)
 475                 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
 476                                 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
 477
 478         decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
 479
 480         /* packet was not encrypted */
 481         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
 482                                         RX_RES_STATUS_SEC_TYPE_NONE)
 483                 return decrypt_out;
 484
 485         /* packet was encrypted with unknown alg */
 486         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
 487                                         RX_RES_STATUS_SEC_TYPE_ERR)
 488                 return decrypt_out;
 489
 490         /* decryption was not done in HW */
 491         if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
 492                                         RX_MPDU_RES_STATUS_DEC_DONE_MSK)
 493                 return decrypt_out;
 494
 495         switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
 496
 497         case RX_RES_STATUS_SEC_TYPE_CCMP:
 498                 /* alg is CCM: check MIC only */
 499                 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
 500                         /* Bad MIC */
 501                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
 502                 else
 503                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
 504
 505                 break;
 506
 507         case RX_RES_STATUS_SEC_TYPE_TKIP:
 508                 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
 509                         /* Bad TTAK */
 510                         decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
 511                         break;
 512                 }
 513                 /* fall through if TTAK OK */
 514         default:
 515                 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
 516                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
 517                 else
 518                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
 519                 break;
 520         }
 521
 522         IWL_DEBUG_RX(priv, "decrypt_in:0x%x  decrypt_out = 0x%x\n",
 523                                         decrypt_in, decrypt_out);
 524
 525         return decrypt_out;
 526 }
 527
 528 static void iwl4965_pass_packet_to_mac80211(struct iwl_priv *priv,
 529                                         struct ieee80211_hdr *hdr,
 530                                         u16 len,
 531                                         u32 ampdu_status,
 532                                         struct iwl_rx_mem_buffer *rxb,
 533                                         struct ieee80211_rx_status *stats)
 534 {
 535         struct sk_buff *skb;
 536         __le16 fc = hdr->frame_control;
 537
 538         /* We only process data packets if the interface is open */
 539         if (unlikely(!priv->is_open)) {
 540                 IWL_DEBUG_DROP_LIMIT(priv,
 541                     "Dropping packet while interface is not open.\n");
 542                 return;
 543         }
 544
 545         /* In case of HW accelerated crypto and bad decryption, drop */
 546         if (!priv->cfg->mod_params->sw_crypto &&
 547             iwl_legacy_set_decrypted_flag(priv, hdr, ampdu_status, stats))
 548                 return;
 549
 550         skb = dev_alloc_skb(128);
 551         if (!skb) {
 552                 IWL_ERR(priv, "dev_alloc_skb failed\n");
 553                 return;
 554         }
 555
 556         skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb), len);
 557
 558         iwl_legacy_update_stats(priv, false, fc, len);
 559         memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
 560
 561         ieee80211_rx(priv->hw, skb);
 562         priv->alloc_rxb_page--;
 563         rxb->page = NULL;
 564 }
 565
 566 /* Called for REPLY_RX (legacy ABG frames), or
 567  * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
 568 void iwl4965_rx_reply_rx(struct iwl_priv *priv,
 569                                 struct iwl_rx_mem_buffer *rxb)
 570 {
 571         struct ieee80211_hdr *header;
 572         struct ieee80211_rx_status rx_status;
 573         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 574         struct iwl_rx_phy_res *phy_res;
 575         __le32 rx_pkt_status;
 576         struct iwl_rx_mpdu_res_start *amsdu;
 577         u32 len;
 578         u32 ampdu_status;
 579         u32 rate_n_flags;
 580
 581         /**
 582          * REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
 583          *      REPLY_RX: physical layer info is in this buffer
 584          *      REPLY_RX_MPDU_CMD: physical layer info was sent in separate
 585          *              command and cached in priv->last_phy_res
 586          *
 587          * Here we set up local variables depending on which command is
 588          * received.
 589          */
 590         if (pkt->hdr.cmd == REPLY_RX) {
 591                 phy_res = (struct iwl_rx_phy_res *)pkt->u.raw;
 592                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res)
 593                                 + phy_res->cfg_phy_cnt);
 594
 595                 len = le16_to_cpu(phy_res->byte_count);
 596                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) +
 597                                 phy_res->cfg_phy_cnt + len);
 598                 ampdu_status = le32_to_cpu(rx_pkt_status);
 599         } else {
 600                 if (!priv->_4965.last_phy_res_valid) {
 601                         IWL_ERR(priv, "MPDU frame without cached PHY data\n");
 602                         return;
 603                 }
 604                 phy_res = &priv->_4965.last_phy_res;
 605                 amsdu = (struct iwl_rx_mpdu_res_start *)pkt->u.raw;
 606                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
 607                 len = le16_to_cpu(amsdu->byte_count);
 608                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
 609                 ampdu_status = iwl4965_translate_rx_status(priv,
 610                                 le32_to_cpu(rx_pkt_status));
 611         }
 612
 613         if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
 614                 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
 615                                 phy_res->cfg_phy_cnt);
 616                 return;
 617         }
 618
 619         if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
 620             !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 621                 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
 622                                 le32_to_cpu(rx_pkt_status));
 623                 return;
 624         }
 625
 626         /* This will be used in several places later */
 627         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
 628
 629         /* rx_status carries information about the packet to mac80211 */
 630         rx_status.mactime = le64_to_cpu(phy_res->timestamp);
 631         rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 632                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 633         rx_status.freq =
 634                 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel),
 635                                                         rx_status.band);
 636         rx_status.rate_idx =
 637                 iwl4965_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
 638         rx_status.flag = 0;
 639
 640         /* TSF isn't reliable. In order to allow smooth user experience,
 641          * this W/A doesn't propagate it to the mac80211 */
 642         /*rx_status.flag |= RX_FLAG_MACTIME_MPDU;*/
 643
 644         priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
 645
 646         /* Find max signal strength (dBm) among 3 antenna/receiver chains */
 647         rx_status.signal = iwl4965_calc_rssi(priv, phy_res);
 648
 649         iwl_legacy_dbg_log_rx_data_frame(priv, len, header);
 650         IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, TSF %llu\n",
 651                 rx_status.signal, (unsigned long long)rx_status.mactime);
 652
 653         /*
 654          * "antenna number"
 655          *
 656          * It seems that the antenna field in the phy flags value
 657          * is actually a bit field. This is undefined by radiotap,
 658          * it wants an actual antenna number but I always get "7"
 659          * for most legacy frames I receive indicating that the
 660          * same frame was received on all three RX chains.
 661          *
 662          * I think this field should be removed in favor of a
 663          * new 802.11n radiotap field "RX chains" that is defined
 664          * as a bitmask.
 665          */
 666         rx_status.antenna =
 667                 (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK)
 668                 >> RX_RES_PHY_FLAGS_ANTENNA_POS;
 669
 670         /* set the preamble flag if appropriate */
 671         if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
 672                 rx_status.flag |= RX_FLAG_SHORTPRE;
 673
 674         /* Set up the HT phy flags */
 675         if (rate_n_flags & RATE_MCS_HT_MSK)
 676                 rx_status.flag |= RX_FLAG_HT;
 677         if (rate_n_flags & RATE_MCS_HT40_MSK)
 678                 rx_status.flag |= RX_FLAG_40MHZ;
 679         if (rate_n_flags & RATE_MCS_SGI_MSK)
 680                 rx_status.flag |= RX_FLAG_SHORT_GI;
 681
 682         iwl4965_pass_packet_to_mac80211(priv, header, len, ampdu_status,
 683                                     rxb, &rx_status);
 684 }
 685
 686 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
 687  * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
 688 void iwl4965_rx_reply_rx_phy(struct iwl_priv *priv,
 689                             struct iwl_rx_mem_buffer *rxb)
 690 {
 691         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 692         priv->_4965.last_phy_res_valid = true;
 693         memcpy(&priv->_4965.last_phy_res, pkt->u.raw,
 694                sizeof(struct iwl_rx_phy_res));
 695 }
 696
 697 static int iwl4965_get_single_channel_for_scan(struct iwl_priv *priv,
 698                                            struct ieee80211_vif *vif,
 699                                            enum ieee80211_band band,
 700                                            struct iwl_scan_channel *scan_ch)
 701 {
 702         const struct ieee80211_supported_band *sband;
 703         u16 passive_dwell = 0;
 704         u16 active_dwell = 0;
 705         int added = 0;
 706         u16 channel = 0;
 707
 708         sband = iwl_get_hw_mode(priv, band);
 709         if (!sband) {
 710                 IWL_ERR(priv, "invalid band\n");
 711                 return added;
 712         }
 713
 714         active_dwell = iwl_legacy_get_active_dwell_time(priv, band, 0);
 715         passive_dwell = iwl_legacy_get_passive_dwell_time(priv, band, vif);
 716
 717         if (passive_dwell <= active_dwell)
 718                 passive_dwell = active_dwell + 1;
 719
 720         channel = iwl_legacy_get_single_channel_number(priv, band);
 721         if (channel) {
 722                 scan_ch->channel = cpu_to_le16(channel);
 723                 scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
 724                 scan_ch->active_dwell = cpu_to_le16(active_dwell);
 725                 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
 726                 /* Set txpower levels to defaults */
 727                 scan_ch->dsp_atten = 110;
 728                 if (band == IEEE80211_BAND_5GHZ)
 729                         scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
 730                 else
 731                         scan_ch->tx_gain = ((1 << 5) | (5 << 3));
 732                 added++;
 733         } else
 734                 IWL_ERR(priv, "no valid channel found\n");
 735         return added;
 736 }
 737
 738 static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
 739                                      struct ieee80211_vif *vif,
 740                                      enum ieee80211_band band,
 741                                      u8 is_active, u8 n_probes,
 742                                      struct iwl_scan_channel *scan_ch)
 743 {
 744         struct ieee80211_channel *chan;
 745         const struct ieee80211_supported_band *sband;
 746         const struct iwl_channel_info *ch_info;
 747         u16 passive_dwell = 0;
 748         u16 active_dwell = 0;
 749         int added, i;
 750         u16 channel;
 751
 752         sband = iwl_get_hw_mode(priv, band);
 753         if (!sband)
 754                 return 0;
 755
 756         active_dwell = iwl_legacy_get_active_dwell_time(priv, band, n_probes);
 757         passive_dwell = iwl_legacy_get_passive_dwell_time(priv, band, vif);
 758
 759         if (passive_dwell <= active_dwell)
 760                 passive_dwell = active_dwell + 1;
 761
 762         for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
 763                 chan = priv->scan_request->channels[i];
 764
 765                 if (chan->band != band)
 766                         continue;
 767
 768                 channel = chan->hw_value;
 769                 scan_ch->channel = cpu_to_le16(channel);
 770
 771                 ch_info = iwl_legacy_get_channel_info(priv, band, channel);
 772                 if (!iwl_legacy_is_channel_valid(ch_info)) {
 773                         IWL_DEBUG_SCAN(priv,
 774                                  "Channel %d is INVALID for this band.\n",
 775                                         channel);
 776                         continue;
 777                 }
 778
 779                 if (!is_active || iwl_legacy_is_channel_passive(ch_info) ||
 780                     (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN))
 781                         scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
 782                 else
 783                         scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
 784
 785                 if (n_probes)
 786                         scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
 787
 788                 scan_ch->active_dwell = cpu_to_le16(active_dwell);
 789                 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
 790
 791                 /* Set txpower levels to defaults */
 792                 scan_ch->dsp_atten = 110;
 793
 794                 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
 795                  * power level:
 796                  * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
 797                  */
 798                 if (band == IEEE80211_BAND_5GHZ)
 799                         scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
 800                 else
 801                         scan_ch->tx_gain = ((1 << 5) | (5 << 3));
 802
 803                 IWL_DEBUG_SCAN(priv, "Scanning ch=%d prob=0x%X [%s %d]\n",
 804                                channel, le32_to_cpu(scan_ch->type),
 805                                (scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ?
 806                                 "ACTIVE" : "PASSIVE",
 807                                (scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ?
 808                                active_dwell : passive_dwell);
 809
 810                 scan_ch++;
 811                 added++;
 812         }
 813
 814         IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
 815         return added;
 816 }
 817
 818 int iwl4965_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
 819 {
 820         struct iwl_host_cmd cmd = {
 821                 .id = REPLY_SCAN_CMD,
 822                 .len = sizeof(struct iwl_scan_cmd),
 823                 .flags = CMD_SIZE_HUGE,
 824         };
 825         struct iwl_scan_cmd *scan;
 826         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
 827         u32 rate_flags = 0;
 828         u16 cmd_len;
 829         u16 rx_chain = 0;
 830         enum ieee80211_band band;
 831         u8 n_probes = 0;
 832         u8 rx_ant = priv->hw_params.valid_rx_ant;
 833         u8 rate;
 834         bool is_active = false;
 835         int  chan_mod;
 836         u8 active_chains;
 837         u8 scan_tx_antennas = priv->hw_params.valid_tx_ant;
 838         int ret;
 839
 840         lockdep_assert_held(&priv->mutex);
 841
 842         if (vif)
 843                 ctx = iwl_legacy_rxon_ctx_from_vif(vif);
 844
 845         if (!priv->scan_cmd) {
 846                 priv->scan_cmd = kmalloc(sizeof(struct iwl_scan_cmd) +
 847                                          IWL_MAX_SCAN_SIZE, GFP_KERNEL);
 848                 if (!priv->scan_cmd) {
 849                         IWL_DEBUG_SCAN(priv,
 850                                        "fail to allocate memory for scan\n");
 851                         return -ENOMEM;
 852                 }
 853         }
 854         scan = priv->scan_cmd;
 855         memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE);
 856
 857         scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
 858         scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
 859
 860         if (iwl_legacy_is_any_associated(priv)) {
 861                 u16 interval = 0;
 862                 u32 extra;
 863                 u32 suspend_time = 100;
 864                 u32 scan_suspend_time = 100;
 865
 866                 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
 867                 if (priv->is_internal_short_scan)
 868                         interval = 0;
 869                 else
 870                         interval = vif->bss_conf.beacon_int;
 871
 872                 scan->suspend_time = 0;
 873                 scan->max_out_time = cpu_to_le32(200 * 1024);
 874                 if (!interval)
 875                         interval = suspend_time;
 876
 877                 extra = (suspend_time / interval) << 22;
 878                 scan_suspend_time = (extra |
 879                     ((suspend_time % interval) * 1024));
 880                 scan->suspend_time = cpu_to_le32(scan_suspend_time);
 881                 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
 882                                scan_suspend_time, interval);
 883         }
 884
 885         if (priv->is_internal_short_scan) {
 886                 IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
 887         } else if (priv->scan_request->n_ssids) {
 888                 int i, p = 0;
 889                 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
 890                 for (i = 0; i < priv->scan_request->n_ssids; i++) {
 891                         /* always does wildcard anyway */
 892                         if (!priv->scan_request->ssids[i].ssid_len)
 893                                 continue;
 894                         scan->direct_scan[p].id = WLAN_EID_SSID;
 895                         scan->direct_scan[p].len =
 896                                 priv->scan_request->ssids[i].ssid_len;
 897                         memcpy(scan->direct_scan[p].ssid,
 898                                priv->scan_request->ssids[i].ssid,
 899                                priv->scan_request->ssids[i].ssid_len);
 900                         n_probes++;
 901                         p++;
 902                 }
 903                 is_active = true;
 904         } else
 905                 IWL_DEBUG_SCAN(priv, "Start passive scan.\n");
 906
 907         scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
 908         scan->tx_cmd.sta_id = ctx->bcast_sta_id;
 909         scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 910
 911         switch (priv->scan_band) {
 912         case IEEE80211_BAND_2GHZ:
 913                 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
 914                 chan_mod = le32_to_cpu(
 915                         priv->contexts[IWL_RXON_CTX_BSS].active.flags &
 916                                                 RXON_FLG_CHANNEL_MODE_MSK)
 917                                        >> RXON_FLG_CHANNEL_MODE_POS;
 918                 if (chan_mod == CHANNEL_MODE_PURE_40) {
 919                         rate = IWL_RATE_6M_PLCP;
 920                 } else {
 921                         rate = IWL_RATE_1M_PLCP;
 922                         rate_flags = RATE_MCS_CCK_MSK;
 923                 }
 924                 break;
 925         case IEEE80211_BAND_5GHZ:
 926                 rate = IWL_RATE_6M_PLCP;
 927                 break;
 928         default:
 929                 IWL_WARN(priv, "Invalid scan band\n");
 930                 return -EIO;
 931         }
 932
 933         /*
 934          * If active scanning is requested but a certain channel is
 935          * marked passive, we can do active scanning if we detect
 936          * transmissions.
 937          *
 938          * There is an issue with some firmware versions that triggers
 939          * a sysassert on a "good CRC threshold" of zero (== disabled),
 940          * on a radar channel even though this means that we should NOT
 941          * send probes.
 942          *
 943          * The "good CRC threshold" is the number of frames that we
 944          * need to receive during our dwell time on a channel before
 945          * sending out probes -- setting this to a huge value will
 946          * mean we never reach it, but at the same time work around
 947          * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
 948          * here instead of IWL_GOOD_CRC_TH_DISABLED.
 949          */
 950         scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
 951                                         IWL_GOOD_CRC_TH_NEVER;
 952
 953         band = priv->scan_band;
 954
 955         if (priv->cfg->scan_rx_antennas[band])
 956                 rx_ant = priv->cfg->scan_rx_antennas[band];
 957
 958         priv->scan_tx_ant[band] = iwl4965_toggle_tx_ant(priv,
 959                                                 priv->scan_tx_ant[band],
 960                                                     scan_tx_antennas);
 961         rate_flags |= iwl4965_ant_idx_to_flags(priv->scan_tx_ant[band]);
 962         scan->tx_cmd.rate_n_flags = iwl4965_hw_set_rate_n_flags(rate, rate_flags);
 963
 964         /* In power save mode use one chain, otherwise use all chains */
 965         if (test_bit(STATUS_POWER_PMI, &priv->status)) {
 966                 /* rx_ant has been set to all valid chains previously */
 967                 active_chains = rx_ant &
 968                                 ((u8)(priv->chain_noise_data.active_chains));
 969                 if (!active_chains)
 970                         active_chains = rx_ant;
 971
 972                 IWL_DEBUG_SCAN(priv, "chain_noise_data.active_chains: %u\n",
 973                                 priv->chain_noise_data.active_chains);
 974
 975                 rx_ant = iwl4965_first_antenna(active_chains);
 976         }
 977
 978         /* MIMO is not used here, but value is required */
 979         rx_chain |= priv->hw_params.valid_rx_ant << RXON_RX_CHAIN_VALID_POS;
 980         rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
 981         rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_SEL_POS;
 982         rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
 983         scan->rx_chain = cpu_to_le16(rx_chain);
 984         if (!priv->is_internal_short_scan) {
 985                 cmd_len = iwl_legacy_fill_probe_req(priv,
 986                                         (struct ieee80211_mgmt *)scan->data,
 987                                         vif->addr,
 988                                         priv->scan_request->ie,
 989                                         priv->scan_request->ie_len,
 990                                         IWL_MAX_SCAN_SIZE - sizeof(*scan));
 991         } else {
 992                 /* use bcast addr, will not be transmitted but must be valid */
 993                 cmd_len = iwl_legacy_fill_probe_req(priv,
 994                                         (struct ieee80211_mgmt *)scan->data,
 995                                         iwlegacy_bcast_addr, NULL, 0,
 996                                         IWL_MAX_SCAN_SIZE - sizeof(*scan));
 997
 998         }
 999         scan->tx_cmd.len = cpu_to_le16(cmd_len);
1000
1001         scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK |
1002                                RXON_FILTER_BCON_AWARE_MSK);
1003
1004         if (priv->is_internal_short_scan) {
1005                 scan->channel_count =
1006                         iwl4965_get_single_channel_for_scan(priv, vif, band,
1007                                 (void *)&scan->data[le16_to_cpu(
1008                                 scan->tx_cmd.len)]);
1009         } else {
1010                 scan->channel_count =
1011                         iwl4965_get_channels_for_scan(priv, vif, band,
1012                                 is_active, n_probes,
1013                                 (void *)&scan->data[le16_to_cpu(
1014                                 scan->tx_cmd.len)]);
1015         }
1016         if (scan->channel_count == 0) {
1017                 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
1018                 return -EIO;
1019         }
1020
1021         cmd.len += le16_to_cpu(scan->tx_cmd.len) +
1022             scan->channel_count * sizeof(struct iwl_scan_channel);
1023         cmd.data = scan;
1024         scan->len = cpu_to_le16(cmd.len);
1025
1026         set_bit(STATUS_SCAN_HW, &priv->status);
1027
1028         ret = iwl_legacy_send_cmd_sync(priv, &cmd);
1029         if (ret)
1030                 clear_bit(STATUS_SCAN_HW, &priv->status);
1031
1032         return ret;
1033 }
1034
1035 int iwl4965_manage_ibss_station(struct iwl_priv *priv,
1036                                struct ieee80211_vif *vif, bool add)
1037 {
1038         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
1039
1040         if (add)
1041                 return iwl4965_add_bssid_station(priv, vif_priv->ctx,
1042                                                 vif->bss_conf.bssid,
1043                                                 &vif_priv->ibss_bssid_sta_id);
1044         return iwl_legacy_remove_station(priv, vif_priv->ibss_bssid_sta_id,
1045                                   vif->bss_conf.bssid);
1046 }
1047
1048 void iwl4965_free_tfds_in_queue(struct iwl_priv *priv,
1049                             int sta_id, int tid, int freed)
1050 {
1051         lockdep_assert_held(&priv->sta_lock);
1052
1053         if (priv->stations[sta_id].tid[tid].tfds_in_queue >= freed)
1054                 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
1055         else {
1056                 IWL_DEBUG_TX(priv, "free more than tfds_in_queue (%u:%d)\n",
1057                         priv->stations[sta_id].tid[tid].tfds_in_queue,
1058                         freed);
1059                 priv->stations[sta_id].tid[tid].tfds_in_queue = 0;
1060         }
1061 }
1062
1063 #define IWL_TX_QUEUE_MSK        0xfffff
1064
1065 static bool iwl4965_is_single_rx_stream(struct iwl_priv *priv)
1066 {
1067         return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
1068                priv->current_ht_config.single_chain_sufficient;
1069 }
1070
1071 #define IWL_NUM_RX_CHAINS_MULTIPLE      3
1072 #define IWL_NUM_RX_CHAINS_SINGLE        2
1073 #define IWL_NUM_IDLE_CHAINS_DUAL        2
1074 #define IWL_NUM_IDLE_CHAINS_SINGLE      1
1075
1076 /*
1077  * Determine how many receiver/antenna chains to use.
1078  *
1079  * More provides better reception via diversity.  Fewer saves power
1080  * at the expense of throughput, but only when not in powersave to
1081  * start with.
1082  *
1083  * MIMO (dual stream) requires at least 2, but works better with 3.
1084  * This does not determine *which* chains to use, just how many.
1085  */
1086 static int iwl4965_get_active_rx_chain_count(struct iwl_priv *priv)
1087 {
1088         /* # of Rx chains to use when expecting MIMO. */
1089         if (iwl4965_is_single_rx_stream(priv))
1090                 return IWL_NUM_RX_CHAINS_SINGLE;
1091         else
1092                 return IWL_NUM_RX_CHAINS_MULTIPLE;
1093 }
1094
1095 /*
1096  * When we are in power saving mode, unless device support spatial
1097  * multiplexing power save, use the active count for rx chain count.
1098  */
1099 static int
1100 iwl4965_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
1101 {
1102         /* # Rx chains when idling, depending on SMPS mode */
1103         switch (priv->current_ht_config.smps) {
1104         case IEEE80211_SMPS_STATIC:
1105         case IEEE80211_SMPS_DYNAMIC:
1106                 return IWL_NUM_IDLE_CHAINS_SINGLE;
1107         case IEEE80211_SMPS_OFF:
1108                 return active_cnt;
1109         default:
1110                 WARN(1, "invalid SMPS mode %d",
1111                      priv->current_ht_config.smps);
1112                 return active_cnt;
1113         }
1114 }
1115
1116 /* up to 4 chains */
1117 static u8 iwl4965_count_chain_bitmap(u32 chain_bitmap)
1118 {
1119         u8 res;
1120         res = (chain_bitmap & BIT(0)) >> 0;
1121         res += (chain_bitmap & BIT(1)) >> 1;
1122         res += (chain_bitmap & BIT(2)) >> 2;
1123         res += (chain_bitmap & BIT(3)) >> 3;
1124         return res;
1125 }
1126
1127 /**
1128  * iwl4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1129  *
1130  * Selects how many and which Rx receivers/antennas/chains to use.
1131  * This should not be used for scan command ... it puts data in wrong place.
1132  */
1133 void iwl4965_set_rxon_chain(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
1134 {
1135         bool is_single = iwl4965_is_single_rx_stream(priv);
1136         bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
1137         u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1138         u32 active_chains;
1139         u16 rx_chain;
1140
1141         /* Tell uCode which antennas are actually connected.
1142          * Before first association, we assume all antennas are connected.
1143          * Just after first association, iwl4965_chain_noise_calibration()
1144          *    checks which antennas actually *are* connected. */
1145         if (priv->chain_noise_data.active_chains)
1146                 active_chains = priv->chain_noise_data.active_chains;
1147         else
1148                 active_chains = priv->hw_params.valid_rx_ant;
1149
1150         rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
1151
1152         /* How many receivers should we use? */
1153         active_rx_cnt = iwl4965_get_active_rx_chain_count(priv);
1154         idle_rx_cnt = iwl4965_get_idle_rx_chain_count(priv, active_rx_cnt);
1155
1156
1157         /* correct rx chain count according hw settings
1158          * and chain noise calibration
1159          */
1160         valid_rx_cnt = iwl4965_count_chain_bitmap(active_chains);
1161         if (valid_rx_cnt < active_rx_cnt)
1162                 active_rx_cnt = valid_rx_cnt;
1163
1164         if (valid_rx_cnt < idle_rx_cnt)
1165                 idle_rx_cnt = valid_rx_cnt;
1166
1167         rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1168         rx_chain |= idle_rx_cnt  << RXON_RX_CHAIN_CNT_POS;
1169
1170         ctx->staging.rx_chain = cpu_to_le16(rx_chain);
1171
1172         if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
1173                 ctx->staging.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1174         else
1175                 ctx->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1176
1177         IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
1178                         ctx->staging.rx_chain,
1179                         active_rx_cnt, idle_rx_cnt);
1180
1181         WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1182                 active_rx_cnt < idle_rx_cnt);
1183 }
1184
1185 u8 iwl4965_toggle_tx_ant(struct iwl_priv *priv, u8 ant, u8 valid)
1186 {
1187         int i;
1188         u8 ind = ant;
1189
1190         for (i = 0; i < RATE_ANT_NUM - 1; i++) {
1191                 ind = (ind + 1) < RATE_ANT_NUM ?  ind + 1 : 0;
1192                 if (valid & BIT(ind))
1193                         return ind;
1194         }
1195         return ant;
1196 }
1197
1198 static const char *iwl4965_get_fh_string(int cmd)
1199 {
1200         switch (cmd) {
1201         IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
1202         IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
1203         IWL_CMD(FH_RSCSR_CHNL0_WPTR);
1204         IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
1205         IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
1206         IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
1207         IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
1208         IWL_CMD(FH_TSSR_TX_STATUS_REG);
1209         IWL_CMD(FH_TSSR_TX_ERROR_REG);
1210         default:
1211                 return "UNKNOWN";
1212         }
1213 }
1214
1215 int iwl4965_dump_fh(struct iwl_priv *priv, char **buf, bool display)
1216 {
1217         int i;
1218 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1219         int pos = 0;
1220         size_t bufsz = 0;
1221 #endif
1222         static const u32 fh_tbl[] = {
1223                 FH_RSCSR_CHNL0_STTS_WPTR_REG,
1224                 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
1225                 FH_RSCSR_CHNL0_WPTR,
1226                 FH_MEM_RCSR_CHNL0_CONFIG_REG,
1227                 FH_MEM_RSSR_SHARED_CTRL_REG,
1228                 FH_MEM_RSSR_RX_STATUS_REG,
1229                 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
1230                 FH_TSSR_TX_STATUS_REG,
1231                 FH_TSSR_TX_ERROR_REG
1232         };
1233 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1234         if (display) {
1235                 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
1236                 *buf = kmalloc(bufsz, GFP_KERNEL);
1237                 if (!*buf)
1238                         return -ENOMEM;
1239                 pos += scnprintf(*buf + pos, bufsz - pos,
1240                                 "FH register values:\n");
1241                 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
1242                         pos += scnprintf(*buf + pos, bufsz - pos,
1243                                 "  %34s: 0X%08x\n",
1244                                 iwl4965_get_fh_string(fh_tbl[i]),
1245                                 iwl_legacy_read_direct32(priv, fh_tbl[i]));
1246                 }
1247                 return pos;
1248         }
1249 #endif
1250         IWL_ERR(priv, "FH register values:\n");
1251         for (i = 0; i <  ARRAY_SIZE(fh_tbl); i++) {
1252                 IWL_ERR(priv, "  %34s: 0X%08x\n",
1253                         iwl4965_get_fh_string(fh_tbl[i]),
1254                         iwl_legacy_read_direct32(priv, fh_tbl[i]));
1255         }
1256         return 0;
1257 }