drivers/net/wireless/b43legacy/main.c

   1 /*
   2  *
   3  *  Broadcom B43legacy wireless driver
   4  *
   5  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
   6  *  Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
   7  *  Copyright (c) 2005, 2006 Michael Buesch <m@bues.ch>
   8  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
   9  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  10  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  11  *
  12  *  Some parts of the code in this file are derived from the ipw2200
  13  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
  14
  15  *  This program is free software; you can redistribute it and/or modify
  16  *  it under the terms of the GNU General Public License as published by
  17  *  the Free Software Foundation; either version 2 of the License, or
  18  *  (at your option) any later version.
  19  *
  20  *  This program is distributed in the hope that it will be useful,
  21  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *  GNU General Public License for more details.
  24  *
  25  *  You should have received a copy of the GNU General Public License
  26  *  along with this program; see the file COPYING.  If not, write to
  27  *  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  28  *  Boston, MA 02110-1301, USA.
  29  *
  30  */
  31
  32 #include <linux/delay.h>
  33 #include <linux/init.h>
  34 #include <linux/module.h>
  35 #include <linux/if_arp.h>
  36 #include <linux/etherdevice.h>
  37 #include <linux/firmware.h>
  38 #include <linux/workqueue.h>
  39 #include <linux/sched.h>
  40 #include <linux/skbuff.h>
  41 #include <linux/dma-mapping.h>
  42 #include <linux/slab.h>
  43 #include <net/dst.h>
  44 #include <asm/unaligned.h>
  45
  46 #include "b43legacy.h"
  47 #include "main.h"
  48 #include "debugfs.h"
  49 #include "phy.h"
  50 #include "dma.h"
  51 #include "pio.h"
  52 #include "sysfs.h"
  53 #include "xmit.h"
  54 #include "radio.h"
  55
  56
  57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
  58 MODULE_AUTHOR("Martin Langer");
  59 MODULE_AUTHOR("Stefano Brivio");
  60 MODULE_AUTHOR("Michael Buesch");
  61 MODULE_LICENSE("GPL");
  62
  63 MODULE_FIRMWARE("b43legacy/ucode2.fw");
  64 MODULE_FIRMWARE("b43legacy/ucode4.fw");
  65
  66 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
  67 static int modparam_pio;
  68 module_param_named(pio, modparam_pio, int, 0444);
  69 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
  70 #elif defined(CONFIG_B43LEGACY_DMA)
  71 # define modparam_pio   0
  72 #elif defined(CONFIG_B43LEGACY_PIO)
  73 # define modparam_pio   1
  74 #endif
  75
  76 static int modparam_bad_frames_preempt;
  77 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  78 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
  79                  " Preemption");
  80
  81 static char modparam_fwpostfix[16];
  82 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
  83 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
  84
  85 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
  86 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
  87         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
  88         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
  89         SSB_DEVTABLE_END
  90 };
  91 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
  92
  93
  94 /* Channel and ratetables are shared for all devices.
  95  * They can't be const, because ieee80211 puts some precalculated
  96  * data in there. This data is the same for all devices, so we don't
  97  * get concurrency issues */
  98 #define RATETAB_ENT(_rateid, _flags) \
  99         {                                                               \
 100                 .bitrate        = B43legacy_RATE_TO_100KBPS(_rateid),   \
 101                 .hw_value       = (_rateid),                            \
 102                 .flags          = (_flags),                             \
 103         }
 104 /*
 105  * NOTE: When changing this, sync with xmit.c's
 106  *       b43legacy_plcp_get_bitrate_idx_* functions!
 107  */
 108 static struct ieee80211_rate __b43legacy_ratetable[] = {
 109         RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
 110         RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
 111         RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
 112         RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
 113         RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
 114         RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
 115         RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
 116         RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
 117         RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
 118         RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
 119         RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
 120         RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
 121 };
 122 #define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
 123 #define b43legacy_b_ratetable_size      4
 124 #define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
 125 #define b43legacy_g_ratetable_size      12
 126
 127 #define CHANTAB_ENT(_chanid, _freq) \
 128         {                                                       \
 129                 .center_freq    = (_freq),                      \
 130                 .hw_value       = (_chanid),                    \
 131         }
 132 static struct ieee80211_channel b43legacy_bg_chantable[] = {
 133         CHANTAB_ENT(1, 2412),
 134         CHANTAB_ENT(2, 2417),
 135         CHANTAB_ENT(3, 2422),
 136         CHANTAB_ENT(4, 2427),
 137         CHANTAB_ENT(5, 2432),
 138         CHANTAB_ENT(6, 2437),
 139         CHANTAB_ENT(7, 2442),
 140         CHANTAB_ENT(8, 2447),
 141         CHANTAB_ENT(9, 2452),
 142         CHANTAB_ENT(10, 2457),
 143         CHANTAB_ENT(11, 2462),
 144         CHANTAB_ENT(12, 2467),
 145         CHANTAB_ENT(13, 2472),
 146         CHANTAB_ENT(14, 2484),
 147 };
 148
 149 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
 150         .channels = b43legacy_bg_chantable,
 151         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 152         .bitrates = b43legacy_b_ratetable,
 153         .n_bitrates = b43legacy_b_ratetable_size,
 154 };
 155
 156 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
 157         .channels = b43legacy_bg_chantable,
 158         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 159         .bitrates = b43legacy_g_ratetable,
 160         .n_bitrates = b43legacy_g_ratetable_size,
 161 };
 162
 163 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
 164 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
 165 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
 166 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
 167
 168
 169 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
 170 {
 171         if (!wl || !wl->current_dev)
 172                 return 1;
 173         if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
 174                 return 1;
 175         /* We are up and running.
 176          * Ratelimit the messages to avoid DoS over the net. */
 177         return net_ratelimit();
 178 }
 179
 180 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
 181 {
 182         struct va_format vaf;
 183         va_list args;
 184
 185         if (!b43legacy_ratelimit(wl))
 186                 return;
 187
 188         va_start(args, fmt);
 189
 190         vaf.fmt = fmt;
 191         vaf.va = &args;
 192
 193         printk(KERN_INFO "b43legacy-%s: %pV",
 194                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 195
 196         va_end(args);
 197 }
 198
 199 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
 200 {
 201         struct va_format vaf;
 202         va_list args;
 203
 204         if (!b43legacy_ratelimit(wl))
 205                 return;
 206
 207         va_start(args, fmt);
 208
 209         vaf.fmt = fmt;
 210         vaf.va = &args;
 211
 212         printk(KERN_ERR "b43legacy-%s ERROR: %pV",
 213                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 214
 215         va_end(args);
 216 }
 217
 218 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
 219 {
 220         struct va_format vaf;
 221         va_list args;
 222
 223         if (!b43legacy_ratelimit(wl))
 224                 return;
 225
 226         va_start(args, fmt);
 227
 228         vaf.fmt = fmt;
 229         vaf.va = &args;
 230
 231         printk(KERN_WARNING "b43legacy-%s warning: %pV",
 232                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 233
 234         va_end(args);
 235 }
 236
 237 #if B43legacy_DEBUG
 238 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
 239 {
 240         struct va_format vaf;
 241         va_list args;
 242
 243         va_start(args, fmt);
 244
 245         vaf.fmt = fmt;
 246         vaf.va = &args;
 247
 248         printk(KERN_DEBUG "b43legacy-%s debug: %pV",
 249                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 250
 251         va_end(args);
 252 }
 253 #endif /* DEBUG */
 254
 255 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
 256                                 u32 val)
 257 {
 258         u32 status;
 259
 260         B43legacy_WARN_ON(offset % 4 != 0);
 261
 262         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 263         if (status & B43legacy_MACCTL_BE)
 264                 val = swab32(val);
 265
 266         b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
 267         mmiowb();
 268         b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
 269 }
 270
 271 static inline
 272 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
 273                                 u16 routing, u16 offset)
 274 {
 275         u32 control;
 276
 277         /* "offset" is the WORD offset. */
 278
 279         control = routing;
 280         control <<= 16;
 281         control |= offset;
 282         b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
 283 }
 284
 285 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
 286                        u16 routing, u16 offset)
 287 {
 288         u32 ret;
 289
 290         if (routing == B43legacy_SHM_SHARED) {
 291                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 292                 if (offset & 0x0003) {
 293                         /* Unaligned access */
 294                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 295                         ret = b43legacy_read16(dev,
 296                                 B43legacy_MMIO_SHM_DATA_UNALIGNED);
 297                         ret <<= 16;
 298                         b43legacy_shm_control_word(dev, routing,
 299                                                      (offset >> 2) + 1);
 300                         ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 301
 302                         return ret;
 303                 }
 304                 offset >>= 2;
 305         }
 306         b43legacy_shm_control_word(dev, routing, offset);
 307         ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
 308
 309         return ret;
 310 }
 311
 312 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
 313                            u16 routing, u16 offset)
 314 {
 315         u16 ret;
 316
 317         if (routing == B43legacy_SHM_SHARED) {
 318                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 319                 if (offset & 0x0003) {
 320                         /* Unaligned access */
 321                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 322                         ret = b43legacy_read16(dev,
 323                                              B43legacy_MMIO_SHM_DATA_UNALIGNED);
 324
 325                         return ret;
 326                 }
 327                 offset >>= 2;
 328         }
 329         b43legacy_shm_control_word(dev, routing, offset);
 330         ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 331
 332         return ret;
 333 }
 334
 335 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
 336                            u16 routing, u16 offset,
 337                            u32 value)
 338 {
 339         if (routing == B43legacy_SHM_SHARED) {
 340                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 341                 if (offset & 0x0003) {
 342                         /* Unaligned access */
 343                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 344                         mmiowb();
 345                         b43legacy_write16(dev,
 346                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 347                                           (value >> 16) & 0xffff);
 348                         mmiowb();
 349                         b43legacy_shm_control_word(dev, routing,
 350                                                    (offset >> 2) + 1);
 351                         mmiowb();
 352                         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
 353                                           value & 0xffff);
 354                         return;
 355                 }
 356                 offset >>= 2;
 357         }
 358         b43legacy_shm_control_word(dev, routing, offset);
 359         mmiowb();
 360         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
 361 }
 362
 363 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
 364                            u16 value)
 365 {
 366         if (routing == B43legacy_SHM_SHARED) {
 367                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 368                 if (offset & 0x0003) {
 369                         /* Unaligned access */
 370                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 371                         mmiowb();
 372                         b43legacy_write16(dev,
 373                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 374                                           value);
 375                         return;
 376                 }
 377                 offset >>= 2;
 378         }
 379         b43legacy_shm_control_word(dev, routing, offset);
 380         mmiowb();
 381         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
 382 }
 383
 384 /* Read HostFlags */
 385 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
 386 {
 387         u32 ret;
 388
 389         ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 390                                    B43legacy_SHM_SH_HOSTFHI);
 391         ret <<= 16;
 392         ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 393                                     B43legacy_SHM_SH_HOSTFLO);
 394
 395         return ret;
 396 }
 397
 398 /* Write HostFlags */
 399 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
 400 {
 401         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 402                               B43legacy_SHM_SH_HOSTFLO,
 403                               (value & 0x0000FFFF));
 404         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 405                               B43legacy_SHM_SH_HOSTFHI,
 406                               ((value & 0xFFFF0000) >> 16));
 407 }
 408
 409 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
 410 {
 411         /* We need to be careful. As we read the TSF from multiple
 412          * registers, we should take care of register overflows.
 413          * In theory, the whole tsf read process should be atomic.
 414          * We try to be atomic here, by restaring the read process,
 415          * if any of the high registers changed (overflew).
 416          */
 417         if (dev->dev->id.revision >= 3) {
 418                 u32 low;
 419                 u32 high;
 420                 u32 high2;
 421
 422                 do {
 423                         high = b43legacy_read32(dev,
 424                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 425                         low = b43legacy_read32(dev,
 426                                         B43legacy_MMIO_REV3PLUS_TSF_LOW);
 427                         high2 = b43legacy_read32(dev,
 428                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 429                 } while (unlikely(high != high2));
 430
 431                 *tsf = high;
 432                 *tsf <<= 32;
 433                 *tsf |= low;
 434         } else {
 435                 u64 tmp;
 436                 u16 v0;
 437                 u16 v1;
 438                 u16 v2;
 439                 u16 v3;
 440                 u16 test1;
 441                 u16 test2;
 442                 u16 test3;
 443
 444                 do {
 445                         v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 446                         v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 447                         v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 448                         v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
 449
 450                         test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 451                         test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 452                         test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 453                 } while (v3 != test3 || v2 != test2 || v1 != test1);
 454
 455                 *tsf = v3;
 456                 *tsf <<= 48;
 457                 tmp = v2;
 458                 tmp <<= 32;
 459                 *tsf |= tmp;
 460                 tmp = v1;
 461                 tmp <<= 16;
 462                 *tsf |= tmp;
 463                 *tsf |= v0;
 464         }
 465 }
 466
 467 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
 468 {
 469         u32 status;
 470
 471         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 472         status |= B43legacy_MACCTL_TBTTHOLD;
 473         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 474         mmiowb();
 475 }
 476
 477 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
 478 {
 479         u32 status;
 480
 481         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 482         status &= ~B43legacy_MACCTL_TBTTHOLD;
 483         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 484 }
 485
 486 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
 487 {
 488         /* Be careful with the in-progress timer.
 489          * First zero out the low register, so we have a full
 490          * register-overflow duration to complete the operation.
 491          */
 492         if (dev->dev->id.revision >= 3) {
 493                 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
 494                 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
 495
 496                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
 497                 mmiowb();
 498                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
 499                                     hi);
 500                 mmiowb();
 501                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
 502                                     lo);
 503         } else {
 504                 u16 v0 = (tsf & 0x000000000000FFFFULL);
 505                 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
 506                 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
 507                 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
 508
 509                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
 510                 mmiowb();
 511                 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
 512                 mmiowb();
 513                 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
 514                 mmiowb();
 515                 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
 516                 mmiowb();
 517                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
 518         }
 519 }
 520
 521 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
 522 {
 523         b43legacy_time_lock(dev);
 524         b43legacy_tsf_write_locked(dev, tsf);
 525         b43legacy_time_unlock(dev);
 526 }
 527
 528 static
 529 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
 530                              u16 offset, const u8 *mac)
 531 {
 532         static const u8 zero_addr[ETH_ALEN] = { 0 };
 533         u16 data;
 534
 535         if (!mac)
 536                 mac = zero_addr;
 537
 538         offset |= 0x0020;
 539         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
 540
 541         data = mac[0];
 542         data |= mac[1] << 8;
 543         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 544         data = mac[2];
 545         data |= mac[3] << 8;
 546         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 547         data = mac[4];
 548         data |= mac[5] << 8;
 549         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 550 }
 551
 552 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
 553 {
 554         static const u8 zero_addr[ETH_ALEN] = { 0 };
 555         const u8 *mac = dev->wl->mac_addr;
 556         const u8 *bssid = dev->wl->bssid;
 557         u8 mac_bssid[ETH_ALEN * 2];
 558         int i;
 559         u32 tmp;
 560
 561         if (!bssid)
 562                 bssid = zero_addr;
 563         if (!mac)
 564                 mac = zero_addr;
 565
 566         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
 567
 568         memcpy(mac_bssid, mac, ETH_ALEN);
 569         memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
 570
 571         /* Write our MAC address and BSSID to template ram */
 572         for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
 573                 tmp =  (u32)(mac_bssid[i + 0]);
 574                 tmp |= (u32)(mac_bssid[i + 1]) << 8;
 575                 tmp |= (u32)(mac_bssid[i + 2]) << 16;
 576                 tmp |= (u32)(mac_bssid[i + 3]) << 24;
 577                 b43legacy_ram_write(dev, 0x20 + i, tmp);
 578                 b43legacy_ram_write(dev, 0x78 + i, tmp);
 579                 b43legacy_ram_write(dev, 0x478 + i, tmp);
 580         }
 581 }
 582
 583 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
 584 {
 585         b43legacy_write_mac_bssid_templates(dev);
 586         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
 587                                 dev->wl->mac_addr);
 588 }
 589
 590 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
 591                                     u16 slot_time)
 592 {
 593         /* slot_time is in usec. */
 594         if (dev->phy.type != B43legacy_PHYTYPE_G)
 595                 return;
 596         b43legacy_write16(dev, 0x684, 510 + slot_time);
 597         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
 598                               slot_time);
 599 }
 600
 601 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
 602 {
 603         b43legacy_set_slot_time(dev, 9);
 604 }
 605
 606 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
 607 {
 608         b43legacy_set_slot_time(dev, 20);
 609 }
 610
 611 /* Synchronize IRQ top- and bottom-half.
 612  * IRQs must be masked before calling this.
 613  * This must not be called with the irq_lock held.
 614  */
 615 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
 616 {
 617         synchronize_irq(dev->dev->irq);
 618         tasklet_kill(&dev->isr_tasklet);
 619 }
 620
 621 /* DummyTransmission function, as documented on
 622  * http://bcm-specs.sipsolutions.net/DummyTransmission
 623  */
 624 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
 625 {
 626         struct b43legacy_phy *phy = &dev->phy;
 627         unsigned int i;
 628         unsigned int max_loop;
 629         u16 value;
 630         u32 buffer[5] = {
 631                 0x00000000,
 632                 0x00D40000,
 633                 0x00000000,
 634                 0x01000000,
 635                 0x00000000,
 636         };
 637
 638         switch (phy->type) {
 639         case B43legacy_PHYTYPE_B:
 640         case B43legacy_PHYTYPE_G:
 641                 max_loop = 0xFA;
 642                 buffer[0] = 0x000B846E;
 643                 break;
 644         default:
 645                 B43legacy_BUG_ON(1);
 646                 return;
 647         }
 648
 649         for (i = 0; i < 5; i++)
 650                 b43legacy_ram_write(dev, i * 4, buffer[i]);
 651
 652         /* dummy read follows */
 653         b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 654
 655         b43legacy_write16(dev, 0x0568, 0x0000);
 656         b43legacy_write16(dev, 0x07C0, 0x0000);
 657         b43legacy_write16(dev, 0x050C, 0x0000);
 658         b43legacy_write16(dev, 0x0508, 0x0000);
 659         b43legacy_write16(dev, 0x050A, 0x0000);
 660         b43legacy_write16(dev, 0x054C, 0x0000);
 661         b43legacy_write16(dev, 0x056A, 0x0014);
 662         b43legacy_write16(dev, 0x0568, 0x0826);
 663         b43legacy_write16(dev, 0x0500, 0x0000);
 664         b43legacy_write16(dev, 0x0502, 0x0030);
 665
 666         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 667                 b43legacy_radio_write16(dev, 0x0051, 0x0017);
 668         for (i = 0x00; i < max_loop; i++) {
 669                 value = b43legacy_read16(dev, 0x050E);
 670                 if (value & 0x0080)
 671                         break;
 672                 udelay(10);
 673         }
 674         for (i = 0x00; i < 0x0A; i++) {
 675                 value = b43legacy_read16(dev, 0x050E);
 676                 if (value & 0x0400)
 677                         break;
 678                 udelay(10);
 679         }
 680         for (i = 0x00; i < 0x0A; i++) {
 681                 value = b43legacy_read16(dev, 0x0690);
 682                 if (!(value & 0x0100))
 683                         break;
 684                 udelay(10);
 685         }
 686         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 687                 b43legacy_radio_write16(dev, 0x0051, 0x0037);
 688 }
 689
 690 /* Turn the Analog ON/OFF */
 691 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
 692 {
 693         b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
 694 }
 695
 696 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
 697 {
 698         u32 tmslow;
 699         u32 macctl;
 700
 701         flags |= B43legacy_TMSLOW_PHYCLKEN;
 702         flags |= B43legacy_TMSLOW_PHYRESET;
 703         ssb_device_enable(dev->dev, flags);
 704         msleep(2); /* Wait for the PLL to turn on. */
 705
 706         /* Now take the PHY out of Reset again */
 707         tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
 708         tmslow |= SSB_TMSLOW_FGC;
 709         tmslow &= ~B43legacy_TMSLOW_PHYRESET;
 710         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 711         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 712         msleep(1);
 713         tmslow &= ~SSB_TMSLOW_FGC;
 714         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 715         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 716         msleep(1);
 717
 718         /* Turn Analog ON */
 719         b43legacy_switch_analog(dev, 1);
 720
 721         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 722         macctl &= ~B43legacy_MACCTL_GMODE;
 723         if (flags & B43legacy_TMSLOW_GMODE) {
 724                 macctl |= B43legacy_MACCTL_GMODE;
 725                 dev->phy.gmode = true;
 726         } else
 727                 dev->phy.gmode = false;
 728         macctl |= B43legacy_MACCTL_IHR_ENABLED;
 729         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
 730 }
 731
 732 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
 733 {
 734         u32 v0;
 735         u32 v1;
 736         u16 tmp;
 737         struct b43legacy_txstatus stat;
 738
 739         while (1) {
 740                 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 741                 if (!(v0 & 0x00000001))
 742                         break;
 743                 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 744
 745                 stat.cookie = (v0 >> 16);
 746                 stat.seq = (v1 & 0x0000FFFF);
 747                 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
 748                 tmp = (v0 & 0x0000FFFF);
 749                 stat.frame_count = ((tmp & 0xF000) >> 12);
 750                 stat.rts_count = ((tmp & 0x0F00) >> 8);
 751                 stat.supp_reason = ((tmp & 0x001C) >> 2);
 752                 stat.pm_indicated = !!(tmp & 0x0080);
 753                 stat.intermediate = !!(tmp & 0x0040);
 754                 stat.for_ampdu = !!(tmp & 0x0020);
 755                 stat.acked = !!(tmp & 0x0002);
 756
 757                 b43legacy_handle_txstatus(dev, &stat);
 758         }
 759 }
 760
 761 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
 762 {
 763         u32 dummy;
 764
 765         if (dev->dev->id.revision < 5)
 766                 return;
 767         /* Read all entries from the microcode TXstatus FIFO
 768          * and throw them away.
 769          */
 770         while (1) {
 771                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 772                 if (!(dummy & 0x00000001))
 773                         break;
 774                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 775         }
 776 }
 777
 778 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
 779 {
 780         u32 val = 0;
 781
 782         val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
 783         val <<= 16;
 784         val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
 785
 786         return val;
 787 }
 788
 789 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
 790 {
 791         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
 792                               (jssi & 0x0000FFFF));
 793         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
 794                               (jssi & 0xFFFF0000) >> 16);
 795 }
 796
 797 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
 798 {
 799         b43legacy_jssi_write(dev, 0x7F7F7F7F);
 800         b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 801                           b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 802                           | B43legacy_MACCMD_BGNOISE);
 803         B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
 804                             dev->phy.channel);
 805 }
 806
 807 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
 808 {
 809         /* Top half of Link Quality calculation. */
 810
 811         if (dev->noisecalc.calculation_running)
 812                 return;
 813         dev->noisecalc.channel_at_start = dev->phy.channel;
 814         dev->noisecalc.calculation_running = true;
 815         dev->noisecalc.nr_samples = 0;
 816
 817         b43legacy_generate_noise_sample(dev);
 818 }
 819
 820 static void handle_irq_noise(struct b43legacy_wldev *dev)
 821 {
 822         struct b43legacy_phy *phy = &dev->phy;
 823         u16 tmp;
 824         u8 noise[4];
 825         u8 i;
 826         u8 j;
 827         s32 average;
 828
 829         /* Bottom half of Link Quality calculation. */
 830
 831         B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
 832         if (dev->noisecalc.channel_at_start != phy->channel)
 833                 goto drop_calculation;
 834         *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
 835         if (noise[0] == 0x7F || noise[1] == 0x7F ||
 836             noise[2] == 0x7F || noise[3] == 0x7F)
 837                 goto generate_new;
 838
 839         /* Get the noise samples. */
 840         B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
 841         i = dev->noisecalc.nr_samples;
 842         noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 843         noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 844         noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 845         noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 846         dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
 847         dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
 848         dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
 849         dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
 850         dev->noisecalc.nr_samples++;
 851         if (dev->noisecalc.nr_samples == 8) {
 852                 /* Calculate the Link Quality by the noise samples. */
 853                 average = 0;
 854                 for (i = 0; i < 8; i++) {
 855                         for (j = 0; j < 4; j++)
 856                                 average += dev->noisecalc.samples[i][j];
 857                 }
 858                 average /= (8 * 4);
 859                 average *= 125;
 860                 average += 64;
 861                 average /= 128;
 862                 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 863                                              0x40C);
 864                 tmp = (tmp / 128) & 0x1F;
 865                 if (tmp >= 8)
 866                         average += 2;
 867                 else
 868                         average -= 25;
 869                 if (tmp == 8)
 870                         average -= 72;
 871                 else
 872                         average -= 48;
 873
 874                 dev->stats.link_noise = average;
 875 drop_calculation:
 876                 dev->noisecalc.calculation_running = false;
 877                 return;
 878         }
 879 generate_new:
 880         b43legacy_generate_noise_sample(dev);
 881 }
 882
 883 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
 884 {
 885         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
 886                 /* TODO: PS TBTT */
 887         } else {
 888                 if (1/*FIXME: the last PSpoll frame was sent successfully */)
 889                         b43legacy_power_saving_ctl_bits(dev, -1, -1);
 890         }
 891         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
 892                 dev->dfq_valid = true;
 893 }
 894
 895 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
 896 {
 897         if (dev->dfq_valid) {
 898                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 899                                   b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 900                                   | B43legacy_MACCMD_DFQ_VALID);
 901                 dev->dfq_valid = false;
 902         }
 903 }
 904
 905 static void handle_irq_pmq(struct b43legacy_wldev *dev)
 906 {
 907         u32 tmp;
 908
 909         /* TODO: AP mode. */
 910
 911         while (1) {
 912                 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
 913                 if (!(tmp & 0x00000008))
 914                         break;
 915         }
 916         /* 16bit write is odd, but correct. */
 917         b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
 918 }
 919
 920 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
 921                                             const u8 *data, u16 size,
 922                                             u16 ram_offset,
 923                                             u16 shm_size_offset, u8 rate)
 924 {
 925         u32 i;
 926         u32 tmp;
 927         struct b43legacy_plcp_hdr4 plcp;
 928
 929         plcp.data = 0;
 930         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 931         b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
 932         ram_offset += sizeof(u32);
 933         /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
 934          * So leave the first two bytes of the next write blank.
 935          */
 936         tmp = (u32)(data[0]) << 16;
 937         tmp |= (u32)(data[1]) << 24;
 938         b43legacy_ram_write(dev, ram_offset, tmp);
 939         ram_offset += sizeof(u32);
 940         for (i = 2; i < size; i += sizeof(u32)) {
 941                 tmp = (u32)(data[i + 0]);
 942                 if (i + 1 < size)
 943                         tmp |= (u32)(data[i + 1]) << 8;
 944                 if (i + 2 < size)
 945                         tmp |= (u32)(data[i + 2]) << 16;
 946                 if (i + 3 < size)
 947                         tmp |= (u32)(data[i + 3]) << 24;
 948                 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
 949         }
 950         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
 951                               size + sizeof(struct b43legacy_plcp_hdr6));
 952 }
 953
 954 /* Convert a b43legacy antenna number value to the PHY TX control value. */
 955 static u16 b43legacy_antenna_to_phyctl(int antenna)
 956 {
 957         switch (antenna) {
 958         case B43legacy_ANTENNA0:
 959                 return B43legacy_TX4_PHY_ANT0;
 960         case B43legacy_ANTENNA1:
 961                 return B43legacy_TX4_PHY_ANT1;
 962         }
 963         return B43legacy_TX4_PHY_ANTLAST;
 964 }
 965
 966 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
 967                                             u16 ram_offset,
 968                                             u16 shm_size_offset)
 969 {
 970
 971         unsigned int i, len, variable_len;
 972         const struct ieee80211_mgmt *bcn;
 973         const u8 *ie;
 974         bool tim_found = false;
 975         unsigned int rate;
 976         u16 ctl;
 977         int antenna;
 978         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
 979
 980         bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
 981         len = min((size_t)dev->wl->current_beacon->len,
 982                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
 983         rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
 984
 985         b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
 986                                         shm_size_offset, rate);
 987
 988         /* Write the PHY TX control parameters. */
 989         antenna = B43legacy_ANTENNA_DEFAULT;
 990         antenna = b43legacy_antenna_to_phyctl(antenna);
 991         ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 992                                    B43legacy_SHM_SH_BEACPHYCTL);
 993         /* We can't send beacons with short preamble. Would get PHY errors. */
 994         ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL;
 995         ctl &= ~B43legacy_TX4_PHY_ANT;
 996         ctl &= ~B43legacy_TX4_PHY_ENC;
 997         ctl |= antenna;
 998         ctl |= B43legacy_TX4_PHY_ENC_CCK;
 999         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1000                               B43legacy_SHM_SH_BEACPHYCTL, ctl);
1001
1002         /* Find the position of the TIM and the DTIM_period value
1003          * and write them to SHM. */
1004         ie = bcn->u.beacon.variable;
1005         variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
1006         for (i = 0; i < variable_len - 2; ) {
1007                 uint8_t ie_id, ie_len;
1008
1009                 ie_id = ie[i];
1010                 ie_len = ie[i + 1];
1011                 if (ie_id == 5) {
1012                         u16 tim_position;
1013                         u16 dtim_period;
1014                         /* This is the TIM Information Element */
1015
1016                         /* Check whether the ie_len is in the beacon data range. */
1017                         if (variable_len < ie_len + 2 + i)
1018                                 break;
1019                         /* A valid TIM is at least 4 bytes long. */
1020                         if (ie_len < 4)
1021                                 break;
1022                         tim_found = true;
1023
1024                         tim_position = sizeof(struct b43legacy_plcp_hdr6);
1025                         tim_position += offsetof(struct ieee80211_mgmt,
1026                                                  u.beacon.variable);
1027                         tim_position += i;
1028
1029                         dtim_period = ie[i + 3];
1030
1031                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1032                                         B43legacy_SHM_SH_TIMPOS, tim_position);
1033                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1034                                         B43legacy_SHM_SH_DTIMP, dtim_period);
1035                         break;
1036                 }
1037                 i += ie_len + 2;
1038         }
1039         if (!tim_found) {
1040                 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1041                               "beacon template packet. AP or IBSS operation "
1042                               "may be broken.\n");
1043         } else
1044                 b43legacydbg(dev->wl, "Updated beacon template\n");
1045 }
1046
1047 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1048                                             u16 shm_offset, u16 size,
1049                                             struct ieee80211_rate *rate)
1050 {
1051         struct b43legacy_plcp_hdr4 plcp;
1052         u32 tmp;
1053         __le16 dur;
1054
1055         plcp.data = 0;
1056         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
1057         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1058                                                dev->wl->vif,
1059                                                size,
1060                                                rate);
1061         /* Write PLCP in two parts and timing for packet transfer */
1062         tmp = le32_to_cpu(plcp.data);
1063         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1064                               tmp & 0xFFFF);
1065         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1066                               tmp >> 16);
1067         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1068                               le16_to_cpu(dur));
1069 }
1070
1071 /* Instead of using custom probe response template, this function
1072  * just patches custom beacon template by:
1073  * 1) Changing packet type
1074  * 2) Patching duration field
1075  * 3) Stripping TIM
1076  */
1077 static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1078                                                u16 *dest_size,
1079                                                struct ieee80211_rate *rate)
1080 {
1081         const u8 *src_data;
1082         u8 *dest_data;
1083         u16 src_size, elem_size, src_pos, dest_pos;
1084         __le16 dur;
1085         struct ieee80211_hdr *hdr;
1086         size_t ie_start;
1087
1088         src_size = dev->wl->current_beacon->len;
1089         src_data = (const u8 *)dev->wl->current_beacon->data;
1090
1091         /* Get the start offset of the variable IEs in the packet. */
1092         ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1093         B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1094                                                u.beacon.variable));
1095
1096         if (B43legacy_WARN_ON(src_size < ie_start))
1097                 return NULL;
1098
1099         dest_data = kmalloc(src_size, GFP_ATOMIC);
1100         if (unlikely(!dest_data))
1101                 return NULL;
1102
1103         /* Copy the static data and all Information Elements, except the TIM. */
1104         memcpy(dest_data, src_data, ie_start);
1105         src_pos = ie_start;
1106         dest_pos = ie_start;
1107         for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1108                 elem_size = src_data[src_pos + 1] + 2;
1109                 if (src_data[src_pos] == 5) {
1110                         /* This is the TIM. */
1111                         continue;
1112                 }
1113                 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1114                 dest_pos += elem_size;
1115         }
1116         *dest_size = dest_pos;
1117         hdr = (struct ieee80211_hdr *)dest_data;
1118
1119         /* Set the frame control. */
1120         hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1121                                          IEEE80211_STYPE_PROBE_RESP);
1122         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1123                                                dev->wl->vif,
1124                                                *dest_size,
1125                                                rate);
1126         hdr->duration_id = dur;
1127
1128         return dest_data;
1129 }
1130
1131 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1132                                                 u16 ram_offset,
1133                                                 u16 shm_size_offset,
1134                                                 struct ieee80211_rate *rate)
1135 {
1136         const u8 *probe_resp_data;
1137         u16 size;
1138
1139         size = dev->wl->current_beacon->len;
1140         probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1141         if (unlikely(!probe_resp_data))
1142                 return;
1143
1144         /* Looks like PLCP headers plus packet timings are stored for
1145          * all possible basic rates
1146          */
1147         b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1148                                         &b43legacy_b_ratetable[0]);
1149         b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1150                                         &b43legacy_b_ratetable[1]);
1151         b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1152                                         &b43legacy_b_ratetable[2]);
1153         b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1154                                         &b43legacy_b_ratetable[3]);
1155
1156         size = min((size_t)size,
1157                    0x200 - sizeof(struct b43legacy_plcp_hdr6));
1158         b43legacy_write_template_common(dev, probe_resp_data,
1159                                         size, ram_offset,
1160                                         shm_size_offset, rate->hw_value);
1161         kfree(probe_resp_data);
1162 }
1163
1164 static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev)
1165 {
1166         struct b43legacy_wl *wl = dev->wl;
1167
1168         if (wl->beacon0_uploaded)
1169                 return;
1170         b43legacy_write_beacon_template(dev, 0x68, 0x18);
1171         /* FIXME: Probe resp upload doesn't really belong here,
1172          *        but we don't use that feature anyway. */
1173         b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1174                                       &__b43legacy_ratetable[3]);
1175         wl->beacon0_uploaded = true;
1176 }
1177
1178 static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev)
1179 {
1180         struct b43legacy_wl *wl = dev->wl;
1181
1182         if (wl->beacon1_uploaded)
1183                 return;
1184         b43legacy_write_beacon_template(dev, 0x468, 0x1A);
1185         wl->beacon1_uploaded = true;
1186 }
1187
1188 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1189 {
1190         struct b43legacy_wl *wl = dev->wl;
1191         u32 cmd, beacon0_valid, beacon1_valid;
1192
1193         if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1194                 return;
1195
1196         /* This is the bottom half of the asynchronous beacon update. */
1197
1198         /* Ignore interrupt in the future. */
1199         dev->irq_mask &= ~B43legacy_IRQ_BEACON;
1200
1201         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1202         beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID);
1203         beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID);
1204
1205         /* Schedule interrupt manually, if busy. */
1206         if (beacon0_valid && beacon1_valid) {
1207                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON);
1208                 dev->irq_mask |= B43legacy_IRQ_BEACON;
1209                 return;
1210         }
1211
1212         if (unlikely(wl->beacon_templates_virgin)) {
1213                 /* We never uploaded a beacon before.
1214                  * Upload both templates now, but only mark one valid. */
1215                 wl->beacon_templates_virgin = false;
1216                 b43legacy_upload_beacon0(dev);
1217                 b43legacy_upload_beacon1(dev);
1218                 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1219                 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1220                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1221         } else {
1222                 if (!beacon0_valid) {
1223                         b43legacy_upload_beacon0(dev);
1224                         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1225                         cmd |= B43legacy_MACCMD_BEACON0_VALID;
1226                         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1227                 } else if (!beacon1_valid) {
1228                         b43legacy_upload_beacon1(dev);
1229                         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1230                         cmd |= B43legacy_MACCMD_BEACON1_VALID;
1231                         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1232                 }
1233         }
1234 }
1235
1236 static void b43legacy_beacon_update_trigger_work(struct work_struct *work)
1237 {
1238         struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
1239                                          beacon_update_trigger);
1240         struct b43legacy_wldev *dev;
1241
1242         mutex_lock(&wl->mutex);
1243         dev = wl->current_dev;
1244         if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) {
1245                 spin_lock_irq(&wl->irq_lock);
1246                 /* Update beacon right away or defer to IRQ. */
1247                 handle_irq_beacon(dev);
1248                 /* The handler might have updated the IRQ mask. */
1249                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1250                                   dev->irq_mask);
1251                 mmiowb();
1252                 spin_unlock_irq(&wl->irq_lock);
1253         }
1254         mutex_unlock(&wl->mutex);
1255 }
1256
1257 /* Asynchronously update the packet templates in template RAM.
1258  * Locking: Requires wl->irq_lock to be locked. */
1259 static void b43legacy_update_templates(struct b43legacy_wl *wl)
1260 {
1261         struct sk_buff *beacon;
1262         /* This is the top half of the ansynchronous beacon update. The bottom
1263          * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1264          * sending an invalid beacon. This can happen for example, if the
1265          * firmware transmits a beacon while we are updating it. */
1266
1267         /* We could modify the existing beacon and set the aid bit in the TIM
1268          * field, but that would probably require resizing and moving of data
1269          * within the beacon template. Simply request a new beacon and let
1270          * mac80211 do the hard work. */
1271         beacon = ieee80211_beacon_get(wl->hw, wl->vif);
1272         if (unlikely(!beacon))
1273                 return;
1274
1275         if (wl->current_beacon)
1276                 dev_kfree_skb_any(wl->current_beacon);
1277         wl->current_beacon = beacon;
1278         wl->beacon0_uploaded = false;
1279         wl->beacon1_uploaded = false;
1280         ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger);
1281 }
1282
1283 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1284                                      u16 beacon_int)
1285 {
1286         b43legacy_time_lock(dev);
1287         if (dev->dev->id.revision >= 3) {
1288                 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP,
1289                                  (beacon_int << 16));
1290                 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START,
1291                                  (beacon_int << 10));
1292         } else {
1293                 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1294                 b43legacy_write16(dev, 0x610, beacon_int);
1295         }
1296         b43legacy_time_unlock(dev);
1297         b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
1298 }
1299
1300 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1301 {
1302 }
1303
1304 /* Interrupt handler bottom-half */
1305 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1306 {
1307         u32 reason;
1308         u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1309         u32 merged_dma_reason = 0;
1310         int i;
1311         unsigned long flags;
1312
1313         spin_lock_irqsave(&dev->wl->irq_lock, flags);
1314
1315         B43legacy_WARN_ON(b43legacy_status(dev) <
1316                           B43legacy_STAT_INITIALIZED);
1317
1318         reason = dev->irq_reason;
1319         for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1320                 dma_reason[i] = dev->dma_reason[i];
1321                 merged_dma_reason |= dma_reason[i];
1322         }
1323
1324         if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1325                 b43legacyerr(dev->wl, "MAC transmission error\n");
1326
1327         if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1328                 b43legacyerr(dev->wl, "PHY transmission error\n");
1329                 rmb();
1330                 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1331                         b43legacyerr(dev->wl, "Too many PHY TX errors, "
1332                                               "restarting the controller\n");
1333                         b43legacy_controller_restart(dev, "PHY TX errors");
1334                 }
1335         }
1336
1337         if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1338                                           B43legacy_DMAIRQ_NONFATALMASK))) {
1339                 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1340                         b43legacyerr(dev->wl, "Fatal DMA error: "
1341                                "0x%08X, 0x%08X, 0x%08X, "
1342                                "0x%08X, 0x%08X, 0x%08X\n",
1343                                dma_reason[0], dma_reason[1],
1344                                dma_reason[2], dma_reason[3],
1345                                dma_reason[4], dma_reason[5]);
1346                         b43legacy_controller_restart(dev, "DMA error");
1347                         mmiowb();
1348                         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1349                         return;
1350                 }
1351                 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1352                         b43legacyerr(dev->wl, "DMA error: "
1353                                "0x%08X, 0x%08X, 0x%08X, "
1354                                "0x%08X, 0x%08X, 0x%08X\n",
1355                                dma_reason[0], dma_reason[1],
1356                                dma_reason[2], dma_reason[3],
1357                                dma_reason[4], dma_reason[5]);
1358         }
1359
1360         if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1361                 handle_irq_ucode_debug(dev);
1362         if (reason & B43legacy_IRQ_TBTT_INDI)
1363                 handle_irq_tbtt_indication(dev);
1364         if (reason & B43legacy_IRQ_ATIM_END)
1365                 handle_irq_atim_end(dev);
1366         if (reason & B43legacy_IRQ_BEACON)
1367                 handle_irq_beacon(dev);
1368         if (reason & B43legacy_IRQ_PMQ)
1369                 handle_irq_pmq(dev);
1370         if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1371                 ;/*TODO*/
1372         if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1373                 handle_irq_noise(dev);
1374
1375         /* Check the DMA reason registers for received data. */
1376         if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1377                 if (b43legacy_using_pio(dev))
1378                         b43legacy_pio_rx(dev->pio.queue0);
1379                 else
1380                         b43legacy_dma_rx(dev->dma.rx_ring0);
1381         }
1382         B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1383         B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1384         if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1385                 if (b43legacy_using_pio(dev))
1386                         b43legacy_pio_rx(dev->pio.queue3);
1387                 else
1388                         b43legacy_dma_rx(dev->dma.rx_ring3);
1389         }
1390         B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1391         B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1392
1393         if (reason & B43legacy_IRQ_TX_OK)
1394                 handle_irq_transmit_status(dev);
1395
1396         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1397         mmiowb();
1398         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1399 }
1400
1401 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1402                                u16 base, int queueidx)
1403 {
1404         u16 rxctl;
1405
1406         rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1407         if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1408                 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1409         else
1410                 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1411 }
1412
1413 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1414 {
1415         if (b43legacy_using_pio(dev) &&
1416             (dev->dev->id.revision < 3) &&
1417             (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1418                 /* Apply a PIO specific workaround to the dma_reasons */
1419                 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1420                 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1421                 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1422                 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1423         }
1424
1425         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1426
1427         b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1428                           dev->dma_reason[0]);
1429         b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1430                           dev->dma_reason[1]);
1431         b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1432                           dev->dma_reason[2]);
1433         b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1434                           dev->dma_reason[3]);
1435         b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1436                           dev->dma_reason[4]);
1437         b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1438                           dev->dma_reason[5]);
1439 }
1440
1441 /* Interrupt handler top-half */
1442 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1443 {
1444         irqreturn_t ret = IRQ_NONE;
1445         struct b43legacy_wldev *dev = dev_id;
1446         u32 reason;
1447
1448         B43legacy_WARN_ON(!dev);
1449
1450         spin_lock(&dev->wl->irq_lock);
1451
1452         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
1453                 /* This can only happen on shared IRQ lines. */
1454                 goto out;
1455         reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1456         if (reason == 0xffffffff) /* shared IRQ */
1457                 goto out;
1458         ret = IRQ_HANDLED;
1459         reason &= dev->irq_mask;
1460         if (!reason)
1461                 goto out;
1462
1463         dev->dma_reason[0] = b43legacy_read32(dev,
1464                                               B43legacy_MMIO_DMA0_REASON)
1465                                               & 0x0001DC00;
1466         dev->dma_reason[1] = b43legacy_read32(dev,
1467                                               B43legacy_MMIO_DMA1_REASON)
1468                                               & 0x0000DC00;
1469         dev->dma_reason[2] = b43legacy_read32(dev,
1470                                               B43legacy_MMIO_DMA2_REASON)
1471                                               & 0x0000DC00;
1472         dev->dma_reason[3] = b43legacy_read32(dev,
1473                                               B43legacy_MMIO_DMA3_REASON)
1474                                               & 0x0001DC00;
1475         dev->dma_reason[4] = b43legacy_read32(dev,
1476                                               B43legacy_MMIO_DMA4_REASON)
1477                                               & 0x0000DC00;
1478         dev->dma_reason[5] = b43legacy_read32(dev,
1479                                               B43legacy_MMIO_DMA5_REASON)
1480                                               & 0x0000DC00;
1481
1482         b43legacy_interrupt_ack(dev, reason);
1483         /* Disable all IRQs. They are enabled again in the bottom half. */
1484         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1485         /* Save the reason code and call our bottom half. */
1486         dev->irq_reason = reason;
1487         tasklet_schedule(&dev->isr_tasklet);
1488 out:
1489         mmiowb();
1490         spin_unlock(&dev->wl->irq_lock);
1491
1492         return ret;
1493 }
1494
1495 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1496 {
1497         release_firmware(dev->fw.ucode);
1498         dev->fw.ucode = NULL;
1499         release_firmware(dev->fw.pcm);
1500         dev->fw.pcm = NULL;
1501         release_firmware(dev->fw.initvals);
1502         dev->fw.initvals = NULL;
1503         release_firmware(dev->fw.initvals_band);
1504         dev->fw.initvals_band = NULL;
1505 }
1506
1507 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1508 {
1509         b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1510                      "Drivers/b43#devicefirmware "
1511                      "and download the correct firmware (version 3).\n");
1512 }
1513
1514 static int do_request_fw(struct b43legacy_wldev *dev,
1515                          const char *name,
1516                          const struct firmware **fw)
1517 {
1518         char path[sizeof(modparam_fwpostfix) + 32];
1519         struct b43legacy_fw_header *hdr;
1520         u32 size;
1521         int err;
1522
1523         if (!name)
1524                 return 0;
1525
1526         snprintf(path, ARRAY_SIZE(path),
1527                  "b43legacy%s/%s.fw",
1528                  modparam_fwpostfix, name);
1529         err = request_firmware(fw, path, dev->dev->dev);
1530         if (err) {
1531                 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1532                        "or load failed.\n", path);
1533                 return err;
1534         }
1535         if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1536                 goto err_format;
1537         hdr = (struct b43legacy_fw_header *)((*fw)->data);
1538         switch (hdr->type) {
1539         case B43legacy_FW_TYPE_UCODE:
1540         case B43legacy_FW_TYPE_PCM:
1541                 size = be32_to_cpu(hdr->size);
1542                 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1543                         goto err_format;
1544                 /* fallthrough */
1545         case B43legacy_FW_TYPE_IV:
1546                 if (hdr->ver != 1)
1547                         goto err_format;
1548                 break;
1549         default:
1550                 goto err_format;
1551         }
1552
1553         return err;
1554
1555 err_format:
1556         b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1557         return -EPROTO;
1558 }
1559
1560 static int b43legacy_one_core_attach(struct ssb_device *dev,
1561                                      struct b43legacy_wl *wl);
1562 static void b43legacy_one_core_detach(struct ssb_device *dev);
1563
1564 static void b43legacy_request_firmware(struct work_struct *work)
1565 {
1566         struct b43legacy_wl *wl = container_of(work,
1567                                   struct b43legacy_wl, firmware_load);
1568         struct b43legacy_wldev *dev = wl->current_dev;
1569         struct b43legacy_firmware *fw = &dev->fw;
1570         const u8 rev = dev->dev->id.revision;
1571         const char *filename;
1572         int err;
1573
1574         /* do dummy read */
1575         ssb_read32(dev->dev, SSB_TMSHIGH);
1576         if (!fw->ucode) {
1577                 if (rev == 2)
1578                         filename = "ucode2";
1579                 else if (rev == 4)
1580                         filename = "ucode4";
1581                 else
1582                         filename = "ucode5";
1583                 err = do_request_fw(dev, filename, &fw->ucode);
1584                 if (err)
1585                         goto err_load;
1586         }
1587         if (!fw->pcm) {
1588                 if (rev < 5)
1589                         filename = "pcm4";
1590                 else
1591                         filename = "pcm5";
1592                 err = do_request_fw(dev, filename, &fw->pcm);
1593                 if (err)
1594                         goto err_load;
1595         }
1596         if (!fw->initvals) {
1597                 switch (dev->phy.type) {
1598                 case B43legacy_PHYTYPE_B:
1599                 case B43legacy_PHYTYPE_G:
1600                         if ((rev >= 5) && (rev <= 10))
1601                                 filename = "b0g0initvals5";
1602                         else if (rev == 2 || rev == 4)
1603                                 filename = "b0g0initvals2";
1604                         else
1605                                 goto err_no_initvals;
1606                         break;
1607                 default:
1608                         goto err_no_initvals;
1609                 }
1610                 err = do_request_fw(dev, filename, &fw->initvals);
1611                 if (err)
1612                         goto err_load;
1613         }
1614         if (!fw->initvals_band) {
1615                 switch (dev->phy.type) {
1616                 case B43legacy_PHYTYPE_B:
1617                 case B43legacy_PHYTYPE_G:
1618                         if ((rev >= 5) && (rev <= 10))
1619                                 filename = "b0g0bsinitvals5";
1620                         else if (rev >= 11)
1621                                 filename = NULL;
1622                         else if (rev == 2 || rev == 4)
1623                                 filename = NULL;
1624                         else
1625                                 goto err_no_initvals;
1626                         break;
1627                 default:
1628                         goto err_no_initvals;
1629                 }
1630                 err = do_request_fw(dev, filename, &fw->initvals_band);
1631                 if (err)
1632                         goto err_load;
1633         }
1634         err = ieee80211_register_hw(wl->hw);
1635         if (err)
1636                 goto err_one_core_detach;
1637         return;
1638
1639 err_one_core_detach:
1640         b43legacy_one_core_detach(dev->dev);
1641         goto error;
1642
1643 err_load:
1644         b43legacy_print_fw_helptext(dev->wl);
1645         goto error;
1646
1647 err_no_initvals:
1648         err = -ENODEV;
1649         b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1650                "core rev %u\n", dev->phy.type, rev);
1651         goto error;
1652
1653 error:
1654         b43legacy_release_firmware(dev);
1655         return;
1656 }
1657
1658 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1659 {
1660         struct wiphy *wiphy = dev->wl->hw->wiphy;
1661         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1662         const __be32 *data;
1663         unsigned int i;
1664         unsigned int len;
1665         u16 fwrev;
1666         u16 fwpatch;
1667         u16 fwdate;
1668         u16 fwtime;
1669         u32 tmp, macctl;
1670         int err = 0;
1671
1672         /* Jump the microcode PSM to offset 0 */
1673         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1674         B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1675         macctl |= B43legacy_MACCTL_PSM_JMP0;
1676         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1677         /* Zero out all microcode PSM registers and shared memory. */
1678         for (i = 0; i < 64; i++)
1679                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1680         for (i = 0; i < 4096; i += 2)
1681                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1682
1683         /* Upload Microcode. */
1684         data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1685         len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1686         b43legacy_shm_control_word(dev,
1687                                    B43legacy_SHM_UCODE |
1688                                    B43legacy_SHM_AUTOINC_W,
1689                                    0x0000);
1690         for (i = 0; i < len; i++) {
1691                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1692                                     be32_to_cpu(data[i]));
1693                 udelay(10);
1694         }
1695
1696         if (dev->fw.pcm) {
1697                 /* Upload PCM data. */
1698                 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1699                 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1700                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1701                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1702                 /* No need for autoinc bit in SHM_HW */
1703                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1704                 for (i = 0; i < len; i++) {
1705                         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1706                                           be32_to_cpu(data[i]));
1707                         udelay(10);
1708                 }
1709         }
1710
1711         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1712                           B43legacy_IRQ_ALL);
1713
1714         /* Start the microcode PSM */
1715         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1716         macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1717         macctl |= B43legacy_MACCTL_PSM_RUN;
1718         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1719
1720         /* Wait for the microcode to load and respond */
1721         i = 0;
1722         while (1) {
1723                 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1724                 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1725                         break;
1726                 i++;
1727                 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1728                         b43legacyerr(dev->wl, "Microcode not responding\n");
1729                         b43legacy_print_fw_helptext(dev->wl);
1730                         err = -ENODEV;
1731                         goto error;
1732                 }
1733                 msleep_interruptible(50);
1734                 if (signal_pending(current)) {
1735                         err = -EINTR;
1736                         goto error;
1737                 }
1738         }
1739         /* dummy read follows */
1740         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1741
1742         /* Get and check the revisions. */
1743         fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1744                                      B43legacy_SHM_SH_UCODEREV);
1745         fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1746                                        B43legacy_SHM_SH_UCODEPATCH);
1747         fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1748                                       B43legacy_SHM_SH_UCODEDATE);
1749         fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1750                                       B43legacy_SHM_SH_UCODETIME);
1751
1752         if (fwrev > 0x128) {
1753                 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1754                              " Only firmware from binary drivers version 3.x"
1755                              " is supported. You must change your firmware"
1756                              " files.\n");
1757                 b43legacy_print_fw_helptext(dev->wl);
1758                 err = -EOPNOTSUPP;
1759                 goto error;
1760         }
1761         b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1762                       "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1763                       (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1764                       (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1765                       fwtime & 0x1F);
1766
1767         dev->fw.rev = fwrev;
1768         dev->fw.patch = fwpatch;
1769
1770         snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
1771                         dev->fw.rev, dev->fw.patch);
1772         wiphy->hw_version = dev->dev->id.coreid;
1773
1774         return 0;
1775
1776 error:
1777         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1778         macctl &= ~B43legacy_MACCTL_PSM_RUN;
1779         macctl |= B43legacy_MACCTL_PSM_JMP0;
1780         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1781
1782         return err;
1783 }
1784
1785 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1786                                     const struct b43legacy_iv *ivals,
1787                                     size_t count,
1788                                     size_t array_size)
1789 {
1790         const struct b43legacy_iv *iv;
1791         u16 offset;
1792         size_t i;
1793         bool bit32;
1794
1795         BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1796         iv = ivals;
1797         for (i = 0; i < count; i++) {
1798                 if (array_size < sizeof(iv->offset_size))
1799                         goto err_format;
1800                 array_size -= sizeof(iv->offset_size);
1801                 offset = be16_to_cpu(iv->offset_size);
1802                 bit32 = !!(offset & B43legacy_IV_32BIT);
1803                 offset &= B43legacy_IV_OFFSET_MASK;
1804                 if (offset >= 0x1000)
1805                         goto err_format;
1806                 if (bit32) {
1807                         u32 value;
1808
1809                         if (array_size < sizeof(iv->data.d32))
1810                                 goto err_format;
1811                         array_size -= sizeof(iv->data.d32);
1812
1813                         value = get_unaligned_be32(&iv->data.d32);
1814                         b43legacy_write32(dev, offset, value);
1815
1816                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1817                                                         sizeof(__be16) +
1818                                                         sizeof(__be32));
1819                 } else {
1820                         u16 value;
1821
1822                         if (array_size < sizeof(iv->data.d16))
1823                                 goto err_format;
1824                         array_size -= sizeof(iv->data.d16);
1825
1826                         value = be16_to_cpu(iv->data.d16);
1827                         b43legacy_write16(dev, offset, value);
1828
1829                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1830                                                         sizeof(__be16) +
1831                                                         sizeof(__be16));
1832                 }
1833         }
1834         if (array_size)
1835                 goto err_format;
1836
1837         return 0;
1838
1839 err_format:
1840         b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1841         b43legacy_print_fw_helptext(dev->wl);
1842
1843         return -EPROTO;
1844 }
1845
1846 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1847 {
1848         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1849         const struct b43legacy_fw_header *hdr;
1850         struct b43legacy_firmware *fw = &dev->fw;
1851         const struct b43legacy_iv *ivals;
1852         size_t count;
1853         int err;
1854
1855         hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1856         ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1857         count = be32_to_cpu(hdr->size);
1858         err = b43legacy_write_initvals(dev, ivals, count,
1859                                  fw->initvals->size - hdr_len);
1860         if (err)
1861                 goto out;
1862         if (fw->initvals_band) {
1863                 hdr = (const struct b43legacy_fw_header *)
1864                       (fw->initvals_band->data);
1865                 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1866                         + hdr_len);
1867                 count = be32_to_cpu(hdr->size);
1868                 err = b43legacy_write_initvals(dev, ivals, count,
1869                                          fw->initvals_band->size - hdr_len);
1870                 if (err)
1871                         goto out;
1872         }
1873 out:
1874
1875         return err;
1876 }
1877
1878 /* Initialize the GPIOs
1879  * http://bcm-specs.sipsolutions.net/GPIO
1880  */
1881 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1882 {
1883         struct ssb_bus *bus = dev->dev->bus;
1884         struct ssb_device *gpiodev, *pcidev = NULL;
1885         u32 mask;
1886         u32 set;
1887
1888         b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1889                           b43legacy_read32(dev,
1890                           B43legacy_MMIO_MACCTL)
1891                           & 0xFFFF3FFF);
1892
1893         b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1894                           b43legacy_read16(dev,
1895                           B43legacy_MMIO_GPIO_MASK)
1896                           | 0x000F);
1897
1898         mask = 0x0000001F;
1899         set = 0x0000000F;
1900         if (dev->dev->bus->chip_id == 0x4301) {
1901                 mask |= 0x0060;
1902                 set |= 0x0060;
1903         }
1904         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1905                 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1906                                   b43legacy_read16(dev,
1907                                   B43legacy_MMIO_GPIO_MASK)
1908                                   | 0x0200);
1909                 mask |= 0x0200;
1910                 set |= 0x0200;
1911         }
1912         if (dev->dev->id.revision >= 2)
1913                 mask  |= 0x0010; /* FIXME: This is redundant. */
1914
1915 #ifdef CONFIG_SSB_DRIVER_PCICORE
1916         pcidev = bus->pcicore.dev;
1917 #endif
1918         gpiodev = bus->chipco.dev ? : pcidev;
1919         if (!gpiodev)
1920                 return 0;
1921         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1922                     (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1923                      & mask) | set);
1924
1925         return 0;
1926 }
1927
1928 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1929 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1930 {
1931         struct ssb_bus *bus = dev->dev->bus;
1932         struct ssb_device *gpiodev, *pcidev = NULL;
1933
1934 #ifdef CONFIG_SSB_DRIVER_PCICORE
1935         pcidev = bus->pcicore.dev;
1936 #endif
1937         gpiodev = bus->chipco.dev ? : pcidev;
1938         if (!gpiodev)
1939                 return;
1940         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1941 }
1942
1943 /* http://bcm-specs.sipsolutions.net/EnableMac */
1944 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1945 {
1946         dev->mac_suspended--;
1947         B43legacy_WARN_ON(dev->mac_suspended < 0);
1948         B43legacy_WARN_ON(irqs_disabled());
1949         if (dev->mac_suspended == 0) {
1950                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1951                                   b43legacy_read32(dev,
1952                                   B43legacy_MMIO_MACCTL)
1953                                   | B43legacy_MACCTL_ENABLED);
1954                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1955                                   B43legacy_IRQ_MAC_SUSPENDED);
1956                 /* the next two are dummy reads */
1957                 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1958                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1959                 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1960
1961                 /* Re-enable IRQs. */
1962                 spin_lock_irq(&dev->wl->irq_lock);
1963                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1964                                   dev->irq_mask);
1965                 spin_unlock_irq(&dev->wl->irq_lock);
1966         }
1967 }
1968
1969 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1970 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1971 {
1972         int i;
1973         u32 tmp;
1974
1975         might_sleep();
1976         B43legacy_WARN_ON(irqs_disabled());
1977         B43legacy_WARN_ON(dev->mac_suspended < 0);
1978
1979         if (dev->mac_suspended == 0) {
1980                 /* Mask IRQs before suspending MAC. Otherwise
1981                  * the MAC stays busy and won't suspend. */
1982                 spin_lock_irq(&dev->wl->irq_lock);
1983                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1984                 spin_unlock_irq(&dev->wl->irq_lock);
1985                 b43legacy_synchronize_irq(dev);
1986
1987                 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1988                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1989                                   b43legacy_read32(dev,
1990                                   B43legacy_MMIO_MACCTL)
1991                                   & ~B43legacy_MACCTL_ENABLED);
1992                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1993                 for (i = 40; i; i--) {
1994                         tmp = b43legacy_read32(dev,
1995                                                B43legacy_MMIO_GEN_IRQ_REASON);
1996                         if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1997                                 goto out;
1998                         msleep(1);
1999                 }
2000                 b43legacyerr(dev->wl, "MAC suspend failed\n");
2001         }
2002 out:
2003         dev->mac_suspended++;
2004 }
2005
2006 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
2007 {
2008         struct b43legacy_wl *wl = dev->wl;
2009         u32 ctl;
2010         u16 cfp_pretbtt;
2011
2012         ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2013         /* Reset status to STA infrastructure mode. */
2014         ctl &= ~B43legacy_MACCTL_AP;
2015         ctl &= ~B43legacy_MACCTL_KEEP_CTL;
2016         ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
2017         ctl &= ~B43legacy_MACCTL_KEEP_BAD;
2018         ctl &= ~B43legacy_MACCTL_PROMISC;
2019         ctl &= ~B43legacy_MACCTL_BEACPROMISC;
2020         ctl |= B43legacy_MACCTL_INFRA;
2021
2022         if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
2023                 ctl |= B43legacy_MACCTL_AP;
2024         else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))
2025                 ctl &= ~B43legacy_MACCTL_INFRA;
2026
2027         if (wl->filter_flags & FIF_CONTROL)
2028                 ctl |= B43legacy_MACCTL_KEEP_CTL;
2029         if (wl->filter_flags & FIF_FCSFAIL)
2030                 ctl |= B43legacy_MACCTL_KEEP_BAD;
2031         if (wl->filter_flags & FIF_PLCPFAIL)
2032                 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
2033         if (wl->filter_flags & FIF_PROMISC_IN_BSS)
2034                 ctl |= B43legacy_MACCTL_PROMISC;
2035         if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
2036                 ctl |= B43legacy_MACCTL_BEACPROMISC;
2037
2038         /* Workaround: On old hardware the HW-MAC-address-filter
2039          * doesn't work properly, so always run promisc in filter
2040          * it in software. */
2041         if (dev->dev->id.revision <= 4)
2042                 ctl |= B43legacy_MACCTL_PROMISC;
2043
2044         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
2045
2046         cfp_pretbtt = 2;
2047         if ((ctl & B43legacy_MACCTL_INFRA) &&
2048             !(ctl & B43legacy_MACCTL_AP)) {
2049                 if (dev->dev->bus->chip_id == 0x4306 &&
2050                     dev->dev->bus->chip_rev == 3)
2051                         cfp_pretbtt = 100;
2052                 else
2053                         cfp_pretbtt = 50;
2054         }
2055         b43legacy_write16(dev, 0x612, cfp_pretbtt);
2056 }
2057
2058 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
2059                                         u16 rate,
2060                                         int is_ofdm)
2061 {
2062         u16 offset;
2063
2064         if (is_ofdm) {
2065                 offset = 0x480;
2066                 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
2067         } else {
2068                 offset = 0x4C0;
2069                 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
2070         }
2071         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
2072                               b43legacy_shm_read16(dev,
2073                               B43legacy_SHM_SHARED, offset));
2074 }
2075
2076 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
2077 {
2078         switch (dev->phy.type) {
2079         case B43legacy_PHYTYPE_G:
2080                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
2081                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
2082                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
2083                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
2084                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
2085                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
2086                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
2087                 /* fallthrough */
2088         case B43legacy_PHYTYPE_B:
2089                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2090                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2091                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2092                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2093                 break;
2094         default:
2095                 B43legacy_BUG_ON(1);
2096         }
2097 }
2098
2099 /* Set the TX-Antenna for management frames sent by firmware. */
2100 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2101                                           int antenna)
2102 {
2103         u16 ant = 0;
2104         u16 tmp;
2105
2106         switch (antenna) {
2107         case B43legacy_ANTENNA0:
2108                 ant |= B43legacy_TX4_PHY_ANT0;
2109                 break;
2110         case B43legacy_ANTENNA1:
2111                 ant |= B43legacy_TX4_PHY_ANT1;
2112                 break;
2113         case B43legacy_ANTENNA_AUTO:
2114                 ant |= B43legacy_TX4_PHY_ANTLAST;
2115                 break;
2116         default:
2117                 B43legacy_BUG_ON(1);
2118         }
2119
2120         /* FIXME We also need to set the other flags of the PHY control
2121          * field somewhere. */
2122
2123         /* For Beacons */
2124         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2125                                    B43legacy_SHM_SH_BEACPHYCTL);
2126         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2127         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2128                               B43legacy_SHM_SH_BEACPHYCTL, tmp);
2129         /* For ACK/CTS */
2130         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2131                                    B43legacy_SHM_SH_ACKCTSPHYCTL);
2132         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2133         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2134                               B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2135         /* For Probe Resposes */
2136         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2137                                    B43legacy_SHM_SH_PRPHYCTL);
2138         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2139         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2140                               B43legacy_SHM_SH_PRPHYCTL, tmp);
2141 }
2142
2143 /* This is the opposite of b43legacy_chip_init() */
2144 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2145 {
2146         b43legacy_radio_turn_off(dev, 1);
2147         b43legacy_gpio_cleanup(dev);
2148         /* firmware is released later */
2149 }
2150
2151 /* Initialize the chip
2152  * http://bcm-specs.sipsolutions.net/ChipInit
2153  */
2154 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2155 {
2156         struct b43legacy_phy *phy = &dev->phy;
2157         int err;
2158         int tmp;
2159         u32 value32, macctl;
2160         u16 value16;
2161
2162         /* Initialize the MAC control */
2163         macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2164         if (dev->phy.gmode)
2165                 macctl |= B43legacy_MACCTL_GMODE;
2166         macctl |= B43legacy_MACCTL_INFRA;
2167         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2168
2169         err = b43legacy_upload_microcode(dev);
2170         if (err)
2171                 goto out; /* firmware is released later */
2172
2173         err = b43legacy_gpio_init(dev);
2174         if (err)
2175                 goto out; /* firmware is released later */
2176
2177         err = b43legacy_upload_initvals(dev);
2178         if (err)
2179                 goto err_gpio_clean;
2180         b43legacy_radio_turn_on(dev);
2181
2182         b43legacy_write16(dev, 0x03E6, 0x0000);
2183         err = b43legacy_phy_init(dev);
2184         if (err)
2185                 goto err_radio_off;
2186
2187         /* Select initial Interference Mitigation. */
2188         tmp = phy->interfmode;
2189         phy->interfmode = B43legacy_INTERFMODE_NONE;
2190         b43legacy_radio_set_interference_mitigation(dev, tmp);
2191
2192         b43legacy_phy_set_antenna_diversity(dev);
2193         b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2194
2195         if (phy->type == B43legacy_PHYTYPE_B) {
2196                 value16 = b43legacy_read16(dev, 0x005E);
2197                 value16 |= 0x0004;
2198                 b43legacy_write16(dev, 0x005E, value16);
2199         }
2200         b43legacy_write32(dev, 0x0100, 0x01000000);
2201         if (dev->dev->id.revision < 5)
2202                 b43legacy_write32(dev, 0x010C, 0x01000000);
2203
2204         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2205         value32 &= ~B43legacy_MACCTL_INFRA;
2206         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2207         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2208         value32 |= B43legacy_MACCTL_INFRA;
2209         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2210
2211         if (b43legacy_using_pio(dev)) {
2212                 b43legacy_write32(dev, 0x0210, 0x00000100);
2213                 b43legacy_write32(dev, 0x0230, 0x00000100);
2214                 b43legacy_write32(dev, 0x0250, 0x00000100);
2215                 b43legacy_write32(dev, 0x0270, 0x00000100);
2216                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2217                                       0x0000);
2218         }
2219
2220         /* Probe Response Timeout value */
2221         /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2222         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2223
2224         /* Initially set the wireless operation mode. */
2225         b43legacy_adjust_opmode(dev);
2226
2227         if (dev->dev->id.revision < 3) {
2228                 b43legacy_write16(dev, 0x060E, 0x0000);
2229                 b43legacy_write16(dev, 0x0610, 0x8000);
2230                 b43legacy_write16(dev, 0x0604, 0x0000);
2231                 b43legacy_write16(dev, 0x0606, 0x0200);
2232         } else {
2233                 b43legacy_write32(dev, 0x0188, 0x80000000);
2234                 b43legacy_write32(dev, 0x018C, 0x02000000);
2235         }
2236         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2237         b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2238         b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2239         b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2240         b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2241         b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2242         b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2243
2244         value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2245         value32 |= B43legacy_TMSLOW_MACPHYCLKEN;
2246         ssb_write32(dev->dev, SSB_TMSLOW, value32);
2247
2248         b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2249                           dev->dev->bus->chipco.fast_pwrup_delay);
2250
2251         /* PHY TX errors counter. */
2252         atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2253
2254         B43legacy_WARN_ON(err != 0);
2255         b43legacydbg(dev->wl, "Chip initialized\n");
2256 out:
2257         return err;
2258
2259 err_radio_off:
2260         b43legacy_radio_turn_off(dev, 1);
2261 err_gpio_clean:
2262         b43legacy_gpio_cleanup(dev);
2263         goto out;
2264 }
2265
2266 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2267 {
2268         struct b43legacy_phy *phy = &dev->phy;
2269
2270         if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2271                 return;
2272
2273         b43legacy_mac_suspend(dev);
2274         b43legacy_phy_lo_g_measure(dev);
2275         b43legacy_mac_enable(dev);
2276 }
2277
2278 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2279 {
2280         b43legacy_phy_lo_mark_all_unused(dev);
2281         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2282                 b43legacy_mac_suspend(dev);
2283                 b43legacy_calc_nrssi_slope(dev);
2284                 b43legacy_mac_enable(dev);
2285         }
2286 }
2287
2288 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2289 {
2290         /* Update device statistics. */
2291         b43legacy_calculate_link_quality(dev);
2292 }
2293
2294 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2295 {
2296         b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2297
2298         atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2299         wmb();
2300 }
2301
2302 static void do_periodic_work(struct b43legacy_wldev *dev)
2303 {
2304         unsigned int state;
2305
2306         state = dev->periodic_state;
2307         if (state % 8 == 0)
2308                 b43legacy_periodic_every120sec(dev);
2309         if (state % 4 == 0)
2310                 b43legacy_periodic_every60sec(dev);
2311         if (state % 2 == 0)
2312                 b43legacy_periodic_every30sec(dev);
2313         b43legacy_periodic_every15sec(dev);
2314 }
2315
2316 /* Periodic work locking policy:
2317  *      The whole periodic work handler is protected by
2318  *      wl->mutex. If another lock is needed somewhere in the
2319  *      pwork callchain, it's acquired in-place, where it's needed.
2320  */
2321 static void b43legacy_periodic_work_handler(struct work_struct *work)
2322 {
2323         struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2324                                              periodic_work.work);
2325         struct b43legacy_wl *wl = dev->wl;
2326         unsigned long delay;
2327
2328         mutex_lock(&wl->mutex);
2329
2330         if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2331                 goto out;
2332         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2333                 goto out_requeue;
2334
2335         do_periodic_work(dev);
2336
2337         dev->periodic_state++;
2338 out_requeue:
2339         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2340                 delay = msecs_to_jiffies(50);
2341         else
2342                 delay = round_jiffies_relative(HZ * 15);
2343         ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay);
2344 out:
2345         mutex_unlock(&wl->mutex);
2346 }
2347
2348 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2349 {
2350         struct delayed_work *work = &dev->periodic_work;
2351
2352         dev->periodic_state = 0;
2353         INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2354         ieee80211_queue_delayed_work(dev->wl->hw, work, 0);
2355 }
2356
2357 /* Validate access to the chip (SHM) */
2358 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2359 {
2360         u32 value;
2361         u32 shm_backup;
2362
2363         shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2364         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2365         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2366                                  0xAA5555AA)
2367                 goto error;
2368         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2369         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2370                                  0x55AAAA55)
2371                 goto error;
2372         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2373
2374         value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2375         if ((value | B43legacy_MACCTL_GMODE) !=
2376             (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2377                 goto error;
2378
2379         value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2380         if (value)
2381                 goto error;
2382
2383         return 0;
2384 error:
2385         b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2386         return -ENODEV;
2387 }
2388
2389 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2390 {
2391         dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2392         B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2393         dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2394                                         0x0056);
2395         /* KTP is a word address, but we address SHM bytewise.
2396          * So multiply by two.
2397          */
2398         dev->ktp *= 2;
2399         if (dev->dev->id.revision >= 5)
2400                 /* Number of RCMTA address slots */
2401                 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2402                                   dev->max_nr_keys - 8);
2403 }
2404
2405 #ifdef CONFIG_B43LEGACY_HWRNG
2406 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2407 {
2408         struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2409         unsigned long flags;
2410
2411         /* Don't take wl->mutex here, as it could deadlock with
2412          * hwrng internal locking. It's not needed to take
2413          * wl->mutex here, anyway. */
2414
2415         spin_lock_irqsave(&wl->irq_lock, flags);
2416         *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2417         spin_unlock_irqrestore(&wl->irq_lock, flags);
2418
2419         return (sizeof(u16));
2420 }
2421 #endif
2422
2423 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2424 {
2425 #ifdef CONFIG_B43LEGACY_HWRNG
2426         if (wl->rng_initialized)
2427                 hwrng_unregister(&wl->rng);
2428 #endif
2429 }
2430
2431 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2432 {
2433         int err = 0;
2434
2435 #ifdef CONFIG_B43LEGACY_HWRNG
2436         snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2437                  "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2438         wl->rng.name = wl->rng_name;
2439         wl->rng.data_read = b43legacy_rng_read;
2440         wl->rng.priv = (unsigned long)wl;
2441         wl->rng_initialized = 1;
2442         err = hwrng_register(&wl->rng);
2443         if (err) {
2444                 wl->rng_initialized = 0;
2445                 b43legacyerr(wl, "Failed to register the random "
2446                        "number generator (%d)\n", err);
2447         }
2448
2449 #endif
2450         return err;
2451 }
2452
2453 static void b43legacy_tx_work(struct work_struct *work)
2454 {
2455         struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
2456                                   tx_work);
2457         struct b43legacy_wldev *dev;
2458         struct sk_buff *skb;
2459         int queue_num;
2460         int err = 0;
2461
2462         mutex_lock(&wl->mutex);
2463         dev = wl->current_dev;
2464         if (unlikely(!dev || b43legacy_status(dev) < B43legacy_STAT_STARTED)) {
2465                 mutex_unlock(&wl->mutex);
2466                 return;
2467         }
2468
2469         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2470                 while (skb_queue_len(&wl->tx_queue[queue_num])) {
2471                         skb = skb_dequeue(&wl->tx_queue[queue_num]);
2472                         if (b43legacy_using_pio(dev))
2473                                 err = b43legacy_pio_tx(dev, skb);
2474                         else
2475                                 err = b43legacy_dma_tx(dev, skb);
2476                         if (err == -ENOSPC) {
2477                                 wl->tx_queue_stopped[queue_num] = 1;
2478                                 ieee80211_stop_queue(wl->hw, queue_num);
2479                                 skb_queue_head(&wl->tx_queue[queue_num], skb);
2480                                 break;
2481                         }
2482                         if (unlikely(err))
2483                                 dev_kfree_skb(skb); /* Drop it */
2484                         err = 0;
2485                 }
2486
2487                 if (!err)
2488                         wl->tx_queue_stopped[queue_num] = 0;
2489         }
2490
2491         mutex_unlock(&wl->mutex);
2492 }
2493
2494 static void b43legacy_op_tx(struct ieee80211_hw *hw,
2495                             struct sk_buff *skb)
2496 {
2497         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2498
2499         if (unlikely(skb->len < 2 + 2 + 6)) {
2500                 /* Too short, this can't be a valid frame. */
2501                 dev_kfree_skb_any(skb);
2502                 return;
2503         }
2504         B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags);
2505
2506         skb_queue_tail(&wl->tx_queue[skb->queue_mapping], skb);
2507         if (!wl->tx_queue_stopped[skb->queue_mapping])
2508                 ieee80211_queue_work(wl->hw, &wl->tx_work);
2509         else
2510                 ieee80211_stop_queue(wl->hw, skb->queue_mapping);
2511 }
2512
2513 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2514                                 struct ieee80211_vif *vif, u16 queue,
2515                                 const struct ieee80211_tx_queue_params *params)
2516 {
2517         return 0;
2518 }
2519
2520 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2521                                   struct ieee80211_low_level_stats *stats)
2522 {
2523         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2524         unsigned long flags;
2525
2526         spin_lock_irqsave(&wl->irq_lock, flags);
2527         memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2528         spin_unlock_irqrestore(&wl->irq_lock, flags);
2529
2530         return 0;
2531 }
2532
2533 static const char *phymode_to_string(unsigned int phymode)
2534 {
2535         switch (phymode) {
2536         case B43legacy_PHYMODE_B:
2537                 return "B";
2538         case B43legacy_PHYMODE_G:
2539                 return "G";
2540         default:
2541                 B43legacy_BUG_ON(1);
2542         }
2543         return "";
2544 }
2545
2546 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2547                                   unsigned int phymode,
2548                                   struct b43legacy_wldev **dev,
2549                                   bool *gmode)
2550 {
2551         struct b43legacy_wldev *d;
2552
2553         list_for_each_entry(d, &wl->devlist, list) {
2554                 if (d->phy.possible_phymodes & phymode) {
2555                         /* Ok, this device supports the PHY-mode.
2556                          * Set the gmode bit. */
2557                         *gmode = true;
2558                         *dev = d;
2559
2560                         return 0;
2561                 }
2562         }
2563
2564         return -ESRCH;
2565 }
2566
2567 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2568 {
2569         struct ssb_device *sdev = dev->dev;
2570         u32 tmslow;
2571
2572         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2573         tmslow &= ~B43legacy_TMSLOW_GMODE;
2574         tmslow |= B43legacy_TMSLOW_PHYRESET;
2575         tmslow |= SSB_TMSLOW_FGC;
2576         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2577         msleep(1);
2578
2579         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2580         tmslow &= ~SSB_TMSLOW_FGC;
2581         tmslow |= B43legacy_TMSLOW_PHYRESET;
2582         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2583         msleep(1);
2584 }
2585
2586 /* Expects wl->mutex locked */
2587 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2588                                       unsigned int new_mode)
2589 {
2590         struct b43legacy_wldev *uninitialized_var(up_dev);
2591         struct b43legacy_wldev *down_dev;
2592         int err;
2593         bool gmode = false;
2594         int prev_status;
2595
2596         err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2597         if (err) {
2598                 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2599                        phymode_to_string(new_mode));
2600                 return err;
2601         }
2602         if ((up_dev == wl->current_dev) &&
2603             (!!wl->current_dev->phy.gmode == !!gmode))
2604                 /* This device is already running. */
2605                 return 0;
2606         b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2607                phymode_to_string(new_mode));
2608         down_dev = wl->current_dev;
2609
2610         prev_status = b43legacy_status(down_dev);
2611         /* Shutdown the currently running core. */
2612         if (prev_status >= B43legacy_STAT_STARTED)
2613                 b43legacy_wireless_core_stop(down_dev);
2614         if (prev_status >= B43legacy_STAT_INITIALIZED)
2615                 b43legacy_wireless_core_exit(down_dev);
2616
2617         if (down_dev != up_dev)
2618                 /* We switch to a different core, so we put PHY into
2619                  * RESET on the old core. */
2620                 b43legacy_put_phy_into_reset(down_dev);
2621
2622         /* Now start the new core. */
2623         up_dev->phy.gmode = gmode;
2624         if (prev_status >= B43legacy_STAT_INITIALIZED) {
2625                 err = b43legacy_wireless_core_init(up_dev);
2626                 if (err) {
2627                         b43legacyerr(wl, "Fatal: Could not initialize device"
2628                                      " for newly selected %s-PHY mode\n",
2629                                      phymode_to_string(new_mode));
2630                         goto init_failure;
2631                 }
2632         }
2633         if (prev_status >= B43legacy_STAT_STARTED) {
2634                 err = b43legacy_wireless_core_start(up_dev);
2635                 if (err) {
2636                         b43legacyerr(wl, "Fatal: Coult not start device for "
2637                                "newly selected %s-PHY mode\n",
2638                                phymode_to_string(new_mode));
2639                         b43legacy_wireless_core_exit(up_dev);
2640                         goto init_failure;
2641                 }
2642         }
2643         B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2644
2645         b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2646
2647         wl->current_dev = up_dev;
2648
2649         return 0;
2650 init_failure:
2651         /* Whoops, failed to init the new core. No core is operating now. */
2652         wl->current_dev = NULL;
2653         return err;
2654 }
2655
2656 /* Write the short and long frame retry limit values. */
2657 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2658                                        unsigned int short_retry,
2659                                        unsigned int long_retry)
2660 {
2661         /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2662          * the chip-internal counter. */
2663         short_retry = min(short_retry, (unsigned int)0xF);
2664         long_retry = min(long_retry, (unsigned int)0xF);
2665
2666         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2667         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2668 }
2669
2670 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2671                                    u32 changed)
2672 {
2673         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2674         struct b43legacy_wldev *dev;
2675         struct b43legacy_phy *phy;
2676         struct ieee80211_conf *conf = &hw->conf;
2677         unsigned long flags;
2678         unsigned int new_phymode = 0xFFFF;
2679         int antenna_tx;
2680         int err = 0;
2681
2682         antenna_tx = B43legacy_ANTENNA_DEFAULT;
2683
2684         mutex_lock(&wl->mutex);
2685         dev = wl->current_dev;
2686         phy = &dev->phy;
2687
2688         if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
2689                 b43legacy_set_retry_limits(dev,
2690                                            conf->short_frame_max_tx_count,
2691                                            conf->long_frame_max_tx_count);
2692         changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
2693         if (!changed)
2694                 goto out_unlock_mutex;
2695
2696         /* Switch the PHY mode (if necessary). */
2697         switch (conf->channel->band) {
2698         case IEEE80211_BAND_2GHZ:
2699                 if (phy->type == B43legacy_PHYTYPE_B)
2700                         new_phymode = B43legacy_PHYMODE_B;
2701                 else
2702                         new_phymode = B43legacy_PHYMODE_G;
2703                 break;
2704         default:
2705                 B43legacy_WARN_ON(1);
2706         }
2707         err = b43legacy_switch_phymode(wl, new_phymode);
2708         if (err)
2709                 goto out_unlock_mutex;
2710
2711         /* Disable IRQs while reconfiguring the device.
2712          * This makes it possible to drop the spinlock throughout
2713          * the reconfiguration process. */
2714         spin_lock_irqsave(&wl->irq_lock, flags);
2715         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2716                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2717                 goto out_unlock_mutex;
2718         }
2719         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2720         spin_unlock_irqrestore(&wl->irq_lock, flags);
2721         b43legacy_synchronize_irq(dev);
2722
2723         /* Switch to the requested channel.
2724          * The firmware takes care of races with the TX handler. */
2725         if (conf->channel->hw_value != phy->channel)
2726                 b43legacy_radio_selectchannel(dev, conf->channel->hw_value, 0);
2727
2728         dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
2729
2730         /* Adjust the desired TX power level. */
2731         if (conf->power_level != 0) {
2732                 if (conf->power_level != phy->power_level) {
2733                         phy->power_level = conf->power_level;
2734                         b43legacy_phy_xmitpower(dev);
2735                 }
2736         }
2737
2738         /* Antennas for RX and management frame TX. */
2739         b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2740
2741         if (wl->radio_enabled != phy->radio_on) {
2742                 if (wl->radio_enabled) {
2743                         b43legacy_radio_turn_on(dev);
2744                         b43legacyinfo(dev->wl, "Radio turned on by software\n");
2745                         if (!dev->radio_hw_enable)
2746                                 b43legacyinfo(dev->wl, "The hardware RF-kill"
2747                                               " button still turns the radio"
2748                                               " physically off. Press the"
2749                                               " button to turn it on.\n");
2750                 } else {
2751                         b43legacy_radio_turn_off(dev, 0);
2752                         b43legacyinfo(dev->wl, "Radio turned off by"
2753                                       " software\n");
2754                 }
2755         }
2756
2757         spin_lock_irqsave(&wl->irq_lock, flags);
2758         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2759         mmiowb();
2760         spin_unlock_irqrestore(&wl->irq_lock, flags);
2761 out_unlock_mutex:
2762         mutex_unlock(&wl->mutex);
2763
2764         return err;
2765 }
2766
2767 static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates)
2768 {
2769         struct ieee80211_supported_band *sband =
2770                 dev->wl->hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2771         struct ieee80211_rate *rate;
2772         int i;
2773         u16 basic, direct, offset, basic_offset, rateptr;
2774
2775         for (i = 0; i < sband->n_bitrates; i++) {
2776                 rate = &sband->bitrates[i];
2777
2778                 if (b43legacy_is_cck_rate(rate->hw_value)) {
2779                         direct = B43legacy_SHM_SH_CCKDIRECT;
2780                         basic = B43legacy_SHM_SH_CCKBASIC;
2781                         offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2782                         offset &= 0xF;
2783                 } else {
2784                         direct = B43legacy_SHM_SH_OFDMDIRECT;
2785                         basic = B43legacy_SHM_SH_OFDMBASIC;
2786                         offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2787                         offset &= 0xF;
2788                 }
2789
2790                 rate = ieee80211_get_response_rate(sband, brates, rate->bitrate);
2791
2792                 if (b43legacy_is_cck_rate(rate->hw_value)) {
2793                         basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2794                         basic_offset &= 0xF;
2795                 } else {
2796                         basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2797                         basic_offset &= 0xF;
2798                 }
2799
2800                 /*
2801                  * Get the pointer that we need to point to
2802                  * from the direct map
2803                  */
2804                 rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2805                                                direct + 2 * basic_offset);
2806                 /* and write it to the basic map */
2807                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2808                                       basic + 2 * offset, rateptr);
2809         }
2810 }
2811
2812 static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2813                                     struct ieee80211_vif *vif,
2814                                     struct ieee80211_bss_conf *conf,
2815                                     u32 changed)
2816 {
2817         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2818         struct b43legacy_wldev *dev;
2819         unsigned long flags;
2820
2821         mutex_lock(&wl->mutex);
2822         B43legacy_WARN_ON(wl->vif != vif);
2823
2824         dev = wl->current_dev;
2825
2826         /* Disable IRQs while reconfiguring the device.
2827          * This makes it possible to drop the spinlock throughout
2828          * the reconfiguration process. */
2829         spin_lock_irqsave(&wl->irq_lock, flags);
2830         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2831                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2832                 goto out_unlock_mutex;
2833         }
2834         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2835
2836         if (changed & BSS_CHANGED_BSSID) {
2837                 b43legacy_synchronize_irq(dev);
2838
2839                 if (conf->bssid)
2840                         memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2841                 else
2842                         memset(wl->bssid, 0, ETH_ALEN);
2843         }
2844
2845         if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2846                 if (changed & BSS_CHANGED_BEACON &&
2847                     (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2848                      b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2849                         b43legacy_update_templates(wl);
2850
2851                 if (changed & BSS_CHANGED_BSSID)
2852                         b43legacy_write_mac_bssid_templates(dev);
2853         }
2854         spin_unlock_irqrestore(&wl->irq_lock, flags);
2855
2856         b43legacy_mac_suspend(dev);
2857
2858         if (changed & BSS_CHANGED_BEACON_INT &&
2859             (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2860              b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2861                 b43legacy_set_beacon_int(dev, conf->beacon_int);
2862
2863         if (changed & BSS_CHANGED_BASIC_RATES)
2864                 b43legacy_update_basic_rates(dev, conf->basic_rates);
2865
2866         if (changed & BSS_CHANGED_ERP_SLOT) {
2867                 if (conf->use_short_slot)
2868                         b43legacy_short_slot_timing_enable(dev);
2869                 else
2870                         b43legacy_short_slot_timing_disable(dev);
2871         }
2872
2873         b43legacy_mac_enable(dev);
2874
2875         spin_lock_irqsave(&wl->irq_lock, flags);
2876         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2877         /* XXX: why? */
2878         mmiowb();
2879         spin_unlock_irqrestore(&wl->irq_lock, flags);
2880  out_unlock_mutex:
2881         mutex_unlock(&wl->mutex);
2882 }
2883
2884 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2885                                           unsigned int changed,
2886                                           unsigned int *fflags,u64 multicast)
2887 {
2888         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2889         struct b43legacy_wldev *dev = wl->current_dev;
2890         unsigned long flags;
2891
2892         if (!dev) {
2893                 *fflags = 0;
2894                 return;
2895         }
2896
2897         spin_lock_irqsave(&wl->irq_lock, flags);
2898         *fflags &= FIF_PROMISC_IN_BSS |
2899                   FIF_ALLMULTI |
2900                   FIF_FCSFAIL |
2901                   FIF_PLCPFAIL |
2902                   FIF_CONTROL |
2903                   FIF_OTHER_BSS |
2904                   FIF_BCN_PRBRESP_PROMISC;
2905
2906         changed &= FIF_PROMISC_IN_BSS |
2907                    FIF_ALLMULTI |
2908                    FIF_FCSFAIL |
2909                    FIF_PLCPFAIL |
2910                    FIF_CONTROL |
2911                    FIF_OTHER_BSS |
2912                    FIF_BCN_PRBRESP_PROMISC;
2913
2914         wl->filter_flags = *fflags;
2915
2916         if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2917                 b43legacy_adjust_opmode(dev);
2918         spin_unlock_irqrestore(&wl->irq_lock, flags);
2919 }
2920
2921 /* Locking: wl->mutex */
2922 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2923 {
2924         struct b43legacy_wl *wl = dev->wl;
2925         unsigned long flags;
2926         int queue_num;
2927
2928         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2929                 return;
2930
2931         /* Disable and sync interrupts. We must do this before than
2932          * setting the status to INITIALIZED, as the interrupt handler
2933          * won't care about IRQs then. */
2934         spin_lock_irqsave(&wl->irq_lock, flags);
2935         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2936         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2937         spin_unlock_irqrestore(&wl->irq_lock, flags);
2938         b43legacy_synchronize_irq(dev);
2939
2940         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2941
2942         mutex_unlock(&wl->mutex);
2943         /* Must unlock as it would otherwise deadlock. No races here.
2944          * Cancel the possibly running self-rearming periodic work. */
2945         cancel_delayed_work_sync(&dev->periodic_work);
2946         cancel_work_sync(&wl->tx_work);
2947         mutex_lock(&wl->mutex);
2948
2949         /* Drain all TX queues. */
2950         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2951                 while (skb_queue_len(&wl->tx_queue[queue_num]))
2952                         dev_kfree_skb(skb_dequeue(&wl->tx_queue[queue_num]));
2953         }
2954
2955 b43legacy_mac_suspend(dev);
2956         free_irq(dev->dev->irq, dev);
2957         b43legacydbg(wl, "Wireless interface stopped\n");
2958 }
2959
2960 /* Locking: wl->mutex */
2961 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2962 {
2963         int err;
2964
2965         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2966
2967         drain_txstatus_queue(dev);
2968         err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2969                           IRQF_SHARED, KBUILD_MODNAME, dev);
2970         if (err) {
2971                 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2972                        dev->dev->irq);
2973                 goto out;
2974         }
2975         /* We are ready to run. */
2976         ieee80211_wake_queues(dev->wl->hw);
2977         b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2978
2979         /* Start data flow (TX/RX) */
2980         b43legacy_mac_enable(dev);
2981         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2982
2983         /* Start maintenance work */
2984         b43legacy_periodic_tasks_setup(dev);
2985
2986         b43legacydbg(dev->wl, "Wireless interface started\n");
2987 out:
2988         return err;
2989 }
2990
2991 /* Get PHY and RADIO versioning numbers */
2992 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2993 {
2994         struct b43legacy_phy *phy = &dev->phy;
2995         u32 tmp;
2996         u8 analog_type;
2997         u8 phy_type;
2998         u8 phy_rev;
2999         u16 radio_manuf;
3000         u16 radio_ver;
3001         u16 radio_rev;
3002         int unsupported = 0;
3003
3004         /* Get PHY versioning */
3005         tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
3006         analog_type = (tmp & B43legacy_PHYVER_ANALOG)
3007                       >> B43legacy_PHYVER_ANALOG_SHIFT;
3008         phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
3009         phy_rev = (tmp & B43legacy_PHYVER_VERSION);
3010         switch (phy_type) {
3011         case B43legacy_PHYTYPE_B:
3012                 if (phy_rev != 2 && phy_rev != 4
3013                     && phy_rev != 6 && phy_rev != 7)
3014                         unsupported = 1;
3015                 break;
3016         case B43legacy_PHYTYPE_G:
3017                 if (phy_rev > 8)
3018                         unsupported = 1;
3019                 break;
3020         default:
3021                 unsupported = 1;
3022         }
3023         if (unsupported) {
3024                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
3025                        "(Analog %u, Type %u, Revision %u)\n",
3026                        analog_type, phy_type, phy_rev);
3027                 return -EOPNOTSUPP;
3028         }
3029         b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
3030                analog_type, phy_type, phy_rev);
3031
3032
3033         /* Get RADIO versioning */
3034         if (dev->dev->bus->chip_id == 0x4317) {
3035                 if (dev->dev->bus->chip_rev == 0)
3036                         tmp = 0x3205017F;
3037                 else if (dev->dev->bus->chip_rev == 1)
3038                         tmp = 0x4205017F;
3039                 else
3040                         tmp = 0x5205017F;
3041         } else {
3042                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3043                                   B43legacy_RADIOCTL_ID);
3044                 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
3045                 tmp <<= 16;
3046                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3047                                   B43legacy_RADIOCTL_ID);
3048                 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
3049         }
3050         radio_manuf = (tmp & 0x00000FFF);
3051         radio_ver = (tmp & 0x0FFFF000) >> 12;
3052         radio_rev = (tmp & 0xF0000000) >> 28;
3053         switch (phy_type) {
3054         case B43legacy_PHYTYPE_B:
3055                 if ((radio_ver & 0xFFF0) != 0x2050)
3056                         unsupported = 1;
3057                 break;
3058         case B43legacy_PHYTYPE_G:
3059                 if (radio_ver != 0x2050)
3060                         unsupported = 1;
3061                 break;
3062         default:
3063                 B43legacy_BUG_ON(1);
3064         }
3065         if (unsupported) {
3066                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
3067                        "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
3068                        radio_manuf, radio_ver, radio_rev);
3069                 return -EOPNOTSUPP;
3070         }
3071         b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
3072                      " Revision %u\n", radio_manuf, radio_ver, radio_rev);
3073
3074
3075         phy->radio_manuf = radio_manuf;
3076         phy->radio_ver = radio_ver;
3077         phy->radio_rev = radio_rev;
3078
3079         phy->analog = analog_type;
3080         phy->type = phy_type;
3081         phy->rev = phy_rev;
3082
3083         return 0;
3084 }
3085
3086 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
3087                                       struct b43legacy_phy *phy)
3088 {
3089         struct b43legacy_lopair *lo;
3090         int i;
3091
3092         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3093         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3094
3095         /* Assume the radio is enabled. If it's not enabled, the state will
3096          * immediately get fixed on the first periodic work run. */
3097         dev->radio_hw_enable = true;
3098
3099         phy->savedpctlreg = 0xFFFF;
3100         phy->aci_enable = false;
3101         phy->aci_wlan_automatic = false;
3102         phy->aci_hw_rssi = false;
3103
3104         lo = phy->_lo_pairs;
3105         if (lo)
3106                 memset(lo, 0, sizeof(struct b43legacy_lopair) *
3107                                      B43legacy_LO_COUNT);
3108         phy->max_lb_gain = 0;
3109         phy->trsw_rx_gain = 0;
3110
3111         /* Set default attenuation values. */
3112         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3113         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3114         phy->txctl1 = b43legacy_default_txctl1(dev);
3115         phy->txpwr_offset = 0;
3116
3117         /* NRSSI */
3118         phy->nrssislope = 0;
3119         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3120                 phy->nrssi[i] = -1000;
3121         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3122                 phy->nrssi_lt[i] = i;
3123
3124         phy->lofcal = 0xFFFF;
3125         phy->initval = 0xFFFF;
3126
3127         phy->interfmode = B43legacy_INTERFMODE_NONE;
3128         phy->channel = 0xFF;
3129 }
3130
3131 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
3132 {
3133         /* Flags */
3134         dev->dfq_valid = false;
3135
3136         /* Stats */
3137         memset(&dev->stats, 0, sizeof(dev->stats));
3138
3139         setup_struct_phy_for_init(dev, &dev->phy);
3140
3141         /* IRQ related flags */
3142         dev->irq_reason = 0;
3143         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
3144         dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE;
3145
3146         dev->mac_suspended = 1;
3147
3148         /* Noise calculation context */
3149         memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
3150 }
3151
3152 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
3153                                           bool idle) {
3154         u16 pu_delay = 1050;
3155
3156         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
3157                 pu_delay = 500;
3158         if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
3159                 pu_delay = max(pu_delay, (u16)2400);
3160
3161         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3162                               B43legacy_SHM_SH_SPUWKUP, pu_delay);
3163 }
3164
3165 /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
3166 static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
3167 {
3168         u16 pretbtt;
3169
3170         /* The time value is in microseconds. */
3171         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
3172                 pretbtt = 2;
3173         else
3174                 pretbtt = 250;
3175         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3176                               B43legacy_SHM_SH_PRETBTT, pretbtt);
3177         b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
3178 }
3179
3180 /* Shutdown a wireless core */
3181 /* Locking: wl->mutex */
3182 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3183 {
3184         struct b43legacy_phy *phy = &dev->phy;
3185         u32 macctl;
3186
3187         B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3188         if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3189                 return;
3190         b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3191
3192         /* Stop the microcode PSM. */
3193         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3194         macctl &= ~B43legacy_MACCTL_PSM_RUN;
3195         macctl |= B43legacy_MACCTL_PSM_JMP0;
3196         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3197
3198         b43legacy_leds_exit(dev);
3199         b43legacy_rng_exit(dev->wl);
3200         b43legacy_pio_free(dev);
3201         b43legacy_dma_free(dev);
3202         b43legacy_chip_exit(dev);
3203         b43legacy_radio_turn_off(dev, 1);
3204         b43legacy_switch_analog(dev, 0);
3205         if (phy->dyn_tssi_tbl)
3206                 kfree(phy->tssi2dbm);
3207         kfree(phy->lo_control);
3208         phy->lo_control = NULL;
3209         if (dev->wl->current_beacon) {
3210                 dev_kfree_skb_any(dev->wl->current_beacon);
3211                 dev->wl->current_beacon = NULL;
3212         }
3213
3214         ssb_device_disable(dev->dev, 0);
3215         ssb_bus_may_powerdown(dev->dev->bus);
3216 }
3217
3218 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3219 {
3220         struct b43legacy_phy *phy = &dev->phy;
3221         int i;
3222
3223         /* Set default attenuation values. */
3224         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3225         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3226         phy->txctl1 = b43legacy_default_txctl1(dev);
3227         phy->txctl2 = 0xFFFF;
3228         phy->txpwr_offset = 0;
3229
3230         /* NRSSI */
3231         phy->nrssislope = 0;
3232         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3233                 phy->nrssi[i] = -1000;
3234         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3235                 phy->nrssi_lt[i] = i;
3236
3237         phy->lofcal = 0xFFFF;
3238         phy->initval = 0xFFFF;
3239
3240         phy->aci_enable = false;
3241         phy->aci_wlan_automatic = false;
3242         phy->aci_hw_rssi = false;
3243
3244         phy->antenna_diversity = 0xFFFF;
3245         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3246         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3247
3248         /* Flags */
3249         phy->calibrated = 0;
3250
3251         if (phy->_lo_pairs)
3252                 memset(phy->_lo_pairs, 0,
3253                        sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3254         memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3255 }
3256
3257 /* Initialize a wireless core */
3258 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3259 {
3260         struct b43legacy_wl *wl = dev->wl;
3261         struct ssb_bus *bus = dev->dev->bus;
3262         struct b43legacy_phy *phy = &dev->phy;
3263         struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3264         int err;
3265         u32 hf;
3266         u32 tmp;
3267
3268         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3269
3270         err = ssb_bus_powerup(bus, 0);
3271         if (err)
3272                 goto out;
3273         if (!ssb_device_is_enabled(dev->dev)) {
3274                 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3275                 b43legacy_wireless_core_reset(dev, tmp);
3276         }
3277
3278         if ((phy->type == B43legacy_PHYTYPE_B) ||
3279             (phy->type == B43legacy_PHYTYPE_G)) {
3280                 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3281                                          * B43legacy_LO_COUNT,
3282                                          GFP_KERNEL);
3283                 if (!phy->_lo_pairs)
3284                         return -ENOMEM;
3285         }
3286         setup_struct_wldev_for_init(dev);
3287
3288         err = b43legacy_phy_init_tssi2dbm_table(dev);
3289         if (err)
3290                 goto err_kfree_lo_control;
3291
3292         /* Enable IRQ routing to this device. */
3293         ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3294
3295         prepare_phy_data_for_init(dev);
3296         b43legacy_phy_calibrate(dev);
3297         err = b43legacy_chip_init(dev);
3298         if (err)
3299                 goto err_kfree_tssitbl;
3300         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3301                               B43legacy_SHM_SH_WLCOREREV,
3302                               dev->dev->id.revision);
3303         hf = b43legacy_hf_read(dev);
3304         if (phy->type == B43legacy_PHYTYPE_G) {
3305                 hf |= B43legacy_HF_SYMW;
3306                 if (phy->rev == 1)
3307                         hf |= B43legacy_HF_GDCW;
3308                 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3309                         hf |= B43legacy_HF_OFDMPABOOST;
3310         } else if (phy->type == B43legacy_PHYTYPE_B) {
3311                 hf |= B43legacy_HF_SYMW;
3312                 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3313                         hf &= ~B43legacy_HF_GDCW;
3314         }
3315         b43legacy_hf_write(dev, hf);
3316
3317         b43legacy_set_retry_limits(dev,
3318                                    B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3319                                    B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3320
3321         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3322                               0x0044, 3);
3323         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3324                               0x0046, 2);
3325
3326         /* Disable sending probe responses from firmware.
3327          * Setting the MaxTime to one usec will always trigger
3328          * a timeout, so we never send any probe resp.
3329          * A timeout of zero is infinite. */
3330         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3331                               B43legacy_SHM_SH_PRMAXTIME, 1);
3332
3333         b43legacy_rate_memory_init(dev);
3334
3335         /* Minimum Contention Window */
3336         if (phy->type == B43legacy_PHYTYPE_B)
3337                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3338                                       0x0003, 31);
3339         else
3340                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3341                                       0x0003, 15);
3342         /* Maximum Contention Window */
3343         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3344                               0x0004, 1023);
3345
3346         do {
3347                 if (b43legacy_using_pio(dev))
3348                         err = b43legacy_pio_init(dev);
3349                 else {
3350                         err = b43legacy_dma_init(dev);
3351                         if (!err)
3352                                 b43legacy_qos_init(dev);
3353                 }
3354         } while (err == -EAGAIN);
3355         if (err)
3356                 goto err_chip_exit;
3357
3358         b43legacy_set_synth_pu_delay(dev, 1);
3359
3360         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3361         b43legacy_upload_card_macaddress(dev);
3362         b43legacy_security_init(dev);
3363         b43legacy_rng_init(wl);
3364
3365         ieee80211_wake_queues(dev->wl->hw);
3366         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3367
3368         b43legacy_leds_init(dev);
3369 out:
3370         return err;
3371
3372 err_chip_exit:
3373         b43legacy_chip_exit(dev);
3374 err_kfree_tssitbl:
3375         if (phy->dyn_tssi_tbl)
3376                 kfree(phy->tssi2dbm);
3377 err_kfree_lo_control:
3378         kfree(phy->lo_control);
3379         phy->lo_control = NULL;
3380         ssb_bus_may_powerdown(bus);
3381         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3382         return err;
3383 }
3384
3385 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3386                                       struct ieee80211_vif *vif)
3387 {
3388         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3389         struct b43legacy_wldev *dev;
3390         unsigned long flags;
3391         int err = -EOPNOTSUPP;
3392
3393         /* TODO: allow WDS/AP devices to coexist */
3394
3395         if (vif->type != NL80211_IFTYPE_AP &&
3396             vif->type != NL80211_IFTYPE_STATION &&
3397             vif->type != NL80211_IFTYPE_WDS &&
3398             vif->type != NL80211_IFTYPE_ADHOC)
3399                 return -EOPNOTSUPP;
3400
3401         mutex_lock(&wl->mutex);
3402         if (wl->operating)
3403                 goto out_mutex_unlock;
3404
3405         b43legacydbg(wl, "Adding Interface type %d\n", vif->type);
3406
3407         dev = wl->current_dev;
3408         wl->operating = true;
3409         wl->vif = vif;
3410         wl->if_type = vif->type;
3411         memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
3412
3413         spin_lock_irqsave(&wl->irq_lock, flags);
3414         b43legacy_adjust_opmode(dev);
3415         b43legacy_set_pretbtt(dev);
3416         b43legacy_set_synth_pu_delay(dev, 0);
3417         b43legacy_upload_card_macaddress(dev);
3418         spin_unlock_irqrestore(&wl->irq_lock, flags);
3419
3420         err = 0;
3421  out_mutex_unlock:
3422         mutex_unlock(&wl->mutex);
3423
3424         return err;
3425 }
3426
3427 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3428                                           struct ieee80211_vif *vif)
3429 {
3430         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3431         struct b43legacy_wldev *dev = wl->current_dev;
3432         unsigned long flags;
3433
3434         b43legacydbg(wl, "Removing Interface type %d\n", vif->type);
3435
3436         mutex_lock(&wl->mutex);
3437
3438         B43legacy_WARN_ON(!wl->operating);
3439         B43legacy_WARN_ON(wl->vif != vif);
3440         wl->vif = NULL;
3441
3442         wl->operating = false;
3443
3444         spin_lock_irqsave(&wl->irq_lock, flags);
3445         b43legacy_adjust_opmode(dev);
3446         memset(wl->mac_addr, 0, ETH_ALEN);
3447         b43legacy_upload_card_macaddress(dev);
3448         spin_unlock_irqrestore(&wl->irq_lock, flags);
3449
3450         mutex_unlock(&wl->mutex);
3451 }
3452
3453 static int b43legacy_op_start(struct ieee80211_hw *hw)
3454 {
3455         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3456         struct b43legacy_wldev *dev = wl->current_dev;
3457         int did_init = 0;
3458         int err = 0;
3459
3460         /* Kill all old instance specific information to make sure
3461          * the card won't use it in the short timeframe between start
3462          * and mac80211 reconfiguring it. */
3463         memset(wl->bssid, 0, ETH_ALEN);
3464         memset(wl->mac_addr, 0, ETH_ALEN);
3465         wl->filter_flags = 0;
3466         wl->beacon0_uploaded = false;
3467         wl->beacon1_uploaded = false;
3468         wl->beacon_templates_virgin = true;
3469         wl->radio_enabled = true;
3470
3471         mutex_lock(&wl->mutex);
3472
3473         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3474                 err = b43legacy_wireless_core_init(dev);
3475                 if (err)
3476                         goto out_mutex_unlock;
3477                 did_init = 1;
3478         }
3479
3480         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3481                 err = b43legacy_wireless_core_start(dev);
3482                 if (err) {
3483                         if (did_init)
3484                                 b43legacy_wireless_core_exit(dev);
3485                         goto out_mutex_unlock;
3486                 }
3487         }
3488
3489         wiphy_rfkill_start_polling(hw->wiphy);
3490
3491 out_mutex_unlock:
3492         mutex_unlock(&wl->mutex);
3493
3494         return err;
3495 }
3496
3497 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3498 {
3499         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3500         struct b43legacy_wldev *dev = wl->current_dev;
3501
3502         cancel_work_sync(&(wl->beacon_update_trigger));
3503
3504         mutex_lock(&wl->mutex);
3505         if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3506                 b43legacy_wireless_core_stop(dev);
3507         b43legacy_wireless_core_exit(dev);
3508         wl->radio_enabled = false;
3509         mutex_unlock(&wl->mutex);
3510 }
3511
3512 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3513                                        struct ieee80211_sta *sta, bool set)
3514 {
3515         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3516         unsigned long flags;
3517
3518         spin_lock_irqsave(&wl->irq_lock, flags);
3519         b43legacy_update_templates(wl);
3520         spin_unlock_irqrestore(&wl->irq_lock, flags);
3521
3522         return 0;
3523 }
3524
3525 static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx,
3526                                    struct survey_info *survey)
3527 {
3528         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3529         struct b43legacy_wldev *dev = wl->current_dev;
3530         struct ieee80211_conf *conf = &hw->conf;
3531
3532         if (idx != 0)
3533                 return -ENOENT;
3534
3535         survey->channel = conf->channel;
3536         survey->filled = SURVEY_INFO_NOISE_DBM;
3537         survey->noise = dev->stats.link_noise;
3538
3539         return 0;
3540 }
3541
3542 static const struct ieee80211_ops b43legacy_hw_ops = {
3543         .tx                     = b43legacy_op_tx,
3544         .conf_tx                = b43legacy_op_conf_tx,
3545         .add_interface          = b43legacy_op_add_interface,
3546         .remove_interface       = b43legacy_op_remove_interface,
3547         .config                 = b43legacy_op_dev_config,
3548         .bss_info_changed       = b43legacy_op_bss_info_changed,
3549         .configure_filter       = b43legacy_op_configure_filter,
3550         .get_stats              = b43legacy_op_get_stats,
3551         .start                  = b43legacy_op_start,
3552         .stop                   = b43legacy_op_stop,
3553         .set_tim                = b43legacy_op_beacon_set_tim,
3554         .get_survey             = b43legacy_op_get_survey,
3555         .rfkill_poll            = b43legacy_rfkill_poll,
3556 };
3557
3558 /* Hard-reset the chip. Do not call this directly.
3559  * Use b43legacy_controller_restart()
3560  */
3561 static void b43legacy_chip_reset(struct work_struct *work)
3562 {
3563         struct b43legacy_wldev *dev =
3564                 container_of(work, struct b43legacy_wldev, restart_work);
3565         struct b43legacy_wl *wl = dev->wl;
3566         int err = 0;
3567         int prev_status;
3568
3569         mutex_lock(&wl->mutex);
3570
3571         prev_status = b43legacy_status(dev);
3572         /* Bring the device down... */
3573         if (prev_status >= B43legacy_STAT_STARTED)
3574                 b43legacy_wireless_core_stop(dev);
3575         if (prev_status >= B43legacy_STAT_INITIALIZED)
3576                 b43legacy_wireless_core_exit(dev);
3577
3578         /* ...and up again. */
3579         if (prev_status >= B43legacy_STAT_INITIALIZED) {
3580                 err = b43legacy_wireless_core_init(dev);
3581                 if (err)
3582                         goto out;
3583         }
3584         if (prev_status >= B43legacy_STAT_STARTED) {
3585                 err = b43legacy_wireless_core_start(dev);
3586                 if (err) {
3587                         b43legacy_wireless_core_exit(dev);
3588                         goto out;
3589                 }
3590         }
3591 out:
3592         if (err)
3593                 wl->current_dev = NULL; /* Failed to init the dev. */
3594         mutex_unlock(&wl->mutex);
3595         if (err)
3596                 b43legacyerr(wl, "Controller restart FAILED\n");
3597         else
3598                 b43legacyinfo(wl, "Controller restarted\n");
3599 }
3600
3601 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3602                                  int have_bphy,
3603                                  int have_gphy)
3604 {
3605         struct ieee80211_hw *hw = dev->wl->hw;
3606         struct b43legacy_phy *phy = &dev->phy;
3607
3608         phy->possible_phymodes = 0;
3609         if (have_bphy) {
3610                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3611                         &b43legacy_band_2GHz_BPHY;
3612                 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3613         }
3614
3615         if (have_gphy) {
3616                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3617                         &b43legacy_band_2GHz_GPHY;
3618                 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3619         }
3620
3621         return 0;
3622 }
3623
3624 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3625 {
3626         /* We release firmware that late to not be required to re-request
3627          * is all the time when we reinit the core. */
3628         b43legacy_release_firmware(dev);
3629 }
3630
3631 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3632 {
3633         struct b43legacy_wl *wl = dev->wl;
3634         struct ssb_bus *bus = dev->dev->bus;
3635         struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
3636         int err;
3637         int have_bphy = 0;
3638         int have_gphy = 0;
3639         u32 tmp;
3640
3641         /* Do NOT do any device initialization here.
3642          * Do it in wireless_core_init() instead.
3643          * This function is for gathering basic information about the HW, only.
3644          * Also some structs may be set up here. But most likely you want to
3645          * have that in core_init(), too.
3646          */
3647
3648         err = ssb_bus_powerup(bus, 0);
3649         if (err) {
3650                 b43legacyerr(wl, "Bus powerup failed\n");
3651                 goto out;
3652         }
3653         /* Get the PHY type. */
3654         if (dev->dev->id.revision >= 5) {
3655                 u32 tmshigh;
3656
3657                 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3658                 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3659                 if (!have_gphy)
3660                         have_bphy = 1;
3661         } else if (dev->dev->id.revision == 4)
3662                 have_gphy = 1;
3663         else
3664                 have_bphy = 1;
3665
3666         dev->phy.gmode = (have_gphy || have_bphy);
3667         dev->phy.radio_on = true;
3668         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3669         b43legacy_wireless_core_reset(dev, tmp);
3670
3671         err = b43legacy_phy_versioning(dev);
3672         if (err)
3673                 goto err_powerdown;
3674         /* Check if this device supports multiband. */
3675         if (!pdev ||
3676             (pdev->device != 0x4312 &&
3677              pdev->device != 0x4319 &&
3678              pdev->device != 0x4324)) {
3679                 /* No multiband support. */
3680                 have_bphy = 0;
3681                 have_gphy = 0;
3682                 switch (dev->phy.type) {
3683                 case B43legacy_PHYTYPE_B:
3684                         have_bphy = 1;
3685                         break;
3686                 case B43legacy_PHYTYPE_G:
3687                         have_gphy = 1;
3688                         break;
3689                 default:
3690                         B43legacy_BUG_ON(1);
3691                 }
3692         }
3693         dev->phy.gmode = (have_gphy || have_bphy);
3694         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3695         b43legacy_wireless_core_reset(dev, tmp);
3696
3697         err = b43legacy_validate_chipaccess(dev);
3698         if (err)
3699                 goto err_powerdown;
3700         err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3701         if (err)
3702                 goto err_powerdown;
3703
3704         /* Now set some default "current_dev" */
3705         if (!wl->current_dev)
3706                 wl->current_dev = dev;
3707         INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3708
3709         b43legacy_radio_turn_off(dev, 1);
3710         b43legacy_switch_analog(dev, 0);
3711         ssb_device_disable(dev->dev, 0);
3712         ssb_bus_may_powerdown(bus);
3713
3714 out:
3715         return err;
3716
3717 err_powerdown:
3718         ssb_bus_may_powerdown(bus);
3719         return err;
3720 }
3721
3722 static void b43legacy_one_core_detach(struct ssb_device *dev)
3723 {
3724         struct b43legacy_wldev *wldev;
3725         struct b43legacy_wl *wl;
3726
3727         /* Do not cancel ieee80211-workqueue based work here.
3728          * See comment in b43legacy_remove(). */
3729
3730         wldev = ssb_get_drvdata(dev);
3731         wl = wldev->wl;
3732         b43legacy_debugfs_remove_device(wldev);
3733         b43legacy_wireless_core_detach(wldev);
3734         list_del(&wldev->list);
3735         wl->nr_devs--;
3736         ssb_set_drvdata(dev, NULL);
3737         kfree(wldev);
3738 }
3739
3740 static int b43legacy_one_core_attach(struct ssb_device *dev,
3741                                      struct b43legacy_wl *wl)
3742 {
3743         struct b43legacy_wldev *wldev;
3744         int err = -ENOMEM;
3745
3746         wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3747         if (!wldev)
3748                 goto out;
3749
3750         wldev->dev = dev;
3751         wldev->wl = wl;
3752         b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3753         wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3754         tasklet_init(&wldev->isr_tasklet,
3755                      (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3756                      (unsigned long)wldev);
3757         if (modparam_pio)
3758                 wldev->__using_pio = true;
3759         INIT_LIST_HEAD(&wldev->list);
3760
3761         err = b43legacy_wireless_core_attach(wldev);
3762         if (err)
3763                 goto err_kfree_wldev;
3764
3765         list_add(&wldev->list, &wl->devlist);
3766         wl->nr_devs++;
3767         ssb_set_drvdata(dev, wldev);
3768         b43legacy_debugfs_add_device(wldev);
3769 out:
3770         return err;
3771
3772 err_kfree_wldev:
3773         kfree(wldev);
3774         return err;
3775 }
3776
3777 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3778 {
3779         /* boardflags workarounds */
3780         if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3781             bus->boardinfo.type == 0x4E &&
3782             bus->boardinfo.rev > 0x40)
3783                 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3784 }
3785
3786 static void b43legacy_wireless_exit(struct ssb_device *dev,
3787                                   struct b43legacy_wl *wl)
3788 {
3789         struct ieee80211_hw *hw = wl->hw;
3790
3791         ssb_set_devtypedata(dev, NULL);
3792         ieee80211_free_hw(hw);
3793 }
3794
3795 static int b43legacy_wireless_init(struct ssb_device *dev)
3796 {
3797         struct ssb_sprom *sprom = &dev->bus->sprom;
3798         struct ieee80211_hw *hw;
3799         struct b43legacy_wl *wl;
3800         int err = -ENOMEM;
3801         int queue_num;
3802
3803         b43legacy_sprom_fixup(dev->bus);
3804
3805         hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3806         if (!hw) {
3807                 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3808                 goto out;
3809         }
3810
3811         /* fill hw info */
3812         hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
3813                     IEEE80211_HW_SIGNAL_DBM;
3814         hw->wiphy->interface_modes =
3815                 BIT(NL80211_IFTYPE_AP) |
3816                 BIT(NL80211_IFTYPE_STATION) |
3817                 BIT(NL80211_IFTYPE_WDS) |
3818                 BIT(NL80211_IFTYPE_ADHOC);
3819         hw->queues = 1; /* FIXME: hardware has more queues */
3820         hw->max_rates = 2;
3821         SET_IEEE80211_DEV(hw, dev->dev);
3822         if (is_valid_ether_addr(sprom->et1mac))
3823                 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3824         else
3825                 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3826
3827         /* Get and initialize struct b43legacy_wl */
3828         wl = hw_to_b43legacy_wl(hw);
3829         memset(wl, 0, sizeof(*wl));
3830         wl->hw = hw;
3831         spin_lock_init(&wl->irq_lock);
3832         spin_lock_init(&wl->leds_lock);
3833         mutex_init(&wl->mutex);
3834         INIT_LIST_HEAD(&wl->devlist);
3835         INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work);
3836         INIT_WORK(&wl->tx_work, b43legacy_tx_work);
3837
3838         /* Initialize queues and flags. */
3839         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
3840                 skb_queue_head_init(&wl->tx_queue[queue_num]);
3841                 wl->tx_queue_stopped[queue_num] = 0;
3842         }
3843
3844         ssb_set_devtypedata(dev, wl);
3845         b43legacyinfo(wl, "Broadcom %04X WLAN found (core revision %u)\n",
3846                       dev->bus->chip_id, dev->id.revision);
3847         err = 0;
3848 out:
3849         return err;
3850 }
3851
3852 static int b43legacy_probe(struct ssb_device *dev,
3853                          const struct ssb_device_id *id)
3854 {
3855         struct b43legacy_wl *wl;
3856         int err;
3857         int first = 0;
3858
3859         wl = ssb_get_devtypedata(dev);
3860         if (!wl) {
3861                 /* Probing the first core - setup common struct b43legacy_wl */
3862                 first = 1;
3863                 err = b43legacy_wireless_init(dev);
3864                 if (err)
3865                         goto out;
3866                 wl = ssb_get_devtypedata(dev);
3867                 B43legacy_WARN_ON(!wl);
3868         }
3869         err = b43legacy_one_core_attach(dev, wl);
3870         if (err)
3871                 goto err_wireless_exit;
3872
3873         /* setup and start work to load firmware */
3874         INIT_WORK(&wl->firmware_load, b43legacy_request_firmware);
3875         schedule_work(&wl->firmware_load);
3876
3877 out:
3878         return err;
3879
3880 err_wireless_exit:
3881         if (first)
3882                 b43legacy_wireless_exit(dev, wl);
3883         return err;
3884 }
3885
3886 static void b43legacy_remove(struct ssb_device *dev)
3887 {
3888         struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3889         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3890
3891         /* We must cancel any work here before unregistering from ieee80211,
3892          * as the ieee80211 unreg will destroy the workqueue. */
3893         cancel_work_sync(&wldev->restart_work);
3894         cancel_work_sync(&wl->firmware_load);
3895
3896         B43legacy_WARN_ON(!wl);
3897         if (wl->current_dev == wldev)
3898                 ieee80211_unregister_hw(wl->hw);
3899
3900         b43legacy_one_core_detach(dev);
3901
3902         if (list_empty(&wl->devlist))
3903                 /* Last core on the chip unregistered.
3904                  * We can destroy common struct b43legacy_wl.
3905                  */
3906                 b43legacy_wireless_exit(dev, wl);
3907 }
3908
3909 /* Perform a hardware reset. This can be called from any context. */
3910 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3911                                   const char *reason)
3912 {
3913         /* Must avoid requeueing, if we are in shutdown. */
3914         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3915                 return;
3916         b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3917         ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
3918 }
3919
3920 #ifdef CONFIG_PM
3921
3922 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3923 {
3924         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3925         struct b43legacy_wl *wl = wldev->wl;
3926
3927         b43legacydbg(wl, "Suspending...\n");
3928
3929         mutex_lock(&wl->mutex);
3930         wldev->suspend_init_status = b43legacy_status(wldev);
3931         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3932                 b43legacy_wireless_core_stop(wldev);
3933         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3934                 b43legacy_wireless_core_exit(wldev);
3935         mutex_unlock(&wl->mutex);
3936
3937         b43legacydbg(wl, "Device suspended.\n");
3938
3939         return 0;
3940 }
3941
3942 static int b43legacy_resume(struct ssb_device *dev)
3943 {
3944         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3945         struct b43legacy_wl *wl = wldev->wl;
3946         int err = 0;
3947
3948         b43legacydbg(wl, "Resuming...\n");
3949
3950         mutex_lock(&wl->mutex);
3951         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3952                 err = b43legacy_wireless_core_init(wldev);
3953                 if (err) {
3954                         b43legacyerr(wl, "Resume failed at core init\n");
3955                         goto out;
3956                 }
3957         }
3958         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3959                 err = b43legacy_wireless_core_start(wldev);
3960                 if (err) {
3961                         b43legacy_wireless_core_exit(wldev);
3962                         b43legacyerr(wl, "Resume failed at core start\n");
3963                         goto out;
3964                 }
3965         }
3966
3967         b43legacydbg(wl, "Device resumed.\n");
3968 out:
3969         mutex_unlock(&wl->mutex);
3970         return err;
3971 }
3972
3973 #else   /* CONFIG_PM */
3974 # define b43legacy_suspend      NULL
3975 # define b43legacy_resume               NULL
3976 #endif  /* CONFIG_PM */
3977
3978 static struct ssb_driver b43legacy_ssb_driver = {
3979         .name           = KBUILD_MODNAME,
3980         .id_table       = b43legacy_ssb_tbl,
3981         .probe          = b43legacy_probe,
3982         .remove         = b43legacy_remove,
3983         .suspend        = b43legacy_suspend,
3984         .resume         = b43legacy_resume,
3985 };
3986
3987 static void b43legacy_print_driverinfo(void)
3988 {
3989         const char *feat_pci = "", *feat_leds = "",
3990                    *feat_pio = "", *feat_dma = "";
3991
3992 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3993         feat_pci = "P";
3994 #endif
3995 #ifdef CONFIG_B43LEGACY_LEDS
3996         feat_leds = "L";
3997 #endif
3998 #ifdef CONFIG_B43LEGACY_PIO
3999         feat_pio = "I";
4000 #endif
4001 #ifdef CONFIG_B43LEGACY_DMA
4002         feat_dma = "D";
4003 #endif
4004         printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
4005                "[ Features: %s%s%s%s ]\n",
4006                feat_pci, feat_leds, feat_pio, feat_dma);
4007 }
4008
4009 static int __init b43legacy_init(void)
4010 {
4011         int err;
4012
4013         b43legacy_debugfs_init();
4014
4015         err = ssb_driver_register(&b43legacy_ssb_driver);
4016         if (err)
4017                 goto err_dfs_exit;
4018
4019         b43legacy_print_driverinfo();
4020
4021         return err;
4022
4023 err_dfs_exit:
4024         b43legacy_debugfs_exit();
4025         return err;
4026 }
4027
4028 static void __exit b43legacy_exit(void)
4029 {
4030         ssb_driver_unregister(&b43legacy_ssb_driver);
4031         b43legacy_debugfs_exit();
4032 }
4033
4034 module_init(b43legacy_init)
4035 module_exit(b43legacy_exit)