drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  68                                                 struct ieee80211_hw *hw)
  69 {
  70         struct ieee80211_channel *curchan = hw->conf.channel;
  71         struct ath9k_channel *channel;
  72         u8 chan_idx;
  73
  74         chan_idx = curchan->hw_value;
  75         channel = &sc->sc_ah->channels[chan_idx];
  76         ath9k_update_ichannel(sc, hw, channel);
  77         return channel;
  78 }
  79
  80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath9k_ps_wakeup(struct ath_softc *sc)
  93 {
  94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  95         unsigned long flags;
  96         enum ath9k_power_mode power_mode;
  97
  98         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  99         if (++sc->ps_usecount != 1)
 100                 goto unlock;
 101
 102         power_mode = sc->sc_ah->power_mode;
 103         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 104
 105         /*
 106          * While the hardware is asleep, the cycle counters contain no
 107          * useful data. Better clear them now so that they don't mess up
 108          * survey data results.
 109          */
 110         if (power_mode != ATH9K_PM_AWAKE) {
 111                 spin_lock(&common->cc_lock);
 112                 ath_hw_cycle_counters_update(common);
 113                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 114                 spin_unlock(&common->cc_lock);
 115         }
 116
 117  unlock:
 118         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 119 }
 120
 121 void ath9k_ps_restore(struct ath_softc *sc)
 122 {
 123         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (--sc->ps_usecount != 0)
 128                 goto unlock;
 129
 130         spin_lock(&common->cc_lock);
 131         ath_hw_cycle_counters_update(common);
 132         spin_unlock(&common->cc_lock);
 133
 134         if (sc->ps_idle)
 135                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 136         else if (sc->ps_enabled &&
 137                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 138                               PS_WAIT_FOR_CAB |
 139                               PS_WAIT_FOR_PSPOLL_DATA |
 140                               PS_WAIT_FOR_TX_ACK)))
 141                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 142
 143  unlock:
 144         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 145 }
 146
 147 static void ath_start_ani(struct ath_common *common)
 148 {
 149         struct ath_hw *ah = common->ah;
 150         unsigned long timestamp = jiffies_to_msecs(jiffies);
 151         struct ath_softc *sc = (struct ath_softc *) common->priv;
 152
 153         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 154                 return;
 155
 156         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 157                 return;
 158
 159         common->ani.longcal_timer = timestamp;
 160         common->ani.shortcal_timer = timestamp;
 161         common->ani.checkani_timer = timestamp;
 162
 163         mod_timer(&common->ani.timer,
 164                   jiffies +
 165                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 166 }
 167
 168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 169 {
 170         struct ath_hw *ah = sc->sc_ah;
 171         struct ath9k_channel *chan = &ah->channels[channel];
 172         struct survey_info *survey = &sc->survey[channel];
 173
 174         if (chan->noisefloor) {
 175                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 176                 survey->noise = chan->noisefloor;
 177         }
 178 }
 179
 180 static void ath_update_survey_stats(struct ath_softc *sc)
 181 {
 182         struct ath_hw *ah = sc->sc_ah;
 183         struct ath_common *common = ath9k_hw_common(ah);
 184         int pos = ah->curchan - &ah->channels[0];
 185         struct survey_info *survey = &sc->survey[pos];
 186         struct ath_cycle_counters *cc = &common->cc_survey;
 187         unsigned int div = common->clockrate * 1000;
 188
 189         if (!ah->curchan)
 190                 return;
 191
 192         if (ah->power_mode == ATH9K_PM_AWAKE)
 193                 ath_hw_cycle_counters_update(common);
 194
 195         if (cc->cycles > 0) {
 196                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 197                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 198                         SURVEY_INFO_CHANNEL_TIME_RX |
 199                         SURVEY_INFO_CHANNEL_TIME_TX;
 200                 survey->channel_time += cc->cycles / div;
 201                 survey->channel_time_busy += cc->rx_busy / div;
 202                 survey->channel_time_rx += cc->rx_frame / div;
 203                 survey->channel_time_tx += cc->tx_frame / div;
 204         }
 205         memset(cc, 0, sizeof(*cc));
 206
 207         ath_update_survey_nf(sc, pos);
 208 }
 209
 210 /*
 211  * Set/change channels.  If the channel is really being changed, it's done
 212  * by reseting the chip.  To accomplish this we must first cleanup any pending
 213  * DMA, then restart stuff.
 214 */
 215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 216                     struct ath9k_channel *hchan)
 217 {
 218         struct ath_wiphy *aphy = hw->priv;
 219         struct ath_hw *ah = sc->sc_ah;
 220         struct ath_common *common = ath9k_hw_common(ah);
 221         struct ieee80211_conf *conf = &common->hw->conf;
 222         bool fastcc = true, stopped;
 223         struct ieee80211_channel *channel = hw->conf.channel;
 224         struct ath9k_hw_cal_data *caldata = NULL;
 225         int r;
 226
 227         if (sc->sc_flags & SC_OP_INVALID)
 228                 return -EIO;
 229
 230         del_timer_sync(&common->ani.timer);
 231         cancel_work_sync(&sc->paprd_work);
 232         cancel_work_sync(&sc->hw_check_work);
 233         cancel_delayed_work_sync(&sc->tx_complete_work);
 234
 235         ath9k_ps_wakeup(sc);
 236
 237         spin_lock_bh(&sc->sc_pcu_lock);
 238
 239         /*
 240          * This is only performed if the channel settings have
 241          * actually changed.
 242          *
 243          * To switch channels clear any pending DMA operations;
 244          * wait long enough for the RX fifo to drain, reset the
 245          * hardware at the new frequency, and then re-enable
 246          * the relevant bits of the h/w.
 247          */
 248         ath9k_hw_disable_interrupts(ah);
 249         stopped = ath_drain_all_txq(sc, false);
 250
 251         if (!ath_stoprecv(sc))
 252                 stopped = false;
 253
 254         /* XXX: do not flush receive queue here. We don't want
 255          * to flush data frames already in queue because of
 256          * changing channel. */
 257
 258         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 259                 fastcc = false;
 260
 261         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 262                 caldata = &aphy->caldata;
 263
 264         ath_dbg(common, ATH_DBG_CONFIG,
 265                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 266                 sc->sc_ah->curchan->channel,
 267                 channel->center_freq, conf_is_ht40(conf),
 268                 fastcc);
 269
 270         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 271         if (r) {
 272                 ath_err(common,
 273                         "Unable to reset channel (%u MHz), reset status %d\n",
 274                         channel->center_freq, r);
 275                 goto ps_restore;
 276         }
 277
 278         if (ath_startrecv(sc) != 0) {
 279                 ath_err(common, "Unable to restart recv logic\n");
 280                 r = -EIO;
 281                 goto ps_restore;
 282         }
 283
 284         ath_update_txpow(sc);
 285         ath9k_hw_set_interrupts(ah, ah->imask);
 286
 287         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 288                 ath_beacon_config(sc, NULL);
 289                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 290                 ath_start_ani(common);
 291         }
 292
 293  ps_restore:
 294         spin_unlock_bh(&sc->sc_pcu_lock);
 295
 296         ath9k_ps_restore(sc);
 297         return r;
 298 }
 299
 300 static void ath_paprd_activate(struct ath_softc *sc)
 301 {
 302         struct ath_hw *ah = sc->sc_ah;
 303         struct ath9k_hw_cal_data *caldata = ah->caldata;
 304         struct ath_common *common = ath9k_hw_common(ah);
 305         int chain;
 306
 307         if (!caldata || !caldata->paprd_done)
 308                 return;
 309
 310         ath9k_ps_wakeup(sc);
 311         ar9003_paprd_enable(ah, false);
 312         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 313                 if (!(common->tx_chainmask & BIT(chain)))
 314                         continue;
 315
 316                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 317         }
 318
 319         ar9003_paprd_enable(ah, true);
 320         ath9k_ps_restore(sc);
 321 }
 322
 323 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 324 {
 325         struct ieee80211_hw *hw = sc->hw;
 326         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 327         struct ath_tx_control txctl;
 328         int time_left;
 329
 330         memset(&txctl, 0, sizeof(txctl));
 331         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 332
 333         memset(tx_info, 0, sizeof(*tx_info));
 334         tx_info->band = hw->conf.channel->band;
 335         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 336         tx_info->control.rates[0].idx = 0;
 337         tx_info->control.rates[0].count = 1;
 338         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 339         tx_info->control.rates[1].idx = -1;
 340
 341         init_completion(&sc->paprd_complete);
 342         sc->paprd_pending = true;
 343         txctl.paprd = BIT(chain);
 344         if (ath_tx_start(hw, skb, &txctl) != 0)
 345                 return false;
 346
 347         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 348                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 349         sc->paprd_pending = false;
 350
 351         if (!time_left)
 352                 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
 353                         "Timeout waiting for paprd training on TX chain %d\n",
 354                         chain);
 355
 356         return !!time_left;
 357 }
 358
 359 void ath_paprd_calibrate(struct work_struct *work)
 360 {
 361         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 362         struct ieee80211_hw *hw = sc->hw;
 363         struct ath_hw *ah = sc->sc_ah;
 364         struct ieee80211_hdr *hdr;
 365         struct sk_buff *skb = NULL;
 366         struct ath9k_hw_cal_data *caldata = ah->caldata;
 367         struct ath_common *common = ath9k_hw_common(ah);
 368         int ftype;
 369         int chain_ok = 0;
 370         int chain;
 371         int len = 1800;
 372
 373         if (!caldata)
 374                 return;
 375
 376         if (ar9003_paprd_init_table(ah) < 0)
 377                 return;
 378
 379         skb = alloc_skb(len, GFP_KERNEL);
 380         if (!skb)
 381                 return;
 382
 383         skb_put(skb, len);
 384         memset(skb->data, 0, len);
 385         hdr = (struct ieee80211_hdr *)skb->data;
 386         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 387         hdr->frame_control = cpu_to_le16(ftype);
 388         hdr->duration_id = cpu_to_le16(10);
 389         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 390         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 391         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 392
 393         ath9k_ps_wakeup(sc);
 394         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 395                 if (!(common->tx_chainmask & BIT(chain)))
 396                         continue;
 397
 398                 chain_ok = 0;
 399
 400                 ath_dbg(common, ATH_DBG_CALIBRATE,
 401                         "Sending PAPRD frame for thermal measurement "
 402                         "on chain %d\n", chain);
 403                 if (!ath_paprd_send_frame(sc, skb, chain))
 404                         goto fail_paprd;
 405
 406                 ar9003_paprd_setup_gain_table(ah, chain);
 407
 408                 ath_dbg(common, ATH_DBG_CALIBRATE,
 409                         "Sending PAPRD training frame on chain %d\n", chain);
 410                 if (!ath_paprd_send_frame(sc, skb, chain))
 411                         goto fail_paprd;
 412
 413                 if (!ar9003_paprd_is_done(ah))
 414                         break;
 415
 416                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 417                         break;
 418
 419                 chain_ok = 1;
 420         }
 421         kfree_skb(skb);
 422
 423         if (chain_ok) {
 424                 caldata->paprd_done = true;
 425                 ath_paprd_activate(sc);
 426         }
 427
 428 fail_paprd:
 429         ath9k_ps_restore(sc);
 430 }
 431
 432 /*
 433  *  This routine performs the periodic noise floor calibration function
 434  *  that is used to adjust and optimize the chip performance.  This
 435  *  takes environmental changes (location, temperature) into account.
 436  *  When the task is complete, it reschedules itself depending on the
 437  *  appropriate interval that was calculated.
 438  */
 439 void ath_ani_calibrate(unsigned long data)
 440 {
 441         struct ath_softc *sc = (struct ath_softc *)data;
 442         struct ath_hw *ah = sc->sc_ah;
 443         struct ath_common *common = ath9k_hw_common(ah);
 444         bool longcal = false;
 445         bool shortcal = false;
 446         bool aniflag = false;
 447         unsigned int timestamp = jiffies_to_msecs(jiffies);
 448         u32 cal_interval, short_cal_interval, long_cal_interval;
 449         unsigned long flags;
 450
 451         if (ah->caldata && ah->caldata->nfcal_interference)
 452                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 453         else
 454                 long_cal_interval = ATH_LONG_CALINTERVAL;
 455
 456         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 457                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 458
 459         /* Only calibrate if awake */
 460         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 461                 goto set_timer;
 462
 463         ath9k_ps_wakeup(sc);
 464
 465         /* Long calibration runs independently of short calibration. */
 466         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 467                 longcal = true;
 468                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 469                 common->ani.longcal_timer = timestamp;
 470         }
 471
 472         /* Short calibration applies only while caldone is false */
 473         if (!common->ani.caldone) {
 474                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 475                         shortcal = true;
 476                         ath_dbg(common, ATH_DBG_ANI,
 477                                 "shortcal @%lu\n", jiffies);
 478                         common->ani.shortcal_timer = timestamp;
 479                         common->ani.resetcal_timer = timestamp;
 480                 }
 481         } else {
 482                 if ((timestamp - common->ani.resetcal_timer) >=
 483                     ATH_RESTART_CALINTERVAL) {
 484                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 485                         if (common->ani.caldone)
 486                                 common->ani.resetcal_timer = timestamp;
 487                 }
 488         }
 489
 490         /* Verify whether we must check ANI */
 491         if ((timestamp - common->ani.checkani_timer) >=
 492              ah->config.ani_poll_interval) {
 493                 aniflag = true;
 494                 common->ani.checkani_timer = timestamp;
 495         }
 496
 497         /* Skip all processing if there's nothing to do. */
 498         if (longcal || shortcal || aniflag) {
 499                 /* Call ANI routine if necessary */
 500                 if (aniflag) {
 501                         spin_lock_irqsave(&common->cc_lock, flags);
 502                         ath9k_hw_ani_monitor(ah, ah->curchan);
 503                         ath_update_survey_stats(sc);
 504                         spin_unlock_irqrestore(&common->cc_lock, flags);
 505                 }
 506
 507                 /* Perform calibration if necessary */
 508                 if (longcal || shortcal) {
 509                         common->ani.caldone =
 510                                 ath9k_hw_calibrate(ah,
 511                                                    ah->curchan,
 512                                                    common->rx_chainmask,
 513                                                    longcal);
 514                 }
 515         }
 516
 517         ath9k_ps_restore(sc);
 518
 519 set_timer:
 520         /*
 521         * Set timer interval based on previous results.
 522         * The interval must be the shortest necessary to satisfy ANI,
 523         * short calibration and long calibration.
 524         */
 525         cal_interval = ATH_LONG_CALINTERVAL;
 526         if (sc->sc_ah->config.enable_ani)
 527                 cal_interval = min(cal_interval,
 528                                    (u32)ah->config.ani_poll_interval);
 529         if (!common->ani.caldone)
 530                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 531
 532         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 533         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 534                 if (!ah->caldata->paprd_done)
 535                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 536                 else if (!ah->paprd_table_write_done)
 537                         ath_paprd_activate(sc);
 538         }
 539 }
 540
 541 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 542 {
 543         struct ath_node *an;
 544         struct ath_hw *ah = sc->sc_ah;
 545         an = (struct ath_node *)sta->drv_priv;
 546
 547         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 548                 sc->sc_flags |= SC_OP_ENABLE_APM;
 549
 550         if (sc->sc_flags & SC_OP_TXAGGR) {
 551                 ath_tx_node_init(sc, an);
 552                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 553                                      sta->ht_cap.ampdu_factor);
 554                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 555         }
 556 }
 557
 558 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 559 {
 560         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 561
 562         if (sc->sc_flags & SC_OP_TXAGGR)
 563                 ath_tx_node_cleanup(sc, an);
 564 }
 565
 566 void ath_hw_check(struct work_struct *work)
 567 {
 568         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 569         int i;
 570
 571         ath9k_ps_wakeup(sc);
 572
 573         for (i = 0; i < 3; i++) {
 574                 if (ath9k_hw_check_alive(sc->sc_ah))
 575                         goto out;
 576
 577                 msleep(1);
 578         }
 579         ath_reset(sc, true);
 580
 581 out:
 582         ath9k_ps_restore(sc);
 583 }
 584
 585 void ath9k_tasklet(unsigned long data)
 586 {
 587         struct ath_softc *sc = (struct ath_softc *)data;
 588         struct ath_hw *ah = sc->sc_ah;
 589         struct ath_common *common = ath9k_hw_common(ah);
 590
 591         u32 status = sc->intrstatus;
 592         u32 rxmask;
 593
 594         ath9k_ps_wakeup(sc);
 595
 596         if (status & ATH9K_INT_FATAL) {
 597                 ath_reset(sc, true);
 598                 ath9k_ps_restore(sc);
 599                 return;
 600         }
 601
 602         spin_lock_bh(&sc->sc_pcu_lock);
 603
 604         if (!ath9k_hw_check_alive(ah))
 605                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 606
 607         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 608                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 609                           ATH9K_INT_RXORN);
 610         else
 611                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 612
 613         if (status & rxmask) {
 614                 /* Check for high priority Rx first */
 615                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 616                     (status & ATH9K_INT_RXHP))
 617                         ath_rx_tasklet(sc, 0, true);
 618
 619                 ath_rx_tasklet(sc, 0, false);
 620         }
 621
 622         if (status & ATH9K_INT_TX) {
 623                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 624                         ath_tx_edma_tasklet(sc);
 625                 else
 626                         ath_tx_tasklet(sc);
 627         }
 628
 629         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 630                 /*
 631                  * TSF sync does not look correct; remain awake to sync with
 632                  * the next Beacon.
 633                  */
 634                 ath_dbg(common, ATH_DBG_PS,
 635                         "TSFOOR - Sync with next Beacon\n");
 636                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 637         }
 638
 639         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 640                 if (status & ATH9K_INT_GENTIMER)
 641                         ath_gen_timer_isr(sc->sc_ah);
 642
 643         /* re-enable hardware interrupt */
 644         ath9k_hw_enable_interrupts(ah);
 645
 646         spin_unlock_bh(&sc->sc_pcu_lock);
 647         ath9k_ps_restore(sc);
 648 }
 649
 650 irqreturn_t ath_isr(int irq, void *dev)
 651 {
 652 #define SCHED_INTR (                            \
 653                 ATH9K_INT_FATAL |               \
 654                 ATH9K_INT_RXORN |               \
 655                 ATH9K_INT_RXEOL |               \
 656                 ATH9K_INT_RX |                  \
 657                 ATH9K_INT_RXLP |                \
 658                 ATH9K_INT_RXHP |                \
 659                 ATH9K_INT_TX |                  \
 660                 ATH9K_INT_BMISS |               \
 661                 ATH9K_INT_CST |                 \
 662                 ATH9K_INT_TSFOOR |              \
 663                 ATH9K_INT_GENTIMER)
 664
 665         struct ath_softc *sc = dev;
 666         struct ath_hw *ah = sc->sc_ah;
 667         struct ath_common *common = ath9k_hw_common(ah);
 668         enum ath9k_int status;
 669         bool sched = false;
 670
 671         /*
 672          * The hardware is not ready/present, don't
 673          * touch anything. Note this can happen early
 674          * on if the IRQ is shared.
 675          */
 676         if (sc->sc_flags & SC_OP_INVALID)
 677                 return IRQ_NONE;
 678
 679
 680         /* shared irq, not for us */
 681
 682         if (!ath9k_hw_intrpend(ah))
 683                 return IRQ_NONE;
 684
 685         /*
 686          * Figure out the reason(s) for the interrupt.  Note
 687          * that the hal returns a pseudo-ISR that may include
 688          * bits we haven't explicitly enabled so we mask the
 689          * value to insure we only process bits we requested.
 690          */
 691         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 692         status &= ah->imask;    /* discard unasked-for bits */
 693
 694         /*
 695          * If there are no status bits set, then this interrupt was not
 696          * for me (should have been caught above).
 697          */
 698         if (!status)
 699                 return IRQ_NONE;
 700
 701         /* Cache the status */
 702         sc->intrstatus = status;
 703
 704         if (status & SCHED_INTR)
 705                 sched = true;
 706
 707         /*
 708          * If a FATAL or RXORN interrupt is received, we have to reset the
 709          * chip immediately.
 710          */
 711         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 712             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 713                 goto chip_reset;
 714
 715         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 716             (status & ATH9K_INT_BB_WATCHDOG)) {
 717
 718                 spin_lock(&common->cc_lock);
 719                 ath_hw_cycle_counters_update(common);
 720                 ar9003_hw_bb_watchdog_dbg_info(ah);
 721                 spin_unlock(&common->cc_lock);
 722
 723                 goto chip_reset;
 724         }
 725
 726         if (status & ATH9K_INT_SWBA)
 727                 tasklet_schedule(&sc->bcon_tasklet);
 728
 729         if (status & ATH9K_INT_TXURN)
 730                 ath9k_hw_updatetxtriglevel(ah, true);
 731
 732         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 733                 if (status & ATH9K_INT_RXEOL) {
 734                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 735                         ath9k_hw_set_interrupts(ah, ah->imask);
 736                 }
 737         }
 738
 739         if (status & ATH9K_INT_MIB) {
 740                 /*
 741                  * Disable interrupts until we service the MIB
 742                  * interrupt; otherwise it will continue to
 743                  * fire.
 744                  */
 745                 ath9k_hw_disable_interrupts(ah);
 746                 /*
 747                  * Let the hal handle the event. We assume
 748                  * it will clear whatever condition caused
 749                  * the interrupt.
 750                  */
 751                 spin_lock(&common->cc_lock);
 752                 ath9k_hw_proc_mib_event(ah);
 753                 spin_unlock(&common->cc_lock);
 754                 ath9k_hw_enable_interrupts(ah);
 755         }
 756
 757         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 758                 if (status & ATH9K_INT_TIM_TIMER) {
 759                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 760                                 goto chip_reset;
 761                         /* Clear RxAbort bit so that we can
 762                          * receive frames */
 763                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 764                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 765                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 766                 }
 767
 768 chip_reset:
 769
 770         ath_debug_stat_interrupt(sc, status);
 771
 772         if (sched) {
 773                 /* turn off every interrupt */
 774                 ath9k_hw_disable_interrupts(ah);
 775                 tasklet_schedule(&sc->intr_tq);
 776         }
 777
 778         return IRQ_HANDLED;
 779
 780 #undef SCHED_INTR
 781 }
 782
 783 static u32 ath_get_extchanmode(struct ath_softc *sc,
 784                                struct ieee80211_channel *chan,
 785                                enum nl80211_channel_type channel_type)
 786 {
 787         u32 chanmode = 0;
 788
 789         switch (chan->band) {
 790         case IEEE80211_BAND_2GHZ:
 791                 switch(channel_type) {
 792                 case NL80211_CHAN_NO_HT:
 793                 case NL80211_CHAN_HT20:
 794                         chanmode = CHANNEL_G_HT20;
 795                         break;
 796                 case NL80211_CHAN_HT40PLUS:
 797                         chanmode = CHANNEL_G_HT40PLUS;
 798                         break;
 799                 case NL80211_CHAN_HT40MINUS:
 800                         chanmode = CHANNEL_G_HT40MINUS;
 801                         break;
 802                 }
 803                 break;
 804         case IEEE80211_BAND_5GHZ:
 805                 switch(channel_type) {
 806                 case NL80211_CHAN_NO_HT:
 807                 case NL80211_CHAN_HT20:
 808                         chanmode = CHANNEL_A_HT20;
 809                         break;
 810                 case NL80211_CHAN_HT40PLUS:
 811                         chanmode = CHANNEL_A_HT40PLUS;
 812                         break;
 813                 case NL80211_CHAN_HT40MINUS:
 814                         chanmode = CHANNEL_A_HT40MINUS;
 815                         break;
 816                 }
 817                 break;
 818         default:
 819                 break;
 820         }
 821
 822         return chanmode;
 823 }
 824
 825 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 826                                  struct ieee80211_hw *hw,
 827                                  struct ieee80211_vif *vif,
 828                                  struct ieee80211_bss_conf *bss_conf)
 829 {
 830         struct ath_wiphy *aphy = hw->priv;
 831         struct ath_hw *ah = sc->sc_ah;
 832         struct ath_common *common = ath9k_hw_common(ah);
 833
 834         if (bss_conf->assoc) {
 835                 ath_dbg(common, ATH_DBG_CONFIG,
 836                         "Bss Info ASSOC %d, bssid: %pM\n",
 837                         bss_conf->aid, common->curbssid);
 838
 839                 /* New association, store aid */
 840                 common->curaid = bss_conf->aid;
 841                 ath9k_hw_write_associd(ah);
 842
 843                 /*
 844                  * Request a re-configuration of Beacon related timers
 845                  * on the receipt of the first Beacon frame (i.e.,
 846                  * after time sync with the AP).
 847                  */
 848                 sc->ps_flags |= PS_BEACON_SYNC;
 849
 850                 /* Configure the beacon */
 851                 ath_beacon_config(sc, vif);
 852
 853                 /* Reset rssi stats */
 854                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
 855                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 856
 857                 sc->sc_flags |= SC_OP_ANI_RUN;
 858                 ath_start_ani(common);
 859         } else {
 860                 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 861                 common->curaid = 0;
 862                 /* Stop ANI */
 863                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 864                 del_timer_sync(&common->ani.timer);
 865         }
 866 }
 867
 868 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 869 {
 870         struct ath_hw *ah = sc->sc_ah;
 871         struct ath_common *common = ath9k_hw_common(ah);
 872         struct ieee80211_channel *channel = hw->conf.channel;
 873         int r;
 874
 875         ath9k_ps_wakeup(sc);
 876         spin_lock_bh(&sc->sc_pcu_lock);
 877
 878         ath9k_hw_configpcipowersave(ah, 0, 0);
 879
 880         if (!ah->curchan)
 881                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 882
 883         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 884         if (r) {
 885                 ath_err(common,
 886                         "Unable to reset channel (%u MHz), reset status %d\n",
 887                         channel->center_freq, r);
 888         }
 889
 890         ath_update_txpow(sc);
 891         if (ath_startrecv(sc) != 0) {
 892                 ath_err(common, "Unable to restart recv logic\n");
 893                 goto out;
 894         }
 895         if (sc->sc_flags & SC_OP_BEACONS)
 896                 ath_beacon_config(sc, NULL);    /* restart beacons */
 897
 898         /* Re-Enable  interrupts */
 899         ath9k_hw_set_interrupts(ah, ah->imask);
 900
 901         /* Enable LED */
 902         ath9k_hw_cfg_output(ah, ah->led_pin,
 903                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 904         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 905
 906         ieee80211_wake_queues(hw);
 907 out:
 908         spin_unlock_bh(&sc->sc_pcu_lock);
 909
 910         ath9k_ps_restore(sc);
 911 }
 912
 913 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 914 {
 915         struct ath_hw *ah = sc->sc_ah;
 916         struct ieee80211_channel *channel = hw->conf.channel;
 917         int r;
 918
 919         ath9k_ps_wakeup(sc);
 920         spin_lock_bh(&sc->sc_pcu_lock);
 921
 922         ieee80211_stop_queues(hw);
 923
 924         /*
 925          * Keep the LED on when the radio is disabled
 926          * during idle unassociated state.
 927          */
 928         if (!sc->ps_idle) {
 929                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 930                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 931         }
 932
 933         /* Disable interrupts */
 934         ath9k_hw_disable_interrupts(ah);
 935
 936         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 937
 938         ath_stoprecv(sc);               /* turn off frame recv */
 939         ath_flushrecv(sc);              /* flush recv queue */
 940
 941         if (!ah->curchan)
 942                 ah->curchan = ath_get_curchannel(sc, hw);
 943
 944         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 945         if (r) {
 946                 ath_err(ath9k_hw_common(sc->sc_ah),
 947                         "Unable to reset channel (%u MHz), reset status %d\n",
 948                         channel->center_freq, r);
 949         }
 950
 951         ath9k_hw_phy_disable(ah);
 952
 953         ath9k_hw_configpcipowersave(ah, 1, 1);
 954
 955         spin_unlock_bh(&sc->sc_pcu_lock);
 956         ath9k_ps_restore(sc);
 957
 958         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 959 }
 960
 961 int ath_reset(struct ath_softc *sc, bool retry_tx)
 962 {
 963         struct ath_hw *ah = sc->sc_ah;
 964         struct ath_common *common = ath9k_hw_common(ah);
 965         struct ieee80211_hw *hw = sc->hw;
 966         int r;
 967
 968         /* Stop ANI */
 969         del_timer_sync(&common->ani.timer);
 970
 971         spin_lock_bh(&sc->sc_pcu_lock);
 972
 973         ieee80211_stop_queues(hw);
 974
 975         ath9k_hw_disable_interrupts(ah);
 976         ath_drain_all_txq(sc, retry_tx);
 977
 978         ath_stoprecv(sc);
 979         ath_flushrecv(sc);
 980
 981         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 982         if (r)
 983                 ath_err(common,
 984                         "Unable to reset hardware; reset status %d\n", r);
 985
 986         if (ath_startrecv(sc) != 0)
 987                 ath_err(common, "Unable to start recv logic\n");
 988
 989         /*
 990          * We may be doing a reset in response to a request
 991          * that changes the channel so update any state that
 992          * might change as a result.
 993          */
 994         ath_update_txpow(sc);
 995
 996         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
 997                 ath_beacon_config(sc, NULL);    /* restart beacons */
 998
 999         ath9k_hw_set_interrupts(ah, ah->imask);
1000
1001         if (retry_tx) {
1002                 int i;
1003                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1004                         if (ATH_TXQ_SETUP(sc, i)) {
1005                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1006                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1007                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1008                         }
1009                 }
1010         }
1011
1012         ieee80211_wake_queues(hw);
1013         spin_unlock_bh(&sc->sc_pcu_lock);
1014
1015         /* Start ANI */
1016         ath_start_ani(common);
1017
1018         return r;
1019 }
1020
1021 /* XXX: Remove me once we don't depend on ath9k_channel for all
1022  * this redundant data */
1023 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1024                            struct ath9k_channel *ichan)
1025 {
1026         struct ieee80211_channel *chan = hw->conf.channel;
1027         struct ieee80211_conf *conf = &hw->conf;
1028
1029         ichan->channel = chan->center_freq;
1030         ichan->chan = chan;
1031
1032         if (chan->band == IEEE80211_BAND_2GHZ) {
1033                 ichan->chanmode = CHANNEL_G;
1034                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1035         } else {
1036                 ichan->chanmode = CHANNEL_A;
1037                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1038         }
1039
1040         if (conf_is_ht(conf))
1041                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1042                                             conf->channel_type);
1043 }
1044
1045 /**********************/
1046 /* mac80211 callbacks */
1047 /**********************/
1048
1049 static int ath9k_start(struct ieee80211_hw *hw)
1050 {
1051         struct ath_wiphy *aphy = hw->priv;
1052         struct ath_softc *sc = aphy->sc;
1053         struct ath_hw *ah = sc->sc_ah;
1054         struct ath_common *common = ath9k_hw_common(ah);
1055         struct ieee80211_channel *curchan = hw->conf.channel;
1056         struct ath9k_channel *init_channel;
1057         int r;
1058
1059         ath_dbg(common, ATH_DBG_CONFIG,
1060                 "Starting driver with initial channel: %d MHz\n",
1061                 curchan->center_freq);
1062
1063         mutex_lock(&sc->mutex);
1064
1065         if (ath9k_wiphy_started(sc)) {
1066                 if (sc->chan_idx == curchan->hw_value) {
1067                         /*
1068                          * Already on the operational channel, the new wiphy
1069                          * can be marked active.
1070                          */
1071                         aphy->state = ATH_WIPHY_ACTIVE;
1072                         ieee80211_wake_queues(hw);
1073                 } else {
1074                         /*
1075                          * Another wiphy is on another channel, start the new
1076                          * wiphy in paused state.
1077                          */
1078                         aphy->state = ATH_WIPHY_PAUSED;
1079                         ieee80211_stop_queues(hw);
1080                 }
1081                 mutex_unlock(&sc->mutex);
1082                 return 0;
1083         }
1084         aphy->state = ATH_WIPHY_ACTIVE;
1085
1086         /* setup initial channel */
1087
1088         sc->chan_idx = curchan->hw_value;
1089
1090         init_channel = ath_get_curchannel(sc, hw);
1091
1092         /* Reset SERDES registers */
1093         ath9k_hw_configpcipowersave(ah, 0, 0);
1094
1095         /*
1096          * The basic interface to setting the hardware in a good
1097          * state is ``reset''.  On return the hardware is known to
1098          * be powered up and with interrupts disabled.  This must
1099          * be followed by initialization of the appropriate bits
1100          * and then setup of the interrupt mask.
1101          */
1102         spin_lock_bh(&sc->sc_pcu_lock);
1103         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1104         if (r) {
1105                 ath_err(common,
1106                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1107                         r, curchan->center_freq);
1108                 spin_unlock_bh(&sc->sc_pcu_lock);
1109                 goto mutex_unlock;
1110         }
1111
1112         /*
1113          * This is needed only to setup initial state
1114          * but it's best done after a reset.
1115          */
1116         ath_update_txpow(sc);
1117
1118         /*
1119          * Setup the hardware after reset:
1120          * The receive engine is set going.
1121          * Frame transmit is handled entirely
1122          * in the frame output path; there's nothing to do
1123          * here except setup the interrupt mask.
1124          */
1125         if (ath_startrecv(sc) != 0) {
1126                 ath_err(common, "Unable to start recv logic\n");
1127                 r = -EIO;
1128                 spin_unlock_bh(&sc->sc_pcu_lock);
1129                 goto mutex_unlock;
1130         }
1131         spin_unlock_bh(&sc->sc_pcu_lock);
1132
1133         /* Setup our intr mask. */
1134         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1135                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1136                     ATH9K_INT_GLOBAL;
1137
1138         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1139                 ah->imask |= ATH9K_INT_RXHP |
1140                              ATH9K_INT_RXLP |
1141                              ATH9K_INT_BB_WATCHDOG;
1142         else
1143                 ah->imask |= ATH9K_INT_RX;
1144
1145         ah->imask |= ATH9K_INT_GTT;
1146
1147         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1148                 ah->imask |= ATH9K_INT_CST;
1149
1150         sc->sc_flags &= ~SC_OP_INVALID;
1151         sc->sc_ah->is_monitoring = false;
1152
1153         /* Disable BMISS interrupt when we're not associated */
1154         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1155         ath9k_hw_set_interrupts(ah, ah->imask);
1156
1157         ieee80211_wake_queues(hw);
1158
1159         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1160
1161         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1162             !ah->btcoex_hw.enabled) {
1163                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1164                                            AR_STOMP_LOW_WLAN_WGHT);
1165                 ath9k_hw_btcoex_enable(ah);
1166
1167                 if (common->bus_ops->bt_coex_prep)
1168                         common->bus_ops->bt_coex_prep(common);
1169                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1170                         ath9k_btcoex_timer_resume(sc);
1171         }
1172
1173         /* User has the option to provide pm-qos value as a module
1174          * parameter rather than using the default value of
1175          * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1176          */
1177         pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1178
1179         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1180                 common->bus_ops->extn_synch_en(common);
1181
1182 mutex_unlock:
1183         mutex_unlock(&sc->mutex);
1184
1185         return r;
1186 }
1187
1188 static int ath9k_tx(struct ieee80211_hw *hw,
1189                     struct sk_buff *skb)
1190 {
1191         struct ath_wiphy *aphy = hw->priv;
1192         struct ath_softc *sc = aphy->sc;
1193         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1194         struct ath_tx_control txctl;
1195         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1196
1197         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1198                 ath_dbg(common, ATH_DBG_XMIT,
1199                         "ath9k: %s: TX in unexpected wiphy state %d\n",
1200                         wiphy_name(hw->wiphy), aphy->state);
1201                 goto exit;
1202         }
1203
1204         if (sc->ps_enabled) {
1205                 /*
1206                  * mac80211 does not set PM field for normal data frames, so we
1207                  * need to update that based on the current PS mode.
1208                  */
1209                 if (ieee80211_is_data(hdr->frame_control) &&
1210                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1211                     !ieee80211_has_pm(hdr->frame_control)) {
1212                         ath_dbg(common, ATH_DBG_PS,
1213                                 "Add PM=1 for a TX frame while in PS mode\n");
1214                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1215                 }
1216         }
1217
1218         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1219                 /*
1220                  * We are using PS-Poll and mac80211 can request TX while in
1221                  * power save mode. Need to wake up hardware for the TX to be
1222                  * completed and if needed, also for RX of buffered frames.
1223                  */
1224                 ath9k_ps_wakeup(sc);
1225                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1226                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1227                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1228                         ath_dbg(common, ATH_DBG_PS,
1229                                 "Sending PS-Poll to pick a buffered frame\n");
1230                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1231                 } else {
1232                         ath_dbg(common, ATH_DBG_PS,
1233                                 "Wake up to complete TX\n");
1234                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1235                 }
1236                 /*
1237                  * The actual restore operation will happen only after
1238                  * the sc_flags bit is cleared. We are just dropping
1239                  * the ps_usecount here.
1240                  */
1241                 ath9k_ps_restore(sc);
1242         }
1243
1244         memset(&txctl, 0, sizeof(struct ath_tx_control));
1245         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1246
1247         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1248
1249         if (ath_tx_start(hw, skb, &txctl) != 0) {
1250                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1251                 goto exit;
1252         }
1253
1254         return 0;
1255 exit:
1256         dev_kfree_skb_any(skb);
1257         return 0;
1258 }
1259
1260 static void ath9k_stop(struct ieee80211_hw *hw)
1261 {
1262         struct ath_wiphy *aphy = hw->priv;
1263         struct ath_softc *sc = aphy->sc;
1264         struct ath_hw *ah = sc->sc_ah;
1265         struct ath_common *common = ath9k_hw_common(ah);
1266         int i;
1267
1268         mutex_lock(&sc->mutex);
1269
1270         aphy->state = ATH_WIPHY_INACTIVE;
1271
1272         if (led_blink)
1273                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1274
1275         cancel_delayed_work_sync(&sc->tx_complete_work);
1276         cancel_work_sync(&sc->paprd_work);
1277         cancel_work_sync(&sc->hw_check_work);
1278
1279         for (i = 0; i < sc->num_sec_wiphy; i++) {
1280                 if (sc->sec_wiphy[i])
1281                         break;
1282         }
1283
1284         if (i == sc->num_sec_wiphy) {
1285                 cancel_delayed_work_sync(&sc->wiphy_work);
1286                 cancel_work_sync(&sc->chan_work);
1287         }
1288
1289         if (sc->sc_flags & SC_OP_INVALID) {
1290                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1291                 mutex_unlock(&sc->mutex);
1292                 return;
1293         }
1294
1295         if (ath9k_wiphy_started(sc)) {
1296                 mutex_unlock(&sc->mutex);
1297                 return; /* another wiphy still in use */
1298         }
1299
1300         /* Ensure HW is awake when we try to shut it down. */
1301         ath9k_ps_wakeup(sc);
1302
1303         if (ah->btcoex_hw.enabled) {
1304                 ath9k_hw_btcoex_disable(ah);
1305                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1306                         ath9k_btcoex_timer_pause(sc);
1307         }
1308
1309         spin_lock_bh(&sc->sc_pcu_lock);
1310
1311         /* make sure h/w will not generate any interrupt
1312          * before setting the invalid flag. */
1313         ath9k_hw_disable_interrupts(ah);
1314
1315         if (!(sc->sc_flags & SC_OP_INVALID)) {
1316                 ath_drain_all_txq(sc, false);
1317                 ath_stoprecv(sc);
1318                 ath9k_hw_phy_disable(ah);
1319         } else
1320                 sc->rx.rxlink = NULL;
1321
1322         /* disable HAL and put h/w to sleep */
1323         ath9k_hw_disable(ah);
1324         ath9k_hw_configpcipowersave(ah, 1, 1);
1325
1326         spin_unlock_bh(&sc->sc_pcu_lock);
1327
1328         ath9k_ps_restore(sc);
1329
1330         sc->ps_idle = true;
1331         ath_radio_disable(sc, hw);
1332
1333         sc->sc_flags |= SC_OP_INVALID;
1334
1335         pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1336
1337         mutex_unlock(&sc->mutex);
1338
1339         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1340 }
1341
1342 static int ath9k_add_interface(struct ieee80211_hw *hw,
1343                                struct ieee80211_vif *vif)
1344 {
1345         struct ath_wiphy *aphy = hw->priv;
1346         struct ath_softc *sc = aphy->sc;
1347         struct ath_hw *ah = sc->sc_ah;
1348         struct ath_common *common = ath9k_hw_common(ah);
1349         struct ath_vif *avp = (void *)vif->drv_priv;
1350         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1351         int ret = 0;
1352
1353         mutex_lock(&sc->mutex);
1354
1355         switch (vif->type) {
1356         case NL80211_IFTYPE_STATION:
1357                 ic_opmode = NL80211_IFTYPE_STATION;
1358                 break;
1359         case NL80211_IFTYPE_WDS:
1360                 ic_opmode = NL80211_IFTYPE_WDS;
1361                 break;
1362         case NL80211_IFTYPE_ADHOC:
1363         case NL80211_IFTYPE_AP:
1364         case NL80211_IFTYPE_MESH_POINT:
1365                 if (sc->nbcnvifs >= ATH_BCBUF) {
1366                         ret = -ENOBUFS;
1367                         goto out;
1368                 }
1369                 ic_opmode = vif->type;
1370                 break;
1371         default:
1372                 ath_err(common, "Interface type %d not yet supported\n",
1373                         vif->type);
1374                 ret = -EOPNOTSUPP;
1375                 goto out;
1376         }
1377
1378         ath_dbg(common, ATH_DBG_CONFIG,
1379                 "Attach a VIF of type: %d\n", ic_opmode);
1380
1381         /* Set the VIF opmode */
1382         avp->av_opmode = ic_opmode;
1383         avp->av_bslot = -1;
1384
1385         sc->nvifs++;
1386
1387         ath9k_set_bssid_mask(hw, vif);
1388
1389         if (sc->nvifs > 1)
1390                 goto out; /* skip global settings for secondary vif */
1391
1392         if (ic_opmode == NL80211_IFTYPE_AP) {
1393                 ath9k_hw_set_tsfadjust(ah, 1);
1394                 sc->sc_flags |= SC_OP_TSF_RESET;
1395         }
1396
1397         /* Set the device opmode */
1398         ah->opmode = ic_opmode;
1399
1400         /*
1401          * Enable MIB interrupts when there are hardware phy counters.
1402          * Note we only do this (at the moment) for station mode.
1403          */
1404         if ((vif->type == NL80211_IFTYPE_STATION) ||
1405             (vif->type == NL80211_IFTYPE_ADHOC) ||
1406             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1407                 if (ah->config.enable_ani)
1408                         ah->imask |= ATH9K_INT_MIB;
1409                 ah->imask |= ATH9K_INT_TSFOOR;
1410         }
1411
1412         ath9k_hw_set_interrupts(ah, ah->imask);
1413
1414         if (vif->type == NL80211_IFTYPE_AP    ||
1415             vif->type == NL80211_IFTYPE_ADHOC) {
1416                 sc->sc_flags |= SC_OP_ANI_RUN;
1417                 ath_start_ani(common);
1418         }
1419
1420 out:
1421         mutex_unlock(&sc->mutex);
1422         return ret;
1423 }
1424
1425 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1426                                  struct ieee80211_vif *vif)
1427 {
1428         struct ath_vif *avp = (void *)vif->drv_priv;
1429
1430         /* Disable SWBA interrupt */
1431         sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1432         ath9k_ps_wakeup(sc);
1433         ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1434         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1435         tasklet_kill(&sc->bcon_tasklet);
1436         ath9k_ps_restore(sc);
1437
1438         ath_beacon_return(sc, avp);
1439         sc->sc_flags &= ~SC_OP_BEACONS;
1440
1441         if (sc->nbcnvifs > 0) {
1442                 /* Re-enable beaconing */
1443                 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1444                 ath9k_ps_wakeup(sc);
1445                 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1446                 ath9k_ps_restore(sc);
1447         }
1448 }
1449
1450 static int ath9k_change_interface(struct ieee80211_hw *hw,
1451                                   struct ieee80211_vif *vif,
1452                                   enum nl80211_iftype new_type,
1453                                   bool p2p)
1454 {
1455         struct ath_wiphy *aphy = hw->priv;
1456         struct ath_softc *sc = aphy->sc;
1457         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1458
1459         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1460         mutex_lock(&sc->mutex);
1461
1462         switch (new_type) {
1463         case NL80211_IFTYPE_AP:
1464         case NL80211_IFTYPE_ADHOC:
1465                 if (sc->nbcnvifs >= ATH_BCBUF) {
1466                         ath_err(common, "No beacon slot available\n");
1467                         return -ENOBUFS;
1468                 }
1469                 break;
1470         case NL80211_IFTYPE_STATION:
1471                 /* Stop ANI */
1472                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1473                 del_timer_sync(&common->ani.timer);
1474                 if ((vif->type == NL80211_IFTYPE_AP) ||
1475                     (vif->type == NL80211_IFTYPE_ADHOC))
1476                         ath9k_reclaim_beacon(sc, vif);
1477                 break;
1478         default:
1479                 ath_err(common, "Interface type %d not yet supported\n",
1480                                 vif->type);
1481                 mutex_unlock(&sc->mutex);
1482                 return -ENOTSUPP;
1483         }
1484         vif->type = new_type;
1485         vif->p2p = p2p;
1486
1487         mutex_unlock(&sc->mutex);
1488         return 0;
1489 }
1490
1491 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1492                                    struct ieee80211_vif *vif)
1493 {
1494         struct ath_wiphy *aphy = hw->priv;
1495         struct ath_softc *sc = aphy->sc;
1496         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1497
1498         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1499
1500         mutex_lock(&sc->mutex);
1501
1502         /* Stop ANI */
1503         sc->sc_flags &= ~SC_OP_ANI_RUN;
1504         del_timer_sync(&common->ani.timer);
1505
1506         /* Reclaim beacon resources */
1507         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1508             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1509             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT))
1510                 ath9k_reclaim_beacon(sc, vif);
1511
1512         sc->nvifs--;
1513
1514         mutex_unlock(&sc->mutex);
1515 }
1516
1517 static void ath9k_enable_ps(struct ath_softc *sc)
1518 {
1519         struct ath_hw *ah = sc->sc_ah;
1520
1521         sc->ps_enabled = true;
1522         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1523                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1524                         ah->imask |= ATH9K_INT_TIM_TIMER;
1525                         ath9k_hw_set_interrupts(ah, ah->imask);
1526                 }
1527                 ath9k_hw_setrxabort(ah, 1);
1528         }
1529 }
1530
1531 static void ath9k_disable_ps(struct ath_softc *sc)
1532 {
1533         struct ath_hw *ah = sc->sc_ah;
1534
1535         sc->ps_enabled = false;
1536         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1537         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1538                 ath9k_hw_setrxabort(ah, 0);
1539                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1540                                   PS_WAIT_FOR_CAB |
1541                                   PS_WAIT_FOR_PSPOLL_DATA |
1542                                   PS_WAIT_FOR_TX_ACK);
1543                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1544                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1545                         ath9k_hw_set_interrupts(ah, ah->imask);
1546                 }
1547         }
1548
1549 }
1550
1551 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1552 {
1553         struct ath_wiphy *aphy = hw->priv;
1554         struct ath_softc *sc = aphy->sc;
1555         struct ath_hw *ah = sc->sc_ah;
1556         struct ath_common *common = ath9k_hw_common(ah);
1557         struct ieee80211_conf *conf = &hw->conf;
1558         bool disable_radio;
1559
1560         mutex_lock(&sc->mutex);
1561
1562         /*
1563          * Leave this as the first check because we need to turn on the
1564          * radio if it was disabled before prior to processing the rest
1565          * of the changes. Likewise we must only disable the radio towards
1566          * the end.
1567          */
1568         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1569                 bool enable_radio;
1570                 bool all_wiphys_idle;
1571                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1572
1573                 spin_lock_bh(&sc->wiphy_lock);
1574                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1575                 ath9k_set_wiphy_idle(aphy, idle);
1576
1577                 enable_radio = (!idle && all_wiphys_idle);
1578
1579                 /*
1580                  * After we unlock here its possible another wiphy
1581                  * can be re-renabled so to account for that we will
1582                  * only disable the radio toward the end of this routine
1583                  * if by then all wiphys are still idle.
1584                  */
1585                 spin_unlock_bh(&sc->wiphy_lock);
1586
1587                 if (enable_radio) {
1588                         sc->ps_idle = false;
1589                         ath_radio_enable(sc, hw);
1590                         ath_dbg(common, ATH_DBG_CONFIG,
1591                                 "not-idle: enabling radio\n");
1592                 }
1593         }
1594
1595         /*
1596          * We just prepare to enable PS. We have to wait until our AP has
1597          * ACK'd our null data frame to disable RX otherwise we'll ignore
1598          * those ACKs and end up retransmitting the same null data frames.
1599          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1600          */
1601         if (changed & IEEE80211_CONF_CHANGE_PS) {
1602                 unsigned long flags;
1603                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1604                 if (conf->flags & IEEE80211_CONF_PS)
1605                         ath9k_enable_ps(sc);
1606                 else
1607                         ath9k_disable_ps(sc);
1608                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1609         }
1610
1611         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1612                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1613                         ath_dbg(common, ATH_DBG_CONFIG,
1614                                 "Monitor mode is enabled\n");
1615                         sc->sc_ah->is_monitoring = true;
1616                 } else {
1617                         ath_dbg(common, ATH_DBG_CONFIG,
1618                                 "Monitor mode is disabled\n");
1619                         sc->sc_ah->is_monitoring = false;
1620                 }
1621         }
1622
1623         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1624                 struct ieee80211_channel *curchan = hw->conf.channel;
1625                 int pos = curchan->hw_value;
1626                 int old_pos = -1;
1627                 unsigned long flags;
1628
1629                 if (ah->curchan)
1630                         old_pos = ah->curchan - &ah->channels[0];
1631
1632                 aphy->chan_idx = pos;
1633                 aphy->chan_is_ht = conf_is_ht(conf);
1634                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1635                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1636                 else
1637                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1638
1639                 if (aphy->state == ATH_WIPHY_SCAN ||
1640                     aphy->state == ATH_WIPHY_ACTIVE)
1641                         ath9k_wiphy_pause_all_forced(sc, aphy);
1642                 else {
1643                         /*
1644                          * Do not change operational channel based on a paused
1645                          * wiphy changes.
1646                          */
1647                         goto skip_chan_change;
1648                 }
1649
1650                 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1651                         curchan->center_freq);
1652
1653                 /* XXX: remove me eventualy */
1654                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1655
1656                 /* update survey stats for the old channel before switching */
1657                 spin_lock_irqsave(&common->cc_lock, flags);
1658                 ath_update_survey_stats(sc);
1659                 spin_unlock_irqrestore(&common->cc_lock, flags);
1660
1661                 /*
1662                  * If the operating channel changes, change the survey in-use flags
1663                  * along with it.
1664                  * Reset the survey data for the new channel, unless we're switching
1665                  * back to the operating channel from an off-channel operation.
1666                  */
1667                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1668                     sc->cur_survey != &sc->survey[pos]) {
1669
1670                         if (sc->cur_survey)
1671                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1672
1673                         sc->cur_survey = &sc->survey[pos];
1674
1675                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1676                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1677                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1678                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1679                 }
1680
1681                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1682                         ath_err(common, "Unable to set channel\n");
1683                         mutex_unlock(&sc->mutex);
1684                         return -EINVAL;
1685                 }
1686
1687                 /*
1688                  * The most recent snapshot of channel->noisefloor for the old
1689                  * channel is only available after the hardware reset. Copy it to
1690                  * the survey stats now.
1691                  */
1692                 if (old_pos >= 0)
1693                         ath_update_survey_nf(sc, old_pos);
1694         }
1695
1696 skip_chan_change:
1697         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1698                 sc->config.txpowlimit = 2 * conf->power_level;
1699                 ath_update_txpow(sc);
1700         }
1701
1702         spin_lock_bh(&sc->wiphy_lock);
1703         disable_radio = ath9k_all_wiphys_idle(sc);
1704         spin_unlock_bh(&sc->wiphy_lock);
1705
1706         if (disable_radio) {
1707                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1708                 sc->ps_idle = true;
1709                 ath_radio_disable(sc, hw);
1710         }
1711
1712         mutex_unlock(&sc->mutex);
1713
1714         return 0;
1715 }
1716
1717 #define SUPPORTED_FILTERS                       \
1718         (FIF_PROMISC_IN_BSS |                   \
1719         FIF_ALLMULTI |                          \
1720         FIF_CONTROL |                           \
1721         FIF_PSPOLL |                            \
1722         FIF_OTHER_BSS |                         \
1723         FIF_BCN_PRBRESP_PROMISC |               \
1724         FIF_PROBE_REQ |                         \
1725         FIF_FCSFAIL)
1726
1727 /* FIXME: sc->sc_full_reset ? */
1728 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1729                                    unsigned int changed_flags,
1730                                    unsigned int *total_flags,
1731                                    u64 multicast)
1732 {
1733         struct ath_wiphy *aphy = hw->priv;
1734         struct ath_softc *sc = aphy->sc;
1735         u32 rfilt;
1736
1737         changed_flags &= SUPPORTED_FILTERS;
1738         *total_flags &= SUPPORTED_FILTERS;
1739
1740         sc->rx.rxfilter = *total_flags;
1741         ath9k_ps_wakeup(sc);
1742         rfilt = ath_calcrxfilter(sc);
1743         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1744         ath9k_ps_restore(sc);
1745
1746         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1747                 "Set HW RX filter: 0x%x\n", rfilt);
1748 }
1749
1750 static int ath9k_sta_add(struct ieee80211_hw *hw,
1751                          struct ieee80211_vif *vif,
1752                          struct ieee80211_sta *sta)
1753 {
1754         struct ath_wiphy *aphy = hw->priv;
1755         struct ath_softc *sc = aphy->sc;
1756
1757         ath_node_attach(sc, sta);
1758
1759         return 0;
1760 }
1761
1762 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1763                             struct ieee80211_vif *vif,
1764                             struct ieee80211_sta *sta)
1765 {
1766         struct ath_wiphy *aphy = hw->priv;
1767         struct ath_softc *sc = aphy->sc;
1768
1769         ath_node_detach(sc, sta);
1770
1771         return 0;
1772 }
1773
1774 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1775                          const struct ieee80211_tx_queue_params *params)
1776 {
1777         struct ath_wiphy *aphy = hw->priv;
1778         struct ath_softc *sc = aphy->sc;
1779         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1780         struct ath_txq *txq;
1781         struct ath9k_tx_queue_info qi;
1782         int ret = 0;
1783
1784         if (queue >= WME_NUM_AC)
1785                 return 0;
1786
1787         txq = sc->tx.txq_map[queue];
1788
1789         mutex_lock(&sc->mutex);
1790
1791         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1792
1793         qi.tqi_aifs = params->aifs;
1794         qi.tqi_cwmin = params->cw_min;
1795         qi.tqi_cwmax = params->cw_max;
1796         qi.tqi_burstTime = params->txop;
1797
1798         ath_dbg(common, ATH_DBG_CONFIG,
1799                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1800                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1801                 params->cw_max, params->txop);
1802
1803         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1804         if (ret)
1805                 ath_err(common, "TXQ Update failed\n");
1806
1807         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1808                 if (queue == WME_AC_BE && !ret)
1809                         ath_beaconq_config(sc);
1810
1811         mutex_unlock(&sc->mutex);
1812
1813         return ret;
1814 }
1815
1816 static int ath9k_set_key(struct ieee80211_hw *hw,
1817                          enum set_key_cmd cmd,
1818                          struct ieee80211_vif *vif,
1819                          struct ieee80211_sta *sta,
1820                          struct ieee80211_key_conf *key)
1821 {
1822         struct ath_wiphy *aphy = hw->priv;
1823         struct ath_softc *sc = aphy->sc;
1824         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1825         int ret = 0;
1826
1827         if (modparam_nohwcrypt)
1828                 return -ENOSPC;
1829
1830         mutex_lock(&sc->mutex);
1831         ath9k_ps_wakeup(sc);
1832         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1833
1834         switch (cmd) {
1835         case SET_KEY:
1836                 ret = ath_key_config(common, vif, sta, key);
1837                 if (ret >= 0) {
1838                         key->hw_key_idx = ret;
1839                         /* push IV and Michael MIC generation to stack */
1840                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1841                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1842                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1843                         if (sc->sc_ah->sw_mgmt_crypto &&
1844                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1845                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1846                         ret = 0;
1847                 }
1848                 break;
1849         case DISABLE_KEY:
1850                 ath_key_delete(common, key);
1851                 break;
1852         default:
1853                 ret = -EINVAL;
1854         }
1855
1856         ath9k_ps_restore(sc);
1857         mutex_unlock(&sc->mutex);
1858
1859         return ret;
1860 }
1861
1862 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1863                                    struct ieee80211_vif *vif,
1864                                    struct ieee80211_bss_conf *bss_conf,
1865                                    u32 changed)
1866 {
1867         struct ath_wiphy *aphy = hw->priv;
1868         struct ath_softc *sc = aphy->sc;
1869         struct ath_hw *ah = sc->sc_ah;
1870         struct ath_common *common = ath9k_hw_common(ah);
1871         struct ath_vif *avp = (void *)vif->drv_priv;
1872         int slottime;
1873         int error;
1874
1875         mutex_lock(&sc->mutex);
1876
1877         if (changed & BSS_CHANGED_BSSID) {
1878                 /* Set BSSID */
1879                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1880                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1881                 common->curaid = 0;
1882                 ath9k_hw_write_associd(ah);
1883
1884                 /* Set aggregation protection mode parameters */
1885                 sc->config.ath_aggr_prot = 0;
1886
1887                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1888                         common->curbssid, common->curaid);
1889
1890                 /* need to reconfigure the beacon */
1891                 sc->sc_flags &= ~SC_OP_BEACONS ;
1892         }
1893
1894         /* Enable transmission of beacons (AP, IBSS, MESH) */
1895         if ((changed & BSS_CHANGED_BEACON) ||
1896             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1897                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1898                 error = ath_beacon_alloc(aphy, vif);
1899                 if (!error)
1900                         ath_beacon_config(sc, vif);
1901         }
1902
1903         if (changed & BSS_CHANGED_ERP_SLOT) {
1904                 if (bss_conf->use_short_slot)
1905                         slottime = 9;
1906                 else
1907                         slottime = 20;
1908                 if (vif->type == NL80211_IFTYPE_AP) {
1909                         /*
1910                          * Defer update, so that connected stations can adjust
1911                          * their settings at the same time.
1912                          * See beacon.c for more details
1913                          */
1914                         sc->beacon.slottime = slottime;
1915                         sc->beacon.updateslot = UPDATE;
1916                 } else {
1917                         ah->slottime = slottime;
1918                         ath9k_hw_init_global_settings(ah);
1919                 }
1920         }
1921
1922         /* Disable transmission of beacons */
1923         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1924                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1925
1926         if (changed & BSS_CHANGED_BEACON_INT) {
1927                 sc->beacon_interval = bss_conf->beacon_int;
1928                 /*
1929                  * In case of AP mode, the HW TSF has to be reset
1930                  * when the beacon interval changes.
1931                  */
1932                 if (vif->type == NL80211_IFTYPE_AP) {
1933                         sc->sc_flags |= SC_OP_TSF_RESET;
1934                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1935                         error = ath_beacon_alloc(aphy, vif);
1936                         if (!error)
1937                                 ath_beacon_config(sc, vif);
1938                 } else {
1939                         ath_beacon_config(sc, vif);
1940                 }
1941         }
1942
1943         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1944                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1945                         bss_conf->use_short_preamble);
1946                 if (bss_conf->use_short_preamble)
1947                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1948                 else
1949                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1950         }
1951
1952         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1953                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1954                         bss_conf->use_cts_prot);
1955                 if (bss_conf->use_cts_prot &&
1956                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1957                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1958                 else
1959                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1960         }
1961
1962         if (changed & BSS_CHANGED_ASSOC) {
1963                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1964                         bss_conf->assoc);
1965                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1966         }
1967
1968         mutex_unlock(&sc->mutex);
1969 }
1970
1971 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1972 {
1973         u64 tsf;
1974         struct ath_wiphy *aphy = hw->priv;
1975         struct ath_softc *sc = aphy->sc;
1976
1977         mutex_lock(&sc->mutex);
1978         ath9k_ps_wakeup(sc);
1979         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1980         ath9k_ps_restore(sc);
1981         mutex_unlock(&sc->mutex);
1982
1983         return tsf;
1984 }
1985
1986 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1987 {
1988         struct ath_wiphy *aphy = hw->priv;
1989         struct ath_softc *sc = aphy->sc;
1990
1991         mutex_lock(&sc->mutex);
1992         ath9k_ps_wakeup(sc);
1993         ath9k_hw_settsf64(sc->sc_ah, tsf);
1994         ath9k_ps_restore(sc);
1995         mutex_unlock(&sc->mutex);
1996 }
1997
1998 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1999 {
2000         struct ath_wiphy *aphy = hw->priv;
2001         struct ath_softc *sc = aphy->sc;
2002
2003         mutex_lock(&sc->mutex);
2004
2005         ath9k_ps_wakeup(sc);
2006         ath9k_hw_reset_tsf(sc->sc_ah);
2007         ath9k_ps_restore(sc);
2008
2009         mutex_unlock(&sc->mutex);
2010 }
2011
2012 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2013                               struct ieee80211_vif *vif,
2014                               enum ieee80211_ampdu_mlme_action action,
2015                               struct ieee80211_sta *sta,
2016                               u16 tid, u16 *ssn)
2017 {
2018         struct ath_wiphy *aphy = hw->priv;
2019         struct ath_softc *sc = aphy->sc;
2020         int ret = 0;
2021
2022         local_bh_disable();
2023
2024         switch (action) {
2025         case IEEE80211_AMPDU_RX_START:
2026                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2027                         ret = -ENOTSUPP;
2028                 break;
2029         case IEEE80211_AMPDU_RX_STOP:
2030                 break;
2031         case IEEE80211_AMPDU_TX_START:
2032                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2033                         return -EOPNOTSUPP;
2034
2035                 ath9k_ps_wakeup(sc);
2036                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2037                 if (!ret)
2038                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2039                 ath9k_ps_restore(sc);
2040                 break;
2041         case IEEE80211_AMPDU_TX_STOP:
2042                 ath9k_ps_wakeup(sc);
2043                 ath_tx_aggr_stop(sc, sta, tid);
2044                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2045                 ath9k_ps_restore(sc);
2046                 break;
2047         case IEEE80211_AMPDU_TX_OPERATIONAL:
2048                 ath9k_ps_wakeup(sc);
2049                 ath_tx_aggr_resume(sc, sta, tid);
2050                 ath9k_ps_restore(sc);
2051                 break;
2052         default:
2053                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2054         }
2055
2056         local_bh_enable();
2057
2058         return ret;
2059 }
2060
2061 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2062                              struct survey_info *survey)
2063 {
2064         struct ath_wiphy *aphy = hw->priv;
2065         struct ath_softc *sc = aphy->sc;
2066         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2067         struct ieee80211_supported_band *sband;
2068         struct ieee80211_channel *chan;
2069         unsigned long flags;
2070         int pos;
2071
2072         spin_lock_irqsave(&common->cc_lock, flags);
2073         if (idx == 0)
2074                 ath_update_survey_stats(sc);
2075
2076         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2077         if (sband && idx >= sband->n_channels) {
2078                 idx -= sband->n_channels;
2079                 sband = NULL;
2080         }
2081
2082         if (!sband)
2083                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2084
2085         if (!sband || idx >= sband->n_channels) {
2086                 spin_unlock_irqrestore(&common->cc_lock, flags);
2087                 return -ENOENT;
2088         }
2089
2090         chan = &sband->channels[idx];
2091         pos = chan->hw_value;
2092         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2093         survey->channel = chan;
2094         spin_unlock_irqrestore(&common->cc_lock, flags);
2095
2096         return 0;
2097 }
2098
2099 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2100 {
2101         struct ath_wiphy *aphy = hw->priv;
2102         struct ath_softc *sc = aphy->sc;
2103
2104         mutex_lock(&sc->mutex);
2105         if (ath9k_wiphy_scanning(sc)) {
2106                 /*
2107                  * There is a race here in mac80211 but fixing it requires
2108                  * we revisit how we handle the scan complete callback.
2109                  * After mac80211 fixes we will not have configured hardware
2110                  * to the home channel nor would we have configured the RX
2111                  * filter yet.
2112                  */
2113                 mutex_unlock(&sc->mutex);
2114                 return;
2115         }
2116
2117         aphy->state = ATH_WIPHY_SCAN;
2118         ath9k_wiphy_pause_all_forced(sc, aphy);
2119         mutex_unlock(&sc->mutex);
2120 }
2121
2122 /*
2123  * XXX: this requires a revisit after the driver
2124  * scan_complete gets moved to another place/removed in mac80211.
2125  */
2126 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2127 {
2128         struct ath_wiphy *aphy = hw->priv;
2129         struct ath_softc *sc = aphy->sc;
2130
2131         mutex_lock(&sc->mutex);
2132         aphy->state = ATH_WIPHY_ACTIVE;
2133         mutex_unlock(&sc->mutex);
2134 }
2135
2136 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2137 {
2138         struct ath_wiphy *aphy = hw->priv;
2139         struct ath_softc *sc = aphy->sc;
2140         struct ath_hw *ah = sc->sc_ah;
2141
2142         mutex_lock(&sc->mutex);
2143         ah->coverage_class = coverage_class;
2144         ath9k_hw_init_global_settings(ah);
2145         mutex_unlock(&sc->mutex);
2146 }
2147
2148 struct ieee80211_ops ath9k_ops = {
2149         .tx                 = ath9k_tx,
2150         .start              = ath9k_start,
2151         .stop               = ath9k_stop,
2152         .add_interface      = ath9k_add_interface,
2153         .change_interface   = ath9k_change_interface,
2154         .remove_interface   = ath9k_remove_interface,
2155         .config             = ath9k_config,
2156         .configure_filter   = ath9k_configure_filter,
2157         .sta_add            = ath9k_sta_add,
2158         .sta_remove         = ath9k_sta_remove,
2159         .conf_tx            = ath9k_conf_tx,
2160         .bss_info_changed   = ath9k_bss_info_changed,
2161         .set_key            = ath9k_set_key,
2162         .get_tsf            = ath9k_get_tsf,
2163         .set_tsf            = ath9k_set_tsf,
2164         .reset_tsf          = ath9k_reset_tsf,
2165         .ampdu_action       = ath9k_ampdu_action,
2166         .get_survey         = ath9k_get_survey,
2167         .sw_scan_start      = ath9k_sw_scan_start,
2168         .sw_scan_complete   = ath9k_sw_scan_complete,
2169         .rfkill_poll        = ath9k_rfkill_poll_state,
2170         .set_coverage_class = ath9k_set_coverage_class,
2171 };