drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_cache_conf_rate(struct ath_softc *sc,
  22                                 struct ieee80211_conf *conf)
  23 {
  24         switch (conf->channel->band) {
  25         case IEEE80211_BAND_2GHZ:
  26                 if (conf_is_ht20(conf))
  27                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  28                 else if (conf_is_ht40_minus(conf))
  29                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  30                 else if (conf_is_ht40_plus(conf))
  31                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  32                 else
  33                         sc->cur_rate_mode = ATH9K_MODE_11G;
  34                 break;
  35         case IEEE80211_BAND_5GHZ:
  36                 if (conf_is_ht20(conf))
  37                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  38                 else if (conf_is_ht40_minus(conf))
  39                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  40                 else if (conf_is_ht40_plus(conf))
  41                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  42                 else
  43                         sc->cur_rate_mode = ATH9K_MODE_11A;
  44                 break;
  45         default:
  46                 BUG_ON(1);
  47                 break;
  48         }
  49 }
  50
  51 static void ath_update_txpow(struct ath_softc *sc)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54         u32 txpow;
  55
  56         if (sc->curtxpow != sc->config.txpowlimit) {
  57                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  58                 /* read back in case value is clamped */
  59                 ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
  60                 sc->curtxpow = txpow;
  61         }
  62 }
  63
  64 static u8 parse_mpdudensity(u8 mpdudensity)
  65 {
  66         /*
  67          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  68          *   0 for no restriction
  69          *   1 for 1/4 us
  70          *   2 for 1/2 us
  71          *   3 for 1 us
  72          *   4 for 2 us
  73          *   5 for 4 us
  74          *   6 for 8 us
  75          *   7 for 16 us
  76          */
  77         switch (mpdudensity) {
  78         case 0:
  79                 return 0;
  80         case 1:
  81         case 2:
  82         case 3:
  83                 /* Our lower layer calculations limit our precision to
  84                    1 microsecond */
  85                 return 1;
  86         case 4:
  87                 return 2;
  88         case 5:
  89                 return 4;
  90         case 6:
  91                 return 8;
  92         case 7:
  93                 return 16;
  94         default:
  95                 return 0;
  96         }
  97 }
  98
  99 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
 100                                                 struct ieee80211_hw *hw)
 101 {
 102         struct ieee80211_channel *curchan = hw->conf.channel;
 103         struct ath9k_channel *channel;
 104         u8 chan_idx;
 105
 106         chan_idx = curchan->hw_value;
 107         channel = &sc->sc_ah->channels[chan_idx];
 108         ath9k_update_ichannel(sc, hw, channel);
 109         return channel;
 110 }
 111
 112 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 113 {
 114         unsigned long flags;
 115         bool ret;
 116
 117         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 118         ret = ath9k_hw_setpower(sc->sc_ah, mode);
 119         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 120
 121         return ret;
 122 }
 123
 124 void ath9k_ps_wakeup(struct ath_softc *sc)
 125 {
 126         unsigned long flags;
 127
 128         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 129         if (++sc->ps_usecount != 1)
 130                 goto unlock;
 131
 132         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 133
 134  unlock:
 135         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 136 }
 137
 138 void ath9k_ps_restore(struct ath_softc *sc)
 139 {
 140         unsigned long flags;
 141
 142         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 143         if (--sc->ps_usecount != 0)
 144                 goto unlock;
 145
 146         if (sc->ps_idle)
 147                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 148         else if (sc->ps_enabled &&
 149                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 150                               PS_WAIT_FOR_CAB |
 151                               PS_WAIT_FOR_PSPOLL_DATA |
 152                               PS_WAIT_FOR_TX_ACK)))
 153                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 154
 155  unlock:
 156         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 157 }
 158
 159 /*
 160  * Set/change channels.  If the channel is really being changed, it's done
 161  * by reseting the chip.  To accomplish this we must first cleanup any pending
 162  * DMA, then restart stuff.
 163 */
 164 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 165                     struct ath9k_channel *hchan)
 166 {
 167         struct ath_hw *ah = sc->sc_ah;
 168         struct ath_common *common = ath9k_hw_common(ah);
 169         struct ieee80211_conf *conf = &common->hw->conf;
 170         bool fastcc = true, stopped;
 171         struct ieee80211_channel *channel = hw->conf.channel;
 172         int r;
 173
 174         if (sc->sc_flags & SC_OP_INVALID)
 175                 return -EIO;
 176
 177         ath9k_ps_wakeup(sc);
 178
 179         /*
 180          * This is only performed if the channel settings have
 181          * actually changed.
 182          *
 183          * To switch channels clear any pending DMA operations;
 184          * wait long enough for the RX fifo to drain, reset the
 185          * hardware at the new frequency, and then re-enable
 186          * the relevant bits of the h/w.
 187          */
 188         ath9k_hw_set_interrupts(ah, 0);
 189         ath_drain_all_txq(sc, false);
 190         stopped = ath_stoprecv(sc);
 191
 192         /* XXX: do not flush receive queue here. We don't want
 193          * to flush data frames already in queue because of
 194          * changing channel. */
 195
 196         if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
 197                 fastcc = false;
 198
 199         ath_print(common, ATH_DBG_CONFIG,
 200                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
 201                   sc->sc_ah->curchan->channel,
 202                   channel->center_freq, conf_is_ht40(conf));
 203
 204         spin_lock_bh(&sc->sc_resetlock);
 205
 206         r = ath9k_hw_reset(ah, hchan, fastcc);
 207         if (r) {
 208                 ath_print(common, ATH_DBG_FATAL,
 209                           "Unable to reset channel (%u MHz), "
 210                           "reset status %d\n",
 211                           channel->center_freq, r);
 212                 spin_unlock_bh(&sc->sc_resetlock);
 213                 goto ps_restore;
 214         }
 215         spin_unlock_bh(&sc->sc_resetlock);
 216
 217         sc->sc_flags &= ~SC_OP_FULL_RESET;
 218
 219         if (ath_startrecv(sc) != 0) {
 220                 ath_print(common, ATH_DBG_FATAL,
 221                           "Unable to restart recv logic\n");
 222                 r = -EIO;
 223                 goto ps_restore;
 224         }
 225
 226         ath_cache_conf_rate(sc, &hw->conf);
 227         ath_update_txpow(sc);
 228         ath9k_hw_set_interrupts(ah, ah->imask);
 229
 230  ps_restore:
 231         ath9k_ps_restore(sc);
 232         return r;
 233 }
 234
 235 /*
 236  *  This routine performs the periodic noise floor calibration function
 237  *  that is used to adjust and optimize the chip performance.  This
 238  *  takes environmental changes (location, temperature) into account.
 239  *  When the task is complete, it reschedules itself depending on the
 240  *  appropriate interval that was calculated.
 241  */
 242 void ath_ani_calibrate(unsigned long data)
 243 {
 244         struct ath_softc *sc = (struct ath_softc *)data;
 245         struct ath_hw *ah = sc->sc_ah;
 246         struct ath_common *common = ath9k_hw_common(ah);
 247         bool longcal = false;
 248         bool shortcal = false;
 249         bool aniflag = false;
 250         unsigned int timestamp = jiffies_to_msecs(jiffies);
 251         u32 cal_interval, short_cal_interval;
 252
 253         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 254                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 255
 256         /* Only calibrate if awake */
 257         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 258                 goto set_timer;
 259
 260         ath9k_ps_wakeup(sc);
 261
 262         /* Long calibration runs independently of short calibration. */
 263         if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
 264                 longcal = true;
 265                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 266                 common->ani.longcal_timer = timestamp;
 267         }
 268
 269         /* Short calibration applies only while caldone is false */
 270         if (!common->ani.caldone) {
 271                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 272                         shortcal = true;
 273                         ath_print(common, ATH_DBG_ANI,
 274                                   "shortcal @%lu\n", jiffies);
 275                         common->ani.shortcal_timer = timestamp;
 276                         common->ani.resetcal_timer = timestamp;
 277                 }
 278         } else {
 279                 if ((timestamp - common->ani.resetcal_timer) >=
 280                     ATH_RESTART_CALINTERVAL) {
 281                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 282                         if (common->ani.caldone)
 283                                 common->ani.resetcal_timer = timestamp;
 284                 }
 285         }
 286
 287         /* Verify whether we must check ANI */
 288         if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
 289                 aniflag = true;
 290                 common->ani.checkani_timer = timestamp;
 291         }
 292
 293         /* Skip all processing if there's nothing to do. */
 294         if (longcal || shortcal || aniflag) {
 295                 /* Call ANI routine if necessary */
 296                 if (aniflag)
 297                         ath9k_hw_ani_monitor(ah, ah->curchan);
 298
 299                 /* Perform calibration if necessary */
 300                 if (longcal || shortcal) {
 301                         common->ani.caldone =
 302                                 ath9k_hw_calibrate(ah,
 303                                                    ah->curchan,
 304                                                    common->rx_chainmask,
 305                                                    longcal);
 306
 307                         if (longcal)
 308                                 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
 309                                                                      ah->curchan);
 310
 311                         ath_print(common, ATH_DBG_ANI,
 312                                   " calibrate chan %u/%x nf: %d\n",
 313                                   ah->curchan->channel,
 314                                   ah->curchan->channelFlags,
 315                                   common->ani.noise_floor);
 316                 }
 317         }
 318
 319         ath9k_ps_restore(sc);
 320
 321 set_timer:
 322         /*
 323         * Set timer interval based on previous results.
 324         * The interval must be the shortest necessary to satisfy ANI,
 325         * short calibration and long calibration.
 326         */
 327         cal_interval = ATH_LONG_CALINTERVAL;
 328         if (sc->sc_ah->config.enable_ani)
 329                 cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
 330         if (!common->ani.caldone)
 331                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 332
 333         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 334 }
 335
 336 static void ath_start_ani(struct ath_common *common)
 337 {
 338         unsigned long timestamp = jiffies_to_msecs(jiffies);
 339
 340         common->ani.longcal_timer = timestamp;
 341         common->ani.shortcal_timer = timestamp;
 342         common->ani.checkani_timer = timestamp;
 343
 344         mod_timer(&common->ani.timer,
 345                   jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
 346 }
 347
 348 /*
 349  * Update tx/rx chainmask. For legacy association,
 350  * hard code chainmask to 1x1, for 11n association, use
 351  * the chainmask configuration, for bt coexistence, use
 352  * the chainmask configuration even in legacy mode.
 353  */
 354 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 355 {
 356         struct ath_hw *ah = sc->sc_ah;
 357         struct ath_common *common = ath9k_hw_common(ah);
 358
 359         if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
 360             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 361                 common->tx_chainmask = ah->caps.tx_chainmask;
 362                 common->rx_chainmask = ah->caps.rx_chainmask;
 363         } else {
 364                 common->tx_chainmask = 1;
 365                 common->rx_chainmask = 1;
 366         }
 367
 368         ath_print(common, ATH_DBG_CONFIG,
 369                   "tx chmask: %d, rx chmask: %d\n",
 370                   common->tx_chainmask,
 371                   common->rx_chainmask);
 372 }
 373
 374 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 375 {
 376         struct ath_node *an;
 377
 378         an = (struct ath_node *)sta->drv_priv;
 379
 380         if (sc->sc_flags & SC_OP_TXAGGR) {
 381                 ath_tx_node_init(sc, an);
 382                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 383                                      sta->ht_cap.ampdu_factor);
 384                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 385                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 386         }
 387 }
 388
 389 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 390 {
 391         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 392
 393         if (sc->sc_flags & SC_OP_TXAGGR)
 394                 ath_tx_node_cleanup(sc, an);
 395 }
 396
 397 void ath9k_tasklet(unsigned long data)
 398 {
 399         struct ath_softc *sc = (struct ath_softc *)data;
 400         struct ath_hw *ah = sc->sc_ah;
 401         struct ath_common *common = ath9k_hw_common(ah);
 402
 403         u32 status = sc->intrstatus;
 404         u32 rxmask;
 405
 406         ath9k_ps_wakeup(sc);
 407
 408         if ((status & ATH9K_INT_FATAL) ||
 409             !ath9k_hw_check_alive(ah)) {
 410                 ath_reset(sc, false);
 411                 ath9k_ps_restore(sc);
 412                 return;
 413         }
 414
 415         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 416                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 417                           ATH9K_INT_RXORN);
 418         else
 419                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 420
 421         if (status & rxmask) {
 422                 spin_lock_bh(&sc->rx.rxflushlock);
 423
 424                 /* Check for high priority Rx first */
 425                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 426                     (status & ATH9K_INT_RXHP))
 427                         ath_rx_tasklet(sc, 0, true);
 428
 429                 ath_rx_tasklet(sc, 0, false);
 430                 spin_unlock_bh(&sc->rx.rxflushlock);
 431         }
 432
 433         if (status & ATH9K_INT_TX) {
 434                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 435                         ath_tx_edma_tasklet(sc);
 436                 else
 437                         ath_tx_tasklet(sc);
 438         }
 439
 440         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 441                 /*
 442                  * TSF sync does not look correct; remain awake to sync with
 443                  * the next Beacon.
 444                  */
 445                 ath_print(common, ATH_DBG_PS,
 446                           "TSFOOR - Sync with next Beacon\n");
 447                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 448         }
 449
 450         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 451                 if (status & ATH9K_INT_GENTIMER)
 452                         ath_gen_timer_isr(sc->sc_ah);
 453
 454         /* re-enable hardware interrupt */
 455         ath9k_hw_set_interrupts(ah, ah->imask);
 456         ath9k_ps_restore(sc);
 457 }
 458
 459 irqreturn_t ath_isr(int irq, void *dev)
 460 {
 461 #define SCHED_INTR (                            \
 462                 ATH9K_INT_FATAL |               \
 463                 ATH9K_INT_RXORN |               \
 464                 ATH9K_INT_RXEOL |               \
 465                 ATH9K_INT_RX |                  \
 466                 ATH9K_INT_RXLP |                \
 467                 ATH9K_INT_RXHP |                \
 468                 ATH9K_INT_TX |                  \
 469                 ATH9K_INT_BMISS |               \
 470                 ATH9K_INT_CST |                 \
 471                 ATH9K_INT_TSFOOR |              \
 472                 ATH9K_INT_GENTIMER)
 473
 474         struct ath_softc *sc = dev;
 475         struct ath_hw *ah = sc->sc_ah;
 476         enum ath9k_int status;
 477         bool sched = false;
 478
 479         /*
 480          * The hardware is not ready/present, don't
 481          * touch anything. Note this can happen early
 482          * on if the IRQ is shared.
 483          */
 484         if (sc->sc_flags & SC_OP_INVALID)
 485                 return IRQ_NONE;
 486
 487
 488         /* shared irq, not for us */
 489
 490         if (!ath9k_hw_intrpend(ah))
 491                 return IRQ_NONE;
 492
 493         /*
 494          * Figure out the reason(s) for the interrupt.  Note
 495          * that the hal returns a pseudo-ISR that may include
 496          * bits we haven't explicitly enabled so we mask the
 497          * value to insure we only process bits we requested.
 498          */
 499         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 500         status &= ah->imask;    /* discard unasked-for bits */
 501
 502         /*
 503          * If there are no status bits set, then this interrupt was not
 504          * for me (should have been caught above).
 505          */
 506         if (!status)
 507                 return IRQ_NONE;
 508
 509         /* Cache the status */
 510         sc->intrstatus = status;
 511
 512         if (status & SCHED_INTR)
 513                 sched = true;
 514
 515         /*
 516          * If a FATAL or RXORN interrupt is received, we have to reset the
 517          * chip immediately.
 518          */
 519         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 520             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 521                 goto chip_reset;
 522
 523         if (status & ATH9K_INT_SWBA)
 524                 tasklet_schedule(&sc->bcon_tasklet);
 525
 526         if (status & ATH9K_INT_TXURN)
 527                 ath9k_hw_updatetxtriglevel(ah, true);
 528
 529         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 530                 if (status & ATH9K_INT_RXEOL) {
 531                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 532                         ath9k_hw_set_interrupts(ah, ah->imask);
 533                 }
 534         }
 535
 536         if (status & ATH9K_INT_MIB) {
 537                 /*
 538                  * Disable interrupts until we service the MIB
 539                  * interrupt; otherwise it will continue to
 540                  * fire.
 541                  */
 542                 ath9k_hw_set_interrupts(ah, 0);
 543                 /*
 544                  * Let the hal handle the event. We assume
 545                  * it will clear whatever condition caused
 546                  * the interrupt.
 547                  */
 548                 ath9k_hw_procmibevent(ah);
 549                 ath9k_hw_set_interrupts(ah, ah->imask);
 550         }
 551
 552         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 553                 if (status & ATH9K_INT_TIM_TIMER) {
 554                         /* Clear RxAbort bit so that we can
 555                          * receive frames */
 556                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 557                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 558                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 559                 }
 560
 561 chip_reset:
 562
 563         ath_debug_stat_interrupt(sc, status);
 564
 565         if (sched) {
 566                 /* turn off every interrupt except SWBA */
 567                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 568                 tasklet_schedule(&sc->intr_tq);
 569         }
 570
 571         return IRQ_HANDLED;
 572
 573 #undef SCHED_INTR
 574 }
 575
 576 static u32 ath_get_extchanmode(struct ath_softc *sc,
 577                                struct ieee80211_channel *chan,
 578                                enum nl80211_channel_type channel_type)
 579 {
 580         u32 chanmode = 0;
 581
 582         switch (chan->band) {
 583         case IEEE80211_BAND_2GHZ:
 584                 switch(channel_type) {
 585                 case NL80211_CHAN_NO_HT:
 586                 case NL80211_CHAN_HT20:
 587                         chanmode = CHANNEL_G_HT20;
 588                         break;
 589                 case NL80211_CHAN_HT40PLUS:
 590                         chanmode = CHANNEL_G_HT40PLUS;
 591                         break;
 592                 case NL80211_CHAN_HT40MINUS:
 593                         chanmode = CHANNEL_G_HT40MINUS;
 594                         break;
 595                 }
 596                 break;
 597         case IEEE80211_BAND_5GHZ:
 598                 switch(channel_type) {
 599                 case NL80211_CHAN_NO_HT:
 600                 case NL80211_CHAN_HT20:
 601                         chanmode = CHANNEL_A_HT20;
 602                         break;
 603                 case NL80211_CHAN_HT40PLUS:
 604                         chanmode = CHANNEL_A_HT40PLUS;
 605                         break;
 606                 case NL80211_CHAN_HT40MINUS:
 607                         chanmode = CHANNEL_A_HT40MINUS;
 608                         break;
 609                 }
 610                 break;
 611         default:
 612                 break;
 613         }
 614
 615         return chanmode;
 616 }
 617
 618 static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key,
 619                            struct ath9k_keyval *hk, const u8 *addr,
 620                            bool authenticator)
 621 {
 622         struct ath_hw *ah = common->ah;
 623         const u8 *key_rxmic;
 624         const u8 *key_txmic;
 625
 626         key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
 627         key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
 628
 629         if (addr == NULL) {
 630                 /*
 631                  * Group key installation - only two key cache entries are used
 632                  * regardless of splitmic capability since group key is only
 633                  * used either for TX or RX.
 634                  */
 635                 if (authenticator) {
 636                         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
 637                         memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
 638                 } else {
 639                         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 640                         memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
 641                 }
 642                 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
 643         }
 644         if (!common->splitmic) {
 645                 /* TX and RX keys share the same key cache entry. */
 646                 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 647                 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
 648                 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
 649         }
 650
 651         /* Separate key cache entries for TX and RX */
 652
 653         /* TX key goes at first index, RX key at +32. */
 654         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
 655         if (!ath9k_hw_set_keycache_entry(ah, keyix, hk, NULL)) {
 656                 /* TX MIC entry failed. No need to proceed further */
 657                 ath_print(common, ATH_DBG_FATAL,
 658                           "Setting TX MIC Key Failed\n");
 659                 return 0;
 660         }
 661
 662         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 663         /* XXX delete tx key on failure? */
 664         return ath9k_hw_set_keycache_entry(ah, keyix + 32, hk, addr);
 665 }
 666
 667 static int ath_reserve_key_cache_slot_tkip(struct ath_common *common)
 668 {
 669         int i;
 670
 671         for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
 672                 if (test_bit(i, common->keymap) ||
 673                     test_bit(i + 64, common->keymap))
 674                         continue; /* At least one part of TKIP key allocated */
 675                 if (common->splitmic &&
 676                     (test_bit(i + 32, common->keymap) ||
 677                      test_bit(i + 64 + 32, common->keymap)))
 678                         continue; /* At least one part of TKIP key allocated */
 679
 680                 /* Found a free slot for a TKIP key */
 681                 return i;
 682         }
 683         return -1;
 684 }
 685
 686 static int ath_reserve_key_cache_slot(struct ath_common *common)
 687 {
 688         int i;
 689
 690         /* First, try to find slots that would not be available for TKIP. */
 691         if (common->splitmic) {
 692                 for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) {
 693                         if (!test_bit(i, common->keymap) &&
 694                             (test_bit(i + 32, common->keymap) ||
 695                              test_bit(i + 64, common->keymap) ||
 696                              test_bit(i + 64 + 32, common->keymap)))
 697                                 return i;
 698                         if (!test_bit(i + 32, common->keymap) &&
 699                             (test_bit(i, common->keymap) ||
 700                              test_bit(i + 64, common->keymap) ||
 701                              test_bit(i + 64 + 32, common->keymap)))
 702                                 return i + 32;
 703                         if (!test_bit(i + 64, common->keymap) &&
 704                             (test_bit(i , common->keymap) ||
 705                              test_bit(i + 32, common->keymap) ||
 706                              test_bit(i + 64 + 32, common->keymap)))
 707                                 return i + 64;
 708                         if (!test_bit(i + 64 + 32, common->keymap) &&
 709                             (test_bit(i, common->keymap) ||
 710                              test_bit(i + 32, common->keymap) ||
 711                              test_bit(i + 64, common->keymap)))
 712                                 return i + 64 + 32;
 713                 }
 714         } else {
 715                 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
 716                         if (!test_bit(i, common->keymap) &&
 717                             test_bit(i + 64, common->keymap))
 718                                 return i;
 719                         if (test_bit(i, common->keymap) &&
 720                             !test_bit(i + 64, common->keymap))
 721                                 return i + 64;
 722                 }
 723         }
 724
 725         /* No partially used TKIP slots, pick any available slot */
 726         for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) {
 727                 /* Do not allow slots that could be needed for TKIP group keys
 728                  * to be used. This limitation could be removed if we know that
 729                  * TKIP will not be used. */
 730                 if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
 731                         continue;
 732                 if (common->splitmic) {
 733                         if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
 734                                 continue;
 735                         if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
 736                                 continue;
 737                 }
 738
 739                 if (!test_bit(i, common->keymap))
 740                         return i; /* Found a free slot for a key */
 741         }
 742
 743         /* No free slot found */
 744         return -1;
 745 }
 746
 747 static int ath_key_config(struct ath_common *common,
 748                           struct ieee80211_vif *vif,
 749                           struct ieee80211_sta *sta,
 750                           struct ieee80211_key_conf *key)
 751 {
 752         struct ath_hw *ah = common->ah;
 753         struct ath9k_keyval hk;
 754         const u8 *mac = NULL;
 755         u8 gmac[ETH_ALEN];
 756         int ret = 0;
 757         int idx;
 758
 759         memset(&hk, 0, sizeof(hk));
 760
 761         switch (key->alg) {
 762         case ALG_WEP:
 763                 hk.kv_type = ATH9K_CIPHER_WEP;
 764                 break;
 765         case ALG_TKIP:
 766                 hk.kv_type = ATH9K_CIPHER_TKIP;
 767                 break;
 768         case ALG_CCMP:
 769                 hk.kv_type = ATH9K_CIPHER_AES_CCM;
 770                 break;
 771         default:
 772                 return -EOPNOTSUPP;
 773         }
 774
 775         hk.kv_len = key->keylen;
 776         memcpy(hk.kv_val, key->key, key->keylen);
 777
 778         if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
 779
 780                 if (key->ap_addr) {
 781                         /*
 782                          * Group keys on hardware that supports multicast frame
 783                          * key search use a mac that is the sender's address with
 784                          * the high bit set instead of the app-specified address.
 785                          */
 786                         memcpy(gmac, key->ap_addr, ETH_ALEN);
 787                         gmac[0] |= 0x80;
 788                         mac = gmac;
 789
 790                         if (key->alg == ALG_TKIP)
 791                                 idx = ath_reserve_key_cache_slot_tkip(common);
 792                         else
 793                                 idx = ath_reserve_key_cache_slot(common);
 794                         if (idx < 0)
 795                                 mac = NULL; /* no free key cache entries */
 796                 }
 797
 798                 if (!mac) {
 799                         /* For now, use the default keys for broadcast keys. This may
 800                          * need to change with virtual interfaces. */
 801                         idx = key->keyidx;
 802                 }
 803         } else if (key->keyidx) {
 804                 if (WARN_ON(!sta))
 805                         return -EOPNOTSUPP;
 806                 mac = sta->addr;
 807
 808                 if (vif->type != NL80211_IFTYPE_AP) {
 809                         /* Only keyidx 0 should be used with unicast key, but
 810                          * allow this for client mode for now. */
 811                         idx = key->keyidx;
 812                 } else
 813                         return -EIO;
 814         } else {
 815                 if (WARN_ON(!sta))
 816                         return -EOPNOTSUPP;
 817                 mac = sta->addr;
 818
 819                 if (key->alg == ALG_TKIP)
 820                         idx = ath_reserve_key_cache_slot_tkip(common);
 821                 else
 822                         idx = ath_reserve_key_cache_slot(common);
 823                 if (idx < 0)
 824                         return -ENOSPC; /* no free key cache entries */
 825         }
 826
 827         if (key->alg == ALG_TKIP)
 828                 ret = ath_setkey_tkip(common, idx, key->key, &hk, mac,
 829                                       vif->type == NL80211_IFTYPE_AP);
 830         else
 831                 ret = ath9k_hw_set_keycache_entry(ah, idx, &hk, mac);
 832
 833         if (!ret)
 834                 return -EIO;
 835
 836         set_bit(idx, common->keymap);
 837         if (key->alg == ALG_TKIP) {
 838                 set_bit(idx + 64, common->keymap);
 839                 if (common->splitmic) {
 840                         set_bit(idx + 32, common->keymap);
 841                         set_bit(idx + 64 + 32, common->keymap);
 842                 }
 843         }
 844
 845         return idx;
 846 }
 847
 848 static void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key)
 849 {
 850         struct ath_hw *ah = common->ah;
 851
 852         ath9k_hw_keyreset(ah, key->hw_key_idx);
 853         if (key->hw_key_idx < IEEE80211_WEP_NKID)
 854                 return;
 855
 856         clear_bit(key->hw_key_idx, common->keymap);
 857         if (key->alg != ALG_TKIP)
 858                 return;
 859
 860         clear_bit(key->hw_key_idx + 64, common->keymap);
 861         if (common->splitmic) {
 862                 ath9k_hw_keyreset(ah, key->hw_key_idx + 32);
 863                 clear_bit(key->hw_key_idx + 32, common->keymap);
 864                 clear_bit(key->hw_key_idx + 64 + 32, common->keymap);
 865         }
 866 }
 867
 868 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 869                                  struct ieee80211_vif *vif,
 870                                  struct ieee80211_bss_conf *bss_conf)
 871 {
 872         struct ath_hw *ah = sc->sc_ah;
 873         struct ath_common *common = ath9k_hw_common(ah);
 874
 875         if (bss_conf->assoc) {
 876                 ath_print(common, ATH_DBG_CONFIG,
 877                           "Bss Info ASSOC %d, bssid: %pM\n",
 878                            bss_conf->aid, common->curbssid);
 879
 880                 /* New association, store aid */
 881                 common->curaid = bss_conf->aid;
 882                 ath9k_hw_write_associd(ah);
 883
 884                 /*
 885                  * Request a re-configuration of Beacon related timers
 886                  * on the receipt of the first Beacon frame (i.e.,
 887                  * after time sync with the AP).
 888                  */
 889                 sc->ps_flags |= PS_BEACON_SYNC;
 890
 891                 /* Configure the beacon */
 892                 ath_beacon_config(sc, vif);
 893
 894                 /* Reset rssi stats */
 895                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 896
 897                 ath_start_ani(common);
 898         } else {
 899                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 900                 common->curaid = 0;
 901                 /* Stop ANI */
 902                 del_timer_sync(&common->ani.timer);
 903         }
 904 }
 905
 906 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 907 {
 908         struct ath_hw *ah = sc->sc_ah;
 909         struct ath_common *common = ath9k_hw_common(ah);
 910         struct ieee80211_channel *channel = hw->conf.channel;
 911         int r;
 912
 913         ath9k_ps_wakeup(sc);
 914         ath9k_hw_configpcipowersave(ah, 0, 0);
 915
 916         if (!ah->curchan)
 917                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 918
 919         spin_lock_bh(&sc->sc_resetlock);
 920         r = ath9k_hw_reset(ah, ah->curchan, false);
 921         if (r) {
 922                 ath_print(common, ATH_DBG_FATAL,
 923                           "Unable to reset channel (%u MHz), "
 924                           "reset status %d\n",
 925                           channel->center_freq, r);
 926         }
 927         spin_unlock_bh(&sc->sc_resetlock);
 928
 929         ath_update_txpow(sc);
 930         if (ath_startrecv(sc) != 0) {
 931                 ath_print(common, ATH_DBG_FATAL,
 932                           "Unable to restart recv logic\n");
 933                 return;
 934         }
 935
 936         if (sc->sc_flags & SC_OP_BEACONS)
 937                 ath_beacon_config(sc, NULL);    /* restart beacons */
 938
 939         /* Re-Enable  interrupts */
 940         ath9k_hw_set_interrupts(ah, ah->imask);
 941
 942         /* Enable LED */
 943         ath9k_hw_cfg_output(ah, ah->led_pin,
 944                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 945         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 946
 947         ieee80211_wake_queues(hw);
 948         ath9k_ps_restore(sc);
 949 }
 950
 951 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 952 {
 953         struct ath_hw *ah = sc->sc_ah;
 954         struct ieee80211_channel *channel = hw->conf.channel;
 955         int r;
 956
 957         ath9k_ps_wakeup(sc);
 958         ieee80211_stop_queues(hw);
 959
 960         /* Disable LED */
 961         ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 962         ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 963
 964         /* Disable interrupts */
 965         ath9k_hw_set_interrupts(ah, 0);
 966
 967         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 968         ath_stoprecv(sc);               /* turn off frame recv */
 969         ath_flushrecv(sc);              /* flush recv queue */
 970
 971         if (!ah->curchan)
 972                 ah->curchan = ath_get_curchannel(sc, hw);
 973
 974         spin_lock_bh(&sc->sc_resetlock);
 975         r = ath9k_hw_reset(ah, ah->curchan, false);
 976         if (r) {
 977                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 978                           "Unable to reset channel (%u MHz), "
 979                           "reset status %d\n",
 980                           channel->center_freq, r);
 981         }
 982         spin_unlock_bh(&sc->sc_resetlock);
 983
 984         ath9k_hw_phy_disable(ah);
 985         ath9k_hw_configpcipowersave(ah, 1, 1);
 986         ath9k_ps_restore(sc);
 987         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 988 }
 989
 990 int ath_reset(struct ath_softc *sc, bool retry_tx)
 991 {
 992         struct ath_hw *ah = sc->sc_ah;
 993         struct ath_common *common = ath9k_hw_common(ah);
 994         struct ieee80211_hw *hw = sc->hw;
 995         int r;
 996
 997         /* Stop ANI */
 998         del_timer_sync(&common->ani.timer);
 999
1000         ieee80211_stop_queues(hw);
1001
1002         ath9k_hw_set_interrupts(ah, 0);
1003         ath_drain_all_txq(sc, retry_tx);
1004         ath_stoprecv(sc);
1005         ath_flushrecv(sc);
1006
1007         spin_lock_bh(&sc->sc_resetlock);
1008         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
1009         if (r)
1010                 ath_print(common, ATH_DBG_FATAL,
1011                           "Unable to reset hardware; reset status %d\n", r);
1012         spin_unlock_bh(&sc->sc_resetlock);
1013
1014         if (ath_startrecv(sc) != 0)
1015                 ath_print(common, ATH_DBG_FATAL,
1016                           "Unable to start recv logic\n");
1017
1018         /*
1019          * We may be doing a reset in response to a request
1020          * that changes the channel so update any state that
1021          * might change as a result.
1022          */
1023         ath_cache_conf_rate(sc, &hw->conf);
1024
1025         ath_update_txpow(sc);
1026
1027         if (sc->sc_flags & SC_OP_BEACONS)
1028                 ath_beacon_config(sc, NULL);    /* restart beacons */
1029
1030         ath9k_hw_set_interrupts(ah, ah->imask);
1031
1032         if (retry_tx) {
1033                 int i;
1034                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1035                         if (ATH_TXQ_SETUP(sc, i)) {
1036                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1037                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1038                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1039                         }
1040                 }
1041         }
1042
1043         ieee80211_wake_queues(hw);
1044
1045         /* Start ANI */
1046         ath_start_ani(common);
1047
1048         return r;
1049 }
1050
1051 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1052 {
1053         int qnum;
1054
1055         switch (queue) {
1056         case 0:
1057                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VO];
1058                 break;
1059         case 1:
1060                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VI];
1061                 break;
1062         case 2:
1063                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1064                 break;
1065         case 3:
1066                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BK];
1067                 break;
1068         default:
1069                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1070                 break;
1071         }
1072
1073         return qnum;
1074 }
1075
1076 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1077 {
1078         int qnum;
1079
1080         switch (queue) {
1081         case ATH9K_WME_AC_VO:
1082                 qnum = 0;
1083                 break;
1084         case ATH9K_WME_AC_VI:
1085                 qnum = 1;
1086                 break;
1087         case ATH9K_WME_AC_BE:
1088                 qnum = 2;
1089                 break;
1090         case ATH9K_WME_AC_BK:
1091                 qnum = 3;
1092                 break;
1093         default:
1094                 qnum = -1;
1095                 break;
1096         }
1097
1098         return qnum;
1099 }
1100
1101 /* XXX: Remove me once we don't depend on ath9k_channel for all
1102  * this redundant data */
1103 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1104                            struct ath9k_channel *ichan)
1105 {
1106         struct ieee80211_channel *chan = hw->conf.channel;
1107         struct ieee80211_conf *conf = &hw->conf;
1108
1109         ichan->channel = chan->center_freq;
1110         ichan->chan = chan;
1111
1112         if (chan->band == IEEE80211_BAND_2GHZ) {
1113                 ichan->chanmode = CHANNEL_G;
1114                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1115         } else {
1116                 ichan->chanmode = CHANNEL_A;
1117                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1118         }
1119
1120         if (conf_is_ht(conf))
1121                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1122                                             conf->channel_type);
1123 }
1124
1125 /**********************/
1126 /* mac80211 callbacks */
1127 /**********************/
1128
1129 static int ath9k_start(struct ieee80211_hw *hw)
1130 {
1131         struct ath_wiphy *aphy = hw->priv;
1132         struct ath_softc *sc = aphy->sc;
1133         struct ath_hw *ah = sc->sc_ah;
1134         struct ath_common *common = ath9k_hw_common(ah);
1135         struct ieee80211_channel *curchan = hw->conf.channel;
1136         struct ath9k_channel *init_channel;
1137         int r;
1138
1139         ath_print(common, ATH_DBG_CONFIG,
1140                   "Starting driver with initial channel: %d MHz\n",
1141                   curchan->center_freq);
1142
1143         mutex_lock(&sc->mutex);
1144
1145         if (ath9k_wiphy_started(sc)) {
1146                 if (sc->chan_idx == curchan->hw_value) {
1147                         /*
1148                          * Already on the operational channel, the new wiphy
1149                          * can be marked active.
1150                          */
1151                         aphy->state = ATH_WIPHY_ACTIVE;
1152                         ieee80211_wake_queues(hw);
1153                 } else {
1154                         /*
1155                          * Another wiphy is on another channel, start the new
1156                          * wiphy in paused state.
1157                          */
1158                         aphy->state = ATH_WIPHY_PAUSED;
1159                         ieee80211_stop_queues(hw);
1160                 }
1161                 mutex_unlock(&sc->mutex);
1162                 return 0;
1163         }
1164         aphy->state = ATH_WIPHY_ACTIVE;
1165
1166         /* setup initial channel */
1167
1168         sc->chan_idx = curchan->hw_value;
1169
1170         init_channel = ath_get_curchannel(sc, hw);
1171
1172         /* Reset SERDES registers */
1173         ath9k_hw_configpcipowersave(ah, 0, 0);
1174
1175         /*
1176          * The basic interface to setting the hardware in a good
1177          * state is ``reset''.  On return the hardware is known to
1178          * be powered up and with interrupts disabled.  This must
1179          * be followed by initialization of the appropriate bits
1180          * and then setup of the interrupt mask.
1181          */
1182         spin_lock_bh(&sc->sc_resetlock);
1183         r = ath9k_hw_reset(ah, init_channel, false);
1184         if (r) {
1185                 ath_print(common, ATH_DBG_FATAL,
1186                           "Unable to reset hardware; reset status %d "
1187                           "(freq %u MHz)\n", r,
1188                           curchan->center_freq);
1189                 spin_unlock_bh(&sc->sc_resetlock);
1190                 goto mutex_unlock;
1191         }
1192         spin_unlock_bh(&sc->sc_resetlock);
1193
1194         /*
1195          * This is needed only to setup initial state
1196          * but it's best done after a reset.
1197          */
1198         ath_update_txpow(sc);
1199
1200         /*
1201          * Setup the hardware after reset:
1202          * The receive engine is set going.
1203          * Frame transmit is handled entirely
1204          * in the frame output path; there's nothing to do
1205          * here except setup the interrupt mask.
1206          */
1207         if (ath_startrecv(sc) != 0) {
1208                 ath_print(common, ATH_DBG_FATAL,
1209                           "Unable to start recv logic\n");
1210                 r = -EIO;
1211                 goto mutex_unlock;
1212         }
1213
1214         /* Setup our intr mask. */
1215         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1216                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1217                     ATH9K_INT_GLOBAL;
1218
1219         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1220                 ah->imask |= ATH9K_INT_RXHP | ATH9K_INT_RXLP;
1221         else
1222                 ah->imask |= ATH9K_INT_RX;
1223
1224         if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1225                 ah->imask |= ATH9K_INT_GTT;
1226
1227         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1228                 ah->imask |= ATH9K_INT_CST;
1229
1230         ath_cache_conf_rate(sc, &hw->conf);
1231
1232         sc->sc_flags &= ~SC_OP_INVALID;
1233
1234         /* Disable BMISS interrupt when we're not associated */
1235         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1236         ath9k_hw_set_interrupts(ah, ah->imask);
1237
1238         ieee80211_wake_queues(hw);
1239
1240         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1241
1242         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1243             !ah->btcoex_hw.enabled) {
1244                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1245                                            AR_STOMP_LOW_WLAN_WGHT);
1246                 ath9k_hw_btcoex_enable(ah);
1247
1248                 if (common->bus_ops->bt_coex_prep)
1249                         common->bus_ops->bt_coex_prep(common);
1250                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1251                         ath9k_btcoex_timer_resume(sc);
1252         }
1253
1254 mutex_unlock:
1255         mutex_unlock(&sc->mutex);
1256
1257         return r;
1258 }
1259
1260 static int ath9k_tx(struct ieee80211_hw *hw,
1261                     struct sk_buff *skb)
1262 {
1263         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1264         struct ath_wiphy *aphy = hw->priv;
1265         struct ath_softc *sc = aphy->sc;
1266         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1267         struct ath_tx_control txctl;
1268         int padpos, padsize;
1269         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1270
1271         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1272                 ath_print(common, ATH_DBG_XMIT,
1273                           "ath9k: %s: TX in unexpected wiphy state "
1274                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1275                 goto exit;
1276         }
1277
1278         if (sc->ps_enabled) {
1279                 /*
1280                  * mac80211 does not set PM field for normal data frames, so we
1281                  * need to update that based on the current PS mode.
1282                  */
1283                 if (ieee80211_is_data(hdr->frame_control) &&
1284                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1285                     !ieee80211_has_pm(hdr->frame_control)) {
1286                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1287                                   "while in PS mode\n");
1288                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1289                 }
1290         }
1291
1292         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1293                 /*
1294                  * We are using PS-Poll and mac80211 can request TX while in
1295                  * power save mode. Need to wake up hardware for the TX to be
1296                  * completed and if needed, also for RX of buffered frames.
1297                  */
1298                 ath9k_ps_wakeup(sc);
1299                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1300                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1301                         ath_print(common, ATH_DBG_PS,
1302                                   "Sending PS-Poll to pick a buffered frame\n");
1303                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1304                 } else {
1305                         ath_print(common, ATH_DBG_PS,
1306                                   "Wake up to complete TX\n");
1307                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1308                 }
1309                 /*
1310                  * The actual restore operation will happen only after
1311                  * the sc_flags bit is cleared. We are just dropping
1312                  * the ps_usecount here.
1313                  */
1314                 ath9k_ps_restore(sc);
1315         }
1316
1317         memset(&txctl, 0, sizeof(struct ath_tx_control));
1318
1319         /*
1320          * As a temporary workaround, assign seq# here; this will likely need
1321          * to be cleaned up to work better with Beacon transmission and virtual
1322          * BSSes.
1323          */
1324         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1325                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1326                         sc->tx.seq_no += 0x10;
1327                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1328                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1329         }
1330
1331         /* Add the padding after the header if this is not already done */
1332         padpos = ath9k_cmn_padpos(hdr->frame_control);
1333         padsize = padpos & 3;
1334         if (padsize && skb->len>padpos) {
1335                 if (skb_headroom(skb) < padsize)
1336                         return -1;
1337                 skb_push(skb, padsize);
1338                 memmove(skb->data, skb->data + padsize, padpos);
1339         }
1340
1341         /* Check if a tx queue is available */
1342
1343         txctl.txq = ath_test_get_txq(sc, skb);
1344         if (!txctl.txq)
1345                 goto exit;
1346
1347         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1348
1349         if (ath_tx_start(hw, skb, &txctl) != 0) {
1350                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1351                 goto exit;
1352         }
1353
1354         return 0;
1355 exit:
1356         dev_kfree_skb_any(skb);
1357         return 0;
1358 }
1359
1360 static void ath9k_stop(struct ieee80211_hw *hw)
1361 {
1362         struct ath_wiphy *aphy = hw->priv;
1363         struct ath_softc *sc = aphy->sc;
1364         struct ath_hw *ah = sc->sc_ah;
1365         struct ath_common *common = ath9k_hw_common(ah);
1366
1367         mutex_lock(&sc->mutex);
1368
1369         aphy->state = ATH_WIPHY_INACTIVE;
1370
1371         cancel_delayed_work_sync(&sc->ath_led_blink_work);
1372         cancel_delayed_work_sync(&sc->tx_complete_work);
1373
1374         if (!sc->num_sec_wiphy) {
1375                 cancel_delayed_work_sync(&sc->wiphy_work);
1376                 cancel_work_sync(&sc->chan_work);
1377         }
1378
1379         if (sc->sc_flags & SC_OP_INVALID) {
1380                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1381                 mutex_unlock(&sc->mutex);
1382                 return;
1383         }
1384
1385         if (ath9k_wiphy_started(sc)) {
1386                 mutex_unlock(&sc->mutex);
1387                 return; /* another wiphy still in use */
1388         }
1389
1390         /* Ensure HW is awake when we try to shut it down. */
1391         ath9k_ps_wakeup(sc);
1392
1393         if (ah->btcoex_hw.enabled) {
1394                 ath9k_hw_btcoex_disable(ah);
1395                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1396                         ath9k_btcoex_timer_pause(sc);
1397         }
1398
1399         /* make sure h/w will not generate any interrupt
1400          * before setting the invalid flag. */
1401         ath9k_hw_set_interrupts(ah, 0);
1402
1403         if (!(sc->sc_flags & SC_OP_INVALID)) {
1404                 ath_drain_all_txq(sc, false);
1405                 ath_stoprecv(sc);
1406                 ath9k_hw_phy_disable(ah);
1407         } else
1408                 sc->rx.rxlink = NULL;
1409
1410         /* disable HAL and put h/w to sleep */
1411         ath9k_hw_disable(ah);
1412         ath9k_hw_configpcipowersave(ah, 1, 1);
1413         ath9k_ps_restore(sc);
1414
1415         /* Finally, put the chip in FULL SLEEP mode */
1416         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1417
1418         sc->sc_flags |= SC_OP_INVALID;
1419
1420         mutex_unlock(&sc->mutex);
1421
1422         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1423 }
1424
1425 static int ath9k_add_interface(struct ieee80211_hw *hw,
1426                                struct ieee80211_vif *vif)
1427 {
1428         struct ath_wiphy *aphy = hw->priv;
1429         struct ath_softc *sc = aphy->sc;
1430         struct ath_hw *ah = sc->sc_ah;
1431         struct ath_common *common = ath9k_hw_common(ah);
1432         struct ath_vif *avp = (void *)vif->drv_priv;
1433         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1434         int ret = 0;
1435
1436         mutex_lock(&sc->mutex);
1437
1438         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1439             sc->nvifs > 0) {
1440                 ret = -ENOBUFS;
1441                 goto out;
1442         }
1443
1444         switch (vif->type) {
1445         case NL80211_IFTYPE_STATION:
1446                 ic_opmode = NL80211_IFTYPE_STATION;
1447                 break;
1448         case NL80211_IFTYPE_ADHOC:
1449         case NL80211_IFTYPE_AP:
1450         case NL80211_IFTYPE_MESH_POINT:
1451                 if (sc->nbcnvifs >= ATH_BCBUF) {
1452                         ret = -ENOBUFS;
1453                         goto out;
1454                 }
1455                 ic_opmode = vif->type;
1456                 break;
1457         default:
1458                 ath_print(common, ATH_DBG_FATAL,
1459                         "Interface type %d not yet supported\n", vif->type);
1460                 ret = -EOPNOTSUPP;
1461                 goto out;
1462         }
1463
1464         ath_print(common, ATH_DBG_CONFIG,
1465                   "Attach a VIF of type: %d\n", ic_opmode);
1466
1467         /* Set the VIF opmode */
1468         avp->av_opmode = ic_opmode;
1469         avp->av_bslot = -1;
1470
1471         sc->nvifs++;
1472
1473         if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1474                 ath9k_set_bssid_mask(hw);
1475
1476         if (sc->nvifs > 1)
1477                 goto out; /* skip global settings for secondary vif */
1478
1479         if (ic_opmode == NL80211_IFTYPE_AP) {
1480                 ath9k_hw_set_tsfadjust(ah, 1);
1481                 sc->sc_flags |= SC_OP_TSF_RESET;
1482         }
1483
1484         /* Set the device opmode */
1485         ah->opmode = ic_opmode;
1486
1487         /*
1488          * Enable MIB interrupts when there are hardware phy counters.
1489          * Note we only do this (at the moment) for station mode.
1490          */
1491         if ((vif->type == NL80211_IFTYPE_STATION) ||
1492             (vif->type == NL80211_IFTYPE_ADHOC) ||
1493             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1494                 if (ah->config.enable_ani)
1495                         ah->imask |= ATH9K_INT_MIB;
1496                 ah->imask |= ATH9K_INT_TSFOOR;
1497         }
1498
1499         ath9k_hw_set_interrupts(ah, ah->imask);
1500
1501         if (vif->type == NL80211_IFTYPE_AP    ||
1502             vif->type == NL80211_IFTYPE_ADHOC ||
1503             vif->type == NL80211_IFTYPE_MONITOR)
1504                 ath_start_ani(common);
1505
1506 out:
1507         mutex_unlock(&sc->mutex);
1508         return ret;
1509 }
1510
1511 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1512                                    struct ieee80211_vif *vif)
1513 {
1514         struct ath_wiphy *aphy = hw->priv;
1515         struct ath_softc *sc = aphy->sc;
1516         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1517         struct ath_vif *avp = (void *)vif->drv_priv;
1518         int i;
1519
1520         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1521
1522         mutex_lock(&sc->mutex);
1523
1524         /* Stop ANI */
1525         del_timer_sync(&common->ani.timer);
1526
1527         /* Reclaim beacon resources */
1528         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1529             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1530             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1531                 ath9k_ps_wakeup(sc);
1532                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1533                 ath9k_ps_restore(sc);
1534         }
1535
1536         ath_beacon_return(sc, avp);
1537         sc->sc_flags &= ~SC_OP_BEACONS;
1538
1539         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1540                 if (sc->beacon.bslot[i] == vif) {
1541                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1542                                "slot\n", __func__);
1543                         sc->beacon.bslot[i] = NULL;
1544                         sc->beacon.bslot_aphy[i] = NULL;
1545                 }
1546         }
1547
1548         sc->nvifs--;
1549
1550         mutex_unlock(&sc->mutex);
1551 }
1552
1553 void ath9k_enable_ps(struct ath_softc *sc)
1554 {
1555         struct ath_hw *ah = sc->sc_ah;
1556
1557         sc->ps_enabled = true;
1558         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1559                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1560                         ah->imask |= ATH9K_INT_TIM_TIMER;
1561                         ath9k_hw_set_interrupts(ah, ah->imask);
1562                 }
1563         }
1564         ath9k_hw_setrxabort(ah, 1);
1565 }
1566
1567 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1568 {
1569         struct ath_wiphy *aphy = hw->priv;
1570         struct ath_softc *sc = aphy->sc;
1571         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1572         struct ieee80211_conf *conf = &hw->conf;
1573         struct ath_hw *ah = sc->sc_ah;
1574         bool disable_radio;
1575
1576         mutex_lock(&sc->mutex);
1577
1578         /*
1579          * Leave this as the first check because we need to turn on the
1580          * radio if it was disabled before prior to processing the rest
1581          * of the changes. Likewise we must only disable the radio towards
1582          * the end.
1583          */
1584         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1585                 bool enable_radio;
1586                 bool all_wiphys_idle;
1587                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1588
1589                 spin_lock_bh(&sc->wiphy_lock);
1590                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1591                 ath9k_set_wiphy_idle(aphy, idle);
1592
1593                 enable_radio = (!idle && all_wiphys_idle);
1594
1595                 /*
1596                  * After we unlock here its possible another wiphy
1597                  * can be re-renabled so to account for that we will
1598                  * only disable the radio toward the end of this routine
1599                  * if by then all wiphys are still idle.
1600                  */
1601                 spin_unlock_bh(&sc->wiphy_lock);
1602
1603                 if (enable_radio) {
1604                         sc->ps_idle = false;
1605                         ath_radio_enable(sc, hw);
1606                         ath_print(common, ATH_DBG_CONFIG,
1607                                   "not-idle: enabling radio\n");
1608                 }
1609         }
1610
1611         /*
1612          * We just prepare to enable PS. We have to wait until our AP has
1613          * ACK'd our null data frame to disable RX otherwise we'll ignore
1614          * those ACKs and end up retransmitting the same null data frames.
1615          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1616          */
1617         if (changed & IEEE80211_CONF_CHANGE_PS) {
1618                 if (conf->flags & IEEE80211_CONF_PS) {
1619                         sc->ps_flags |= PS_ENABLED;
1620                         /*
1621                          * At this point we know hardware has received an ACK
1622                          * of a previously sent null data frame.
1623                          */
1624                         if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1625                                 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1626                                 ath9k_enable_ps(sc);
1627                         }
1628                 } else {
1629                         sc->ps_enabled = false;
1630                         sc->ps_flags &= ~(PS_ENABLED |
1631                                           PS_NULLFUNC_COMPLETED);
1632                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
1633                         if (!(ah->caps.hw_caps &
1634                               ATH9K_HW_CAP_AUTOSLEEP)) {
1635                                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1636                                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1637                                                   PS_WAIT_FOR_CAB |
1638                                                   PS_WAIT_FOR_PSPOLL_DATA |
1639                                                   PS_WAIT_FOR_TX_ACK);
1640                                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1641                                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1642                                         ath9k_hw_set_interrupts(sc->sc_ah,
1643                                                         ah->imask);
1644                                 }
1645                         }
1646                 }
1647         }
1648
1649         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1650                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1651                         ath_print(common, ATH_DBG_CONFIG,
1652                                   "HW opmode set to Monitor mode\n");
1653                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1654                 }
1655         }
1656
1657         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1658                 struct ieee80211_channel *curchan = hw->conf.channel;
1659                 int pos = curchan->hw_value;
1660
1661                 aphy->chan_idx = pos;
1662                 aphy->chan_is_ht = conf_is_ht(conf);
1663
1664                 if (aphy->state == ATH_WIPHY_SCAN ||
1665                     aphy->state == ATH_WIPHY_ACTIVE)
1666                         ath9k_wiphy_pause_all_forced(sc, aphy);
1667                 else {
1668                         /*
1669                          * Do not change operational channel based on a paused
1670                          * wiphy changes.
1671                          */
1672                         goto skip_chan_change;
1673                 }
1674
1675                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1676                           curchan->center_freq);
1677
1678                 /* XXX: remove me eventualy */
1679                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1680
1681                 ath_update_chainmask(sc, conf_is_ht(conf));
1682
1683                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1684                         ath_print(common, ATH_DBG_FATAL,
1685                                   "Unable to set channel\n");
1686                         mutex_unlock(&sc->mutex);
1687                         return -EINVAL;
1688                 }
1689         }
1690
1691 skip_chan_change:
1692         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1693                 sc->config.txpowlimit = 2 * conf->power_level;
1694                 ath_update_txpow(sc);
1695         }
1696
1697         spin_lock_bh(&sc->wiphy_lock);
1698         disable_radio = ath9k_all_wiphys_idle(sc);
1699         spin_unlock_bh(&sc->wiphy_lock);
1700
1701         if (disable_radio) {
1702                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1703                 sc->ps_idle = true;
1704                 ath_radio_disable(sc, hw);
1705         }
1706
1707         mutex_unlock(&sc->mutex);
1708
1709         return 0;
1710 }
1711
1712 #define SUPPORTED_FILTERS                       \
1713         (FIF_PROMISC_IN_BSS |                   \
1714         FIF_ALLMULTI |                          \
1715         FIF_CONTROL |                           \
1716         FIF_PSPOLL |                            \
1717         FIF_OTHER_BSS |                         \
1718         FIF_BCN_PRBRESP_PROMISC |               \
1719         FIF_FCSFAIL)
1720
1721 /* FIXME: sc->sc_full_reset ? */
1722 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1723                                    unsigned int changed_flags,
1724                                    unsigned int *total_flags,
1725                                    u64 multicast)
1726 {
1727         struct ath_wiphy *aphy = hw->priv;
1728         struct ath_softc *sc = aphy->sc;
1729         u32 rfilt;
1730
1731         changed_flags &= SUPPORTED_FILTERS;
1732         *total_flags &= SUPPORTED_FILTERS;
1733
1734         sc->rx.rxfilter = *total_flags;
1735         ath9k_ps_wakeup(sc);
1736         rfilt = ath_calcrxfilter(sc);
1737         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1738         ath9k_ps_restore(sc);
1739
1740         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1741                   "Set HW RX filter: 0x%x\n", rfilt);
1742 }
1743
1744 static int ath9k_sta_add(struct ieee80211_hw *hw,
1745                          struct ieee80211_vif *vif,
1746                          struct ieee80211_sta *sta)
1747 {
1748         struct ath_wiphy *aphy = hw->priv;
1749         struct ath_softc *sc = aphy->sc;
1750
1751         ath_node_attach(sc, sta);
1752
1753         return 0;
1754 }
1755
1756 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1757                             struct ieee80211_vif *vif,
1758                             struct ieee80211_sta *sta)
1759 {
1760         struct ath_wiphy *aphy = hw->priv;
1761         struct ath_softc *sc = aphy->sc;
1762
1763         ath_node_detach(sc, sta);
1764
1765         return 0;
1766 }
1767
1768 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1769                          const struct ieee80211_tx_queue_params *params)
1770 {
1771         struct ath_wiphy *aphy = hw->priv;
1772         struct ath_softc *sc = aphy->sc;
1773         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1774         struct ath9k_tx_queue_info qi;
1775         int ret = 0, qnum;
1776
1777         if (queue >= WME_NUM_AC)
1778                 return 0;
1779
1780         mutex_lock(&sc->mutex);
1781
1782         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1783
1784         qi.tqi_aifs = params->aifs;
1785         qi.tqi_cwmin = params->cw_min;
1786         qi.tqi_cwmax = params->cw_max;
1787         qi.tqi_burstTime = params->txop;
1788         qnum = ath_get_hal_qnum(queue, sc);
1789
1790         ath_print(common, ATH_DBG_CONFIG,
1791                   "Configure tx [queue/halq] [%d/%d],  "
1792                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1793                   queue, qnum, params->aifs, params->cw_min,
1794                   params->cw_max, params->txop);
1795
1796         ret = ath_txq_update(sc, qnum, &qi);
1797         if (ret)
1798                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1799
1800         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1801                 if ((qnum == sc->tx.hwq_map[ATH9K_WME_AC_BE]) && !ret)
1802                         ath_beaconq_config(sc);
1803
1804         mutex_unlock(&sc->mutex);
1805
1806         return ret;
1807 }
1808
1809 static int ath9k_set_key(struct ieee80211_hw *hw,
1810                          enum set_key_cmd cmd,
1811                          struct ieee80211_vif *vif,
1812                          struct ieee80211_sta *sta,
1813                          struct ieee80211_key_conf *key)
1814 {
1815         struct ath_wiphy *aphy = hw->priv;
1816         struct ath_softc *sc = aphy->sc;
1817         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1818         int ret = 0;
1819
1820         if (modparam_nohwcrypt)
1821                 return -ENOSPC;
1822
1823         mutex_lock(&sc->mutex);
1824         ath9k_ps_wakeup(sc);
1825         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1826
1827         switch (cmd) {
1828         case SET_KEY:
1829                 ret = ath_key_config(common, vif, sta, key);
1830                 if (ret >= 0) {
1831                         key->hw_key_idx = ret;
1832                         /* push IV and Michael MIC generation to stack */
1833                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1834                         if (key->alg == ALG_TKIP)
1835                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1836                         if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1837                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1838                         ret = 0;
1839                 }
1840                 break;
1841         case DISABLE_KEY:
1842                 ath_key_delete(common, key);
1843                 break;
1844         default:
1845                 ret = -EINVAL;
1846         }
1847
1848         ath9k_ps_restore(sc);
1849         mutex_unlock(&sc->mutex);
1850
1851         return ret;
1852 }
1853
1854 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1855                                    struct ieee80211_vif *vif,
1856                                    struct ieee80211_bss_conf *bss_conf,
1857                                    u32 changed)
1858 {
1859         struct ath_wiphy *aphy = hw->priv;
1860         struct ath_softc *sc = aphy->sc;
1861         struct ath_hw *ah = sc->sc_ah;
1862         struct ath_common *common = ath9k_hw_common(ah);
1863         struct ath_vif *avp = (void *)vif->drv_priv;
1864         int slottime;
1865         int error;
1866
1867         mutex_lock(&sc->mutex);
1868
1869         if (changed & BSS_CHANGED_BSSID) {
1870                 /* Set BSSID */
1871                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1872                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1873                 common->curaid = 0;
1874                 ath9k_hw_write_associd(ah);
1875
1876                 /* Set aggregation protection mode parameters */
1877                 sc->config.ath_aggr_prot = 0;
1878
1879                 /* Only legacy IBSS for now */
1880                 if (vif->type == NL80211_IFTYPE_ADHOC)
1881                         ath_update_chainmask(sc, 0);
1882
1883                 ath_print(common, ATH_DBG_CONFIG,
1884                           "BSSID: %pM aid: 0x%x\n",
1885                           common->curbssid, common->curaid);
1886
1887                 /* need to reconfigure the beacon */
1888                 sc->sc_flags &= ~SC_OP_BEACONS ;
1889         }
1890
1891         /* Enable transmission of beacons (AP, IBSS, MESH) */
1892         if ((changed & BSS_CHANGED_BEACON) ||
1893             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1894                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1895                 error = ath_beacon_alloc(aphy, vif);
1896                 if (!error)
1897                         ath_beacon_config(sc, vif);
1898         }
1899
1900         if (changed & BSS_CHANGED_ERP_SLOT) {
1901                 if (bss_conf->use_short_slot)
1902                         slottime = 9;
1903                 else
1904                         slottime = 20;
1905                 if (vif->type == NL80211_IFTYPE_AP) {
1906                         /*
1907                          * Defer update, so that connected stations can adjust
1908                          * their settings at the same time.
1909                          * See beacon.c for more details
1910                          */
1911                         sc->beacon.slottime = slottime;
1912                         sc->beacon.updateslot = UPDATE;
1913                 } else {
1914                         ah->slottime = slottime;
1915                         ath9k_hw_init_global_settings(ah);
1916                 }
1917         }
1918
1919         /* Disable transmission of beacons */
1920         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1921                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1922
1923         if (changed & BSS_CHANGED_BEACON_INT) {
1924                 sc->beacon_interval = bss_conf->beacon_int;
1925                 /*
1926                  * In case of AP mode, the HW TSF has to be reset
1927                  * when the beacon interval changes.
1928                  */
1929                 if (vif->type == NL80211_IFTYPE_AP) {
1930                         sc->sc_flags |= SC_OP_TSF_RESET;
1931                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1932                         error = ath_beacon_alloc(aphy, vif);
1933                         if (!error)
1934                                 ath_beacon_config(sc, vif);
1935                 } else {
1936                         ath_beacon_config(sc, vif);
1937                 }
1938         }
1939
1940         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1941                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1942                           bss_conf->use_short_preamble);
1943                 if (bss_conf->use_short_preamble)
1944                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1945                 else
1946                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1947         }
1948
1949         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1950                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1951                           bss_conf->use_cts_prot);
1952                 if (bss_conf->use_cts_prot &&
1953                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1954                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1955                 else
1956                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1957         }
1958
1959         if (changed & BSS_CHANGED_ASSOC) {
1960                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1961                         bss_conf->assoc);
1962                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1963         }
1964
1965         mutex_unlock(&sc->mutex);
1966 }
1967
1968 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1969 {
1970         u64 tsf;
1971         struct ath_wiphy *aphy = hw->priv;
1972         struct ath_softc *sc = aphy->sc;
1973
1974         mutex_lock(&sc->mutex);
1975         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1976         mutex_unlock(&sc->mutex);
1977
1978         return tsf;
1979 }
1980
1981 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1982 {
1983         struct ath_wiphy *aphy = hw->priv;
1984         struct ath_softc *sc = aphy->sc;
1985
1986         mutex_lock(&sc->mutex);
1987         ath9k_hw_settsf64(sc->sc_ah, tsf);
1988         mutex_unlock(&sc->mutex);
1989 }
1990
1991 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1992 {
1993         struct ath_wiphy *aphy = hw->priv;
1994         struct ath_softc *sc = aphy->sc;
1995
1996         mutex_lock(&sc->mutex);
1997
1998         ath9k_ps_wakeup(sc);
1999         ath9k_hw_reset_tsf(sc->sc_ah);
2000         ath9k_ps_restore(sc);
2001
2002         mutex_unlock(&sc->mutex);
2003 }
2004
2005 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2006                               struct ieee80211_vif *vif,
2007                               enum ieee80211_ampdu_mlme_action action,
2008                               struct ieee80211_sta *sta,
2009                               u16 tid, u16 *ssn)
2010 {
2011         struct ath_wiphy *aphy = hw->priv;
2012         struct ath_softc *sc = aphy->sc;
2013         int ret = 0;
2014
2015         switch (action) {
2016         case IEEE80211_AMPDU_RX_START:
2017                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2018                         ret = -ENOTSUPP;
2019                 break;
2020         case IEEE80211_AMPDU_RX_STOP:
2021                 break;
2022         case IEEE80211_AMPDU_TX_START:
2023                 ath9k_ps_wakeup(sc);
2024                 ath_tx_aggr_start(sc, sta, tid, ssn);
2025                 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2026                 ath9k_ps_restore(sc);
2027                 break;
2028         case IEEE80211_AMPDU_TX_STOP:
2029                 ath9k_ps_wakeup(sc);
2030                 ath_tx_aggr_stop(sc, sta, tid);
2031                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2032                 ath9k_ps_restore(sc);
2033                 break;
2034         case IEEE80211_AMPDU_TX_OPERATIONAL:
2035                 ath9k_ps_wakeup(sc);
2036                 ath_tx_aggr_resume(sc, sta, tid);
2037                 ath9k_ps_restore(sc);
2038                 break;
2039         default:
2040                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2041                           "Unknown AMPDU action\n");
2042         }
2043
2044         return ret;
2045 }
2046
2047 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2048                              struct survey_info *survey)
2049 {
2050         struct ath_wiphy *aphy = hw->priv;
2051         struct ath_softc *sc = aphy->sc;
2052         struct ath_hw *ah = sc->sc_ah;
2053         struct ath_common *common = ath9k_hw_common(ah);
2054         struct ieee80211_conf *conf = &hw->conf;
2055
2056          if (idx != 0)
2057                 return -ENOENT;
2058
2059         survey->channel = conf->channel;
2060         survey->filled = SURVEY_INFO_NOISE_DBM;
2061         survey->noise = common->ani.noise_floor;
2062
2063         return 0;
2064 }
2065
2066 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2067 {
2068         struct ath_wiphy *aphy = hw->priv;
2069         struct ath_softc *sc = aphy->sc;
2070         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2071
2072         mutex_lock(&sc->mutex);
2073         if (ath9k_wiphy_scanning(sc)) {
2074                 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
2075                        "same time\n");
2076                 /*
2077                  * Do not allow the concurrent scanning state for now. This
2078                  * could be improved with scanning control moved into ath9k.
2079                  */
2080                 mutex_unlock(&sc->mutex);
2081                 return;
2082         }
2083
2084         aphy->state = ATH_WIPHY_SCAN;
2085         ath9k_wiphy_pause_all_forced(sc, aphy);
2086         sc->sc_flags |= SC_OP_SCANNING;
2087         del_timer_sync(&common->ani.timer);
2088         cancel_delayed_work_sync(&sc->tx_complete_work);
2089         mutex_unlock(&sc->mutex);
2090 }
2091
2092 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2093 {
2094         struct ath_wiphy *aphy = hw->priv;
2095         struct ath_softc *sc = aphy->sc;
2096         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2097
2098         mutex_lock(&sc->mutex);
2099         aphy->state = ATH_WIPHY_ACTIVE;
2100         sc->sc_flags &= ~SC_OP_SCANNING;
2101         sc->sc_flags |= SC_OP_FULL_RESET;
2102         ath_start_ani(common);
2103         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2104         ath_beacon_config(sc, NULL);
2105         mutex_unlock(&sc->mutex);
2106 }
2107
2108 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2109 {
2110         struct ath_wiphy *aphy = hw->priv;
2111         struct ath_softc *sc = aphy->sc;
2112         struct ath_hw *ah = sc->sc_ah;
2113
2114         mutex_lock(&sc->mutex);
2115         ah->coverage_class = coverage_class;
2116         ath9k_hw_init_global_settings(ah);
2117         mutex_unlock(&sc->mutex);
2118 }
2119
2120 struct ieee80211_ops ath9k_ops = {
2121         .tx                 = ath9k_tx,
2122         .start              = ath9k_start,
2123         .stop               = ath9k_stop,
2124         .add_interface      = ath9k_add_interface,
2125         .remove_interface   = ath9k_remove_interface,
2126         .config             = ath9k_config,
2127         .configure_filter   = ath9k_configure_filter,
2128         .sta_add            = ath9k_sta_add,
2129         .sta_remove         = ath9k_sta_remove,
2130         .conf_tx            = ath9k_conf_tx,
2131         .bss_info_changed   = ath9k_bss_info_changed,
2132         .set_key            = ath9k_set_key,
2133         .get_tsf            = ath9k_get_tsf,
2134         .set_tsf            = ath9k_set_tsf,
2135         .reset_tsf          = ath9k_reset_tsf,
2136         .ampdu_action       = ath9k_ampdu_action,
2137         .get_survey         = ath9k_get_survey,
2138         .sw_scan_start      = ath9k_sw_scan_start,
2139         .sw_scan_complete   = ath9k_sw_scan_complete,
2140         .rfkill_poll        = ath9k_rfkill_poll_state,
2141         .set_coverage_class = ath9k_set_coverage_class,
2142 };