drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  68                                                 struct ieee80211_hw *hw)
  69 {
  70         struct ieee80211_channel *curchan = hw->conf.channel;
  71         struct ath9k_channel *channel;
  72         u8 chan_idx;
  73
  74         chan_idx = curchan->hw_value;
  75         channel = &sc->sc_ah->channels[chan_idx];
  76         ath9k_update_ichannel(sc, hw, channel);
  77         return channel;
  78 }
  79
  80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath9k_ps_wakeup(struct ath_softc *sc)
  93 {
  94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  95         unsigned long flags;
  96         enum ath9k_power_mode power_mode;
  97
  98         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  99         if (++sc->ps_usecount != 1)
 100                 goto unlock;
 101
 102         power_mode = sc->sc_ah->power_mode;
 103         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 104
 105         /*
 106          * While the hardware is asleep, the cycle counters contain no
 107          * useful data. Better clear them now so that they don't mess up
 108          * survey data results.
 109          */
 110         if (power_mode != ATH9K_PM_AWAKE) {
 111                 spin_lock(&common->cc_lock);
 112                 ath_hw_cycle_counters_update(common);
 113                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 114                 spin_unlock(&common->cc_lock);
 115         }
 116
 117  unlock:
 118         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 119 }
 120
 121 void ath9k_ps_restore(struct ath_softc *sc)
 122 {
 123         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (--sc->ps_usecount != 0)
 128                 goto unlock;
 129
 130         spin_lock(&common->cc_lock);
 131         ath_hw_cycle_counters_update(common);
 132         spin_unlock(&common->cc_lock);
 133
 134         if (sc->ps_idle)
 135                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 136         else if (sc->ps_enabled &&
 137                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 138                               PS_WAIT_FOR_CAB |
 139                               PS_WAIT_FOR_PSPOLL_DATA |
 140                               PS_WAIT_FOR_TX_ACK)))
 141                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 142
 143  unlock:
 144         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 145 }
 146
 147 static void ath_start_ani(struct ath_common *common)
 148 {
 149         struct ath_hw *ah = common->ah;
 150         unsigned long timestamp = jiffies_to_msecs(jiffies);
 151         struct ath_softc *sc = (struct ath_softc *) common->priv;
 152
 153         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 154                 return;
 155
 156         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 157                 return;
 158
 159         common->ani.longcal_timer = timestamp;
 160         common->ani.shortcal_timer = timestamp;
 161         common->ani.checkani_timer = timestamp;
 162
 163         mod_timer(&common->ani.timer,
 164                   jiffies +
 165                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 166 }
 167
 168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 169 {
 170         struct ath_hw *ah = sc->sc_ah;
 171         struct ath9k_channel *chan = &ah->channels[channel];
 172         struct survey_info *survey = &sc->survey[channel];
 173
 174         if (chan->noisefloor) {
 175                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 176                 survey->noise = chan->noisefloor;
 177         }
 178 }
 179
 180 static void ath_update_survey_stats(struct ath_softc *sc)
 181 {
 182         struct ath_hw *ah = sc->sc_ah;
 183         struct ath_common *common = ath9k_hw_common(ah);
 184         int pos = ah->curchan - &ah->channels[0];
 185         struct survey_info *survey = &sc->survey[pos];
 186         struct ath_cycle_counters *cc = &common->cc_survey;
 187         unsigned int div = common->clockrate * 1000;
 188
 189         if (!ah->curchan)
 190                 return;
 191
 192         if (ah->power_mode == ATH9K_PM_AWAKE)
 193                 ath_hw_cycle_counters_update(common);
 194
 195         if (cc->cycles > 0) {
 196                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 197                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 198                         SURVEY_INFO_CHANNEL_TIME_RX |
 199                         SURVEY_INFO_CHANNEL_TIME_TX;
 200                 survey->channel_time += cc->cycles / div;
 201                 survey->channel_time_busy += cc->rx_busy / div;
 202                 survey->channel_time_rx += cc->rx_frame / div;
 203                 survey->channel_time_tx += cc->tx_frame / div;
 204         }
 205         memset(cc, 0, sizeof(*cc));
 206
 207         ath_update_survey_nf(sc, pos);
 208 }
 209
 210 /*
 211  * Set/change channels.  If the channel is really being changed, it's done
 212  * by reseting the chip.  To accomplish this we must first cleanup any pending
 213  * DMA, then restart stuff.
 214 */
 215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 216                     struct ath9k_channel *hchan)
 217 {
 218         struct ath_wiphy *aphy = hw->priv;
 219         struct ath_hw *ah = sc->sc_ah;
 220         struct ath_common *common = ath9k_hw_common(ah);
 221         struct ieee80211_conf *conf = &common->hw->conf;
 222         bool fastcc = true, stopped;
 223         struct ieee80211_channel *channel = hw->conf.channel;
 224         struct ath9k_hw_cal_data *caldata = NULL;
 225         int r;
 226
 227         if (sc->sc_flags & SC_OP_INVALID)
 228                 return -EIO;
 229
 230         del_timer_sync(&common->ani.timer);
 231         cancel_work_sync(&sc->paprd_work);
 232         cancel_work_sync(&sc->hw_check_work);
 233         cancel_delayed_work_sync(&sc->tx_complete_work);
 234
 235         ath9k_ps_wakeup(sc);
 236
 237         spin_lock_bh(&sc->sc_pcu_lock);
 238
 239         /*
 240          * This is only performed if the channel settings have
 241          * actually changed.
 242          *
 243          * To switch channels clear any pending DMA operations;
 244          * wait long enough for the RX fifo to drain, reset the
 245          * hardware at the new frequency, and then re-enable
 246          * the relevant bits of the h/w.
 247          */
 248         ath9k_hw_disable_interrupts(ah);
 249         stopped = ath_drain_all_txq(sc, false);
 250
 251         if (!ath_stoprecv(sc))
 252                 stopped = false;
 253
 254         if (!ath9k_hw_check_alive(ah))
 255                 stopped = false;
 256
 257         /* XXX: do not flush receive queue here. We don't want
 258          * to flush data frames already in queue because of
 259          * changing channel. */
 260
 261         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 262                 fastcc = false;
 263
 264         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 265                 caldata = &aphy->caldata;
 266
 267         ath_dbg(common, ATH_DBG_CONFIG,
 268                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 269                 sc->sc_ah->curchan->channel,
 270                 channel->center_freq, conf_is_ht40(conf),
 271                 fastcc);
 272
 273         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 274         if (r) {
 275                 ath_err(common,
 276                         "Unable to reset channel (%u MHz), reset status %d\n",
 277                         channel->center_freq, r);
 278                 goto ps_restore;
 279         }
 280
 281         if (ath_startrecv(sc) != 0) {
 282                 ath_err(common, "Unable to restart recv logic\n");
 283                 r = -EIO;
 284                 goto ps_restore;
 285         }
 286
 287         ath_update_txpow(sc);
 288         ath9k_hw_set_interrupts(ah, ah->imask);
 289
 290         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 291                 if (sc->sc_flags & SC_OP_BEACONS)
 292                         ath_beacon_config(sc, NULL);
 293                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 294                 ath_start_ani(common);
 295         }
 296
 297  ps_restore:
 298         spin_unlock_bh(&sc->sc_pcu_lock);
 299
 300         ath9k_ps_restore(sc);
 301         return r;
 302 }
 303
 304 static void ath_paprd_activate(struct ath_softc *sc)
 305 {
 306         struct ath_hw *ah = sc->sc_ah;
 307         struct ath9k_hw_cal_data *caldata = ah->caldata;
 308         struct ath_common *common = ath9k_hw_common(ah);
 309         int chain;
 310
 311         if (!caldata || !caldata->paprd_done)
 312                 return;
 313
 314         ath9k_ps_wakeup(sc);
 315         ar9003_paprd_enable(ah, false);
 316         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 317                 if (!(common->tx_chainmask & BIT(chain)))
 318                         continue;
 319
 320                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 321         }
 322
 323         ar9003_paprd_enable(ah, true);
 324         ath9k_ps_restore(sc);
 325 }
 326
 327 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 328 {
 329         struct ieee80211_hw *hw = sc->hw;
 330         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 331         struct ath_tx_control txctl;
 332         int time_left;
 333
 334         memset(&txctl, 0, sizeof(txctl));
 335         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 336
 337         memset(tx_info, 0, sizeof(*tx_info));
 338         tx_info->band = hw->conf.channel->band;
 339         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 340         tx_info->control.rates[0].idx = 0;
 341         tx_info->control.rates[0].count = 1;
 342         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 343         tx_info->control.rates[1].idx = -1;
 344
 345         init_completion(&sc->paprd_complete);
 346         sc->paprd_pending = true;
 347         txctl.paprd = BIT(chain);
 348         if (ath_tx_start(hw, skb, &txctl) != 0)
 349                 return false;
 350
 351         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 352                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 353         sc->paprd_pending = false;
 354
 355         if (!time_left)
 356                 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
 357                         "Timeout waiting for paprd training on TX chain %d\n",
 358                         chain);
 359
 360         return !!time_left;
 361 }
 362
 363 void ath_paprd_calibrate(struct work_struct *work)
 364 {
 365         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 366         struct ieee80211_hw *hw = sc->hw;
 367         struct ath_hw *ah = sc->sc_ah;
 368         struct ieee80211_hdr *hdr;
 369         struct sk_buff *skb = NULL;
 370         struct ath9k_hw_cal_data *caldata = ah->caldata;
 371         struct ath_common *common = ath9k_hw_common(ah);
 372         int ftype;
 373         int chain_ok = 0;
 374         int chain;
 375         int len = 1800;
 376
 377         if (!caldata)
 378                 return;
 379
 380         if (ar9003_paprd_init_table(ah) < 0)
 381                 return;
 382
 383         skb = alloc_skb(len, GFP_KERNEL);
 384         if (!skb)
 385                 return;
 386
 387         skb_put(skb, len);
 388         memset(skb->data, 0, len);
 389         hdr = (struct ieee80211_hdr *)skb->data;
 390         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 391         hdr->frame_control = cpu_to_le16(ftype);
 392         hdr->duration_id = cpu_to_le16(10);
 393         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 394         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 395         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 396
 397         ath9k_ps_wakeup(sc);
 398         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 399                 if (!(common->tx_chainmask & BIT(chain)))
 400                         continue;
 401
 402                 chain_ok = 0;
 403
 404                 ath_dbg(common, ATH_DBG_CALIBRATE,
 405                         "Sending PAPRD frame for thermal measurement "
 406                         "on chain %d\n", chain);
 407                 if (!ath_paprd_send_frame(sc, skb, chain))
 408                         goto fail_paprd;
 409
 410                 ar9003_paprd_setup_gain_table(ah, chain);
 411
 412                 ath_dbg(common, ATH_DBG_CALIBRATE,
 413                         "Sending PAPRD training frame on chain %d\n", chain);
 414                 if (!ath_paprd_send_frame(sc, skb, chain))
 415                         goto fail_paprd;
 416
 417                 if (!ar9003_paprd_is_done(ah))
 418                         break;
 419
 420                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 421                         break;
 422
 423                 chain_ok = 1;
 424         }
 425         kfree_skb(skb);
 426
 427         if (chain_ok) {
 428                 caldata->paprd_done = true;
 429                 ath_paprd_activate(sc);
 430         }
 431
 432 fail_paprd:
 433         ath9k_ps_restore(sc);
 434 }
 435
 436 /*
 437  *  This routine performs the periodic noise floor calibration function
 438  *  that is used to adjust and optimize the chip performance.  This
 439  *  takes environmental changes (location, temperature) into account.
 440  *  When the task is complete, it reschedules itself depending on the
 441  *  appropriate interval that was calculated.
 442  */
 443 void ath_ani_calibrate(unsigned long data)
 444 {
 445         struct ath_softc *sc = (struct ath_softc *)data;
 446         struct ath_hw *ah = sc->sc_ah;
 447         struct ath_common *common = ath9k_hw_common(ah);
 448         bool longcal = false;
 449         bool shortcal = false;
 450         bool aniflag = false;
 451         unsigned int timestamp = jiffies_to_msecs(jiffies);
 452         u32 cal_interval, short_cal_interval, long_cal_interval;
 453         unsigned long flags;
 454
 455         if (ah->caldata && ah->caldata->nfcal_interference)
 456                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 457         else
 458                 long_cal_interval = ATH_LONG_CALINTERVAL;
 459
 460         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 461                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 462
 463         /* Only calibrate if awake */
 464         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 465                 goto set_timer;
 466
 467         ath9k_ps_wakeup(sc);
 468
 469         /* Long calibration runs independently of short calibration. */
 470         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 471                 longcal = true;
 472                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 473                 common->ani.longcal_timer = timestamp;
 474         }
 475
 476         /* Short calibration applies only while caldone is false */
 477         if (!common->ani.caldone) {
 478                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 479                         shortcal = true;
 480                         ath_dbg(common, ATH_DBG_ANI,
 481                                 "shortcal @%lu\n", jiffies);
 482                         common->ani.shortcal_timer = timestamp;
 483                         common->ani.resetcal_timer = timestamp;
 484                 }
 485         } else {
 486                 if ((timestamp - common->ani.resetcal_timer) >=
 487                     ATH_RESTART_CALINTERVAL) {
 488                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 489                         if (common->ani.caldone)
 490                                 common->ani.resetcal_timer = timestamp;
 491                 }
 492         }
 493
 494         /* Verify whether we must check ANI */
 495         if ((timestamp - common->ani.checkani_timer) >=
 496              ah->config.ani_poll_interval) {
 497                 aniflag = true;
 498                 common->ani.checkani_timer = timestamp;
 499         }
 500
 501         /* Skip all processing if there's nothing to do. */
 502         if (longcal || shortcal || aniflag) {
 503                 /* Call ANI routine if necessary */
 504                 if (aniflag) {
 505                         spin_lock_irqsave(&common->cc_lock, flags);
 506                         ath9k_hw_ani_monitor(ah, ah->curchan);
 507                         ath_update_survey_stats(sc);
 508                         spin_unlock_irqrestore(&common->cc_lock, flags);
 509                 }
 510
 511                 /* Perform calibration if necessary */
 512                 if (longcal || shortcal) {
 513                         common->ani.caldone =
 514                                 ath9k_hw_calibrate(ah,
 515                                                    ah->curchan,
 516                                                    common->rx_chainmask,
 517                                                    longcal);
 518                 }
 519         }
 520
 521         ath9k_ps_restore(sc);
 522
 523 set_timer:
 524         /*
 525         * Set timer interval based on previous results.
 526         * The interval must be the shortest necessary to satisfy ANI,
 527         * short calibration and long calibration.
 528         */
 529         cal_interval = ATH_LONG_CALINTERVAL;
 530         if (sc->sc_ah->config.enable_ani)
 531                 cal_interval = min(cal_interval,
 532                                    (u32)ah->config.ani_poll_interval);
 533         if (!common->ani.caldone)
 534                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 535
 536         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 537         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 538                 if (!ah->caldata->paprd_done)
 539                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 540                 else if (!ah->paprd_table_write_done)
 541                         ath_paprd_activate(sc);
 542         }
 543 }
 544
 545 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 546 {
 547         struct ath_node *an;
 548         struct ath_hw *ah = sc->sc_ah;
 549         an = (struct ath_node *)sta->drv_priv;
 550
 551 #ifdef CONFIG_ATH9K_DEBUGFS
 552         spin_lock(&sc->nodes_lock);
 553         list_add(&an->list, &sc->nodes);
 554         spin_unlock(&sc->nodes_lock);
 555         an->sta = sta;
 556 #endif
 557         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 558                 sc->sc_flags |= SC_OP_ENABLE_APM;
 559
 560         if (sc->sc_flags & SC_OP_TXAGGR) {
 561                 ath_tx_node_init(sc, an);
 562                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 563                                      sta->ht_cap.ampdu_factor);
 564                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 565         }
 566 }
 567
 568 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 569 {
 570         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 571
 572 #ifdef CONFIG_ATH9K_DEBUGFS
 573         spin_lock(&sc->nodes_lock);
 574         list_del(&an->list);
 575         spin_unlock(&sc->nodes_lock);
 576         an->sta = NULL;
 577 #endif
 578
 579         if (sc->sc_flags & SC_OP_TXAGGR)
 580                 ath_tx_node_cleanup(sc, an);
 581 }
 582
 583 void ath_hw_check(struct work_struct *work)
 584 {
 585         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 586         int i;
 587
 588         ath9k_ps_wakeup(sc);
 589
 590         for (i = 0; i < 3; i++) {
 591                 if (ath9k_hw_check_alive(sc->sc_ah))
 592                         goto out;
 593
 594                 msleep(1);
 595         }
 596         ath_reset(sc, true);
 597
 598 out:
 599         ath9k_ps_restore(sc);
 600 }
 601
 602 void ath9k_tasklet(unsigned long data)
 603 {
 604         struct ath_softc *sc = (struct ath_softc *)data;
 605         struct ath_hw *ah = sc->sc_ah;
 606         struct ath_common *common = ath9k_hw_common(ah);
 607
 608         u32 status = sc->intrstatus;
 609         u32 rxmask;
 610
 611         ath9k_ps_wakeup(sc);
 612
 613         if (status & ATH9K_INT_FATAL) {
 614                 ath_reset(sc, true);
 615                 ath9k_ps_restore(sc);
 616                 return;
 617         }
 618
 619         spin_lock(&sc->sc_pcu_lock);
 620
 621         /*
 622          * Only run the baseband hang check if beacons stop working in AP or
 623          * IBSS mode, because it has a high false positive rate. For station
 624          * mode it should not be necessary, since the upper layers will detect
 625          * this through a beacon miss automatically and the following channel
 626          * change will trigger a hardware reset anyway
 627          */
 628         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
 629             !ath9k_hw_check_alive(ah))
 630                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 631
 632         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 633                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 634                           ATH9K_INT_RXORN);
 635         else
 636                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 637
 638         if (status & rxmask) {
 639                 /* Check for high priority Rx first */
 640                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 641                     (status & ATH9K_INT_RXHP))
 642                         ath_rx_tasklet(sc, 0, true);
 643
 644                 ath_rx_tasklet(sc, 0, false);
 645         }
 646
 647         if (status & ATH9K_INT_TX) {
 648                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 649                         ath_tx_edma_tasklet(sc);
 650                 else
 651                         ath_tx_tasklet(sc);
 652         }
 653
 654         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 655                 /*
 656                  * TSF sync does not look correct; remain awake to sync with
 657                  * the next Beacon.
 658                  */
 659                 ath_dbg(common, ATH_DBG_PS,
 660                         "TSFOOR - Sync with next Beacon\n");
 661                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 662         }
 663
 664         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 665                 if (status & ATH9K_INT_GENTIMER)
 666                         ath_gen_timer_isr(sc->sc_ah);
 667
 668         /* re-enable hardware interrupt */
 669         ath9k_hw_enable_interrupts(ah);
 670
 671         spin_unlock(&sc->sc_pcu_lock);
 672         ath9k_ps_restore(sc);
 673 }
 674
 675 irqreturn_t ath_isr(int irq, void *dev)
 676 {
 677 #define SCHED_INTR (                            \
 678                 ATH9K_INT_FATAL |               \
 679                 ATH9K_INT_RXORN |               \
 680                 ATH9K_INT_RXEOL |               \
 681                 ATH9K_INT_RX |                  \
 682                 ATH9K_INT_RXLP |                \
 683                 ATH9K_INT_RXHP |                \
 684                 ATH9K_INT_TX |                  \
 685                 ATH9K_INT_BMISS |               \
 686                 ATH9K_INT_CST |                 \
 687                 ATH9K_INT_TSFOOR |              \
 688                 ATH9K_INT_GENTIMER)
 689
 690         struct ath_softc *sc = dev;
 691         struct ath_hw *ah = sc->sc_ah;
 692         struct ath_common *common = ath9k_hw_common(ah);
 693         enum ath9k_int status;
 694         bool sched = false;
 695
 696         /*
 697          * The hardware is not ready/present, don't
 698          * touch anything. Note this can happen early
 699          * on if the IRQ is shared.
 700          */
 701         if (sc->sc_flags & SC_OP_INVALID)
 702                 return IRQ_NONE;
 703
 704
 705         /* shared irq, not for us */
 706
 707         if (!ath9k_hw_intrpend(ah))
 708                 return IRQ_NONE;
 709
 710         /*
 711          * Figure out the reason(s) for the interrupt.  Note
 712          * that the hal returns a pseudo-ISR that may include
 713          * bits we haven't explicitly enabled so we mask the
 714          * value to insure we only process bits we requested.
 715          */
 716         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 717         status &= ah->imask;    /* discard unasked-for bits */
 718
 719         /*
 720          * If there are no status bits set, then this interrupt was not
 721          * for me (should have been caught above).
 722          */
 723         if (!status)
 724                 return IRQ_NONE;
 725
 726         /* Cache the status */
 727         sc->intrstatus = status;
 728
 729         if (status & SCHED_INTR)
 730                 sched = true;
 731
 732         /*
 733          * If a FATAL or RXORN interrupt is received, we have to reset the
 734          * chip immediately.
 735          */
 736         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 737             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 738                 goto chip_reset;
 739
 740         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 741             (status & ATH9K_INT_BB_WATCHDOG)) {
 742
 743                 spin_lock(&common->cc_lock);
 744                 ath_hw_cycle_counters_update(common);
 745                 ar9003_hw_bb_watchdog_dbg_info(ah);
 746                 spin_unlock(&common->cc_lock);
 747
 748                 goto chip_reset;
 749         }
 750
 751         if (status & ATH9K_INT_SWBA)
 752                 tasklet_schedule(&sc->bcon_tasklet);
 753
 754         if (status & ATH9K_INT_TXURN)
 755                 ath9k_hw_updatetxtriglevel(ah, true);
 756
 757         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 758                 if (status & ATH9K_INT_RXEOL) {
 759                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 760                         ath9k_hw_set_interrupts(ah, ah->imask);
 761                 }
 762         }
 763
 764         if (status & ATH9K_INT_MIB) {
 765                 /*
 766                  * Disable interrupts until we service the MIB
 767                  * interrupt; otherwise it will continue to
 768                  * fire.
 769                  */
 770                 ath9k_hw_disable_interrupts(ah);
 771                 /*
 772                  * Let the hal handle the event. We assume
 773                  * it will clear whatever condition caused
 774                  * the interrupt.
 775                  */
 776                 spin_lock(&common->cc_lock);
 777                 ath9k_hw_proc_mib_event(ah);
 778                 spin_unlock(&common->cc_lock);
 779                 ath9k_hw_enable_interrupts(ah);
 780         }
 781
 782         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 783                 if (status & ATH9K_INT_TIM_TIMER) {
 784                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 785                                 goto chip_reset;
 786                         /* Clear RxAbort bit so that we can
 787                          * receive frames */
 788                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 789                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 790                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 791                 }
 792
 793 chip_reset:
 794
 795         ath_debug_stat_interrupt(sc, status);
 796
 797         if (sched) {
 798                 /* turn off every interrupt */
 799                 ath9k_hw_disable_interrupts(ah);
 800                 tasklet_schedule(&sc->intr_tq);
 801         }
 802
 803         return IRQ_HANDLED;
 804
 805 #undef SCHED_INTR
 806 }
 807
 808 static u32 ath_get_extchanmode(struct ath_softc *sc,
 809                                struct ieee80211_channel *chan,
 810                                enum nl80211_channel_type channel_type)
 811 {
 812         u32 chanmode = 0;
 813
 814         switch (chan->band) {
 815         case IEEE80211_BAND_2GHZ:
 816                 switch(channel_type) {
 817                 case NL80211_CHAN_NO_HT:
 818                 case NL80211_CHAN_HT20:
 819                         chanmode = CHANNEL_G_HT20;
 820                         break;
 821                 case NL80211_CHAN_HT40PLUS:
 822                         chanmode = CHANNEL_G_HT40PLUS;
 823                         break;
 824                 case NL80211_CHAN_HT40MINUS:
 825                         chanmode = CHANNEL_G_HT40MINUS;
 826                         break;
 827                 }
 828                 break;
 829         case IEEE80211_BAND_5GHZ:
 830                 switch(channel_type) {
 831                 case NL80211_CHAN_NO_HT:
 832                 case NL80211_CHAN_HT20:
 833                         chanmode = CHANNEL_A_HT20;
 834                         break;
 835                 case NL80211_CHAN_HT40PLUS:
 836                         chanmode = CHANNEL_A_HT40PLUS;
 837                         break;
 838                 case NL80211_CHAN_HT40MINUS:
 839                         chanmode = CHANNEL_A_HT40MINUS;
 840                         break;
 841                 }
 842                 break;
 843         default:
 844                 break;
 845         }
 846
 847         return chanmode;
 848 }
 849
 850 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 851                                  struct ieee80211_hw *hw,
 852                                  struct ieee80211_vif *vif,
 853                                  struct ieee80211_bss_conf *bss_conf)
 854 {
 855         struct ath_wiphy *aphy = hw->priv;
 856         struct ath_hw *ah = sc->sc_ah;
 857         struct ath_common *common = ath9k_hw_common(ah);
 858
 859         if (bss_conf->assoc) {
 860                 ath_dbg(common, ATH_DBG_CONFIG,
 861                         "Bss Info ASSOC %d, bssid: %pM\n",
 862                         bss_conf->aid, common->curbssid);
 863
 864                 /* New association, store aid */
 865                 common->curaid = bss_conf->aid;
 866                 ath9k_hw_write_associd(ah);
 867
 868                 /*
 869                  * Request a re-configuration of Beacon related timers
 870                  * on the receipt of the first Beacon frame (i.e.,
 871                  * after time sync with the AP).
 872                  */
 873                 sc->ps_flags |= PS_BEACON_SYNC;
 874
 875                 /* Configure the beacon */
 876                 ath_beacon_config(sc, vif);
 877
 878                 /* Reset rssi stats */
 879                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
 880                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 881
 882                 sc->sc_flags |= SC_OP_ANI_RUN;
 883                 ath_start_ani(common);
 884         } else {
 885                 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 886                 common->curaid = 0;
 887                 /* Stop ANI */
 888                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 889                 del_timer_sync(&common->ani.timer);
 890         }
 891 }
 892
 893 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 894 {
 895         struct ath_hw *ah = sc->sc_ah;
 896         struct ath_common *common = ath9k_hw_common(ah);
 897         struct ieee80211_channel *channel = hw->conf.channel;
 898         int r;
 899
 900         ath9k_ps_wakeup(sc);
 901         spin_lock_bh(&sc->sc_pcu_lock);
 902
 903         ath9k_hw_configpcipowersave(ah, 0, 0);
 904
 905         if (!ah->curchan)
 906                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 907
 908         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 909         if (r) {
 910                 ath_err(common,
 911                         "Unable to reset channel (%u MHz), reset status %d\n",
 912                         channel->center_freq, r);
 913         }
 914
 915         ath_update_txpow(sc);
 916         if (ath_startrecv(sc) != 0) {
 917                 ath_err(common, "Unable to restart recv logic\n");
 918                 goto out;
 919         }
 920         if (sc->sc_flags & SC_OP_BEACONS)
 921                 ath_beacon_config(sc, NULL);    /* restart beacons */
 922
 923         /* Re-Enable  interrupts */
 924         ath9k_hw_set_interrupts(ah, ah->imask);
 925
 926         /* Enable LED */
 927         ath9k_hw_cfg_output(ah, ah->led_pin,
 928                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 929         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 930
 931         ieee80211_wake_queues(hw);
 932 out:
 933         spin_unlock_bh(&sc->sc_pcu_lock);
 934
 935         ath9k_ps_restore(sc);
 936 }
 937
 938 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 939 {
 940         struct ath_hw *ah = sc->sc_ah;
 941         struct ieee80211_channel *channel = hw->conf.channel;
 942         int r;
 943
 944         ath9k_ps_wakeup(sc);
 945         spin_lock_bh(&sc->sc_pcu_lock);
 946
 947         ieee80211_stop_queues(hw);
 948
 949         /*
 950          * Keep the LED on when the radio is disabled
 951          * during idle unassociated state.
 952          */
 953         if (!sc->ps_idle) {
 954                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 955                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 956         }
 957
 958         /* Disable interrupts */
 959         ath9k_hw_disable_interrupts(ah);
 960
 961         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 962
 963         ath_stoprecv(sc);               /* turn off frame recv */
 964         ath_flushrecv(sc);              /* flush recv queue */
 965
 966         if (!ah->curchan)
 967                 ah->curchan = ath_get_curchannel(sc, hw);
 968
 969         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 970         if (r) {
 971                 ath_err(ath9k_hw_common(sc->sc_ah),
 972                         "Unable to reset channel (%u MHz), reset status %d\n",
 973                         channel->center_freq, r);
 974         }
 975
 976         ath9k_hw_phy_disable(ah);
 977
 978         ath9k_hw_configpcipowersave(ah, 1, 1);
 979
 980         spin_unlock_bh(&sc->sc_pcu_lock);
 981         ath9k_ps_restore(sc);
 982
 983         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 984 }
 985
 986 int ath_reset(struct ath_softc *sc, bool retry_tx)
 987 {
 988         struct ath_hw *ah = sc->sc_ah;
 989         struct ath_common *common = ath9k_hw_common(ah);
 990         struct ieee80211_hw *hw = sc->hw;
 991         int r;
 992
 993         /* Stop ANI */
 994         del_timer_sync(&common->ani.timer);
 995
 996         spin_lock_bh(&sc->sc_pcu_lock);
 997
 998         ieee80211_stop_queues(hw);
 999
1000         ath9k_hw_disable_interrupts(ah);
1001         ath_drain_all_txq(sc, retry_tx);
1002
1003         ath_stoprecv(sc);
1004         ath_flushrecv(sc);
1005
1006         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
1007         if (r)
1008                 ath_err(common,
1009                         "Unable to reset hardware; reset status %d\n", r);
1010
1011         if (ath_startrecv(sc) != 0)
1012                 ath_err(common, "Unable to start recv logic\n");
1013
1014         /*
1015          * We may be doing a reset in response to a request
1016          * that changes the channel so update any state that
1017          * might change as a result.
1018          */
1019         ath_update_txpow(sc);
1020
1021         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1022                 ath_beacon_config(sc, NULL);    /* restart beacons */
1023
1024         ath9k_hw_set_interrupts(ah, ah->imask);
1025
1026         if (retry_tx) {
1027                 int i;
1028                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1029                         if (ATH_TXQ_SETUP(sc, i)) {
1030                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1031                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1032                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1033                         }
1034                 }
1035         }
1036
1037         ieee80211_wake_queues(hw);
1038         spin_unlock_bh(&sc->sc_pcu_lock);
1039
1040         /* Start ANI */
1041         ath_start_ani(common);
1042
1043         return r;
1044 }
1045
1046 /* XXX: Remove me once we don't depend on ath9k_channel for all
1047  * this redundant data */
1048 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1049                            struct ath9k_channel *ichan)
1050 {
1051         struct ieee80211_channel *chan = hw->conf.channel;
1052         struct ieee80211_conf *conf = &hw->conf;
1053
1054         ichan->channel = chan->center_freq;
1055         ichan->chan = chan;
1056
1057         if (chan->band == IEEE80211_BAND_2GHZ) {
1058                 ichan->chanmode = CHANNEL_G;
1059                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1060         } else {
1061                 ichan->chanmode = CHANNEL_A;
1062                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1063         }
1064
1065         if (conf_is_ht(conf))
1066                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1067                                             conf->channel_type);
1068 }
1069
1070 /**********************/
1071 /* mac80211 callbacks */
1072 /**********************/
1073
1074 static int ath9k_start(struct ieee80211_hw *hw)
1075 {
1076         struct ath_wiphy *aphy = hw->priv;
1077         struct ath_softc *sc = aphy->sc;
1078         struct ath_hw *ah = sc->sc_ah;
1079         struct ath_common *common = ath9k_hw_common(ah);
1080         struct ieee80211_channel *curchan = hw->conf.channel;
1081         struct ath9k_channel *init_channel;
1082         int r;
1083
1084         ath_dbg(common, ATH_DBG_CONFIG,
1085                 "Starting driver with initial channel: %d MHz\n",
1086                 curchan->center_freq);
1087
1088         mutex_lock(&sc->mutex);
1089
1090         if (ath9k_wiphy_started(sc)) {
1091                 if (sc->chan_idx == curchan->hw_value) {
1092                         /*
1093                          * Already on the operational channel, the new wiphy
1094                          * can be marked active.
1095                          */
1096                         aphy->state = ATH_WIPHY_ACTIVE;
1097                         ieee80211_wake_queues(hw);
1098                 } else {
1099                         /*
1100                          * Another wiphy is on another channel, start the new
1101                          * wiphy in paused state.
1102                          */
1103                         aphy->state = ATH_WIPHY_PAUSED;
1104                         ieee80211_stop_queues(hw);
1105                 }
1106                 mutex_unlock(&sc->mutex);
1107                 return 0;
1108         }
1109         aphy->state = ATH_WIPHY_ACTIVE;
1110
1111         /* setup initial channel */
1112
1113         sc->chan_idx = curchan->hw_value;
1114
1115         init_channel = ath_get_curchannel(sc, hw);
1116
1117         /* Reset SERDES registers */
1118         ath9k_hw_configpcipowersave(ah, 0, 0);
1119
1120         /*
1121          * The basic interface to setting the hardware in a good
1122          * state is ``reset''.  On return the hardware is known to
1123          * be powered up and with interrupts disabled.  This must
1124          * be followed by initialization of the appropriate bits
1125          * and then setup of the interrupt mask.
1126          */
1127         spin_lock_bh(&sc->sc_pcu_lock);
1128         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1129         if (r) {
1130                 ath_err(common,
1131                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1132                         r, curchan->center_freq);
1133                 spin_unlock_bh(&sc->sc_pcu_lock);
1134                 goto mutex_unlock;
1135         }
1136
1137         /*
1138          * This is needed only to setup initial state
1139          * but it's best done after a reset.
1140          */
1141         ath_update_txpow(sc);
1142
1143         /*
1144          * Setup the hardware after reset:
1145          * The receive engine is set going.
1146          * Frame transmit is handled entirely
1147          * in the frame output path; there's nothing to do
1148          * here except setup the interrupt mask.
1149          */
1150         if (ath_startrecv(sc) != 0) {
1151                 ath_err(common, "Unable to start recv logic\n");
1152                 r = -EIO;
1153                 spin_unlock_bh(&sc->sc_pcu_lock);
1154                 goto mutex_unlock;
1155         }
1156         spin_unlock_bh(&sc->sc_pcu_lock);
1157
1158         /* Setup our intr mask. */
1159         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1160                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1161                     ATH9K_INT_GLOBAL;
1162
1163         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1164                 ah->imask |= ATH9K_INT_RXHP |
1165                              ATH9K_INT_RXLP |
1166                              ATH9K_INT_BB_WATCHDOG;
1167         else
1168                 ah->imask |= ATH9K_INT_RX;
1169
1170         ah->imask |= ATH9K_INT_GTT;
1171
1172         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1173                 ah->imask |= ATH9K_INT_CST;
1174
1175         sc->sc_flags &= ~SC_OP_INVALID;
1176         sc->sc_ah->is_monitoring = false;
1177
1178         /* Disable BMISS interrupt when we're not associated */
1179         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1180         ath9k_hw_set_interrupts(ah, ah->imask);
1181
1182         ieee80211_wake_queues(hw);
1183
1184         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1185
1186         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1187             !ah->btcoex_hw.enabled) {
1188                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1189                                            AR_STOMP_LOW_WLAN_WGHT);
1190                 ath9k_hw_btcoex_enable(ah);
1191
1192                 if (common->bus_ops->bt_coex_prep)
1193                         common->bus_ops->bt_coex_prep(common);
1194                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1195                         ath9k_btcoex_timer_resume(sc);
1196         }
1197
1198         /* User has the option to provide pm-qos value as a module
1199          * parameter rather than using the default value of
1200          * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1201          */
1202         pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1203
1204         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1205                 common->bus_ops->extn_synch_en(common);
1206
1207 mutex_unlock:
1208         mutex_unlock(&sc->mutex);
1209
1210         return r;
1211 }
1212
1213 static int ath9k_tx(struct ieee80211_hw *hw,
1214                     struct sk_buff *skb)
1215 {
1216         struct ath_wiphy *aphy = hw->priv;
1217         struct ath_softc *sc = aphy->sc;
1218         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1219         struct ath_tx_control txctl;
1220         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1221
1222         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1223                 ath_dbg(common, ATH_DBG_XMIT,
1224                         "ath9k: %s: TX in unexpected wiphy state %d\n",
1225                         wiphy_name(hw->wiphy), aphy->state);
1226                 goto exit;
1227         }
1228
1229         if (sc->ps_enabled) {
1230                 /*
1231                  * mac80211 does not set PM field for normal data frames, so we
1232                  * need to update that based on the current PS mode.
1233                  */
1234                 if (ieee80211_is_data(hdr->frame_control) &&
1235                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1236                     !ieee80211_has_pm(hdr->frame_control)) {
1237                         ath_dbg(common, ATH_DBG_PS,
1238                                 "Add PM=1 for a TX frame while in PS mode\n");
1239                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1240                 }
1241         }
1242
1243         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1244                 /*
1245                  * We are using PS-Poll and mac80211 can request TX while in
1246                  * power save mode. Need to wake up hardware for the TX to be
1247                  * completed and if needed, also for RX of buffered frames.
1248                  */
1249                 ath9k_ps_wakeup(sc);
1250                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1251                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1252                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1253                         ath_dbg(common, ATH_DBG_PS,
1254                                 "Sending PS-Poll to pick a buffered frame\n");
1255                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1256                 } else {
1257                         ath_dbg(common, ATH_DBG_PS,
1258                                 "Wake up to complete TX\n");
1259                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1260                 }
1261                 /*
1262                  * The actual restore operation will happen only after
1263                  * the sc_flags bit is cleared. We are just dropping
1264                  * the ps_usecount here.
1265                  */
1266                 ath9k_ps_restore(sc);
1267         }
1268
1269         memset(&txctl, 0, sizeof(struct ath_tx_control));
1270         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1271
1272         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1273
1274         if (ath_tx_start(hw, skb, &txctl) != 0) {
1275                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1276                 goto exit;
1277         }
1278
1279         return 0;
1280 exit:
1281         dev_kfree_skb_any(skb);
1282         return 0;
1283 }
1284
1285 static void ath9k_stop(struct ieee80211_hw *hw)
1286 {
1287         struct ath_wiphy *aphy = hw->priv;
1288         struct ath_softc *sc = aphy->sc;
1289         struct ath_hw *ah = sc->sc_ah;
1290         struct ath_common *common = ath9k_hw_common(ah);
1291         int i;
1292
1293         mutex_lock(&sc->mutex);
1294
1295         aphy->state = ATH_WIPHY_INACTIVE;
1296
1297         if (led_blink)
1298                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1299
1300         cancel_delayed_work_sync(&sc->tx_complete_work);
1301         cancel_work_sync(&sc->paprd_work);
1302         cancel_work_sync(&sc->hw_check_work);
1303
1304         for (i = 0; i < sc->num_sec_wiphy; i++) {
1305                 if (sc->sec_wiphy[i])
1306                         break;
1307         }
1308
1309         if (i == sc->num_sec_wiphy) {
1310                 cancel_delayed_work_sync(&sc->wiphy_work);
1311                 cancel_work_sync(&sc->chan_work);
1312         }
1313
1314         if (sc->sc_flags & SC_OP_INVALID) {
1315                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1316                 mutex_unlock(&sc->mutex);
1317                 return;
1318         }
1319
1320         if (ath9k_wiphy_started(sc)) {
1321                 mutex_unlock(&sc->mutex);
1322                 return; /* another wiphy still in use */
1323         }
1324
1325         /* Ensure HW is awake when we try to shut it down. */
1326         ath9k_ps_wakeup(sc);
1327
1328         if (ah->btcoex_hw.enabled) {
1329                 ath9k_hw_btcoex_disable(ah);
1330                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1331                         ath9k_btcoex_timer_pause(sc);
1332         }
1333
1334         spin_lock_bh(&sc->sc_pcu_lock);
1335
1336         /* make sure h/w will not generate any interrupt
1337          * before setting the invalid flag. */
1338         ath9k_hw_disable_interrupts(ah);
1339
1340         if (!(sc->sc_flags & SC_OP_INVALID)) {
1341                 ath_drain_all_txq(sc, false);
1342                 ath_stoprecv(sc);
1343                 ath9k_hw_phy_disable(ah);
1344         } else
1345                 sc->rx.rxlink = NULL;
1346
1347         /* disable HAL and put h/w to sleep */
1348         ath9k_hw_disable(ah);
1349         ath9k_hw_configpcipowersave(ah, 1, 1);
1350
1351         spin_unlock_bh(&sc->sc_pcu_lock);
1352
1353         ath9k_ps_restore(sc);
1354
1355         sc->ps_idle = true;
1356         ath9k_set_wiphy_idle(aphy, true);
1357         ath_radio_disable(sc, hw);
1358
1359         sc->sc_flags |= SC_OP_INVALID;
1360
1361         pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1362
1363         mutex_unlock(&sc->mutex);
1364
1365         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1366 }
1367
1368 bool ath9k_uses_beacons(int type)
1369 {
1370         switch (type) {
1371         case NL80211_IFTYPE_AP:
1372         case NL80211_IFTYPE_ADHOC:
1373         case NL80211_IFTYPE_MESH_POINT:
1374                 return true;
1375         default:
1376                 return false;
1377         }
1378 }
1379
1380 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1381                                  struct ieee80211_vif *vif)
1382 {
1383         struct ath_vif *avp = (void *)vif->drv_priv;
1384
1385         /* Disable SWBA interrupt */
1386         sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1387         ath9k_ps_wakeup(sc);
1388         ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1389         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1390         tasklet_kill(&sc->bcon_tasklet);
1391         ath9k_ps_restore(sc);
1392
1393         ath_beacon_return(sc, avp);
1394         sc->sc_flags &= ~SC_OP_BEACONS;
1395
1396         if (sc->nbcnvifs > 0) {
1397                 /* Re-enable beaconing */
1398                 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1399                 ath9k_ps_wakeup(sc);
1400                 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1401                 ath9k_ps_restore(sc);
1402         }
1403 }
1404
1405 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1406 {
1407         struct ath9k_vif_iter_data *iter_data = data;
1408         int i;
1409
1410         if (iter_data->hw_macaddr)
1411                 for (i = 0; i < ETH_ALEN; i++)
1412                         iter_data->mask[i] &=
1413                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1414
1415         switch (vif->type) {
1416         case NL80211_IFTYPE_AP:
1417                 iter_data->naps++;
1418                 break;
1419         case NL80211_IFTYPE_STATION:
1420                 iter_data->nstations++;
1421                 break;
1422         case NL80211_IFTYPE_ADHOC:
1423                 iter_data->nadhocs++;
1424                 break;
1425         case NL80211_IFTYPE_MESH_POINT:
1426                 iter_data->nmeshes++;
1427                 break;
1428         case NL80211_IFTYPE_WDS:
1429                 iter_data->nwds++;
1430                 break;
1431         default:
1432                 iter_data->nothers++;
1433                 break;
1434         }
1435 }
1436
1437 /* Called with sc->mutex held. */
1438 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1439                                struct ieee80211_vif *vif,
1440                                struct ath9k_vif_iter_data *iter_data)
1441 {
1442         struct ath_wiphy *aphy = hw->priv;
1443         struct ath_softc *sc = aphy->sc;
1444         struct ath_hw *ah = sc->sc_ah;
1445         struct ath_common *common = ath9k_hw_common(ah);
1446         int i;
1447
1448         /*
1449          * Use the hardware MAC address as reference, the hardware uses it
1450          * together with the BSSID mask when matching addresses.
1451          */
1452         memset(iter_data, 0, sizeof(*iter_data));
1453         iter_data->hw_macaddr = common->macaddr;
1454         memset(&iter_data->mask, 0xff, ETH_ALEN);
1455
1456         if (vif)
1457                 ath9k_vif_iter(iter_data, vif->addr, vif);
1458
1459         /* Get list of all active MAC addresses */
1460         spin_lock_bh(&sc->wiphy_lock);
1461         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1462                                                    iter_data);
1463         for (i = 0; i < sc->num_sec_wiphy; i++) {
1464                 if (sc->sec_wiphy[i] == NULL)
1465                         continue;
1466                 ieee80211_iterate_active_interfaces_atomic(
1467                         sc->sec_wiphy[i]->hw, ath9k_vif_iter, iter_data);
1468         }
1469         spin_unlock_bh(&sc->wiphy_lock);
1470 }
1471
1472 /* Called with sc->mutex held. */
1473 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1474                                           struct ieee80211_vif *vif)
1475 {
1476         struct ath_wiphy *aphy = hw->priv;
1477         struct ath_softc *sc = aphy->sc;
1478         struct ath_hw *ah = sc->sc_ah;
1479         struct ath_common *common = ath9k_hw_common(ah);
1480         struct ath9k_vif_iter_data iter_data;
1481
1482         ath9k_calculate_iter_data(hw, vif, &iter_data);
1483
1484         /* Set BSSID mask. */
1485         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1486         ath_hw_setbssidmask(common);
1487
1488         /* Set op-mode & TSF */
1489         if (iter_data.naps > 0) {
1490                 ath9k_hw_set_tsfadjust(ah, 1);
1491                 sc->sc_flags |= SC_OP_TSF_RESET;
1492                 ah->opmode = NL80211_IFTYPE_AP;
1493         } else {
1494                 ath9k_hw_set_tsfadjust(ah, 0);
1495                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1496
1497                 if (iter_data.nwds + iter_data.nmeshes)
1498                         ah->opmode = NL80211_IFTYPE_AP;
1499                 else if (iter_data.nadhocs)
1500                         ah->opmode = NL80211_IFTYPE_ADHOC;
1501                 else
1502                         ah->opmode = NL80211_IFTYPE_STATION;
1503         }
1504
1505         /*
1506          * Enable MIB interrupts when there are hardware phy counters.
1507          */
1508         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1509                 if (ah->config.enable_ani)
1510                         ah->imask |= ATH9K_INT_MIB;
1511                 ah->imask |= ATH9K_INT_TSFOOR;
1512         } else {
1513                 ah->imask &= ~ATH9K_INT_MIB;
1514                 ah->imask &= ~ATH9K_INT_TSFOOR;
1515         }
1516
1517         ath9k_hw_set_interrupts(ah, ah->imask);
1518
1519         /* Set up ANI */
1520         if ((iter_data.naps + iter_data.nadhocs) > 0) {
1521                 sc->sc_flags |= SC_OP_ANI_RUN;
1522                 ath_start_ani(common);
1523         } else {
1524                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1525                 del_timer_sync(&common->ani.timer);
1526         }
1527 }
1528
1529 /* Called with sc->mutex held, vif counts set up properly. */
1530 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1531                                    struct ieee80211_vif *vif)
1532 {
1533         struct ath_wiphy *aphy = hw->priv;
1534         struct ath_softc *sc = aphy->sc;
1535
1536         ath9k_calculate_summary_state(hw, vif);
1537
1538         if (ath9k_uses_beacons(vif->type)) {
1539                 int error;
1540                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1541                 /* This may fail because upper levels do not have beacons
1542                  * properly configured yet.  That's OK, we assume it
1543                  * will be properly configured and then we will be notified
1544                  * in the info_changed method and set up beacons properly
1545                  * there.
1546                  */
1547                 error = ath_beacon_alloc(aphy, vif);
1548                 if (error)
1549                         ath9k_reclaim_beacon(sc, vif);
1550                 else
1551                         ath_beacon_config(sc, vif);
1552         }
1553 }
1554
1555
1556 static int ath9k_add_interface(struct ieee80211_hw *hw,
1557                                struct ieee80211_vif *vif)
1558 {
1559         struct ath_wiphy *aphy = hw->priv;
1560         struct ath_softc *sc = aphy->sc;
1561         struct ath_hw *ah = sc->sc_ah;
1562         struct ath_common *common = ath9k_hw_common(ah);
1563         struct ath_vif *avp = (void *)vif->drv_priv;
1564         int ret = 0;
1565
1566         mutex_lock(&sc->mutex);
1567
1568         switch (vif->type) {
1569         case NL80211_IFTYPE_STATION:
1570         case NL80211_IFTYPE_WDS:
1571         case NL80211_IFTYPE_ADHOC:
1572         case NL80211_IFTYPE_AP:
1573         case NL80211_IFTYPE_MESH_POINT:
1574                 break;
1575         default:
1576                 ath_err(common, "Interface type %d not yet supported\n",
1577                         vif->type);
1578                 ret = -EOPNOTSUPP;
1579                 goto out;
1580         }
1581
1582         if (ath9k_uses_beacons(vif->type)) {
1583                 if (sc->nbcnvifs >= ATH_BCBUF) {
1584                         ath_err(common, "Not enough beacon buffers when adding"
1585                                 " new interface of type: %i\n",
1586                                 vif->type);
1587                         ret = -ENOBUFS;
1588                         goto out;
1589                 }
1590         }
1591
1592         if ((vif->type == NL80211_IFTYPE_ADHOC) &&
1593             sc->nvifs > 0) {
1594                 ath_err(common, "Cannot create ADHOC interface when other"
1595                         " interfaces already exist.\n");
1596                 ret = -EINVAL;
1597                 goto out;
1598         }
1599
1600         ath_dbg(common, ATH_DBG_CONFIG,
1601                 "Attach a VIF of type: %d\n", vif->type);
1602
1603         /* Set the VIF opmode */
1604         avp->av_opmode = vif->type;
1605         avp->av_bslot = -1;
1606
1607         sc->nvifs++;
1608
1609         ath9k_do_vif_add_setup(hw, vif);
1610 out:
1611         mutex_unlock(&sc->mutex);
1612         return ret;
1613 }
1614
1615 static int ath9k_change_interface(struct ieee80211_hw *hw,
1616                                   struct ieee80211_vif *vif,
1617                                   enum nl80211_iftype new_type,
1618                                   bool p2p)
1619 {
1620         struct ath_wiphy *aphy = hw->priv;
1621         struct ath_softc *sc = aphy->sc;
1622         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1623         int ret = 0;
1624
1625         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1626         mutex_lock(&sc->mutex);
1627
1628         /* See if new interface type is valid. */
1629         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1630             (sc->nvifs > 1)) {
1631                 ath_err(common, "When using ADHOC, it must be the only"
1632                         " interface.\n");
1633                 ret = -EINVAL;
1634                 goto out;
1635         }
1636
1637         if (ath9k_uses_beacons(new_type) &&
1638             !ath9k_uses_beacons(vif->type)) {
1639                 if (sc->nbcnvifs >= ATH_BCBUF) {
1640                         ath_err(common, "No beacon slot available\n");
1641                         ret = -ENOBUFS;
1642                         goto out;
1643                 }
1644         }
1645
1646         /* Clean up old vif stuff */
1647         if (ath9k_uses_beacons(vif->type))
1648                 ath9k_reclaim_beacon(sc, vif);
1649
1650         /* Add new settings */
1651         vif->type = new_type;
1652         vif->p2p = p2p;
1653
1654         ath9k_do_vif_add_setup(hw, vif);
1655 out:
1656         mutex_unlock(&sc->mutex);
1657         return ret;
1658 }
1659
1660 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1661                                    struct ieee80211_vif *vif)
1662 {
1663         struct ath_wiphy *aphy = hw->priv;
1664         struct ath_softc *sc = aphy->sc;
1665         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1666
1667         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1668
1669         mutex_lock(&sc->mutex);
1670
1671         sc->nvifs--;
1672
1673         /* Reclaim beacon resources */
1674         if (ath9k_uses_beacons(vif->type))
1675                 ath9k_reclaim_beacon(sc, vif);
1676
1677         ath9k_calculate_summary_state(hw, NULL);
1678
1679         mutex_unlock(&sc->mutex);
1680 }
1681
1682 static void ath9k_enable_ps(struct ath_softc *sc)
1683 {
1684         struct ath_hw *ah = sc->sc_ah;
1685
1686         sc->ps_enabled = true;
1687         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1688                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1689                         ah->imask |= ATH9K_INT_TIM_TIMER;
1690                         ath9k_hw_set_interrupts(ah, ah->imask);
1691                 }
1692                 ath9k_hw_setrxabort(ah, 1);
1693         }
1694 }
1695
1696 static void ath9k_disable_ps(struct ath_softc *sc)
1697 {
1698         struct ath_hw *ah = sc->sc_ah;
1699
1700         sc->ps_enabled = false;
1701         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1702         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1703                 ath9k_hw_setrxabort(ah, 0);
1704                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1705                                   PS_WAIT_FOR_CAB |
1706                                   PS_WAIT_FOR_PSPOLL_DATA |
1707                                   PS_WAIT_FOR_TX_ACK);
1708                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1709                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1710                         ath9k_hw_set_interrupts(ah, ah->imask);
1711                 }
1712         }
1713
1714 }
1715
1716 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1717 {
1718         struct ath_wiphy *aphy = hw->priv;
1719         struct ath_softc *sc = aphy->sc;
1720         struct ath_hw *ah = sc->sc_ah;
1721         struct ath_common *common = ath9k_hw_common(ah);
1722         struct ieee80211_conf *conf = &hw->conf;
1723         bool disable_radio;
1724
1725         mutex_lock(&sc->mutex);
1726
1727         /*
1728          * Leave this as the first check because we need to turn on the
1729          * radio if it was disabled before prior to processing the rest
1730          * of the changes. Likewise we must only disable the radio towards
1731          * the end.
1732          */
1733         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1734                 bool enable_radio;
1735                 bool all_wiphys_idle;
1736                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1737
1738                 spin_lock_bh(&sc->wiphy_lock);
1739                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1740                 ath9k_set_wiphy_idle(aphy, idle);
1741
1742                 enable_radio = (!idle && all_wiphys_idle);
1743
1744                 /*
1745                  * After we unlock here its possible another wiphy
1746                  * can be re-renabled so to account for that we will
1747                  * only disable the radio toward the end of this routine
1748                  * if by then all wiphys are still idle.
1749                  */
1750                 spin_unlock_bh(&sc->wiphy_lock);
1751
1752                 if (enable_radio) {
1753                         sc->ps_idle = false;
1754                         ath_radio_enable(sc, hw);
1755                         ath_dbg(common, ATH_DBG_CONFIG,
1756                                 "not-idle: enabling radio\n");
1757                 }
1758         }
1759
1760         /*
1761          * We just prepare to enable PS. We have to wait until our AP has
1762          * ACK'd our null data frame to disable RX otherwise we'll ignore
1763          * those ACKs and end up retransmitting the same null data frames.
1764          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1765          */
1766         if (changed & IEEE80211_CONF_CHANGE_PS) {
1767                 unsigned long flags;
1768                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1769                 if (conf->flags & IEEE80211_CONF_PS)
1770                         ath9k_enable_ps(sc);
1771                 else
1772                         ath9k_disable_ps(sc);
1773                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1774         }
1775
1776         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1777                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1778                         ath_dbg(common, ATH_DBG_CONFIG,
1779                                 "Monitor mode is enabled\n");
1780                         sc->sc_ah->is_monitoring = true;
1781                 } else {
1782                         ath_dbg(common, ATH_DBG_CONFIG,
1783                                 "Monitor mode is disabled\n");
1784                         sc->sc_ah->is_monitoring = false;
1785                 }
1786         }
1787
1788         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1789                 struct ieee80211_channel *curchan = hw->conf.channel;
1790                 int pos = curchan->hw_value;
1791                 int old_pos = -1;
1792                 unsigned long flags;
1793
1794                 if (ah->curchan)
1795                         old_pos = ah->curchan - &ah->channels[0];
1796
1797                 aphy->chan_idx = pos;
1798                 aphy->chan_is_ht = conf_is_ht(conf);
1799                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1800                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1801                 else
1802                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1803
1804                 if (aphy->state == ATH_WIPHY_SCAN ||
1805                     aphy->state == ATH_WIPHY_ACTIVE)
1806                         ath9k_wiphy_pause_all_forced(sc, aphy);
1807                 else {
1808                         /*
1809                          * Do not change operational channel based on a paused
1810                          * wiphy changes.
1811                          */
1812                         goto skip_chan_change;
1813                 }
1814
1815                 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1816                         curchan->center_freq);
1817
1818                 /* XXX: remove me eventualy */
1819                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1820
1821                 /* update survey stats for the old channel before switching */
1822                 spin_lock_irqsave(&common->cc_lock, flags);
1823                 ath_update_survey_stats(sc);
1824                 spin_unlock_irqrestore(&common->cc_lock, flags);
1825
1826                 /*
1827                  * If the operating channel changes, change the survey in-use flags
1828                  * along with it.
1829                  * Reset the survey data for the new channel, unless we're switching
1830                  * back to the operating channel from an off-channel operation.
1831                  */
1832                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1833                     sc->cur_survey != &sc->survey[pos]) {
1834
1835                         if (sc->cur_survey)
1836                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1837
1838                         sc->cur_survey = &sc->survey[pos];
1839
1840                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1841                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1842                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1843                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1844                 }
1845
1846                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1847                         ath_err(common, "Unable to set channel\n");
1848                         mutex_unlock(&sc->mutex);
1849                         return -EINVAL;
1850                 }
1851
1852                 /*
1853                  * The most recent snapshot of channel->noisefloor for the old
1854                  * channel is only available after the hardware reset. Copy it to
1855                  * the survey stats now.
1856                  */
1857                 if (old_pos >= 0)
1858                         ath_update_survey_nf(sc, old_pos);
1859         }
1860
1861 skip_chan_change:
1862         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1863                 sc->config.txpowlimit = 2 * conf->power_level;
1864                 ath_update_txpow(sc);
1865         }
1866
1867         spin_lock_bh(&sc->wiphy_lock);
1868         disable_radio = ath9k_all_wiphys_idle(sc);
1869         spin_unlock_bh(&sc->wiphy_lock);
1870
1871         if (disable_radio) {
1872                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1873                 sc->ps_idle = true;
1874                 ath_radio_disable(sc, hw);
1875         }
1876
1877         mutex_unlock(&sc->mutex);
1878
1879         return 0;
1880 }
1881
1882 #define SUPPORTED_FILTERS                       \
1883         (FIF_PROMISC_IN_BSS |                   \
1884         FIF_ALLMULTI |                          \
1885         FIF_CONTROL |                           \
1886         FIF_PSPOLL |                            \
1887         FIF_OTHER_BSS |                         \
1888         FIF_BCN_PRBRESP_PROMISC |               \
1889         FIF_PROBE_REQ |                         \
1890         FIF_FCSFAIL)
1891
1892 /* FIXME: sc->sc_full_reset ? */
1893 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1894                                    unsigned int changed_flags,
1895                                    unsigned int *total_flags,
1896                                    u64 multicast)
1897 {
1898         struct ath_wiphy *aphy = hw->priv;
1899         struct ath_softc *sc = aphy->sc;
1900         u32 rfilt;
1901
1902         changed_flags &= SUPPORTED_FILTERS;
1903         *total_flags &= SUPPORTED_FILTERS;
1904
1905         sc->rx.rxfilter = *total_flags;
1906         ath9k_ps_wakeup(sc);
1907         rfilt = ath_calcrxfilter(sc);
1908         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1909         ath9k_ps_restore(sc);
1910
1911         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1912                 "Set HW RX filter: 0x%x\n", rfilt);
1913 }
1914
1915 static int ath9k_sta_add(struct ieee80211_hw *hw,
1916                          struct ieee80211_vif *vif,
1917                          struct ieee80211_sta *sta)
1918 {
1919         struct ath_wiphy *aphy = hw->priv;
1920         struct ath_softc *sc = aphy->sc;
1921
1922         ath_node_attach(sc, sta);
1923
1924         return 0;
1925 }
1926
1927 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1928                             struct ieee80211_vif *vif,
1929                             struct ieee80211_sta *sta)
1930 {
1931         struct ath_wiphy *aphy = hw->priv;
1932         struct ath_softc *sc = aphy->sc;
1933
1934         ath_node_detach(sc, sta);
1935
1936         return 0;
1937 }
1938
1939 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1940                          const struct ieee80211_tx_queue_params *params)
1941 {
1942         struct ath_wiphy *aphy = hw->priv;
1943         struct ath_softc *sc = aphy->sc;
1944         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1945         struct ath_txq *txq;
1946         struct ath9k_tx_queue_info qi;
1947         int ret = 0;
1948
1949         if (queue >= WME_NUM_AC)
1950                 return 0;
1951
1952         txq = sc->tx.txq_map[queue];
1953
1954         mutex_lock(&sc->mutex);
1955
1956         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1957
1958         qi.tqi_aifs = params->aifs;
1959         qi.tqi_cwmin = params->cw_min;
1960         qi.tqi_cwmax = params->cw_max;
1961         qi.tqi_burstTime = params->txop;
1962
1963         ath_dbg(common, ATH_DBG_CONFIG,
1964                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1965                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1966                 params->cw_max, params->txop);
1967
1968         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1969         if (ret)
1970                 ath_err(common, "TXQ Update failed\n");
1971
1972         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1973                 if (queue == WME_AC_BE && !ret)
1974                         ath_beaconq_config(sc);
1975
1976         mutex_unlock(&sc->mutex);
1977
1978         return ret;
1979 }
1980
1981 static int ath9k_set_key(struct ieee80211_hw *hw,
1982                          enum set_key_cmd cmd,
1983                          struct ieee80211_vif *vif,
1984                          struct ieee80211_sta *sta,
1985                          struct ieee80211_key_conf *key)
1986 {
1987         struct ath_wiphy *aphy = hw->priv;
1988         struct ath_softc *sc = aphy->sc;
1989         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1990         int ret = 0;
1991
1992         if (ath9k_modparam_nohwcrypt)
1993                 return -ENOSPC;
1994
1995         mutex_lock(&sc->mutex);
1996         ath9k_ps_wakeup(sc);
1997         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1998
1999         switch (cmd) {
2000         case SET_KEY:
2001                 ret = ath_key_config(common, vif, sta, key);
2002                 if (ret >= 0) {
2003                         key->hw_key_idx = ret;
2004                         /* push IV and Michael MIC generation to stack */
2005                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
2006                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
2007                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
2008                         if (sc->sc_ah->sw_mgmt_crypto &&
2009                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
2010                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
2011                         ret = 0;
2012                 }
2013                 break;
2014         case DISABLE_KEY:
2015                 ath_key_delete(common, key);
2016                 break;
2017         default:
2018                 ret = -EINVAL;
2019         }
2020
2021         ath9k_ps_restore(sc);
2022         mutex_unlock(&sc->mutex);
2023
2024         return ret;
2025 }
2026
2027 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2028                                    struct ieee80211_vif *vif,
2029                                    struct ieee80211_bss_conf *bss_conf,
2030                                    u32 changed)
2031 {
2032         struct ath_wiphy *aphy = hw->priv;
2033         struct ath_softc *sc = aphy->sc;
2034         struct ath_hw *ah = sc->sc_ah;
2035         struct ath_common *common = ath9k_hw_common(ah);
2036         struct ath_vif *avp = (void *)vif->drv_priv;
2037         int slottime;
2038         int error;
2039
2040         mutex_lock(&sc->mutex);
2041
2042         if (changed & BSS_CHANGED_BSSID) {
2043                 /* Set BSSID */
2044                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2045                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
2046                 common->curaid = 0;
2047                 ath9k_hw_write_associd(ah);
2048
2049                 /* Set aggregation protection mode parameters */
2050                 sc->config.ath_aggr_prot = 0;
2051
2052                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
2053                         common->curbssid, common->curaid);
2054
2055                 /* need to reconfigure the beacon */
2056                 sc->sc_flags &= ~SC_OP_BEACONS ;
2057         }
2058
2059         /* Enable transmission of beacons (AP, IBSS, MESH) */
2060         if ((changed & BSS_CHANGED_BEACON) ||
2061             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2062                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2063                 error = ath_beacon_alloc(aphy, vif);
2064                 if (!error)
2065                         ath_beacon_config(sc, vif);
2066         }
2067
2068         if (changed & BSS_CHANGED_ERP_SLOT) {
2069                 if (bss_conf->use_short_slot)
2070                         slottime = 9;
2071                 else
2072                         slottime = 20;
2073                 if (vif->type == NL80211_IFTYPE_AP) {
2074                         /*
2075                          * Defer update, so that connected stations can adjust
2076                          * their settings at the same time.
2077                          * See beacon.c for more details
2078                          */
2079                         sc->beacon.slottime = slottime;
2080                         sc->beacon.updateslot = UPDATE;
2081                 } else {
2082                         ah->slottime = slottime;
2083                         ath9k_hw_init_global_settings(ah);
2084                 }
2085         }
2086
2087         /* Disable transmission of beacons */
2088         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
2089                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2090
2091         if (changed & BSS_CHANGED_BEACON_INT) {
2092                 sc->beacon_interval = bss_conf->beacon_int;
2093                 /*
2094                  * In case of AP mode, the HW TSF has to be reset
2095                  * when the beacon interval changes.
2096                  */
2097                 if (vif->type == NL80211_IFTYPE_AP) {
2098                         sc->sc_flags |= SC_OP_TSF_RESET;
2099                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2100                         error = ath_beacon_alloc(aphy, vif);
2101                         if (!error)
2102                                 ath_beacon_config(sc, vif);
2103                 } else {
2104                         ath_beacon_config(sc, vif);
2105                 }
2106         }
2107
2108         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2109                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2110                         bss_conf->use_short_preamble);
2111                 if (bss_conf->use_short_preamble)
2112                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2113                 else
2114                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2115         }
2116
2117         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2118                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2119                         bss_conf->use_cts_prot);
2120                 if (bss_conf->use_cts_prot &&
2121                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2122                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2123                 else
2124                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2125         }
2126
2127         if (changed & BSS_CHANGED_ASSOC) {
2128                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
2129                         bss_conf->assoc);
2130                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
2131         }
2132
2133         mutex_unlock(&sc->mutex);
2134 }
2135
2136 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2137 {
2138         u64 tsf;
2139         struct ath_wiphy *aphy = hw->priv;
2140         struct ath_softc *sc = aphy->sc;
2141
2142         mutex_lock(&sc->mutex);
2143         ath9k_ps_wakeup(sc);
2144         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2145         ath9k_ps_restore(sc);
2146         mutex_unlock(&sc->mutex);
2147
2148         return tsf;
2149 }
2150
2151 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2152 {
2153         struct ath_wiphy *aphy = hw->priv;
2154         struct ath_softc *sc = aphy->sc;
2155
2156         mutex_lock(&sc->mutex);
2157         ath9k_ps_wakeup(sc);
2158         ath9k_hw_settsf64(sc->sc_ah, tsf);
2159         ath9k_ps_restore(sc);
2160         mutex_unlock(&sc->mutex);
2161 }
2162
2163 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2164 {
2165         struct ath_wiphy *aphy = hw->priv;
2166         struct ath_softc *sc = aphy->sc;
2167
2168         mutex_lock(&sc->mutex);
2169
2170         ath9k_ps_wakeup(sc);
2171         ath9k_hw_reset_tsf(sc->sc_ah);
2172         ath9k_ps_restore(sc);
2173
2174         mutex_unlock(&sc->mutex);
2175 }
2176
2177 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2178                               struct ieee80211_vif *vif,
2179                               enum ieee80211_ampdu_mlme_action action,
2180                               struct ieee80211_sta *sta,
2181                               u16 tid, u16 *ssn, u8 buf_size)
2182 {
2183         struct ath_wiphy *aphy = hw->priv;
2184         struct ath_softc *sc = aphy->sc;
2185         int ret = 0;
2186
2187         local_bh_disable();
2188
2189         switch (action) {
2190         case IEEE80211_AMPDU_RX_START:
2191                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2192                         ret = -ENOTSUPP;
2193                 break;
2194         case IEEE80211_AMPDU_RX_STOP:
2195                 break;
2196         case IEEE80211_AMPDU_TX_START:
2197                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2198                         return -EOPNOTSUPP;
2199
2200                 ath9k_ps_wakeup(sc);
2201                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2202                 if (!ret)
2203                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2204                 ath9k_ps_restore(sc);
2205                 break;
2206         case IEEE80211_AMPDU_TX_STOP:
2207                 ath9k_ps_wakeup(sc);
2208                 ath_tx_aggr_stop(sc, sta, tid);
2209                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2210                 ath9k_ps_restore(sc);
2211                 break;
2212         case IEEE80211_AMPDU_TX_OPERATIONAL:
2213                 ath9k_ps_wakeup(sc);
2214                 ath_tx_aggr_resume(sc, sta, tid);
2215                 ath9k_ps_restore(sc);
2216                 break;
2217         default:
2218                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2219         }
2220
2221         local_bh_enable();
2222
2223         return ret;
2224 }
2225
2226 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2227                              struct survey_info *survey)
2228 {
2229         struct ath_wiphy *aphy = hw->priv;
2230         struct ath_softc *sc = aphy->sc;
2231         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2232         struct ieee80211_supported_band *sband;
2233         struct ieee80211_channel *chan;
2234         unsigned long flags;
2235         int pos;
2236
2237         spin_lock_irqsave(&common->cc_lock, flags);
2238         if (idx == 0)
2239                 ath_update_survey_stats(sc);
2240
2241         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2242         if (sband && idx >= sband->n_channels) {
2243                 idx -= sband->n_channels;
2244                 sband = NULL;
2245         }
2246
2247         if (!sband)
2248                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2249
2250         if (!sband || idx >= sband->n_channels) {
2251                 spin_unlock_irqrestore(&common->cc_lock, flags);
2252                 return -ENOENT;
2253         }
2254
2255         chan = &sband->channels[idx];
2256         pos = chan->hw_value;
2257         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2258         survey->channel = chan;
2259         spin_unlock_irqrestore(&common->cc_lock, flags);
2260
2261         return 0;
2262 }
2263
2264 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2265 {
2266         struct ath_wiphy *aphy = hw->priv;
2267         struct ath_softc *sc = aphy->sc;
2268
2269         mutex_lock(&sc->mutex);
2270         if (ath9k_wiphy_scanning(sc)) {
2271                 /*
2272                  * There is a race here in mac80211 but fixing it requires
2273                  * we revisit how we handle the scan complete callback.
2274                  * After mac80211 fixes we will not have configured hardware
2275                  * to the home channel nor would we have configured the RX
2276                  * filter yet.
2277                  */
2278                 mutex_unlock(&sc->mutex);
2279                 return;
2280         }
2281
2282         aphy->state = ATH_WIPHY_SCAN;
2283         ath9k_wiphy_pause_all_forced(sc, aphy);
2284         mutex_unlock(&sc->mutex);
2285 }
2286
2287 /*
2288  * XXX: this requires a revisit after the driver
2289  * scan_complete gets moved to another place/removed in mac80211.
2290  */
2291 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2292 {
2293         struct ath_wiphy *aphy = hw->priv;
2294         struct ath_softc *sc = aphy->sc;
2295
2296         mutex_lock(&sc->mutex);
2297         aphy->state = ATH_WIPHY_ACTIVE;
2298         mutex_unlock(&sc->mutex);
2299 }
2300
2301 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2302 {
2303         struct ath_wiphy *aphy = hw->priv;
2304         struct ath_softc *sc = aphy->sc;
2305         struct ath_hw *ah = sc->sc_ah;
2306
2307         mutex_lock(&sc->mutex);
2308         ah->coverage_class = coverage_class;
2309         ath9k_hw_init_global_settings(ah);
2310         mutex_unlock(&sc->mutex);
2311 }
2312
2313 struct ieee80211_ops ath9k_ops = {
2314         .tx                 = ath9k_tx,
2315         .start              = ath9k_start,
2316         .stop               = ath9k_stop,
2317         .add_interface      = ath9k_add_interface,
2318         .change_interface   = ath9k_change_interface,
2319         .remove_interface   = ath9k_remove_interface,
2320         .config             = ath9k_config,
2321         .configure_filter   = ath9k_configure_filter,
2322         .sta_add            = ath9k_sta_add,
2323         .sta_remove         = ath9k_sta_remove,
2324         .conf_tx            = ath9k_conf_tx,
2325         .bss_info_changed   = ath9k_bss_info_changed,
2326         .set_key            = ath9k_set_key,
2327         .get_tsf            = ath9k_get_tsf,
2328         .set_tsf            = ath9k_set_tsf,
2329         .reset_tsf          = ath9k_reset_tsf,
2330         .ampdu_action       = ath9k_ampdu_action,
2331         .get_survey         = ath9k_get_survey,
2332         .sw_scan_start      = ath9k_sw_scan_start,
2333         .sw_scan_complete   = ath9k_sw_scan_complete,
2334         .rfkill_poll        = ath9k_rfkill_poll_state,
2335         .set_coverage_class = ath9k_set_coverage_class,
2336 };