drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  68                                                 struct ieee80211_hw *hw)
  69 {
  70         struct ieee80211_channel *curchan = hw->conf.channel;
  71         struct ath9k_channel *channel;
  72         u8 chan_idx;
  73
  74         chan_idx = curchan->hw_value;
  75         channel = &sc->sc_ah->channels[chan_idx];
  76         ath9k_update_ichannel(sc, hw, channel);
  77         return channel;
  78 }
  79
  80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath9k_ps_wakeup(struct ath_softc *sc)
  93 {
  94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  95         unsigned long flags;
  96         enum ath9k_power_mode power_mode;
  97
  98         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  99         if (++sc->ps_usecount != 1)
 100                 goto unlock;
 101
 102         power_mode = sc->sc_ah->power_mode;
 103         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 104
 105         /*
 106          * While the hardware is asleep, the cycle counters contain no
 107          * useful data. Better clear them now so that they don't mess up
 108          * survey data results.
 109          */
 110         if (power_mode != ATH9K_PM_AWAKE) {
 111                 spin_lock(&common->cc_lock);
 112                 ath_hw_cycle_counters_update(common);
 113                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 114                 spin_unlock(&common->cc_lock);
 115         }
 116
 117  unlock:
 118         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 119 }
 120
 121 void ath9k_ps_restore(struct ath_softc *sc)
 122 {
 123         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (--sc->ps_usecount != 0)
 128                 goto unlock;
 129
 130         spin_lock(&common->cc_lock);
 131         ath_hw_cycle_counters_update(common);
 132         spin_unlock(&common->cc_lock);
 133
 134         if (sc->ps_idle)
 135                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 136         else if (sc->ps_enabled &&
 137                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 138                               PS_WAIT_FOR_CAB |
 139                               PS_WAIT_FOR_PSPOLL_DATA |
 140                               PS_WAIT_FOR_TX_ACK)))
 141                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 142
 143  unlock:
 144         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 145 }
 146
 147 static void ath_start_ani(struct ath_common *common)
 148 {
 149         struct ath_hw *ah = common->ah;
 150         unsigned long timestamp = jiffies_to_msecs(jiffies);
 151         struct ath_softc *sc = (struct ath_softc *) common->priv;
 152
 153         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 154                 return;
 155
 156         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 157                 return;
 158
 159         common->ani.longcal_timer = timestamp;
 160         common->ani.shortcal_timer = timestamp;
 161         common->ani.checkani_timer = timestamp;
 162
 163         mod_timer(&common->ani.timer,
 164                   jiffies +
 165                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 166 }
 167
 168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 169 {
 170         struct ath_hw *ah = sc->sc_ah;
 171         struct ath9k_channel *chan = &ah->channels[channel];
 172         struct survey_info *survey = &sc->survey[channel];
 173
 174         if (chan->noisefloor) {
 175                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 176                 survey->noise = chan->noisefloor;
 177         }
 178 }
 179
 180 static void ath_update_survey_stats(struct ath_softc *sc)
 181 {
 182         struct ath_hw *ah = sc->sc_ah;
 183         struct ath_common *common = ath9k_hw_common(ah);
 184         int pos = ah->curchan - &ah->channels[0];
 185         struct survey_info *survey = &sc->survey[pos];
 186         struct ath_cycle_counters *cc = &common->cc_survey;
 187         unsigned int div = common->clockrate * 1000;
 188
 189         if (!ah->curchan)
 190                 return;
 191
 192         if (ah->power_mode == ATH9K_PM_AWAKE)
 193                 ath_hw_cycle_counters_update(common);
 194
 195         if (cc->cycles > 0) {
 196                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 197                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 198                         SURVEY_INFO_CHANNEL_TIME_RX |
 199                         SURVEY_INFO_CHANNEL_TIME_TX;
 200                 survey->channel_time += cc->cycles / div;
 201                 survey->channel_time_busy += cc->rx_busy / div;
 202                 survey->channel_time_rx += cc->rx_frame / div;
 203                 survey->channel_time_tx += cc->tx_frame / div;
 204         }
 205         memset(cc, 0, sizeof(*cc));
 206
 207         ath_update_survey_nf(sc, pos);
 208 }
 209
 210 /*
 211  * Set/change channels.  If the channel is really being changed, it's done
 212  * by reseting the chip.  To accomplish this we must first cleanup any pending
 213  * DMA, then restart stuff.
 214 */
 215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 216                     struct ath9k_channel *hchan)
 217 {
 218         struct ath_wiphy *aphy = hw->priv;
 219         struct ath_hw *ah = sc->sc_ah;
 220         struct ath_common *common = ath9k_hw_common(ah);
 221         struct ieee80211_conf *conf = &common->hw->conf;
 222         bool fastcc = true, stopped;
 223         struct ieee80211_channel *channel = hw->conf.channel;
 224         struct ath9k_hw_cal_data *caldata = NULL;
 225         int r;
 226
 227         if (sc->sc_flags & SC_OP_INVALID)
 228                 return -EIO;
 229
 230         del_timer_sync(&common->ani.timer);
 231         cancel_work_sync(&sc->paprd_work);
 232         cancel_work_sync(&sc->hw_check_work);
 233         cancel_delayed_work_sync(&sc->tx_complete_work);
 234
 235         ath9k_ps_wakeup(sc);
 236
 237         spin_lock_bh(&sc->sc_pcu_lock);
 238
 239         /*
 240          * This is only performed if the channel settings have
 241          * actually changed.
 242          *
 243          * To switch channels clear any pending DMA operations;
 244          * wait long enough for the RX fifo to drain, reset the
 245          * hardware at the new frequency, and then re-enable
 246          * the relevant bits of the h/w.
 247          */
 248         ath9k_hw_disable_interrupts(ah);
 249         ath_drain_all_txq(sc, false);
 250
 251         stopped = ath_stoprecv(sc);
 252
 253         /* XXX: do not flush receive queue here. We don't want
 254          * to flush data frames already in queue because of
 255          * changing channel. */
 256
 257         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 258                 fastcc = false;
 259
 260         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 261                 caldata = &aphy->caldata;
 262
 263         ath_print(common, ATH_DBG_CONFIG,
 264                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 265                   sc->sc_ah->curchan->channel,
 266                   channel->center_freq, conf_is_ht40(conf),
 267                   fastcc);
 268
 269         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 270         if (r) {
 271                 ath_print(common, ATH_DBG_FATAL,
 272                           "Unable to reset channel (%u MHz), "
 273                           "reset status %d\n",
 274                           channel->center_freq, r);
 275                 goto ps_restore;
 276         }
 277
 278         if (ath_startrecv(sc) != 0) {
 279                 ath_print(common, ATH_DBG_FATAL,
 280                           "Unable to restart recv logic\n");
 281                 r = -EIO;
 282                 goto ps_restore;
 283         }
 284
 285         ath_update_txpow(sc);
 286         ath9k_hw_set_interrupts(ah, ah->imask);
 287
 288         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 289                 ath_beacon_config(sc, NULL);
 290                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 291                 ath_start_ani(common);
 292         }
 293
 294  ps_restore:
 295         spin_unlock_bh(&sc->sc_pcu_lock);
 296
 297         ath9k_ps_restore(sc);
 298         return r;
 299 }
 300
 301 static void ath_paprd_activate(struct ath_softc *sc)
 302 {
 303         struct ath_hw *ah = sc->sc_ah;
 304         struct ath9k_hw_cal_data *caldata = ah->caldata;
 305         struct ath_common *common = ath9k_hw_common(ah);
 306         int chain;
 307
 308         if (!caldata || !caldata->paprd_done)
 309                 return;
 310
 311         ath9k_ps_wakeup(sc);
 312         ar9003_paprd_enable(ah, false);
 313         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 314                 if (!(common->tx_chainmask & BIT(chain)))
 315                         continue;
 316
 317                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 318         }
 319
 320         ar9003_paprd_enable(ah, true);
 321         ath9k_ps_restore(sc);
 322 }
 323
 324 void ath_paprd_calibrate(struct work_struct *work)
 325 {
 326         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 327         struct ieee80211_hw *hw = sc->hw;
 328         struct ath_hw *ah = sc->sc_ah;
 329         struct ieee80211_hdr *hdr;
 330         struct sk_buff *skb = NULL;
 331         struct ieee80211_tx_info *tx_info;
 332         int band = hw->conf.channel->band;
 333         struct ieee80211_supported_band *sband = &sc->sbands[band];
 334         struct ath_tx_control txctl;
 335         struct ath9k_hw_cal_data *caldata = ah->caldata;
 336         struct ath_common *common = ath9k_hw_common(ah);
 337         int ftype;
 338         int chain_ok = 0;
 339         int chain;
 340         int len = 1800;
 341         int time_left;
 342         int i;
 343
 344         if (!caldata)
 345                 return;
 346
 347         skb = alloc_skb(len, GFP_KERNEL);
 348         if (!skb)
 349                 return;
 350
 351         tx_info = IEEE80211_SKB_CB(skb);
 352
 353         skb_put(skb, len);
 354         memset(skb->data, 0, len);
 355         hdr = (struct ieee80211_hdr *)skb->data;
 356         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 357         hdr->frame_control = cpu_to_le16(ftype);
 358         hdr->duration_id = cpu_to_le16(10);
 359         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 360         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 361         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 362
 363         memset(&txctl, 0, sizeof(txctl));
 364         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 365
 366         ath9k_ps_wakeup(sc);
 367         ar9003_paprd_init_table(ah);
 368         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 369                 if (!(common->tx_chainmask & BIT(chain)))
 370                         continue;
 371
 372                 chain_ok = 0;
 373                 memset(tx_info, 0, sizeof(*tx_info));
 374                 tx_info->band = band;
 375
 376                 for (i = 0; i < 4; i++) {
 377                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 378                         tx_info->control.rates[i].count = 6;
 379                 }
 380
 381                 init_completion(&sc->paprd_complete);
 382                 sc->paprd_pending = true;
 383                 ar9003_paprd_setup_gain_table(ah, chain);
 384                 txctl.paprd = BIT(chain);
 385                 if (ath_tx_start(hw, skb, &txctl) != 0)
 386                         break;
 387
 388                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 389                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 390                 sc->paprd_pending = false;
 391                 if (!time_left) {
 392                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 393                                   "Timeout waiting for paprd training on "
 394                                   "TX chain %d\n",
 395                                   chain);
 396                         goto fail_paprd;
 397                 }
 398
 399                 if (!ar9003_paprd_is_done(ah))
 400                         break;
 401
 402                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 403                         break;
 404
 405                 chain_ok = 1;
 406         }
 407         kfree_skb(skb);
 408
 409         if (chain_ok) {
 410                 caldata->paprd_done = true;
 411                 ath_paprd_activate(sc);
 412         }
 413
 414 fail_paprd:
 415         ath9k_ps_restore(sc);
 416 }
 417
 418 /*
 419  *  This routine performs the periodic noise floor calibration function
 420  *  that is used to adjust and optimize the chip performance.  This
 421  *  takes environmental changes (location, temperature) into account.
 422  *  When the task is complete, it reschedules itself depending on the
 423  *  appropriate interval that was calculated.
 424  */
 425 void ath_ani_calibrate(unsigned long data)
 426 {
 427         struct ath_softc *sc = (struct ath_softc *)data;
 428         struct ath_hw *ah = sc->sc_ah;
 429         struct ath_common *common = ath9k_hw_common(ah);
 430         bool longcal = false;
 431         bool shortcal = false;
 432         bool aniflag = false;
 433         unsigned int timestamp = jiffies_to_msecs(jiffies);
 434         u32 cal_interval, short_cal_interval, long_cal_interval;
 435         unsigned long flags;
 436
 437         if (ah->caldata && ah->caldata->nfcal_interference)
 438                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 439         else
 440                 long_cal_interval = ATH_LONG_CALINTERVAL;
 441
 442         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 443                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 444
 445         /* Only calibrate if awake */
 446         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 447                 goto set_timer;
 448
 449         ath9k_ps_wakeup(sc);
 450
 451         /* Long calibration runs independently of short calibration. */
 452         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 453                 longcal = true;
 454                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 455                 common->ani.longcal_timer = timestamp;
 456         }
 457
 458         /* Short calibration applies only while caldone is false */
 459         if (!common->ani.caldone) {
 460                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 461                         shortcal = true;
 462                         ath_print(common, ATH_DBG_ANI,
 463                                   "shortcal @%lu\n", jiffies);
 464                         common->ani.shortcal_timer = timestamp;
 465                         common->ani.resetcal_timer = timestamp;
 466                 }
 467         } else {
 468                 if ((timestamp - common->ani.resetcal_timer) >=
 469                     ATH_RESTART_CALINTERVAL) {
 470                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 471                         if (common->ani.caldone)
 472                                 common->ani.resetcal_timer = timestamp;
 473                 }
 474         }
 475
 476         /* Verify whether we must check ANI */
 477         if ((timestamp - common->ani.checkani_timer) >=
 478              ah->config.ani_poll_interval) {
 479                 aniflag = true;
 480                 common->ani.checkani_timer = timestamp;
 481         }
 482
 483         /* Skip all processing if there's nothing to do. */
 484         if (longcal || shortcal || aniflag) {
 485                 /* Call ANI routine if necessary */
 486                 if (aniflag) {
 487                         spin_lock_irqsave(&common->cc_lock, flags);
 488                         ath9k_hw_ani_monitor(ah, ah->curchan);
 489                         ath_update_survey_stats(sc);
 490                         spin_unlock_irqrestore(&common->cc_lock, flags);
 491                 }
 492
 493                 /* Perform calibration if necessary */
 494                 if (longcal || shortcal) {
 495                         common->ani.caldone =
 496                                 ath9k_hw_calibrate(ah,
 497                                                    ah->curchan,
 498                                                    common->rx_chainmask,
 499                                                    longcal);
 500                 }
 501         }
 502
 503         ath9k_ps_restore(sc);
 504
 505 set_timer:
 506         /*
 507         * Set timer interval based on previous results.
 508         * The interval must be the shortest necessary to satisfy ANI,
 509         * short calibration and long calibration.
 510         */
 511         cal_interval = ATH_LONG_CALINTERVAL;
 512         if (sc->sc_ah->config.enable_ani)
 513                 cal_interval = min(cal_interval,
 514                                    (u32)ah->config.ani_poll_interval);
 515         if (!common->ani.caldone)
 516                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 517
 518         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 519         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 520                 if (!ah->caldata->paprd_done)
 521                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 522                 else
 523                         ath_paprd_activate(sc);
 524         }
 525 }
 526
 527 /*
 528  * Update tx/rx chainmask. For legacy association,
 529  * hard code chainmask to 1x1, for 11n association, use
 530  * the chainmask configuration, for bt coexistence, use
 531  * the chainmask configuration even in legacy mode.
 532  */
 533 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 534 {
 535         struct ath_hw *ah = sc->sc_ah;
 536         struct ath_common *common = ath9k_hw_common(ah);
 537
 538         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
 539             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 540                 common->tx_chainmask = ah->caps.tx_chainmask;
 541                 common->rx_chainmask = ah->caps.rx_chainmask;
 542         } else {
 543                 common->tx_chainmask = 1;
 544                 common->rx_chainmask = 1;
 545         }
 546
 547         ath_print(common, ATH_DBG_CONFIG,
 548                   "tx chmask: %d, rx chmask: %d\n",
 549                   common->tx_chainmask,
 550                   common->rx_chainmask);
 551 }
 552
 553 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 554 {
 555         struct ath_node *an;
 556         struct ath_hw *ah = sc->sc_ah;
 557         an = (struct ath_node *)sta->drv_priv;
 558
 559         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 560                 sc->sc_flags |= SC_OP_ENABLE_APM;
 561
 562         if (sc->sc_flags & SC_OP_TXAGGR) {
 563                 ath_tx_node_init(sc, an);
 564                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 565                                      sta->ht_cap.ampdu_factor);
 566                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 567         }
 568 }
 569
 570 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 571 {
 572         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 573
 574         if (sc->sc_flags & SC_OP_TXAGGR)
 575                 ath_tx_node_cleanup(sc, an);
 576 }
 577
 578 void ath_hw_check(struct work_struct *work)
 579 {
 580         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 581         int i;
 582
 583         ath9k_ps_wakeup(sc);
 584
 585         for (i = 0; i < 3; i++) {
 586                 if (ath9k_hw_check_alive(sc->sc_ah))
 587                         goto out;
 588
 589                 msleep(1);
 590         }
 591         ath_reset(sc, true);
 592
 593 out:
 594         ath9k_ps_restore(sc);
 595 }
 596
 597 void ath9k_tasklet(unsigned long data)
 598 {
 599         struct ath_softc *sc = (struct ath_softc *)data;
 600         struct ath_hw *ah = sc->sc_ah;
 601         struct ath_common *common = ath9k_hw_common(ah);
 602
 603         u32 status = sc->intrstatus;
 604         u32 rxmask;
 605
 606         ath9k_ps_wakeup(sc);
 607
 608         if (status & ATH9K_INT_FATAL) {
 609                 ath_reset(sc, true);
 610                 ath9k_ps_restore(sc);
 611                 return;
 612         }
 613
 614         spin_lock_bh(&sc->sc_pcu_lock);
 615
 616         if (!ath9k_hw_check_alive(ah))
 617                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 618
 619         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 620                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 621                           ATH9K_INT_RXORN);
 622         else
 623                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 624
 625         if (status & rxmask) {
 626                 /* Check for high priority Rx first */
 627                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 628                     (status & ATH9K_INT_RXHP))
 629                         ath_rx_tasklet(sc, 0, true);
 630
 631                 ath_rx_tasklet(sc, 0, false);
 632         }
 633
 634         if (status & ATH9K_INT_TX) {
 635                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 636                         ath_tx_edma_tasklet(sc);
 637                 else
 638                         ath_tx_tasklet(sc);
 639         }
 640
 641         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 642                 /*
 643                  * TSF sync does not look correct; remain awake to sync with
 644                  * the next Beacon.
 645                  */
 646                 ath_print(common, ATH_DBG_PS,
 647                           "TSFOOR - Sync with next Beacon\n");
 648                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 649         }
 650
 651         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 652                 if (status & ATH9K_INT_GENTIMER)
 653                         ath_gen_timer_isr(sc->sc_ah);
 654
 655         /* re-enable hardware interrupt */
 656         ath9k_hw_enable_interrupts(ah);
 657
 658         spin_unlock_bh(&sc->sc_pcu_lock);
 659         ath9k_ps_restore(sc);
 660 }
 661
 662 irqreturn_t ath_isr(int irq, void *dev)
 663 {
 664 #define SCHED_INTR (                            \
 665                 ATH9K_INT_FATAL |               \
 666                 ATH9K_INT_RXORN |               \
 667                 ATH9K_INT_RXEOL |               \
 668                 ATH9K_INT_RX |                  \
 669                 ATH9K_INT_RXLP |                \
 670                 ATH9K_INT_RXHP |                \
 671                 ATH9K_INT_TX |                  \
 672                 ATH9K_INT_BMISS |               \
 673                 ATH9K_INT_CST |                 \
 674                 ATH9K_INT_TSFOOR |              \
 675                 ATH9K_INT_GENTIMER)
 676
 677         struct ath_softc *sc = dev;
 678         struct ath_hw *ah = sc->sc_ah;
 679         struct ath_common *common = ath9k_hw_common(ah);
 680         enum ath9k_int status;
 681         bool sched = false;
 682
 683         /*
 684          * The hardware is not ready/present, don't
 685          * touch anything. Note this can happen early
 686          * on if the IRQ is shared.
 687          */
 688         if (sc->sc_flags & SC_OP_INVALID)
 689                 return IRQ_NONE;
 690
 691
 692         /* shared irq, not for us */
 693
 694         if (!ath9k_hw_intrpend(ah))
 695                 return IRQ_NONE;
 696
 697         /*
 698          * Figure out the reason(s) for the interrupt.  Note
 699          * that the hal returns a pseudo-ISR that may include
 700          * bits we haven't explicitly enabled so we mask the
 701          * value to insure we only process bits we requested.
 702          */
 703         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 704         status &= ah->imask;    /* discard unasked-for bits */
 705
 706         /*
 707          * If there are no status bits set, then this interrupt was not
 708          * for me (should have been caught above).
 709          */
 710         if (!status)
 711                 return IRQ_NONE;
 712
 713         /* Cache the status */
 714         sc->intrstatus = status;
 715
 716         if (status & SCHED_INTR)
 717                 sched = true;
 718
 719         /*
 720          * If a FATAL or RXORN interrupt is received, we have to reset the
 721          * chip immediately.
 722          */
 723         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 724             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 725                 goto chip_reset;
 726
 727         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 728             (status & ATH9K_INT_BB_WATCHDOG)) {
 729
 730                 spin_lock(&common->cc_lock);
 731                 ath_hw_cycle_counters_update(common);
 732                 ar9003_hw_bb_watchdog_dbg_info(ah);
 733                 spin_unlock(&common->cc_lock);
 734
 735                 goto chip_reset;
 736         }
 737
 738         if (status & ATH9K_INT_SWBA)
 739                 tasklet_schedule(&sc->bcon_tasklet);
 740
 741         if (status & ATH9K_INT_TXURN)
 742                 ath9k_hw_updatetxtriglevel(ah, true);
 743
 744         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 745                 if (status & ATH9K_INT_RXEOL) {
 746                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 747                         ath9k_hw_set_interrupts(ah, ah->imask);
 748                 }
 749         }
 750
 751         if (status & ATH9K_INT_MIB) {
 752                 /*
 753                  * Disable interrupts until we service the MIB
 754                  * interrupt; otherwise it will continue to
 755                  * fire.
 756                  */
 757                 ath9k_hw_disable_interrupts(ah);
 758                 /*
 759                  * Let the hal handle the event. We assume
 760                  * it will clear whatever condition caused
 761                  * the interrupt.
 762                  */
 763                 spin_lock(&common->cc_lock);
 764                 ath9k_hw_proc_mib_event(ah);
 765                 spin_unlock(&common->cc_lock);
 766                 ath9k_hw_enable_interrupts(ah);
 767         }
 768
 769         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 770                 if (status & ATH9K_INT_TIM_TIMER) {
 771                         /* Clear RxAbort bit so that we can
 772                          * receive frames */
 773                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 774                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 775                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 776                 }
 777
 778 chip_reset:
 779
 780         ath_debug_stat_interrupt(sc, status);
 781
 782         if (sched) {
 783                 /* turn off every interrupt */
 784                 ath9k_hw_disable_interrupts(ah);
 785                 tasklet_schedule(&sc->intr_tq);
 786         }
 787
 788         return IRQ_HANDLED;
 789
 790 #undef SCHED_INTR
 791 }
 792
 793 static u32 ath_get_extchanmode(struct ath_softc *sc,
 794                                struct ieee80211_channel *chan,
 795                                enum nl80211_channel_type channel_type)
 796 {
 797         u32 chanmode = 0;
 798
 799         switch (chan->band) {
 800         case IEEE80211_BAND_2GHZ:
 801                 switch(channel_type) {
 802                 case NL80211_CHAN_NO_HT:
 803                 case NL80211_CHAN_HT20:
 804                         chanmode = CHANNEL_G_HT20;
 805                         break;
 806                 case NL80211_CHAN_HT40PLUS:
 807                         chanmode = CHANNEL_G_HT40PLUS;
 808                         break;
 809                 case NL80211_CHAN_HT40MINUS:
 810                         chanmode = CHANNEL_G_HT40MINUS;
 811                         break;
 812                 }
 813                 break;
 814         case IEEE80211_BAND_5GHZ:
 815                 switch(channel_type) {
 816                 case NL80211_CHAN_NO_HT:
 817                 case NL80211_CHAN_HT20:
 818                         chanmode = CHANNEL_A_HT20;
 819                         break;
 820                 case NL80211_CHAN_HT40PLUS:
 821                         chanmode = CHANNEL_A_HT40PLUS;
 822                         break;
 823                 case NL80211_CHAN_HT40MINUS:
 824                         chanmode = CHANNEL_A_HT40MINUS;
 825                         break;
 826                 }
 827                 break;
 828         default:
 829                 break;
 830         }
 831
 832         return chanmode;
 833 }
 834
 835 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 836                                  struct ieee80211_hw *hw,
 837                                  struct ieee80211_vif *vif,
 838                                  struct ieee80211_bss_conf *bss_conf)
 839 {
 840         struct ath_wiphy *aphy = hw->priv;
 841         struct ath_hw *ah = sc->sc_ah;
 842         struct ath_common *common = ath9k_hw_common(ah);
 843
 844         if (bss_conf->assoc) {
 845                 ath_print(common, ATH_DBG_CONFIG,
 846                           "Bss Info ASSOC %d, bssid: %pM\n",
 847                            bss_conf->aid, common->curbssid);
 848
 849                 /* New association, store aid */
 850                 common->curaid = bss_conf->aid;
 851                 ath9k_hw_write_associd(ah);
 852
 853                 /*
 854                  * Request a re-configuration of Beacon related timers
 855                  * on the receipt of the first Beacon frame (i.e.,
 856                  * after time sync with the AP).
 857                  */
 858                 sc->ps_flags |= PS_BEACON_SYNC;
 859
 860                 /* Configure the beacon */
 861                 ath_beacon_config(sc, vif);
 862
 863                 /* Reset rssi stats */
 864                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
 865                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 866
 867                 sc->sc_flags |= SC_OP_ANI_RUN;
 868                 ath_start_ani(common);
 869         } else {
 870                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 871                 common->curaid = 0;
 872                 /* Stop ANI */
 873                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 874                 del_timer_sync(&common->ani.timer);
 875         }
 876 }
 877
 878 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 879 {
 880         struct ath_hw *ah = sc->sc_ah;
 881         struct ath_common *common = ath9k_hw_common(ah);
 882         struct ieee80211_channel *channel = hw->conf.channel;
 883         int r;
 884
 885         ath9k_ps_wakeup(sc);
 886         spin_lock_bh(&sc->sc_pcu_lock);
 887
 888         ath9k_hw_configpcipowersave(ah, 0, 0);
 889
 890         if (!ah->curchan)
 891                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 892
 893         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 894         if (r) {
 895                 ath_print(common, ATH_DBG_FATAL,
 896                           "Unable to reset channel (%u MHz), "
 897                           "reset status %d\n",
 898                           channel->center_freq, r);
 899         }
 900
 901         ath_update_txpow(sc);
 902         if (ath_startrecv(sc) != 0) {
 903                 ath_print(common, ATH_DBG_FATAL,
 904                           "Unable to restart recv logic\n");
 905                 spin_unlock_bh(&sc->sc_pcu_lock);
 906                 return;
 907         }
 908         if (sc->sc_flags & SC_OP_BEACONS)
 909                 ath_beacon_config(sc, NULL);    /* restart beacons */
 910
 911         /* Re-Enable  interrupts */
 912         ath9k_hw_set_interrupts(ah, ah->imask);
 913
 914         /* Enable LED */
 915         ath9k_hw_cfg_output(ah, ah->led_pin,
 916                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 917         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 918
 919         ieee80211_wake_queues(hw);
 920         spin_unlock_bh(&sc->sc_pcu_lock);
 921
 922         ath9k_ps_restore(sc);
 923 }
 924
 925 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 926 {
 927         struct ath_hw *ah = sc->sc_ah;
 928         struct ieee80211_channel *channel = hw->conf.channel;
 929         int r;
 930
 931         ath9k_ps_wakeup(sc);
 932         spin_lock_bh(&sc->sc_pcu_lock);
 933
 934         ieee80211_stop_queues(hw);
 935
 936         /*
 937          * Keep the LED on when the radio is disabled
 938          * during idle unassociated state.
 939          */
 940         if (!sc->ps_idle) {
 941                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 942                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 943         }
 944
 945         /* Disable interrupts */
 946         ath9k_hw_disable_interrupts(ah);
 947
 948         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 949
 950         ath_stoprecv(sc);               /* turn off frame recv */
 951         ath_flushrecv(sc);              /* flush recv queue */
 952
 953         if (!ah->curchan)
 954                 ah->curchan = ath_get_curchannel(sc, hw);
 955
 956         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 957         if (r) {
 958                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 959                           "Unable to reset channel (%u MHz), "
 960                           "reset status %d\n",
 961                           channel->center_freq, r);
 962         }
 963
 964         ath9k_hw_phy_disable(ah);
 965
 966         ath9k_hw_configpcipowersave(ah, 1, 1);
 967
 968         spin_unlock_bh(&sc->sc_pcu_lock);
 969         ath9k_ps_restore(sc);
 970
 971         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 972 }
 973
 974 int ath_reset(struct ath_softc *sc, bool retry_tx)
 975 {
 976         struct ath_hw *ah = sc->sc_ah;
 977         struct ath_common *common = ath9k_hw_common(ah);
 978         struct ieee80211_hw *hw = sc->hw;
 979         int r;
 980
 981         /* Stop ANI */
 982         del_timer_sync(&common->ani.timer);
 983
 984         spin_lock_bh(&sc->sc_pcu_lock);
 985
 986         ieee80211_stop_queues(hw);
 987
 988         ath9k_hw_disable_interrupts(ah);
 989         ath_drain_all_txq(sc, retry_tx);
 990
 991         ath_stoprecv(sc);
 992         ath_flushrecv(sc);
 993
 994         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 995         if (r)
 996                 ath_print(common, ATH_DBG_FATAL,
 997                           "Unable to reset hardware; reset status %d\n", r);
 998
 999         if (ath_startrecv(sc) != 0)
1000                 ath_print(common, ATH_DBG_FATAL,
1001                           "Unable to start recv logic\n");
1002
1003         /*
1004          * We may be doing a reset in response to a request
1005          * that changes the channel so update any state that
1006          * might change as a result.
1007          */
1008         ath_update_txpow(sc);
1009
1010         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1011                 ath_beacon_config(sc, NULL);    /* restart beacons */
1012
1013         ath9k_hw_set_interrupts(ah, ah->imask);
1014
1015         if (retry_tx) {
1016                 int i;
1017                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1018                         if (ATH_TXQ_SETUP(sc, i)) {
1019                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1020                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1021                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1022                         }
1023                 }
1024         }
1025
1026         ieee80211_wake_queues(hw);
1027         spin_unlock_bh(&sc->sc_pcu_lock);
1028
1029         /* Start ANI */
1030         ath_start_ani(common);
1031
1032         return r;
1033 }
1034
1035 /* XXX: Remove me once we don't depend on ath9k_channel for all
1036  * this redundant data */
1037 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1038                            struct ath9k_channel *ichan)
1039 {
1040         struct ieee80211_channel *chan = hw->conf.channel;
1041         struct ieee80211_conf *conf = &hw->conf;
1042
1043         ichan->channel = chan->center_freq;
1044         ichan->chan = chan;
1045
1046         if (chan->band == IEEE80211_BAND_2GHZ) {
1047                 ichan->chanmode = CHANNEL_G;
1048                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1049         } else {
1050                 ichan->chanmode = CHANNEL_A;
1051                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1052         }
1053
1054         if (conf_is_ht(conf))
1055                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1056                                             conf->channel_type);
1057 }
1058
1059 /**********************/
1060 /* mac80211 callbacks */
1061 /**********************/
1062
1063 static int ath9k_start(struct ieee80211_hw *hw)
1064 {
1065         struct ath_wiphy *aphy = hw->priv;
1066         struct ath_softc *sc = aphy->sc;
1067         struct ath_hw *ah = sc->sc_ah;
1068         struct ath_common *common = ath9k_hw_common(ah);
1069         struct ieee80211_channel *curchan = hw->conf.channel;
1070         struct ath9k_channel *init_channel;
1071         int r;
1072
1073         ath_print(common, ATH_DBG_CONFIG,
1074                   "Starting driver with initial channel: %d MHz\n",
1075                   curchan->center_freq);
1076
1077         mutex_lock(&sc->mutex);
1078
1079         if (ath9k_wiphy_started(sc)) {
1080                 if (sc->chan_idx == curchan->hw_value) {
1081                         /*
1082                          * Already on the operational channel, the new wiphy
1083                          * can be marked active.
1084                          */
1085                         aphy->state = ATH_WIPHY_ACTIVE;
1086                         ieee80211_wake_queues(hw);
1087                 } else {
1088                         /*
1089                          * Another wiphy is on another channel, start the new
1090                          * wiphy in paused state.
1091                          */
1092                         aphy->state = ATH_WIPHY_PAUSED;
1093                         ieee80211_stop_queues(hw);
1094                 }
1095                 mutex_unlock(&sc->mutex);
1096                 return 0;
1097         }
1098         aphy->state = ATH_WIPHY_ACTIVE;
1099
1100         /* setup initial channel */
1101
1102         sc->chan_idx = curchan->hw_value;
1103
1104         init_channel = ath_get_curchannel(sc, hw);
1105
1106         /* Reset SERDES registers */
1107         ath9k_hw_configpcipowersave(ah, 0, 0);
1108
1109         /*
1110          * The basic interface to setting the hardware in a good
1111          * state is ``reset''.  On return the hardware is known to
1112          * be powered up and with interrupts disabled.  This must
1113          * be followed by initialization of the appropriate bits
1114          * and then setup of the interrupt mask.
1115          */
1116         spin_lock_bh(&sc->sc_pcu_lock);
1117         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1118         if (r) {
1119                 ath_print(common, ATH_DBG_FATAL,
1120                           "Unable to reset hardware; reset status %d "
1121                           "(freq %u MHz)\n", r,
1122                           curchan->center_freq);
1123                 spin_unlock_bh(&sc->sc_pcu_lock);
1124                 goto mutex_unlock;
1125         }
1126
1127         /*
1128          * This is needed only to setup initial state
1129          * but it's best done after a reset.
1130          */
1131         ath_update_txpow(sc);
1132
1133         /*
1134          * Setup the hardware after reset:
1135          * The receive engine is set going.
1136          * Frame transmit is handled entirely
1137          * in the frame output path; there's nothing to do
1138          * here except setup the interrupt mask.
1139          */
1140         if (ath_startrecv(sc) != 0) {
1141                 ath_print(common, ATH_DBG_FATAL,
1142                           "Unable to start recv logic\n");
1143                 r = -EIO;
1144                 spin_unlock_bh(&sc->sc_pcu_lock);
1145                 goto mutex_unlock;
1146         }
1147         spin_unlock_bh(&sc->sc_pcu_lock);
1148
1149         /* Setup our intr mask. */
1150         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1151                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1152                     ATH9K_INT_GLOBAL;
1153
1154         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1155                 ah->imask |= ATH9K_INT_RXHP |
1156                              ATH9K_INT_RXLP |
1157                              ATH9K_INT_BB_WATCHDOG;
1158         else
1159                 ah->imask |= ATH9K_INT_RX;
1160
1161         ah->imask |= ATH9K_INT_GTT;
1162
1163         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1164                 ah->imask |= ATH9K_INT_CST;
1165
1166         sc->sc_flags &= ~SC_OP_INVALID;
1167         sc->sc_ah->is_monitoring = false;
1168
1169         /* Disable BMISS interrupt when we're not associated */
1170         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1171         ath9k_hw_set_interrupts(ah, ah->imask);
1172
1173         ieee80211_wake_queues(hw);
1174
1175         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1176
1177         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1178             !ah->btcoex_hw.enabled) {
1179                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1180                                            AR_STOMP_LOW_WLAN_WGHT);
1181                 ath9k_hw_btcoex_enable(ah);
1182
1183                 if (common->bus_ops->bt_coex_prep)
1184                         common->bus_ops->bt_coex_prep(common);
1185                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1186                         ath9k_btcoex_timer_resume(sc);
1187         }
1188
1189         pm_qos_update_request(&sc->pm_qos_req, 55);
1190
1191 mutex_unlock:
1192         mutex_unlock(&sc->mutex);
1193
1194         return r;
1195 }
1196
1197 static int ath9k_tx(struct ieee80211_hw *hw,
1198                     struct sk_buff *skb)
1199 {
1200         struct ath_wiphy *aphy = hw->priv;
1201         struct ath_softc *sc = aphy->sc;
1202         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1203         struct ath_tx_control txctl;
1204         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1205
1206         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1207                 ath_print(common, ATH_DBG_XMIT,
1208                           "ath9k: %s: TX in unexpected wiphy state "
1209                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1210                 goto exit;
1211         }
1212
1213         if (sc->ps_enabled) {
1214                 /*
1215                  * mac80211 does not set PM field for normal data frames, so we
1216                  * need to update that based on the current PS mode.
1217                  */
1218                 if (ieee80211_is_data(hdr->frame_control) &&
1219                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1220                     !ieee80211_has_pm(hdr->frame_control)) {
1221                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1222                                   "while in PS mode\n");
1223                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1224                 }
1225         }
1226
1227         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1228                 /*
1229                  * We are using PS-Poll and mac80211 can request TX while in
1230                  * power save mode. Need to wake up hardware for the TX to be
1231                  * completed and if needed, also for RX of buffered frames.
1232                  */
1233                 ath9k_ps_wakeup(sc);
1234                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1235                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1236                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1237                         ath_print(common, ATH_DBG_PS,
1238                                   "Sending PS-Poll to pick a buffered frame\n");
1239                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1240                 } else {
1241                         ath_print(common, ATH_DBG_PS,
1242                                   "Wake up to complete TX\n");
1243                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1244                 }
1245                 /*
1246                  * The actual restore operation will happen only after
1247                  * the sc_flags bit is cleared. We are just dropping
1248                  * the ps_usecount here.
1249                  */
1250                 ath9k_ps_restore(sc);
1251         }
1252
1253         memset(&txctl, 0, sizeof(struct ath_tx_control));
1254         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1255
1256         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1257
1258         if (ath_tx_start(hw, skb, &txctl) != 0) {
1259                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1260                 goto exit;
1261         }
1262
1263         return 0;
1264 exit:
1265         dev_kfree_skb_any(skb);
1266         return 0;
1267 }
1268
1269 static void ath9k_stop(struct ieee80211_hw *hw)
1270 {
1271         struct ath_wiphy *aphy = hw->priv;
1272         struct ath_softc *sc = aphy->sc;
1273         struct ath_hw *ah = sc->sc_ah;
1274         struct ath_common *common = ath9k_hw_common(ah);
1275         int i;
1276
1277         mutex_lock(&sc->mutex);
1278
1279         aphy->state = ATH_WIPHY_INACTIVE;
1280
1281         if (led_blink)
1282                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1283
1284         cancel_delayed_work_sync(&sc->tx_complete_work);
1285         cancel_work_sync(&sc->paprd_work);
1286         cancel_work_sync(&sc->hw_check_work);
1287
1288         for (i = 0; i < sc->num_sec_wiphy; i++) {
1289                 if (sc->sec_wiphy[i])
1290                         break;
1291         }
1292
1293         if (i == sc->num_sec_wiphy) {
1294                 cancel_delayed_work_sync(&sc->wiphy_work);
1295                 cancel_work_sync(&sc->chan_work);
1296         }
1297
1298         if (sc->sc_flags & SC_OP_INVALID) {
1299                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1300                 mutex_unlock(&sc->mutex);
1301                 return;
1302         }
1303
1304         if (ath9k_wiphy_started(sc)) {
1305                 mutex_unlock(&sc->mutex);
1306                 return; /* another wiphy still in use */
1307         }
1308
1309         /* Ensure HW is awake when we try to shut it down. */
1310         ath9k_ps_wakeup(sc);
1311
1312         if (ah->btcoex_hw.enabled) {
1313                 ath9k_hw_btcoex_disable(ah);
1314                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1315                         ath9k_btcoex_timer_pause(sc);
1316         }
1317
1318         spin_lock_bh(&sc->sc_pcu_lock);
1319
1320         /* make sure h/w will not generate any interrupt
1321          * before setting the invalid flag. */
1322         ath9k_hw_disable_interrupts(ah);
1323
1324         if (!(sc->sc_flags & SC_OP_INVALID)) {
1325                 ath_drain_all_txq(sc, false);
1326                 ath_stoprecv(sc);
1327                 ath9k_hw_phy_disable(ah);
1328         } else
1329                 sc->rx.rxlink = NULL;
1330
1331         /* disable HAL and put h/w to sleep */
1332         ath9k_hw_disable(ah);
1333         ath9k_hw_configpcipowersave(ah, 1, 1);
1334
1335         spin_unlock_bh(&sc->sc_pcu_lock);
1336
1337         ath9k_ps_restore(sc);
1338
1339         /* Finally, put the chip in FULL SLEEP mode */
1340         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1341
1342         sc->sc_flags |= SC_OP_INVALID;
1343
1344         pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1345
1346         mutex_unlock(&sc->mutex);
1347
1348         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1349 }
1350
1351 static int ath9k_add_interface(struct ieee80211_hw *hw,
1352                                struct ieee80211_vif *vif)
1353 {
1354         struct ath_wiphy *aphy = hw->priv;
1355         struct ath_softc *sc = aphy->sc;
1356         struct ath_hw *ah = sc->sc_ah;
1357         struct ath_common *common = ath9k_hw_common(ah);
1358         struct ath_vif *avp = (void *)vif->drv_priv;
1359         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1360         int ret = 0;
1361
1362         mutex_lock(&sc->mutex);
1363
1364         switch (vif->type) {
1365         case NL80211_IFTYPE_STATION:
1366                 ic_opmode = NL80211_IFTYPE_STATION;
1367                 break;
1368         case NL80211_IFTYPE_WDS:
1369                 ic_opmode = NL80211_IFTYPE_WDS;
1370                 break;
1371         case NL80211_IFTYPE_ADHOC:
1372         case NL80211_IFTYPE_AP:
1373         case NL80211_IFTYPE_MESH_POINT:
1374                 if (sc->nbcnvifs >= ATH_BCBUF) {
1375                         ret = -ENOBUFS;
1376                         goto out;
1377                 }
1378                 ic_opmode = vif->type;
1379                 break;
1380         default:
1381                 ath_print(common, ATH_DBG_FATAL,
1382                         "Interface type %d not yet supported\n", vif->type);
1383                 ret = -EOPNOTSUPP;
1384                 goto out;
1385         }
1386
1387         ath_print(common, ATH_DBG_CONFIG,
1388                   "Attach a VIF of type: %d\n", ic_opmode);
1389
1390         /* Set the VIF opmode */
1391         avp->av_opmode = ic_opmode;
1392         avp->av_bslot = -1;
1393
1394         sc->nvifs++;
1395
1396         ath9k_set_bssid_mask(hw, vif);
1397
1398         if (sc->nvifs > 1)
1399                 goto out; /* skip global settings for secondary vif */
1400
1401         if (ic_opmode == NL80211_IFTYPE_AP) {
1402                 ath9k_hw_set_tsfadjust(ah, 1);
1403                 sc->sc_flags |= SC_OP_TSF_RESET;
1404         }
1405
1406         /* Set the device opmode */
1407         ah->opmode = ic_opmode;
1408
1409         /*
1410          * Enable MIB interrupts when there are hardware phy counters.
1411          * Note we only do this (at the moment) for station mode.
1412          */
1413         if ((vif->type == NL80211_IFTYPE_STATION) ||
1414             (vif->type == NL80211_IFTYPE_ADHOC) ||
1415             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1416                 if (ah->config.enable_ani)
1417                         ah->imask |= ATH9K_INT_MIB;
1418                 ah->imask |= ATH9K_INT_TSFOOR;
1419         }
1420
1421         ath9k_hw_set_interrupts(ah, ah->imask);
1422
1423         if (vif->type == NL80211_IFTYPE_AP    ||
1424             vif->type == NL80211_IFTYPE_ADHOC) {
1425                 sc->sc_flags |= SC_OP_ANI_RUN;
1426                 ath_start_ani(common);
1427         }
1428
1429 out:
1430         mutex_unlock(&sc->mutex);
1431         return ret;
1432 }
1433
1434 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1435                                    struct ieee80211_vif *vif)
1436 {
1437         struct ath_wiphy *aphy = hw->priv;
1438         struct ath_softc *sc = aphy->sc;
1439         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1440         struct ath_vif *avp = (void *)vif->drv_priv;
1441         bool bs_valid = false;
1442         int i;
1443
1444         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1445
1446         mutex_lock(&sc->mutex);
1447
1448         /* Stop ANI */
1449         sc->sc_flags &= ~SC_OP_ANI_RUN;
1450         del_timer_sync(&common->ani.timer);
1451
1452         /* Reclaim beacon resources */
1453         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1454             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1455             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1456                 ath9k_ps_wakeup(sc);
1457                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1458                 ath9k_ps_restore(sc);
1459         }
1460
1461         ath_beacon_return(sc, avp);
1462         sc->sc_flags &= ~SC_OP_BEACONS;
1463
1464         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1465                 if (sc->beacon.bslot[i] == vif) {
1466                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1467                                "slot\n", __func__);
1468                         sc->beacon.bslot[i] = NULL;
1469                         sc->beacon.bslot_aphy[i] = NULL;
1470                 } else if (sc->beacon.bslot[i])
1471                         bs_valid = true;
1472         }
1473         if (!bs_valid && (sc->sc_ah->imask & ATH9K_INT_SWBA)) {
1474                 /* Disable SWBA interrupt */
1475                 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1476                 ath9k_ps_wakeup(sc);
1477                 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1478                 ath9k_ps_restore(sc);
1479         }
1480
1481         sc->nvifs--;
1482
1483         mutex_unlock(&sc->mutex);
1484 }
1485
1486 static void ath9k_enable_ps(struct ath_softc *sc)
1487 {
1488         struct ath_hw *ah = sc->sc_ah;
1489
1490         sc->ps_enabled = true;
1491         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1492                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1493                         ah->imask |= ATH9K_INT_TIM_TIMER;
1494                         ath9k_hw_set_interrupts(ah, ah->imask);
1495                 }
1496                 ath9k_hw_setrxabort(ah, 1);
1497         }
1498 }
1499
1500 static void ath9k_disable_ps(struct ath_softc *sc)
1501 {
1502         struct ath_hw *ah = sc->sc_ah;
1503
1504         sc->ps_enabled = false;
1505         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1506         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1507                 ath9k_hw_setrxabort(ah, 0);
1508                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1509                                   PS_WAIT_FOR_CAB |
1510                                   PS_WAIT_FOR_PSPOLL_DATA |
1511                                   PS_WAIT_FOR_TX_ACK);
1512                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1513                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1514                         ath9k_hw_set_interrupts(ah, ah->imask);
1515                 }
1516         }
1517
1518 }
1519
1520 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1521 {
1522         struct ath_wiphy *aphy = hw->priv;
1523         struct ath_softc *sc = aphy->sc;
1524         struct ath_hw *ah = sc->sc_ah;
1525         struct ath_common *common = ath9k_hw_common(ah);
1526         struct ieee80211_conf *conf = &hw->conf;
1527         bool disable_radio;
1528
1529         mutex_lock(&sc->mutex);
1530
1531         /*
1532          * Leave this as the first check because we need to turn on the
1533          * radio if it was disabled before prior to processing the rest
1534          * of the changes. Likewise we must only disable the radio towards
1535          * the end.
1536          */
1537         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1538                 bool enable_radio;
1539                 bool all_wiphys_idle;
1540                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1541
1542                 spin_lock_bh(&sc->wiphy_lock);
1543                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1544                 ath9k_set_wiphy_idle(aphy, idle);
1545
1546                 enable_radio = (!idle && all_wiphys_idle);
1547
1548                 /*
1549                  * After we unlock here its possible another wiphy
1550                  * can be re-renabled so to account for that we will
1551                  * only disable the radio toward the end of this routine
1552                  * if by then all wiphys are still idle.
1553                  */
1554                 spin_unlock_bh(&sc->wiphy_lock);
1555
1556                 if (enable_radio) {
1557                         sc->ps_idle = false;
1558                         ath_radio_enable(sc, hw);
1559                         ath_print(common, ATH_DBG_CONFIG,
1560                                   "not-idle: enabling radio\n");
1561                 }
1562         }
1563
1564         /*
1565          * We just prepare to enable PS. We have to wait until our AP has
1566          * ACK'd our null data frame to disable RX otherwise we'll ignore
1567          * those ACKs and end up retransmitting the same null data frames.
1568          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1569          */
1570         if (changed & IEEE80211_CONF_CHANGE_PS) {
1571                 unsigned long flags;
1572                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1573                 if (conf->flags & IEEE80211_CONF_PS)
1574                         ath9k_enable_ps(sc);
1575                 else
1576                         ath9k_disable_ps(sc);
1577                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1578         }
1579
1580         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1581                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1582                         ath_print(common, ATH_DBG_CONFIG,
1583                                   "Monitor mode is enabled\n");
1584                         sc->sc_ah->is_monitoring = true;
1585                 } else {
1586                         ath_print(common, ATH_DBG_CONFIG,
1587                                   "Monitor mode is disabled\n");
1588                         sc->sc_ah->is_monitoring = false;
1589                 }
1590         }
1591
1592         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1593                 struct ieee80211_channel *curchan = hw->conf.channel;
1594                 int pos = curchan->hw_value;
1595                 int old_pos = -1;
1596                 unsigned long flags;
1597
1598                 if (ah->curchan)
1599                         old_pos = ah->curchan - &ah->channels[0];
1600
1601                 aphy->chan_idx = pos;
1602                 aphy->chan_is_ht = conf_is_ht(conf);
1603                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1604                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1605                 else
1606                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1607
1608                 if (aphy->state == ATH_WIPHY_SCAN ||
1609                     aphy->state == ATH_WIPHY_ACTIVE)
1610                         ath9k_wiphy_pause_all_forced(sc, aphy);
1611                 else {
1612                         /*
1613                          * Do not change operational channel based on a paused
1614                          * wiphy changes.
1615                          */
1616                         goto skip_chan_change;
1617                 }
1618
1619                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1620                           curchan->center_freq);
1621
1622                 /* XXX: remove me eventualy */
1623                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1624
1625                 ath_update_chainmask(sc, conf_is_ht(conf));
1626
1627                 /* update survey stats for the old channel before switching */
1628                 spin_lock_irqsave(&common->cc_lock, flags);
1629                 ath_update_survey_stats(sc);
1630                 spin_unlock_irqrestore(&common->cc_lock, flags);
1631
1632                 /*
1633                  * If the operating channel changes, change the survey in-use flags
1634                  * along with it.
1635                  * Reset the survey data for the new channel, unless we're switching
1636                  * back to the operating channel from an off-channel operation.
1637                  */
1638                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1639                     sc->cur_survey != &sc->survey[pos]) {
1640
1641                         if (sc->cur_survey)
1642                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1643
1644                         sc->cur_survey = &sc->survey[pos];
1645
1646                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1647                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1648                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1649                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1650                 }
1651
1652                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1653                         ath_print(common, ATH_DBG_FATAL,
1654                                   "Unable to set channel\n");
1655                         mutex_unlock(&sc->mutex);
1656                         return -EINVAL;
1657                 }
1658
1659                 /*
1660                  * The most recent snapshot of channel->noisefloor for the old
1661                  * channel is only available after the hardware reset. Copy it to
1662                  * the survey stats now.
1663                  */
1664                 if (old_pos >= 0)
1665                         ath_update_survey_nf(sc, old_pos);
1666         }
1667
1668 skip_chan_change:
1669         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1670                 sc->config.txpowlimit = 2 * conf->power_level;
1671                 ath_update_txpow(sc);
1672         }
1673
1674         spin_lock_bh(&sc->wiphy_lock);
1675         disable_radio = ath9k_all_wiphys_idle(sc);
1676         spin_unlock_bh(&sc->wiphy_lock);
1677
1678         if (disable_radio) {
1679                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1680                 sc->ps_idle = true;
1681                 ath_radio_disable(sc, hw);
1682         }
1683
1684         mutex_unlock(&sc->mutex);
1685
1686         return 0;
1687 }
1688
1689 #define SUPPORTED_FILTERS                       \
1690         (FIF_PROMISC_IN_BSS |                   \
1691         FIF_ALLMULTI |                          \
1692         FIF_CONTROL |                           \
1693         FIF_PSPOLL |                            \
1694         FIF_OTHER_BSS |                         \
1695         FIF_BCN_PRBRESP_PROMISC |               \
1696         FIF_PROBE_REQ |                         \
1697         FIF_FCSFAIL)
1698
1699 /* FIXME: sc->sc_full_reset ? */
1700 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1701                                    unsigned int changed_flags,
1702                                    unsigned int *total_flags,
1703                                    u64 multicast)
1704 {
1705         struct ath_wiphy *aphy = hw->priv;
1706         struct ath_softc *sc = aphy->sc;
1707         u32 rfilt;
1708
1709         changed_flags &= SUPPORTED_FILTERS;
1710         *total_flags &= SUPPORTED_FILTERS;
1711
1712         sc->rx.rxfilter = *total_flags;
1713         ath9k_ps_wakeup(sc);
1714         rfilt = ath_calcrxfilter(sc);
1715         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1716         ath9k_ps_restore(sc);
1717
1718         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1719                   "Set HW RX filter: 0x%x\n", rfilt);
1720 }
1721
1722 static int ath9k_sta_add(struct ieee80211_hw *hw,
1723                          struct ieee80211_vif *vif,
1724                          struct ieee80211_sta *sta)
1725 {
1726         struct ath_wiphy *aphy = hw->priv;
1727         struct ath_softc *sc = aphy->sc;
1728
1729         ath_node_attach(sc, sta);
1730
1731         return 0;
1732 }
1733
1734 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1735                             struct ieee80211_vif *vif,
1736                             struct ieee80211_sta *sta)
1737 {
1738         struct ath_wiphy *aphy = hw->priv;
1739         struct ath_softc *sc = aphy->sc;
1740
1741         ath_node_detach(sc, sta);
1742
1743         return 0;
1744 }
1745
1746 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1747                          const struct ieee80211_tx_queue_params *params)
1748 {
1749         struct ath_wiphy *aphy = hw->priv;
1750         struct ath_softc *sc = aphy->sc;
1751         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1752         struct ath_txq *txq;
1753         struct ath9k_tx_queue_info qi;
1754         int ret = 0;
1755
1756         if (queue >= WME_NUM_AC)
1757                 return 0;
1758
1759         txq = sc->tx.txq_map[queue];
1760
1761         mutex_lock(&sc->mutex);
1762
1763         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1764
1765         qi.tqi_aifs = params->aifs;
1766         qi.tqi_cwmin = params->cw_min;
1767         qi.tqi_cwmax = params->cw_max;
1768         qi.tqi_burstTime = params->txop;
1769
1770         ath_print(common, ATH_DBG_CONFIG,
1771                   "Configure tx [queue/halq] [%d/%d],  "
1772                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1773                   queue, txq->axq_qnum, params->aifs, params->cw_min,
1774                   params->cw_max, params->txop);
1775
1776         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1777         if (ret)
1778                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1779
1780         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1781                 if (queue == WME_AC_BE && !ret)
1782                         ath_beaconq_config(sc);
1783
1784         mutex_unlock(&sc->mutex);
1785
1786         return ret;
1787 }
1788
1789 static int ath9k_set_key(struct ieee80211_hw *hw,
1790                          enum set_key_cmd cmd,
1791                          struct ieee80211_vif *vif,
1792                          struct ieee80211_sta *sta,
1793                          struct ieee80211_key_conf *key)
1794 {
1795         struct ath_wiphy *aphy = hw->priv;
1796         struct ath_softc *sc = aphy->sc;
1797         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1798         int ret = 0;
1799
1800         if (modparam_nohwcrypt)
1801                 return -ENOSPC;
1802
1803         mutex_lock(&sc->mutex);
1804         ath9k_ps_wakeup(sc);
1805         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1806
1807         switch (cmd) {
1808         case SET_KEY:
1809                 ret = ath_key_config(common, vif, sta, key);
1810                 if (ret >= 0) {
1811                         key->hw_key_idx = ret;
1812                         /* push IV and Michael MIC generation to stack */
1813                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1814                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1815                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1816                         if (sc->sc_ah->sw_mgmt_crypto &&
1817                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1818                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1819                         ret = 0;
1820                 }
1821                 break;
1822         case DISABLE_KEY:
1823                 ath_key_delete(common, key);
1824                 break;
1825         default:
1826                 ret = -EINVAL;
1827         }
1828
1829         ath9k_ps_restore(sc);
1830         mutex_unlock(&sc->mutex);
1831
1832         return ret;
1833 }
1834
1835 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1836                                    struct ieee80211_vif *vif,
1837                                    struct ieee80211_bss_conf *bss_conf,
1838                                    u32 changed)
1839 {
1840         struct ath_wiphy *aphy = hw->priv;
1841         struct ath_softc *sc = aphy->sc;
1842         struct ath_hw *ah = sc->sc_ah;
1843         struct ath_common *common = ath9k_hw_common(ah);
1844         struct ath_vif *avp = (void *)vif->drv_priv;
1845         int slottime;
1846         int error;
1847
1848         mutex_lock(&sc->mutex);
1849
1850         if (changed & BSS_CHANGED_BSSID) {
1851                 /* Set BSSID */
1852                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1853                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1854                 common->curaid = 0;
1855                 ath9k_hw_write_associd(ah);
1856
1857                 /* Set aggregation protection mode parameters */
1858                 sc->config.ath_aggr_prot = 0;
1859
1860                 /* Only legacy IBSS for now */
1861                 if (vif->type == NL80211_IFTYPE_ADHOC)
1862                         ath_update_chainmask(sc, 0);
1863
1864                 ath_print(common, ATH_DBG_CONFIG,
1865                           "BSSID: %pM aid: 0x%x\n",
1866                           common->curbssid, common->curaid);
1867
1868                 /* need to reconfigure the beacon */
1869                 sc->sc_flags &= ~SC_OP_BEACONS ;
1870         }
1871
1872         /* Enable transmission of beacons (AP, IBSS, MESH) */
1873         if ((changed & BSS_CHANGED_BEACON) ||
1874             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1875                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1876                 error = ath_beacon_alloc(aphy, vif);
1877                 if (!error)
1878                         ath_beacon_config(sc, vif);
1879         }
1880
1881         if (changed & BSS_CHANGED_ERP_SLOT) {
1882                 if (bss_conf->use_short_slot)
1883                         slottime = 9;
1884                 else
1885                         slottime = 20;
1886                 if (vif->type == NL80211_IFTYPE_AP) {
1887                         /*
1888                          * Defer update, so that connected stations can adjust
1889                          * their settings at the same time.
1890                          * See beacon.c for more details
1891                          */
1892                         sc->beacon.slottime = slottime;
1893                         sc->beacon.updateslot = UPDATE;
1894                 } else {
1895                         ah->slottime = slottime;
1896                         ath9k_hw_init_global_settings(ah);
1897                 }
1898         }
1899
1900         /* Disable transmission of beacons */
1901         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1902                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1903
1904         if (changed & BSS_CHANGED_BEACON_INT) {
1905                 sc->beacon_interval = bss_conf->beacon_int;
1906                 /*
1907                  * In case of AP mode, the HW TSF has to be reset
1908                  * when the beacon interval changes.
1909                  */
1910                 if (vif->type == NL80211_IFTYPE_AP) {
1911                         sc->sc_flags |= SC_OP_TSF_RESET;
1912                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1913                         error = ath_beacon_alloc(aphy, vif);
1914                         if (!error)
1915                                 ath_beacon_config(sc, vif);
1916                 } else {
1917                         ath_beacon_config(sc, vif);
1918                 }
1919         }
1920
1921         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1922                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1923                           bss_conf->use_short_preamble);
1924                 if (bss_conf->use_short_preamble)
1925                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1926                 else
1927                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1928         }
1929
1930         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1931                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1932                           bss_conf->use_cts_prot);
1933                 if (bss_conf->use_cts_prot &&
1934                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1935                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1936                 else
1937                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1938         }
1939
1940         if (changed & BSS_CHANGED_ASSOC) {
1941                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1942                         bss_conf->assoc);
1943                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1944         }
1945
1946         mutex_unlock(&sc->mutex);
1947 }
1948
1949 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1950 {
1951         u64 tsf;
1952         struct ath_wiphy *aphy = hw->priv;
1953         struct ath_softc *sc = aphy->sc;
1954
1955         mutex_lock(&sc->mutex);
1956         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1957         mutex_unlock(&sc->mutex);
1958
1959         return tsf;
1960 }
1961
1962 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1963 {
1964         struct ath_wiphy *aphy = hw->priv;
1965         struct ath_softc *sc = aphy->sc;
1966
1967         mutex_lock(&sc->mutex);
1968         ath9k_hw_settsf64(sc->sc_ah, tsf);
1969         mutex_unlock(&sc->mutex);
1970 }
1971
1972 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1973 {
1974         struct ath_wiphy *aphy = hw->priv;
1975         struct ath_softc *sc = aphy->sc;
1976
1977         mutex_lock(&sc->mutex);
1978
1979         ath9k_ps_wakeup(sc);
1980         ath9k_hw_reset_tsf(sc->sc_ah);
1981         ath9k_ps_restore(sc);
1982
1983         mutex_unlock(&sc->mutex);
1984 }
1985
1986 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1987                               struct ieee80211_vif *vif,
1988                               enum ieee80211_ampdu_mlme_action action,
1989                               struct ieee80211_sta *sta,
1990                               u16 tid, u16 *ssn)
1991 {
1992         struct ath_wiphy *aphy = hw->priv;
1993         struct ath_softc *sc = aphy->sc;
1994         int ret = 0;
1995
1996         local_bh_disable();
1997
1998         switch (action) {
1999         case IEEE80211_AMPDU_RX_START:
2000                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2001                         ret = -ENOTSUPP;
2002                 break;
2003         case IEEE80211_AMPDU_RX_STOP:
2004                 break;
2005         case IEEE80211_AMPDU_TX_START:
2006                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2007                         return -EOPNOTSUPP;
2008
2009                 ath9k_ps_wakeup(sc);
2010                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2011                 if (!ret)
2012                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2013                 ath9k_ps_restore(sc);
2014                 break;
2015         case IEEE80211_AMPDU_TX_STOP:
2016                 ath9k_ps_wakeup(sc);
2017                 ath_tx_aggr_stop(sc, sta, tid);
2018                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2019                 ath9k_ps_restore(sc);
2020                 break;
2021         case IEEE80211_AMPDU_TX_OPERATIONAL:
2022                 ath9k_ps_wakeup(sc);
2023                 ath_tx_aggr_resume(sc, sta, tid);
2024                 ath9k_ps_restore(sc);
2025                 break;
2026         default:
2027                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2028                           "Unknown AMPDU action\n");
2029         }
2030
2031         local_bh_enable();
2032
2033         return ret;
2034 }
2035
2036 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2037                              struct survey_info *survey)
2038 {
2039         struct ath_wiphy *aphy = hw->priv;
2040         struct ath_softc *sc = aphy->sc;
2041         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2042         struct ieee80211_supported_band *sband;
2043         struct ieee80211_channel *chan;
2044         unsigned long flags;
2045         int pos;
2046
2047         spin_lock_irqsave(&common->cc_lock, flags);
2048         if (idx == 0)
2049                 ath_update_survey_stats(sc);
2050
2051         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2052         if (sband && idx >= sband->n_channels) {
2053                 idx -= sband->n_channels;
2054                 sband = NULL;
2055         }
2056
2057         if (!sband)
2058                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2059
2060         if (!sband || idx >= sband->n_channels) {
2061                 spin_unlock_irqrestore(&common->cc_lock, flags);
2062                 return -ENOENT;
2063         }
2064
2065         chan = &sband->channels[idx];
2066         pos = chan->hw_value;
2067         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2068         survey->channel = chan;
2069         spin_unlock_irqrestore(&common->cc_lock, flags);
2070
2071         return 0;
2072 }
2073
2074 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2075 {
2076         struct ath_wiphy *aphy = hw->priv;
2077         struct ath_softc *sc = aphy->sc;
2078
2079         mutex_lock(&sc->mutex);
2080         if (ath9k_wiphy_scanning(sc)) {
2081                 /*
2082                  * There is a race here in mac80211 but fixing it requires
2083                  * we revisit how we handle the scan complete callback.
2084                  * After mac80211 fixes we will not have configured hardware
2085                  * to the home channel nor would we have configured the RX
2086                  * filter yet.
2087                  */
2088                 mutex_unlock(&sc->mutex);
2089                 return;
2090         }
2091
2092         aphy->state = ATH_WIPHY_SCAN;
2093         ath9k_wiphy_pause_all_forced(sc, aphy);
2094         mutex_unlock(&sc->mutex);
2095 }
2096
2097 /*
2098  * XXX: this requires a revisit after the driver
2099  * scan_complete gets moved to another place/removed in mac80211.
2100  */
2101 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2102 {
2103         struct ath_wiphy *aphy = hw->priv;
2104         struct ath_softc *sc = aphy->sc;
2105
2106         mutex_lock(&sc->mutex);
2107         aphy->state = ATH_WIPHY_ACTIVE;
2108         mutex_unlock(&sc->mutex);
2109 }
2110
2111 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2112 {
2113         struct ath_wiphy *aphy = hw->priv;
2114         struct ath_softc *sc = aphy->sc;
2115         struct ath_hw *ah = sc->sc_ah;
2116
2117         mutex_lock(&sc->mutex);
2118         ah->coverage_class = coverage_class;
2119         ath9k_hw_init_global_settings(ah);
2120         mutex_unlock(&sc->mutex);
2121 }
2122
2123 struct ieee80211_ops ath9k_ops = {
2124         .tx                 = ath9k_tx,
2125         .start              = ath9k_start,
2126         .stop               = ath9k_stop,
2127         .add_interface      = ath9k_add_interface,
2128         .remove_interface   = ath9k_remove_interface,
2129         .config             = ath9k_config,
2130         .configure_filter   = ath9k_configure_filter,
2131         .sta_add            = ath9k_sta_add,
2132         .sta_remove         = ath9k_sta_remove,
2133         .conf_tx            = ath9k_conf_tx,
2134         .bss_info_changed   = ath9k_bss_info_changed,
2135         .set_key            = ath9k_set_key,
2136         .get_tsf            = ath9k_get_tsf,
2137         .set_tsf            = ath9k_set_tsf,
2138         .reset_tsf          = ath9k_reset_tsf,
2139         .ampdu_action       = ath9k_ampdu_action,
2140         .get_survey         = ath9k_get_survey,
2141         .sw_scan_start      = ath9k_sw_scan_start,
2142         .sw_scan_complete   = ath9k_sw_scan_complete,
2143         .rfkill_poll        = ath9k_rfkill_poll_state,
2144         .set_coverage_class = ath9k_set_coverage_class,
2145 };