drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  68                                                 struct ieee80211_hw *hw)
  69 {
  70         struct ieee80211_channel *curchan = hw->conf.channel;
  71         struct ath9k_channel *channel;
  72         u8 chan_idx;
  73
  74         chan_idx = curchan->hw_value;
  75         channel = &sc->sc_ah->channels[chan_idx];
  76         ath9k_update_ichannel(sc, hw, channel);
  77         return channel;
  78 }
  79
  80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath9k_ps_wakeup(struct ath_softc *sc)
  93 {
  94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  95         unsigned long flags;
  96
  97         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  98         if (++sc->ps_usecount != 1)
  99                 goto unlock;
 100
 101         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 102
 103         /*
 104          * While the hardware is asleep, the cycle counters contain no
 105          * useful data. Better clear them now so that they don't mess up
 106          * survey data results.
 107          */
 108         spin_lock(&common->cc_lock);
 109         ath_hw_cycle_counters_update(common);
 110         memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 111         spin_unlock(&common->cc_lock);
 112
 113  unlock:
 114         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 115 }
 116
 117 void ath9k_ps_restore(struct ath_softc *sc)
 118 {
 119         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 120         unsigned long flags;
 121
 122         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 123         if (--sc->ps_usecount != 0)
 124                 goto unlock;
 125
 126         spin_lock(&common->cc_lock);
 127         ath_hw_cycle_counters_update(common);
 128         spin_unlock(&common->cc_lock);
 129
 130         if (sc->ps_idle)
 131                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 132         else if (sc->ps_enabled &&
 133                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 134                               PS_WAIT_FOR_CAB |
 135                               PS_WAIT_FOR_PSPOLL_DATA |
 136                               PS_WAIT_FOR_TX_ACK)))
 137                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 138
 139  unlock:
 140         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 141 }
 142
 143 static void ath_start_ani(struct ath_common *common)
 144 {
 145         struct ath_hw *ah = common->ah;
 146         unsigned long timestamp = jiffies_to_msecs(jiffies);
 147         struct ath_softc *sc = (struct ath_softc *) common->priv;
 148
 149         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 150                 return;
 151
 152         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 153                 return;
 154
 155         common->ani.longcal_timer = timestamp;
 156         common->ani.shortcal_timer = timestamp;
 157         common->ani.checkani_timer = timestamp;
 158
 159         mod_timer(&common->ani.timer,
 160                   jiffies +
 161                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 162 }
 163
 164 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 165 {
 166         struct ath_hw *ah = sc->sc_ah;
 167         struct ath9k_channel *chan = &ah->channels[channel];
 168         struct survey_info *survey = &sc->survey[channel];
 169
 170         if (chan->noisefloor) {
 171                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 172                 survey->noise = chan->noisefloor;
 173         }
 174 }
 175
 176 static void ath_update_survey_stats(struct ath_softc *sc)
 177 {
 178         struct ath_hw *ah = sc->sc_ah;
 179         struct ath_common *common = ath9k_hw_common(ah);
 180         int pos = ah->curchan - &ah->channels[0];
 181         struct survey_info *survey = &sc->survey[pos];
 182         struct ath_cycle_counters *cc = &common->cc_survey;
 183         unsigned int div = common->clockrate * 1000;
 184
 185         if (!ah->curchan)
 186                 return;
 187
 188         if (ah->power_mode == ATH9K_PM_AWAKE)
 189                 ath_hw_cycle_counters_update(common);
 190
 191         if (cc->cycles > 0) {
 192                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 193                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 194                         SURVEY_INFO_CHANNEL_TIME_RX |
 195                         SURVEY_INFO_CHANNEL_TIME_TX;
 196                 survey->channel_time += cc->cycles / div;
 197                 survey->channel_time_busy += cc->rx_busy / div;
 198                 survey->channel_time_rx += cc->rx_frame / div;
 199                 survey->channel_time_tx += cc->tx_frame / div;
 200         }
 201         memset(cc, 0, sizeof(*cc));
 202
 203         ath_update_survey_nf(sc, pos);
 204 }
 205
 206 /*
 207  * Set/change channels.  If the channel is really being changed, it's done
 208  * by reseting the chip.  To accomplish this we must first cleanup any pending
 209  * DMA, then restart stuff.
 210 */
 211 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 212                     struct ath9k_channel *hchan)
 213 {
 214         struct ath_wiphy *aphy = hw->priv;
 215         struct ath_hw *ah = sc->sc_ah;
 216         struct ath_common *common = ath9k_hw_common(ah);
 217         struct ieee80211_conf *conf = &common->hw->conf;
 218         bool fastcc = true, stopped;
 219         struct ieee80211_channel *channel = hw->conf.channel;
 220         struct ath9k_hw_cal_data *caldata = NULL;
 221         int r;
 222
 223         if (sc->sc_flags & SC_OP_INVALID)
 224                 return -EIO;
 225
 226         del_timer_sync(&common->ani.timer);
 227         cancel_work_sync(&sc->paprd_work);
 228         cancel_work_sync(&sc->hw_check_work);
 229         cancel_delayed_work_sync(&sc->tx_complete_work);
 230
 231         ath9k_ps_wakeup(sc);
 232
 233         /*
 234          * This is only performed if the channel settings have
 235          * actually changed.
 236          *
 237          * To switch channels clear any pending DMA operations;
 238          * wait long enough for the RX fifo to drain, reset the
 239          * hardware at the new frequency, and then re-enable
 240          * the relevant bits of the h/w.
 241          */
 242         ath9k_hw_set_interrupts(ah, 0);
 243         ath_drain_all_txq(sc, false);
 244         stopped = ath_stoprecv(sc);
 245
 246         /* XXX: do not flush receive queue here. We don't want
 247          * to flush data frames already in queue because of
 248          * changing channel. */
 249
 250         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 251                 fastcc = false;
 252
 253         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 254                 caldata = &aphy->caldata;
 255
 256         ath_print(common, ATH_DBG_CONFIG,
 257                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 258                   sc->sc_ah->curchan->channel,
 259                   channel->center_freq, conf_is_ht40(conf),
 260                   fastcc);
 261
 262         spin_lock_bh(&sc->sc_resetlock);
 263
 264         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 265         if (r) {
 266                 ath_print(common, ATH_DBG_FATAL,
 267                           "Unable to reset channel (%u MHz), "
 268                           "reset status %d\n",
 269                           channel->center_freq, r);
 270                 spin_unlock_bh(&sc->sc_resetlock);
 271                 goto ps_restore;
 272         }
 273         spin_unlock_bh(&sc->sc_resetlock);
 274
 275         if (ath_startrecv(sc) != 0) {
 276                 ath_print(common, ATH_DBG_FATAL,
 277                           "Unable to restart recv logic\n");
 278                 r = -EIO;
 279                 goto ps_restore;
 280         }
 281
 282         ath_update_txpow(sc);
 283         ath9k_hw_set_interrupts(ah, ah->imask);
 284
 285         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 286                 ath_beacon_config(sc, NULL);
 287                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 288                 ath_start_ani(common);
 289         }
 290
 291  ps_restore:
 292         ath9k_ps_restore(sc);
 293         return r;
 294 }
 295
 296 static void ath_paprd_activate(struct ath_softc *sc)
 297 {
 298         struct ath_hw *ah = sc->sc_ah;
 299         struct ath9k_hw_cal_data *caldata = ah->caldata;
 300         struct ath_common *common = ath9k_hw_common(ah);
 301         int chain;
 302
 303         if (!caldata || !caldata->paprd_done)
 304                 return;
 305
 306         ath9k_ps_wakeup(sc);
 307         ar9003_paprd_enable(ah, false);
 308         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 309                 if (!(common->tx_chainmask & BIT(chain)))
 310                         continue;
 311
 312                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 313         }
 314
 315         ar9003_paprd_enable(ah, true);
 316         ath9k_ps_restore(sc);
 317 }
 318
 319 void ath_paprd_calibrate(struct work_struct *work)
 320 {
 321         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 322         struct ieee80211_hw *hw = sc->hw;
 323         struct ath_hw *ah = sc->sc_ah;
 324         struct ieee80211_hdr *hdr;
 325         struct sk_buff *skb = NULL;
 326         struct ieee80211_tx_info *tx_info;
 327         int band = hw->conf.channel->band;
 328         struct ieee80211_supported_band *sband = &sc->sbands[band];
 329         struct ath_tx_control txctl;
 330         struct ath9k_hw_cal_data *caldata = ah->caldata;
 331         struct ath_common *common = ath9k_hw_common(ah);
 332         int qnum, ftype;
 333         int chain_ok = 0;
 334         int chain;
 335         int len = 1800;
 336         int time_left;
 337         int i;
 338
 339         if (!caldata)
 340                 return;
 341
 342         skb = alloc_skb(len, GFP_KERNEL);
 343         if (!skb)
 344                 return;
 345
 346         tx_info = IEEE80211_SKB_CB(skb);
 347
 348         skb_put(skb, len);
 349         memset(skb->data, 0, len);
 350         hdr = (struct ieee80211_hdr *)skb->data;
 351         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 352         hdr->frame_control = cpu_to_le16(ftype);
 353         hdr->duration_id = cpu_to_le16(10);
 354         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 355         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 356         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 357
 358         memset(&txctl, 0, sizeof(txctl));
 359         qnum = sc->tx.hwq_map[WME_AC_BE];
 360         txctl.txq = &sc->tx.txq[qnum];
 361
 362         ath9k_ps_wakeup(sc);
 363         ar9003_paprd_init_table(ah);
 364         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 365                 if (!(common->tx_chainmask & BIT(chain)))
 366                         continue;
 367
 368                 chain_ok = 0;
 369                 memset(tx_info, 0, sizeof(*tx_info));
 370                 tx_info->band = band;
 371
 372                 for (i = 0; i < 4; i++) {
 373                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 374                         tx_info->control.rates[i].count = 6;
 375                 }
 376
 377                 init_completion(&sc->paprd_complete);
 378                 ar9003_paprd_setup_gain_table(ah, chain);
 379                 txctl.paprd = BIT(chain);
 380                 if (ath_tx_start(hw, skb, &txctl) != 0)
 381                         break;
 382
 383                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 384                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 385                 if (!time_left) {
 386                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 387                                   "Timeout waiting for paprd training on "
 388                                   "TX chain %d\n",
 389                                   chain);
 390                         goto fail_paprd;
 391                 }
 392
 393                 if (!ar9003_paprd_is_done(ah))
 394                         break;
 395
 396                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 397                         break;
 398
 399                 chain_ok = 1;
 400         }
 401         kfree_skb(skb);
 402
 403         if (chain_ok) {
 404                 caldata->paprd_done = true;
 405                 ath_paprd_activate(sc);
 406         }
 407
 408 fail_paprd:
 409         ath9k_ps_restore(sc);
 410 }
 411
 412 /*
 413  *  This routine performs the periodic noise floor calibration function
 414  *  that is used to adjust and optimize the chip performance.  This
 415  *  takes environmental changes (location, temperature) into account.
 416  *  When the task is complete, it reschedules itself depending on the
 417  *  appropriate interval that was calculated.
 418  */
 419 void ath_ani_calibrate(unsigned long data)
 420 {
 421         struct ath_softc *sc = (struct ath_softc *)data;
 422         struct ath_hw *ah = sc->sc_ah;
 423         struct ath_common *common = ath9k_hw_common(ah);
 424         bool longcal = false;
 425         bool shortcal = false;
 426         bool aniflag = false;
 427         unsigned int timestamp = jiffies_to_msecs(jiffies);
 428         u32 cal_interval, short_cal_interval, long_cal_interval;
 429         unsigned long flags;
 430
 431         if (ah->caldata && ah->caldata->nfcal_interference)
 432                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 433         else
 434                 long_cal_interval = ATH_LONG_CALINTERVAL;
 435
 436         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 437                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 438
 439         /* Only calibrate if awake */
 440         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 441                 goto set_timer;
 442
 443         ath9k_ps_wakeup(sc);
 444
 445         /* Long calibration runs independently of short calibration. */
 446         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 447                 longcal = true;
 448                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 449                 common->ani.longcal_timer = timestamp;
 450         }
 451
 452         /* Short calibration applies only while caldone is false */
 453         if (!common->ani.caldone) {
 454                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 455                         shortcal = true;
 456                         ath_print(common, ATH_DBG_ANI,
 457                                   "shortcal @%lu\n", jiffies);
 458                         common->ani.shortcal_timer = timestamp;
 459                         common->ani.resetcal_timer = timestamp;
 460                 }
 461         } else {
 462                 if ((timestamp - common->ani.resetcal_timer) >=
 463                     ATH_RESTART_CALINTERVAL) {
 464                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 465                         if (common->ani.caldone)
 466                                 common->ani.resetcal_timer = timestamp;
 467                 }
 468         }
 469
 470         /* Verify whether we must check ANI */
 471         if ((timestamp - common->ani.checkani_timer) >=
 472              ah->config.ani_poll_interval) {
 473                 aniflag = true;
 474                 common->ani.checkani_timer = timestamp;
 475         }
 476
 477         /* Skip all processing if there's nothing to do. */
 478         if (longcal || shortcal || aniflag) {
 479                 /* Call ANI routine if necessary */
 480                 if (aniflag) {
 481                         spin_lock_irqsave(&common->cc_lock, flags);
 482                         ath9k_hw_ani_monitor(ah, ah->curchan);
 483                         ath_update_survey_stats(sc);
 484                         spin_unlock_irqrestore(&common->cc_lock, flags);
 485                 }
 486
 487                 /* Perform calibration if necessary */
 488                 if (longcal || shortcal) {
 489                         common->ani.caldone =
 490                                 ath9k_hw_calibrate(ah,
 491                                                    ah->curchan,
 492                                                    common->rx_chainmask,
 493                                                    longcal);
 494                 }
 495         }
 496
 497         ath9k_ps_restore(sc);
 498
 499 set_timer:
 500         /*
 501         * Set timer interval based on previous results.
 502         * The interval must be the shortest necessary to satisfy ANI,
 503         * short calibration and long calibration.
 504         */
 505         cal_interval = ATH_LONG_CALINTERVAL;
 506         if (sc->sc_ah->config.enable_ani)
 507                 cal_interval = min(cal_interval,
 508                                    (u32)ah->config.ani_poll_interval);
 509         if (!common->ani.caldone)
 510                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 511
 512         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 513         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 514                 if (!ah->caldata->paprd_done)
 515                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 516                 else
 517                         ath_paprd_activate(sc);
 518         }
 519 }
 520
 521 /*
 522  * Update tx/rx chainmask. For legacy association,
 523  * hard code chainmask to 1x1, for 11n association, use
 524  * the chainmask configuration, for bt coexistence, use
 525  * the chainmask configuration even in legacy mode.
 526  */
 527 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 528 {
 529         struct ath_hw *ah = sc->sc_ah;
 530         struct ath_common *common = ath9k_hw_common(ah);
 531
 532         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
 533             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 534                 common->tx_chainmask = ah->caps.tx_chainmask;
 535                 common->rx_chainmask = ah->caps.rx_chainmask;
 536         } else {
 537                 common->tx_chainmask = 1;
 538                 common->rx_chainmask = 1;
 539         }
 540
 541         ath_print(common, ATH_DBG_CONFIG,
 542                   "tx chmask: %d, rx chmask: %d\n",
 543                   common->tx_chainmask,
 544                   common->rx_chainmask);
 545 }
 546
 547 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 548 {
 549         struct ath_node *an;
 550
 551         an = (struct ath_node *)sta->drv_priv;
 552
 553         if (sc->sc_flags & SC_OP_TXAGGR) {
 554                 ath_tx_node_init(sc, an);
 555                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 556                                      sta->ht_cap.ampdu_factor);
 557                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 558                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 559         }
 560 }
 561
 562 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 563 {
 564         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 565
 566         if (sc->sc_flags & SC_OP_TXAGGR)
 567                 ath_tx_node_cleanup(sc, an);
 568 }
 569
 570 void ath_hw_check(struct work_struct *work)
 571 {
 572         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 573         int i;
 574
 575         ath9k_ps_wakeup(sc);
 576
 577         for (i = 0; i < 3; i++) {
 578                 if (ath9k_hw_check_alive(sc->sc_ah))
 579                         goto out;
 580
 581                 msleep(1);
 582         }
 583         ath_reset(sc, true);
 584
 585 out:
 586         ath9k_ps_restore(sc);
 587 }
 588
 589 void ath9k_tasklet(unsigned long data)
 590 {
 591         struct ath_softc *sc = (struct ath_softc *)data;
 592         struct ath_hw *ah = sc->sc_ah;
 593         struct ath_common *common = ath9k_hw_common(ah);
 594
 595         u32 status = sc->intrstatus;
 596         u32 rxmask;
 597
 598         ath9k_ps_wakeup(sc);
 599
 600         if (status & ATH9K_INT_FATAL) {
 601                 ath_reset(sc, true);
 602                 ath9k_ps_restore(sc);
 603                 return;
 604         }
 605
 606         if (!ath9k_hw_check_alive(ah))
 607                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 608
 609         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 610                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 611                           ATH9K_INT_RXORN);
 612         else
 613                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 614
 615         if (status & rxmask) {
 616                 spin_lock_bh(&sc->rx.rxflushlock);
 617
 618                 /* Check for high priority Rx first */
 619                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 620                     (status & ATH9K_INT_RXHP))
 621                         ath_rx_tasklet(sc, 0, true);
 622
 623                 ath_rx_tasklet(sc, 0, false);
 624                 spin_unlock_bh(&sc->rx.rxflushlock);
 625         }
 626
 627         if (status & ATH9K_INT_TX) {
 628                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 629                         ath_tx_edma_tasklet(sc);
 630                 else
 631                         ath_tx_tasklet(sc);
 632         }
 633
 634         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 635                 /*
 636                  * TSF sync does not look correct; remain awake to sync with
 637                  * the next Beacon.
 638                  */
 639                 ath_print(common, ATH_DBG_PS,
 640                           "TSFOOR - Sync with next Beacon\n");
 641                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 642         }
 643
 644         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 645                 if (status & ATH9K_INT_GENTIMER)
 646                         ath_gen_timer_isr(sc->sc_ah);
 647
 648         /* re-enable hardware interrupt */
 649         ath9k_hw_set_interrupts(ah, ah->imask);
 650         ath9k_ps_restore(sc);
 651 }
 652
 653 irqreturn_t ath_isr(int irq, void *dev)
 654 {
 655 #define SCHED_INTR (                            \
 656                 ATH9K_INT_FATAL |               \
 657                 ATH9K_INT_RXORN |               \
 658                 ATH9K_INT_RXEOL |               \
 659                 ATH9K_INT_RX |                  \
 660                 ATH9K_INT_RXLP |                \
 661                 ATH9K_INT_RXHP |                \
 662                 ATH9K_INT_TX |                  \
 663                 ATH9K_INT_BMISS |               \
 664                 ATH9K_INT_CST |                 \
 665                 ATH9K_INT_TSFOOR |              \
 666                 ATH9K_INT_GENTIMER)
 667
 668         struct ath_softc *sc = dev;
 669         struct ath_hw *ah = sc->sc_ah;
 670         struct ath_common *common = ath9k_hw_common(ah);
 671         enum ath9k_int status;
 672         bool sched = false;
 673
 674         /*
 675          * The hardware is not ready/present, don't
 676          * touch anything. Note this can happen early
 677          * on if the IRQ is shared.
 678          */
 679         if (sc->sc_flags & SC_OP_INVALID)
 680                 return IRQ_NONE;
 681
 682
 683         /* shared irq, not for us */
 684
 685         if (!ath9k_hw_intrpend(ah))
 686                 return IRQ_NONE;
 687
 688         /*
 689          * Figure out the reason(s) for the interrupt.  Note
 690          * that the hal returns a pseudo-ISR that may include
 691          * bits we haven't explicitly enabled so we mask the
 692          * value to insure we only process bits we requested.
 693          */
 694         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 695         status &= ah->imask;    /* discard unasked-for bits */
 696
 697         /*
 698          * If there are no status bits set, then this interrupt was not
 699          * for me (should have been caught above).
 700          */
 701         if (!status)
 702                 return IRQ_NONE;
 703
 704         /* Cache the status */
 705         sc->intrstatus = status;
 706
 707         if (status & SCHED_INTR)
 708                 sched = true;
 709
 710         /*
 711          * If a FATAL or RXORN interrupt is received, we have to reset the
 712          * chip immediately.
 713          */
 714         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 715             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 716                 goto chip_reset;
 717
 718         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 719             (status & ATH9K_INT_BB_WATCHDOG)) {
 720
 721                 spin_lock(&common->cc_lock);
 722                 ath_hw_cycle_counters_update(common);
 723                 ar9003_hw_bb_watchdog_dbg_info(ah);
 724                 spin_unlock(&common->cc_lock);
 725
 726                 goto chip_reset;
 727         }
 728
 729         if (status & ATH9K_INT_SWBA)
 730                 tasklet_schedule(&sc->bcon_tasklet);
 731
 732         if (status & ATH9K_INT_TXURN)
 733                 ath9k_hw_updatetxtriglevel(ah, true);
 734
 735         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 736                 if (status & ATH9K_INT_RXEOL) {
 737                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 738                         ath9k_hw_set_interrupts(ah, ah->imask);
 739                 }
 740         }
 741
 742         if (status & ATH9K_INT_MIB) {
 743                 /*
 744                  * Disable interrupts until we service the MIB
 745                  * interrupt; otherwise it will continue to
 746                  * fire.
 747                  */
 748                 ath9k_hw_set_interrupts(ah, 0);
 749                 /*
 750                  * Let the hal handle the event. We assume
 751                  * it will clear whatever condition caused
 752                  * the interrupt.
 753                  */
 754                 spin_lock(&common->cc_lock);
 755                 ath9k_hw_proc_mib_event(ah);
 756                 spin_unlock(&common->cc_lock);
 757                 ath9k_hw_set_interrupts(ah, ah->imask);
 758         }
 759
 760         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 761                 if (status & ATH9K_INT_TIM_TIMER) {
 762                         /* Clear RxAbort bit so that we can
 763                          * receive frames */
 764                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 765                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 766                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 767                 }
 768
 769 chip_reset:
 770
 771         ath_debug_stat_interrupt(sc, status);
 772
 773         if (sched) {
 774                 /* turn off every interrupt except SWBA */
 775                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 776                 tasklet_schedule(&sc->intr_tq);
 777         }
 778
 779         return IRQ_HANDLED;
 780
 781 #undef SCHED_INTR
 782 }
 783
 784 static u32 ath_get_extchanmode(struct ath_softc *sc,
 785                                struct ieee80211_channel *chan,
 786                                enum nl80211_channel_type channel_type)
 787 {
 788         u32 chanmode = 0;
 789
 790         switch (chan->band) {
 791         case IEEE80211_BAND_2GHZ:
 792                 switch(channel_type) {
 793                 case NL80211_CHAN_NO_HT:
 794                 case NL80211_CHAN_HT20:
 795                         chanmode = CHANNEL_G_HT20;
 796                         break;
 797                 case NL80211_CHAN_HT40PLUS:
 798                         chanmode = CHANNEL_G_HT40PLUS;
 799                         break;
 800                 case NL80211_CHAN_HT40MINUS:
 801                         chanmode = CHANNEL_G_HT40MINUS;
 802                         break;
 803                 }
 804                 break;
 805         case IEEE80211_BAND_5GHZ:
 806                 switch(channel_type) {
 807                 case NL80211_CHAN_NO_HT:
 808                 case NL80211_CHAN_HT20:
 809                         chanmode = CHANNEL_A_HT20;
 810                         break;
 811                 case NL80211_CHAN_HT40PLUS:
 812                         chanmode = CHANNEL_A_HT40PLUS;
 813                         break;
 814                 case NL80211_CHAN_HT40MINUS:
 815                         chanmode = CHANNEL_A_HT40MINUS;
 816                         break;
 817                 }
 818                 break;
 819         default:
 820                 break;
 821         }
 822
 823         return chanmode;
 824 }
 825
 826 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 827                                  struct ieee80211_vif *vif,
 828                                  struct ieee80211_bss_conf *bss_conf)
 829 {
 830         struct ath_hw *ah = sc->sc_ah;
 831         struct ath_common *common = ath9k_hw_common(ah);
 832
 833         if (bss_conf->assoc) {
 834                 ath_print(common, ATH_DBG_CONFIG,
 835                           "Bss Info ASSOC %d, bssid: %pM\n",
 836                            bss_conf->aid, common->curbssid);
 837
 838                 /* New association, store aid */
 839                 common->curaid = bss_conf->aid;
 840                 ath9k_hw_write_associd(ah);
 841
 842                 /*
 843                  * Request a re-configuration of Beacon related timers
 844                  * on the receipt of the first Beacon frame (i.e.,
 845                  * after time sync with the AP).
 846                  */
 847                 sc->ps_flags |= PS_BEACON_SYNC;
 848
 849                 /* Configure the beacon */
 850                 ath_beacon_config(sc, vif);
 851
 852                 /* Reset rssi stats */
 853                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 854
 855                 sc->sc_flags |= SC_OP_ANI_RUN;
 856                 ath_start_ani(common);
 857         } else {
 858                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 859                 common->curaid = 0;
 860                 /* Stop ANI */
 861                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 862                 del_timer_sync(&common->ani.timer);
 863         }
 864 }
 865
 866 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 867 {
 868         struct ath_hw *ah = sc->sc_ah;
 869         struct ath_common *common = ath9k_hw_common(ah);
 870         struct ieee80211_channel *channel = hw->conf.channel;
 871         int r;
 872
 873         ath9k_ps_wakeup(sc);
 874         ath9k_hw_configpcipowersave(ah, 0, 0);
 875
 876         if (!ah->curchan)
 877                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 878
 879         spin_lock_bh(&sc->sc_resetlock);
 880         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 881         if (r) {
 882                 ath_print(common, ATH_DBG_FATAL,
 883                           "Unable to reset channel (%u MHz), "
 884                           "reset status %d\n",
 885                           channel->center_freq, r);
 886         }
 887         spin_unlock_bh(&sc->sc_resetlock);
 888
 889         ath_update_txpow(sc);
 890         if (ath_startrecv(sc) != 0) {
 891                 ath_print(common, ATH_DBG_FATAL,
 892                           "Unable to restart recv logic\n");
 893                 return;
 894         }
 895
 896         if (sc->sc_flags & SC_OP_BEACONS)
 897                 ath_beacon_config(sc, NULL);    /* restart beacons */
 898
 899         /* Re-Enable  interrupts */
 900         ath9k_hw_set_interrupts(ah, ah->imask);
 901
 902         /* Enable LED */
 903         ath9k_hw_cfg_output(ah, ah->led_pin,
 904                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 905         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 906
 907         ieee80211_wake_queues(hw);
 908         ath9k_ps_restore(sc);
 909 }
 910
 911 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 912 {
 913         struct ath_hw *ah = sc->sc_ah;
 914         struct ieee80211_channel *channel = hw->conf.channel;
 915         int r;
 916
 917         ath9k_ps_wakeup(sc);
 918         ieee80211_stop_queues(hw);
 919
 920         /*
 921          * Keep the LED on when the radio is disabled
 922          * during idle unassociated state.
 923          */
 924         if (!sc->ps_idle) {
 925                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 926                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 927         }
 928
 929         /* Disable interrupts */
 930         ath9k_hw_set_interrupts(ah, 0);
 931
 932         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 933         ath_stoprecv(sc);               /* turn off frame recv */
 934         ath_flushrecv(sc);              /* flush recv queue */
 935
 936         if (!ah->curchan)
 937                 ah->curchan = ath_get_curchannel(sc, hw);
 938
 939         spin_lock_bh(&sc->sc_resetlock);
 940         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 941         if (r) {
 942                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 943                           "Unable to reset channel (%u MHz), "
 944                           "reset status %d\n",
 945                           channel->center_freq, r);
 946         }
 947         spin_unlock_bh(&sc->sc_resetlock);
 948
 949         ath9k_hw_phy_disable(ah);
 950         ath9k_hw_configpcipowersave(ah, 1, 1);
 951         ath9k_ps_restore(sc);
 952         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 953 }
 954
 955 int ath_reset(struct ath_softc *sc, bool retry_tx)
 956 {
 957         struct ath_hw *ah = sc->sc_ah;
 958         struct ath_common *common = ath9k_hw_common(ah);
 959         struct ieee80211_hw *hw = sc->hw;
 960         int r;
 961
 962         /* Stop ANI */
 963         del_timer_sync(&common->ani.timer);
 964
 965         ieee80211_stop_queues(hw);
 966
 967         ath9k_hw_set_interrupts(ah, 0);
 968         ath_drain_all_txq(sc, retry_tx);
 969         ath_stoprecv(sc);
 970         ath_flushrecv(sc);
 971
 972         spin_lock_bh(&sc->sc_resetlock);
 973         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 974         if (r)
 975                 ath_print(common, ATH_DBG_FATAL,
 976                           "Unable to reset hardware; reset status %d\n", r);
 977         spin_unlock_bh(&sc->sc_resetlock);
 978
 979         if (ath_startrecv(sc) != 0)
 980                 ath_print(common, ATH_DBG_FATAL,
 981                           "Unable to start recv logic\n");
 982
 983         /*
 984          * We may be doing a reset in response to a request
 985          * that changes the channel so update any state that
 986          * might change as a result.
 987          */
 988         ath_update_txpow(sc);
 989
 990         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
 991                 ath_beacon_config(sc, NULL);    /* restart beacons */
 992
 993         ath9k_hw_set_interrupts(ah, ah->imask);
 994
 995         if (retry_tx) {
 996                 int i;
 997                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 998                         if (ATH_TXQ_SETUP(sc, i)) {
 999                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1000                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1001                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1002                         }
1003                 }
1004         }
1005
1006         ieee80211_wake_queues(hw);
1007
1008         /* Start ANI */
1009         ath_start_ani(common);
1010
1011         return r;
1012 }
1013
1014 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1015 {
1016         int qnum;
1017
1018         switch (queue) {
1019         case 0:
1020                 qnum = sc->tx.hwq_map[WME_AC_VO];
1021                 break;
1022         case 1:
1023                 qnum = sc->tx.hwq_map[WME_AC_VI];
1024                 break;
1025         case 2:
1026                 qnum = sc->tx.hwq_map[WME_AC_BE];
1027                 break;
1028         case 3:
1029                 qnum = sc->tx.hwq_map[WME_AC_BK];
1030                 break;
1031         default:
1032                 qnum = sc->tx.hwq_map[WME_AC_BE];
1033                 break;
1034         }
1035
1036         return qnum;
1037 }
1038
1039 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1040 {
1041         int qnum;
1042
1043         switch (queue) {
1044         case WME_AC_VO:
1045                 qnum = 0;
1046                 break;
1047         case WME_AC_VI:
1048                 qnum = 1;
1049                 break;
1050         case WME_AC_BE:
1051                 qnum = 2;
1052                 break;
1053         case WME_AC_BK:
1054                 qnum = 3;
1055                 break;
1056         default:
1057                 qnum = -1;
1058                 break;
1059         }
1060
1061         return qnum;
1062 }
1063
1064 /* XXX: Remove me once we don't depend on ath9k_channel for all
1065  * this redundant data */
1066 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1067                            struct ath9k_channel *ichan)
1068 {
1069         struct ieee80211_channel *chan = hw->conf.channel;
1070         struct ieee80211_conf *conf = &hw->conf;
1071
1072         ichan->channel = chan->center_freq;
1073         ichan->chan = chan;
1074
1075         if (chan->band == IEEE80211_BAND_2GHZ) {
1076                 ichan->chanmode = CHANNEL_G;
1077                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1078         } else {
1079                 ichan->chanmode = CHANNEL_A;
1080                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1081         }
1082
1083         if (conf_is_ht(conf))
1084                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1085                                             conf->channel_type);
1086 }
1087
1088 /**********************/
1089 /* mac80211 callbacks */
1090 /**********************/
1091
1092 static int ath9k_start(struct ieee80211_hw *hw)
1093 {
1094         struct ath_wiphy *aphy = hw->priv;
1095         struct ath_softc *sc = aphy->sc;
1096         struct ath_hw *ah = sc->sc_ah;
1097         struct ath_common *common = ath9k_hw_common(ah);
1098         struct ieee80211_channel *curchan = hw->conf.channel;
1099         struct ath9k_channel *init_channel;
1100         int r;
1101
1102         ath_print(common, ATH_DBG_CONFIG,
1103                   "Starting driver with initial channel: %d MHz\n",
1104                   curchan->center_freq);
1105
1106         mutex_lock(&sc->mutex);
1107
1108         if (ath9k_wiphy_started(sc)) {
1109                 if (sc->chan_idx == curchan->hw_value) {
1110                         /*
1111                          * Already on the operational channel, the new wiphy
1112                          * can be marked active.
1113                          */
1114                         aphy->state = ATH_WIPHY_ACTIVE;
1115                         ieee80211_wake_queues(hw);
1116                 } else {
1117                         /*
1118                          * Another wiphy is on another channel, start the new
1119                          * wiphy in paused state.
1120                          */
1121                         aphy->state = ATH_WIPHY_PAUSED;
1122                         ieee80211_stop_queues(hw);
1123                 }
1124                 mutex_unlock(&sc->mutex);
1125                 return 0;
1126         }
1127         aphy->state = ATH_WIPHY_ACTIVE;
1128
1129         /* setup initial channel */
1130
1131         sc->chan_idx = curchan->hw_value;
1132
1133         init_channel = ath_get_curchannel(sc, hw);
1134
1135         /* Reset SERDES registers */
1136         ath9k_hw_configpcipowersave(ah, 0, 0);
1137
1138         /*
1139          * The basic interface to setting the hardware in a good
1140          * state is ``reset''.  On return the hardware is known to
1141          * be powered up and with interrupts disabled.  This must
1142          * be followed by initialization of the appropriate bits
1143          * and then setup of the interrupt mask.
1144          */
1145         spin_lock_bh(&sc->sc_resetlock);
1146         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1147         if (r) {
1148                 ath_print(common, ATH_DBG_FATAL,
1149                           "Unable to reset hardware; reset status %d "
1150                           "(freq %u MHz)\n", r,
1151                           curchan->center_freq);
1152                 spin_unlock_bh(&sc->sc_resetlock);
1153                 goto mutex_unlock;
1154         }
1155         spin_unlock_bh(&sc->sc_resetlock);
1156
1157         /*
1158          * This is needed only to setup initial state
1159          * but it's best done after a reset.
1160          */
1161         ath_update_txpow(sc);
1162
1163         /*
1164          * Setup the hardware after reset:
1165          * The receive engine is set going.
1166          * Frame transmit is handled entirely
1167          * in the frame output path; there's nothing to do
1168          * here except setup the interrupt mask.
1169          */
1170         if (ath_startrecv(sc) != 0) {
1171                 ath_print(common, ATH_DBG_FATAL,
1172                           "Unable to start recv logic\n");
1173                 r = -EIO;
1174                 goto mutex_unlock;
1175         }
1176
1177         /* Setup our intr mask. */
1178         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1179                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1180                     ATH9K_INT_GLOBAL;
1181
1182         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1183                 ah->imask |= ATH9K_INT_RXHP |
1184                              ATH9K_INT_RXLP |
1185                              ATH9K_INT_BB_WATCHDOG;
1186         else
1187                 ah->imask |= ATH9K_INT_RX;
1188
1189         ah->imask |= ATH9K_INT_GTT;
1190
1191         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1192                 ah->imask |= ATH9K_INT_CST;
1193
1194         sc->sc_flags &= ~SC_OP_INVALID;
1195
1196         /* Disable BMISS interrupt when we're not associated */
1197         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1198         ath9k_hw_set_interrupts(ah, ah->imask);
1199
1200         ieee80211_wake_queues(hw);
1201
1202         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1203
1204         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1205             !ah->btcoex_hw.enabled) {
1206                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1207                                            AR_STOMP_LOW_WLAN_WGHT);
1208                 ath9k_hw_btcoex_enable(ah);
1209
1210                 if (common->bus_ops->bt_coex_prep)
1211                         common->bus_ops->bt_coex_prep(common);
1212                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1213                         ath9k_btcoex_timer_resume(sc);
1214         }
1215
1216 mutex_unlock:
1217         mutex_unlock(&sc->mutex);
1218
1219         return r;
1220 }
1221
1222 static int ath9k_tx(struct ieee80211_hw *hw,
1223                     struct sk_buff *skb)
1224 {
1225         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1226         struct ath_wiphy *aphy = hw->priv;
1227         struct ath_softc *sc = aphy->sc;
1228         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1229         struct ath_tx_control txctl;
1230         int padpos, padsize;
1231         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1232         int qnum;
1233
1234         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1235                 ath_print(common, ATH_DBG_XMIT,
1236                           "ath9k: %s: TX in unexpected wiphy state "
1237                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1238                 goto exit;
1239         }
1240
1241         if (sc->ps_enabled) {
1242                 /*
1243                  * mac80211 does not set PM field for normal data frames, so we
1244                  * need to update that based on the current PS mode.
1245                  */
1246                 if (ieee80211_is_data(hdr->frame_control) &&
1247                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1248                     !ieee80211_has_pm(hdr->frame_control)) {
1249                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1250                                   "while in PS mode\n");
1251                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1252                 }
1253         }
1254
1255         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1256                 /*
1257                  * We are using PS-Poll and mac80211 can request TX while in
1258                  * power save mode. Need to wake up hardware for the TX to be
1259                  * completed and if needed, also for RX of buffered frames.
1260                  */
1261                 ath9k_ps_wakeup(sc);
1262                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1263                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1264                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1265                         ath_print(common, ATH_DBG_PS,
1266                                   "Sending PS-Poll to pick a buffered frame\n");
1267                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1268                 } else {
1269                         ath_print(common, ATH_DBG_PS,
1270                                   "Wake up to complete TX\n");
1271                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1272                 }
1273                 /*
1274                  * The actual restore operation will happen only after
1275                  * the sc_flags bit is cleared. We are just dropping
1276                  * the ps_usecount here.
1277                  */
1278                 ath9k_ps_restore(sc);
1279         }
1280
1281         memset(&txctl, 0, sizeof(struct ath_tx_control));
1282
1283         /*
1284          * As a temporary workaround, assign seq# here; this will likely need
1285          * to be cleaned up to work better with Beacon transmission and virtual
1286          * BSSes.
1287          */
1288         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1289                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1290                         sc->tx.seq_no += 0x10;
1291                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1292                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1293         }
1294
1295         /* Add the padding after the header if this is not already done */
1296         padpos = ath9k_cmn_padpos(hdr->frame_control);
1297         padsize = padpos & 3;
1298         if (padsize && skb->len>padpos) {
1299                 if (skb_headroom(skb) < padsize)
1300                         return -1;
1301                 skb_push(skb, padsize);
1302                 memmove(skb->data, skb->data + padsize, padpos);
1303         }
1304
1305         qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1306         txctl.txq = &sc->tx.txq[qnum];
1307
1308         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1309
1310         if (ath_tx_start(hw, skb, &txctl) != 0) {
1311                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1312                 goto exit;
1313         }
1314
1315         return 0;
1316 exit:
1317         dev_kfree_skb_any(skb);
1318         return 0;
1319 }
1320
1321 static void ath9k_stop(struct ieee80211_hw *hw)
1322 {
1323         struct ath_wiphy *aphy = hw->priv;
1324         struct ath_softc *sc = aphy->sc;
1325         struct ath_hw *ah = sc->sc_ah;
1326         struct ath_common *common = ath9k_hw_common(ah);
1327         int i;
1328
1329         mutex_lock(&sc->mutex);
1330
1331         aphy->state = ATH_WIPHY_INACTIVE;
1332
1333         if (led_blink)
1334                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1335
1336         cancel_delayed_work_sync(&sc->tx_complete_work);
1337         cancel_work_sync(&sc->paprd_work);
1338         cancel_work_sync(&sc->hw_check_work);
1339
1340         for (i = 0; i < sc->num_sec_wiphy; i++) {
1341                 if (sc->sec_wiphy[i])
1342                         break;
1343         }
1344
1345         if (i == sc->num_sec_wiphy) {
1346                 cancel_delayed_work_sync(&sc->wiphy_work);
1347                 cancel_work_sync(&sc->chan_work);
1348         }
1349
1350         if (sc->sc_flags & SC_OP_INVALID) {
1351                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1352                 mutex_unlock(&sc->mutex);
1353                 return;
1354         }
1355
1356         if (ath9k_wiphy_started(sc)) {
1357                 mutex_unlock(&sc->mutex);
1358                 return; /* another wiphy still in use */
1359         }
1360
1361         /* Ensure HW is awake when we try to shut it down. */
1362         ath9k_ps_wakeup(sc);
1363
1364         if (ah->btcoex_hw.enabled) {
1365                 ath9k_hw_btcoex_disable(ah);
1366                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1367                         ath9k_btcoex_timer_pause(sc);
1368         }
1369
1370         /* make sure h/w will not generate any interrupt
1371          * before setting the invalid flag. */
1372         ath9k_hw_set_interrupts(ah, 0);
1373
1374         if (!(sc->sc_flags & SC_OP_INVALID)) {
1375                 ath_drain_all_txq(sc, false);
1376                 ath_stoprecv(sc);
1377                 ath9k_hw_phy_disable(ah);
1378         } else
1379                 sc->rx.rxlink = NULL;
1380
1381         /* disable HAL and put h/w to sleep */
1382         ath9k_hw_disable(ah);
1383         ath9k_hw_configpcipowersave(ah, 1, 1);
1384         ath9k_ps_restore(sc);
1385
1386         /* Finally, put the chip in FULL SLEEP mode */
1387         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1388
1389         sc->sc_flags |= SC_OP_INVALID;
1390
1391         mutex_unlock(&sc->mutex);
1392
1393         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1394 }
1395
1396 static int ath9k_add_interface(struct ieee80211_hw *hw,
1397                                struct ieee80211_vif *vif)
1398 {
1399         struct ath_wiphy *aphy = hw->priv;
1400         struct ath_softc *sc = aphy->sc;
1401         struct ath_hw *ah = sc->sc_ah;
1402         struct ath_common *common = ath9k_hw_common(ah);
1403         struct ath_vif *avp = (void *)vif->drv_priv;
1404         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1405         int ret = 0;
1406
1407         mutex_lock(&sc->mutex);
1408
1409         switch (vif->type) {
1410         case NL80211_IFTYPE_STATION:
1411                 ic_opmode = NL80211_IFTYPE_STATION;
1412                 break;
1413         case NL80211_IFTYPE_WDS:
1414                 ic_opmode = NL80211_IFTYPE_WDS;
1415                 break;
1416         case NL80211_IFTYPE_ADHOC:
1417         case NL80211_IFTYPE_AP:
1418         case NL80211_IFTYPE_MESH_POINT:
1419                 if (sc->nbcnvifs >= ATH_BCBUF) {
1420                         ret = -ENOBUFS;
1421                         goto out;
1422                 }
1423                 ic_opmode = vif->type;
1424                 break;
1425         default:
1426                 ath_print(common, ATH_DBG_FATAL,
1427                         "Interface type %d not yet supported\n", vif->type);
1428                 ret = -EOPNOTSUPP;
1429                 goto out;
1430         }
1431
1432         ath_print(common, ATH_DBG_CONFIG,
1433                   "Attach a VIF of type: %d\n", ic_opmode);
1434
1435         /* Set the VIF opmode */
1436         avp->av_opmode = ic_opmode;
1437         avp->av_bslot = -1;
1438
1439         sc->nvifs++;
1440
1441         ath9k_set_bssid_mask(hw, vif);
1442
1443         if (sc->nvifs > 1)
1444                 goto out; /* skip global settings for secondary vif */
1445
1446         if (ic_opmode == NL80211_IFTYPE_AP) {
1447                 ath9k_hw_set_tsfadjust(ah, 1);
1448                 sc->sc_flags |= SC_OP_TSF_RESET;
1449         }
1450
1451         /* Set the device opmode */
1452         ah->opmode = ic_opmode;
1453
1454         /*
1455          * Enable MIB interrupts when there are hardware phy counters.
1456          * Note we only do this (at the moment) for station mode.
1457          */
1458         if ((vif->type == NL80211_IFTYPE_STATION) ||
1459             (vif->type == NL80211_IFTYPE_ADHOC) ||
1460             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1461                 if (ah->config.enable_ani)
1462                         ah->imask |= ATH9K_INT_MIB;
1463                 ah->imask |= ATH9K_INT_TSFOOR;
1464         }
1465
1466         ath9k_hw_set_interrupts(ah, ah->imask);
1467
1468         if (vif->type == NL80211_IFTYPE_AP    ||
1469             vif->type == NL80211_IFTYPE_ADHOC ||
1470             vif->type == NL80211_IFTYPE_MONITOR) {
1471                 sc->sc_flags |= SC_OP_ANI_RUN;
1472                 ath_start_ani(common);
1473         }
1474
1475 out:
1476         mutex_unlock(&sc->mutex);
1477         return ret;
1478 }
1479
1480 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1481                                    struct ieee80211_vif *vif)
1482 {
1483         struct ath_wiphy *aphy = hw->priv;
1484         struct ath_softc *sc = aphy->sc;
1485         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1486         struct ath_vif *avp = (void *)vif->drv_priv;
1487         int i;
1488
1489         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1490
1491         mutex_lock(&sc->mutex);
1492
1493         /* Stop ANI */
1494         sc->sc_flags &= ~SC_OP_ANI_RUN;
1495         del_timer_sync(&common->ani.timer);
1496
1497         /* Reclaim beacon resources */
1498         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1499             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1500             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1501                 ath9k_ps_wakeup(sc);
1502                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1503                 ath9k_ps_restore(sc);
1504         }
1505
1506         ath_beacon_return(sc, avp);
1507         sc->sc_flags &= ~SC_OP_BEACONS;
1508
1509         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1510                 if (sc->beacon.bslot[i] == vif) {
1511                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1512                                "slot\n", __func__);
1513                         sc->beacon.bslot[i] = NULL;
1514                         sc->beacon.bslot_aphy[i] = NULL;
1515                 }
1516         }
1517
1518         sc->nvifs--;
1519
1520         mutex_unlock(&sc->mutex);
1521 }
1522
1523 static void ath9k_enable_ps(struct ath_softc *sc)
1524 {
1525         struct ath_hw *ah = sc->sc_ah;
1526
1527         sc->ps_enabled = true;
1528         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1529                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1530                         ah->imask |= ATH9K_INT_TIM_TIMER;
1531                         ath9k_hw_set_interrupts(ah, ah->imask);
1532                 }
1533                 ath9k_hw_setrxabort(ah, 1);
1534         }
1535 }
1536
1537 static void ath9k_disable_ps(struct ath_softc *sc)
1538 {
1539         struct ath_hw *ah = sc->sc_ah;
1540
1541         sc->ps_enabled = false;
1542         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1543         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1544                 ath9k_hw_setrxabort(ah, 0);
1545                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1546                                   PS_WAIT_FOR_CAB |
1547                                   PS_WAIT_FOR_PSPOLL_DATA |
1548                                   PS_WAIT_FOR_TX_ACK);
1549                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1550                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1551                         ath9k_hw_set_interrupts(ah, ah->imask);
1552                 }
1553         }
1554
1555 }
1556
1557 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1558 {
1559         struct ath_wiphy *aphy = hw->priv;
1560         struct ath_softc *sc = aphy->sc;
1561         struct ath_hw *ah = sc->sc_ah;
1562         struct ath_common *common = ath9k_hw_common(ah);
1563         struct ieee80211_conf *conf = &hw->conf;
1564         bool disable_radio;
1565
1566         mutex_lock(&sc->mutex);
1567
1568         /*
1569          * Leave this as the first check because we need to turn on the
1570          * radio if it was disabled before prior to processing the rest
1571          * of the changes. Likewise we must only disable the radio towards
1572          * the end.
1573          */
1574         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1575                 bool enable_radio;
1576                 bool all_wiphys_idle;
1577                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1578
1579                 spin_lock_bh(&sc->wiphy_lock);
1580                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1581                 ath9k_set_wiphy_idle(aphy, idle);
1582
1583                 enable_radio = (!idle && all_wiphys_idle);
1584
1585                 /*
1586                  * After we unlock here its possible another wiphy
1587                  * can be re-renabled so to account for that we will
1588                  * only disable the radio toward the end of this routine
1589                  * if by then all wiphys are still idle.
1590                  */
1591                 spin_unlock_bh(&sc->wiphy_lock);
1592
1593                 if (enable_radio) {
1594                         sc->ps_idle = false;
1595                         ath_radio_enable(sc, hw);
1596                         ath_print(common, ATH_DBG_CONFIG,
1597                                   "not-idle: enabling radio\n");
1598                 }
1599         }
1600
1601         /*
1602          * We just prepare to enable PS. We have to wait until our AP has
1603          * ACK'd our null data frame to disable RX otherwise we'll ignore
1604          * those ACKs and end up retransmitting the same null data frames.
1605          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1606          */
1607         if (changed & IEEE80211_CONF_CHANGE_PS) {
1608                 unsigned long flags;
1609                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1610                 if (conf->flags & IEEE80211_CONF_PS)
1611                         ath9k_enable_ps(sc);
1612                 else
1613                         ath9k_disable_ps(sc);
1614                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1615         }
1616
1617         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1618                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1619                         ath_print(common, ATH_DBG_CONFIG,
1620                                   "HW opmode set to Monitor mode\n");
1621                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1622                 }
1623         }
1624
1625         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1626                 struct ieee80211_channel *curchan = hw->conf.channel;
1627                 int pos = curchan->hw_value;
1628                 int old_pos = -1;
1629                 unsigned long flags;
1630
1631                 if (ah->curchan)
1632                         old_pos = ah->curchan - &ah->channels[0];
1633
1634                 aphy->chan_idx = pos;
1635                 aphy->chan_is_ht = conf_is_ht(conf);
1636                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1637                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1638                 else
1639                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1640
1641                 if (aphy->state == ATH_WIPHY_SCAN ||
1642                     aphy->state == ATH_WIPHY_ACTIVE)
1643                         ath9k_wiphy_pause_all_forced(sc, aphy);
1644                 else {
1645                         /*
1646                          * Do not change operational channel based on a paused
1647                          * wiphy changes.
1648                          */
1649                         goto skip_chan_change;
1650                 }
1651
1652                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1653                           curchan->center_freq);
1654
1655                 /* XXX: remove me eventualy */
1656                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1657
1658                 ath_update_chainmask(sc, conf_is_ht(conf));
1659
1660                 /* update survey stats for the old channel before switching */
1661                 spin_lock_irqsave(&common->cc_lock, flags);
1662                 ath_update_survey_stats(sc);
1663                 spin_unlock_irqrestore(&common->cc_lock, flags);
1664
1665                 /*
1666                  * If the operating channel changes, change the survey in-use flags
1667                  * along with it.
1668                  * Reset the survey data for the new channel, unless we're switching
1669                  * back to the operating channel from an off-channel operation.
1670                  */
1671                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1672                     sc->cur_survey != &sc->survey[pos]) {
1673
1674                         if (sc->cur_survey)
1675                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1676
1677                         sc->cur_survey = &sc->survey[pos];
1678
1679                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1680                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1681                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1682                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1683                 }
1684
1685                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1686                         ath_print(common, ATH_DBG_FATAL,
1687                                   "Unable to set channel\n");
1688                         mutex_unlock(&sc->mutex);
1689                         return -EINVAL;
1690                 }
1691
1692                 /*
1693                  * The most recent snapshot of channel->noisefloor for the old
1694                  * channel is only available after the hardware reset. Copy it to
1695                  * the survey stats now.
1696                  */
1697                 if (old_pos >= 0)
1698                         ath_update_survey_nf(sc, old_pos);
1699         }
1700
1701 skip_chan_change:
1702         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1703                 sc->config.txpowlimit = 2 * conf->power_level;
1704                 ath_update_txpow(sc);
1705         }
1706
1707         spin_lock_bh(&sc->wiphy_lock);
1708         disable_radio = ath9k_all_wiphys_idle(sc);
1709         spin_unlock_bh(&sc->wiphy_lock);
1710
1711         if (disable_radio) {
1712                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1713                 sc->ps_idle = true;
1714                 ath_radio_disable(sc, hw);
1715         }
1716
1717         mutex_unlock(&sc->mutex);
1718
1719         return 0;
1720 }
1721
1722 #define SUPPORTED_FILTERS                       \
1723         (FIF_PROMISC_IN_BSS |                   \
1724         FIF_ALLMULTI |                          \
1725         FIF_CONTROL |                           \
1726         FIF_PSPOLL |                            \
1727         FIF_OTHER_BSS |                         \
1728         FIF_BCN_PRBRESP_PROMISC |               \
1729         FIF_PROBE_REQ |                         \
1730         FIF_FCSFAIL)
1731
1732 /* FIXME: sc->sc_full_reset ? */
1733 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1734                                    unsigned int changed_flags,
1735                                    unsigned int *total_flags,
1736                                    u64 multicast)
1737 {
1738         struct ath_wiphy *aphy = hw->priv;
1739         struct ath_softc *sc = aphy->sc;
1740         u32 rfilt;
1741
1742         changed_flags &= SUPPORTED_FILTERS;
1743         *total_flags &= SUPPORTED_FILTERS;
1744
1745         sc->rx.rxfilter = *total_flags;
1746         ath9k_ps_wakeup(sc);
1747         rfilt = ath_calcrxfilter(sc);
1748         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1749         ath9k_ps_restore(sc);
1750
1751         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1752                   "Set HW RX filter: 0x%x\n", rfilt);
1753 }
1754
1755 static int ath9k_sta_add(struct ieee80211_hw *hw,
1756                          struct ieee80211_vif *vif,
1757                          struct ieee80211_sta *sta)
1758 {
1759         struct ath_wiphy *aphy = hw->priv;
1760         struct ath_softc *sc = aphy->sc;
1761
1762         ath_node_attach(sc, sta);
1763
1764         return 0;
1765 }
1766
1767 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1768                             struct ieee80211_vif *vif,
1769                             struct ieee80211_sta *sta)
1770 {
1771         struct ath_wiphy *aphy = hw->priv;
1772         struct ath_softc *sc = aphy->sc;
1773
1774         ath_node_detach(sc, sta);
1775
1776         return 0;
1777 }
1778
1779 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1780                          const struct ieee80211_tx_queue_params *params)
1781 {
1782         struct ath_wiphy *aphy = hw->priv;
1783         struct ath_softc *sc = aphy->sc;
1784         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1785         struct ath9k_tx_queue_info qi;
1786         int ret = 0, qnum;
1787
1788         if (queue >= WME_NUM_AC)
1789                 return 0;
1790
1791         mutex_lock(&sc->mutex);
1792
1793         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1794
1795         qi.tqi_aifs = params->aifs;
1796         qi.tqi_cwmin = params->cw_min;
1797         qi.tqi_cwmax = params->cw_max;
1798         qi.tqi_burstTime = params->txop;
1799         qnum = ath_get_hal_qnum(queue, sc);
1800
1801         ath_print(common, ATH_DBG_CONFIG,
1802                   "Configure tx [queue/halq] [%d/%d],  "
1803                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1804                   queue, qnum, params->aifs, params->cw_min,
1805                   params->cw_max, params->txop);
1806
1807         ret = ath_txq_update(sc, qnum, &qi);
1808         if (ret)
1809                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1810
1811         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1812                 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1813                         ath_beaconq_config(sc);
1814
1815         mutex_unlock(&sc->mutex);
1816
1817         return ret;
1818 }
1819
1820 static int ath9k_set_key(struct ieee80211_hw *hw,
1821                          enum set_key_cmd cmd,
1822                          struct ieee80211_vif *vif,
1823                          struct ieee80211_sta *sta,
1824                          struct ieee80211_key_conf *key)
1825 {
1826         struct ath_wiphy *aphy = hw->priv;
1827         struct ath_softc *sc = aphy->sc;
1828         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1829         int ret = 0;
1830
1831         if (modparam_nohwcrypt)
1832                 return -ENOSPC;
1833
1834         mutex_lock(&sc->mutex);
1835         ath9k_ps_wakeup(sc);
1836         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1837
1838         switch (cmd) {
1839         case SET_KEY:
1840                 ret = ath_key_config(common, vif, sta, key);
1841                 if (ret >= 0) {
1842                         key->hw_key_idx = ret;
1843                         /* push IV and Michael MIC generation to stack */
1844                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1845                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1846                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1847                         if (sc->sc_ah->sw_mgmt_crypto &&
1848                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1849                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1850                         ret = 0;
1851                 }
1852                 break;
1853         case DISABLE_KEY:
1854                 ath_key_delete(common, key);
1855                 break;
1856         default:
1857                 ret = -EINVAL;
1858         }
1859
1860         ath9k_ps_restore(sc);
1861         mutex_unlock(&sc->mutex);
1862
1863         return ret;
1864 }
1865
1866 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1867                                    struct ieee80211_vif *vif,
1868                                    struct ieee80211_bss_conf *bss_conf,
1869                                    u32 changed)
1870 {
1871         struct ath_wiphy *aphy = hw->priv;
1872         struct ath_softc *sc = aphy->sc;
1873         struct ath_hw *ah = sc->sc_ah;
1874         struct ath_common *common = ath9k_hw_common(ah);
1875         struct ath_vif *avp = (void *)vif->drv_priv;
1876         int slottime;
1877         int error;
1878
1879         mutex_lock(&sc->mutex);
1880
1881         if (changed & BSS_CHANGED_BSSID) {
1882                 /* Set BSSID */
1883                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1884                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1885                 common->curaid = 0;
1886                 ath9k_hw_write_associd(ah);
1887
1888                 /* Set aggregation protection mode parameters */
1889                 sc->config.ath_aggr_prot = 0;
1890
1891                 /* Only legacy IBSS for now */
1892                 if (vif->type == NL80211_IFTYPE_ADHOC)
1893                         ath_update_chainmask(sc, 0);
1894
1895                 ath_print(common, ATH_DBG_CONFIG,
1896                           "BSSID: %pM aid: 0x%x\n",
1897                           common->curbssid, common->curaid);
1898
1899                 /* need to reconfigure the beacon */
1900                 sc->sc_flags &= ~SC_OP_BEACONS ;
1901         }
1902
1903         /* Enable transmission of beacons (AP, IBSS, MESH) */
1904         if ((changed & BSS_CHANGED_BEACON) ||
1905             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1906                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1907                 error = ath_beacon_alloc(aphy, vif);
1908                 if (!error)
1909                         ath_beacon_config(sc, vif);
1910         }
1911
1912         if (changed & BSS_CHANGED_ERP_SLOT) {
1913                 if (bss_conf->use_short_slot)
1914                         slottime = 9;
1915                 else
1916                         slottime = 20;
1917                 if (vif->type == NL80211_IFTYPE_AP) {
1918                         /*
1919                          * Defer update, so that connected stations can adjust
1920                          * their settings at the same time.
1921                          * See beacon.c for more details
1922                          */
1923                         sc->beacon.slottime = slottime;
1924                         sc->beacon.updateslot = UPDATE;
1925                 } else {
1926                         ah->slottime = slottime;
1927                         ath9k_hw_init_global_settings(ah);
1928                 }
1929         }
1930
1931         /* Disable transmission of beacons */
1932         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1933                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1934
1935         if (changed & BSS_CHANGED_BEACON_INT) {
1936                 sc->beacon_interval = bss_conf->beacon_int;
1937                 /*
1938                  * In case of AP mode, the HW TSF has to be reset
1939                  * when the beacon interval changes.
1940                  */
1941                 if (vif->type == NL80211_IFTYPE_AP) {
1942                         sc->sc_flags |= SC_OP_TSF_RESET;
1943                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1944                         error = ath_beacon_alloc(aphy, vif);
1945                         if (!error)
1946                                 ath_beacon_config(sc, vif);
1947                 } else {
1948                         ath_beacon_config(sc, vif);
1949                 }
1950         }
1951
1952         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1953                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1954                           bss_conf->use_short_preamble);
1955                 if (bss_conf->use_short_preamble)
1956                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1957                 else
1958                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1959         }
1960
1961         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1962                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1963                           bss_conf->use_cts_prot);
1964                 if (bss_conf->use_cts_prot &&
1965                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1966                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1967                 else
1968                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1969         }
1970
1971         if (changed & BSS_CHANGED_ASSOC) {
1972                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1973                         bss_conf->assoc);
1974                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1975         }
1976
1977         mutex_unlock(&sc->mutex);
1978 }
1979
1980 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1981 {
1982         u64 tsf;
1983         struct ath_wiphy *aphy = hw->priv;
1984         struct ath_softc *sc = aphy->sc;
1985
1986         mutex_lock(&sc->mutex);
1987         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1988         mutex_unlock(&sc->mutex);
1989
1990         return tsf;
1991 }
1992
1993 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1994 {
1995         struct ath_wiphy *aphy = hw->priv;
1996         struct ath_softc *sc = aphy->sc;
1997
1998         mutex_lock(&sc->mutex);
1999         ath9k_hw_settsf64(sc->sc_ah, tsf);
2000         mutex_unlock(&sc->mutex);
2001 }
2002
2003 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2004 {
2005         struct ath_wiphy *aphy = hw->priv;
2006         struct ath_softc *sc = aphy->sc;
2007
2008         mutex_lock(&sc->mutex);
2009
2010         ath9k_ps_wakeup(sc);
2011         ath9k_hw_reset_tsf(sc->sc_ah);
2012         ath9k_ps_restore(sc);
2013
2014         mutex_unlock(&sc->mutex);
2015 }
2016
2017 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2018                               struct ieee80211_vif *vif,
2019                               enum ieee80211_ampdu_mlme_action action,
2020                               struct ieee80211_sta *sta,
2021                               u16 tid, u16 *ssn)
2022 {
2023         struct ath_wiphy *aphy = hw->priv;
2024         struct ath_softc *sc = aphy->sc;
2025         int ret = 0;
2026
2027         local_bh_disable();
2028
2029         switch (action) {
2030         case IEEE80211_AMPDU_RX_START:
2031                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2032                         ret = -ENOTSUPP;
2033                 break;
2034         case IEEE80211_AMPDU_RX_STOP:
2035                 break;
2036         case IEEE80211_AMPDU_TX_START:
2037                 ath9k_ps_wakeup(sc);
2038                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2039                 if (!ret)
2040                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2041                 ath9k_ps_restore(sc);
2042                 break;
2043         case IEEE80211_AMPDU_TX_STOP:
2044                 ath9k_ps_wakeup(sc);
2045                 ath_tx_aggr_stop(sc, sta, tid);
2046                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2047                 ath9k_ps_restore(sc);
2048                 break;
2049         case IEEE80211_AMPDU_TX_OPERATIONAL:
2050                 ath9k_ps_wakeup(sc);
2051                 ath_tx_aggr_resume(sc, sta, tid);
2052                 ath9k_ps_restore(sc);
2053                 break;
2054         default:
2055                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2056                           "Unknown AMPDU action\n");
2057         }
2058
2059         local_bh_enable();
2060
2061         return ret;
2062 }
2063
2064 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2065                              struct survey_info *survey)
2066 {
2067         struct ath_wiphy *aphy = hw->priv;
2068         struct ath_softc *sc = aphy->sc;
2069         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2070         struct ieee80211_supported_band *sband;
2071         struct ieee80211_channel *chan;
2072         unsigned long flags;
2073         int pos;
2074
2075         spin_lock_irqsave(&common->cc_lock, flags);
2076         if (idx == 0)
2077                 ath_update_survey_stats(sc);
2078
2079         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2080         if (sband && idx >= sband->n_channels) {
2081                 idx -= sband->n_channels;
2082                 sband = NULL;
2083         }
2084
2085         if (!sband)
2086                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2087
2088         if (!sband || idx >= sband->n_channels) {
2089                 spin_unlock_irqrestore(&common->cc_lock, flags);
2090                 return -ENOENT;
2091         }
2092
2093         chan = &sband->channels[idx];
2094         pos = chan->hw_value;
2095         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2096         survey->channel = chan;
2097         spin_unlock_irqrestore(&common->cc_lock, flags);
2098
2099         return 0;
2100 }
2101
2102 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2103 {
2104         struct ath_wiphy *aphy = hw->priv;
2105         struct ath_softc *sc = aphy->sc;
2106
2107         mutex_lock(&sc->mutex);
2108         if (ath9k_wiphy_scanning(sc)) {
2109                 /*
2110                  * There is a race here in mac80211 but fixing it requires
2111                  * we revisit how we handle the scan complete callback.
2112                  * After mac80211 fixes we will not have configured hardware
2113                  * to the home channel nor would we have configured the RX
2114                  * filter yet.
2115                  */
2116                 mutex_unlock(&sc->mutex);
2117                 return;
2118         }
2119
2120         aphy->state = ATH_WIPHY_SCAN;
2121         ath9k_wiphy_pause_all_forced(sc, aphy);
2122         mutex_unlock(&sc->mutex);
2123 }
2124
2125 /*
2126  * XXX: this requires a revisit after the driver
2127  * scan_complete gets moved to another place/removed in mac80211.
2128  */
2129 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2130 {
2131         struct ath_wiphy *aphy = hw->priv;
2132         struct ath_softc *sc = aphy->sc;
2133
2134         mutex_lock(&sc->mutex);
2135         aphy->state = ATH_WIPHY_ACTIVE;
2136         mutex_unlock(&sc->mutex);
2137 }
2138
2139 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2140 {
2141         struct ath_wiphy *aphy = hw->priv;
2142         struct ath_softc *sc = aphy->sc;
2143         struct ath_hw *ah = sc->sc_ah;
2144
2145         mutex_lock(&sc->mutex);
2146         ah->coverage_class = coverage_class;
2147         ath9k_hw_init_global_settings(ah);
2148         mutex_unlock(&sc->mutex);
2149 }
2150
2151 struct ieee80211_ops ath9k_ops = {
2152         .tx                 = ath9k_tx,
2153         .start              = ath9k_start,
2154         .stop               = ath9k_stop,
2155         .add_interface      = ath9k_add_interface,
2156         .remove_interface   = ath9k_remove_interface,
2157         .config             = ath9k_config,
2158         .configure_filter   = ath9k_configure_filter,
2159         .sta_add            = ath9k_sta_add,
2160         .sta_remove         = ath9k_sta_remove,
2161         .conf_tx            = ath9k_conf_tx,
2162         .bss_info_changed   = ath9k_bss_info_changed,
2163         .set_key            = ath9k_set_key,
2164         .get_tsf            = ath9k_get_tsf,
2165         .set_tsf            = ath9k_set_tsf,
2166         .reset_tsf          = ath9k_reset_tsf,
2167         .ampdu_action       = ath9k_ampdu_action,
2168         .get_survey         = ath9k_get_survey,
2169         .sw_scan_start      = ath9k_sw_scan_start,
2170         .sw_scan_complete   = ath9k_sw_scan_complete,
2171         .rfkill_poll        = ath9k_rfkill_poll_state,
2172         .set_coverage_class = ath9k_set_coverage_class,
2173 };