drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  68                                                 struct ieee80211_hw *hw)
  69 {
  70         struct ieee80211_channel *curchan = hw->conf.channel;
  71         struct ath9k_channel *channel;
  72         u8 chan_idx;
  73
  74         chan_idx = curchan->hw_value;
  75         channel = &sc->sc_ah->channels[chan_idx];
  76         ath9k_cmn_update_ichannel(channel, curchan, hw->conf.channel_type);
  77         return channel;
  78 }
  79
  80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath9k_ps_wakeup(struct ath_softc *sc)
  93 {
  94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  95         unsigned long flags;
  96         enum ath9k_power_mode power_mode;
  97
  98         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  99         if (++sc->ps_usecount != 1)
 100                 goto unlock;
 101
 102         power_mode = sc->sc_ah->power_mode;
 103         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 104
 105         /*
 106          * While the hardware is asleep, the cycle counters contain no
 107          * useful data. Better clear them now so that they don't mess up
 108          * survey data results.
 109          */
 110         if (power_mode != ATH9K_PM_AWAKE) {
 111                 spin_lock(&common->cc_lock);
 112                 ath_hw_cycle_counters_update(common);
 113                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 114                 spin_unlock(&common->cc_lock);
 115         }
 116
 117  unlock:
 118         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 119 }
 120
 121 void ath9k_ps_restore(struct ath_softc *sc)
 122 {
 123         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (--sc->ps_usecount != 0)
 128                 goto unlock;
 129
 130         spin_lock(&common->cc_lock);
 131         ath_hw_cycle_counters_update(common);
 132         spin_unlock(&common->cc_lock);
 133
 134         if (sc->ps_idle)
 135                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 136         else if (sc->ps_enabled &&
 137                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 138                               PS_WAIT_FOR_CAB |
 139                               PS_WAIT_FOR_PSPOLL_DATA |
 140                               PS_WAIT_FOR_TX_ACK)))
 141                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 142
 143  unlock:
 144         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 145 }
 146
 147 static void ath_start_ani(struct ath_common *common)
 148 {
 149         struct ath_hw *ah = common->ah;
 150         unsigned long timestamp = jiffies_to_msecs(jiffies);
 151         struct ath_softc *sc = (struct ath_softc *) common->priv;
 152
 153         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 154                 return;
 155
 156         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 157                 return;
 158
 159         common->ani.longcal_timer = timestamp;
 160         common->ani.shortcal_timer = timestamp;
 161         common->ani.checkani_timer = timestamp;
 162
 163         mod_timer(&common->ani.timer,
 164                   jiffies +
 165                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 166 }
 167
 168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 169 {
 170         struct ath_hw *ah = sc->sc_ah;
 171         struct ath9k_channel *chan = &ah->channels[channel];
 172         struct survey_info *survey = &sc->survey[channel];
 173
 174         if (chan->noisefloor) {
 175                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 176                 survey->noise = chan->noisefloor;
 177         }
 178 }
 179
 180 static void ath_update_survey_stats(struct ath_softc *sc)
 181 {
 182         struct ath_hw *ah = sc->sc_ah;
 183         struct ath_common *common = ath9k_hw_common(ah);
 184         int pos = ah->curchan - &ah->channels[0];
 185         struct survey_info *survey = &sc->survey[pos];
 186         struct ath_cycle_counters *cc = &common->cc_survey;
 187         unsigned int div = common->clockrate * 1000;
 188
 189         if (!ah->curchan)
 190                 return;
 191
 192         if (ah->power_mode == ATH9K_PM_AWAKE)
 193                 ath_hw_cycle_counters_update(common);
 194
 195         if (cc->cycles > 0) {
 196                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 197                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 198                         SURVEY_INFO_CHANNEL_TIME_RX |
 199                         SURVEY_INFO_CHANNEL_TIME_TX;
 200                 survey->channel_time += cc->cycles / div;
 201                 survey->channel_time_busy += cc->rx_busy / div;
 202                 survey->channel_time_rx += cc->rx_frame / div;
 203                 survey->channel_time_tx += cc->tx_frame / div;
 204         }
 205         memset(cc, 0, sizeof(*cc));
 206
 207         ath_update_survey_nf(sc, pos);
 208 }
 209
 210 /*
 211  * Set/change channels.  If the channel is really being changed, it's done
 212  * by reseting the chip.  To accomplish this we must first cleanup any pending
 213  * DMA, then restart stuff.
 214 */
 215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 216                     struct ath9k_channel *hchan)
 217 {
 218         struct ath_hw *ah = sc->sc_ah;
 219         struct ath_common *common = ath9k_hw_common(ah);
 220         struct ieee80211_conf *conf = &common->hw->conf;
 221         bool fastcc = true, stopped;
 222         struct ieee80211_channel *channel = hw->conf.channel;
 223         struct ath9k_hw_cal_data *caldata = NULL;
 224         int r;
 225
 226         if (sc->sc_flags & SC_OP_INVALID)
 227                 return -EIO;
 228
 229         del_timer_sync(&common->ani.timer);
 230         cancel_work_sync(&sc->paprd_work);
 231         cancel_work_sync(&sc->hw_check_work);
 232         cancel_delayed_work_sync(&sc->tx_complete_work);
 233         cancel_delayed_work_sync(&sc->hw_pll_work);
 234
 235         ath9k_ps_wakeup(sc);
 236
 237         spin_lock_bh(&sc->sc_pcu_lock);
 238
 239         /*
 240          * This is only performed if the channel settings have
 241          * actually changed.
 242          *
 243          * To switch channels clear any pending DMA operations;
 244          * wait long enough for the RX fifo to drain, reset the
 245          * hardware at the new frequency, and then re-enable
 246          * the relevant bits of the h/w.
 247          */
 248         ath9k_hw_disable_interrupts(ah);
 249         stopped = ath_drain_all_txq(sc, false);
 250
 251         if (!ath_stoprecv(sc))
 252                 stopped = false;
 253
 254         if (!ath9k_hw_check_alive(ah))
 255                 stopped = false;
 256
 257         /* XXX: do not flush receive queue here. We don't want
 258          * to flush data frames already in queue because of
 259          * changing channel. */
 260
 261         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 262                 fastcc = false;
 263
 264         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 265                 caldata = &sc->caldata;
 266
 267         ath_dbg(common, ATH_DBG_CONFIG,
 268                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 269                 sc->sc_ah->curchan->channel,
 270                 channel->center_freq, conf_is_ht40(conf),
 271                 fastcc);
 272
 273         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 274         if (r) {
 275                 ath_err(common,
 276                         "Unable to reset channel (%u MHz), reset status %d\n",
 277                         channel->center_freq, r);
 278                 goto ps_restore;
 279         }
 280
 281         if (ath_startrecv(sc) != 0) {
 282                 ath_err(common, "Unable to restart recv logic\n");
 283                 r = -EIO;
 284                 goto ps_restore;
 285         }
 286
 287         ath_update_txpow(sc);
 288         ath9k_hw_set_interrupts(ah, ah->imask);
 289
 290         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 291                 if (sc->sc_flags & SC_OP_BEACONS)
 292                         ath_beacon_config(sc, NULL);
 293                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 294                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
 295                 ath_start_ani(common);
 296         }
 297
 298  ps_restore:
 299         ieee80211_wake_queues(hw);
 300
 301         spin_unlock_bh(&sc->sc_pcu_lock);
 302
 303         ath9k_ps_restore(sc);
 304         return r;
 305 }
 306
 307 static void ath_paprd_activate(struct ath_softc *sc)
 308 {
 309         struct ath_hw *ah = sc->sc_ah;
 310         struct ath9k_hw_cal_data *caldata = ah->caldata;
 311         struct ath_common *common = ath9k_hw_common(ah);
 312         int chain;
 313
 314         if (!caldata || !caldata->paprd_done)
 315                 return;
 316
 317         ath9k_ps_wakeup(sc);
 318         ar9003_paprd_enable(ah, false);
 319         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 320                 if (!(common->tx_chainmask & BIT(chain)))
 321                         continue;
 322
 323                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 324         }
 325
 326         ar9003_paprd_enable(ah, true);
 327         ath9k_ps_restore(sc);
 328 }
 329
 330 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 331 {
 332         struct ieee80211_hw *hw = sc->hw;
 333         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 334         struct ath_tx_control txctl;
 335         int time_left;
 336
 337         memset(&txctl, 0, sizeof(txctl));
 338         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 339
 340         memset(tx_info, 0, sizeof(*tx_info));
 341         tx_info->band = hw->conf.channel->band;
 342         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 343         tx_info->control.rates[0].idx = 0;
 344         tx_info->control.rates[0].count = 1;
 345         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 346         tx_info->control.rates[1].idx = -1;
 347
 348         init_completion(&sc->paprd_complete);
 349         sc->paprd_pending = true;
 350         txctl.paprd = BIT(chain);
 351         if (ath_tx_start(hw, skb, &txctl) != 0)
 352                 return false;
 353
 354         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 355                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 356         sc->paprd_pending = false;
 357
 358         if (!time_left)
 359                 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
 360                         "Timeout waiting for paprd training on TX chain %d\n",
 361                         chain);
 362
 363         return !!time_left;
 364 }
 365
 366 void ath_paprd_calibrate(struct work_struct *work)
 367 {
 368         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 369         struct ieee80211_hw *hw = sc->hw;
 370         struct ath_hw *ah = sc->sc_ah;
 371         struct ieee80211_hdr *hdr;
 372         struct sk_buff *skb = NULL;
 373         struct ath9k_hw_cal_data *caldata = ah->caldata;
 374         struct ath_common *common = ath9k_hw_common(ah);
 375         int ftype;
 376         int chain_ok = 0;
 377         int chain;
 378         int len = 1800;
 379
 380         if (!caldata)
 381                 return;
 382
 383         if (ar9003_paprd_init_table(ah) < 0)
 384                 return;
 385
 386         skb = alloc_skb(len, GFP_KERNEL);
 387         if (!skb)
 388                 return;
 389
 390         skb_put(skb, len);
 391         memset(skb->data, 0, len);
 392         hdr = (struct ieee80211_hdr *)skb->data;
 393         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 394         hdr->frame_control = cpu_to_le16(ftype);
 395         hdr->duration_id = cpu_to_le16(10);
 396         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 397         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 398         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 399
 400         ath9k_ps_wakeup(sc);
 401         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 402                 if (!(common->tx_chainmask & BIT(chain)))
 403                         continue;
 404
 405                 chain_ok = 0;
 406
 407                 ath_dbg(common, ATH_DBG_CALIBRATE,
 408                         "Sending PAPRD frame for thermal measurement "
 409                         "on chain %d\n", chain);
 410                 if (!ath_paprd_send_frame(sc, skb, chain))
 411                         goto fail_paprd;
 412
 413                 ar9003_paprd_setup_gain_table(ah, chain);
 414
 415                 ath_dbg(common, ATH_DBG_CALIBRATE,
 416                         "Sending PAPRD training frame on chain %d\n", chain);
 417                 if (!ath_paprd_send_frame(sc, skb, chain))
 418                         goto fail_paprd;
 419
 420                 if (!ar9003_paprd_is_done(ah))
 421                         break;
 422
 423                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 424                         break;
 425
 426                 chain_ok = 1;
 427         }
 428         kfree_skb(skb);
 429
 430         if (chain_ok) {
 431                 caldata->paprd_done = true;
 432                 ath_paprd_activate(sc);
 433         }
 434
 435 fail_paprd:
 436         ath9k_ps_restore(sc);
 437 }
 438
 439 /*
 440  *  This routine performs the periodic noise floor calibration function
 441  *  that is used to adjust and optimize the chip performance.  This
 442  *  takes environmental changes (location, temperature) into account.
 443  *  When the task is complete, it reschedules itself depending on the
 444  *  appropriate interval that was calculated.
 445  */
 446 void ath_ani_calibrate(unsigned long data)
 447 {
 448         struct ath_softc *sc = (struct ath_softc *)data;
 449         struct ath_hw *ah = sc->sc_ah;
 450         struct ath_common *common = ath9k_hw_common(ah);
 451         bool longcal = false;
 452         bool shortcal = false;
 453         bool aniflag = false;
 454         unsigned int timestamp = jiffies_to_msecs(jiffies);
 455         u32 cal_interval, short_cal_interval, long_cal_interval;
 456         unsigned long flags;
 457
 458         if (ah->caldata && ah->caldata->nfcal_interference)
 459                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 460         else
 461                 long_cal_interval = ATH_LONG_CALINTERVAL;
 462
 463         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 464                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 465
 466         /* Only calibrate if awake */
 467         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 468                 goto set_timer;
 469
 470         ath9k_ps_wakeup(sc);
 471
 472         /* Long calibration runs independently of short calibration. */
 473         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 474                 longcal = true;
 475                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 476                 common->ani.longcal_timer = timestamp;
 477         }
 478
 479         /* Short calibration applies only while caldone is false */
 480         if (!common->ani.caldone) {
 481                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 482                         shortcal = true;
 483                         ath_dbg(common, ATH_DBG_ANI,
 484                                 "shortcal @%lu\n", jiffies);
 485                         common->ani.shortcal_timer = timestamp;
 486                         common->ani.resetcal_timer = timestamp;
 487                 }
 488         } else {
 489                 if ((timestamp - common->ani.resetcal_timer) >=
 490                     ATH_RESTART_CALINTERVAL) {
 491                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 492                         if (common->ani.caldone)
 493                                 common->ani.resetcal_timer = timestamp;
 494                 }
 495         }
 496
 497         /* Verify whether we must check ANI */
 498         if ((timestamp - common->ani.checkani_timer) >=
 499              ah->config.ani_poll_interval) {
 500                 aniflag = true;
 501                 common->ani.checkani_timer = timestamp;
 502         }
 503
 504         /* Skip all processing if there's nothing to do. */
 505         if (longcal || shortcal || aniflag) {
 506                 /* Call ANI routine if necessary */
 507                 if (aniflag) {
 508                         spin_lock_irqsave(&common->cc_lock, flags);
 509                         ath9k_hw_ani_monitor(ah, ah->curchan);
 510                         ath_update_survey_stats(sc);
 511                         spin_unlock_irqrestore(&common->cc_lock, flags);
 512                 }
 513
 514                 /* Perform calibration if necessary */
 515                 if (longcal || shortcal) {
 516                         common->ani.caldone =
 517                                 ath9k_hw_calibrate(ah,
 518                                                    ah->curchan,
 519                                                    common->rx_chainmask,
 520                                                    longcal);
 521                 }
 522         }
 523
 524         ath9k_ps_restore(sc);
 525
 526 set_timer:
 527         /*
 528         * Set timer interval based on previous results.
 529         * The interval must be the shortest necessary to satisfy ANI,
 530         * short calibration and long calibration.
 531         */
 532         cal_interval = ATH_LONG_CALINTERVAL;
 533         if (sc->sc_ah->config.enable_ani)
 534                 cal_interval = min(cal_interval,
 535                                    (u32)ah->config.ani_poll_interval);
 536         if (!common->ani.caldone)
 537                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 538
 539         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 540         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 541                 if (!ah->caldata->paprd_done)
 542                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 543                 else if (!ah->paprd_table_write_done)
 544                         ath_paprd_activate(sc);
 545         }
 546 }
 547
 548 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 549 {
 550         struct ath_node *an;
 551         struct ath_hw *ah = sc->sc_ah;
 552         an = (struct ath_node *)sta->drv_priv;
 553
 554 #ifdef CONFIG_ATH9K_DEBUGFS
 555         spin_lock(&sc->nodes_lock);
 556         list_add(&an->list, &sc->nodes);
 557         spin_unlock(&sc->nodes_lock);
 558         an->sta = sta;
 559 #endif
 560         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 561                 sc->sc_flags |= SC_OP_ENABLE_APM;
 562
 563         if (sc->sc_flags & SC_OP_TXAGGR) {
 564                 ath_tx_node_init(sc, an);
 565                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 566                                      sta->ht_cap.ampdu_factor);
 567                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 568         }
 569 }
 570
 571 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 572 {
 573         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 574
 575 #ifdef CONFIG_ATH9K_DEBUGFS
 576         spin_lock(&sc->nodes_lock);
 577         list_del(&an->list);
 578         spin_unlock(&sc->nodes_lock);
 579         an->sta = NULL;
 580 #endif
 581
 582         if (sc->sc_flags & SC_OP_TXAGGR)
 583                 ath_tx_node_cleanup(sc, an);
 584 }
 585
 586 void ath_hw_check(struct work_struct *work)
 587 {
 588         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 589         int i;
 590
 591         ath9k_ps_wakeup(sc);
 592
 593         for (i = 0; i < 3; i++) {
 594                 if (ath9k_hw_check_alive(sc->sc_ah))
 595                         goto out;
 596
 597                 msleep(1);
 598         }
 599         ath_reset(sc, true);
 600
 601 out:
 602         ath9k_ps_restore(sc);
 603 }
 604
 605 void ath9k_tasklet(unsigned long data)
 606 {
 607         struct ath_softc *sc = (struct ath_softc *)data;
 608         struct ath_hw *ah = sc->sc_ah;
 609         struct ath_common *common = ath9k_hw_common(ah);
 610
 611         u32 status = sc->intrstatus;
 612         u32 rxmask;
 613
 614         if (status & ATH9K_INT_FATAL) {
 615                 ath_reset(sc, true);
 616                 return;
 617         }
 618
 619         ath9k_ps_wakeup(sc);
 620         spin_lock(&sc->sc_pcu_lock);
 621
 622         /*
 623          * Only run the baseband hang check if beacons stop working in AP or
 624          * IBSS mode, because it has a high false positive rate. For station
 625          * mode it should not be necessary, since the upper layers will detect
 626          * this through a beacon miss automatically and the following channel
 627          * change will trigger a hardware reset anyway
 628          */
 629         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
 630             !ath9k_hw_check_alive(ah))
 631                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 632
 633         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 634                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 635                           ATH9K_INT_RXORN);
 636         else
 637                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 638
 639         if (status & rxmask) {
 640                 /* Check for high priority Rx first */
 641                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 642                     (status & ATH9K_INT_RXHP))
 643                         ath_rx_tasklet(sc, 0, true);
 644
 645                 ath_rx_tasklet(sc, 0, false);
 646         }
 647
 648         if (status & ATH9K_INT_TX) {
 649                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 650                         ath_tx_edma_tasklet(sc);
 651                 else
 652                         ath_tx_tasklet(sc);
 653         }
 654
 655         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 656                 /*
 657                  * TSF sync does not look correct; remain awake to sync with
 658                  * the next Beacon.
 659                  */
 660                 ath_dbg(common, ATH_DBG_PS,
 661                         "TSFOOR - Sync with next Beacon\n");
 662                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 663         }
 664
 665         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 666                 if (status & ATH9K_INT_GENTIMER)
 667                         ath_gen_timer_isr(sc->sc_ah);
 668
 669         /* re-enable hardware interrupt */
 670         ath9k_hw_enable_interrupts(ah);
 671
 672         spin_unlock(&sc->sc_pcu_lock);
 673         ath9k_ps_restore(sc);
 674 }
 675
 676 irqreturn_t ath_isr(int irq, void *dev)
 677 {
 678 #define SCHED_INTR (                            \
 679                 ATH9K_INT_FATAL |               \
 680                 ATH9K_INT_RXORN |               \
 681                 ATH9K_INT_RXEOL |               \
 682                 ATH9K_INT_RX |                  \
 683                 ATH9K_INT_RXLP |                \
 684                 ATH9K_INT_RXHP |                \
 685                 ATH9K_INT_TX |                  \
 686                 ATH9K_INT_BMISS |               \
 687                 ATH9K_INT_CST |                 \
 688                 ATH9K_INT_TSFOOR |              \
 689                 ATH9K_INT_GENTIMER)
 690
 691         struct ath_softc *sc = dev;
 692         struct ath_hw *ah = sc->sc_ah;
 693         struct ath_common *common = ath9k_hw_common(ah);
 694         enum ath9k_int status;
 695         bool sched = false;
 696
 697         /*
 698          * The hardware is not ready/present, don't
 699          * touch anything. Note this can happen early
 700          * on if the IRQ is shared.
 701          */
 702         if (sc->sc_flags & SC_OP_INVALID)
 703                 return IRQ_NONE;
 704
 705
 706         /* shared irq, not for us */
 707
 708         if (!ath9k_hw_intrpend(ah))
 709                 return IRQ_NONE;
 710
 711         /*
 712          * Figure out the reason(s) for the interrupt.  Note
 713          * that the hal returns a pseudo-ISR that may include
 714          * bits we haven't explicitly enabled so we mask the
 715          * value to insure we only process bits we requested.
 716          */
 717         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 718         status &= ah->imask;    /* discard unasked-for bits */
 719
 720         /*
 721          * If there are no status bits set, then this interrupt was not
 722          * for me (should have been caught above).
 723          */
 724         if (!status)
 725                 return IRQ_NONE;
 726
 727         /* Cache the status */
 728         sc->intrstatus = status;
 729
 730         if (status & SCHED_INTR)
 731                 sched = true;
 732
 733         /*
 734          * If a FATAL or RXORN interrupt is received, we have to reset the
 735          * chip immediately.
 736          */
 737         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 738             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 739                 goto chip_reset;
 740
 741         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 742             (status & ATH9K_INT_BB_WATCHDOG)) {
 743
 744                 spin_lock(&common->cc_lock);
 745                 ath_hw_cycle_counters_update(common);
 746                 ar9003_hw_bb_watchdog_dbg_info(ah);
 747                 spin_unlock(&common->cc_lock);
 748
 749                 goto chip_reset;
 750         }
 751
 752         if (status & ATH9K_INT_SWBA)
 753                 tasklet_schedule(&sc->bcon_tasklet);
 754
 755         if (status & ATH9K_INT_TXURN)
 756                 ath9k_hw_updatetxtriglevel(ah, true);
 757
 758         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 759                 if (status & ATH9K_INT_RXEOL) {
 760                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 761                         ath9k_hw_set_interrupts(ah, ah->imask);
 762                 }
 763         }
 764
 765         if (status & ATH9K_INT_MIB) {
 766                 /*
 767                  * Disable interrupts until we service the MIB
 768                  * interrupt; otherwise it will continue to
 769                  * fire.
 770                  */
 771                 ath9k_hw_disable_interrupts(ah);
 772                 /*
 773                  * Let the hal handle the event. We assume
 774                  * it will clear whatever condition caused
 775                  * the interrupt.
 776                  */
 777                 spin_lock(&common->cc_lock);
 778                 ath9k_hw_proc_mib_event(ah);
 779                 spin_unlock(&common->cc_lock);
 780                 ath9k_hw_enable_interrupts(ah);
 781         }
 782
 783         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 784                 if (status & ATH9K_INT_TIM_TIMER) {
 785                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 786                                 goto chip_reset;
 787                         /* Clear RxAbort bit so that we can
 788                          * receive frames */
 789                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 790                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 791                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 792                 }
 793
 794 chip_reset:
 795
 796         ath_debug_stat_interrupt(sc, status);
 797
 798         if (sched) {
 799                 /* turn off every interrupt */
 800                 ath9k_hw_disable_interrupts(ah);
 801                 tasklet_schedule(&sc->intr_tq);
 802         }
 803
 804         return IRQ_HANDLED;
 805
 806 #undef SCHED_INTR
 807 }
 808
 809 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 810                                  struct ieee80211_hw *hw,
 811                                  struct ieee80211_vif *vif,
 812                                  struct ieee80211_bss_conf *bss_conf)
 813 {
 814         struct ath_hw *ah = sc->sc_ah;
 815         struct ath_common *common = ath9k_hw_common(ah);
 816
 817         if (bss_conf->assoc) {
 818                 ath_dbg(common, ATH_DBG_CONFIG,
 819                         "Bss Info ASSOC %d, bssid: %pM\n",
 820                         bss_conf->aid, common->curbssid);
 821
 822                 /* New association, store aid */
 823                 common->curaid = bss_conf->aid;
 824                 ath9k_hw_write_associd(ah);
 825
 826                 /*
 827                  * Request a re-configuration of Beacon related timers
 828                  * on the receipt of the first Beacon frame (i.e.,
 829                  * after time sync with the AP).
 830                  */
 831                 sc->ps_flags |= PS_BEACON_SYNC;
 832
 833                 /* Configure the beacon */
 834                 ath_beacon_config(sc, vif);
 835
 836                 /* Reset rssi stats */
 837                 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
 838                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 839
 840                 sc->sc_flags |= SC_OP_ANI_RUN;
 841                 ath_start_ani(common);
 842         } else {
 843                 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 844                 common->curaid = 0;
 845                 /* Stop ANI */
 846                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 847                 del_timer_sync(&common->ani.timer);
 848         }
 849 }
 850
 851 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 852 {
 853         struct ath_hw *ah = sc->sc_ah;
 854         struct ath_common *common = ath9k_hw_common(ah);
 855         struct ieee80211_channel *channel = hw->conf.channel;
 856         int r;
 857
 858         ath9k_ps_wakeup(sc);
 859         spin_lock_bh(&sc->sc_pcu_lock);
 860
 861         ath9k_hw_configpcipowersave(ah, 0, 0);
 862
 863         if (!ah->curchan)
 864                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 865
 866         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 867         if (r) {
 868                 ath_err(common,
 869                         "Unable to reset channel (%u MHz), reset status %d\n",
 870                         channel->center_freq, r);
 871         }
 872
 873         ath_update_txpow(sc);
 874         if (ath_startrecv(sc) != 0) {
 875                 ath_err(common, "Unable to restart recv logic\n");
 876                 goto out;
 877         }
 878         if (sc->sc_flags & SC_OP_BEACONS)
 879                 ath_beacon_config(sc, NULL);    /* restart beacons */
 880
 881         /* Re-Enable  interrupts */
 882         ath9k_hw_set_interrupts(ah, ah->imask);
 883
 884         /* Enable LED */
 885         ath9k_hw_cfg_output(ah, ah->led_pin,
 886                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 887         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 888
 889         ieee80211_wake_queues(hw);
 890 out:
 891         spin_unlock_bh(&sc->sc_pcu_lock);
 892
 893         ath9k_ps_restore(sc);
 894 }
 895
 896 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 897 {
 898         struct ath_hw *ah = sc->sc_ah;
 899         struct ieee80211_channel *channel = hw->conf.channel;
 900         int r;
 901
 902         ath9k_ps_wakeup(sc);
 903         spin_lock_bh(&sc->sc_pcu_lock);
 904
 905         ieee80211_stop_queues(hw);
 906
 907         /*
 908          * Keep the LED on when the radio is disabled
 909          * during idle unassociated state.
 910          */
 911         if (!sc->ps_idle) {
 912                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 913                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 914         }
 915
 916         /* Disable interrupts */
 917         ath9k_hw_disable_interrupts(ah);
 918
 919         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 920
 921         ath_stoprecv(sc);               /* turn off frame recv */
 922         ath_flushrecv(sc);              /* flush recv queue */
 923
 924         if (!ah->curchan)
 925                 ah->curchan = ath_get_curchannel(sc, hw);
 926
 927         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 928         if (r) {
 929                 ath_err(ath9k_hw_common(sc->sc_ah),
 930                         "Unable to reset channel (%u MHz), reset status %d\n",
 931                         channel->center_freq, r);
 932         }
 933
 934         ath9k_hw_phy_disable(ah);
 935
 936         ath9k_hw_configpcipowersave(ah, 1, 1);
 937
 938         spin_unlock_bh(&sc->sc_pcu_lock);
 939         ath9k_ps_restore(sc);
 940 }
 941
 942 int ath_reset(struct ath_softc *sc, bool retry_tx)
 943 {
 944         struct ath_hw *ah = sc->sc_ah;
 945         struct ath_common *common = ath9k_hw_common(ah);
 946         struct ieee80211_hw *hw = sc->hw;
 947         int r;
 948
 949         /* Stop ANI */
 950         del_timer_sync(&common->ani.timer);
 951
 952         ath9k_ps_wakeup(sc);
 953         spin_lock_bh(&sc->sc_pcu_lock);
 954
 955         ieee80211_stop_queues(hw);
 956
 957         ath9k_hw_disable_interrupts(ah);
 958         ath_drain_all_txq(sc, retry_tx);
 959
 960         ath_stoprecv(sc);
 961         ath_flushrecv(sc);
 962
 963         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 964         if (r)
 965                 ath_err(common,
 966                         "Unable to reset hardware; reset status %d\n", r);
 967
 968         if (ath_startrecv(sc) != 0)
 969                 ath_err(common, "Unable to start recv logic\n");
 970
 971         /*
 972          * We may be doing a reset in response to a request
 973          * that changes the channel so update any state that
 974          * might change as a result.
 975          */
 976         ath_update_txpow(sc);
 977
 978         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
 979                 ath_beacon_config(sc, NULL);    /* restart beacons */
 980
 981         ath9k_hw_set_interrupts(ah, ah->imask);
 982
 983         if (retry_tx) {
 984                 int i;
 985                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 986                         if (ATH_TXQ_SETUP(sc, i)) {
 987                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
 988                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
 989                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 990                         }
 991                 }
 992         }
 993
 994         ieee80211_wake_queues(hw);
 995         spin_unlock_bh(&sc->sc_pcu_lock);
 996
 997         /* Start ANI */
 998         ath_start_ani(common);
 999         ath9k_ps_restore(sc);
1000
1001         return r;
1002 }
1003
1004 /**********************/
1005 /* mac80211 callbacks */
1006 /**********************/
1007
1008 static int ath9k_start(struct ieee80211_hw *hw)
1009 {
1010         struct ath_softc *sc = hw->priv;
1011         struct ath_hw *ah = sc->sc_ah;
1012         struct ath_common *common = ath9k_hw_common(ah);
1013         struct ieee80211_channel *curchan = hw->conf.channel;
1014         struct ath9k_channel *init_channel;
1015         int r;
1016
1017         ath_dbg(common, ATH_DBG_CONFIG,
1018                 "Starting driver with initial channel: %d MHz\n",
1019                 curchan->center_freq);
1020
1021         mutex_lock(&sc->mutex);
1022
1023         /* setup initial channel */
1024         sc->chan_idx = curchan->hw_value;
1025
1026         init_channel = ath_get_curchannel(sc, hw);
1027
1028         /* Reset SERDES registers */
1029         ath9k_hw_configpcipowersave(ah, 0, 0);
1030
1031         /*
1032          * The basic interface to setting the hardware in a good
1033          * state is ``reset''.  On return the hardware is known to
1034          * be powered up and with interrupts disabled.  This must
1035          * be followed by initialization of the appropriate bits
1036          * and then setup of the interrupt mask.
1037          */
1038         spin_lock_bh(&sc->sc_pcu_lock);
1039         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1040         if (r) {
1041                 ath_err(common,
1042                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1043                         r, curchan->center_freq);
1044                 spin_unlock_bh(&sc->sc_pcu_lock);
1045                 goto mutex_unlock;
1046         }
1047
1048         /*
1049          * This is needed only to setup initial state
1050          * but it's best done after a reset.
1051          */
1052         ath_update_txpow(sc);
1053
1054         /*
1055          * Setup the hardware after reset:
1056          * The receive engine is set going.
1057          * Frame transmit is handled entirely
1058          * in the frame output path; there's nothing to do
1059          * here except setup the interrupt mask.
1060          */
1061         if (ath_startrecv(sc) != 0) {
1062                 ath_err(common, "Unable to start recv logic\n");
1063                 r = -EIO;
1064                 spin_unlock_bh(&sc->sc_pcu_lock);
1065                 goto mutex_unlock;
1066         }
1067         spin_unlock_bh(&sc->sc_pcu_lock);
1068
1069         /* Setup our intr mask. */
1070         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1071                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1072                     ATH9K_INT_GLOBAL;
1073
1074         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1075                 ah->imask |= ATH9K_INT_RXHP |
1076                              ATH9K_INT_RXLP |
1077                              ATH9K_INT_BB_WATCHDOG;
1078         else
1079                 ah->imask |= ATH9K_INT_RX;
1080
1081         ah->imask |= ATH9K_INT_GTT;
1082
1083         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1084                 ah->imask |= ATH9K_INT_CST;
1085
1086         sc->sc_flags &= ~SC_OP_INVALID;
1087         sc->sc_ah->is_monitoring = false;
1088
1089         /* Disable BMISS interrupt when we're not associated */
1090         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1091         ath9k_hw_set_interrupts(ah, ah->imask);
1092
1093         ieee80211_wake_queues(hw);
1094
1095         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1096
1097         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1098             !ah->btcoex_hw.enabled) {
1099                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1100                                            AR_STOMP_LOW_WLAN_WGHT);
1101                 ath9k_hw_btcoex_enable(ah);
1102
1103                 if (common->bus_ops->bt_coex_prep)
1104                         common->bus_ops->bt_coex_prep(common);
1105                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1106                         ath9k_btcoex_timer_resume(sc);
1107         }
1108
1109         /* User has the option to provide pm-qos value as a module
1110          * parameter rather than using the default value of
1111          * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1112          */
1113         pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1114
1115         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1116                 common->bus_ops->extn_synch_en(common);
1117
1118 mutex_unlock:
1119         mutex_unlock(&sc->mutex);
1120
1121         return r;
1122 }
1123
1124 static int ath9k_tx(struct ieee80211_hw *hw,
1125                     struct sk_buff *skb)
1126 {
1127         struct ath_softc *sc = hw->priv;
1128         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1129         struct ath_tx_control txctl;
1130         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1131
1132         if (sc->ps_enabled) {
1133                 /*
1134                  * mac80211 does not set PM field for normal data frames, so we
1135                  * need to update that based on the current PS mode.
1136                  */
1137                 if (ieee80211_is_data(hdr->frame_control) &&
1138                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1139                     !ieee80211_has_pm(hdr->frame_control)) {
1140                         ath_dbg(common, ATH_DBG_PS,
1141                                 "Add PM=1 for a TX frame while in PS mode\n");
1142                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1143                 }
1144         }
1145
1146         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1147                 /*
1148                  * We are using PS-Poll and mac80211 can request TX while in
1149                  * power save mode. Need to wake up hardware for the TX to be
1150                  * completed and if needed, also for RX of buffered frames.
1151                  */
1152                 ath9k_ps_wakeup(sc);
1153                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1154                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1155                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1156                         ath_dbg(common, ATH_DBG_PS,
1157                                 "Sending PS-Poll to pick a buffered frame\n");
1158                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1159                 } else {
1160                         ath_dbg(common, ATH_DBG_PS,
1161                                 "Wake up to complete TX\n");
1162                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1163                 }
1164                 /*
1165                  * The actual restore operation will happen only after
1166                  * the sc_flags bit is cleared. We are just dropping
1167                  * the ps_usecount here.
1168                  */
1169                 ath9k_ps_restore(sc);
1170         }
1171
1172         memset(&txctl, 0, sizeof(struct ath_tx_control));
1173         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1174
1175         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1176
1177         if (ath_tx_start(hw, skb, &txctl) != 0) {
1178                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1179                 goto exit;
1180         }
1181
1182         return 0;
1183 exit:
1184         dev_kfree_skb_any(skb);
1185         return 0;
1186 }
1187
1188 static void ath9k_stop(struct ieee80211_hw *hw)
1189 {
1190         struct ath_softc *sc = hw->priv;
1191         struct ath_hw *ah = sc->sc_ah;
1192         struct ath_common *common = ath9k_hw_common(ah);
1193
1194         mutex_lock(&sc->mutex);
1195
1196         if (led_blink)
1197                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1198
1199         cancel_delayed_work_sync(&sc->tx_complete_work);
1200         cancel_delayed_work_sync(&sc->hw_pll_work);
1201         cancel_work_sync(&sc->paprd_work);
1202         cancel_work_sync(&sc->hw_check_work);
1203
1204         if (sc->sc_flags & SC_OP_INVALID) {
1205                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1206                 mutex_unlock(&sc->mutex);
1207                 return;
1208         }
1209
1210         /* Ensure HW is awake when we try to shut it down. */
1211         ath9k_ps_wakeup(sc);
1212
1213         if (ah->btcoex_hw.enabled) {
1214                 ath9k_hw_btcoex_disable(ah);
1215                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1216                         ath9k_btcoex_timer_pause(sc);
1217         }
1218
1219         spin_lock_bh(&sc->sc_pcu_lock);
1220
1221         /* prevent tasklets to enable interrupts once we disable them */
1222         ah->imask &= ~ATH9K_INT_GLOBAL;
1223
1224         /* make sure h/w will not generate any interrupt
1225          * before setting the invalid flag. */
1226         ath9k_hw_disable_interrupts(ah);
1227
1228         if (!(sc->sc_flags & SC_OP_INVALID)) {
1229                 ath_drain_all_txq(sc, false);
1230                 ath_stoprecv(sc);
1231                 ath9k_hw_phy_disable(ah);
1232         } else
1233                 sc->rx.rxlink = NULL;
1234
1235         if (sc->rx.frag) {
1236                 dev_kfree_skb_any(sc->rx.frag);
1237                 sc->rx.frag = NULL;
1238         }
1239
1240         /* disable HAL and put h/w to sleep */
1241         ath9k_hw_disable(ah);
1242         ath9k_hw_configpcipowersave(ah, 1, 1);
1243
1244         spin_unlock_bh(&sc->sc_pcu_lock);
1245
1246         /* we can now sync irq and kill any running tasklets, since we already
1247          * disabled interrupts and not holding a spin lock */
1248         synchronize_irq(sc->irq);
1249         tasklet_kill(&sc->intr_tq);
1250         tasklet_kill(&sc->bcon_tasklet);
1251
1252         ath9k_ps_restore(sc);
1253
1254         sc->ps_idle = true;
1255         ath_radio_disable(sc, hw);
1256
1257         sc->sc_flags |= SC_OP_INVALID;
1258
1259         pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1260
1261         mutex_unlock(&sc->mutex);
1262
1263         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1264 }
1265
1266 bool ath9k_uses_beacons(int type)
1267 {
1268         switch (type) {
1269         case NL80211_IFTYPE_AP:
1270         case NL80211_IFTYPE_ADHOC:
1271         case NL80211_IFTYPE_MESH_POINT:
1272                 return true;
1273         default:
1274                 return false;
1275         }
1276 }
1277
1278 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1279                                  struct ieee80211_vif *vif)
1280 {
1281         struct ath_vif *avp = (void *)vif->drv_priv;
1282
1283         /* Disable SWBA interrupt */
1284         sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1285         ath9k_ps_wakeup(sc);
1286         ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1287         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1288         tasklet_kill(&sc->bcon_tasklet);
1289         ath9k_ps_restore(sc);
1290
1291         ath_beacon_return(sc, avp);
1292         sc->sc_flags &= ~SC_OP_BEACONS;
1293
1294         if (sc->nbcnvifs > 0) {
1295                 /* Re-enable beaconing */
1296                 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1297                 ath9k_ps_wakeup(sc);
1298                 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1299                 ath9k_ps_restore(sc);
1300         }
1301 }
1302
1303 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1304 {
1305         struct ath9k_vif_iter_data *iter_data = data;
1306         int i;
1307
1308         if (iter_data->hw_macaddr)
1309                 for (i = 0; i < ETH_ALEN; i++)
1310                         iter_data->mask[i] &=
1311                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1312
1313         switch (vif->type) {
1314         case NL80211_IFTYPE_AP:
1315                 iter_data->naps++;
1316                 break;
1317         case NL80211_IFTYPE_STATION:
1318                 iter_data->nstations++;
1319                 break;
1320         case NL80211_IFTYPE_ADHOC:
1321                 iter_data->nadhocs++;
1322                 break;
1323         case NL80211_IFTYPE_MESH_POINT:
1324                 iter_data->nmeshes++;
1325                 break;
1326         case NL80211_IFTYPE_WDS:
1327                 iter_data->nwds++;
1328                 break;
1329         default:
1330                 iter_data->nothers++;
1331                 break;
1332         }
1333 }
1334
1335 /* Called with sc->mutex held. */
1336 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1337                                struct ieee80211_vif *vif,
1338                                struct ath9k_vif_iter_data *iter_data)
1339 {
1340         struct ath_softc *sc = hw->priv;
1341         struct ath_hw *ah = sc->sc_ah;
1342         struct ath_common *common = ath9k_hw_common(ah);
1343
1344         /*
1345          * Use the hardware MAC address as reference, the hardware uses it
1346          * together with the BSSID mask when matching addresses.
1347          */
1348         memset(iter_data, 0, sizeof(*iter_data));
1349         iter_data->hw_macaddr = common->macaddr;
1350         memset(&iter_data->mask, 0xff, ETH_ALEN);
1351
1352         if (vif)
1353                 ath9k_vif_iter(iter_data, vif->addr, vif);
1354
1355         /* Get list of all active MAC addresses */
1356         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1357                                                    iter_data);
1358 }
1359
1360 /* Called with sc->mutex held. */
1361 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1362                                           struct ieee80211_vif *vif)
1363 {
1364         struct ath_softc *sc = hw->priv;
1365         struct ath_hw *ah = sc->sc_ah;
1366         struct ath_common *common = ath9k_hw_common(ah);
1367         struct ath9k_vif_iter_data iter_data;
1368
1369         ath9k_calculate_iter_data(hw, vif, &iter_data);
1370
1371         /* Set BSSID mask. */
1372         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1373         ath_hw_setbssidmask(common);
1374
1375         /* Set op-mode & TSF */
1376         if (iter_data.naps > 0) {
1377                 ath9k_hw_set_tsfadjust(ah, 1);
1378                 sc->sc_flags |= SC_OP_TSF_RESET;
1379                 ah->opmode = NL80211_IFTYPE_AP;
1380         } else {
1381                 ath9k_hw_set_tsfadjust(ah, 0);
1382                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1383
1384                 if (iter_data.nwds + iter_data.nmeshes)
1385                         ah->opmode = NL80211_IFTYPE_AP;
1386                 else if (iter_data.nadhocs)
1387                         ah->opmode = NL80211_IFTYPE_ADHOC;
1388                 else
1389                         ah->opmode = NL80211_IFTYPE_STATION;
1390         }
1391
1392         /*
1393          * Enable MIB interrupts when there are hardware phy counters.
1394          */
1395         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1396                 if (ah->config.enable_ani)
1397                         ah->imask |= ATH9K_INT_MIB;
1398                 ah->imask |= ATH9K_INT_TSFOOR;
1399         } else {
1400                 ah->imask &= ~ATH9K_INT_MIB;
1401                 ah->imask &= ~ATH9K_INT_TSFOOR;
1402         }
1403
1404         ath9k_hw_set_interrupts(ah, ah->imask);
1405
1406         /* Set up ANI */
1407         if ((iter_data.naps + iter_data.nadhocs) > 0) {
1408                 sc->sc_flags |= SC_OP_ANI_RUN;
1409                 ath_start_ani(common);
1410         } else {
1411                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1412                 del_timer_sync(&common->ani.timer);
1413         }
1414 }
1415
1416 /* Called with sc->mutex held, vif counts set up properly. */
1417 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1418                                    struct ieee80211_vif *vif)
1419 {
1420         struct ath_softc *sc = hw->priv;
1421
1422         ath9k_calculate_summary_state(hw, vif);
1423
1424         if (ath9k_uses_beacons(vif->type)) {
1425                 int error;
1426                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1427                 /* This may fail because upper levels do not have beacons
1428                  * properly configured yet.  That's OK, we assume it
1429                  * will be properly configured and then we will be notified
1430                  * in the info_changed method and set up beacons properly
1431                  * there.
1432                  */
1433                 error = ath_beacon_alloc(sc, vif);
1434                 if (error)
1435                         ath9k_reclaim_beacon(sc, vif);
1436                 else
1437                         ath_beacon_config(sc, vif);
1438         }
1439 }
1440
1441
1442 static int ath9k_add_interface(struct ieee80211_hw *hw,
1443                                struct ieee80211_vif *vif)
1444 {
1445         struct ath_softc *sc = hw->priv;
1446         struct ath_hw *ah = sc->sc_ah;
1447         struct ath_common *common = ath9k_hw_common(ah);
1448         struct ath_vif *avp = (void *)vif->drv_priv;
1449         int ret = 0;
1450
1451         mutex_lock(&sc->mutex);
1452
1453         switch (vif->type) {
1454         case NL80211_IFTYPE_STATION:
1455         case NL80211_IFTYPE_WDS:
1456         case NL80211_IFTYPE_ADHOC:
1457         case NL80211_IFTYPE_AP:
1458         case NL80211_IFTYPE_MESH_POINT:
1459                 break;
1460         default:
1461                 ath_err(common, "Interface type %d not yet supported\n",
1462                         vif->type);
1463                 ret = -EOPNOTSUPP;
1464                 goto out;
1465         }
1466
1467         if (ath9k_uses_beacons(vif->type)) {
1468                 if (sc->nbcnvifs >= ATH_BCBUF) {
1469                         ath_err(common, "Not enough beacon buffers when adding"
1470                                 " new interface of type: %i\n",
1471                                 vif->type);
1472                         ret = -ENOBUFS;
1473                         goto out;
1474                 }
1475         }
1476
1477         if ((vif->type == NL80211_IFTYPE_ADHOC) &&
1478             sc->nvifs > 0) {
1479                 ath_err(common, "Cannot create ADHOC interface when other"
1480                         " interfaces already exist.\n");
1481                 ret = -EINVAL;
1482                 goto out;
1483         }
1484
1485         ath_dbg(common, ATH_DBG_CONFIG,
1486                 "Attach a VIF of type: %d\n", vif->type);
1487
1488         /* Set the VIF opmode */
1489         avp->av_opmode = vif->type;
1490         avp->av_bslot = -1;
1491
1492         sc->nvifs++;
1493
1494         ath9k_do_vif_add_setup(hw, vif);
1495 out:
1496         mutex_unlock(&sc->mutex);
1497         return ret;
1498 }
1499
1500 static int ath9k_change_interface(struct ieee80211_hw *hw,
1501                                   struct ieee80211_vif *vif,
1502                                   enum nl80211_iftype new_type,
1503                                   bool p2p)
1504 {
1505         struct ath_softc *sc = hw->priv;
1506         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1507         int ret = 0;
1508
1509         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1510         mutex_lock(&sc->mutex);
1511
1512         /* See if new interface type is valid. */
1513         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1514             (sc->nvifs > 1)) {
1515                 ath_err(common, "When using ADHOC, it must be the only"
1516                         " interface.\n");
1517                 ret = -EINVAL;
1518                 goto out;
1519         }
1520
1521         if (ath9k_uses_beacons(new_type) &&
1522             !ath9k_uses_beacons(vif->type)) {
1523                 if (sc->nbcnvifs >= ATH_BCBUF) {
1524                         ath_err(common, "No beacon slot available\n");
1525                         ret = -ENOBUFS;
1526                         goto out;
1527                 }
1528         }
1529
1530         /* Clean up old vif stuff */
1531         if (ath9k_uses_beacons(vif->type))
1532                 ath9k_reclaim_beacon(sc, vif);
1533
1534         /* Add new settings */
1535         vif->type = new_type;
1536         vif->p2p = p2p;
1537
1538         ath9k_do_vif_add_setup(hw, vif);
1539 out:
1540         mutex_unlock(&sc->mutex);
1541         return ret;
1542 }
1543
1544 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1545                                    struct ieee80211_vif *vif)
1546 {
1547         struct ath_softc *sc = hw->priv;
1548         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1549
1550         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1551
1552         mutex_lock(&sc->mutex);
1553
1554         sc->nvifs--;
1555
1556         /* Reclaim beacon resources */
1557         if (ath9k_uses_beacons(vif->type))
1558                 ath9k_reclaim_beacon(sc, vif);
1559
1560         ath9k_calculate_summary_state(hw, NULL);
1561
1562         mutex_unlock(&sc->mutex);
1563 }
1564
1565 static void ath9k_enable_ps(struct ath_softc *sc)
1566 {
1567         struct ath_hw *ah = sc->sc_ah;
1568
1569         sc->ps_enabled = true;
1570         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1571                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1572                         ah->imask |= ATH9K_INT_TIM_TIMER;
1573                         ath9k_hw_set_interrupts(ah, ah->imask);
1574                 }
1575                 ath9k_hw_setrxabort(ah, 1);
1576         }
1577 }
1578
1579 static void ath9k_disable_ps(struct ath_softc *sc)
1580 {
1581         struct ath_hw *ah = sc->sc_ah;
1582
1583         sc->ps_enabled = false;
1584         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1585         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1586                 ath9k_hw_setrxabort(ah, 0);
1587                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1588                                   PS_WAIT_FOR_CAB |
1589                                   PS_WAIT_FOR_PSPOLL_DATA |
1590                                   PS_WAIT_FOR_TX_ACK);
1591                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1592                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1593                         ath9k_hw_set_interrupts(ah, ah->imask);
1594                 }
1595         }
1596
1597 }
1598
1599 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1600 {
1601         struct ath_softc *sc = hw->priv;
1602         struct ath_hw *ah = sc->sc_ah;
1603         struct ath_common *common = ath9k_hw_common(ah);
1604         struct ieee80211_conf *conf = &hw->conf;
1605         bool disable_radio = false;
1606
1607         mutex_lock(&sc->mutex);
1608
1609         /*
1610          * Leave this as the first check because we need to turn on the
1611          * radio if it was disabled before prior to processing the rest
1612          * of the changes. Likewise we must only disable the radio towards
1613          * the end.
1614          */
1615         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1616                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1617                 if (!sc->ps_idle) {
1618                         ath_radio_enable(sc, hw);
1619                         ath_dbg(common, ATH_DBG_CONFIG,
1620                                 "not-idle: enabling radio\n");
1621                 } else {
1622                         disable_radio = true;
1623                 }
1624         }
1625
1626         /*
1627          * We just prepare to enable PS. We have to wait until our AP has
1628          * ACK'd our null data frame to disable RX otherwise we'll ignore
1629          * those ACKs and end up retransmitting the same null data frames.
1630          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1631          */
1632         if (changed & IEEE80211_CONF_CHANGE_PS) {
1633                 unsigned long flags;
1634                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1635                 if (conf->flags & IEEE80211_CONF_PS)
1636                         ath9k_enable_ps(sc);
1637                 else
1638                         ath9k_disable_ps(sc);
1639                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1640         }
1641
1642         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1643                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1644                         ath_dbg(common, ATH_DBG_CONFIG,
1645                                 "Monitor mode is enabled\n");
1646                         sc->sc_ah->is_monitoring = true;
1647                 } else {
1648                         ath_dbg(common, ATH_DBG_CONFIG,
1649                                 "Monitor mode is disabled\n");
1650                         sc->sc_ah->is_monitoring = false;
1651                 }
1652         }
1653
1654         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1655                 struct ieee80211_channel *curchan = hw->conf.channel;
1656                 int pos = curchan->hw_value;
1657                 int old_pos = -1;
1658                 unsigned long flags;
1659
1660                 if (ah->curchan)
1661                         old_pos = ah->curchan - &ah->channels[0];
1662
1663                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1664                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1665                 else
1666                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1667
1668                 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1669                         curchan->center_freq);
1670
1671                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1672                                           curchan, conf->channel_type);
1673
1674                 /* update survey stats for the old channel before switching */
1675                 spin_lock_irqsave(&common->cc_lock, flags);
1676                 ath_update_survey_stats(sc);
1677                 spin_unlock_irqrestore(&common->cc_lock, flags);
1678
1679                 /*
1680                  * If the operating channel changes, change the survey in-use flags
1681                  * along with it.
1682                  * Reset the survey data for the new channel, unless we're switching
1683                  * back to the operating channel from an off-channel operation.
1684                  */
1685                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1686                     sc->cur_survey != &sc->survey[pos]) {
1687
1688                         if (sc->cur_survey)
1689                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1690
1691                         sc->cur_survey = &sc->survey[pos];
1692
1693                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1694                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1695                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1696                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1697                 }
1698
1699                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1700                         ath_err(common, "Unable to set channel\n");
1701                         mutex_unlock(&sc->mutex);
1702                         return -EINVAL;
1703                 }
1704
1705                 /*
1706                  * The most recent snapshot of channel->noisefloor for the old
1707                  * channel is only available after the hardware reset. Copy it to
1708                  * the survey stats now.
1709                  */
1710                 if (old_pos >= 0)
1711                         ath_update_survey_nf(sc, old_pos);
1712         }
1713
1714         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1715                 sc->config.txpowlimit = 2 * conf->power_level;
1716                 ath9k_ps_wakeup(sc);
1717                 ath_update_txpow(sc);
1718                 ath9k_ps_restore(sc);
1719         }
1720
1721         if (disable_radio) {
1722                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1723                 ath_radio_disable(sc, hw);
1724         }
1725
1726         mutex_unlock(&sc->mutex);
1727
1728         return 0;
1729 }
1730
1731 #define SUPPORTED_FILTERS                       \
1732         (FIF_PROMISC_IN_BSS |                   \
1733         FIF_ALLMULTI |                          \
1734         FIF_CONTROL |                           \
1735         FIF_PSPOLL |                            \
1736         FIF_OTHER_BSS |                         \
1737         FIF_BCN_PRBRESP_PROMISC |               \
1738         FIF_PROBE_REQ |                         \
1739         FIF_FCSFAIL)
1740
1741 /* FIXME: sc->sc_full_reset ? */
1742 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1743                                    unsigned int changed_flags,
1744                                    unsigned int *total_flags,
1745                                    u64 multicast)
1746 {
1747         struct ath_softc *sc = hw->priv;
1748         u32 rfilt;
1749
1750         changed_flags &= SUPPORTED_FILTERS;
1751         *total_flags &= SUPPORTED_FILTERS;
1752
1753         sc->rx.rxfilter = *total_flags;
1754         ath9k_ps_wakeup(sc);
1755         rfilt = ath_calcrxfilter(sc);
1756         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1757         ath9k_ps_restore(sc);
1758
1759         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1760                 "Set HW RX filter: 0x%x\n", rfilt);
1761 }
1762
1763 static int ath9k_sta_add(struct ieee80211_hw *hw,
1764                          struct ieee80211_vif *vif,
1765                          struct ieee80211_sta *sta)
1766 {
1767         struct ath_softc *sc = hw->priv;
1768
1769         ath_node_attach(sc, sta);
1770
1771         return 0;
1772 }
1773
1774 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1775                             struct ieee80211_vif *vif,
1776                             struct ieee80211_sta *sta)
1777 {
1778         struct ath_softc *sc = hw->priv;
1779
1780         ath_node_detach(sc, sta);
1781
1782         return 0;
1783 }
1784
1785 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1786                          const struct ieee80211_tx_queue_params *params)
1787 {
1788         struct ath_softc *sc = hw->priv;
1789         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1790         struct ath_txq *txq;
1791         struct ath9k_tx_queue_info qi;
1792         int ret = 0;
1793
1794         if (queue >= WME_NUM_AC)
1795                 return 0;
1796
1797         txq = sc->tx.txq_map[queue];
1798
1799         mutex_lock(&sc->mutex);
1800
1801         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1802
1803         qi.tqi_aifs = params->aifs;
1804         qi.tqi_cwmin = params->cw_min;
1805         qi.tqi_cwmax = params->cw_max;
1806         qi.tqi_burstTime = params->txop;
1807
1808         ath_dbg(common, ATH_DBG_CONFIG,
1809                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1810                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1811                 params->cw_max, params->txop);
1812
1813         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1814         if (ret)
1815                 ath_err(common, "TXQ Update failed\n");
1816
1817         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1818                 if (queue == WME_AC_BE && !ret)
1819                         ath_beaconq_config(sc);
1820
1821         mutex_unlock(&sc->mutex);
1822
1823         return ret;
1824 }
1825
1826 static int ath9k_set_key(struct ieee80211_hw *hw,
1827                          enum set_key_cmd cmd,
1828                          struct ieee80211_vif *vif,
1829                          struct ieee80211_sta *sta,
1830                          struct ieee80211_key_conf *key)
1831 {
1832         struct ath_softc *sc = hw->priv;
1833         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1834         int ret = 0;
1835
1836         if (ath9k_modparam_nohwcrypt)
1837                 return -ENOSPC;
1838
1839         mutex_lock(&sc->mutex);
1840         ath9k_ps_wakeup(sc);
1841         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1842
1843         switch (cmd) {
1844         case SET_KEY:
1845                 ret = ath_key_config(common, vif, sta, key);
1846                 if (ret >= 0) {
1847                         key->hw_key_idx = ret;
1848                         /* push IV and Michael MIC generation to stack */
1849                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1850                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1851                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1852                         if (sc->sc_ah->sw_mgmt_crypto &&
1853                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1854                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1855                         ret = 0;
1856                 }
1857                 break;
1858         case DISABLE_KEY:
1859                 ath_key_delete(common, key);
1860                 break;
1861         default:
1862                 ret = -EINVAL;
1863         }
1864
1865         ath9k_ps_restore(sc);
1866         mutex_unlock(&sc->mutex);
1867
1868         return ret;
1869 }
1870
1871 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1872                                    struct ieee80211_vif *vif,
1873                                    struct ieee80211_bss_conf *bss_conf,
1874                                    u32 changed)
1875 {
1876         struct ath_softc *sc = hw->priv;
1877         struct ath_hw *ah = sc->sc_ah;
1878         struct ath_common *common = ath9k_hw_common(ah);
1879         struct ath_vif *avp = (void *)vif->drv_priv;
1880         int slottime;
1881         int error;
1882
1883         mutex_lock(&sc->mutex);
1884
1885         if (changed & BSS_CHANGED_BSSID) {
1886                 /* Set BSSID */
1887                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1888                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1889                 common->curaid = 0;
1890                 ath9k_hw_write_associd(ah);
1891
1892                 /* Set aggregation protection mode parameters */
1893                 sc->config.ath_aggr_prot = 0;
1894
1895                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1896                         common->curbssid, common->curaid);
1897
1898                 /* need to reconfigure the beacon */
1899                 sc->sc_flags &= ~SC_OP_BEACONS ;
1900         }
1901
1902         /* Enable transmission of beacons (AP, IBSS, MESH) */
1903         if ((changed & BSS_CHANGED_BEACON) ||
1904             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1905                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1906                 error = ath_beacon_alloc(sc, vif);
1907                 if (!error)
1908                         ath_beacon_config(sc, vif);
1909         }
1910
1911         if (changed & BSS_CHANGED_ERP_SLOT) {
1912                 if (bss_conf->use_short_slot)
1913                         slottime = 9;
1914                 else
1915                         slottime = 20;
1916                 if (vif->type == NL80211_IFTYPE_AP) {
1917                         /*
1918                          * Defer update, so that connected stations can adjust
1919                          * their settings at the same time.
1920                          * See beacon.c for more details
1921                          */
1922                         sc->beacon.slottime = slottime;
1923                         sc->beacon.updateslot = UPDATE;
1924                 } else {
1925                         ah->slottime = slottime;
1926                         ath9k_hw_init_global_settings(ah);
1927                 }
1928         }
1929
1930         /* Disable transmission of beacons */
1931         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1932                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1933
1934         if (changed & BSS_CHANGED_BEACON_INT) {
1935                 sc->beacon_interval = bss_conf->beacon_int;
1936                 /*
1937                  * In case of AP mode, the HW TSF has to be reset
1938                  * when the beacon interval changes.
1939                  */
1940                 if (vif->type == NL80211_IFTYPE_AP) {
1941                         sc->sc_flags |= SC_OP_TSF_RESET;
1942                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1943                         error = ath_beacon_alloc(sc, vif);
1944                         if (!error)
1945                                 ath_beacon_config(sc, vif);
1946                 } else {
1947                         ath_beacon_config(sc, vif);
1948                 }
1949         }
1950
1951         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1952                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1953                         bss_conf->use_short_preamble);
1954                 if (bss_conf->use_short_preamble)
1955                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1956                 else
1957                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1958         }
1959
1960         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1961                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1962                         bss_conf->use_cts_prot);
1963                 if (bss_conf->use_cts_prot &&
1964                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1965                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1966                 else
1967                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1968         }
1969
1970         if (changed & BSS_CHANGED_ASSOC) {
1971                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1972                         bss_conf->assoc);
1973                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1974         }
1975
1976         mutex_unlock(&sc->mutex);
1977 }
1978
1979 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1980 {
1981         struct ath_softc *sc = hw->priv;
1982         u64 tsf;
1983
1984         mutex_lock(&sc->mutex);
1985         ath9k_ps_wakeup(sc);
1986         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1987         ath9k_ps_restore(sc);
1988         mutex_unlock(&sc->mutex);
1989
1990         return tsf;
1991 }
1992
1993 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1994 {
1995         struct ath_softc *sc = hw->priv;
1996
1997         mutex_lock(&sc->mutex);
1998         ath9k_ps_wakeup(sc);
1999         ath9k_hw_settsf64(sc->sc_ah, tsf);
2000         ath9k_ps_restore(sc);
2001         mutex_unlock(&sc->mutex);
2002 }
2003
2004 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2005 {
2006         struct ath_softc *sc = hw->priv;
2007
2008         mutex_lock(&sc->mutex);
2009
2010         ath9k_ps_wakeup(sc);
2011         ath9k_hw_reset_tsf(sc->sc_ah);
2012         ath9k_ps_restore(sc);
2013
2014         mutex_unlock(&sc->mutex);
2015 }
2016
2017 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2018                               struct ieee80211_vif *vif,
2019                               enum ieee80211_ampdu_mlme_action action,
2020                               struct ieee80211_sta *sta,
2021                               u16 tid, u16 *ssn, u8 buf_size)
2022 {
2023         struct ath_softc *sc = hw->priv;
2024         int ret = 0;
2025
2026         local_bh_disable();
2027
2028         switch (action) {
2029         case IEEE80211_AMPDU_RX_START:
2030                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2031                         ret = -ENOTSUPP;
2032                 break;
2033         case IEEE80211_AMPDU_RX_STOP:
2034                 break;
2035         case IEEE80211_AMPDU_TX_START:
2036                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2037                         return -EOPNOTSUPP;
2038
2039                 ath9k_ps_wakeup(sc);
2040                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2041                 if (!ret)
2042                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2043                 ath9k_ps_restore(sc);
2044                 break;
2045         case IEEE80211_AMPDU_TX_STOP:
2046                 ath9k_ps_wakeup(sc);
2047                 ath_tx_aggr_stop(sc, sta, tid);
2048                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2049                 ath9k_ps_restore(sc);
2050                 break;
2051         case IEEE80211_AMPDU_TX_OPERATIONAL:
2052                 ath9k_ps_wakeup(sc);
2053                 ath_tx_aggr_resume(sc, sta, tid);
2054                 ath9k_ps_restore(sc);
2055                 break;
2056         default:
2057                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2058         }
2059
2060         local_bh_enable();
2061
2062         return ret;
2063 }
2064
2065 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2066                              struct survey_info *survey)
2067 {
2068         struct ath_softc *sc = hw->priv;
2069         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2070         struct ieee80211_supported_band *sband;
2071         struct ieee80211_channel *chan;
2072         unsigned long flags;
2073         int pos;
2074
2075         spin_lock_irqsave(&common->cc_lock, flags);
2076         if (idx == 0)
2077                 ath_update_survey_stats(sc);
2078
2079         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2080         if (sband && idx >= sband->n_channels) {
2081                 idx -= sband->n_channels;
2082                 sband = NULL;
2083         }
2084
2085         if (!sband)
2086                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2087
2088         if (!sband || idx >= sband->n_channels) {
2089                 spin_unlock_irqrestore(&common->cc_lock, flags);
2090                 return -ENOENT;
2091         }
2092
2093         chan = &sband->channels[idx];
2094         pos = chan->hw_value;
2095         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2096         survey->channel = chan;
2097         spin_unlock_irqrestore(&common->cc_lock, flags);
2098
2099         return 0;
2100 }
2101
2102 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2103 {
2104         struct ath_softc *sc = hw->priv;
2105         struct ath_hw *ah = sc->sc_ah;
2106
2107         mutex_lock(&sc->mutex);
2108         ah->coverage_class = coverage_class;
2109         ath9k_hw_init_global_settings(ah);
2110         mutex_unlock(&sc->mutex);
2111 }
2112
2113 struct ieee80211_ops ath9k_ops = {
2114         .tx                 = ath9k_tx,
2115         .start              = ath9k_start,
2116         .stop               = ath9k_stop,
2117         .add_interface      = ath9k_add_interface,
2118         .change_interface   = ath9k_change_interface,
2119         .remove_interface   = ath9k_remove_interface,
2120         .config             = ath9k_config,
2121         .configure_filter   = ath9k_configure_filter,
2122         .sta_add            = ath9k_sta_add,
2123         .sta_remove         = ath9k_sta_remove,
2124         .conf_tx            = ath9k_conf_tx,
2125         .bss_info_changed   = ath9k_bss_info_changed,
2126         .set_key            = ath9k_set_key,
2127         .get_tsf            = ath9k_get_tsf,
2128         .set_tsf            = ath9k_set_tsf,
2129         .reset_tsf          = ath9k_reset_tsf,
2130         .ampdu_action       = ath9k_ampdu_action,
2131         .get_survey         = ath9k_get_survey,
2132         .rfkill_poll        = ath9k_rfkill_poll_state,
2133         .set_coverage_class = ath9k_set_coverage_class,
2134 };