drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 static u8 parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  58 {
  59         bool pending = false;
  60
  61         spin_lock_bh(&txq->axq_lock);
  62
  63         if (txq->axq_depth || !list_empty(&txq->axq_acq))
  64                 pending = true;
  65         else if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  66                 pending = !list_empty(&txq->txq_fifo_pending);
  67
  68         spin_unlock_bh(&txq->axq_lock);
  69         return pending;
  70 }
  71
  72 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  73 {
  74         unsigned long flags;
  75         bool ret;
  76
  77         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  79         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  80
  81         return ret;
  82 }
  83
  84 void ath9k_ps_wakeup(struct ath_softc *sc)
  85 {
  86         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  87         unsigned long flags;
  88         enum ath9k_power_mode power_mode;
  89
  90         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  91         if (++sc->ps_usecount != 1)
  92                 goto unlock;
  93
  94         power_mode = sc->sc_ah->power_mode;
  95         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  96
  97         /*
  98          * While the hardware is asleep, the cycle counters contain no
  99          * useful data. Better clear them now so that they don't mess up
 100          * survey data results.
 101          */
 102         if (power_mode != ATH9K_PM_AWAKE) {
 103                 spin_lock(&common->cc_lock);
 104                 ath_hw_cycle_counters_update(common);
 105                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 106                 spin_unlock(&common->cc_lock);
 107         }
 108
 109  unlock:
 110         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 111 }
 112
 113 void ath9k_ps_restore(struct ath_softc *sc)
 114 {
 115         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 116         unsigned long flags;
 117
 118         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 119         if (--sc->ps_usecount != 0)
 120                 goto unlock;
 121
 122         spin_lock(&common->cc_lock);
 123         ath_hw_cycle_counters_update(common);
 124         spin_unlock(&common->cc_lock);
 125
 126         if (sc->ps_idle)
 127                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 128         else if (sc->ps_enabled &&
 129                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 130                               PS_WAIT_FOR_CAB |
 131                               PS_WAIT_FOR_PSPOLL_DATA |
 132                               PS_WAIT_FOR_TX_ACK)))
 133                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 134
 135  unlock:
 136         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 137 }
 138
 139 static void ath_start_ani(struct ath_common *common)
 140 {
 141         struct ath_hw *ah = common->ah;
 142         unsigned long timestamp = jiffies_to_msecs(jiffies);
 143         struct ath_softc *sc = (struct ath_softc *) common->priv;
 144
 145         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 146                 return;
 147
 148         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 149                 return;
 150
 151         common->ani.longcal_timer = timestamp;
 152         common->ani.shortcal_timer = timestamp;
 153         common->ani.checkani_timer = timestamp;
 154
 155         mod_timer(&common->ani.timer,
 156                   jiffies +
 157                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 158 }
 159
 160 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 161 {
 162         struct ath_hw *ah = sc->sc_ah;
 163         struct ath9k_channel *chan = &ah->channels[channel];
 164         struct survey_info *survey = &sc->survey[channel];
 165
 166         if (chan->noisefloor) {
 167                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 168                 survey->noise = chan->noisefloor;
 169         }
 170 }
 171
 172 /*
 173  * Updates the survey statistics and returns the busy time since last
 174  * update in %, if the measurement duration was long enough for the
 175  * result to be useful, -1 otherwise.
 176  */
 177 static int ath_update_survey_stats(struct ath_softc *sc)
 178 {
 179         struct ath_hw *ah = sc->sc_ah;
 180         struct ath_common *common = ath9k_hw_common(ah);
 181         int pos = ah->curchan - &ah->channels[0];
 182         struct survey_info *survey = &sc->survey[pos];
 183         struct ath_cycle_counters *cc = &common->cc_survey;
 184         unsigned int div = common->clockrate * 1000;
 185         int ret = 0;
 186
 187         if (!ah->curchan)
 188                 return -1;
 189
 190         if (ah->power_mode == ATH9K_PM_AWAKE)
 191                 ath_hw_cycle_counters_update(common);
 192
 193         if (cc->cycles > 0) {
 194                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 195                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 196                         SURVEY_INFO_CHANNEL_TIME_RX |
 197                         SURVEY_INFO_CHANNEL_TIME_TX;
 198                 survey->channel_time += cc->cycles / div;
 199                 survey->channel_time_busy += cc->rx_busy / div;
 200                 survey->channel_time_rx += cc->rx_frame / div;
 201                 survey->channel_time_tx += cc->tx_frame / div;
 202         }
 203
 204         if (cc->cycles < div)
 205                 return -1;
 206
 207         if (cc->cycles > 0)
 208                 ret = cc->rx_busy * 100 / cc->cycles;
 209
 210         memset(cc, 0, sizeof(*cc));
 211
 212         ath_update_survey_nf(sc, pos);
 213
 214         return ret;
 215 }
 216
 217 /*
 218  * Set/change channels.  If the channel is really being changed, it's done
 219  * by reseting the chip.  To accomplish this we must first cleanup any pending
 220  * DMA, then restart stuff.
 221 */
 222 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 223                     struct ath9k_channel *hchan)
 224 {
 225         struct ath_hw *ah = sc->sc_ah;
 226         struct ath_common *common = ath9k_hw_common(ah);
 227         struct ieee80211_conf *conf = &common->hw->conf;
 228         bool fastcc = true, stopped;
 229         struct ieee80211_channel *channel = hw->conf.channel;
 230         struct ath9k_hw_cal_data *caldata = NULL;
 231         int r;
 232
 233         if (sc->sc_flags & SC_OP_INVALID)
 234                 return -EIO;
 235
 236         sc->hw_busy_count = 0;
 237
 238         del_timer_sync(&common->ani.timer);
 239         cancel_work_sync(&sc->paprd_work);
 240         cancel_work_sync(&sc->hw_check_work);
 241         cancel_delayed_work_sync(&sc->tx_complete_work);
 242         cancel_delayed_work_sync(&sc->hw_pll_work);
 243
 244         ath9k_ps_wakeup(sc);
 245
 246         spin_lock_bh(&sc->sc_pcu_lock);
 247
 248         /*
 249          * This is only performed if the channel settings have
 250          * actually changed.
 251          *
 252          * To switch channels clear any pending DMA operations;
 253          * wait long enough for the RX fifo to drain, reset the
 254          * hardware at the new frequency, and then re-enable
 255          * the relevant bits of the h/w.
 256          */
 257         ath9k_hw_disable_interrupts(ah);
 258         stopped = ath_drain_all_txq(sc, false);
 259
 260         if (!ath_stoprecv(sc))
 261                 stopped = false;
 262
 263         if (!ath9k_hw_check_alive(ah))
 264                 stopped = false;
 265
 266         /* XXX: do not flush receive queue here. We don't want
 267          * to flush data frames already in queue because of
 268          * changing channel. */
 269
 270         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 271                 fastcc = false;
 272
 273         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 274                 caldata = &sc->caldata;
 275
 276         ath_dbg(common, ATH_DBG_CONFIG,
 277                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 278                 sc->sc_ah->curchan->channel,
 279                 channel->center_freq, conf_is_ht40(conf),
 280                 fastcc);
 281
 282         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 283         if (r) {
 284                 ath_err(common,
 285                         "Unable to reset channel (%u MHz), reset status %d\n",
 286                         channel->center_freq, r);
 287                 goto ps_restore;
 288         }
 289
 290         if (ath_startrecv(sc) != 0) {
 291                 ath_err(common, "Unable to restart recv logic\n");
 292                 r = -EIO;
 293                 goto ps_restore;
 294         }
 295
 296         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 297                                sc->config.txpowlimit, &sc->curtxpow);
 298         ath9k_hw_set_interrupts(ah, ah->imask);
 299
 300         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 301                 if (sc->sc_flags & SC_OP_BEACONS)
 302                         ath_beacon_config(sc, NULL);
 303                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 304                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
 305                 ath_start_ani(common);
 306         }
 307
 308  ps_restore:
 309         ieee80211_wake_queues(hw);
 310
 311         spin_unlock_bh(&sc->sc_pcu_lock);
 312
 313         ath9k_ps_restore(sc);
 314         return r;
 315 }
 316
 317 static void ath_paprd_activate(struct ath_softc *sc)
 318 {
 319         struct ath_hw *ah = sc->sc_ah;
 320         struct ath9k_hw_cal_data *caldata = ah->caldata;
 321         struct ath_common *common = ath9k_hw_common(ah);
 322         int chain;
 323
 324         if (!caldata || !caldata->paprd_done)
 325                 return;
 326
 327         ath9k_ps_wakeup(sc);
 328         ar9003_paprd_enable(ah, false);
 329         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 330                 if (!(common->tx_chainmask & BIT(chain)))
 331                         continue;
 332
 333                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 334         }
 335
 336         ar9003_paprd_enable(ah, true);
 337         ath9k_ps_restore(sc);
 338 }
 339
 340 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 341 {
 342         struct ieee80211_hw *hw = sc->hw;
 343         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 344         struct ath_hw *ah = sc->sc_ah;
 345         struct ath_common *common = ath9k_hw_common(ah);
 346         struct ath_tx_control txctl;
 347         int time_left;
 348
 349         memset(&txctl, 0, sizeof(txctl));
 350         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 351
 352         memset(tx_info, 0, sizeof(*tx_info));
 353         tx_info->band = hw->conf.channel->band;
 354         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 355         tx_info->control.rates[0].idx = 0;
 356         tx_info->control.rates[0].count = 1;
 357         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 358         tx_info->control.rates[1].idx = -1;
 359
 360         init_completion(&sc->paprd_complete);
 361         txctl.paprd = BIT(chain);
 362
 363         if (ath_tx_start(hw, skb, &txctl) != 0) {
 364                 ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
 365                 dev_kfree_skb_any(skb);
 366                 return false;
 367         }
 368
 369         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 370                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 371
 372         if (!time_left)
 373                 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
 374                         "Timeout waiting for paprd training on TX chain %d\n",
 375                         chain);
 376
 377         return !!time_left;
 378 }
 379
 380 void ath_paprd_calibrate(struct work_struct *work)
 381 {
 382         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 383         struct ieee80211_hw *hw = sc->hw;
 384         struct ath_hw *ah = sc->sc_ah;
 385         struct ieee80211_hdr *hdr;
 386         struct sk_buff *skb = NULL;
 387         struct ath9k_hw_cal_data *caldata = ah->caldata;
 388         struct ath_common *common = ath9k_hw_common(ah);
 389         int ftype;
 390         int chain_ok = 0;
 391         int chain;
 392         int len = 1800;
 393
 394         if (!caldata)
 395                 return;
 396
 397         if (ar9003_paprd_init_table(ah) < 0)
 398                 return;
 399
 400         skb = alloc_skb(len, GFP_KERNEL);
 401         if (!skb)
 402                 return;
 403
 404         skb_put(skb, len);
 405         memset(skb->data, 0, len);
 406         hdr = (struct ieee80211_hdr *)skb->data;
 407         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 408         hdr->frame_control = cpu_to_le16(ftype);
 409         hdr->duration_id = cpu_to_le16(10);
 410         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 411         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 412         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 413
 414         ath9k_ps_wakeup(sc);
 415         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 416                 if (!(common->tx_chainmask & BIT(chain)))
 417                         continue;
 418
 419                 chain_ok = 0;
 420
 421                 ath_dbg(common, ATH_DBG_CALIBRATE,
 422                         "Sending PAPRD frame for thermal measurement "
 423                         "on chain %d\n", chain);
 424                 if (!ath_paprd_send_frame(sc, skb, chain))
 425                         goto fail_paprd;
 426
 427                 ar9003_paprd_setup_gain_table(ah, chain);
 428
 429                 ath_dbg(common, ATH_DBG_CALIBRATE,
 430                         "Sending PAPRD training frame on chain %d\n", chain);
 431                 if (!ath_paprd_send_frame(sc, skb, chain))
 432                         goto fail_paprd;
 433
 434                 if (!ar9003_paprd_is_done(ah))
 435                         break;
 436
 437                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 438                         break;
 439
 440                 chain_ok = 1;
 441         }
 442         kfree_skb(skb);
 443
 444         if (chain_ok) {
 445                 caldata->paprd_done = true;
 446                 ath_paprd_activate(sc);
 447         }
 448
 449 fail_paprd:
 450         ath9k_ps_restore(sc);
 451 }
 452
 453 /*
 454  *  This routine performs the periodic noise floor calibration function
 455  *  that is used to adjust and optimize the chip performance.  This
 456  *  takes environmental changes (location, temperature) into account.
 457  *  When the task is complete, it reschedules itself depending on the
 458  *  appropriate interval that was calculated.
 459  */
 460 void ath_ani_calibrate(unsigned long data)
 461 {
 462         struct ath_softc *sc = (struct ath_softc *)data;
 463         struct ath_hw *ah = sc->sc_ah;
 464         struct ath_common *common = ath9k_hw_common(ah);
 465         bool longcal = false;
 466         bool shortcal = false;
 467         bool aniflag = false;
 468         unsigned int timestamp = jiffies_to_msecs(jiffies);
 469         u32 cal_interval, short_cal_interval, long_cal_interval;
 470         unsigned long flags;
 471
 472         if (ah->caldata && ah->caldata->nfcal_interference)
 473                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 474         else
 475                 long_cal_interval = ATH_LONG_CALINTERVAL;
 476
 477         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 478                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 479
 480         /* Only calibrate if awake */
 481         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 482                 goto set_timer;
 483
 484         ath9k_ps_wakeup(sc);
 485
 486         /* Long calibration runs independently of short calibration. */
 487         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 488                 longcal = true;
 489                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 490                 common->ani.longcal_timer = timestamp;
 491         }
 492
 493         /* Short calibration applies only while caldone is false */
 494         if (!common->ani.caldone) {
 495                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 496                         shortcal = true;
 497                         ath_dbg(common, ATH_DBG_ANI,
 498                                 "shortcal @%lu\n", jiffies);
 499                         common->ani.shortcal_timer = timestamp;
 500                         common->ani.resetcal_timer = timestamp;
 501                 }
 502         } else {
 503                 if ((timestamp - common->ani.resetcal_timer) >=
 504                     ATH_RESTART_CALINTERVAL) {
 505                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 506                         if (common->ani.caldone)
 507                                 common->ani.resetcal_timer = timestamp;
 508                 }
 509         }
 510
 511         /* Verify whether we must check ANI */
 512         if ((timestamp - common->ani.checkani_timer) >=
 513              ah->config.ani_poll_interval) {
 514                 aniflag = true;
 515                 common->ani.checkani_timer = timestamp;
 516         }
 517
 518         /* Skip all processing if there's nothing to do. */
 519         if (longcal || shortcal || aniflag) {
 520                 /* Call ANI routine if necessary */
 521                 if (aniflag) {
 522                         spin_lock_irqsave(&common->cc_lock, flags);
 523                         ath9k_hw_ani_monitor(ah, ah->curchan);
 524                         ath_update_survey_stats(sc);
 525                         spin_unlock_irqrestore(&common->cc_lock, flags);
 526                 }
 527
 528                 /* Perform calibration if necessary */
 529                 if (longcal || shortcal) {
 530                         common->ani.caldone =
 531                                 ath9k_hw_calibrate(ah,
 532                                                    ah->curchan,
 533                                                    common->rx_chainmask,
 534                                                    longcal);
 535                 }
 536         }
 537
 538         ath9k_ps_restore(sc);
 539
 540 set_timer:
 541         /*
 542         * Set timer interval based on previous results.
 543         * The interval must be the shortest necessary to satisfy ANI,
 544         * short calibration and long calibration.
 545         */
 546         cal_interval = ATH_LONG_CALINTERVAL;
 547         if (sc->sc_ah->config.enable_ani)
 548                 cal_interval = min(cal_interval,
 549                                    (u32)ah->config.ani_poll_interval);
 550         if (!common->ani.caldone)
 551                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 552
 553         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 554         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 555                 if (!ah->caldata->paprd_done)
 556                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 557                 else if (!ah->paprd_table_write_done)
 558                         ath_paprd_activate(sc);
 559         }
 560 }
 561
 562 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 563 {
 564         struct ath_node *an;
 565         struct ath_hw *ah = sc->sc_ah;
 566         an = (struct ath_node *)sta->drv_priv;
 567
 568 #ifdef CONFIG_ATH9K_DEBUGFS
 569         spin_lock(&sc->nodes_lock);
 570         list_add(&an->list, &sc->nodes);
 571         spin_unlock(&sc->nodes_lock);
 572         an->sta = sta;
 573 #endif
 574         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 575                 sc->sc_flags |= SC_OP_ENABLE_APM;
 576
 577         if (sc->sc_flags & SC_OP_TXAGGR) {
 578                 ath_tx_node_init(sc, an);
 579                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 580                                      sta->ht_cap.ampdu_factor);
 581                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 582         }
 583 }
 584
 585 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 586 {
 587         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 588
 589 #ifdef CONFIG_ATH9K_DEBUGFS
 590         spin_lock(&sc->nodes_lock);
 591         list_del(&an->list);
 592         spin_unlock(&sc->nodes_lock);
 593         an->sta = NULL;
 594 #endif
 595
 596         if (sc->sc_flags & SC_OP_TXAGGR)
 597                 ath_tx_node_cleanup(sc, an);
 598 }
 599
 600 void ath_hw_check(struct work_struct *work)
 601 {
 602         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 603         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 604         unsigned long flags;
 605         int busy;
 606
 607         ath9k_ps_wakeup(sc);
 608         if (ath9k_hw_check_alive(sc->sc_ah))
 609                 goto out;
 610
 611         spin_lock_irqsave(&common->cc_lock, flags);
 612         busy = ath_update_survey_stats(sc);
 613         spin_unlock_irqrestore(&common->cc_lock, flags);
 614
 615         ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
 616                 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
 617         if (busy >= 99) {
 618                 if (++sc->hw_busy_count >= 3)
 619                         ath_reset(sc, true);
 620         } else if (busy >= 0)
 621                 sc->hw_busy_count = 0;
 622
 623 out:
 624         ath9k_ps_restore(sc);
 625 }
 626
 627 void ath9k_tasklet(unsigned long data)
 628 {
 629         struct ath_softc *sc = (struct ath_softc *)data;
 630         struct ath_hw *ah = sc->sc_ah;
 631         struct ath_common *common = ath9k_hw_common(ah);
 632
 633         u32 status = sc->intrstatus;
 634         u32 rxmask;
 635
 636         if (status & ATH9K_INT_FATAL) {
 637                 ath_reset(sc, true);
 638                 return;
 639         }
 640
 641         ath9k_ps_wakeup(sc);
 642         spin_lock(&sc->sc_pcu_lock);
 643
 644         /*
 645          * Only run the baseband hang check if beacons stop working in AP or
 646          * IBSS mode, because it has a high false positive rate. For station
 647          * mode it should not be necessary, since the upper layers will detect
 648          * this through a beacon miss automatically and the following channel
 649          * change will trigger a hardware reset anyway
 650          */
 651         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
 652             !ath9k_hw_check_alive(ah))
 653                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 654
 655         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 656                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 657                           ATH9K_INT_RXORN);
 658         else
 659                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 660
 661         if (status & rxmask) {
 662                 /* Check for high priority Rx first */
 663                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 664                     (status & ATH9K_INT_RXHP))
 665                         ath_rx_tasklet(sc, 0, true);
 666
 667                 ath_rx_tasklet(sc, 0, false);
 668         }
 669
 670         if (status & ATH9K_INT_TX) {
 671                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 672                         ath_tx_edma_tasklet(sc);
 673                 else
 674                         ath_tx_tasklet(sc);
 675         }
 676
 677         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 678                 /*
 679                  * TSF sync does not look correct; remain awake to sync with
 680                  * the next Beacon.
 681                  */
 682                 ath_dbg(common, ATH_DBG_PS,
 683                         "TSFOOR - Sync with next Beacon\n");
 684                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 685         }
 686
 687         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 688                 if (status & ATH9K_INT_GENTIMER)
 689                         ath_gen_timer_isr(sc->sc_ah);
 690
 691         /* re-enable hardware interrupt */
 692         ath9k_hw_enable_interrupts(ah);
 693
 694         spin_unlock(&sc->sc_pcu_lock);
 695         ath9k_ps_restore(sc);
 696 }
 697
 698 irqreturn_t ath_isr(int irq, void *dev)
 699 {
 700 #define SCHED_INTR (                            \
 701                 ATH9K_INT_FATAL |               \
 702                 ATH9K_INT_RXORN |               \
 703                 ATH9K_INT_RXEOL |               \
 704                 ATH9K_INT_RX |                  \
 705                 ATH9K_INT_RXLP |                \
 706                 ATH9K_INT_RXHP |                \
 707                 ATH9K_INT_TX |                  \
 708                 ATH9K_INT_BMISS |               \
 709                 ATH9K_INT_CST |                 \
 710                 ATH9K_INT_TSFOOR |              \
 711                 ATH9K_INT_GENTIMER)
 712
 713         struct ath_softc *sc = dev;
 714         struct ath_hw *ah = sc->sc_ah;
 715         struct ath_common *common = ath9k_hw_common(ah);
 716         enum ath9k_int status;
 717         bool sched = false;
 718
 719         /*
 720          * The hardware is not ready/present, don't
 721          * touch anything. Note this can happen early
 722          * on if the IRQ is shared.
 723          */
 724         if (sc->sc_flags & SC_OP_INVALID)
 725                 return IRQ_NONE;
 726
 727
 728         /* shared irq, not for us */
 729
 730         if (!ath9k_hw_intrpend(ah))
 731                 return IRQ_NONE;
 732
 733         /*
 734          * Figure out the reason(s) for the interrupt.  Note
 735          * that the hal returns a pseudo-ISR that may include
 736          * bits we haven't explicitly enabled so we mask the
 737          * value to insure we only process bits we requested.
 738          */
 739         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 740         status &= ah->imask;    /* discard unasked-for bits */
 741
 742         /*
 743          * If there are no status bits set, then this interrupt was not
 744          * for me (should have been caught above).
 745          */
 746         if (!status)
 747                 return IRQ_NONE;
 748
 749         /* Cache the status */
 750         sc->intrstatus = status;
 751
 752         if (status & SCHED_INTR)
 753                 sched = true;
 754
 755         /*
 756          * If a FATAL or RXORN interrupt is received, we have to reset the
 757          * chip immediately.
 758          */
 759         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 760             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 761                 goto chip_reset;
 762
 763         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 764             (status & ATH9K_INT_BB_WATCHDOG)) {
 765
 766                 spin_lock(&common->cc_lock);
 767                 ath_hw_cycle_counters_update(common);
 768                 ar9003_hw_bb_watchdog_dbg_info(ah);
 769                 spin_unlock(&common->cc_lock);
 770
 771                 goto chip_reset;
 772         }
 773
 774         if (status & ATH9K_INT_SWBA)
 775                 tasklet_schedule(&sc->bcon_tasklet);
 776
 777         if (status & ATH9K_INT_TXURN)
 778                 ath9k_hw_updatetxtriglevel(ah, true);
 779
 780         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 781                 if (status & ATH9K_INT_RXEOL) {
 782                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 783                         ath9k_hw_set_interrupts(ah, ah->imask);
 784                 }
 785         }
 786
 787         if (status & ATH9K_INT_MIB) {
 788                 /*
 789                  * Disable interrupts until we service the MIB
 790                  * interrupt; otherwise it will continue to
 791                  * fire.
 792                  */
 793                 ath9k_hw_disable_interrupts(ah);
 794                 /*
 795                  * Let the hal handle the event. We assume
 796                  * it will clear whatever condition caused
 797                  * the interrupt.
 798                  */
 799                 spin_lock(&common->cc_lock);
 800                 ath9k_hw_proc_mib_event(ah);
 801                 spin_unlock(&common->cc_lock);
 802                 ath9k_hw_enable_interrupts(ah);
 803         }
 804
 805         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 806                 if (status & ATH9K_INT_TIM_TIMER) {
 807                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 808                                 goto chip_reset;
 809                         /* Clear RxAbort bit so that we can
 810                          * receive frames */
 811                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 812                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 813                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 814                 }
 815
 816 chip_reset:
 817
 818         ath_debug_stat_interrupt(sc, status);
 819
 820         if (sched) {
 821                 /* turn off every interrupt */
 822                 ath9k_hw_disable_interrupts(ah);
 823                 tasklet_schedule(&sc->intr_tq);
 824         }
 825
 826         return IRQ_HANDLED;
 827
 828 #undef SCHED_INTR
 829 }
 830
 831 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 832                                  struct ieee80211_hw *hw,
 833                                  struct ieee80211_vif *vif,
 834                                  struct ieee80211_bss_conf *bss_conf)
 835 {
 836         struct ath_hw *ah = sc->sc_ah;
 837         struct ath_common *common = ath9k_hw_common(ah);
 838
 839         if (bss_conf->assoc) {
 840                 ath_dbg(common, ATH_DBG_CONFIG,
 841                         "Bss Info ASSOC %d, bssid: %pM\n",
 842                         bss_conf->aid, common->curbssid);
 843
 844                 /* New association, store aid */
 845                 common->curaid = bss_conf->aid;
 846                 ath9k_hw_write_associd(ah);
 847
 848                 /*
 849                  * Request a re-configuration of Beacon related timers
 850                  * on the receipt of the first Beacon frame (i.e.,
 851                  * after time sync with the AP).
 852                  */
 853                 sc->ps_flags |= PS_BEACON_SYNC;
 854
 855                 /* Configure the beacon */
 856                 ath_beacon_config(sc, vif);
 857
 858                 /* Reset rssi stats */
 859                 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
 860                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 861
 862                 sc->sc_flags |= SC_OP_ANI_RUN;
 863                 ath_start_ani(common);
 864         } else {
 865                 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 866                 common->curaid = 0;
 867                 /* Stop ANI */
 868                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 869                 del_timer_sync(&common->ani.timer);
 870         }
 871 }
 872
 873 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 874 {
 875         struct ath_hw *ah = sc->sc_ah;
 876         struct ath_common *common = ath9k_hw_common(ah);
 877         struct ieee80211_channel *channel = hw->conf.channel;
 878         int r;
 879
 880         ath9k_ps_wakeup(sc);
 881         spin_lock_bh(&sc->sc_pcu_lock);
 882
 883         ath9k_hw_configpcipowersave(ah, 0, 0);
 884
 885         if (!ah->curchan)
 886                 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
 887
 888         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 889         if (r) {
 890                 ath_err(common,
 891                         "Unable to reset channel (%u MHz), reset status %d\n",
 892                         channel->center_freq, r);
 893         }
 894
 895         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 896                                sc->config.txpowlimit, &sc->curtxpow);
 897         if (ath_startrecv(sc) != 0) {
 898                 ath_err(common, "Unable to restart recv logic\n");
 899                 goto out;
 900         }
 901         if (sc->sc_flags & SC_OP_BEACONS)
 902                 ath_beacon_config(sc, NULL);    /* restart beacons */
 903
 904         /* Re-Enable  interrupts */
 905         ath9k_hw_set_interrupts(ah, ah->imask);
 906
 907         /* Enable LED */
 908         ath9k_hw_cfg_output(ah, ah->led_pin,
 909                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 910         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 911
 912         ieee80211_wake_queues(hw);
 913         ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
 914
 915 out:
 916         spin_unlock_bh(&sc->sc_pcu_lock);
 917
 918         ath9k_ps_restore(sc);
 919 }
 920
 921 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 922 {
 923         struct ath_hw *ah = sc->sc_ah;
 924         struct ieee80211_channel *channel = hw->conf.channel;
 925         int r;
 926
 927         ath9k_ps_wakeup(sc);
 928         cancel_delayed_work_sync(&sc->hw_pll_work);
 929
 930         spin_lock_bh(&sc->sc_pcu_lock);
 931
 932         ieee80211_stop_queues(hw);
 933
 934         /*
 935          * Keep the LED on when the radio is disabled
 936          * during idle unassociated state.
 937          */
 938         if (!sc->ps_idle) {
 939                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 940                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 941         }
 942
 943         /* Disable interrupts */
 944         ath9k_hw_disable_interrupts(ah);
 945
 946         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 947
 948         ath_stoprecv(sc);               /* turn off frame recv */
 949         ath_flushrecv(sc);              /* flush recv queue */
 950
 951         if (!ah->curchan)
 952                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
 953
 954         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 955         if (r) {
 956                 ath_err(ath9k_hw_common(sc->sc_ah),
 957                         "Unable to reset channel (%u MHz), reset status %d\n",
 958                         channel->center_freq, r);
 959         }
 960
 961         ath9k_hw_phy_disable(ah);
 962
 963         ath9k_hw_configpcipowersave(ah, 1, 1);
 964
 965         spin_unlock_bh(&sc->sc_pcu_lock);
 966         ath9k_ps_restore(sc);
 967 }
 968
 969 int ath_reset(struct ath_softc *sc, bool retry_tx)
 970 {
 971         struct ath_hw *ah = sc->sc_ah;
 972         struct ath_common *common = ath9k_hw_common(ah);
 973         struct ieee80211_hw *hw = sc->hw;
 974         int r;
 975
 976         sc->hw_busy_count = 0;
 977
 978         /* Stop ANI */
 979         del_timer_sync(&common->ani.timer);
 980
 981         ath9k_ps_wakeup(sc);
 982         spin_lock_bh(&sc->sc_pcu_lock);
 983
 984         ieee80211_stop_queues(hw);
 985
 986         ath9k_hw_disable_interrupts(ah);
 987         ath_drain_all_txq(sc, retry_tx);
 988
 989         ath_stoprecv(sc);
 990         ath_flushrecv(sc);
 991
 992         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 993         if (r)
 994                 ath_err(common,
 995                         "Unable to reset hardware; reset status %d\n", r);
 996
 997         if (ath_startrecv(sc) != 0)
 998                 ath_err(common, "Unable to start recv logic\n");
 999
1000         /*
1001          * We may be doing a reset in response to a request
1002          * that changes the channel so update any state that
1003          * might change as a result.
1004          */
1005         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1006                                sc->config.txpowlimit, &sc->curtxpow);
1007
1008         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1009                 ath_beacon_config(sc, NULL);    /* restart beacons */
1010
1011         ath9k_hw_set_interrupts(ah, ah->imask);
1012
1013         if (retry_tx) {
1014                 int i;
1015                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1016                         if (ATH_TXQ_SETUP(sc, i)) {
1017                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1018                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1019                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1020                         }
1021                 }
1022         }
1023
1024         ieee80211_wake_queues(hw);
1025         spin_unlock_bh(&sc->sc_pcu_lock);
1026
1027         /* Start ANI */
1028         ath_start_ani(common);
1029         ath9k_ps_restore(sc);
1030
1031         return r;
1032 }
1033
1034 /**********************/
1035 /* mac80211 callbacks */
1036 /**********************/
1037
1038 static int ath9k_start(struct ieee80211_hw *hw)
1039 {
1040         struct ath_softc *sc = hw->priv;
1041         struct ath_hw *ah = sc->sc_ah;
1042         struct ath_common *common = ath9k_hw_common(ah);
1043         struct ieee80211_channel *curchan = hw->conf.channel;
1044         struct ath9k_channel *init_channel;
1045         int r;
1046
1047         ath_dbg(common, ATH_DBG_CONFIG,
1048                 "Starting driver with initial channel: %d MHz\n",
1049                 curchan->center_freq);
1050
1051         ath9k_ps_wakeup(sc);
1052
1053         mutex_lock(&sc->mutex);
1054
1055         /* setup initial channel */
1056         sc->chan_idx = curchan->hw_value;
1057
1058         init_channel = ath9k_cmn_get_curchannel(hw, ah);
1059
1060         /* Reset SERDES registers */
1061         ath9k_hw_configpcipowersave(ah, 0, 0);
1062
1063         /*
1064          * The basic interface to setting the hardware in a good
1065          * state is ``reset''.  On return the hardware is known to
1066          * be powered up and with interrupts disabled.  This must
1067          * be followed by initialization of the appropriate bits
1068          * and then setup of the interrupt mask.
1069          */
1070         spin_lock_bh(&sc->sc_pcu_lock);
1071         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1072         if (r) {
1073                 ath_err(common,
1074                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1075                         r, curchan->center_freq);
1076                 spin_unlock_bh(&sc->sc_pcu_lock);
1077                 goto mutex_unlock;
1078         }
1079
1080         /*
1081          * This is needed only to setup initial state
1082          * but it's best done after a reset.
1083          */
1084         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1085                         sc->config.txpowlimit, &sc->curtxpow);
1086
1087         /*
1088          * Setup the hardware after reset:
1089          * The receive engine is set going.
1090          * Frame transmit is handled entirely
1091          * in the frame output path; there's nothing to do
1092          * here except setup the interrupt mask.
1093          */
1094         if (ath_startrecv(sc) != 0) {
1095                 ath_err(common, "Unable to start recv logic\n");
1096                 r = -EIO;
1097                 spin_unlock_bh(&sc->sc_pcu_lock);
1098                 goto mutex_unlock;
1099         }
1100         spin_unlock_bh(&sc->sc_pcu_lock);
1101
1102         /* Setup our intr mask. */
1103         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1104                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1105                     ATH9K_INT_GLOBAL;
1106
1107         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1108                 ah->imask |= ATH9K_INT_RXHP |
1109                              ATH9K_INT_RXLP |
1110                              ATH9K_INT_BB_WATCHDOG;
1111         else
1112                 ah->imask |= ATH9K_INT_RX;
1113
1114         ah->imask |= ATH9K_INT_GTT;
1115
1116         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1117                 ah->imask |= ATH9K_INT_CST;
1118
1119         sc->sc_flags &= ~SC_OP_INVALID;
1120         sc->sc_ah->is_monitoring = false;
1121
1122         /* Disable BMISS interrupt when we're not associated */
1123         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1124         ath9k_hw_set_interrupts(ah, ah->imask);
1125
1126         ieee80211_wake_queues(hw);
1127
1128         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1129
1130         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1131             !ah->btcoex_hw.enabled) {
1132                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1133                                            AR_STOMP_LOW_WLAN_WGHT);
1134                 ath9k_hw_btcoex_enable(ah);
1135
1136                 if (common->bus_ops->bt_coex_prep)
1137                         common->bus_ops->bt_coex_prep(common);
1138                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1139                         ath9k_btcoex_timer_resume(sc);
1140         }
1141
1142         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1143                 common->bus_ops->extn_synch_en(common);
1144
1145 mutex_unlock:
1146         mutex_unlock(&sc->mutex);
1147
1148         ath9k_ps_restore(sc);
1149
1150         return r;
1151 }
1152
1153 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1154 {
1155         struct ath_softc *sc = hw->priv;
1156         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1157         struct ath_tx_control txctl;
1158         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1159
1160         if (sc->ps_enabled) {
1161                 /*
1162                  * mac80211 does not set PM field for normal data frames, so we
1163                  * need to update that based on the current PS mode.
1164                  */
1165                 if (ieee80211_is_data(hdr->frame_control) &&
1166                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1167                     !ieee80211_has_pm(hdr->frame_control)) {
1168                         ath_dbg(common, ATH_DBG_PS,
1169                                 "Add PM=1 for a TX frame while in PS mode\n");
1170                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1171                 }
1172         }
1173
1174         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1175                 /*
1176                  * We are using PS-Poll and mac80211 can request TX while in
1177                  * power save mode. Need to wake up hardware for the TX to be
1178                  * completed and if needed, also for RX of buffered frames.
1179                  */
1180                 ath9k_ps_wakeup(sc);
1181                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1182                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1183                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1184                         ath_dbg(common, ATH_DBG_PS,
1185                                 "Sending PS-Poll to pick a buffered frame\n");
1186                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1187                 } else {
1188                         ath_dbg(common, ATH_DBG_PS,
1189                                 "Wake up to complete TX\n");
1190                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1191                 }
1192                 /*
1193                  * The actual restore operation will happen only after
1194                  * the sc_flags bit is cleared. We are just dropping
1195                  * the ps_usecount here.
1196                  */
1197                 ath9k_ps_restore(sc);
1198         }
1199
1200         memset(&txctl, 0, sizeof(struct ath_tx_control));
1201         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1202
1203         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1204
1205         if (ath_tx_start(hw, skb, &txctl) != 0) {
1206                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1207                 goto exit;
1208         }
1209
1210         return;
1211 exit:
1212         dev_kfree_skb_any(skb);
1213 }
1214
1215 static void ath9k_stop(struct ieee80211_hw *hw)
1216 {
1217         struct ath_softc *sc = hw->priv;
1218         struct ath_hw *ah = sc->sc_ah;
1219         struct ath_common *common = ath9k_hw_common(ah);
1220
1221         mutex_lock(&sc->mutex);
1222
1223         cancel_delayed_work_sync(&sc->tx_complete_work);
1224         cancel_delayed_work_sync(&sc->hw_pll_work);
1225         cancel_work_sync(&sc->paprd_work);
1226         cancel_work_sync(&sc->hw_check_work);
1227
1228         if (sc->sc_flags & SC_OP_INVALID) {
1229                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1230                 mutex_unlock(&sc->mutex);
1231                 return;
1232         }
1233
1234         /* Ensure HW is awake when we try to shut it down. */
1235         ath9k_ps_wakeup(sc);
1236
1237         if (ah->btcoex_hw.enabled) {
1238                 ath9k_hw_btcoex_disable(ah);
1239                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1240                         ath9k_btcoex_timer_pause(sc);
1241         }
1242
1243         spin_lock_bh(&sc->sc_pcu_lock);
1244
1245         /* prevent tasklets to enable interrupts once we disable them */
1246         ah->imask &= ~ATH9K_INT_GLOBAL;
1247
1248         /* make sure h/w will not generate any interrupt
1249          * before setting the invalid flag. */
1250         ath9k_hw_disable_interrupts(ah);
1251
1252         if (!(sc->sc_flags & SC_OP_INVALID)) {
1253                 ath_drain_all_txq(sc, false);
1254                 ath_stoprecv(sc);
1255                 ath9k_hw_phy_disable(ah);
1256         } else
1257                 sc->rx.rxlink = NULL;
1258
1259         if (sc->rx.frag) {
1260                 dev_kfree_skb_any(sc->rx.frag);
1261                 sc->rx.frag = NULL;
1262         }
1263
1264         /* disable HAL and put h/w to sleep */
1265         ath9k_hw_disable(ah);
1266         ath9k_hw_configpcipowersave(ah, 1, 1);
1267
1268         spin_unlock_bh(&sc->sc_pcu_lock);
1269
1270         /* we can now sync irq and kill any running tasklets, since we already
1271          * disabled interrupts and not holding a spin lock */
1272         synchronize_irq(sc->irq);
1273         tasklet_kill(&sc->intr_tq);
1274         tasklet_kill(&sc->bcon_tasklet);
1275
1276         ath9k_ps_restore(sc);
1277
1278         sc->ps_idle = true;
1279         ath_radio_disable(sc, hw);
1280
1281         sc->sc_flags |= SC_OP_INVALID;
1282
1283         mutex_unlock(&sc->mutex);
1284
1285         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1286 }
1287
1288 bool ath9k_uses_beacons(int type)
1289 {
1290         switch (type) {
1291         case NL80211_IFTYPE_AP:
1292         case NL80211_IFTYPE_ADHOC:
1293         case NL80211_IFTYPE_MESH_POINT:
1294                 return true;
1295         default:
1296                 return false;
1297         }
1298 }
1299
1300 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1301                                  struct ieee80211_vif *vif)
1302 {
1303         struct ath_vif *avp = (void *)vif->drv_priv;
1304
1305         ath9k_set_beaconing_status(sc, false);
1306         ath_beacon_return(sc, avp);
1307         ath9k_set_beaconing_status(sc, true);
1308         sc->sc_flags &= ~SC_OP_BEACONS;
1309 }
1310
1311 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1312 {
1313         struct ath9k_vif_iter_data *iter_data = data;
1314         int i;
1315
1316         if (iter_data->hw_macaddr)
1317                 for (i = 0; i < ETH_ALEN; i++)
1318                         iter_data->mask[i] &=
1319                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1320
1321         switch (vif->type) {
1322         case NL80211_IFTYPE_AP:
1323                 iter_data->naps++;
1324                 break;
1325         case NL80211_IFTYPE_STATION:
1326                 iter_data->nstations++;
1327                 break;
1328         case NL80211_IFTYPE_ADHOC:
1329                 iter_data->nadhocs++;
1330                 break;
1331         case NL80211_IFTYPE_MESH_POINT:
1332                 iter_data->nmeshes++;
1333                 break;
1334         case NL80211_IFTYPE_WDS:
1335                 iter_data->nwds++;
1336                 break;
1337         default:
1338                 iter_data->nothers++;
1339                 break;
1340         }
1341 }
1342
1343 /* Called with sc->mutex held. */
1344 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1345                                struct ieee80211_vif *vif,
1346                                struct ath9k_vif_iter_data *iter_data)
1347 {
1348         struct ath_softc *sc = hw->priv;
1349         struct ath_hw *ah = sc->sc_ah;
1350         struct ath_common *common = ath9k_hw_common(ah);
1351
1352         /*
1353          * Use the hardware MAC address as reference, the hardware uses it
1354          * together with the BSSID mask when matching addresses.
1355          */
1356         memset(iter_data, 0, sizeof(*iter_data));
1357         iter_data->hw_macaddr = common->macaddr;
1358         memset(&iter_data->mask, 0xff, ETH_ALEN);
1359
1360         if (vif)
1361                 ath9k_vif_iter(iter_data, vif->addr, vif);
1362
1363         /* Get list of all active MAC addresses */
1364         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1365                                                    iter_data);
1366 }
1367
1368 /* Called with sc->mutex held. */
1369 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1370                                           struct ieee80211_vif *vif)
1371 {
1372         struct ath_softc *sc = hw->priv;
1373         struct ath_hw *ah = sc->sc_ah;
1374         struct ath_common *common = ath9k_hw_common(ah);
1375         struct ath9k_vif_iter_data iter_data;
1376
1377         ath9k_calculate_iter_data(hw, vif, &iter_data);
1378
1379         /* Set BSSID mask. */
1380         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1381         ath_hw_setbssidmask(common);
1382
1383         /* Set op-mode & TSF */
1384         if (iter_data.naps > 0) {
1385                 ath9k_hw_set_tsfadjust(ah, 1);
1386                 sc->sc_flags |= SC_OP_TSF_RESET;
1387                 ah->opmode = NL80211_IFTYPE_AP;
1388         } else {
1389                 ath9k_hw_set_tsfadjust(ah, 0);
1390                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1391
1392                 if (iter_data.nwds + iter_data.nmeshes)
1393                         ah->opmode = NL80211_IFTYPE_AP;
1394                 else if (iter_data.nadhocs)
1395                         ah->opmode = NL80211_IFTYPE_ADHOC;
1396                 else
1397                         ah->opmode = NL80211_IFTYPE_STATION;
1398         }
1399
1400         /*
1401          * Enable MIB interrupts when there are hardware phy counters.
1402          */
1403         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1404                 if (ah->config.enable_ani)
1405                         ah->imask |= ATH9K_INT_MIB;
1406                 ah->imask |= ATH9K_INT_TSFOOR;
1407         } else {
1408                 ah->imask &= ~ATH9K_INT_MIB;
1409                 ah->imask &= ~ATH9K_INT_TSFOOR;
1410         }
1411
1412         ath9k_hw_set_interrupts(ah, ah->imask);
1413
1414         /* Set up ANI */
1415         if ((iter_data.naps + iter_data.nadhocs) > 0) {
1416                 sc->sc_flags |= SC_OP_ANI_RUN;
1417                 ath_start_ani(common);
1418         } else {
1419                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1420                 del_timer_sync(&common->ani.timer);
1421         }
1422 }
1423
1424 /* Called with sc->mutex held, vif counts set up properly. */
1425 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1426                                    struct ieee80211_vif *vif)
1427 {
1428         struct ath_softc *sc = hw->priv;
1429
1430         ath9k_calculate_summary_state(hw, vif);
1431
1432         if (ath9k_uses_beacons(vif->type)) {
1433                 int error;
1434                 /* This may fail because upper levels do not have beacons
1435                  * properly configured yet.  That's OK, we assume it
1436                  * will be properly configured and then we will be notified
1437                  * in the info_changed method and set up beacons properly
1438                  * there.
1439                  */
1440                 ath9k_set_beaconing_status(sc, false);
1441                 error = ath_beacon_alloc(sc, vif);
1442                 if (!error)
1443                         ath_beacon_config(sc, vif);
1444                 ath9k_set_beaconing_status(sc, true);
1445         }
1446 }
1447
1448
1449 static int ath9k_add_interface(struct ieee80211_hw *hw,
1450                                struct ieee80211_vif *vif)
1451 {
1452         struct ath_softc *sc = hw->priv;
1453         struct ath_hw *ah = sc->sc_ah;
1454         struct ath_common *common = ath9k_hw_common(ah);
1455         struct ath_vif *avp = (void *)vif->drv_priv;
1456         int ret = 0;
1457
1458         ath9k_ps_wakeup(sc);
1459         mutex_lock(&sc->mutex);
1460
1461         switch (vif->type) {
1462         case NL80211_IFTYPE_STATION:
1463         case NL80211_IFTYPE_WDS:
1464         case NL80211_IFTYPE_ADHOC:
1465         case NL80211_IFTYPE_AP:
1466         case NL80211_IFTYPE_MESH_POINT:
1467                 break;
1468         default:
1469                 ath_err(common, "Interface type %d not yet supported\n",
1470                         vif->type);
1471                 ret = -EOPNOTSUPP;
1472                 goto out;
1473         }
1474
1475         if (ath9k_uses_beacons(vif->type)) {
1476                 if (sc->nbcnvifs >= ATH_BCBUF) {
1477                         ath_err(common, "Not enough beacon buffers when adding"
1478                                 " new interface of type: %i\n",
1479                                 vif->type);
1480                         ret = -ENOBUFS;
1481                         goto out;
1482                 }
1483         }
1484
1485         if ((vif->type == NL80211_IFTYPE_ADHOC) &&
1486             sc->nvifs > 0) {
1487                 ath_err(common, "Cannot create ADHOC interface when other"
1488                         " interfaces already exist.\n");
1489                 ret = -EINVAL;
1490                 goto out;
1491         }
1492
1493         ath_dbg(common, ATH_DBG_CONFIG,
1494                 "Attach a VIF of type: %d\n", vif->type);
1495
1496         /* Set the VIF opmode */
1497         avp->av_opmode = vif->type;
1498         avp->av_bslot = -1;
1499
1500         sc->nvifs++;
1501
1502         ath9k_do_vif_add_setup(hw, vif);
1503 out:
1504         mutex_unlock(&sc->mutex);
1505         ath9k_ps_restore(sc);
1506         return ret;
1507 }
1508
1509 static int ath9k_change_interface(struct ieee80211_hw *hw,
1510                                   struct ieee80211_vif *vif,
1511                                   enum nl80211_iftype new_type,
1512                                   bool p2p)
1513 {
1514         struct ath_softc *sc = hw->priv;
1515         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1516         int ret = 0;
1517
1518         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1519         mutex_lock(&sc->mutex);
1520         ath9k_ps_wakeup(sc);
1521
1522         /* See if new interface type is valid. */
1523         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1524             (sc->nvifs > 1)) {
1525                 ath_err(common, "When using ADHOC, it must be the only"
1526                         " interface.\n");
1527                 ret = -EINVAL;
1528                 goto out;
1529         }
1530
1531         if (ath9k_uses_beacons(new_type) &&
1532             !ath9k_uses_beacons(vif->type)) {
1533                 if (sc->nbcnvifs >= ATH_BCBUF) {
1534                         ath_err(common, "No beacon slot available\n");
1535                         ret = -ENOBUFS;
1536                         goto out;
1537                 }
1538         }
1539
1540         /* Clean up old vif stuff */
1541         if (ath9k_uses_beacons(vif->type))
1542                 ath9k_reclaim_beacon(sc, vif);
1543
1544         /* Add new settings */
1545         vif->type = new_type;
1546         vif->p2p = p2p;
1547
1548         ath9k_do_vif_add_setup(hw, vif);
1549 out:
1550         ath9k_ps_restore(sc);
1551         mutex_unlock(&sc->mutex);
1552         return ret;
1553 }
1554
1555 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1556                                    struct ieee80211_vif *vif)
1557 {
1558         struct ath_softc *sc = hw->priv;
1559         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1560
1561         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1562
1563         ath9k_ps_wakeup(sc);
1564         mutex_lock(&sc->mutex);
1565
1566         sc->nvifs--;
1567
1568         /* Reclaim beacon resources */
1569         if (ath9k_uses_beacons(vif->type))
1570                 ath9k_reclaim_beacon(sc, vif);
1571
1572         ath9k_calculate_summary_state(hw, NULL);
1573
1574         mutex_unlock(&sc->mutex);
1575         ath9k_ps_restore(sc);
1576 }
1577
1578 static void ath9k_enable_ps(struct ath_softc *sc)
1579 {
1580         struct ath_hw *ah = sc->sc_ah;
1581
1582         sc->ps_enabled = true;
1583         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1584                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1585                         ah->imask |= ATH9K_INT_TIM_TIMER;
1586                         ath9k_hw_set_interrupts(ah, ah->imask);
1587                 }
1588                 ath9k_hw_setrxabort(ah, 1);
1589         }
1590 }
1591
1592 static void ath9k_disable_ps(struct ath_softc *sc)
1593 {
1594         struct ath_hw *ah = sc->sc_ah;
1595
1596         sc->ps_enabled = false;
1597         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1598         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1599                 ath9k_hw_setrxabort(ah, 0);
1600                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1601                                   PS_WAIT_FOR_CAB |
1602                                   PS_WAIT_FOR_PSPOLL_DATA |
1603                                   PS_WAIT_FOR_TX_ACK);
1604                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1605                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1606                         ath9k_hw_set_interrupts(ah, ah->imask);
1607                 }
1608         }
1609
1610 }
1611
1612 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1613 {
1614         struct ath_softc *sc = hw->priv;
1615         struct ath_hw *ah = sc->sc_ah;
1616         struct ath_common *common = ath9k_hw_common(ah);
1617         struct ieee80211_conf *conf = &hw->conf;
1618         bool disable_radio = false;
1619
1620         mutex_lock(&sc->mutex);
1621
1622         /*
1623          * Leave this as the first check because we need to turn on the
1624          * radio if it was disabled before prior to processing the rest
1625          * of the changes. Likewise we must only disable the radio towards
1626          * the end.
1627          */
1628         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1629                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1630                 if (!sc->ps_idle) {
1631                         ath_radio_enable(sc, hw);
1632                         ath_dbg(common, ATH_DBG_CONFIG,
1633                                 "not-idle: enabling radio\n");
1634                 } else {
1635                         disable_radio = true;
1636                 }
1637         }
1638
1639         /*
1640          * We just prepare to enable PS. We have to wait until our AP has
1641          * ACK'd our null data frame to disable RX otherwise we'll ignore
1642          * those ACKs and end up retransmitting the same null data frames.
1643          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1644          */
1645         if (changed & IEEE80211_CONF_CHANGE_PS) {
1646                 unsigned long flags;
1647                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1648                 if (conf->flags & IEEE80211_CONF_PS)
1649                         ath9k_enable_ps(sc);
1650                 else
1651                         ath9k_disable_ps(sc);
1652                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1653         }
1654
1655         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1656                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1657                         ath_dbg(common, ATH_DBG_CONFIG,
1658                                 "Monitor mode is enabled\n");
1659                         sc->sc_ah->is_monitoring = true;
1660                 } else {
1661                         ath_dbg(common, ATH_DBG_CONFIG,
1662                                 "Monitor mode is disabled\n");
1663                         sc->sc_ah->is_monitoring = false;
1664                 }
1665         }
1666
1667         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1668                 struct ieee80211_channel *curchan = hw->conf.channel;
1669                 int pos = curchan->hw_value;
1670                 int old_pos = -1;
1671                 unsigned long flags;
1672
1673                 if (ah->curchan)
1674                         old_pos = ah->curchan - &ah->channels[0];
1675
1676                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1677                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1678                 else
1679                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1680
1681                 ath_dbg(common, ATH_DBG_CONFIG,
1682                         "Set channel: %d MHz type: %d\n",
1683                         curchan->center_freq, conf->channel_type);
1684
1685                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1686                                           curchan, conf->channel_type);
1687
1688                 /* update survey stats for the old channel before switching */
1689                 spin_lock_irqsave(&common->cc_lock, flags);
1690                 ath_update_survey_stats(sc);
1691                 spin_unlock_irqrestore(&common->cc_lock, flags);
1692
1693                 /*
1694                  * If the operating channel changes, change the survey in-use flags
1695                  * along with it.
1696                  * Reset the survey data for the new channel, unless we're switching
1697                  * back to the operating channel from an off-channel operation.
1698                  */
1699                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1700                     sc->cur_survey != &sc->survey[pos]) {
1701
1702                         if (sc->cur_survey)
1703                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1704
1705                         sc->cur_survey = &sc->survey[pos];
1706
1707                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1708                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1709                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1710                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1711                 }
1712
1713                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1714                         ath_err(common, "Unable to set channel\n");
1715                         mutex_unlock(&sc->mutex);
1716                         return -EINVAL;
1717                 }
1718
1719                 /*
1720                  * The most recent snapshot of channel->noisefloor for the old
1721                  * channel is only available after the hardware reset. Copy it to
1722                  * the survey stats now.
1723                  */
1724                 if (old_pos >= 0)
1725                         ath_update_survey_nf(sc, old_pos);
1726         }
1727
1728         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1729                 ath_dbg(common, ATH_DBG_CONFIG,
1730                         "Set power: %d\n", conf->power_level);
1731                 sc->config.txpowlimit = 2 * conf->power_level;
1732                 ath9k_ps_wakeup(sc);
1733                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1734                                        sc->config.txpowlimit, &sc->curtxpow);
1735                 ath9k_ps_restore(sc);
1736         }
1737
1738         if (disable_radio) {
1739                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1740                 ath_radio_disable(sc, hw);
1741         }
1742
1743         mutex_unlock(&sc->mutex);
1744
1745         return 0;
1746 }
1747
1748 #define SUPPORTED_FILTERS                       \
1749         (FIF_PROMISC_IN_BSS |                   \
1750         FIF_ALLMULTI |                          \
1751         FIF_CONTROL |                           \
1752         FIF_PSPOLL |                            \
1753         FIF_OTHER_BSS |                         \
1754         FIF_BCN_PRBRESP_PROMISC |               \
1755         FIF_PROBE_REQ |                         \
1756         FIF_FCSFAIL)
1757
1758 /* FIXME: sc->sc_full_reset ? */
1759 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1760                                    unsigned int changed_flags,
1761                                    unsigned int *total_flags,
1762                                    u64 multicast)
1763 {
1764         struct ath_softc *sc = hw->priv;
1765         u32 rfilt;
1766
1767         changed_flags &= SUPPORTED_FILTERS;
1768         *total_flags &= SUPPORTED_FILTERS;
1769
1770         sc->rx.rxfilter = *total_flags;
1771         ath9k_ps_wakeup(sc);
1772         rfilt = ath_calcrxfilter(sc);
1773         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1774         ath9k_ps_restore(sc);
1775
1776         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1777                 "Set HW RX filter: 0x%x\n", rfilt);
1778 }
1779
1780 static int ath9k_sta_add(struct ieee80211_hw *hw,
1781                          struct ieee80211_vif *vif,
1782                          struct ieee80211_sta *sta)
1783 {
1784         struct ath_softc *sc = hw->priv;
1785
1786         ath_node_attach(sc, sta);
1787
1788         return 0;
1789 }
1790
1791 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1792                             struct ieee80211_vif *vif,
1793                             struct ieee80211_sta *sta)
1794 {
1795         struct ath_softc *sc = hw->priv;
1796
1797         ath_node_detach(sc, sta);
1798
1799         return 0;
1800 }
1801
1802 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1803                          const struct ieee80211_tx_queue_params *params)
1804 {
1805         struct ath_softc *sc = hw->priv;
1806         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1807         struct ath_txq *txq;
1808         struct ath9k_tx_queue_info qi;
1809         int ret = 0;
1810
1811         if (queue >= WME_NUM_AC)
1812                 return 0;
1813
1814         txq = sc->tx.txq_map[queue];
1815
1816         ath9k_ps_wakeup(sc);
1817         mutex_lock(&sc->mutex);
1818
1819         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1820
1821         qi.tqi_aifs = params->aifs;
1822         qi.tqi_cwmin = params->cw_min;
1823         qi.tqi_cwmax = params->cw_max;
1824         qi.tqi_burstTime = params->txop;
1825
1826         ath_dbg(common, ATH_DBG_CONFIG,
1827                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1828                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1829                 params->cw_max, params->txop);
1830
1831         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1832         if (ret)
1833                 ath_err(common, "TXQ Update failed\n");
1834
1835         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1836                 if (queue == WME_AC_BE && !ret)
1837                         ath_beaconq_config(sc);
1838
1839         mutex_unlock(&sc->mutex);
1840         ath9k_ps_restore(sc);
1841
1842         return ret;
1843 }
1844
1845 static int ath9k_set_key(struct ieee80211_hw *hw,
1846                          enum set_key_cmd cmd,
1847                          struct ieee80211_vif *vif,
1848                          struct ieee80211_sta *sta,
1849                          struct ieee80211_key_conf *key)
1850 {
1851         struct ath_softc *sc = hw->priv;
1852         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1853         int ret = 0;
1854
1855         if (ath9k_modparam_nohwcrypt)
1856                 return -ENOSPC;
1857
1858         mutex_lock(&sc->mutex);
1859         ath9k_ps_wakeup(sc);
1860         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1861
1862         switch (cmd) {
1863         case SET_KEY:
1864                 ret = ath_key_config(common, vif, sta, key);
1865                 if (ret >= 0) {
1866                         key->hw_key_idx = ret;
1867                         /* push IV and Michael MIC generation to stack */
1868                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1869                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1870                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1871                         if (sc->sc_ah->sw_mgmt_crypto &&
1872                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1873                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1874                         ret = 0;
1875                 }
1876                 break;
1877         case DISABLE_KEY:
1878                 ath_key_delete(common, key);
1879                 break;
1880         default:
1881                 ret = -EINVAL;
1882         }
1883
1884         ath9k_ps_restore(sc);
1885         mutex_unlock(&sc->mutex);
1886
1887         return ret;
1888 }
1889
1890 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1891                                    struct ieee80211_vif *vif,
1892                                    struct ieee80211_bss_conf *bss_conf,
1893                                    u32 changed)
1894 {
1895         struct ath_softc *sc = hw->priv;
1896         struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
1897         struct ath_hw *ah = sc->sc_ah;
1898         struct ath_common *common = ath9k_hw_common(ah);
1899         struct ath_vif *avp = (void *)vif->drv_priv;
1900         int slottime;
1901         int error;
1902
1903         ath9k_ps_wakeup(sc);
1904         mutex_lock(&sc->mutex);
1905
1906         if (changed & BSS_CHANGED_BSSID) {
1907                 /* Set BSSID */
1908                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1909                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1910                 common->curaid = 0;
1911                 ath9k_hw_write_associd(ah);
1912
1913                 /* Set aggregation protection mode parameters */
1914                 sc->config.ath_aggr_prot = 0;
1915
1916                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1917                         common->curbssid, common->curaid);
1918
1919                 /* need to reconfigure the beacon */
1920                 sc->sc_flags &= ~SC_OP_BEACONS ;
1921         }
1922
1923         /* Enable transmission of beacons (AP, IBSS, MESH) */
1924         if ((changed & BSS_CHANGED_BEACON) ||
1925             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1926                 ath9k_set_beaconing_status(sc, false);
1927                 error = ath_beacon_alloc(sc, vif);
1928                 if (!error)
1929                         ath_beacon_config(sc, vif);
1930                 ath9k_set_beaconing_status(sc, true);
1931         }
1932
1933         if (changed & BSS_CHANGED_ERP_SLOT) {
1934                 if (bss_conf->use_short_slot)
1935                         slottime = 9;
1936                 else
1937                         slottime = 20;
1938                 if (vif->type == NL80211_IFTYPE_AP) {
1939                         /*
1940                          * Defer update, so that connected stations can adjust
1941                          * their settings at the same time.
1942                          * See beacon.c for more details
1943                          */
1944                         sc->beacon.slottime = slottime;
1945                         sc->beacon.updateslot = UPDATE;
1946                 } else {
1947                         ah->slottime = slottime;
1948                         ath9k_hw_init_global_settings(ah);
1949                 }
1950         }
1951
1952         /* Disable transmission of beacons */
1953         if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
1954             !bss_conf->enable_beacon) {
1955                 ath9k_set_beaconing_status(sc, false);
1956                 avp->is_bslot_active = false;
1957                 ath9k_set_beaconing_status(sc, true);
1958         }
1959
1960         if (changed & BSS_CHANGED_BEACON_INT) {
1961                 cur_conf->beacon_interval = bss_conf->beacon_int;
1962                 /*
1963                  * In case of AP mode, the HW TSF has to be reset
1964                  * when the beacon interval changes.
1965                  */
1966                 if (vif->type == NL80211_IFTYPE_AP) {
1967                         sc->sc_flags |= SC_OP_TSF_RESET;
1968                         ath9k_set_beaconing_status(sc, false);
1969                         error = ath_beacon_alloc(sc, vif);
1970                         if (!error)
1971                                 ath_beacon_config(sc, vif);
1972                         ath9k_set_beaconing_status(sc, true);
1973                 } else {
1974                         ath_beacon_config(sc, vif);
1975                 }
1976         }
1977
1978         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1979                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1980                         bss_conf->use_short_preamble);
1981                 if (bss_conf->use_short_preamble)
1982                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1983                 else
1984                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1985         }
1986
1987         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1988                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1989                         bss_conf->use_cts_prot);
1990                 if (bss_conf->use_cts_prot &&
1991                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1992                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1993                 else
1994                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1995         }
1996
1997         if (changed & BSS_CHANGED_ASSOC) {
1998                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1999                         bss_conf->assoc);
2000                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
2001         }
2002
2003         mutex_unlock(&sc->mutex);
2004         ath9k_ps_restore(sc);
2005 }
2006
2007 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2008 {
2009         struct ath_softc *sc = hw->priv;
2010         u64 tsf;
2011
2012         mutex_lock(&sc->mutex);
2013         ath9k_ps_wakeup(sc);
2014         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2015         ath9k_ps_restore(sc);
2016         mutex_unlock(&sc->mutex);
2017
2018         return tsf;
2019 }
2020
2021 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2022 {
2023         struct ath_softc *sc = hw->priv;
2024
2025         mutex_lock(&sc->mutex);
2026         ath9k_ps_wakeup(sc);
2027         ath9k_hw_settsf64(sc->sc_ah, tsf);
2028         ath9k_ps_restore(sc);
2029         mutex_unlock(&sc->mutex);
2030 }
2031
2032 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2033 {
2034         struct ath_softc *sc = hw->priv;
2035
2036         mutex_lock(&sc->mutex);
2037
2038         ath9k_ps_wakeup(sc);
2039         ath9k_hw_reset_tsf(sc->sc_ah);
2040         ath9k_ps_restore(sc);
2041
2042         mutex_unlock(&sc->mutex);
2043 }
2044
2045 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2046                               struct ieee80211_vif *vif,
2047                               enum ieee80211_ampdu_mlme_action action,
2048                               struct ieee80211_sta *sta,
2049                               u16 tid, u16 *ssn, u8 buf_size)
2050 {
2051         struct ath_softc *sc = hw->priv;
2052         int ret = 0;
2053
2054         local_bh_disable();
2055
2056         switch (action) {
2057         case IEEE80211_AMPDU_RX_START:
2058                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2059                         ret = -ENOTSUPP;
2060                 break;
2061         case IEEE80211_AMPDU_RX_STOP:
2062                 break;
2063         case IEEE80211_AMPDU_TX_START:
2064                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2065                         return -EOPNOTSUPP;
2066
2067                 ath9k_ps_wakeup(sc);
2068                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2069                 if (!ret)
2070                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2071                 ath9k_ps_restore(sc);
2072                 break;
2073         case IEEE80211_AMPDU_TX_STOP:
2074                 ath9k_ps_wakeup(sc);
2075                 ath_tx_aggr_stop(sc, sta, tid);
2076                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2077                 ath9k_ps_restore(sc);
2078                 break;
2079         case IEEE80211_AMPDU_TX_OPERATIONAL:
2080                 ath9k_ps_wakeup(sc);
2081                 ath_tx_aggr_resume(sc, sta, tid);
2082                 ath9k_ps_restore(sc);
2083                 break;
2084         default:
2085                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2086         }
2087
2088         local_bh_enable();
2089
2090         return ret;
2091 }
2092
2093 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2094                              struct survey_info *survey)
2095 {
2096         struct ath_softc *sc = hw->priv;
2097         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2098         struct ieee80211_supported_band *sband;
2099         struct ieee80211_channel *chan;
2100         unsigned long flags;
2101         int pos;
2102
2103         spin_lock_irqsave(&common->cc_lock, flags);
2104         if (idx == 0)
2105                 ath_update_survey_stats(sc);
2106
2107         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2108         if (sband && idx >= sband->n_channels) {
2109                 idx -= sband->n_channels;
2110                 sband = NULL;
2111         }
2112
2113         if (!sband)
2114                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2115
2116         if (!sband || idx >= sband->n_channels) {
2117                 spin_unlock_irqrestore(&common->cc_lock, flags);
2118                 return -ENOENT;
2119         }
2120
2121         chan = &sband->channels[idx];
2122         pos = chan->hw_value;
2123         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2124         survey->channel = chan;
2125         spin_unlock_irqrestore(&common->cc_lock, flags);
2126
2127         return 0;
2128 }
2129
2130 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2131 {
2132         struct ath_softc *sc = hw->priv;
2133         struct ath_hw *ah = sc->sc_ah;
2134
2135         mutex_lock(&sc->mutex);
2136         ah->coverage_class = coverage_class;
2137         ath9k_hw_init_global_settings(ah);
2138         mutex_unlock(&sc->mutex);
2139 }
2140
2141 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2142 {
2143         struct ath_softc *sc = hw->priv;
2144         struct ath_hw *ah = sc->sc_ah;
2145         struct ath_common *common = ath9k_hw_common(ah);
2146         int timeout = 200; /* ms */
2147         int i, j;
2148
2149         ath9k_ps_wakeup(sc);
2150         mutex_lock(&sc->mutex);
2151
2152         cancel_delayed_work_sync(&sc->tx_complete_work);
2153
2154         if (sc->sc_flags & SC_OP_INVALID) {
2155                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
2156                 mutex_unlock(&sc->mutex);
2157                 return;
2158         }
2159
2160         if (drop)
2161                 timeout = 1;
2162
2163         for (j = 0; j < timeout; j++) {
2164                 int npend = 0;
2165
2166                 if (j)
2167                         usleep_range(1000, 2000);
2168
2169                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2170                         if (!ATH_TXQ_SETUP(sc, i))
2171                                 continue;
2172
2173                         npend += ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2174                 }
2175
2176                 if (!npend)
2177                     goto out;
2178         }
2179
2180         if (!ath_drain_all_txq(sc, false))
2181                 ath_reset(sc, false);
2182
2183         ieee80211_wake_queues(hw);
2184
2185 out:
2186         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2187         mutex_unlock(&sc->mutex);
2188         ath9k_ps_restore(sc);
2189 }
2190
2191 struct ieee80211_ops ath9k_ops = {
2192         .tx                 = ath9k_tx,
2193         .start              = ath9k_start,
2194         .stop               = ath9k_stop,
2195         .add_interface      = ath9k_add_interface,
2196         .change_interface   = ath9k_change_interface,
2197         .remove_interface   = ath9k_remove_interface,
2198         .config             = ath9k_config,
2199         .configure_filter   = ath9k_configure_filter,
2200         .sta_add            = ath9k_sta_add,
2201         .sta_remove         = ath9k_sta_remove,
2202         .conf_tx            = ath9k_conf_tx,
2203         .bss_info_changed   = ath9k_bss_info_changed,
2204         .set_key            = ath9k_set_key,
2205         .get_tsf            = ath9k_get_tsf,
2206         .set_tsf            = ath9k_set_tsf,
2207         .reset_tsf          = ath9k_reset_tsf,
2208         .ampdu_action       = ath9k_ampdu_action,
2209         .get_survey         = ath9k_get_survey,
2210         .rfkill_poll        = ath9k_rfkill_poll_state,
2211         .set_coverage_class = ath9k_set_coverage_class,
2212         .flush              = ath9k_flush,
2213 };