drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  68                                                 struct ieee80211_hw *hw)
  69 {
  70         struct ieee80211_channel *curchan = hw->conf.channel;
  71         struct ath9k_channel *channel;
  72         u8 chan_idx;
  73
  74         chan_idx = curchan->hw_value;
  75         channel = &sc->sc_ah->channels[chan_idx];
  76         ath9k_cmn_update_ichannel(channel, curchan, hw->conf.channel_type);
  77         return channel;
  78 }
  79
  80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath9k_ps_wakeup(struct ath_softc *sc)
  93 {
  94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  95         unsigned long flags;
  96         enum ath9k_power_mode power_mode;
  97
  98         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  99         if (++sc->ps_usecount != 1)
 100                 goto unlock;
 101
 102         power_mode = sc->sc_ah->power_mode;
 103         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 104
 105         /*
 106          * While the hardware is asleep, the cycle counters contain no
 107          * useful data. Better clear them now so that they don't mess up
 108          * survey data results.
 109          */
 110         if (power_mode != ATH9K_PM_AWAKE) {
 111                 spin_lock(&common->cc_lock);
 112                 ath_hw_cycle_counters_update(common);
 113                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 114                 spin_unlock(&common->cc_lock);
 115         }
 116
 117  unlock:
 118         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 119 }
 120
 121 void ath9k_ps_restore(struct ath_softc *sc)
 122 {
 123         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (--sc->ps_usecount != 0)
 128                 goto unlock;
 129
 130         spin_lock(&common->cc_lock);
 131         ath_hw_cycle_counters_update(common);
 132         spin_unlock(&common->cc_lock);
 133
 134         if (sc->ps_idle)
 135                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 136         else if (sc->ps_enabled &&
 137                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 138                               PS_WAIT_FOR_CAB |
 139                               PS_WAIT_FOR_PSPOLL_DATA |
 140                               PS_WAIT_FOR_TX_ACK)))
 141                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 142
 143  unlock:
 144         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 145 }
 146
 147 static void ath_start_ani(struct ath_common *common)
 148 {
 149         struct ath_hw *ah = common->ah;
 150         unsigned long timestamp = jiffies_to_msecs(jiffies);
 151         struct ath_softc *sc = (struct ath_softc *) common->priv;
 152
 153         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 154                 return;
 155
 156         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 157                 return;
 158
 159         common->ani.longcal_timer = timestamp;
 160         common->ani.shortcal_timer = timestamp;
 161         common->ani.checkani_timer = timestamp;
 162
 163         mod_timer(&common->ani.timer,
 164                   jiffies +
 165                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 166 }
 167
 168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 169 {
 170         struct ath_hw *ah = sc->sc_ah;
 171         struct ath9k_channel *chan = &ah->channels[channel];
 172         struct survey_info *survey = &sc->survey[channel];
 173
 174         if (chan->noisefloor) {
 175                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 176                 survey->noise = chan->noisefloor;
 177         }
 178 }
 179
 180 static void ath_update_survey_stats(struct ath_softc *sc)
 181 {
 182         struct ath_hw *ah = sc->sc_ah;
 183         struct ath_common *common = ath9k_hw_common(ah);
 184         int pos = ah->curchan - &ah->channels[0];
 185         struct survey_info *survey = &sc->survey[pos];
 186         struct ath_cycle_counters *cc = &common->cc_survey;
 187         unsigned int div = common->clockrate * 1000;
 188
 189         if (!ah->curchan)
 190                 return;
 191
 192         if (ah->power_mode == ATH9K_PM_AWAKE)
 193                 ath_hw_cycle_counters_update(common);
 194
 195         if (cc->cycles > 0) {
 196                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 197                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 198                         SURVEY_INFO_CHANNEL_TIME_RX |
 199                         SURVEY_INFO_CHANNEL_TIME_TX;
 200                 survey->channel_time += cc->cycles / div;
 201                 survey->channel_time_busy += cc->rx_busy / div;
 202                 survey->channel_time_rx += cc->rx_frame / div;
 203                 survey->channel_time_tx += cc->tx_frame / div;
 204         }
 205         memset(cc, 0, sizeof(*cc));
 206
 207         ath_update_survey_nf(sc, pos);
 208 }
 209
 210 /*
 211  * Set/change channels.  If the channel is really being changed, it's done
 212  * by reseting the chip.  To accomplish this we must first cleanup any pending
 213  * DMA, then restart stuff.
 214 */
 215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 216                     struct ath9k_channel *hchan)
 217 {
 218         struct ath_hw *ah = sc->sc_ah;
 219         struct ath_common *common = ath9k_hw_common(ah);
 220         struct ieee80211_conf *conf = &common->hw->conf;
 221         bool fastcc = true, stopped;
 222         struct ieee80211_channel *channel = hw->conf.channel;
 223         struct ath9k_hw_cal_data *caldata = NULL;
 224         int r;
 225
 226         if (sc->sc_flags & SC_OP_INVALID)
 227                 return -EIO;
 228
 229         del_timer_sync(&common->ani.timer);
 230         cancel_work_sync(&sc->paprd_work);
 231         cancel_work_sync(&sc->hw_check_work);
 232         cancel_delayed_work_sync(&sc->tx_complete_work);
 233         cancel_delayed_work_sync(&sc->hw_pll_work);
 234
 235         ath9k_ps_wakeup(sc);
 236
 237         spin_lock_bh(&sc->sc_pcu_lock);
 238
 239         /*
 240          * This is only performed if the channel settings have
 241          * actually changed.
 242          *
 243          * To switch channels clear any pending DMA operations;
 244          * wait long enough for the RX fifo to drain, reset the
 245          * hardware at the new frequency, and then re-enable
 246          * the relevant bits of the h/w.
 247          */
 248         ath9k_hw_disable_interrupts(ah);
 249         stopped = ath_drain_all_txq(sc, false);
 250
 251         if (!ath_stoprecv(sc))
 252                 stopped = false;
 253
 254         if (!ath9k_hw_check_alive(ah))
 255                 stopped = false;
 256
 257         /* XXX: do not flush receive queue here. We don't want
 258          * to flush data frames already in queue because of
 259          * changing channel. */
 260
 261         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 262                 fastcc = false;
 263
 264         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 265                 caldata = &sc->caldata;
 266
 267         ath_dbg(common, ATH_DBG_CONFIG,
 268                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 269                 sc->sc_ah->curchan->channel,
 270                 channel->center_freq, conf_is_ht40(conf),
 271                 fastcc);
 272
 273         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 274         if (r) {
 275                 ath_err(common,
 276                         "Unable to reset channel (%u MHz), reset status %d\n",
 277                         channel->center_freq, r);
 278                 goto ps_restore;
 279         }
 280
 281         if (ath_startrecv(sc) != 0) {
 282                 ath_err(common, "Unable to restart recv logic\n");
 283                 r = -EIO;
 284                 goto ps_restore;
 285         }
 286
 287         ath_update_txpow(sc);
 288         ath9k_hw_set_interrupts(ah, ah->imask);
 289
 290         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 291                 if (sc->sc_flags & SC_OP_BEACONS)
 292                         ath_beacon_config(sc, NULL);
 293                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 294                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
 295                 ath_start_ani(common);
 296         }
 297
 298  ps_restore:
 299         ieee80211_wake_queues(hw);
 300
 301         spin_unlock_bh(&sc->sc_pcu_lock);
 302
 303         ath9k_ps_restore(sc);
 304         return r;
 305 }
 306
 307 static void ath_paprd_activate(struct ath_softc *sc)
 308 {
 309         struct ath_hw *ah = sc->sc_ah;
 310         struct ath9k_hw_cal_data *caldata = ah->caldata;
 311         struct ath_common *common = ath9k_hw_common(ah);
 312         int chain;
 313
 314         if (!caldata || !caldata->paprd_done)
 315                 return;
 316
 317         ath9k_ps_wakeup(sc);
 318         ar9003_paprd_enable(ah, false);
 319         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 320                 if (!(common->tx_chainmask & BIT(chain)))
 321                         continue;
 322
 323                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 324         }
 325
 326         ar9003_paprd_enable(ah, true);
 327         ath9k_ps_restore(sc);
 328 }
 329
 330 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 331 {
 332         struct ieee80211_hw *hw = sc->hw;
 333         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 334         struct ath_hw *ah = sc->sc_ah;
 335         struct ath_common *common = ath9k_hw_common(ah);
 336         struct ath_tx_control txctl;
 337         int time_left;
 338
 339         memset(&txctl, 0, sizeof(txctl));
 340         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 341
 342         memset(tx_info, 0, sizeof(*tx_info));
 343         tx_info->band = hw->conf.channel->band;
 344         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 345         tx_info->control.rates[0].idx = 0;
 346         tx_info->control.rates[0].count = 1;
 347         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 348         tx_info->control.rates[1].idx = -1;
 349
 350         init_completion(&sc->paprd_complete);
 351         sc->paprd_pending = true;
 352         txctl.paprd = BIT(chain);
 353
 354         if (ath_tx_start(hw, skb, &txctl) != 0) {
 355                 ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
 356                 dev_kfree_skb_any(skb);
 357                 return false;
 358         }
 359
 360         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 361                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 362         sc->paprd_pending = false;
 363
 364         if (!time_left)
 365                 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
 366                         "Timeout waiting for paprd training on TX chain %d\n",
 367                         chain);
 368
 369         return !!time_left;
 370 }
 371
 372 void ath_paprd_calibrate(struct work_struct *work)
 373 {
 374         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 375         struct ieee80211_hw *hw = sc->hw;
 376         struct ath_hw *ah = sc->sc_ah;
 377         struct ieee80211_hdr *hdr;
 378         struct sk_buff *skb = NULL;
 379         struct ath9k_hw_cal_data *caldata = ah->caldata;
 380         struct ath_common *common = ath9k_hw_common(ah);
 381         int ftype;
 382         int chain_ok = 0;
 383         int chain;
 384         int len = 1800;
 385
 386         if (!caldata)
 387                 return;
 388
 389         if (ar9003_paprd_init_table(ah) < 0)
 390                 return;
 391
 392         skb = alloc_skb(len, GFP_KERNEL);
 393         if (!skb)
 394                 return;
 395
 396         skb_put(skb, len);
 397         memset(skb->data, 0, len);
 398         hdr = (struct ieee80211_hdr *)skb->data;
 399         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 400         hdr->frame_control = cpu_to_le16(ftype);
 401         hdr->duration_id = cpu_to_le16(10);
 402         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 403         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 404         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 405
 406         ath9k_ps_wakeup(sc);
 407         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 408                 if (!(common->tx_chainmask & BIT(chain)))
 409                         continue;
 410
 411                 chain_ok = 0;
 412
 413                 ath_dbg(common, ATH_DBG_CALIBRATE,
 414                         "Sending PAPRD frame for thermal measurement "
 415                         "on chain %d\n", chain);
 416                 if (!ath_paprd_send_frame(sc, skb, chain))
 417                         goto fail_paprd;
 418
 419                 ar9003_paprd_setup_gain_table(ah, chain);
 420
 421                 ath_dbg(common, ATH_DBG_CALIBRATE,
 422                         "Sending PAPRD training frame on chain %d\n", chain);
 423                 if (!ath_paprd_send_frame(sc, skb, chain))
 424                         goto fail_paprd;
 425
 426                 if (!ar9003_paprd_is_done(ah))
 427                         break;
 428
 429                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 430                         break;
 431
 432                 chain_ok = 1;
 433         }
 434         kfree_skb(skb);
 435
 436         if (chain_ok) {
 437                 caldata->paprd_done = true;
 438                 ath_paprd_activate(sc);
 439         }
 440
 441 fail_paprd:
 442         ath9k_ps_restore(sc);
 443 }
 444
 445 /*
 446  *  This routine performs the periodic noise floor calibration function
 447  *  that is used to adjust and optimize the chip performance.  This
 448  *  takes environmental changes (location, temperature) into account.
 449  *  When the task is complete, it reschedules itself depending on the
 450  *  appropriate interval that was calculated.
 451  */
 452 void ath_ani_calibrate(unsigned long data)
 453 {
 454         struct ath_softc *sc = (struct ath_softc *)data;
 455         struct ath_hw *ah = sc->sc_ah;
 456         struct ath_common *common = ath9k_hw_common(ah);
 457         bool longcal = false;
 458         bool shortcal = false;
 459         bool aniflag = false;
 460         unsigned int timestamp = jiffies_to_msecs(jiffies);
 461         u32 cal_interval, short_cal_interval, long_cal_interval;
 462         unsigned long flags;
 463
 464         if (ah->caldata && ah->caldata->nfcal_interference)
 465                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 466         else
 467                 long_cal_interval = ATH_LONG_CALINTERVAL;
 468
 469         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 470                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 471
 472         /* Only calibrate if awake */
 473         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 474                 goto set_timer;
 475
 476         ath9k_ps_wakeup(sc);
 477
 478         /* Long calibration runs independently of short calibration. */
 479         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 480                 longcal = true;
 481                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 482                 common->ani.longcal_timer = timestamp;
 483         }
 484
 485         /* Short calibration applies only while caldone is false */
 486         if (!common->ani.caldone) {
 487                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 488                         shortcal = true;
 489                         ath_dbg(common, ATH_DBG_ANI,
 490                                 "shortcal @%lu\n", jiffies);
 491                         common->ani.shortcal_timer = timestamp;
 492                         common->ani.resetcal_timer = timestamp;
 493                 }
 494         } else {
 495                 if ((timestamp - common->ani.resetcal_timer) >=
 496                     ATH_RESTART_CALINTERVAL) {
 497                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 498                         if (common->ani.caldone)
 499                                 common->ani.resetcal_timer = timestamp;
 500                 }
 501         }
 502
 503         /* Verify whether we must check ANI */
 504         if ((timestamp - common->ani.checkani_timer) >=
 505              ah->config.ani_poll_interval) {
 506                 aniflag = true;
 507                 common->ani.checkani_timer = timestamp;
 508         }
 509
 510         /* Skip all processing if there's nothing to do. */
 511         if (longcal || shortcal || aniflag) {
 512                 /* Call ANI routine if necessary */
 513                 if (aniflag) {
 514                         spin_lock_irqsave(&common->cc_lock, flags);
 515                         ath9k_hw_ani_monitor(ah, ah->curchan);
 516                         ath_update_survey_stats(sc);
 517                         spin_unlock_irqrestore(&common->cc_lock, flags);
 518                 }
 519
 520                 /* Perform calibration if necessary */
 521                 if (longcal || shortcal) {
 522                         common->ani.caldone =
 523                                 ath9k_hw_calibrate(ah,
 524                                                    ah->curchan,
 525                                                    common->rx_chainmask,
 526                                                    longcal);
 527                 }
 528         }
 529
 530         ath9k_ps_restore(sc);
 531
 532 set_timer:
 533         /*
 534         * Set timer interval based on previous results.
 535         * The interval must be the shortest necessary to satisfy ANI,
 536         * short calibration and long calibration.
 537         */
 538         cal_interval = ATH_LONG_CALINTERVAL;
 539         if (sc->sc_ah->config.enable_ani)
 540                 cal_interval = min(cal_interval,
 541                                    (u32)ah->config.ani_poll_interval);
 542         if (!common->ani.caldone)
 543                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 544
 545         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 546         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 547                 if (!ah->caldata->paprd_done)
 548                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 549                 else if (!ah->paprd_table_write_done)
 550                         ath_paprd_activate(sc);
 551         }
 552 }
 553
 554 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 555 {
 556         struct ath_node *an;
 557         struct ath_hw *ah = sc->sc_ah;
 558         an = (struct ath_node *)sta->drv_priv;
 559
 560 #ifdef CONFIG_ATH9K_DEBUGFS
 561         spin_lock(&sc->nodes_lock);
 562         list_add(&an->list, &sc->nodes);
 563         spin_unlock(&sc->nodes_lock);
 564         an->sta = sta;
 565 #endif
 566         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 567                 sc->sc_flags |= SC_OP_ENABLE_APM;
 568
 569         if (sc->sc_flags & SC_OP_TXAGGR) {
 570                 ath_tx_node_init(sc, an);
 571                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 572                                      sta->ht_cap.ampdu_factor);
 573                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 574         }
 575 }
 576
 577 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 578 {
 579         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 580
 581 #ifdef CONFIG_ATH9K_DEBUGFS
 582         spin_lock(&sc->nodes_lock);
 583         list_del(&an->list);
 584         spin_unlock(&sc->nodes_lock);
 585         an->sta = NULL;
 586 #endif
 587
 588         if (sc->sc_flags & SC_OP_TXAGGR)
 589                 ath_tx_node_cleanup(sc, an);
 590 }
 591
 592 void ath_hw_check(struct work_struct *work)
 593 {
 594         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 595         int i;
 596
 597         ath9k_ps_wakeup(sc);
 598
 599         for (i = 0; i < 3; i++) {
 600                 if (ath9k_hw_check_alive(sc->sc_ah))
 601                         goto out;
 602
 603                 msleep(1);
 604         }
 605         ath_reset(sc, true);
 606
 607 out:
 608         ath9k_ps_restore(sc);
 609 }
 610
 611 void ath9k_tasklet(unsigned long data)
 612 {
 613         struct ath_softc *sc = (struct ath_softc *)data;
 614         struct ath_hw *ah = sc->sc_ah;
 615         struct ath_common *common = ath9k_hw_common(ah);
 616
 617         u32 status = sc->intrstatus;
 618         u32 rxmask;
 619
 620         if (status & ATH9K_INT_FATAL) {
 621                 ath_reset(sc, true);
 622                 return;
 623         }
 624
 625         ath9k_ps_wakeup(sc);
 626         spin_lock(&sc->sc_pcu_lock);
 627
 628         /*
 629          * Only run the baseband hang check if beacons stop working in AP or
 630          * IBSS mode, because it has a high false positive rate. For station
 631          * mode it should not be necessary, since the upper layers will detect
 632          * this through a beacon miss automatically and the following channel
 633          * change will trigger a hardware reset anyway
 634          */
 635         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
 636             !ath9k_hw_check_alive(ah))
 637                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 638
 639         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 640                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 641                           ATH9K_INT_RXORN);
 642         else
 643                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 644
 645         if (status & rxmask) {
 646                 /* Check for high priority Rx first */
 647                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 648                     (status & ATH9K_INT_RXHP))
 649                         ath_rx_tasklet(sc, 0, true);
 650
 651                 ath_rx_tasklet(sc, 0, false);
 652         }
 653
 654         if (status & ATH9K_INT_TX) {
 655                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 656                         ath_tx_edma_tasklet(sc);
 657                 else
 658                         ath_tx_tasklet(sc);
 659         }
 660
 661         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 662                 /*
 663                  * TSF sync does not look correct; remain awake to sync with
 664                  * the next Beacon.
 665                  */
 666                 ath_dbg(common, ATH_DBG_PS,
 667                         "TSFOOR - Sync with next Beacon\n");
 668                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 669         }
 670
 671         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 672                 if (status & ATH9K_INT_GENTIMER)
 673                         ath_gen_timer_isr(sc->sc_ah);
 674
 675         /* re-enable hardware interrupt */
 676         ath9k_hw_enable_interrupts(ah);
 677
 678         spin_unlock(&sc->sc_pcu_lock);
 679         ath9k_ps_restore(sc);
 680 }
 681
 682 irqreturn_t ath_isr(int irq, void *dev)
 683 {
 684 #define SCHED_INTR (                            \
 685                 ATH9K_INT_FATAL |               \
 686                 ATH9K_INT_RXORN |               \
 687                 ATH9K_INT_RXEOL |               \
 688                 ATH9K_INT_RX |                  \
 689                 ATH9K_INT_RXLP |                \
 690                 ATH9K_INT_RXHP |                \
 691                 ATH9K_INT_TX |                  \
 692                 ATH9K_INT_BMISS |               \
 693                 ATH9K_INT_CST |                 \
 694                 ATH9K_INT_TSFOOR |              \
 695                 ATH9K_INT_GENTIMER)
 696
 697         struct ath_softc *sc = dev;
 698         struct ath_hw *ah = sc->sc_ah;
 699         struct ath_common *common = ath9k_hw_common(ah);
 700         enum ath9k_int status;
 701         bool sched = false;
 702
 703         /*
 704          * The hardware is not ready/present, don't
 705          * touch anything. Note this can happen early
 706          * on if the IRQ is shared.
 707          */
 708         if (sc->sc_flags & SC_OP_INVALID)
 709                 return IRQ_NONE;
 710
 711
 712         /* shared irq, not for us */
 713
 714         if (!ath9k_hw_intrpend(ah))
 715                 return IRQ_NONE;
 716
 717         /*
 718          * Figure out the reason(s) for the interrupt.  Note
 719          * that the hal returns a pseudo-ISR that may include
 720          * bits we haven't explicitly enabled so we mask the
 721          * value to insure we only process bits we requested.
 722          */
 723         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 724         status &= ah->imask;    /* discard unasked-for bits */
 725
 726         /*
 727          * If there are no status bits set, then this interrupt was not
 728          * for me (should have been caught above).
 729          */
 730         if (!status)
 731                 return IRQ_NONE;
 732
 733         /* Cache the status */
 734         sc->intrstatus = status;
 735
 736         if (status & SCHED_INTR)
 737                 sched = true;
 738
 739         /*
 740          * If a FATAL or RXORN interrupt is received, we have to reset the
 741          * chip immediately.
 742          */
 743         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 744             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 745                 goto chip_reset;
 746
 747         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 748             (status & ATH9K_INT_BB_WATCHDOG)) {
 749
 750                 spin_lock(&common->cc_lock);
 751                 ath_hw_cycle_counters_update(common);
 752                 ar9003_hw_bb_watchdog_dbg_info(ah);
 753                 spin_unlock(&common->cc_lock);
 754
 755                 goto chip_reset;
 756         }
 757
 758         if (status & ATH9K_INT_SWBA)
 759                 tasklet_schedule(&sc->bcon_tasklet);
 760
 761         if (status & ATH9K_INT_TXURN)
 762                 ath9k_hw_updatetxtriglevel(ah, true);
 763
 764         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 765                 if (status & ATH9K_INT_RXEOL) {
 766                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 767                         ath9k_hw_set_interrupts(ah, ah->imask);
 768                 }
 769         }
 770
 771         if (status & ATH9K_INT_MIB) {
 772                 /*
 773                  * Disable interrupts until we service the MIB
 774                  * interrupt; otherwise it will continue to
 775                  * fire.
 776                  */
 777                 ath9k_hw_disable_interrupts(ah);
 778                 /*
 779                  * Let the hal handle the event. We assume
 780                  * it will clear whatever condition caused
 781                  * the interrupt.
 782                  */
 783                 spin_lock(&common->cc_lock);
 784                 ath9k_hw_proc_mib_event(ah);
 785                 spin_unlock(&common->cc_lock);
 786                 ath9k_hw_enable_interrupts(ah);
 787         }
 788
 789         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 790                 if (status & ATH9K_INT_TIM_TIMER) {
 791                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 792                                 goto chip_reset;
 793                         /* Clear RxAbort bit so that we can
 794                          * receive frames */
 795                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 796                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 797                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 798                 }
 799
 800 chip_reset:
 801
 802         ath_debug_stat_interrupt(sc, status);
 803
 804         if (sched) {
 805                 /* turn off every interrupt */
 806                 ath9k_hw_disable_interrupts(ah);
 807                 tasklet_schedule(&sc->intr_tq);
 808         }
 809
 810         return IRQ_HANDLED;
 811
 812 #undef SCHED_INTR
 813 }
 814
 815 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 816                                  struct ieee80211_hw *hw,
 817                                  struct ieee80211_vif *vif,
 818                                  struct ieee80211_bss_conf *bss_conf)
 819 {
 820         struct ath_hw *ah = sc->sc_ah;
 821         struct ath_common *common = ath9k_hw_common(ah);
 822
 823         if (bss_conf->assoc) {
 824                 ath_dbg(common, ATH_DBG_CONFIG,
 825                         "Bss Info ASSOC %d, bssid: %pM\n",
 826                         bss_conf->aid, common->curbssid);
 827
 828                 /* New association, store aid */
 829                 common->curaid = bss_conf->aid;
 830                 ath9k_hw_write_associd(ah);
 831
 832                 /*
 833                  * Request a re-configuration of Beacon related timers
 834                  * on the receipt of the first Beacon frame (i.e.,
 835                  * after time sync with the AP).
 836                  */
 837                 sc->ps_flags |= PS_BEACON_SYNC;
 838
 839                 /* Configure the beacon */
 840                 ath_beacon_config(sc, vif);
 841
 842                 /* Reset rssi stats */
 843                 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
 844                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 845
 846                 sc->sc_flags |= SC_OP_ANI_RUN;
 847                 ath_start_ani(common);
 848         } else {
 849                 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 850                 common->curaid = 0;
 851                 /* Stop ANI */
 852                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 853                 del_timer_sync(&common->ani.timer);
 854         }
 855 }
 856
 857 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 858 {
 859         struct ath_hw *ah = sc->sc_ah;
 860         struct ath_common *common = ath9k_hw_common(ah);
 861         struct ieee80211_channel *channel = hw->conf.channel;
 862         int r;
 863
 864         ath9k_ps_wakeup(sc);
 865         spin_lock_bh(&sc->sc_pcu_lock);
 866
 867         ath9k_hw_configpcipowersave(ah, 0, 0);
 868
 869         if (!ah->curchan)
 870                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 871
 872         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 873         if (r) {
 874                 ath_err(common,
 875                         "Unable to reset channel (%u MHz), reset status %d\n",
 876                         channel->center_freq, r);
 877         }
 878
 879         ath_update_txpow(sc);
 880         if (ath_startrecv(sc) != 0) {
 881                 ath_err(common, "Unable to restart recv logic\n");
 882                 goto out;
 883         }
 884         if (sc->sc_flags & SC_OP_BEACONS)
 885                 ath_beacon_config(sc, NULL);    /* restart beacons */
 886
 887         /* Re-Enable  interrupts */
 888         ath9k_hw_set_interrupts(ah, ah->imask);
 889
 890         /* Enable LED */
 891         ath9k_hw_cfg_output(ah, ah->led_pin,
 892                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 893         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 894
 895         ieee80211_wake_queues(hw);
 896 out:
 897         spin_unlock_bh(&sc->sc_pcu_lock);
 898
 899         ath9k_ps_restore(sc);
 900 }
 901
 902 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 903 {
 904         struct ath_hw *ah = sc->sc_ah;
 905         struct ieee80211_channel *channel = hw->conf.channel;
 906         int r;
 907
 908         ath9k_ps_wakeup(sc);
 909         spin_lock_bh(&sc->sc_pcu_lock);
 910
 911         ieee80211_stop_queues(hw);
 912
 913         /*
 914          * Keep the LED on when the radio is disabled
 915          * during idle unassociated state.
 916          */
 917         if (!sc->ps_idle) {
 918                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 919                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 920         }
 921
 922         /* Disable interrupts */
 923         ath9k_hw_disable_interrupts(ah);
 924
 925         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 926
 927         ath_stoprecv(sc);               /* turn off frame recv */
 928         ath_flushrecv(sc);              /* flush recv queue */
 929
 930         if (!ah->curchan)
 931                 ah->curchan = ath_get_curchannel(sc, hw);
 932
 933         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 934         if (r) {
 935                 ath_err(ath9k_hw_common(sc->sc_ah),
 936                         "Unable to reset channel (%u MHz), reset status %d\n",
 937                         channel->center_freq, r);
 938         }
 939
 940         ath9k_hw_phy_disable(ah);
 941
 942         ath9k_hw_configpcipowersave(ah, 1, 1);
 943
 944         spin_unlock_bh(&sc->sc_pcu_lock);
 945         ath9k_ps_restore(sc);
 946 }
 947
 948 int ath_reset(struct ath_softc *sc, bool retry_tx)
 949 {
 950         struct ath_hw *ah = sc->sc_ah;
 951         struct ath_common *common = ath9k_hw_common(ah);
 952         struct ieee80211_hw *hw = sc->hw;
 953         int r;
 954
 955         /* Stop ANI */
 956         del_timer_sync(&common->ani.timer);
 957
 958         ath9k_ps_wakeup(sc);
 959         spin_lock_bh(&sc->sc_pcu_lock);
 960
 961         ieee80211_stop_queues(hw);
 962
 963         ath9k_hw_disable_interrupts(ah);
 964         ath_drain_all_txq(sc, retry_tx);
 965
 966         ath_stoprecv(sc);
 967         ath_flushrecv(sc);
 968
 969         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 970         if (r)
 971                 ath_err(common,
 972                         "Unable to reset hardware; reset status %d\n", r);
 973
 974         if (ath_startrecv(sc) != 0)
 975                 ath_err(common, "Unable to start recv logic\n");
 976
 977         /*
 978          * We may be doing a reset in response to a request
 979          * that changes the channel so update any state that
 980          * might change as a result.
 981          */
 982         ath_update_txpow(sc);
 983
 984         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
 985                 ath_beacon_config(sc, NULL);    /* restart beacons */
 986
 987         ath9k_hw_set_interrupts(ah, ah->imask);
 988
 989         if (retry_tx) {
 990                 int i;
 991                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 992                         if (ATH_TXQ_SETUP(sc, i)) {
 993                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
 994                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
 995                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 996                         }
 997                 }
 998         }
 999
1000         ieee80211_wake_queues(hw);
1001         spin_unlock_bh(&sc->sc_pcu_lock);
1002
1003         /* Start ANI */
1004         ath_start_ani(common);
1005         ath9k_ps_restore(sc);
1006
1007         return r;
1008 }
1009
1010 /**********************/
1011 /* mac80211 callbacks */
1012 /**********************/
1013
1014 static int ath9k_start(struct ieee80211_hw *hw)
1015 {
1016         struct ath_softc *sc = hw->priv;
1017         struct ath_hw *ah = sc->sc_ah;
1018         struct ath_common *common = ath9k_hw_common(ah);
1019         struct ieee80211_channel *curchan = hw->conf.channel;
1020         struct ath9k_channel *init_channel;
1021         int r;
1022
1023         ath_dbg(common, ATH_DBG_CONFIG,
1024                 "Starting driver with initial channel: %d MHz\n",
1025                 curchan->center_freq);
1026
1027         mutex_lock(&sc->mutex);
1028
1029         /* setup initial channel */
1030         sc->chan_idx = curchan->hw_value;
1031
1032         init_channel = ath_get_curchannel(sc, hw);
1033
1034         /* Reset SERDES registers */
1035         ath9k_hw_configpcipowersave(ah, 0, 0);
1036
1037         /*
1038          * The basic interface to setting the hardware in a good
1039          * state is ``reset''.  On return the hardware is known to
1040          * be powered up and with interrupts disabled.  This must
1041          * be followed by initialization of the appropriate bits
1042          * and then setup of the interrupt mask.
1043          */
1044         spin_lock_bh(&sc->sc_pcu_lock);
1045         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1046         if (r) {
1047                 ath_err(common,
1048                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1049                         r, curchan->center_freq);
1050                 spin_unlock_bh(&sc->sc_pcu_lock);
1051                 goto mutex_unlock;
1052         }
1053
1054         /*
1055          * This is needed only to setup initial state
1056          * but it's best done after a reset.
1057          */
1058         ath_update_txpow(sc);
1059
1060         /*
1061          * Setup the hardware after reset:
1062          * The receive engine is set going.
1063          * Frame transmit is handled entirely
1064          * in the frame output path; there's nothing to do
1065          * here except setup the interrupt mask.
1066          */
1067         if (ath_startrecv(sc) != 0) {
1068                 ath_err(common, "Unable to start recv logic\n");
1069                 r = -EIO;
1070                 spin_unlock_bh(&sc->sc_pcu_lock);
1071                 goto mutex_unlock;
1072         }
1073         spin_unlock_bh(&sc->sc_pcu_lock);
1074
1075         /* Setup our intr mask. */
1076         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1077                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1078                     ATH9K_INT_GLOBAL;
1079
1080         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1081                 ah->imask |= ATH9K_INT_RXHP |
1082                              ATH9K_INT_RXLP |
1083                              ATH9K_INT_BB_WATCHDOG;
1084         else
1085                 ah->imask |= ATH9K_INT_RX;
1086
1087         ah->imask |= ATH9K_INT_GTT;
1088
1089         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1090                 ah->imask |= ATH9K_INT_CST;
1091
1092         sc->sc_flags &= ~SC_OP_INVALID;
1093         sc->sc_ah->is_monitoring = false;
1094
1095         /* Disable BMISS interrupt when we're not associated */
1096         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1097         ath9k_hw_set_interrupts(ah, ah->imask);
1098
1099         ieee80211_wake_queues(hw);
1100
1101         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1102
1103         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1104             !ah->btcoex_hw.enabled) {
1105                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1106                                            AR_STOMP_LOW_WLAN_WGHT);
1107                 ath9k_hw_btcoex_enable(ah);
1108
1109                 if (common->bus_ops->bt_coex_prep)
1110                         common->bus_ops->bt_coex_prep(common);
1111                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1112                         ath9k_btcoex_timer_resume(sc);
1113         }
1114
1115         /* User has the option to provide pm-qos value as a module
1116          * parameter rather than using the default value of
1117          * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1118          */
1119         pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1120
1121         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1122                 common->bus_ops->extn_synch_en(common);
1123
1124 mutex_unlock:
1125         mutex_unlock(&sc->mutex);
1126
1127         return r;
1128 }
1129
1130 static int ath9k_tx(struct ieee80211_hw *hw,
1131                     struct sk_buff *skb)
1132 {
1133         struct ath_softc *sc = hw->priv;
1134         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1135         struct ath_tx_control txctl;
1136         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1137
1138         if (sc->ps_enabled) {
1139                 /*
1140                  * mac80211 does not set PM field for normal data frames, so we
1141                  * need to update that based on the current PS mode.
1142                  */
1143                 if (ieee80211_is_data(hdr->frame_control) &&
1144                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1145                     !ieee80211_has_pm(hdr->frame_control)) {
1146                         ath_dbg(common, ATH_DBG_PS,
1147                                 "Add PM=1 for a TX frame while in PS mode\n");
1148                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1149                 }
1150         }
1151
1152         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1153                 /*
1154                  * We are using PS-Poll and mac80211 can request TX while in
1155                  * power save mode. Need to wake up hardware for the TX to be
1156                  * completed and if needed, also for RX of buffered frames.
1157                  */
1158                 ath9k_ps_wakeup(sc);
1159                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1160                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1161                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1162                         ath_dbg(common, ATH_DBG_PS,
1163                                 "Sending PS-Poll to pick a buffered frame\n");
1164                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1165                 } else {
1166                         ath_dbg(common, ATH_DBG_PS,
1167                                 "Wake up to complete TX\n");
1168                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1169                 }
1170                 /*
1171                  * The actual restore operation will happen only after
1172                  * the sc_flags bit is cleared. We are just dropping
1173                  * the ps_usecount here.
1174                  */
1175                 ath9k_ps_restore(sc);
1176         }
1177
1178         memset(&txctl, 0, sizeof(struct ath_tx_control));
1179         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1180
1181         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1182
1183         if (ath_tx_start(hw, skb, &txctl) != 0) {
1184                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1185                 goto exit;
1186         }
1187
1188         return 0;
1189 exit:
1190         dev_kfree_skb_any(skb);
1191         return 0;
1192 }
1193
1194 static void ath9k_stop(struct ieee80211_hw *hw)
1195 {
1196         struct ath_softc *sc = hw->priv;
1197         struct ath_hw *ah = sc->sc_ah;
1198         struct ath_common *common = ath9k_hw_common(ah);
1199
1200         mutex_lock(&sc->mutex);
1201
1202         if (led_blink)
1203                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1204
1205         cancel_delayed_work_sync(&sc->tx_complete_work);
1206         cancel_delayed_work_sync(&sc->hw_pll_work);
1207         cancel_work_sync(&sc->paprd_work);
1208         cancel_work_sync(&sc->hw_check_work);
1209
1210         if (sc->sc_flags & SC_OP_INVALID) {
1211                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1212                 mutex_unlock(&sc->mutex);
1213                 return;
1214         }
1215
1216         /* Ensure HW is awake when we try to shut it down. */
1217         ath9k_ps_wakeup(sc);
1218
1219         if (ah->btcoex_hw.enabled) {
1220                 ath9k_hw_btcoex_disable(ah);
1221                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1222                         ath9k_btcoex_timer_pause(sc);
1223         }
1224
1225         spin_lock_bh(&sc->sc_pcu_lock);
1226
1227         /* prevent tasklets to enable interrupts once we disable them */
1228         ah->imask &= ~ATH9K_INT_GLOBAL;
1229
1230         /* make sure h/w will not generate any interrupt
1231          * before setting the invalid flag. */
1232         ath9k_hw_disable_interrupts(ah);
1233
1234         if (!(sc->sc_flags & SC_OP_INVALID)) {
1235                 ath_drain_all_txq(sc, false);
1236                 ath_stoprecv(sc);
1237                 ath9k_hw_phy_disable(ah);
1238         } else
1239                 sc->rx.rxlink = NULL;
1240
1241         if (sc->rx.frag) {
1242                 dev_kfree_skb_any(sc->rx.frag);
1243                 sc->rx.frag = NULL;
1244         }
1245
1246         /* disable HAL and put h/w to sleep */
1247         ath9k_hw_disable(ah);
1248         ath9k_hw_configpcipowersave(ah, 1, 1);
1249
1250         spin_unlock_bh(&sc->sc_pcu_lock);
1251
1252         /* we can now sync irq and kill any running tasklets, since we already
1253          * disabled interrupts and not holding a spin lock */
1254         synchronize_irq(sc->irq);
1255         tasklet_kill(&sc->intr_tq);
1256         tasklet_kill(&sc->bcon_tasklet);
1257
1258         ath9k_ps_restore(sc);
1259
1260         sc->ps_idle = true;
1261         ath_radio_disable(sc, hw);
1262
1263         sc->sc_flags |= SC_OP_INVALID;
1264
1265         pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1266
1267         mutex_unlock(&sc->mutex);
1268
1269         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1270 }
1271
1272 bool ath9k_uses_beacons(int type)
1273 {
1274         switch (type) {
1275         case NL80211_IFTYPE_AP:
1276         case NL80211_IFTYPE_ADHOC:
1277         case NL80211_IFTYPE_MESH_POINT:
1278                 return true;
1279         default:
1280                 return false;
1281         }
1282 }
1283
1284 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1285                                  struct ieee80211_vif *vif)
1286 {
1287         struct ath_vif *avp = (void *)vif->drv_priv;
1288
1289         /* Disable SWBA interrupt */
1290         sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1291         ath9k_ps_wakeup(sc);
1292         ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1293         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1294         tasklet_kill(&sc->bcon_tasklet);
1295         ath9k_ps_restore(sc);
1296
1297         ath_beacon_return(sc, avp);
1298         sc->sc_flags &= ~SC_OP_BEACONS;
1299
1300         if (sc->nbcnvifs > 0) {
1301                 /* Re-enable beaconing */
1302                 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1303                 ath9k_ps_wakeup(sc);
1304                 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1305                 ath9k_ps_restore(sc);
1306         }
1307 }
1308
1309 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1310 {
1311         struct ath9k_vif_iter_data *iter_data = data;
1312         int i;
1313
1314         if (iter_data->hw_macaddr)
1315                 for (i = 0; i < ETH_ALEN; i++)
1316                         iter_data->mask[i] &=
1317                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1318
1319         switch (vif->type) {
1320         case NL80211_IFTYPE_AP:
1321                 iter_data->naps++;
1322                 break;
1323         case NL80211_IFTYPE_STATION:
1324                 iter_data->nstations++;
1325                 break;
1326         case NL80211_IFTYPE_ADHOC:
1327                 iter_data->nadhocs++;
1328                 break;
1329         case NL80211_IFTYPE_MESH_POINT:
1330                 iter_data->nmeshes++;
1331                 break;
1332         case NL80211_IFTYPE_WDS:
1333                 iter_data->nwds++;
1334                 break;
1335         default:
1336                 iter_data->nothers++;
1337                 break;
1338         }
1339 }
1340
1341 /* Called with sc->mutex held. */
1342 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1343                                struct ieee80211_vif *vif,
1344                                struct ath9k_vif_iter_data *iter_data)
1345 {
1346         struct ath_softc *sc = hw->priv;
1347         struct ath_hw *ah = sc->sc_ah;
1348         struct ath_common *common = ath9k_hw_common(ah);
1349
1350         /*
1351          * Use the hardware MAC address as reference, the hardware uses it
1352          * together with the BSSID mask when matching addresses.
1353          */
1354         memset(iter_data, 0, sizeof(*iter_data));
1355         iter_data->hw_macaddr = common->macaddr;
1356         memset(&iter_data->mask, 0xff, ETH_ALEN);
1357
1358         if (vif)
1359                 ath9k_vif_iter(iter_data, vif->addr, vif);
1360
1361         /* Get list of all active MAC addresses */
1362         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1363                                                    iter_data);
1364 }
1365
1366 /* Called with sc->mutex held. */
1367 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1368                                           struct ieee80211_vif *vif)
1369 {
1370         struct ath_softc *sc = hw->priv;
1371         struct ath_hw *ah = sc->sc_ah;
1372         struct ath_common *common = ath9k_hw_common(ah);
1373         struct ath9k_vif_iter_data iter_data;
1374
1375         ath9k_calculate_iter_data(hw, vif, &iter_data);
1376
1377         /* Set BSSID mask. */
1378         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1379         ath_hw_setbssidmask(common);
1380
1381         /* Set op-mode & TSF */
1382         if (iter_data.naps > 0) {
1383                 ath9k_hw_set_tsfadjust(ah, 1);
1384                 sc->sc_flags |= SC_OP_TSF_RESET;
1385                 ah->opmode = NL80211_IFTYPE_AP;
1386         } else {
1387                 ath9k_hw_set_tsfadjust(ah, 0);
1388                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1389
1390                 if (iter_data.nwds + iter_data.nmeshes)
1391                         ah->opmode = NL80211_IFTYPE_AP;
1392                 else if (iter_data.nadhocs)
1393                         ah->opmode = NL80211_IFTYPE_ADHOC;
1394                 else
1395                         ah->opmode = NL80211_IFTYPE_STATION;
1396         }
1397
1398         /*
1399          * Enable MIB interrupts when there are hardware phy counters.
1400          */
1401         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1402                 if (ah->config.enable_ani)
1403                         ah->imask |= ATH9K_INT_MIB;
1404                 ah->imask |= ATH9K_INT_TSFOOR;
1405         } else {
1406                 ah->imask &= ~ATH9K_INT_MIB;
1407                 ah->imask &= ~ATH9K_INT_TSFOOR;
1408         }
1409
1410         ath9k_hw_set_interrupts(ah, ah->imask);
1411
1412         /* Set up ANI */
1413         if ((iter_data.naps + iter_data.nadhocs) > 0) {
1414                 sc->sc_flags |= SC_OP_ANI_RUN;
1415                 ath_start_ani(common);
1416         } else {
1417                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1418                 del_timer_sync(&common->ani.timer);
1419         }
1420 }
1421
1422 /* Called with sc->mutex held, vif counts set up properly. */
1423 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1424                                    struct ieee80211_vif *vif)
1425 {
1426         struct ath_softc *sc = hw->priv;
1427
1428         ath9k_calculate_summary_state(hw, vif);
1429
1430         if (ath9k_uses_beacons(vif->type)) {
1431                 int error;
1432                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1433                 /* This may fail because upper levels do not have beacons
1434                  * properly configured yet.  That's OK, we assume it
1435                  * will be properly configured and then we will be notified
1436                  * in the info_changed method and set up beacons properly
1437                  * there.
1438                  */
1439                 error = ath_beacon_alloc(sc, vif);
1440                 if (error)
1441                         ath9k_reclaim_beacon(sc, vif);
1442                 else
1443                         ath_beacon_config(sc, vif);
1444         }
1445 }
1446
1447
1448 static int ath9k_add_interface(struct ieee80211_hw *hw,
1449                                struct ieee80211_vif *vif)
1450 {
1451         struct ath_softc *sc = hw->priv;
1452         struct ath_hw *ah = sc->sc_ah;
1453         struct ath_common *common = ath9k_hw_common(ah);
1454         struct ath_vif *avp = (void *)vif->drv_priv;
1455         int ret = 0;
1456
1457         mutex_lock(&sc->mutex);
1458
1459         switch (vif->type) {
1460         case NL80211_IFTYPE_STATION:
1461         case NL80211_IFTYPE_WDS:
1462         case NL80211_IFTYPE_ADHOC:
1463         case NL80211_IFTYPE_AP:
1464         case NL80211_IFTYPE_MESH_POINT:
1465                 break;
1466         default:
1467                 ath_err(common, "Interface type %d not yet supported\n",
1468                         vif->type);
1469                 ret = -EOPNOTSUPP;
1470                 goto out;
1471         }
1472
1473         if (ath9k_uses_beacons(vif->type)) {
1474                 if (sc->nbcnvifs >= ATH_BCBUF) {
1475                         ath_err(common, "Not enough beacon buffers when adding"
1476                                 " new interface of type: %i\n",
1477                                 vif->type);
1478                         ret = -ENOBUFS;
1479                         goto out;
1480                 }
1481         }
1482
1483         if ((vif->type == NL80211_IFTYPE_ADHOC) &&
1484             sc->nvifs > 0) {
1485                 ath_err(common, "Cannot create ADHOC interface when other"
1486                         " interfaces already exist.\n");
1487                 ret = -EINVAL;
1488                 goto out;
1489         }
1490
1491         ath_dbg(common, ATH_DBG_CONFIG,
1492                 "Attach a VIF of type: %d\n", vif->type);
1493
1494         /* Set the VIF opmode */
1495         avp->av_opmode = vif->type;
1496         avp->av_bslot = -1;
1497
1498         sc->nvifs++;
1499
1500         ath9k_do_vif_add_setup(hw, vif);
1501 out:
1502         mutex_unlock(&sc->mutex);
1503         return ret;
1504 }
1505
1506 static int ath9k_change_interface(struct ieee80211_hw *hw,
1507                                   struct ieee80211_vif *vif,
1508                                   enum nl80211_iftype new_type,
1509                                   bool p2p)
1510 {
1511         struct ath_softc *sc = hw->priv;
1512         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1513         int ret = 0;
1514
1515         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1516         mutex_lock(&sc->mutex);
1517
1518         /* See if new interface type is valid. */
1519         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1520             (sc->nvifs > 1)) {
1521                 ath_err(common, "When using ADHOC, it must be the only"
1522                         " interface.\n");
1523                 ret = -EINVAL;
1524                 goto out;
1525         }
1526
1527         if (ath9k_uses_beacons(new_type) &&
1528             !ath9k_uses_beacons(vif->type)) {
1529                 if (sc->nbcnvifs >= ATH_BCBUF) {
1530                         ath_err(common, "No beacon slot available\n");
1531                         ret = -ENOBUFS;
1532                         goto out;
1533                 }
1534         }
1535
1536         /* Clean up old vif stuff */
1537         if (ath9k_uses_beacons(vif->type))
1538                 ath9k_reclaim_beacon(sc, vif);
1539
1540         /* Add new settings */
1541         vif->type = new_type;
1542         vif->p2p = p2p;
1543
1544         ath9k_do_vif_add_setup(hw, vif);
1545 out:
1546         mutex_unlock(&sc->mutex);
1547         return ret;
1548 }
1549
1550 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1551                                    struct ieee80211_vif *vif)
1552 {
1553         struct ath_softc *sc = hw->priv;
1554         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1555
1556         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1557
1558         mutex_lock(&sc->mutex);
1559
1560         sc->nvifs--;
1561
1562         /* Reclaim beacon resources */
1563         if (ath9k_uses_beacons(vif->type))
1564                 ath9k_reclaim_beacon(sc, vif);
1565
1566         ath9k_calculate_summary_state(hw, NULL);
1567
1568         mutex_unlock(&sc->mutex);
1569 }
1570
1571 static void ath9k_enable_ps(struct ath_softc *sc)
1572 {
1573         struct ath_hw *ah = sc->sc_ah;
1574
1575         sc->ps_enabled = true;
1576         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1577                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1578                         ah->imask |= ATH9K_INT_TIM_TIMER;
1579                         ath9k_hw_set_interrupts(ah, ah->imask);
1580                 }
1581                 ath9k_hw_setrxabort(ah, 1);
1582         }
1583 }
1584
1585 static void ath9k_disable_ps(struct ath_softc *sc)
1586 {
1587         struct ath_hw *ah = sc->sc_ah;
1588
1589         sc->ps_enabled = false;
1590         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1591         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1592                 ath9k_hw_setrxabort(ah, 0);
1593                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1594                                   PS_WAIT_FOR_CAB |
1595                                   PS_WAIT_FOR_PSPOLL_DATA |
1596                                   PS_WAIT_FOR_TX_ACK);
1597                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1598                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1599                         ath9k_hw_set_interrupts(ah, ah->imask);
1600                 }
1601         }
1602
1603 }
1604
1605 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1606 {
1607         struct ath_softc *sc = hw->priv;
1608         struct ath_hw *ah = sc->sc_ah;
1609         struct ath_common *common = ath9k_hw_common(ah);
1610         struct ieee80211_conf *conf = &hw->conf;
1611         bool disable_radio = false;
1612
1613         mutex_lock(&sc->mutex);
1614
1615         /*
1616          * Leave this as the first check because we need to turn on the
1617          * radio if it was disabled before prior to processing the rest
1618          * of the changes. Likewise we must only disable the radio towards
1619          * the end.
1620          */
1621         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1622                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1623                 if (!sc->ps_idle) {
1624                         ath_radio_enable(sc, hw);
1625                         ath_dbg(common, ATH_DBG_CONFIG,
1626                                 "not-idle: enabling radio\n");
1627                 } else {
1628                         disable_radio = true;
1629                 }
1630         }
1631
1632         /*
1633          * We just prepare to enable PS. We have to wait until our AP has
1634          * ACK'd our null data frame to disable RX otherwise we'll ignore
1635          * those ACKs and end up retransmitting the same null data frames.
1636          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1637          */
1638         if (changed & IEEE80211_CONF_CHANGE_PS) {
1639                 unsigned long flags;
1640                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1641                 if (conf->flags & IEEE80211_CONF_PS)
1642                         ath9k_enable_ps(sc);
1643                 else
1644                         ath9k_disable_ps(sc);
1645                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1646         }
1647
1648         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1649                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1650                         ath_dbg(common, ATH_DBG_CONFIG,
1651                                 "Monitor mode is enabled\n");
1652                         sc->sc_ah->is_monitoring = true;
1653                 } else {
1654                         ath_dbg(common, ATH_DBG_CONFIG,
1655                                 "Monitor mode is disabled\n");
1656                         sc->sc_ah->is_monitoring = false;
1657                 }
1658         }
1659
1660         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1661                 struct ieee80211_channel *curchan = hw->conf.channel;
1662                 int pos = curchan->hw_value;
1663                 int old_pos = -1;
1664                 unsigned long flags;
1665
1666                 if (ah->curchan)
1667                         old_pos = ah->curchan - &ah->channels[0];
1668
1669                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1670                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1671                 else
1672                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1673
1674                 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1675                         curchan->center_freq);
1676
1677                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1678                                           curchan, conf->channel_type);
1679
1680                 /* update survey stats for the old channel before switching */
1681                 spin_lock_irqsave(&common->cc_lock, flags);
1682                 ath_update_survey_stats(sc);
1683                 spin_unlock_irqrestore(&common->cc_lock, flags);
1684
1685                 /*
1686                  * If the operating channel changes, change the survey in-use flags
1687                  * along with it.
1688                  * Reset the survey data for the new channel, unless we're switching
1689                  * back to the operating channel from an off-channel operation.
1690                  */
1691                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1692                     sc->cur_survey != &sc->survey[pos]) {
1693
1694                         if (sc->cur_survey)
1695                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1696
1697                         sc->cur_survey = &sc->survey[pos];
1698
1699                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1700                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1701                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1702                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1703                 }
1704
1705                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1706                         ath_err(common, "Unable to set channel\n");
1707                         mutex_unlock(&sc->mutex);
1708                         return -EINVAL;
1709                 }
1710
1711                 /*
1712                  * The most recent snapshot of channel->noisefloor for the old
1713                  * channel is only available after the hardware reset. Copy it to
1714                  * the survey stats now.
1715                  */
1716                 if (old_pos >= 0)
1717                         ath_update_survey_nf(sc, old_pos);
1718         }
1719
1720         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1721                 sc->config.txpowlimit = 2 * conf->power_level;
1722                 ath9k_ps_wakeup(sc);
1723                 ath_update_txpow(sc);
1724                 ath9k_ps_restore(sc);
1725         }
1726
1727         if (disable_radio) {
1728                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1729                 ath_radio_disable(sc, hw);
1730         }
1731
1732         mutex_unlock(&sc->mutex);
1733
1734         return 0;
1735 }
1736
1737 #define SUPPORTED_FILTERS                       \
1738         (FIF_PROMISC_IN_BSS |                   \
1739         FIF_ALLMULTI |                          \
1740         FIF_CONTROL |                           \
1741         FIF_PSPOLL |                            \
1742         FIF_OTHER_BSS |                         \
1743         FIF_BCN_PRBRESP_PROMISC |               \
1744         FIF_PROBE_REQ |                         \
1745         FIF_FCSFAIL)
1746
1747 /* FIXME: sc->sc_full_reset ? */
1748 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1749                                    unsigned int changed_flags,
1750                                    unsigned int *total_flags,
1751                                    u64 multicast)
1752 {
1753         struct ath_softc *sc = hw->priv;
1754         u32 rfilt;
1755
1756         changed_flags &= SUPPORTED_FILTERS;
1757         *total_flags &= SUPPORTED_FILTERS;
1758
1759         sc->rx.rxfilter = *total_flags;
1760         ath9k_ps_wakeup(sc);
1761         rfilt = ath_calcrxfilter(sc);
1762         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1763         ath9k_ps_restore(sc);
1764
1765         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1766                 "Set HW RX filter: 0x%x\n", rfilt);
1767 }
1768
1769 static int ath9k_sta_add(struct ieee80211_hw *hw,
1770                          struct ieee80211_vif *vif,
1771                          struct ieee80211_sta *sta)
1772 {
1773         struct ath_softc *sc = hw->priv;
1774
1775         ath_node_attach(sc, sta);
1776
1777         return 0;
1778 }
1779
1780 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1781                             struct ieee80211_vif *vif,
1782                             struct ieee80211_sta *sta)
1783 {
1784         struct ath_softc *sc = hw->priv;
1785
1786         ath_node_detach(sc, sta);
1787
1788         return 0;
1789 }
1790
1791 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1792                          const struct ieee80211_tx_queue_params *params)
1793 {
1794         struct ath_softc *sc = hw->priv;
1795         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1796         struct ath_txq *txq;
1797         struct ath9k_tx_queue_info qi;
1798         int ret = 0;
1799
1800         if (queue >= WME_NUM_AC)
1801                 return 0;
1802
1803         txq = sc->tx.txq_map[queue];
1804
1805         mutex_lock(&sc->mutex);
1806
1807         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1808
1809         qi.tqi_aifs = params->aifs;
1810         qi.tqi_cwmin = params->cw_min;
1811         qi.tqi_cwmax = params->cw_max;
1812         qi.tqi_burstTime = params->txop;
1813
1814         ath_dbg(common, ATH_DBG_CONFIG,
1815                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1816                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1817                 params->cw_max, params->txop);
1818
1819         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1820         if (ret)
1821                 ath_err(common, "TXQ Update failed\n");
1822
1823         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1824                 if (queue == WME_AC_BE && !ret)
1825                         ath_beaconq_config(sc);
1826
1827         mutex_unlock(&sc->mutex);
1828
1829         return ret;
1830 }
1831
1832 static int ath9k_set_key(struct ieee80211_hw *hw,
1833                          enum set_key_cmd cmd,
1834                          struct ieee80211_vif *vif,
1835                          struct ieee80211_sta *sta,
1836                          struct ieee80211_key_conf *key)
1837 {
1838         struct ath_softc *sc = hw->priv;
1839         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1840         int ret = 0;
1841
1842         if (ath9k_modparam_nohwcrypt)
1843                 return -ENOSPC;
1844
1845         mutex_lock(&sc->mutex);
1846         ath9k_ps_wakeup(sc);
1847         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1848
1849         switch (cmd) {
1850         case SET_KEY:
1851                 ret = ath_key_config(common, vif, sta, key);
1852                 if (ret >= 0) {
1853                         key->hw_key_idx = ret;
1854                         /* push IV and Michael MIC generation to stack */
1855                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1856                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1857                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1858                         if (sc->sc_ah->sw_mgmt_crypto &&
1859                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1860                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1861                         ret = 0;
1862                 }
1863                 break;
1864         case DISABLE_KEY:
1865                 ath_key_delete(common, key);
1866                 break;
1867         default:
1868                 ret = -EINVAL;
1869         }
1870
1871         ath9k_ps_restore(sc);
1872         mutex_unlock(&sc->mutex);
1873
1874         return ret;
1875 }
1876
1877 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1878                                    struct ieee80211_vif *vif,
1879                                    struct ieee80211_bss_conf *bss_conf,
1880                                    u32 changed)
1881 {
1882         struct ath_softc *sc = hw->priv;
1883         struct ath_hw *ah = sc->sc_ah;
1884         struct ath_common *common = ath9k_hw_common(ah);
1885         struct ath_vif *avp = (void *)vif->drv_priv;
1886         int slottime;
1887         int error;
1888
1889         mutex_lock(&sc->mutex);
1890
1891         if (changed & BSS_CHANGED_BSSID) {
1892                 /* Set BSSID */
1893                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1894                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1895                 common->curaid = 0;
1896                 ath9k_hw_write_associd(ah);
1897
1898                 /* Set aggregation protection mode parameters */
1899                 sc->config.ath_aggr_prot = 0;
1900
1901                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1902                         common->curbssid, common->curaid);
1903
1904                 /* need to reconfigure the beacon */
1905                 sc->sc_flags &= ~SC_OP_BEACONS ;
1906         }
1907
1908         /* Enable transmission of beacons (AP, IBSS, MESH) */
1909         if ((changed & BSS_CHANGED_BEACON) ||
1910             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1911                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1912                 error = ath_beacon_alloc(sc, vif);
1913                 if (!error)
1914                         ath_beacon_config(sc, vif);
1915         }
1916
1917         if (changed & BSS_CHANGED_ERP_SLOT) {
1918                 if (bss_conf->use_short_slot)
1919                         slottime = 9;
1920                 else
1921                         slottime = 20;
1922                 if (vif->type == NL80211_IFTYPE_AP) {
1923                         /*
1924                          * Defer update, so that connected stations can adjust
1925                          * their settings at the same time.
1926                          * See beacon.c for more details
1927                          */
1928                         sc->beacon.slottime = slottime;
1929                         sc->beacon.updateslot = UPDATE;
1930                 } else {
1931                         ah->slottime = slottime;
1932                         ath9k_hw_init_global_settings(ah);
1933                 }
1934         }
1935
1936         /* Disable transmission of beacons */
1937         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1938                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1939
1940         if (changed & BSS_CHANGED_BEACON_INT) {
1941                 sc->beacon_interval = bss_conf->beacon_int;
1942                 /*
1943                  * In case of AP mode, the HW TSF has to be reset
1944                  * when the beacon interval changes.
1945                  */
1946                 if (vif->type == NL80211_IFTYPE_AP) {
1947                         sc->sc_flags |= SC_OP_TSF_RESET;
1948                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1949                         error = ath_beacon_alloc(sc, vif);
1950                         if (!error)
1951                                 ath_beacon_config(sc, vif);
1952                 } else {
1953                         ath_beacon_config(sc, vif);
1954                 }
1955         }
1956
1957         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1958                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1959                         bss_conf->use_short_preamble);
1960                 if (bss_conf->use_short_preamble)
1961                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1962                 else
1963                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1964         }
1965
1966         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1967                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1968                         bss_conf->use_cts_prot);
1969                 if (bss_conf->use_cts_prot &&
1970                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1971                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1972                 else
1973                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1974         }
1975
1976         if (changed & BSS_CHANGED_ASSOC) {
1977                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1978                         bss_conf->assoc);
1979                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1980         }
1981
1982         mutex_unlock(&sc->mutex);
1983 }
1984
1985 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1986 {
1987         struct ath_softc *sc = hw->priv;
1988         u64 tsf;
1989
1990         mutex_lock(&sc->mutex);
1991         ath9k_ps_wakeup(sc);
1992         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1993         ath9k_ps_restore(sc);
1994         mutex_unlock(&sc->mutex);
1995
1996         return tsf;
1997 }
1998
1999 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2000 {
2001         struct ath_softc *sc = hw->priv;
2002
2003         mutex_lock(&sc->mutex);
2004         ath9k_ps_wakeup(sc);
2005         ath9k_hw_settsf64(sc->sc_ah, tsf);
2006         ath9k_ps_restore(sc);
2007         mutex_unlock(&sc->mutex);
2008 }
2009
2010 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2011 {
2012         struct ath_softc *sc = hw->priv;
2013
2014         mutex_lock(&sc->mutex);
2015
2016         ath9k_ps_wakeup(sc);
2017         ath9k_hw_reset_tsf(sc->sc_ah);
2018         ath9k_ps_restore(sc);
2019
2020         mutex_unlock(&sc->mutex);
2021 }
2022
2023 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2024                               struct ieee80211_vif *vif,
2025                               enum ieee80211_ampdu_mlme_action action,
2026                               struct ieee80211_sta *sta,
2027                               u16 tid, u16 *ssn, u8 buf_size)
2028 {
2029         struct ath_softc *sc = hw->priv;
2030         int ret = 0;
2031
2032         local_bh_disable();
2033
2034         switch (action) {
2035         case IEEE80211_AMPDU_RX_START:
2036                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2037                         ret = -ENOTSUPP;
2038                 break;
2039         case IEEE80211_AMPDU_RX_STOP:
2040                 break;
2041         case IEEE80211_AMPDU_TX_START:
2042                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2043                         return -EOPNOTSUPP;
2044
2045                 ath9k_ps_wakeup(sc);
2046                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2047                 if (!ret)
2048                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2049                 ath9k_ps_restore(sc);
2050                 break;
2051         case IEEE80211_AMPDU_TX_STOP:
2052                 ath9k_ps_wakeup(sc);
2053                 ath_tx_aggr_stop(sc, sta, tid);
2054                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2055                 ath9k_ps_restore(sc);
2056                 break;
2057         case IEEE80211_AMPDU_TX_OPERATIONAL:
2058                 ath9k_ps_wakeup(sc);
2059                 ath_tx_aggr_resume(sc, sta, tid);
2060                 ath9k_ps_restore(sc);
2061                 break;
2062         default:
2063                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2064         }
2065
2066         local_bh_enable();
2067
2068         return ret;
2069 }
2070
2071 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2072                              struct survey_info *survey)
2073 {
2074         struct ath_softc *sc = hw->priv;
2075         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2076         struct ieee80211_supported_band *sband;
2077         struct ieee80211_channel *chan;
2078         unsigned long flags;
2079         int pos;
2080
2081         spin_lock_irqsave(&common->cc_lock, flags);
2082         if (idx == 0)
2083                 ath_update_survey_stats(sc);
2084
2085         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2086         if (sband && idx >= sband->n_channels) {
2087                 idx -= sband->n_channels;
2088                 sband = NULL;
2089         }
2090
2091         if (!sband)
2092                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2093
2094         if (!sband || idx >= sband->n_channels) {
2095                 spin_unlock_irqrestore(&common->cc_lock, flags);
2096                 return -ENOENT;
2097         }
2098
2099         chan = &sband->channels[idx];
2100         pos = chan->hw_value;
2101         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2102         survey->channel = chan;
2103         spin_unlock_irqrestore(&common->cc_lock, flags);
2104
2105         return 0;
2106 }
2107
2108 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2109 {
2110         struct ath_softc *sc = hw->priv;
2111         struct ath_hw *ah = sc->sc_ah;
2112
2113         mutex_lock(&sc->mutex);
2114         ah->coverage_class = coverage_class;
2115         ath9k_hw_init_global_settings(ah);
2116         mutex_unlock(&sc->mutex);
2117 }
2118
2119 struct ieee80211_ops ath9k_ops = {
2120         .tx                 = ath9k_tx,
2121         .start              = ath9k_start,
2122         .stop               = ath9k_stop,
2123         .add_interface      = ath9k_add_interface,
2124         .change_interface   = ath9k_change_interface,
2125         .remove_interface   = ath9k_remove_interface,
2126         .config             = ath9k_config,
2127         .configure_filter   = ath9k_configure_filter,
2128         .sta_add            = ath9k_sta_add,
2129         .sta_remove         = ath9k_sta_remove,
2130         .conf_tx            = ath9k_conf_tx,
2131         .bss_info_changed   = ath9k_bss_info_changed,
2132         .set_key            = ath9k_set_key,
2133         .get_tsf            = ath9k_get_tsf,
2134         .set_tsf            = ath9k_set_tsf,
2135         .reset_tsf          = ath9k_reset_tsf,
2136         .ampdu_action       = ath9k_ampdu_action,
2137         .get_survey         = ath9k_get_survey,
2138         .rfkill_poll        = ath9k_rfkill_poll_state,
2139         .set_coverage_class = ath9k_set_coverage_class,
2140 };