2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <net/mac80211.h>
23 #include <linux/leds.h>
31 /* Macro to expand scalars to 64-bit objects */
33 #define ito64(x) (sizeof(x) == 8) ? \
34 (((unsigned long long int)(x)) & (0xff)) : \
36 (((unsigned long long int)(x)) & 0xffff) : \
37 ((sizeof(x) == 32) ? \
38 (((unsigned long long int)(x)) & 0xffffffff) : \
39 (unsigned long long int)(x))
41 /* increment with wrap-around */
42 #define INCR(_l, _sz) do { \
44 (_l) &= ((_sz) - 1); \
47 /* decrement with wrap-around */
48 #define DECR(_l, _sz) do { \
50 (_l) &= ((_sz) - 1); \
53 #define A_MAX(a, b) ((a) > (b) ? (a) : (b))
55 #define ASSERT(exp) BUG_ON(!(exp))
57 #define TSF_TO_TU(_h,_l) \
58 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
60 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
62 static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
70 /*************************/
71 /* Descriptor Management */
72 /*************************/
74 #define ATH_TXBUF_RESET(_bf) do { \
75 (_bf)->bf_stale = false; \
76 (_bf)->bf_lastbf = NULL; \
77 (_bf)->bf_next = NULL; \
78 memset(&((_bf)->bf_state), 0, \
79 sizeof(struct ath_buf_state)); \
82 #define ATH_RXBUF_RESET(_bf) do { \
83 (_bf)->bf_stale = false; \
87 * enum buffer_type - Buffer type flags
89 * @BUF_HT: Send this buffer using HT capabilities
90 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
91 * @BUF_AGGR: Indicates whether the buffer can be aggregated
92 * (used in aggregation scheduling)
93 * @BUF_RETRY: Indicates whether the buffer is retried
94 * @BUF_XRETRY: To denote excessive retries of the buffer
104 struct ath_buf_state {
113 enum ath9k_key_type bfs_keytype;
116 #define bf_nframes bf_state.bfs_nframes
117 #define bf_al bf_state.bfs_al
118 #define bf_frmlen bf_state.bfs_frmlen
119 #define bf_retries bf_state.bfs_retries
120 #define bf_seqno bf_state.bfs_seqno
121 #define bf_tidno bf_state.bfs_tidno
122 #define bf_keyix bf_state.bfs_keyix
123 #define bf_keytype bf_state.bfs_keytype
124 #define bf_isht(bf) (bf->bf_state.bf_type & BUF_HT)
125 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
126 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
127 #define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY)
128 #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
131 struct list_head list;
132 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
134 struct ath_buf *bf_next; /* next subframe in the aggregate */
135 struct sk_buff *bf_mpdu; /* enclosing frame structure */
136 struct ath_desc *bf_desc; /* virtual addr of desc */
137 dma_addr_t bf_daddr; /* physical addr of desc */
138 dma_addr_t bf_buf_addr; /* physical addr of data buffer */
141 struct ath_buf_state bf_state;
142 dma_addr_t bf_dmacontext;
146 struct ath_desc *dd_desc;
147 dma_addr_t dd_desc_paddr;
149 struct ath_buf *dd_bufptr;
152 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
153 struct list_head *head, const char *name,
154 int nbuf, int ndesc);
155 void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
156 struct list_head *head);
162 #define ATH_MAX_ANTENNA 3
163 #define ATH_RXBUF 512
164 #define WME_NUM_TID 16
165 #define ATH_TXBUF 512
166 #define ATH_TXMAXTRY 13
167 #define ATH_MGT_TXMAXTRY 4
168 #define WME_BA_BMP_SIZE 64
169 #define WME_MAX_BA WME_BA_BMP_SIZE
170 #define ATH_TID_MAX_BUFS (2 * WME_MAX_BA)
172 #define TID_TO_WME_AC(_tid) \
173 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
174 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
175 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
184 #define ADDBA_EXCHANGE_ATTEMPTS 10
185 #define ATH_AGGR_DELIM_SZ 4
186 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
187 /* number of delimiters for encryption padding */
188 #define ATH_AGGR_ENCRYPTDELIM 10
189 /* minimum h/w qdepth to be sustained to maximize aggregation */
190 #define ATH_AGGR_MIN_QDEPTH 2
191 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
192 #define ATH_AMPDU_LIMIT_MAX (64 * 1024 - 1)
194 #define IEEE80211_SEQ_SEQ_SHIFT 4
195 #define IEEE80211_SEQ_MAX 4096
196 #define IEEE80211_WEP_IVLEN 3
197 #define IEEE80211_WEP_KIDLEN 1
198 #define IEEE80211_WEP_CRCLEN 4
199 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
200 (IEEE80211_WEP_IVLEN + \
201 IEEE80211_WEP_KIDLEN + \
202 IEEE80211_WEP_CRCLEN))
204 /* return whether a bit at index _n in bitmap _bm is set
205 * _sz is the size of the bitmap */
206 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
207 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
209 /* return block-ack bitmap index given sequence and starting sequence */
210 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
212 /* returns delimiter padding required given the packet length */
213 #define ATH_AGGR_GET_NDELIM(_len) \
214 (((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ? \
215 (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2)
217 #define BAW_WITHIN(_start, _bawsz, _seqno) \
218 ((((_seqno) - (_start)) & 4095) < (_bawsz))
220 #define ATH_DS_BA_SEQ(_ds) ((_ds)->ds_us.tx.ts_seqnum)
221 #define ATH_DS_BA_BITMAP(_ds) (&(_ds)->ds_us.tx.ba_low)
222 #define ATH_DS_TX_BA(_ds) ((_ds)->ds_us.tx.ts_flags & ATH9K_TX_BA)
223 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
225 #define ATH_TX_COMPLETE_POLL_INT 1000
227 enum ATH_AGGR_STATUS {
236 struct list_head axq_q;
241 bool axq_tx_inprogress;
242 struct ath_buf *axq_linkbuf;
244 /* first desc of the last descriptor that contains CTS */
245 struct ath_desc *axq_lastdsWithCTS;
247 /* final desc of the gating desc that determines whether
248 lastdsWithCTS has been DMA'ed or not */
249 struct ath_desc *axq_gatingds;
251 struct list_head axq_acq;
254 #define AGGR_CLEANUP BIT(1)
255 #define AGGR_ADDBA_COMPLETE BIT(2)
256 #define AGGR_ADDBA_PROGRESS BIT(3)
259 struct list_head list;
260 struct list_head buf_q;
262 struct ath_atx_ac *ac;
263 struct ath_buf *tx_buf[ATH_TID_MAX_BUFS];
268 int baw_head; /* first un-acked tx buffer */
269 int baw_tail; /* next unused tx buffer slot */
278 struct list_head list;
279 struct list_head tid_q;
282 struct ath_tx_control {
285 enum ath9k_internal_frame_type frame_type;
288 #define ATH_TX_ERROR 0x01
289 #define ATH_TX_XRETRY 0x02
290 #define ATH_TX_BAR 0x04
292 #define ATH_RSSI_LPF_LEN 10
293 #define RSSI_LPF_THRESHOLD -20
294 #define ATH9K_RSSI_BAD 0x80
295 #define ATH_RSSI_EP_MULTIPLIER (1<<7)
296 #define ATH_EP_MUL(x, mul) ((x) * (mul))
297 #define ATH_RSSI_IN(x) (ATH_EP_MUL((x), ATH_RSSI_EP_MULTIPLIER))
298 #define ATH_LPF_RSSI(x, y, len) \
299 ((x != ATH_RSSI_DUMMY_MARKER) ? (((x) * ((len) - 1) + (y)) / (len)) : (y))
300 #define ATH_RSSI_LPF(x, y) do { \
301 if ((y) >= RSSI_LPF_THRESHOLD) \
302 x = ATH_LPF_RSSI((x), ATH_RSSI_IN((y)), ATH_RSSI_LPF_LEN); \
304 #define ATH_EP_RND(x, mul) \
305 ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
308 struct ath_softc *an_sc;
309 struct ath_atx_tid tid[WME_NUM_TID];
310 struct ath_atx_ac ac[WME_NUM_AC];
319 int hwq_map[ATH9K_WME_AC_VO+1];
320 spinlock_t txbuflock;
321 struct list_head txbuf;
322 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
323 struct ath_descdma txdma;
331 unsigned int rxfilter;
332 spinlock_t rxflushlock;
333 spinlock_t rxbuflock;
334 struct list_head rxbuf;
335 struct ath_descdma rxdma;
338 int ath_startrecv(struct ath_softc *sc);
339 bool ath_stoprecv(struct ath_softc *sc);
340 void ath_flushrecv(struct ath_softc *sc);
341 u32 ath_calcrxfilter(struct ath_softc *sc);
342 int ath_rx_init(struct ath_softc *sc, int nbufs);
343 void ath_rx_cleanup(struct ath_softc *sc);
344 int ath_rx_tasklet(struct ath_softc *sc, int flush);
345 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
346 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
347 int ath_tx_setup(struct ath_softc *sc, int haltype);
348 void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
349 void ath_draintxq(struct ath_softc *sc,
350 struct ath_txq *txq, bool retry_tx);
351 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
352 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
353 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
354 int ath_tx_init(struct ath_softc *sc, int nbufs);
355 void ath_tx_cleanup(struct ath_softc *sc);
356 struct ath_txq *ath_test_get_txq(struct ath_softc *sc, struct sk_buff *skb);
357 int ath_txq_update(struct ath_softc *sc, int qnum,
358 struct ath9k_tx_queue_info *q);
359 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
360 struct ath_tx_control *txctl);
361 void ath_tx_tasklet(struct ath_softc *sc);
362 void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb);
363 bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno);
364 void ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
366 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
367 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
375 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
376 enum nl80211_iftype av_opmode;
377 struct ath_buf *av_bcbuf;
378 struct ath_tx_control av_btxctl;
379 u8 bssid[ETH_ALEN]; /* current BSSID from config_interface */
382 /*******************/
383 /* Beacon Handling */
384 /*******************/
387 * Regardless of the number of beacons we stagger, (i.e. regardless of the
388 * number of BSSIDs) if a given beacon does not go out even after waiting this
389 * number of beacon intervals, the game's up.
391 #define BSTUCK_THRESH (9 * ATH_BCBUF)
393 #define ATH_DEFAULT_BINTVAL 100 /* TU */
394 #define ATH_DEFAULT_BMISS_LIMIT 10
395 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
397 struct ath_beacon_config {
407 OK, /* no change needed */
408 UPDATE, /* update pending */
409 COMMIT /* beacon sent, commit change */
410 } updateslot; /* slot time update fsm */
416 struct ieee80211_vif *bslot[ATH_BCBUF];
417 struct ath_wiphy *bslot_aphy[ATH_BCBUF];
420 struct ath9k_tx_queue_info beacon_qi;
421 struct ath_descdma bdma;
422 struct ath_txq *cabq;
423 struct list_head bbuf;
426 void ath_beacon_tasklet(unsigned long data);
427 void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
428 int ath_beaconq_setup(struct ath_hw *ah);
429 int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif);
430 void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
436 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
437 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
438 #define ATH_ANI_POLLINTERVAL 100 /* 100 ms */
439 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
440 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
445 unsigned int longcal_timer;
446 unsigned int shortcal_timer;
447 unsigned int resetcal_timer;
448 unsigned int checkani_timer;
449 struct timer_list timer;
452 /********************/
454 /********************/
456 #define ATH_LED_PIN 1
457 #define ATH_LED_ON_DURATION_IDLE 350 /* in msecs */
458 #define ATH_LED_OFF_DURATION_IDLE 250 /* in msecs */
468 struct ath_softc *sc;
469 struct led_classdev led_cdev;
470 enum ath_led_type led_type;
475 /********************/
476 /* Main driver core */
477 /********************/
480 * Default cache line size, in bytes.
481 * Used when PCI device not fully initialized by bootrom/BIOS
483 #define DEFAULT_CACHELINE 32
484 #define ATH_DEFAULT_NOISE_FLOOR -95
485 #define ATH_REGCLASSIDS_MAX 10
486 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
487 #define ATH_MAX_SW_RETRIES 10
488 #define ATH_CHAN_MAX 255
489 #define IEEE80211_WEP_NKID 4 /* number of key ids */
492 * The key cache is used for h/w cipher state and also for
493 * tracking station state such as the current tx antenna.
494 * We also setup a mapping table between key cache slot indices
495 * and station state to short-circuit node lookups on rx.
496 * Different parts have different size key caches. We handle
497 * up to ATH_KEYMAX entries (could dynamically allocate state).
499 #define ATH_KEYMAX 128 /* max key cache size we handle */
501 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
502 #define ATH_RSSI_DUMMY_MARKER 0x127
503 #define ATH_RATE_DUMMY_MARKER 0
505 #define SC_OP_INVALID BIT(0)
506 #define SC_OP_BEACONS BIT(1)
507 #define SC_OP_RXAGGR BIT(2)
508 #define SC_OP_TXAGGR BIT(3)
509 #define SC_OP_FULL_RESET BIT(4)
510 #define SC_OP_PREAMBLE_SHORT BIT(5)
511 #define SC_OP_PROTECT_ENABLE BIT(6)
512 #define SC_OP_RXFLUSH BIT(7)
513 #define SC_OP_LED_ASSOCIATED BIT(8)
514 #define SC_OP_WAIT_FOR_BEACON BIT(12)
515 #define SC_OP_LED_ON BIT(13)
516 #define SC_OP_SCANNING BIT(14)
517 #define SC_OP_TSF_RESET BIT(15)
518 #define SC_OP_WAIT_FOR_CAB BIT(16)
519 #define SC_OP_WAIT_FOR_PSPOLL_DATA BIT(17)
520 #define SC_OP_WAIT_FOR_TX_ACK BIT(18)
521 #define SC_OP_BEACON_SYNC BIT(19)
524 void (*read_cachesize)(struct ath_softc *sc, int *csz);
525 void (*cleanup)(struct ath_softc *sc);
526 bool (*eeprom_read)(struct ath_hw *ah, u32 off, u16 *data);
532 struct ieee80211_hw *hw;
535 spinlock_t wiphy_lock; /* spinlock to protect ath_wiphy data */
536 struct ath_wiphy *pri_wiphy;
537 struct ath_wiphy **sec_wiphy; /* secondary wiphys (virtual radios); may
538 * have NULL entries */
539 int num_sec_wiphy; /* number of sec_wiphy pointers in the array */
542 struct ath_wiphy *next_wiphy;
543 struct work_struct chan_work;
544 int wiphy_select_failures;
545 unsigned long wiphy_select_first_fail;
546 struct delayed_work wiphy_work;
547 unsigned long wiphy_scheduler_int;
548 int wiphy_scheduler_index;
550 struct tasklet_struct intr_tq;
551 struct tasklet_struct bcon_tasklet;
552 struct ath_hw *sc_ah;
555 spinlock_t sc_resetlock;
556 spinlock_t sc_serial_rw;
558 spinlock_t sc_pm_lock;
561 u8 curbssid[ETH_ALEN];
562 u8 bssidmask[ETH_ALEN];
564 u32 sc_flags; /* SC_OP_* */
573 DECLARE_BITMAP(keymap, ATH_KEYMAX);
576 unsigned long ps_usecount;
577 enum ath9k_int imask;
578 enum ath9k_ht_extprotspacing ht_extprotspacing;
579 enum ath9k_ht_macmode tx_chan_width;
581 struct ath_config config;
584 struct ath_beacon beacon;
585 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX];
586 const struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX];
587 const struct ath_rate_table *cur_rate_table;
588 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
590 struct ath_led radio_led;
591 struct ath_led assoc_led;
592 struct ath_led tx_led;
593 struct ath_led rx_led;
594 struct delayed_work ath_led_blink_work;
596 int led_off_duration;
603 struct ath9k_node_stats nodestats;
604 #ifdef CONFIG_ATH9K_DEBUG
605 struct ath9k_debug debug;
607 struct ath_bus_ops *bus_ops;
608 struct ath_beacon_config cur_beacon_conf;
609 struct delayed_work tx_complete_work;
613 struct ath_softc *sc; /* shared for all virtual wiphys */
614 struct ieee80211_hw *hw;
615 enum ath_wiphy_state {
626 int ath_reset(struct ath_softc *sc, bool retry_tx);
627 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc);
628 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc);
629 int ath_cabq_update(struct ath_softc *);
631 static inline void ath_read_cachesize(struct ath_softc *sc, int *csz)
633 sc->bus_ops->read_cachesize(sc, csz);
636 static inline void ath_bus_cleanup(struct ath_softc *sc)
638 sc->bus_ops->cleanup(sc);
641 extern struct ieee80211_ops ath9k_ops;
643 irqreturn_t ath_isr(int irq, void *dev);
644 void ath_cleanup(struct ath_softc *sc);
645 int ath_init_device(u16 devid, struct ath_softc *sc);
646 void ath_detach(struct ath_softc *sc);
647 const char *ath_mac_bb_name(u32 mac_bb_version);
648 const char *ath_rf_name(u16 rf_version);
649 void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
650 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
651 struct ath9k_channel *ichan);
652 void ath_update_chainmask(struct ath_softc *sc, int is_ht);
653 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
654 struct ath9k_channel *hchan);
655 void ath_radio_enable(struct ath_softc *sc);
656 void ath_radio_disable(struct ath_softc *sc);
659 int ath_pci_init(void);
660 void ath_pci_exit(void);
662 static inline int ath_pci_init(void) { return 0; };
663 static inline void ath_pci_exit(void) {};
666 #ifdef CONFIG_ATHEROS_AR71XX
667 int ath_ahb_init(void);
668 void ath_ahb_exit(void);
670 static inline int ath_ahb_init(void) { return 0; };
671 static inline void ath_ahb_exit(void) {};
674 void ath9k_ps_wakeup(struct ath_softc *sc);
675 void ath9k_ps_restore(struct ath_softc *sc);
677 void ath9k_set_bssid_mask(struct ieee80211_hw *hw);
678 int ath9k_wiphy_add(struct ath_softc *sc);
679 int ath9k_wiphy_del(struct ath_wiphy *aphy);
680 void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb);
681 int ath9k_wiphy_pause(struct ath_wiphy *aphy);
682 int ath9k_wiphy_unpause(struct ath_wiphy *aphy);
683 int ath9k_wiphy_select(struct ath_wiphy *aphy);
684 void ath9k_wiphy_set_scheduler(struct ath_softc *sc, unsigned int msec_int);
685 void ath9k_wiphy_chan_work(struct work_struct *work);
686 bool ath9k_wiphy_started(struct ath_softc *sc);
687 void ath9k_wiphy_pause_all_forced(struct ath_softc *sc,
688 struct ath_wiphy *selected);
689 bool ath9k_wiphy_scanning(struct ath_softc *sc);
690 void ath9k_wiphy_work(struct work_struct *work);
691 bool ath9k_all_wiphys_idle(struct ath_softc *sc);
693 void ath9k_iowrite32(struct ath_hw *ah, u32 reg_offset, u32 val);
694 unsigned int ath9k_ioread32(struct ath_hw *ah, u32 reg_offset);