2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 // #define DEBUG // error path messages, extra info
24 // #define VERBOSE // more; success messages
26 #include <linux/module.h>
27 #include <linux/kmod.h>
28 #include <linux/init.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/ethtool.h>
32 #include <linux/workqueue.h>
33 #include <linux/mii.h>
34 #include <linux/usb.h>
35 #include <linux/crc32.h>
36 #include <linux/usb/usbnet.h>
37 #include <linux/slab.h>
38 #include <linux/if_vlan.h>
40 #define DRIVER_VERSION "08-Nov-2011"
41 #define DRIVER_NAME "asix"
43 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
45 #define AX_CMD_SET_SW_MII 0x06
46 #define AX_CMD_READ_MII_REG 0x07
47 #define AX_CMD_WRITE_MII_REG 0x08
48 #define AX_CMD_SET_HW_MII 0x0a
49 #define AX_CMD_READ_EEPROM 0x0b
50 #define AX_CMD_WRITE_EEPROM 0x0c
51 #define AX_CMD_WRITE_ENABLE 0x0d
52 #define AX_CMD_WRITE_DISABLE 0x0e
53 #define AX_CMD_READ_RX_CTL 0x0f
54 #define AX_CMD_WRITE_RX_CTL 0x10
55 #define AX_CMD_READ_IPG012 0x11
56 #define AX_CMD_WRITE_IPG0 0x12
57 #define AX_CMD_WRITE_IPG1 0x13
58 #define AX_CMD_READ_NODE_ID 0x13
59 #define AX_CMD_WRITE_NODE_ID 0x14
60 #define AX_CMD_WRITE_IPG2 0x14
61 #define AX_CMD_WRITE_MULTI_FILTER 0x16
62 #define AX88172_CMD_READ_NODE_ID 0x17
63 #define AX_CMD_READ_PHY_ID 0x19
64 #define AX_CMD_READ_MEDIUM_STATUS 0x1a
65 #define AX_CMD_WRITE_MEDIUM_MODE 0x1b
66 #define AX_CMD_READ_MONITOR_MODE 0x1c
67 #define AX_CMD_WRITE_MONITOR_MODE 0x1d
68 #define AX_CMD_READ_GPIOS 0x1e
69 #define AX_CMD_WRITE_GPIOS 0x1f
70 #define AX_CMD_SW_RESET 0x20
71 #define AX_CMD_SW_PHY_STATUS 0x21
72 #define AX_CMD_SW_PHY_SELECT 0x22
74 #define AX_MONITOR_MODE 0x01
75 #define AX_MONITOR_LINK 0x02
76 #define AX_MONITOR_MAGIC 0x04
77 #define AX_MONITOR_HSFS 0x10
79 /* AX88172 Medium Status Register values */
80 #define AX88172_MEDIUM_FD 0x02
81 #define AX88172_MEDIUM_TX 0x04
82 #define AX88172_MEDIUM_FC 0x10
83 #define AX88172_MEDIUM_DEFAULT \
84 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
86 #define AX_MCAST_FILTER_SIZE 8
87 #define AX_MAX_MCAST 64
89 #define AX_SWRESET_CLEAR 0x00
90 #define AX_SWRESET_RR 0x01
91 #define AX_SWRESET_RT 0x02
92 #define AX_SWRESET_PRTE 0x04
93 #define AX_SWRESET_PRL 0x08
94 #define AX_SWRESET_BZ 0x10
95 #define AX_SWRESET_IPRL 0x20
96 #define AX_SWRESET_IPPD 0x40
98 #define AX88772_IPG0_DEFAULT 0x15
99 #define AX88772_IPG1_DEFAULT 0x0c
100 #define AX88772_IPG2_DEFAULT 0x12
102 /* AX88772 & AX88178 Medium Mode Register */
103 #define AX_MEDIUM_PF 0x0080
104 #define AX_MEDIUM_JFE 0x0040
105 #define AX_MEDIUM_TFC 0x0020
106 #define AX_MEDIUM_RFC 0x0010
107 #define AX_MEDIUM_ENCK 0x0008
108 #define AX_MEDIUM_AC 0x0004
109 #define AX_MEDIUM_FD 0x0002
110 #define AX_MEDIUM_GM 0x0001
111 #define AX_MEDIUM_SM 0x1000
112 #define AX_MEDIUM_SBP 0x0800
113 #define AX_MEDIUM_PS 0x0200
114 #define AX_MEDIUM_RE 0x0100
116 #define AX88178_MEDIUM_DEFAULT \
117 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
118 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
121 #define AX88772_MEDIUM_DEFAULT \
122 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
123 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
124 AX_MEDIUM_AC | AX_MEDIUM_RE)
126 /* AX88772 & AX88178 RX_CTL values */
127 #define AX_RX_CTL_SO 0x0080
128 #define AX_RX_CTL_AP 0x0020
129 #define AX_RX_CTL_AM 0x0010
130 #define AX_RX_CTL_AB 0x0008
131 #define AX_RX_CTL_SEP 0x0004
132 #define AX_RX_CTL_AMALL 0x0002
133 #define AX_RX_CTL_PRO 0x0001
134 #define AX_RX_CTL_MFB_2048 0x0000
135 #define AX_RX_CTL_MFB_4096 0x0100
136 #define AX_RX_CTL_MFB_8192 0x0200
137 #define AX_RX_CTL_MFB_16384 0x0300
139 #define AX_DEFAULT_RX_CTL (AX_RX_CTL_SO | AX_RX_CTL_AB)
141 /* GPIO 0 .. 2 toggles */
142 #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
143 #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
144 #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
145 #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
146 #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
147 #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
148 #define AX_GPIO_RESERVED 0x40 /* Reserved */
149 #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
151 #define AX_EEPROM_MAGIC 0xdeadbeef
152 #define AX88172_EEPROM_LEN 0x40
153 #define AX88772_EEPROM_LEN 0xff
155 #define PHY_MODE_MARVELL 0x0000
156 #define MII_MARVELL_LED_CTRL 0x0018
157 #define MII_MARVELL_STATUS 0x001b
158 #define MII_MARVELL_CTRL 0x0014
160 #define MARVELL_LED_MANUAL 0x0019
162 #define MARVELL_STATUS_HWCFG 0x0004
164 #define MARVELL_CTRL_TXDELAY 0x0002
165 #define MARVELL_CTRL_RXDELAY 0x0080
167 #define PHY_MODE_RTL8211CL 0x000C
169 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
171 u8 multi_filter[AX_MCAST_FILTER_SIZE];
172 u8 mac_addr[ETH_ALEN];
178 struct ax88172_int_data {
186 static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
187 u16 size, void *data)
192 netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
193 cmd, value, index, size);
195 buf = kmalloc(size, GFP_KERNEL);
199 err = usb_control_msg(
201 usb_rcvctrlpipe(dev->udev, 0),
203 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
208 USB_CTRL_GET_TIMEOUT);
210 memcpy(data, buf, size);
219 static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
220 u16 size, void *data)
225 netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
226 cmd, value, index, size);
229 buf = kmemdup(data, size, GFP_KERNEL);
234 err = usb_control_msg(
236 usb_sndctrlpipe(dev->udev, 0),
238 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
243 USB_CTRL_SET_TIMEOUT);
250 static void asix_async_cmd_callback(struct urb *urb)
252 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
253 int status = urb->status;
256 printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
264 asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
265 u16 size, void *data)
267 struct usb_ctrlrequest *req;
271 netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
272 cmd, value, index, size);
274 urb = usb_alloc_urb(0, GFP_ATOMIC);
276 netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n");
280 req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC);
282 netdev_err(dev->net, "Failed to allocate memory for control request\n");
287 req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
289 req->wValue = cpu_to_le16(value);
290 req->wIndex = cpu_to_le16(index);
291 req->wLength = cpu_to_le16(size);
293 usb_fill_control_urb(urb, dev->udev,
294 usb_sndctrlpipe(dev->udev, 0),
295 (void *)req, data, size,
296 asix_async_cmd_callback, req);
298 status = usb_submit_urb(urb, GFP_ATOMIC);
300 netdev_err(dev->net, "Error submitting the control message: status=%d\n",
307 static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
312 struct sk_buff *ax_skb;
315 head = (u8 *) skb->data;
316 memcpy(&header, head, sizeof(header));
317 le32_to_cpus(&header);
318 packet = head + sizeof(header);
322 while (skb->len > 0) {
323 if ((header & 0x07ff) != ((~header >> 16) & 0x07ff))
324 netdev_err(dev->net, "asix_rx_fixup() Bad Header Length\n");
326 /* get the packet length */
327 size = (u16) (header & 0x000007ff);
329 if ((skb->len) - ((size + 1) & 0xfffe) == 0) {
330 u8 alignment = (unsigned long)skb->data & 0x3;
331 if (alignment != 0x2) {
333 * not 16bit aligned so use the room provided by
334 * the 32 bit header to align the data
336 * note we want 16bit alignment as MAC header is
337 * 14bytes thus ip header will be aligned on
338 * 32bit boundary so accessing ipheader elements
339 * using a cast to struct ip header wont cause
340 * an unaligned accesses.
342 u8 realignment = (alignment + 2) & 0x3;
343 memmove(skb->data - realignment,
346 skb->data -= realignment;
347 skb_set_tail_pointer(skb, size);
352 if (size > dev->net->mtu + ETH_HLEN + VLAN_HLEN) {
353 netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n",
357 ax_skb = skb_clone(skb, GFP_ATOMIC);
359 u8 alignment = (unsigned long)packet & 0x3;
362 if (alignment != 0x2) {
364 * not 16bit aligned use the room provided by
365 * the 32 bit header to align the data
367 u8 realignment = (alignment + 2) & 0x3;
368 memmove(packet - realignment, packet, size);
369 packet -= realignment;
371 ax_skb->data = packet;
372 skb_set_tail_pointer(ax_skb, size);
373 usbnet_skb_return(dev, ax_skb);
378 skb_pull(skb, (size + 1) & 0xfffe);
380 if (skb->len < sizeof(header))
383 head = (u8 *) skb->data;
384 memcpy(&header, head, sizeof(header));
385 le32_to_cpus(&header);
386 packet = head + sizeof(header);
391 netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d\n",
398 static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
402 int headroom = skb_headroom(skb);
403 int tailroom = skb_tailroom(skb);
405 u32 padbytes = 0xffff0000;
407 padlen = ((skb->len + 4) & (dev->maxpacket - 1)) ? 0 : 4;
409 if ((!skb_cloned(skb)) &&
410 ((headroom + tailroom) >= (4 + padlen))) {
411 if ((headroom < 4) || (tailroom < padlen)) {
412 skb->data = memmove(skb->head + 4, skb->data, skb->len);
413 skb_set_tail_pointer(skb, skb->len);
416 struct sk_buff *skb2;
417 skb2 = skb_copy_expand(skb, 4, padlen, flags);
418 dev_kfree_skb_any(skb);
425 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
426 cpu_to_le32s(&packet_len);
427 skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len));
430 cpu_to_le32s(&padbytes);
431 memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes));
432 skb_put(skb, sizeof(padbytes));
437 static void asix_status(struct usbnet *dev, struct urb *urb)
439 struct ax88172_int_data *event;
442 if (urb->actual_length < 8)
445 event = urb->transfer_buffer;
446 link = event->link & 0x01;
447 if (netif_carrier_ok(dev->net) != link) {
449 netif_carrier_on(dev->net);
450 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
452 netif_carrier_off(dev->net);
453 netdev_dbg(dev->net, "Link Status is: %d\n", link);
457 static inline int asix_set_sw_mii(struct usbnet *dev)
460 ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
462 netdev_err(dev->net, "Failed to enable software MII access\n");
466 static inline int asix_set_hw_mii(struct usbnet *dev)
469 ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
471 netdev_err(dev->net, "Failed to enable hardware MII access\n");
475 static inline int asix_get_phy_addr(struct usbnet *dev)
478 int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
480 netdev_dbg(dev->net, "asix_get_phy_addr()\n");
483 netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret);
486 netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n",
494 static int asix_sw_reset(struct usbnet *dev, u8 flags)
498 ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
500 netdev_err(dev->net, "Failed to send software reset: %02x\n", ret);
505 static u16 asix_read_rx_ctl(struct usbnet *dev)
508 int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v);
511 netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret);
514 ret = le16_to_cpu(v);
519 static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
523 netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode);
524 ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
526 netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n",
532 static u16 asix_read_medium_status(struct usbnet *dev)
535 int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
538 netdev_err(dev->net, "Error reading Medium Status register: %02x\n",
540 return ret; /* TODO: callers not checking for error ret */
543 return le16_to_cpu(v);
547 static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
551 netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode);
552 ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
554 netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n",
560 static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
564 netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value);
565 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
567 netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n",
577 * AX88772 & AX88178 have a 16-bit RX_CTL value
579 static void asix_set_multicast(struct net_device *net)
581 struct usbnet *dev = netdev_priv(net);
582 struct asix_data *data = (struct asix_data *)&dev->data;
583 u16 rx_ctl = AX_DEFAULT_RX_CTL;
585 if (net->flags & IFF_PROMISC) {
586 rx_ctl |= AX_RX_CTL_PRO;
587 } else if (net->flags & IFF_ALLMULTI ||
588 netdev_mc_count(net) > AX_MAX_MCAST) {
589 rx_ctl |= AX_RX_CTL_AMALL;
590 } else if (netdev_mc_empty(net)) {
591 /* just broadcast and directed */
593 /* We use the 20 byte dev->data
594 * for our 8 byte filter buffer
595 * to avoid allocating memory that
596 * is tricky to free later */
597 struct netdev_hw_addr *ha;
600 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
602 /* Build the multicast hash filter. */
603 netdev_for_each_mc_addr(ha, net) {
604 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
605 data->multi_filter[crc_bits >> 3] |=
609 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
610 AX_MCAST_FILTER_SIZE, data->multi_filter);
612 rx_ctl |= AX_RX_CTL_AM;
615 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
618 static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
620 struct usbnet *dev = netdev_priv(netdev);
623 mutex_lock(&dev->phy_mutex);
624 asix_set_sw_mii(dev);
625 asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
626 (__u16)loc, 2, &res);
627 asix_set_hw_mii(dev);
628 mutex_unlock(&dev->phy_mutex);
630 netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n",
631 phy_id, loc, le16_to_cpu(res));
633 return le16_to_cpu(res);
637 asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
639 struct usbnet *dev = netdev_priv(netdev);
640 __le16 res = cpu_to_le16(val);
642 netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n",
644 mutex_lock(&dev->phy_mutex);
645 asix_set_sw_mii(dev);
646 asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
647 asix_set_hw_mii(dev);
648 mutex_unlock(&dev->phy_mutex);
651 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
652 static u32 asix_get_phyid(struct usbnet *dev)
658 /* Poll for the rare case the FW or phy isn't ready yet. */
659 for (i = 0; i < 100; i++) {
660 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
661 if (phy_reg != 0 && phy_reg != 0xFFFF)
666 if (phy_reg <= 0 || phy_reg == 0xFFFF)
669 phy_id = (phy_reg & 0xffff) << 16;
671 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
675 phy_id |= (phy_reg & 0xffff);
681 asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
683 struct usbnet *dev = netdev_priv(net);
686 if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
687 wolinfo->supported = 0;
688 wolinfo->wolopts = 0;
691 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
692 wolinfo->wolopts = 0;
696 asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
698 struct usbnet *dev = netdev_priv(net);
701 if (wolinfo->wolopts & WAKE_PHY)
702 opt |= AX_MONITOR_LINK;
703 if (wolinfo->wolopts & WAKE_MAGIC)
704 opt |= AX_MONITOR_MAGIC;
706 if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
707 opt, 0, 0, NULL) < 0)
713 static int asix_get_eeprom_len(struct net_device *net)
715 struct usbnet *dev = netdev_priv(net);
716 struct asix_data *data = (struct asix_data *)&dev->data;
718 return data->eeprom_len;
721 static int asix_get_eeprom(struct net_device *net,
722 struct ethtool_eeprom *eeprom, u8 *data)
724 struct usbnet *dev = netdev_priv(net);
725 __le16 *ebuf = (__le16 *)data;
728 /* Crude hack to ensure that we don't overwrite memory
729 * if an odd length is supplied
734 eeprom->magic = AX_EEPROM_MAGIC;
736 /* ax8817x returns 2 bytes from eeprom on read */
737 for (i=0; i < eeprom->len / 2; i++) {
738 if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
739 eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
745 static void asix_get_drvinfo (struct net_device *net,
746 struct ethtool_drvinfo *info)
748 struct usbnet *dev = netdev_priv(net);
749 struct asix_data *data = (struct asix_data *)&dev->data;
751 /* Inherit standard device info */
752 usbnet_get_drvinfo(net, info);
753 strncpy (info->driver, DRIVER_NAME, sizeof info->driver);
754 strncpy (info->version, DRIVER_VERSION, sizeof info->version);
755 info->eedump_len = data->eeprom_len;
758 static u32 asix_get_link(struct net_device *net)
760 struct usbnet *dev = netdev_priv(net);
762 return mii_link_ok(&dev->mii);
765 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
767 struct usbnet *dev = netdev_priv(net);
769 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
772 static int asix_set_mac_address(struct net_device *net, void *p)
774 struct usbnet *dev = netdev_priv(net);
775 struct asix_data *data = (struct asix_data *)&dev->data;
776 struct sockaddr *addr = p;
778 if (netif_running(net))
780 if (!is_valid_ether_addr(addr->sa_data))
781 return -EADDRNOTAVAIL;
783 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
785 /* We use the 20 byte dev->data
786 * for our 6 byte mac buffer
787 * to avoid allocating memory that
788 * is tricky to free later */
789 memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);
790 asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
796 /* We need to override some ethtool_ops so we require our
797 own structure so we don't interfere with other usbnet
798 devices that may be connected at the same time. */
799 static const struct ethtool_ops ax88172_ethtool_ops = {
800 .get_drvinfo = asix_get_drvinfo,
801 .get_link = asix_get_link,
802 .get_msglevel = usbnet_get_msglevel,
803 .set_msglevel = usbnet_set_msglevel,
804 .get_wol = asix_get_wol,
805 .set_wol = asix_set_wol,
806 .get_eeprom_len = asix_get_eeprom_len,
807 .get_eeprom = asix_get_eeprom,
808 .get_settings = usbnet_get_settings,
809 .set_settings = usbnet_set_settings,
810 .nway_reset = usbnet_nway_reset,
813 static void ax88172_set_multicast(struct net_device *net)
815 struct usbnet *dev = netdev_priv(net);
816 struct asix_data *data = (struct asix_data *)&dev->data;
819 if (net->flags & IFF_PROMISC) {
821 } else if (net->flags & IFF_ALLMULTI ||
822 netdev_mc_count(net) > AX_MAX_MCAST) {
824 } else if (netdev_mc_empty(net)) {
825 /* just broadcast and directed */
827 /* We use the 20 byte dev->data
828 * for our 8 byte filter buffer
829 * to avoid allocating memory that
830 * is tricky to free later */
831 struct netdev_hw_addr *ha;
834 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
836 /* Build the multicast hash filter. */
837 netdev_for_each_mc_addr(ha, net) {
838 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
839 data->multi_filter[crc_bits >> 3] |=
843 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
844 AX_MCAST_FILTER_SIZE, data->multi_filter);
849 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
852 static int ax88172_link_reset(struct usbnet *dev)
855 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
857 mii_check_media(&dev->mii, 1, 1);
858 mii_ethtool_gset(&dev->mii, &ecmd);
859 mode = AX88172_MEDIUM_DEFAULT;
861 if (ecmd.duplex != DUPLEX_FULL)
862 mode |= ~AX88172_MEDIUM_FD;
864 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
865 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
867 asix_write_medium_mode(dev, mode);
872 static const struct net_device_ops ax88172_netdev_ops = {
873 .ndo_open = usbnet_open,
874 .ndo_stop = usbnet_stop,
875 .ndo_start_xmit = usbnet_start_xmit,
876 .ndo_tx_timeout = usbnet_tx_timeout,
877 .ndo_change_mtu = usbnet_change_mtu,
878 .ndo_set_mac_address = eth_mac_addr,
879 .ndo_validate_addr = eth_validate_addr,
880 .ndo_do_ioctl = asix_ioctl,
881 .ndo_set_rx_mode = ax88172_set_multicast,
884 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
889 unsigned long gpio_bits = dev->driver_info->data;
890 struct asix_data *data = (struct asix_data *)&dev->data;
892 data->eeprom_len = AX88172_EEPROM_LEN;
894 usbnet_get_endpoints(dev,intf);
896 /* Toggle the GPIOs in a manufacturer/model specific way */
897 for (i = 2; i >= 0; i--) {
898 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
899 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL);
905 ret = asix_write_rx_ctl(dev, 0x80);
909 /* Get the MAC address */
910 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
912 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
915 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
917 /* Initialize MII structure */
918 dev->mii.dev = dev->net;
919 dev->mii.mdio_read = asix_mdio_read;
920 dev->mii.mdio_write = asix_mdio_write;
921 dev->mii.phy_id_mask = 0x3f;
922 dev->mii.reg_num_mask = 0x1f;
923 dev->mii.phy_id = asix_get_phy_addr(dev);
925 dev->net->netdev_ops = &ax88172_netdev_ops;
926 dev->net->ethtool_ops = &ax88172_ethtool_ops;
928 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
929 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
930 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
931 mii_nway_restart(&dev->mii);
939 static const struct ethtool_ops ax88772_ethtool_ops = {
940 .get_drvinfo = asix_get_drvinfo,
941 .get_link = asix_get_link,
942 .get_msglevel = usbnet_get_msglevel,
943 .set_msglevel = usbnet_set_msglevel,
944 .get_wol = asix_get_wol,
945 .set_wol = asix_set_wol,
946 .get_eeprom_len = asix_get_eeprom_len,
947 .get_eeprom = asix_get_eeprom,
948 .get_settings = usbnet_get_settings,
949 .set_settings = usbnet_set_settings,
950 .nway_reset = usbnet_nway_reset,
953 static int ax88772_link_reset(struct usbnet *dev)
956 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
958 mii_check_media(&dev->mii, 1, 1);
959 mii_ethtool_gset(&dev->mii, &ecmd);
960 mode = AX88772_MEDIUM_DEFAULT;
962 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
963 mode &= ~AX_MEDIUM_PS;
965 if (ecmd.duplex != DUPLEX_FULL)
966 mode &= ~AX_MEDIUM_FD;
968 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
969 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
971 asix_write_medium_mode(dev, mode);
976 static int ax88772_reset(struct usbnet *dev)
978 struct asix_data *data = (struct asix_data *)&dev->data;
982 ret = asix_write_gpio(dev,
983 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5);
987 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
989 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
991 dbg("Select PHY #1 failed: %d", ret);
995 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
1001 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
1008 ret = asix_sw_reset(dev, AX_SWRESET_IPRL);
1012 ret = asix_sw_reset(dev, AX_SWRESET_PRTE);
1018 rx_ctl = asix_read_rx_ctl(dev);
1019 dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
1020 ret = asix_write_rx_ctl(dev, 0x0000);
1024 rx_ctl = asix_read_rx_ctl(dev);
1025 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
1027 ret = asix_sw_reset(dev, AX_SWRESET_PRL);
1033 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL);
1039 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
1040 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1041 ADVERTISE_ALL | ADVERTISE_CSMA);
1042 mii_nway_restart(&dev->mii);
1044 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT);
1048 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
1049 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
1050 AX88772_IPG2_DEFAULT, 0, NULL);
1052 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
1056 /* Rewrite MAC address */
1057 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
1058 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
1063 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
1064 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
1068 rx_ctl = asix_read_rx_ctl(dev);
1069 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1071 rx_ctl = asix_read_medium_status(dev);
1072 dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1081 static const struct net_device_ops ax88772_netdev_ops = {
1082 .ndo_open = usbnet_open,
1083 .ndo_stop = usbnet_stop,
1084 .ndo_start_xmit = usbnet_start_xmit,
1085 .ndo_tx_timeout = usbnet_tx_timeout,
1086 .ndo_change_mtu = usbnet_change_mtu,
1087 .ndo_set_mac_address = asix_set_mac_address,
1088 .ndo_validate_addr = eth_validate_addr,
1089 .ndo_do_ioctl = asix_ioctl,
1090 .ndo_set_rx_mode = asix_set_multicast,
1093 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
1096 struct asix_data *data = (struct asix_data *)&dev->data;
1100 data->eeprom_len = AX88772_EEPROM_LEN;
1102 usbnet_get_endpoints(dev,intf);
1104 /* Get the MAC address */
1105 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
1107 dbg("Failed to read MAC address: %d", ret);
1110 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1112 /* Initialize MII structure */
1113 dev->mii.dev = dev->net;
1114 dev->mii.mdio_read = asix_mdio_read;
1115 dev->mii.mdio_write = asix_mdio_write;
1116 dev->mii.phy_id_mask = 0x1f;
1117 dev->mii.reg_num_mask = 0x1f;
1118 dev->mii.phy_id = asix_get_phy_addr(dev);
1120 dev->net->netdev_ops = &ax88772_netdev_ops;
1121 dev->net->ethtool_ops = &ax88772_ethtool_ops;
1123 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
1125 /* Reset the PHY to normal operation mode */
1126 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
1128 dbg("Select PHY #1 failed: %d", ret);
1132 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
1138 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
1144 ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE);
1146 /* Read PHYID register *AFTER* the PHY was reset properly */
1147 phyid = asix_get_phyid(dev);
1148 dbg("PHYID=0x%08x", phyid);
1150 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1151 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1152 /* hard_mtu is still the default - the device does not support
1154 dev->rx_urb_size = 2048;
1160 static struct ethtool_ops ax88178_ethtool_ops = {
1161 .get_drvinfo = asix_get_drvinfo,
1162 .get_link = asix_get_link,
1163 .get_msglevel = usbnet_get_msglevel,
1164 .set_msglevel = usbnet_set_msglevel,
1165 .get_wol = asix_get_wol,
1166 .set_wol = asix_set_wol,
1167 .get_eeprom_len = asix_get_eeprom_len,
1168 .get_eeprom = asix_get_eeprom,
1169 .get_settings = usbnet_get_settings,
1170 .set_settings = usbnet_set_settings,
1171 .nway_reset = usbnet_nway_reset,
1174 static int marvell_phy_init(struct usbnet *dev)
1176 struct asix_data *data = (struct asix_data *)&dev->data;
1179 netdev_dbg(dev->net, "marvell_phy_init()\n");
1181 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
1182 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
1184 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1185 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
1187 if (data->ledmode) {
1188 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1189 MII_MARVELL_LED_CTRL);
1190 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
1193 reg |= (1 + 0x0100);
1194 asix_mdio_write(dev->net, dev->mii.phy_id,
1195 MII_MARVELL_LED_CTRL, reg);
1197 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1198 MII_MARVELL_LED_CTRL);
1199 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
1206 static int rtl8211cl_phy_init(struct usbnet *dev)
1208 struct asix_data *data = (struct asix_data *)&dev->data;
1210 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
1212 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
1213 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
1214 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
1215 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
1216 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1218 if (data->ledmode == 12) {
1219 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
1220 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
1221 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1227 static int marvell_led_status(struct usbnet *dev, u16 speed)
1229 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1231 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
1233 /* Clear out the center LED bits - 0x03F0 */
1247 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
1248 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1253 static int ax88178_reset(struct usbnet *dev)
1255 struct asix_data *data = (struct asix_data *)&dev->data;
1262 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
1263 dbg("GPIO Status: 0x%04x", status);
1265 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1266 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1267 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1269 dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1271 if (eeprom == cpu_to_le16(0xffff)) {
1272 data->phymode = PHY_MODE_MARVELL;
1276 data->phymode = le16_to_cpu(eeprom) & 0x7F;
1277 data->ledmode = le16_to_cpu(eeprom) >> 8;
1278 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
1280 dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
1282 /* Power up external GigaPHY through AX88178 GPIO pin */
1283 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
1284 if ((le16_to_cpu(eeprom) >> 8) != 1) {
1285 asix_write_gpio(dev, 0x003c, 30);
1286 asix_write_gpio(dev, 0x001c, 300);
1287 asix_write_gpio(dev, 0x003c, 30);
1289 dbg("gpio phymode == 1 path");
1290 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1291 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1294 /* Read PHYID register *AFTER* powering up PHY */
1295 phyid = asix_get_phyid(dev);
1296 dbg("PHYID=0x%08x", phyid);
1298 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
1299 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL);
1301 asix_sw_reset(dev, 0);
1304 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1307 asix_write_rx_ctl(dev, 0);
1309 if (data->phymode == PHY_MODE_MARVELL) {
1310 marvell_phy_init(dev);
1312 } else if (data->phymode == PHY_MODE_RTL8211CL)
1313 rtl8211cl_phy_init(dev);
1315 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1316 BMCR_RESET | BMCR_ANENABLE);
1317 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1318 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1319 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1320 ADVERTISE_1000FULL);
1322 mii_nway_restart(&dev->mii);
1324 ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT);
1328 /* Rewrite MAC address */
1329 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
1330 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
1335 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
1342 static int ax88178_link_reset(struct usbnet *dev)
1345 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
1346 struct asix_data *data = (struct asix_data *)&dev->data;
1349 netdev_dbg(dev->net, "ax88178_link_reset()\n");
1351 mii_check_media(&dev->mii, 1, 1);
1352 mii_ethtool_gset(&dev->mii, &ecmd);
1353 mode = AX88178_MEDIUM_DEFAULT;
1354 speed = ethtool_cmd_speed(&ecmd);
1356 if (speed == SPEED_1000)
1357 mode |= AX_MEDIUM_GM;
1358 else if (speed == SPEED_100)
1359 mode |= AX_MEDIUM_PS;
1361 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1363 mode |= AX_MEDIUM_ENCK;
1365 if (ecmd.duplex == DUPLEX_FULL)
1366 mode |= AX_MEDIUM_FD;
1368 mode &= ~AX_MEDIUM_FD;
1370 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
1371 speed, ecmd.duplex, mode);
1373 asix_write_medium_mode(dev, mode);
1375 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1376 marvell_led_status(dev, speed);
1381 static void ax88178_set_mfb(struct usbnet *dev)
1383 u16 mfb = AX_RX_CTL_MFB_16384;
1386 int old_rx_urb_size = dev->rx_urb_size;
1388 if (dev->hard_mtu < 2048) {
1389 dev->rx_urb_size = 2048;
1390 mfb = AX_RX_CTL_MFB_2048;
1391 } else if (dev->hard_mtu < 4096) {
1392 dev->rx_urb_size = 4096;
1393 mfb = AX_RX_CTL_MFB_4096;
1394 } else if (dev->hard_mtu < 8192) {
1395 dev->rx_urb_size = 8192;
1396 mfb = AX_RX_CTL_MFB_8192;
1397 } else if (dev->hard_mtu < 16384) {
1398 dev->rx_urb_size = 16384;
1399 mfb = AX_RX_CTL_MFB_16384;
1402 rxctl = asix_read_rx_ctl(dev);
1403 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1405 medium = asix_read_medium_status(dev);
1406 if (dev->net->mtu > 1500)
1407 medium |= AX_MEDIUM_JFE;
1409 medium &= ~AX_MEDIUM_JFE;
1410 asix_write_medium_mode(dev, medium);
1412 if (dev->rx_urb_size > old_rx_urb_size)
1413 usbnet_unlink_rx_urbs(dev);
1416 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1418 struct usbnet *dev = netdev_priv(net);
1419 int ll_mtu = new_mtu + net->hard_header_len + 4;
1421 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
1423 if (new_mtu <= 0 || ll_mtu > 16384)
1426 if ((ll_mtu % dev->maxpacket) == 0)
1430 dev->hard_mtu = net->mtu + net->hard_header_len;
1431 ax88178_set_mfb(dev);
1436 static const struct net_device_ops ax88178_netdev_ops = {
1437 .ndo_open = usbnet_open,
1438 .ndo_stop = usbnet_stop,
1439 .ndo_start_xmit = usbnet_start_xmit,
1440 .ndo_tx_timeout = usbnet_tx_timeout,
1441 .ndo_set_mac_address = asix_set_mac_address,
1442 .ndo_validate_addr = eth_validate_addr,
1443 .ndo_set_rx_mode = asix_set_multicast,
1444 .ndo_do_ioctl = asix_ioctl,
1445 .ndo_change_mtu = ax88178_change_mtu,
1448 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1452 struct asix_data *data = (struct asix_data *)&dev->data;
1454 data->eeprom_len = AX88772_EEPROM_LEN;
1456 usbnet_get_endpoints(dev,intf);
1458 /* Get the MAC address */
1459 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
1461 dbg("Failed to read MAC address: %d", ret);
1464 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1466 /* Initialize MII structure */
1467 dev->mii.dev = dev->net;
1468 dev->mii.mdio_read = asix_mdio_read;
1469 dev->mii.mdio_write = asix_mdio_write;
1470 dev->mii.phy_id_mask = 0x1f;
1471 dev->mii.reg_num_mask = 0xff;
1472 dev->mii.supports_gmii = 1;
1473 dev->mii.phy_id = asix_get_phy_addr(dev);
1475 dev->net->netdev_ops = &ax88178_netdev_ops;
1476 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1478 /* Blink LEDS so users know driver saw dongle */
1479 asix_sw_reset(dev, 0);
1482 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1485 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1486 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1487 /* hard_mtu is still the default - the device does not support
1489 dev->rx_urb_size = 2048;
1495 static const struct driver_info ax8817x_info = {
1496 .description = "ASIX AX8817x USB 2.0 Ethernet",
1497 .bind = ax88172_bind,
1498 .status = asix_status,
1499 .link_reset = ax88172_link_reset,
1500 .reset = ax88172_link_reset,
1501 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1505 static const struct driver_info dlink_dub_e100_info = {
1506 .description = "DLink DUB-E100 USB Ethernet",
1507 .bind = ax88172_bind,
1508 .status = asix_status,
1509 .link_reset = ax88172_link_reset,
1510 .reset = ax88172_link_reset,
1511 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1515 static const struct driver_info netgear_fa120_info = {
1516 .description = "Netgear FA-120 USB Ethernet",
1517 .bind = ax88172_bind,
1518 .status = asix_status,
1519 .link_reset = ax88172_link_reset,
1520 .reset = ax88172_link_reset,
1521 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1525 static const struct driver_info hawking_uf200_info = {
1526 .description = "Hawking UF200 USB Ethernet",
1527 .bind = ax88172_bind,
1528 .status = asix_status,
1529 .link_reset = ax88172_link_reset,
1530 .reset = ax88172_link_reset,
1531 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1535 static const struct driver_info ax88772_info = {
1536 .description = "ASIX AX88772 USB 2.0 Ethernet",
1537 .bind = ax88772_bind,
1538 .status = asix_status,
1539 .link_reset = ax88772_link_reset,
1540 .reset = ax88772_reset,
1541 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1542 .rx_fixup = asix_rx_fixup,
1543 .tx_fixup = asix_tx_fixup,
1546 static const struct driver_info ax88178_info = {
1547 .description = "ASIX AX88178 USB 2.0 Ethernet",
1548 .bind = ax88178_bind,
1549 .status = asix_status,
1550 .link_reset = ax88178_link_reset,
1551 .reset = ax88178_reset,
1552 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1553 .rx_fixup = asix_rx_fixup,
1554 .tx_fixup = asix_tx_fixup,
1557 static const struct usb_device_id products [] = {
1560 USB_DEVICE (0x077b, 0x2226),
1561 .driver_info = (unsigned long) &ax8817x_info,
1564 USB_DEVICE (0x0846, 0x1040),
1565 .driver_info = (unsigned long) &netgear_fa120_info,
1568 USB_DEVICE (0x2001, 0x1a00),
1569 .driver_info = (unsigned long) &dlink_dub_e100_info,
1571 // Intellinet, ST Lab USB Ethernet
1572 USB_DEVICE (0x0b95, 0x1720),
1573 .driver_info = (unsigned long) &ax8817x_info,
1575 // Hawking UF200, TrendNet TU2-ET100
1576 USB_DEVICE (0x07b8, 0x420a),
1577 .driver_info = (unsigned long) &hawking_uf200_info,
1579 // Billionton Systems, USB2AR
1580 USB_DEVICE (0x08dd, 0x90ff),
1581 .driver_info = (unsigned long) &ax8817x_info,
1584 USB_DEVICE (0x0557, 0x2009),
1585 .driver_info = (unsigned long) &ax8817x_info,
1587 // Buffalo LUA-U2-KTX
1588 USB_DEVICE (0x0411, 0x003d),
1589 .driver_info = (unsigned long) &ax8817x_info,
1591 // Buffalo LUA-U2-GT 10/100/1000
1592 USB_DEVICE (0x0411, 0x006e),
1593 .driver_info = (unsigned long) &ax88178_info,
1595 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1596 USB_DEVICE (0x6189, 0x182d),
1597 .driver_info = (unsigned long) &ax8817x_info,
1599 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
1600 USB_DEVICE (0x0df6, 0x0056),
1601 .driver_info = (unsigned long) &ax88178_info,
1603 // corega FEther USB2-TX
1604 USB_DEVICE (0x07aa, 0x0017),
1605 .driver_info = (unsigned long) &ax8817x_info,
1607 // Surecom EP-1427X-2
1608 USB_DEVICE (0x1189, 0x0893),
1609 .driver_info = (unsigned long) &ax8817x_info,
1611 // goodway corp usb gwusb2e
1612 USB_DEVICE (0x1631, 0x6200),
1613 .driver_info = (unsigned long) &ax8817x_info,
1615 // JVC MP-PRX1 Port Replicator
1616 USB_DEVICE (0x04f1, 0x3008),
1617 .driver_info = (unsigned long) &ax8817x_info,
1619 // ASIX AX88772B 10/100
1620 USB_DEVICE (0x0b95, 0x772b),
1621 .driver_info = (unsigned long) &ax88772_info,
1623 // ASIX AX88772 10/100
1624 USB_DEVICE (0x0b95, 0x7720),
1625 .driver_info = (unsigned long) &ax88772_info,
1627 // ASIX AX88178 10/100/1000
1628 USB_DEVICE (0x0b95, 0x1780),
1629 .driver_info = (unsigned long) &ax88178_info,
1631 // Logitec LAN-GTJ/U2A
1632 USB_DEVICE (0x0789, 0x0160),
1633 .driver_info = (unsigned long) &ax88178_info,
1635 // Linksys USB200M Rev 2
1636 USB_DEVICE (0x13b1, 0x0018),
1637 .driver_info = (unsigned long) &ax88772_info,
1639 // 0Q0 cable ethernet
1640 USB_DEVICE (0x1557, 0x7720),
1641 .driver_info = (unsigned long) &ax88772_info,
1643 // DLink DUB-E100 H/W Ver B1
1644 USB_DEVICE (0x07d1, 0x3c05),
1645 .driver_info = (unsigned long) &ax88772_info,
1647 // DLink DUB-E100 H/W Ver B1 Alternate
1648 USB_DEVICE (0x2001, 0x3c05),
1649 .driver_info = (unsigned long) &ax88772_info,
1651 // DLink DUB-E100 H/W Ver C1
1652 USB_DEVICE (0x2001, 0x1a02),
1653 .driver_info = (unsigned long) &ax88772_info,
1656 USB_DEVICE (0x1737, 0x0039),
1657 .driver_info = (unsigned long) &ax88178_info,
1660 USB_DEVICE (0x04bb, 0x0930),
1661 .driver_info = (unsigned long) &ax88178_info,
1664 USB_DEVICE(0x050d, 0x5055),
1665 .driver_info = (unsigned long) &ax88178_info,
1667 // Apple USB Ethernet Adapter
1668 USB_DEVICE(0x05ac, 0x1402),
1669 .driver_info = (unsigned long) &ax88772_info,
1671 // Cables-to-Go USB Ethernet Adapter
1672 USB_DEVICE(0x0b95, 0x772a),
1673 .driver_info = (unsigned long) &ax88772_info,
1676 USB_DEVICE(0x14ea, 0xab11),
1677 .driver_info = (unsigned long) &ax88178_info,
1680 USB_DEVICE(0x0db0, 0xa877),
1681 .driver_info = (unsigned long) &ax88772_info,
1683 // Asus USB Ethernet Adapter
1684 USB_DEVICE (0x0b95, 0x7e2b),
1685 .driver_info = (unsigned long) &ax88772_info,
1689 MODULE_DEVICE_TABLE(usb, products);
1691 static struct usb_driver asix_driver = {
1692 .name = DRIVER_NAME,
1693 .id_table = products,
1694 .probe = usbnet_probe,
1695 .suspend = usbnet_suspend,
1696 .resume = usbnet_resume,
1697 .disconnect = usbnet_disconnect,
1698 .supports_autosuspend = 1,
1701 static int __init asix_init(void)
1703 return usb_register(&asix_driver);
1705 module_init(asix_init);
1707 static void __exit asix_exit(void)
1709 usb_deregister(&asix_driver);
1711 module_exit(asix_exit);
1713 MODULE_AUTHOR("David Hollis");
1714 MODULE_VERSION(DRIVER_VERSION);
1715 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1716 MODULE_LICENSE("GPL");