drivers/net/usb/asix.c

   1 /*
   2  * ASIX AX8817X based USB 2.0 Ethernet Devices
   3  * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
   4  * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
   5  * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
   6  * Copyright (c) 2002-2003 TiVo Inc.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  */
  22
  23 // #define      DEBUG                   // error path messages, extra info
  24 // #define      VERBOSE                 // more; success messages
  25
  26 #include <linux/module.h>
  27 #include <linux/kmod.h>
  28 #include <linux/init.h>
  29 #include <linux/netdevice.h>
  30 #include <linux/etherdevice.h>
  31 #include <linux/ethtool.h>
  32 #include <linux/workqueue.h>
  33 #include <linux/mii.h>
  34 #include <linux/usb.h>
  35 #include <linux/crc32.h>
  36 #include <linux/usb/usbnet.h>
  37 #include <linux/slab.h>
  38
  39 #define DRIVER_VERSION "14-Jun-2006"
  40 static const char driver_name [] = "asix";
  41
  42 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
  43
  44 #define AX_CMD_SET_SW_MII               0x06
  45 #define AX_CMD_READ_MII_REG             0x07
  46 #define AX_CMD_WRITE_MII_REG            0x08
  47 #define AX_CMD_SET_HW_MII               0x0a
  48 #define AX_CMD_READ_EEPROM              0x0b
  49 #define AX_CMD_WRITE_EEPROM             0x0c
  50 #define AX_CMD_WRITE_ENABLE             0x0d
  51 #define AX_CMD_WRITE_DISABLE            0x0e
  52 #define AX_CMD_READ_RX_CTL              0x0f
  53 #define AX_CMD_WRITE_RX_CTL             0x10
  54 #define AX_CMD_READ_IPG012              0x11
  55 #define AX_CMD_WRITE_IPG0               0x12
  56 #define AX_CMD_WRITE_IPG1               0x13
  57 #define AX_CMD_READ_NODE_ID             0x13
  58 #define AX_CMD_WRITE_NODE_ID            0x14
  59 #define AX_CMD_WRITE_IPG2               0x14
  60 #define AX_CMD_WRITE_MULTI_FILTER       0x16
  61 #define AX88172_CMD_READ_NODE_ID        0x17
  62 #define AX_CMD_READ_PHY_ID              0x19
  63 #define AX_CMD_READ_MEDIUM_STATUS       0x1a
  64 #define AX_CMD_WRITE_MEDIUM_MODE        0x1b
  65 #define AX_CMD_READ_MONITOR_MODE        0x1c
  66 #define AX_CMD_WRITE_MONITOR_MODE       0x1d
  67 #define AX_CMD_READ_GPIOS               0x1e
  68 #define AX_CMD_WRITE_GPIOS              0x1f
  69 #define AX_CMD_SW_RESET                 0x20
  70 #define AX_CMD_SW_PHY_STATUS            0x21
  71 #define AX_CMD_SW_PHY_SELECT            0x22
  72
  73 #define AX_MONITOR_MODE                 0x01
  74 #define AX_MONITOR_LINK                 0x02
  75 #define AX_MONITOR_MAGIC                0x04
  76 #define AX_MONITOR_HSFS                 0x10
  77
  78 /* AX88172 Medium Status Register values */
  79 #define AX88172_MEDIUM_FD               0x02
  80 #define AX88172_MEDIUM_TX               0x04
  81 #define AX88172_MEDIUM_FC               0x10
  82 #define AX88172_MEDIUM_DEFAULT \
  83                 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
  84
  85 #define AX_MCAST_FILTER_SIZE            8
  86 #define AX_MAX_MCAST                    64
  87
  88 #define AX_SWRESET_CLEAR                0x00
  89 #define AX_SWRESET_RR                   0x01
  90 #define AX_SWRESET_RT                   0x02
  91 #define AX_SWRESET_PRTE                 0x04
  92 #define AX_SWRESET_PRL                  0x08
  93 #define AX_SWRESET_BZ                   0x10
  94 #define AX_SWRESET_IPRL                 0x20
  95 #define AX_SWRESET_IPPD                 0x40
  96
  97 #define AX88772_IPG0_DEFAULT            0x15
  98 #define AX88772_IPG1_DEFAULT            0x0c
  99 #define AX88772_IPG2_DEFAULT            0x12
 100
 101 /* AX88772 & AX88178 Medium Mode Register */
 102 #define AX_MEDIUM_PF            0x0080
 103 #define AX_MEDIUM_JFE           0x0040
 104 #define AX_MEDIUM_TFC           0x0020
 105 #define AX_MEDIUM_RFC           0x0010
 106 #define AX_MEDIUM_ENCK          0x0008
 107 #define AX_MEDIUM_AC            0x0004
 108 #define AX_MEDIUM_FD            0x0002
 109 #define AX_MEDIUM_GM            0x0001
 110 #define AX_MEDIUM_SM            0x1000
 111 #define AX_MEDIUM_SBP           0x0800
 112 #define AX_MEDIUM_PS            0x0200
 113 #define AX_MEDIUM_RE            0x0100
 114
 115 #define AX88178_MEDIUM_DEFAULT  \
 116         (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
 117          AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
 118          AX_MEDIUM_RE )
 119
 120 #define AX88772_MEDIUM_DEFAULT  \
 121         (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
 122          AX_MEDIUM_TFC | AX_MEDIUM_PS | \
 123          AX_MEDIUM_AC | AX_MEDIUM_RE )
 124
 125 /* AX88772 & AX88178 RX_CTL values */
 126 #define AX_RX_CTL_SO                    0x0080
 127 #define AX_RX_CTL_AP                    0x0020
 128 #define AX_RX_CTL_AM                    0x0010
 129 #define AX_RX_CTL_AB                    0x0008
 130 #define AX_RX_CTL_SEP                   0x0004
 131 #define AX_RX_CTL_AMALL                 0x0002
 132 #define AX_RX_CTL_PRO                   0x0001
 133 #define AX_RX_CTL_MFB_2048              0x0000
 134 #define AX_RX_CTL_MFB_4096              0x0100
 135 #define AX_RX_CTL_MFB_8192              0x0200
 136 #define AX_RX_CTL_MFB_16384             0x0300
 137
 138 #define AX_DEFAULT_RX_CTL       \
 139         (AX_RX_CTL_SO | AX_RX_CTL_AB )
 140
 141 /* GPIO 0 .. 2 toggles */
 142 #define AX_GPIO_GPO0EN          0x01    /* GPIO0 Output enable */
 143 #define AX_GPIO_GPO_0           0x02    /* GPIO0 Output value */
 144 #define AX_GPIO_GPO1EN          0x04    /* GPIO1 Output enable */
 145 #define AX_GPIO_GPO_1           0x08    /* GPIO1 Output value */
 146 #define AX_GPIO_GPO2EN          0x10    /* GPIO2 Output enable */
 147 #define AX_GPIO_GPO_2           0x20    /* GPIO2 Output value */
 148 #define AX_GPIO_RESERVED        0x40    /* Reserved */
 149 #define AX_GPIO_RSE             0x80    /* Reload serial EEPROM */
 150
 151 #define AX_EEPROM_MAGIC         0xdeadbeef
 152 #define AX88172_EEPROM_LEN      0x40
 153 #define AX88772_EEPROM_LEN      0xff
 154
 155 #define PHY_MODE_MARVELL        0x0000
 156 #define MII_MARVELL_LED_CTRL    0x0018
 157 #define MII_MARVELL_STATUS      0x001b
 158 #define MII_MARVELL_CTRL        0x0014
 159
 160 #define MARVELL_LED_MANUAL      0x0019
 161
 162 #define MARVELL_STATUS_HWCFG    0x0004
 163
 164 #define MARVELL_CTRL_TXDELAY    0x0002
 165 #define MARVELL_CTRL_RXDELAY    0x0080
 166
 167 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
 168 struct asix_data {
 169         u8 multi_filter[AX_MCAST_FILTER_SIZE];
 170         u8 mac_addr[ETH_ALEN];
 171         u8 phymode;
 172         u8 ledmode;
 173         u8 eeprom_len;
 174 };
 175
 176 struct ax88172_int_data {
 177         __le16 res1;
 178         u8 link;
 179         __le16 res2;
 180         u8 status;
 181         __le16 res3;
 182 } __packed;
 183
 184 static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
 185                             u16 size, void *data)
 186 {
 187         void *buf;
 188         int err = -ENOMEM;
 189
 190         netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
 191                    cmd, value, index, size);
 192
 193         buf = kmalloc(size, GFP_KERNEL);
 194         if (!buf)
 195                 goto out;
 196
 197         err = usb_control_msg(
 198                 dev->udev,
 199                 usb_rcvctrlpipe(dev->udev, 0),
 200                 cmd,
 201                 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 202                 value,
 203                 index,
 204                 buf,
 205                 size,
 206                 USB_CTRL_GET_TIMEOUT);
 207         if (err == size)
 208                 memcpy(data, buf, size);
 209         else if (err >= 0)
 210                 err = -EINVAL;
 211         kfree(buf);
 212
 213 out:
 214         return err;
 215 }
 216
 217 static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
 218                              u16 size, void *data)
 219 {
 220         void *buf = NULL;
 221         int err = -ENOMEM;
 222
 223         netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
 224                    cmd, value, index, size);
 225
 226         if (data) {
 227                 buf = kmemdup(data, size, GFP_KERNEL);
 228                 if (!buf)
 229                         goto out;
 230         }
 231
 232         err = usb_control_msg(
 233                 dev->udev,
 234                 usb_sndctrlpipe(dev->udev, 0),
 235                 cmd,
 236                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 237                 value,
 238                 index,
 239                 buf,
 240                 size,
 241                 USB_CTRL_SET_TIMEOUT);
 242         kfree(buf);
 243
 244 out:
 245         return err;
 246 }
 247
 248 static void asix_async_cmd_callback(struct urb *urb)
 249 {
 250         struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
 251         int status = urb->status;
 252
 253         if (status < 0)
 254                 printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
 255                         status);
 256
 257         kfree(req);
 258         usb_free_urb(urb);
 259 }
 260
 261 static void
 262 asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
 263                                     u16 size, void *data)
 264 {
 265         struct usb_ctrlrequest *req;
 266         int status;
 267         struct urb *urb;
 268
 269         netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
 270                    cmd, value, index, size);
 271         if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) {
 272                 netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n");
 273                 return;
 274         }
 275
 276         if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) {
 277                 netdev_err(dev->net, "Failed to allocate memory for control request\n");
 278                 usb_free_urb(urb);
 279                 return;
 280         }
 281
 282         req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
 283         req->bRequest = cmd;
 284         req->wValue = cpu_to_le16(value);
 285         req->wIndex = cpu_to_le16(index);
 286         req->wLength = cpu_to_le16(size);
 287
 288         usb_fill_control_urb(urb, dev->udev,
 289                              usb_sndctrlpipe(dev->udev, 0),
 290                              (void *)req, data, size,
 291                              asix_async_cmd_callback, req);
 292
 293         if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) {
 294                 netdev_err(dev->net, "Error submitting the control message: status=%d\n",
 295                            status);
 296                 kfree(req);
 297                 usb_free_urb(urb);
 298         }
 299 }
 300
 301 static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
 302 {
 303         u8  *head;
 304         u32  header;
 305         char *packet;
 306         struct sk_buff *ax_skb;
 307         u16 size;
 308
 309         head = (u8 *) skb->data;
 310         memcpy(&header, head, sizeof(header));
 311         le32_to_cpus(&header);
 312         packet = head + sizeof(header);
 313
 314         skb_pull(skb, 4);
 315
 316         while (skb->len > 0) {
 317                 if ((short)(header & 0x0000ffff) !=
 318                     ~((short)((header & 0xffff0000) >> 16))) {
 319                         netdev_err(dev->net, "asix_rx_fixup() Bad Header Length\n");
 320                 }
 321                 /* get the packet length */
 322                 size = (u16) (header & 0x0000ffff);
 323
 324                 if ((skb->len) - ((size + 1) & 0xfffe) == 0) {
 325                         u8 alignment = (unsigned long)skb->data & 0x3;
 326                         if (alignment != 0x2) {
 327                                 /*
 328                                  * not 16bit aligned so use the room provided by
 329                                  * the 32 bit header to align the data
 330                                  *
 331                                  * note we want 16bit alignment as MAC header is
 332                                  * 14bytes thus ip header will be aligned on
 333                                  * 32bit boundary so accessing ipheader elements
 334                                  * using a cast to struct ip header wont cause
 335                                  * an unaligned accesses.
 336                                  */
 337                                 u8 realignment = (alignment + 2) & 0x3;
 338                                 memmove(skb->data - realignment,
 339                                         skb->data,
 340                                         size);
 341                                 skb->data -= realignment;
 342                                 skb_set_tail_pointer(skb, size);
 343                         }
 344                         return 2;
 345                 }
 346
 347                 if (size > dev->net->mtu + ETH_HLEN) {
 348                         netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n",
 349                                    size);
 350                         return 0;
 351                 }
 352                 ax_skb = skb_clone(skb, GFP_ATOMIC);
 353                 if (ax_skb) {
 354                         u8 alignment = (unsigned long)packet & 0x3;
 355                         ax_skb->len = size;
 356
 357                         if (alignment != 0x2) {
 358                                 /*
 359                                  * not 16bit aligned use the room provided by
 360                                  * the 32 bit header to align the data
 361                                  */
 362                                 u8 realignment = (alignment + 2) & 0x3;
 363                                 memmove(packet - realignment, packet, size);
 364                                 packet -= realignment;
 365                         }
 366                         ax_skb->data = packet;
 367                         skb_set_tail_pointer(ax_skb, size);
 368                         usbnet_skb_return(dev, ax_skb);
 369                 } else {
 370                         return 0;
 371                 }
 372
 373                 skb_pull(skb, (size + 1) & 0xfffe);
 374
 375                 if (skb->len == 0)
 376                         break;
 377
 378                 head = (u8 *) skb->data;
 379                 memcpy(&header, head, sizeof(header));
 380                 le32_to_cpus(&header);
 381                 packet = head + sizeof(header);
 382                 skb_pull(skb, 4);
 383         }
 384
 385         if (skb->len < 0) {
 386                 netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d\n",
 387                            skb->len);
 388                 return 0;
 389         }
 390         return 1;
 391 }
 392
 393 static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
 394                                         gfp_t flags)
 395 {
 396         int padlen;
 397         int headroom = skb_headroom(skb);
 398         int tailroom = skb_tailroom(skb);
 399         u32 packet_len;
 400         u32 padbytes = 0xffff0000;
 401
 402         padlen = ((skb->len + 4) % 512) ? 0 : 4;
 403
 404         if ((!skb_cloned(skb)) &&
 405             ((headroom + tailroom) >= (4 + padlen))) {
 406                 if ((headroom < 4) || (tailroom < padlen)) {
 407                         skb->data = memmove(skb->head + 4, skb->data, skb->len);
 408                         skb_set_tail_pointer(skb, skb->len);
 409                 }
 410         } else {
 411                 struct sk_buff *skb2;
 412                 skb2 = skb_copy_expand(skb, 4, padlen, flags);
 413                 dev_kfree_skb_any(skb);
 414                 skb = skb2;
 415                 if (!skb)
 416                         return NULL;
 417         }
 418
 419         skb_push(skb, 4);
 420         packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
 421         cpu_to_le32s(&packet_len);
 422         skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len));
 423
 424         if ((skb->len % 512) == 0) {
 425                 cpu_to_le32s(&padbytes);
 426                 memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes));
 427                 skb_put(skb, sizeof(padbytes));
 428         }
 429         return skb;
 430 }
 431
 432 static void asix_status(struct usbnet *dev, struct urb *urb)
 433 {
 434         struct ax88172_int_data *event;
 435         int link;
 436
 437         if (urb->actual_length < 8)
 438                 return;
 439
 440         event = urb->transfer_buffer;
 441         link = event->link & 0x01;
 442         if (netif_carrier_ok(dev->net) != link) {
 443                 if (link) {
 444                         netif_carrier_on(dev->net);
 445                         usbnet_defer_kevent (dev, EVENT_LINK_RESET );
 446                 } else
 447                         netif_carrier_off(dev->net);
 448                 netdev_dbg(dev->net, "Link Status is: %d\n", link);
 449         }
 450 }
 451
 452 static inline int asix_set_sw_mii(struct usbnet *dev)
 453 {
 454         int ret;
 455         ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
 456         if (ret < 0)
 457                 netdev_err(dev->net, "Failed to enable software MII access\n");
 458         return ret;
 459 }
 460
 461 static inline int asix_set_hw_mii(struct usbnet *dev)
 462 {
 463         int ret;
 464         ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
 465         if (ret < 0)
 466                 netdev_err(dev->net, "Failed to enable hardware MII access\n");
 467         return ret;
 468 }
 469
 470 static inline int asix_get_phy_addr(struct usbnet *dev)
 471 {
 472         u8 buf[2];
 473         int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
 474
 475         netdev_dbg(dev->net, "asix_get_phy_addr()\n");
 476
 477         if (ret < 0) {
 478                 netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret);
 479                 goto out;
 480         }
 481         netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n",
 482                    *((__le16 *)buf));
 483         ret = buf[1];
 484
 485 out:
 486         return ret;
 487 }
 488
 489 static int asix_sw_reset(struct usbnet *dev, u8 flags)
 490 {
 491         int ret;
 492
 493         ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
 494         if (ret < 0)
 495                 netdev_err(dev->net, "Failed to send software reset: %02x\n", ret);
 496
 497         return ret;
 498 }
 499
 500 static u16 asix_read_rx_ctl(struct usbnet *dev)
 501 {
 502         __le16 v;
 503         int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v);
 504
 505         if (ret < 0) {
 506                 netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret);
 507                 goto out;
 508         }
 509         ret = le16_to_cpu(v);
 510 out:
 511         return ret;
 512 }
 513
 514 static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
 515 {
 516         int ret;
 517
 518         netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode);
 519         ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
 520         if (ret < 0)
 521                 netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n",
 522                            mode, ret);
 523
 524         return ret;
 525 }
 526
 527 static u16 asix_read_medium_status(struct usbnet *dev)
 528 {
 529         __le16 v;
 530         int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
 531
 532         if (ret < 0) {
 533                 netdev_err(dev->net, "Error reading Medium Status register: %02x\n",
 534                            ret);
 535                 goto out;
 536         }
 537         ret = le16_to_cpu(v);
 538 out:
 539         return ret;
 540 }
 541
 542 static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
 543 {
 544         int ret;
 545
 546         netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode);
 547         ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
 548         if (ret < 0)
 549                 netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n",
 550                            mode, ret);
 551
 552         return ret;
 553 }
 554
 555 static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
 556 {
 557         int ret;
 558
 559         netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value);
 560         ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
 561         if (ret < 0)
 562                 netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n",
 563                            value, ret);
 564
 565         if (sleep)
 566                 msleep(sleep);
 567
 568         return ret;
 569 }
 570
 571 /*
 572  * AX88772 & AX88178 have a 16-bit RX_CTL value
 573  */
 574 static void asix_set_multicast(struct net_device *net)
 575 {
 576         struct usbnet *dev = netdev_priv(net);
 577         struct asix_data *data = (struct asix_data *)&dev->data;
 578         u16 rx_ctl = AX_DEFAULT_RX_CTL;
 579
 580         if (net->flags & IFF_PROMISC) {
 581                 rx_ctl |= AX_RX_CTL_PRO;
 582         } else if (net->flags & IFF_ALLMULTI ||
 583                    netdev_mc_count(net) > AX_MAX_MCAST) {
 584                 rx_ctl |= AX_RX_CTL_AMALL;
 585         } else if (netdev_mc_empty(net)) {
 586                 /* just broadcast and directed */
 587         } else {
 588                 /* We use the 20 byte dev->data
 589                  * for our 8 byte filter buffer
 590                  * to avoid allocating memory that
 591                  * is tricky to free later */
 592                 struct netdev_hw_addr *ha;
 593                 u32 crc_bits;
 594
 595                 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
 596
 597                 /* Build the multicast hash filter. */
 598                 netdev_for_each_mc_addr(ha, net) {
 599                         crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
 600                         data->multi_filter[crc_bits >> 3] |=
 601                             1 << (crc_bits & 7);
 602                 }
 603
 604                 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
 605                                    AX_MCAST_FILTER_SIZE, data->multi_filter);
 606
 607                 rx_ctl |= AX_RX_CTL_AM;
 608         }
 609
 610         asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
 611 }
 612
 613 static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
 614 {
 615         struct usbnet *dev = netdev_priv(netdev);
 616         __le16 res;
 617
 618         mutex_lock(&dev->phy_mutex);
 619         asix_set_sw_mii(dev);
 620         asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
 621                                 (__u16)loc, 2, &res);
 622         asix_set_hw_mii(dev);
 623         mutex_unlock(&dev->phy_mutex);
 624
 625         netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n",
 626                    phy_id, loc, le16_to_cpu(res));
 627
 628         return le16_to_cpu(res);
 629 }
 630
 631 static void
 632 asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
 633 {
 634         struct usbnet *dev = netdev_priv(netdev);
 635         __le16 res = cpu_to_le16(val);
 636
 637         netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n",
 638                    phy_id, loc, val);
 639         mutex_lock(&dev->phy_mutex);
 640         asix_set_sw_mii(dev);
 641         asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
 642         asix_set_hw_mii(dev);
 643         mutex_unlock(&dev->phy_mutex);
 644 }
 645
 646 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
 647 static u32 asix_get_phyid(struct usbnet *dev)
 648 {
 649         int phy_reg;
 650         u32 phy_id;
 651
 652         phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
 653         if (phy_reg < 0)
 654                 return 0;
 655
 656         phy_id = (phy_reg & 0xffff) << 16;
 657
 658         phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
 659         if (phy_reg < 0)
 660                 return 0;
 661
 662         phy_id |= (phy_reg & 0xffff);
 663
 664         return phy_id;
 665 }
 666
 667 static void
 668 asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
 669 {
 670         struct usbnet *dev = netdev_priv(net);
 671         u8 opt;
 672
 673         if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
 674                 wolinfo->supported = 0;
 675                 wolinfo->wolopts = 0;
 676                 return;
 677         }
 678         wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
 679         wolinfo->wolopts = 0;
 680         if (opt & AX_MONITOR_MODE) {
 681                 if (opt & AX_MONITOR_LINK)
 682                         wolinfo->wolopts |= WAKE_PHY;
 683                 if (opt & AX_MONITOR_MAGIC)
 684                         wolinfo->wolopts |= WAKE_MAGIC;
 685         }
 686 }
 687
 688 static int
 689 asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
 690 {
 691         struct usbnet *dev = netdev_priv(net);
 692         u8 opt = 0;
 693
 694         if (wolinfo->wolopts & WAKE_PHY)
 695                 opt |= AX_MONITOR_LINK;
 696         if (wolinfo->wolopts & WAKE_MAGIC)
 697                 opt |= AX_MONITOR_MAGIC;
 698         if (opt != 0)
 699                 opt |= AX_MONITOR_MODE;
 700
 701         if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
 702                               opt, 0, 0, NULL) < 0)
 703                 return -EINVAL;
 704
 705         return 0;
 706 }
 707
 708 static int asix_get_eeprom_len(struct net_device *net)
 709 {
 710         struct usbnet *dev = netdev_priv(net);
 711         struct asix_data *data = (struct asix_data *)&dev->data;
 712
 713         return data->eeprom_len;
 714 }
 715
 716 static int asix_get_eeprom(struct net_device *net,
 717                               struct ethtool_eeprom *eeprom, u8 *data)
 718 {
 719         struct usbnet *dev = netdev_priv(net);
 720         __le16 *ebuf = (__le16 *)data;
 721         int i;
 722
 723         /* Crude hack to ensure that we don't overwrite memory
 724          * if an odd length is supplied
 725          */
 726         if (eeprom->len % 2)
 727                 return -EINVAL;
 728
 729         eeprom->magic = AX_EEPROM_MAGIC;
 730
 731         /* ax8817x returns 2 bytes from eeprom on read */
 732         for (i=0; i < eeprom->len / 2; i++) {
 733                 if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
 734                         eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
 735                         return -EINVAL;
 736         }
 737         return 0;
 738 }
 739
 740 static void asix_get_drvinfo (struct net_device *net,
 741                                  struct ethtool_drvinfo *info)
 742 {
 743         struct usbnet *dev = netdev_priv(net);
 744         struct asix_data *data = (struct asix_data *)&dev->data;
 745
 746         /* Inherit standard device info */
 747         usbnet_get_drvinfo(net, info);
 748         strncpy (info->driver, driver_name, sizeof info->driver);
 749         strncpy (info->version, DRIVER_VERSION, sizeof info->version);
 750         info->eedump_len = data->eeprom_len;
 751 }
 752
 753 static u32 asix_get_link(struct net_device *net)
 754 {
 755         struct usbnet *dev = netdev_priv(net);
 756
 757         return mii_link_ok(&dev->mii);
 758 }
 759
 760 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
 761 {
 762         struct usbnet *dev = netdev_priv(net);
 763
 764         return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
 765 }
 766
 767 static int asix_set_mac_address(struct net_device *net, void *p)
 768 {
 769         struct usbnet *dev = netdev_priv(net);
 770         struct asix_data *data = (struct asix_data *)&dev->data;
 771         struct sockaddr *addr = p;
 772
 773         if (netif_running(net))
 774                 return -EBUSY;
 775         if (!is_valid_ether_addr(addr->sa_data))
 776                 return -EADDRNOTAVAIL;
 777
 778         memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
 779
 780         /* We use the 20 byte dev->data
 781          * for our 6 byte mac buffer
 782          * to avoid allocating memory that
 783          * is tricky to free later */
 784         memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);
 785         asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
 786                                                         data->mac_addr);
 787
 788         return 0;
 789 }
 790
 791 /* We need to override some ethtool_ops so we require our
 792    own structure so we don't interfere with other usbnet
 793    devices that may be connected at the same time. */
 794 static const struct ethtool_ops ax88172_ethtool_ops = {
 795         .get_drvinfo            = asix_get_drvinfo,
 796         .get_link               = asix_get_link,
 797         .get_msglevel           = usbnet_get_msglevel,
 798         .set_msglevel           = usbnet_set_msglevel,
 799         .get_wol                = asix_get_wol,
 800         .set_wol                = asix_set_wol,
 801         .get_eeprom_len         = asix_get_eeprom_len,
 802         .get_eeprom             = asix_get_eeprom,
 803         .get_settings           = usbnet_get_settings,
 804         .set_settings           = usbnet_set_settings,
 805         .nway_reset             = usbnet_nway_reset,
 806 };
 807
 808 static void ax88172_set_multicast(struct net_device *net)
 809 {
 810         struct usbnet *dev = netdev_priv(net);
 811         struct asix_data *data = (struct asix_data *)&dev->data;
 812         u8 rx_ctl = 0x8c;
 813
 814         if (net->flags & IFF_PROMISC) {
 815                 rx_ctl |= 0x01;
 816         } else if (net->flags & IFF_ALLMULTI ||
 817                    netdev_mc_count(net) > AX_MAX_MCAST) {
 818                 rx_ctl |= 0x02;
 819         } else if (netdev_mc_empty(net)) {
 820                 /* just broadcast and directed */
 821         } else {
 822                 /* We use the 20 byte dev->data
 823                  * for our 8 byte filter buffer
 824                  * to avoid allocating memory that
 825                  * is tricky to free later */
 826                 struct netdev_hw_addr *ha;
 827                 u32 crc_bits;
 828
 829                 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
 830
 831                 /* Build the multicast hash filter. */
 832                 netdev_for_each_mc_addr(ha, net) {
 833                         crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
 834                         data->multi_filter[crc_bits >> 3] |=
 835                             1 << (crc_bits & 7);
 836                 }
 837
 838                 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
 839                                    AX_MCAST_FILTER_SIZE, data->multi_filter);
 840
 841                 rx_ctl |= 0x10;
 842         }
 843
 844         asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
 845 }
 846
 847 static int ax88172_link_reset(struct usbnet *dev)
 848 {
 849         u8 mode;
 850         struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
 851
 852         mii_check_media(&dev->mii, 1, 1);
 853         mii_ethtool_gset(&dev->mii, &ecmd);
 854         mode = AX88172_MEDIUM_DEFAULT;
 855
 856         if (ecmd.duplex != DUPLEX_FULL)
 857                 mode |= ~AX88172_MEDIUM_FD;
 858
 859         netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
 860                    ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
 861
 862         asix_write_medium_mode(dev, mode);
 863
 864         return 0;
 865 }
 866
 867 static const struct net_device_ops ax88172_netdev_ops = {
 868         .ndo_open               = usbnet_open,
 869         .ndo_stop               = usbnet_stop,
 870         .ndo_start_xmit         = usbnet_start_xmit,
 871         .ndo_tx_timeout         = usbnet_tx_timeout,
 872         .ndo_change_mtu         = usbnet_change_mtu,
 873         .ndo_set_mac_address    = eth_mac_addr,
 874         .ndo_validate_addr      = eth_validate_addr,
 875         .ndo_do_ioctl           = asix_ioctl,
 876         .ndo_set_multicast_list = ax88172_set_multicast,
 877 };
 878
 879 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
 880 {
 881         int ret = 0;
 882         u8 buf[ETH_ALEN];
 883         int i;
 884         unsigned long gpio_bits = dev->driver_info->data;
 885         struct asix_data *data = (struct asix_data *)&dev->data;
 886
 887         data->eeprom_len = AX88172_EEPROM_LEN;
 888
 889         usbnet_get_endpoints(dev,intf);
 890
 891         /* Toggle the GPIOs in a manufacturer/model specific way */
 892         for (i = 2; i >= 0; i--) {
 893                 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
 894                                         (gpio_bits >> (i * 8)) & 0xff, 0, 0,
 895                                         NULL)) < 0)
 896                         goto out;
 897                 msleep(5);
 898         }
 899
 900         if ((ret = asix_write_rx_ctl(dev, 0x80)) < 0)
 901                 goto out;
 902
 903         /* Get the MAC address */
 904         if ((ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
 905                                 0, 0, ETH_ALEN, buf)) < 0) {
 906                 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
 907                 goto out;
 908         }
 909         memcpy(dev->net->dev_addr, buf, ETH_ALEN);
 910
 911         /* Initialize MII structure */
 912         dev->mii.dev = dev->net;
 913         dev->mii.mdio_read = asix_mdio_read;
 914         dev->mii.mdio_write = asix_mdio_write;
 915         dev->mii.phy_id_mask = 0x3f;
 916         dev->mii.reg_num_mask = 0x1f;
 917         dev->mii.phy_id = asix_get_phy_addr(dev);
 918
 919         dev->net->netdev_ops = &ax88172_netdev_ops;
 920         dev->net->ethtool_ops = &ax88172_ethtool_ops;
 921
 922         asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
 923         asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
 924                 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
 925         mii_nway_restart(&dev->mii);
 926
 927         return 0;
 928
 929 out:
 930         return ret;
 931 }
 932
 933 static const struct ethtool_ops ax88772_ethtool_ops = {
 934         .get_drvinfo            = asix_get_drvinfo,
 935         .get_link               = asix_get_link,
 936         .get_msglevel           = usbnet_get_msglevel,
 937         .set_msglevel           = usbnet_set_msglevel,
 938         .get_wol                = asix_get_wol,
 939         .set_wol                = asix_set_wol,
 940         .get_eeprom_len         = asix_get_eeprom_len,
 941         .get_eeprom             = asix_get_eeprom,
 942         .get_settings           = usbnet_get_settings,
 943         .set_settings           = usbnet_set_settings,
 944         .nway_reset             = usbnet_nway_reset,
 945 };
 946
 947 static int ax88772_link_reset(struct usbnet *dev)
 948 {
 949         u16 mode;
 950         struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
 951
 952         mii_check_media(&dev->mii, 1, 1);
 953         mii_ethtool_gset(&dev->mii, &ecmd);
 954         mode = AX88772_MEDIUM_DEFAULT;
 955
 956         if (ethtool_cmd_speed(&ecmd) != SPEED_100)
 957                 mode &= ~AX_MEDIUM_PS;
 958
 959         if (ecmd.duplex != DUPLEX_FULL)
 960                 mode &= ~AX_MEDIUM_FD;
 961
 962         netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
 963                    ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
 964
 965         asix_write_medium_mode(dev, mode);
 966
 967         return 0;
 968 }
 969
 970 static const struct net_device_ops ax88772_netdev_ops = {
 971         .ndo_open               = usbnet_open,
 972         .ndo_stop               = usbnet_stop,
 973         .ndo_start_xmit         = usbnet_start_xmit,
 974         .ndo_tx_timeout         = usbnet_tx_timeout,
 975         .ndo_change_mtu         = usbnet_change_mtu,
 976         .ndo_set_mac_address    = asix_set_mac_address,
 977         .ndo_validate_addr      = eth_validate_addr,
 978         .ndo_do_ioctl           = asix_ioctl,
 979         .ndo_set_multicast_list = asix_set_multicast,
 980 };
 981
 982 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
 983 {
 984         int ret, embd_phy;
 985         u16 rx_ctl;
 986         struct asix_data *data = (struct asix_data *)&dev->data;
 987         u8 buf[ETH_ALEN];
 988         u32 phyid;
 989
 990         data->eeprom_len = AX88772_EEPROM_LEN;
 991
 992         usbnet_get_endpoints(dev,intf);
 993
 994         if ((ret = asix_write_gpio(dev,
 995                         AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5)) < 0)
 996                 goto out;
 997
 998         /* 0x10 is the phy id of the embedded 10/100 ethernet phy */
 999         embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
1000         if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT,
1001                                 embd_phy, 0, 0, NULL)) < 0) {
1002                 dbg("Select PHY #1 failed: %d", ret);
1003                 goto out;
1004         }
1005
1006         if ((ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL)) < 0)
1007                 goto out;
1008
1009         msleep(150);
1010         if ((ret = asix_sw_reset(dev, AX_SWRESET_CLEAR)) < 0)
1011                 goto out;
1012
1013         msleep(150);
1014         if (embd_phy) {
1015                 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL)) < 0)
1016                         goto out;
1017         }
1018         else {
1019                 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRTE)) < 0)
1020                         goto out;
1021         }
1022
1023         msleep(150);
1024         rx_ctl = asix_read_rx_ctl(dev);
1025         dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
1026         if ((ret = asix_write_rx_ctl(dev, 0x0000)) < 0)
1027                 goto out;
1028
1029         rx_ctl = asix_read_rx_ctl(dev);
1030         dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
1031
1032         /* Get the MAC address */
1033         if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
1034                                 0, 0, ETH_ALEN, buf)) < 0) {
1035                 dbg("Failed to read MAC address: %d", ret);
1036                 goto out;
1037         }
1038         memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1039
1040         /* Initialize MII structure */
1041         dev->mii.dev = dev->net;
1042         dev->mii.mdio_read = asix_mdio_read;
1043         dev->mii.mdio_write = asix_mdio_write;
1044         dev->mii.phy_id_mask = 0x1f;
1045         dev->mii.reg_num_mask = 0x1f;
1046         dev->mii.phy_id = asix_get_phy_addr(dev);
1047
1048         phyid = asix_get_phyid(dev);
1049         dbg("PHYID=0x%08x", phyid);
1050
1051         if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0)
1052                 goto out;
1053
1054         msleep(150);
1055
1056         if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL)) < 0)
1057                 goto out;
1058
1059         msleep(150);
1060
1061         dev->net->netdev_ops = &ax88772_netdev_ops;
1062         dev->net->ethtool_ops = &ax88772_ethtool_ops;
1063
1064         asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
1065         asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1066                         ADVERTISE_ALL | ADVERTISE_CSMA);
1067         mii_nway_restart(&dev->mii);
1068
1069         if ((ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT)) < 0)
1070                 goto out;
1071
1072         if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
1073                                 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
1074                                 AX88772_IPG2_DEFAULT, 0, NULL)) < 0) {
1075                 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
1076                 goto out;
1077         }
1078
1079         /* Set RX_CTL to default values with 2k buffer, and enable cactus */
1080         if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
1081                 goto out;
1082
1083         rx_ctl = asix_read_rx_ctl(dev);
1084         dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1085
1086         rx_ctl = asix_read_medium_status(dev);
1087         dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1088
1089         /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1090         if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1091                 /* hard_mtu  is still the default - the device does not support
1092                    jumbo eth frames */
1093                 dev->rx_urb_size = 2048;
1094         }
1095         return 0;
1096
1097 out:
1098         return ret;
1099 }
1100
1101 static struct ethtool_ops ax88178_ethtool_ops = {
1102         .get_drvinfo            = asix_get_drvinfo,
1103         .get_link               = asix_get_link,
1104         .get_msglevel           = usbnet_get_msglevel,
1105         .set_msglevel           = usbnet_set_msglevel,
1106         .get_wol                = asix_get_wol,
1107         .set_wol                = asix_set_wol,
1108         .get_eeprom_len         = asix_get_eeprom_len,
1109         .get_eeprom             = asix_get_eeprom,
1110         .get_settings           = usbnet_get_settings,
1111         .set_settings           = usbnet_set_settings,
1112         .nway_reset             = usbnet_nway_reset,
1113 };
1114
1115 static int marvell_phy_init(struct usbnet *dev)
1116 {
1117         struct asix_data *data = (struct asix_data *)&dev->data;
1118         u16 reg;
1119
1120         netdev_dbg(dev->net, "marvell_phy_init()\n");
1121
1122         reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
1123         netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
1124
1125         asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1126                         MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
1127
1128         if (data->ledmode) {
1129                 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1130                         MII_MARVELL_LED_CTRL);
1131                 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
1132
1133                 reg &= 0xf8ff;
1134                 reg |= (1 + 0x0100);
1135                 asix_mdio_write(dev->net, dev->mii.phy_id,
1136                         MII_MARVELL_LED_CTRL, reg);
1137
1138                 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1139                         MII_MARVELL_LED_CTRL);
1140                 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
1141                 reg &= 0xfc0f;
1142         }
1143
1144         return 0;
1145 }
1146
1147 static int marvell_led_status(struct usbnet *dev, u16 speed)
1148 {
1149         u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1150
1151         netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
1152
1153         /* Clear out the center LED bits - 0x03F0 */
1154         reg &= 0xfc0f;
1155
1156         switch (speed) {
1157                 case SPEED_1000:
1158                         reg |= 0x03e0;
1159                         break;
1160                 case SPEED_100:
1161                         reg |= 0x03b0;
1162                         break;
1163                 default:
1164                         reg |= 0x02f0;
1165         }
1166
1167         netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
1168         asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1169
1170         return 0;
1171 }
1172
1173 static int ax88178_link_reset(struct usbnet *dev)
1174 {
1175         u16 mode;
1176         struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
1177         struct asix_data *data = (struct asix_data *)&dev->data;
1178         u32 speed;
1179
1180         netdev_dbg(dev->net, "ax88178_link_reset()\n");
1181
1182         mii_check_media(&dev->mii, 1, 1);
1183         mii_ethtool_gset(&dev->mii, &ecmd);
1184         mode = AX88178_MEDIUM_DEFAULT;
1185         speed = ethtool_cmd_speed(&ecmd);
1186
1187         if (speed == SPEED_1000)
1188                 mode |= AX_MEDIUM_GM;
1189         else if (speed == SPEED_100)
1190                 mode |= AX_MEDIUM_PS;
1191         else
1192                 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1193
1194         mode |= AX_MEDIUM_ENCK;
1195
1196         if (ecmd.duplex == DUPLEX_FULL)
1197                 mode |= AX_MEDIUM_FD;
1198         else
1199                 mode &= ~AX_MEDIUM_FD;
1200
1201         netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
1202                    speed, ecmd.duplex, mode);
1203
1204         asix_write_medium_mode(dev, mode);
1205
1206         if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1207                 marvell_led_status(dev, speed);
1208
1209         return 0;
1210 }
1211
1212 static void ax88178_set_mfb(struct usbnet *dev)
1213 {
1214         u16 mfb = AX_RX_CTL_MFB_16384;
1215         u16 rxctl;
1216         u16 medium;
1217         int old_rx_urb_size = dev->rx_urb_size;
1218
1219         if (dev->hard_mtu < 2048) {
1220                 dev->rx_urb_size = 2048;
1221                 mfb = AX_RX_CTL_MFB_2048;
1222         } else if (dev->hard_mtu < 4096) {
1223                 dev->rx_urb_size = 4096;
1224                 mfb = AX_RX_CTL_MFB_4096;
1225         } else if (dev->hard_mtu < 8192) {
1226                 dev->rx_urb_size = 8192;
1227                 mfb = AX_RX_CTL_MFB_8192;
1228         } else if (dev->hard_mtu < 16384) {
1229                 dev->rx_urb_size = 16384;
1230                 mfb = AX_RX_CTL_MFB_16384;
1231         }
1232
1233         rxctl = asix_read_rx_ctl(dev);
1234         asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1235
1236         medium = asix_read_medium_status(dev);
1237         if (dev->net->mtu > 1500)
1238                 medium |= AX_MEDIUM_JFE;
1239         else
1240                 medium &= ~AX_MEDIUM_JFE;
1241         asix_write_medium_mode(dev, medium);
1242
1243         if (dev->rx_urb_size > old_rx_urb_size)
1244                 usbnet_unlink_rx_urbs(dev);
1245 }
1246
1247 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1248 {
1249         struct usbnet *dev = netdev_priv(net);
1250         int ll_mtu = new_mtu + net->hard_header_len + 4;
1251
1252         netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
1253
1254         if (new_mtu <= 0 || ll_mtu > 16384)
1255                 return -EINVAL;
1256
1257         if ((ll_mtu % dev->maxpacket) == 0)
1258                 return -EDOM;
1259
1260         net->mtu = new_mtu;
1261         dev->hard_mtu = net->mtu + net->hard_header_len;
1262         ax88178_set_mfb(dev);
1263
1264         return 0;
1265 }
1266
1267 static const struct net_device_ops ax88178_netdev_ops = {
1268         .ndo_open               = usbnet_open,
1269         .ndo_stop               = usbnet_stop,
1270         .ndo_start_xmit         = usbnet_start_xmit,
1271         .ndo_tx_timeout         = usbnet_tx_timeout,
1272         .ndo_set_mac_address    = asix_set_mac_address,
1273         .ndo_validate_addr      = eth_validate_addr,
1274         .ndo_set_multicast_list = asix_set_multicast,
1275         .ndo_do_ioctl           = asix_ioctl,
1276         .ndo_change_mtu         = ax88178_change_mtu,
1277 };
1278
1279 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1280 {
1281         struct asix_data *data = (struct asix_data *)&dev->data;
1282         int ret;
1283         u8 buf[ETH_ALEN];
1284         __le16 eeprom;
1285         u8 status;
1286         int gpio0 = 0;
1287         u32 phyid;
1288
1289         usbnet_get_endpoints(dev,intf);
1290
1291         asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
1292         dbg("GPIO Status: 0x%04x", status);
1293
1294         asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1295         asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1296         asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1297
1298         dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1299
1300         if (eeprom == cpu_to_le16(0xffff)) {
1301                 data->phymode = PHY_MODE_MARVELL;
1302                 data->ledmode = 0;
1303                 gpio0 = 1;
1304         } else {
1305                 data->phymode = le16_to_cpu(eeprom) & 7;
1306                 data->ledmode = le16_to_cpu(eeprom) >> 8;
1307                 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
1308         }
1309         dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
1310
1311         asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
1312         if ((le16_to_cpu(eeprom) >> 8) != 1) {
1313                 asix_write_gpio(dev, 0x003c, 30);
1314                 asix_write_gpio(dev, 0x001c, 300);
1315                 asix_write_gpio(dev, 0x003c, 30);
1316         } else {
1317                 dbg("gpio phymode == 1 path");
1318                 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1319                 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1320         }
1321
1322         asix_sw_reset(dev, 0);
1323         msleep(150);
1324
1325         asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1326         msleep(150);
1327
1328         asix_write_rx_ctl(dev, 0);
1329
1330         /* Get the MAC address */
1331         if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
1332                                 0, 0, ETH_ALEN, buf)) < 0) {
1333                 dbg("Failed to read MAC address: %d", ret);
1334                 goto out;
1335         }
1336         memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1337
1338         /* Initialize MII structure */
1339         dev->mii.dev = dev->net;
1340         dev->mii.mdio_read = asix_mdio_read;
1341         dev->mii.mdio_write = asix_mdio_write;
1342         dev->mii.phy_id_mask = 0x1f;
1343         dev->mii.reg_num_mask = 0xff;
1344         dev->mii.supports_gmii = 1;
1345         dev->mii.phy_id = asix_get_phy_addr(dev);
1346
1347         dev->net->netdev_ops = &ax88178_netdev_ops;
1348         dev->net->ethtool_ops = &ax88178_ethtool_ops;
1349
1350         phyid = asix_get_phyid(dev);
1351         dbg("PHYID=0x%08x", phyid);
1352
1353         if (data->phymode == PHY_MODE_MARVELL) {
1354                 marvell_phy_init(dev);
1355                 msleep(60);
1356         }
1357
1358         asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1359                         BMCR_RESET | BMCR_ANENABLE);
1360         asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1361                         ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1362         asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1363                         ADVERTISE_1000FULL);
1364
1365         mii_nway_restart(&dev->mii);
1366
1367         if ((ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT)) < 0)
1368                 goto out;
1369
1370         if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
1371                 goto out;
1372
1373         /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1374         if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1375                 /* hard_mtu  is still the default - the device does not support
1376                    jumbo eth frames */
1377                 dev->rx_urb_size = 2048;
1378         }
1379         return 0;
1380
1381 out:
1382         return ret;
1383 }
1384
1385 static const struct driver_info ax8817x_info = {
1386         .description = "ASIX AX8817x USB 2.0 Ethernet",
1387         .bind = ax88172_bind,
1388         .status = asix_status,
1389         .link_reset = ax88172_link_reset,
1390         .reset = ax88172_link_reset,
1391         .flags =  FLAG_ETHER | FLAG_LINK_INTR,
1392         .data = 0x00130103,
1393 };
1394
1395 static const struct driver_info dlink_dub_e100_info = {
1396         .description = "DLink DUB-E100 USB Ethernet",
1397         .bind = ax88172_bind,
1398         .status = asix_status,
1399         .link_reset = ax88172_link_reset,
1400         .reset = ax88172_link_reset,
1401         .flags =  FLAG_ETHER | FLAG_LINK_INTR,
1402         .data = 0x009f9d9f,
1403 };
1404
1405 static const struct driver_info netgear_fa120_info = {
1406         .description = "Netgear FA-120 USB Ethernet",
1407         .bind = ax88172_bind,
1408         .status = asix_status,
1409         .link_reset = ax88172_link_reset,
1410         .reset = ax88172_link_reset,
1411         .flags =  FLAG_ETHER | FLAG_LINK_INTR,
1412         .data = 0x00130103,
1413 };
1414
1415 static const struct driver_info hawking_uf200_info = {
1416         .description = "Hawking UF200 USB Ethernet",
1417         .bind = ax88172_bind,
1418         .status = asix_status,
1419         .link_reset = ax88172_link_reset,
1420         .reset = ax88172_link_reset,
1421         .flags =  FLAG_ETHER | FLAG_LINK_INTR,
1422         .data = 0x001f1d1f,
1423 };
1424
1425 static const struct driver_info ax88772_info = {
1426         .description = "ASIX AX88772 USB 2.0 Ethernet",
1427         .bind = ax88772_bind,
1428         .status = asix_status,
1429         .link_reset = ax88772_link_reset,
1430         .reset = ax88772_link_reset,
1431         .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1432         .rx_fixup = asix_rx_fixup,
1433         .tx_fixup = asix_tx_fixup,
1434 };
1435
1436 static const struct driver_info ax88178_info = {
1437         .description = "ASIX AX88178 USB 2.0 Ethernet",
1438         .bind = ax88178_bind,
1439         .status = asix_status,
1440         .link_reset = ax88178_link_reset,
1441         .reset = ax88178_link_reset,
1442         .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1443         .rx_fixup = asix_rx_fixup,
1444         .tx_fixup = asix_tx_fixup,
1445 };
1446
1447 static const struct usb_device_id       products [] = {
1448 {
1449         // Linksys USB200M
1450         USB_DEVICE (0x077b, 0x2226),
1451         .driver_info =  (unsigned long) &ax8817x_info,
1452 }, {
1453         // Netgear FA120
1454         USB_DEVICE (0x0846, 0x1040),
1455         .driver_info =  (unsigned long) &netgear_fa120_info,
1456 }, {
1457         // DLink DUB-E100
1458         USB_DEVICE (0x2001, 0x1a00),
1459         .driver_info =  (unsigned long) &dlink_dub_e100_info,
1460 }, {
1461         // Intellinet, ST Lab USB Ethernet
1462         USB_DEVICE (0x0b95, 0x1720),
1463         .driver_info =  (unsigned long) &ax8817x_info,
1464 }, {
1465         // Hawking UF200, TrendNet TU2-ET100
1466         USB_DEVICE (0x07b8, 0x420a),
1467         .driver_info =  (unsigned long) &hawking_uf200_info,
1468 }, {
1469         // Billionton Systems, USB2AR
1470         USB_DEVICE (0x08dd, 0x90ff),
1471         .driver_info =  (unsigned long) &ax8817x_info,
1472 }, {
1473         // ATEN UC210T
1474         USB_DEVICE (0x0557, 0x2009),
1475         .driver_info =  (unsigned long) &ax8817x_info,
1476 }, {
1477         // Buffalo LUA-U2-KTX
1478         USB_DEVICE (0x0411, 0x003d),
1479         .driver_info =  (unsigned long) &ax8817x_info,
1480 }, {
1481         // Buffalo LUA-U2-GT 10/100/1000
1482         USB_DEVICE (0x0411, 0x006e),
1483         .driver_info =  (unsigned long) &ax88178_info,
1484 }, {
1485         // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1486         USB_DEVICE (0x6189, 0x182d),
1487         .driver_info =  (unsigned long) &ax8817x_info,
1488 }, {
1489         // corega FEther USB2-TX
1490         USB_DEVICE (0x07aa, 0x0017),
1491         .driver_info =  (unsigned long) &ax8817x_info,
1492 }, {
1493         // Surecom EP-1427X-2
1494         USB_DEVICE (0x1189, 0x0893),
1495         .driver_info = (unsigned long) &ax8817x_info,
1496 }, {
1497         // goodway corp usb gwusb2e
1498         USB_DEVICE (0x1631, 0x6200),
1499         .driver_info = (unsigned long) &ax8817x_info,
1500 }, {
1501         // JVC MP-PRX1 Port Replicator
1502         USB_DEVICE (0x04f1, 0x3008),
1503         .driver_info = (unsigned long) &ax8817x_info,
1504 }, {
1505         // ASIX AX88772B 10/100
1506         USB_DEVICE (0x0b95, 0x772b),
1507         .driver_info = (unsigned long) &ax88772_info,
1508 }, {
1509         // ASIX AX88772 10/100
1510         USB_DEVICE (0x0b95, 0x7720),
1511         .driver_info = (unsigned long) &ax88772_info,
1512 }, {
1513         // ASIX AX88178 10/100/1000
1514         USB_DEVICE (0x0b95, 0x1780),
1515         .driver_info = (unsigned long) &ax88178_info,
1516 }, {
1517         // Logitec LAN-GTJ/U2A
1518         USB_DEVICE (0x0789, 0x0160),
1519         .driver_info = (unsigned long) &ax88178_info,
1520 }, {
1521         // Linksys USB200M Rev 2
1522         USB_DEVICE (0x13b1, 0x0018),
1523         .driver_info = (unsigned long) &ax88772_info,
1524 }, {
1525         // 0Q0 cable ethernet
1526         USB_DEVICE (0x1557, 0x7720),
1527         .driver_info = (unsigned long) &ax88772_info,
1528 }, {
1529         // DLink DUB-E100 H/W Ver B1
1530         USB_DEVICE (0x07d1, 0x3c05),
1531         .driver_info = (unsigned long) &ax88772_info,
1532 }, {
1533         // DLink DUB-E100 H/W Ver B1 Alternate
1534         USB_DEVICE (0x2001, 0x3c05),
1535         .driver_info = (unsigned long) &ax88772_info,
1536 }, {
1537         // Linksys USB1000
1538         USB_DEVICE (0x1737, 0x0039),
1539         .driver_info = (unsigned long) &ax88178_info,
1540 }, {
1541         // IO-DATA ETG-US2
1542         USB_DEVICE (0x04bb, 0x0930),
1543         .driver_info = (unsigned long) &ax88178_info,
1544 }, {
1545         // Belkin F5D5055
1546         USB_DEVICE(0x050d, 0x5055),
1547         .driver_info = (unsigned long) &ax88178_info,
1548 }, {
1549         // Apple USB Ethernet Adapter
1550         USB_DEVICE(0x05ac, 0x1402),
1551         .driver_info = (unsigned long) &ax88772_info,
1552 }, {
1553         // Cables-to-Go USB Ethernet Adapter
1554         USB_DEVICE(0x0b95, 0x772a),
1555         .driver_info = (unsigned long) &ax88772_info,
1556 }, {
1557         // ABOCOM for pci
1558         USB_DEVICE(0x14ea, 0xab11),
1559         .driver_info = (unsigned long) &ax88178_info,
1560 }, {
1561         // ASIX 88772a
1562         USB_DEVICE(0x0db0, 0xa877),
1563         .driver_info = (unsigned long) &ax88772_info,
1564 },
1565         { },            // END
1566 };
1567 MODULE_DEVICE_TABLE(usb, products);
1568
1569 static struct usb_driver asix_driver = {
1570         .name =         "asix",
1571         .id_table =     products,
1572         .probe =        usbnet_probe,
1573         .suspend =      usbnet_suspend,
1574         .resume =       usbnet_resume,
1575         .disconnect =   usbnet_disconnect,
1576         .supports_autosuspend = 1,
1577 };
1578
1579 static int __init asix_init(void)
1580 {
1581         return usb_register(&asix_driver);
1582 }
1583 module_init(asix_init);
1584
1585 static void __exit asix_exit(void)
1586 {
1587         usb_deregister(&asix_driver);
1588 }
1589 module_exit(asix_exit);
1590
1591 MODULE_AUTHOR("David Hollis");
1592 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1593 MODULE_LICENSE("GPL");
1594