drivers/net/sunhme.c

   1 /* sunhme.c: Sparc HME/BigMac 10/100baseT half/full duplex auto switching,
   2  *           auto carrier detecting ethernet driver.  Also known as the
   3  *           "Happy Meal Ethernet" found on SunSwift SBUS cards.
   4  *
   5  * Copyright (C) 1996, 1998, 1999, 2002, 2003,
   6  *              2006, 2008 David S. Miller (davem@davemloft.net)
   7  *
   8  * Changes :
   9  * 2000/11/11 Willy Tarreau <willy AT meta-x.org>
  10  *   - port to non-sparc architectures. Tested only on x86 and
  11  *     only currently works with QFE PCI cards.
  12  *   - ability to specify the MAC address at module load time by passing this
  13  *     argument : macaddr=0x00,0x10,0x20,0x30,0x40,0x50
  14  */
  15
  16 #include <linux/module.h>
  17 #include <linux/kernel.h>
  18 #include <linux/types.h>
  19 #include <linux/fcntl.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/ioport.h>
  22 #include <linux/in.h>
  23 #include <linux/slab.h>
  24 #include <linux/string.h>
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/ethtool.h>
  28 #include <linux/mii.h>
  29 #include <linux/crc32.h>
  30 #include <linux/random.h>
  31 #include <linux/errno.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/etherdevice.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/mm.h>
  36 #include <linux/bitops.h>
  37 #include <linux/dma-mapping.h>
  38
  39 #include <asm/system.h>
  40 #include <asm/io.h>
  41 #include <asm/dma.h>
  42 #include <asm/byteorder.h>
  43
  44 #ifdef CONFIG_SPARC
  45 #include <linux/of.h>
  46 #include <linux/of_device.h>
  47 #include <asm/idprom.h>
  48 #include <asm/openprom.h>
  49 #include <asm/oplib.h>
  50 #include <asm/prom.h>
  51 #include <asm/auxio.h>
  52 #endif
  53 #include <asm/uaccess.h>
  54
  55 #include <asm/pgtable.h>
  56 #include <asm/irq.h>
  57
  58 #ifdef CONFIG_PCI
  59 #include <linux/pci.h>
  60 #endif
  61
  62 #include "sunhme.h"
  63
  64 #define DRV_NAME        "sunhme"
  65 #define DRV_VERSION     "3.10"
  66 #define DRV_RELDATE     "August 26, 2008"
  67 #define DRV_AUTHOR      "David S. Miller (davem@davemloft.net)"
  68
  69 static char version[] =
  70         DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
  71
  72 MODULE_VERSION(DRV_VERSION);
  73 MODULE_AUTHOR(DRV_AUTHOR);
  74 MODULE_DESCRIPTION("Sun HappyMealEthernet(HME) 10/100baseT ethernet driver");
  75 MODULE_LICENSE("GPL");
  76
  77 static int macaddr[6];
  78
  79 /* accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */
  80 module_param_array(macaddr, int, NULL, 0);
  81 MODULE_PARM_DESC(macaddr, "Happy Meal MAC address to set");
  82
  83 #ifdef CONFIG_SBUS
  84 static struct quattro *qfe_sbus_list;
  85 #endif
  86
  87 #ifdef CONFIG_PCI
  88 static struct quattro *qfe_pci_list;
  89 #endif
  90
  91 #undef HMEDEBUG
  92 #undef SXDEBUG
  93 #undef RXDEBUG
  94 #undef TXDEBUG
  95 #undef TXLOGGING
  96
  97 #ifdef TXLOGGING
  98 struct hme_tx_logent {
  99         unsigned int tstamp;
 100         int tx_new, tx_old;
 101         unsigned int action;
 102 #define TXLOG_ACTION_IRQ        0x01
 103 #define TXLOG_ACTION_TXMIT      0x02
 104 #define TXLOG_ACTION_TBUSY      0x04
 105 #define TXLOG_ACTION_NBUFS      0x08
 106         unsigned int status;
 107 };
 108 #define TX_LOG_LEN      128
 109 static struct hme_tx_logent tx_log[TX_LOG_LEN];
 110 static int txlog_cur_entry;
 111 static __inline__ void tx_add_log(struct happy_meal *hp, unsigned int a, unsigned int s)
 112 {
 113         struct hme_tx_logent *tlp;
 114         unsigned long flags;
 115
 116         local_irq_save(flags);
 117         tlp = &tx_log[txlog_cur_entry];
 118         tlp->tstamp = (unsigned int)jiffies;
 119         tlp->tx_new = hp->tx_new;
 120         tlp->tx_old = hp->tx_old;
 121         tlp->action = a;
 122         tlp->status = s;
 123         txlog_cur_entry = (txlog_cur_entry + 1) & (TX_LOG_LEN - 1);
 124         local_irq_restore(flags);
 125 }
 126 static __inline__ void tx_dump_log(void)
 127 {
 128         int i, this;
 129
 130         this = txlog_cur_entry;
 131         for (i = 0; i < TX_LOG_LEN; i++) {
 132                 printk("TXLOG[%d]: j[%08x] tx[N(%d)O(%d)] action[%08x] stat[%08x]\n", i,
 133                        tx_log[this].tstamp,
 134                        tx_log[this].tx_new, tx_log[this].tx_old,
 135                        tx_log[this].action, tx_log[this].status);
 136                 this = (this + 1) & (TX_LOG_LEN - 1);
 137         }
 138 }
 139 static __inline__ void tx_dump_ring(struct happy_meal *hp)
 140 {
 141         struct hmeal_init_block *hb = hp->happy_block;
 142         struct happy_meal_txd *tp = &hb->happy_meal_txd[0];
 143         int i;
 144
 145         for (i = 0; i < TX_RING_SIZE; i+=4) {
 146                 printk("TXD[%d..%d]: [%08x:%08x] [%08x:%08x] [%08x:%08x] [%08x:%08x]\n",
 147                        i, i + 4,
 148                        le32_to_cpu(tp[i].tx_flags), le32_to_cpu(tp[i].tx_addr),
 149                        le32_to_cpu(tp[i + 1].tx_flags), le32_to_cpu(tp[i + 1].tx_addr),
 150                        le32_to_cpu(tp[i + 2].tx_flags), le32_to_cpu(tp[i + 2].tx_addr),
 151                        le32_to_cpu(tp[i + 3].tx_flags), le32_to_cpu(tp[i + 3].tx_addr));
 152         }
 153 }
 154 #else
 155 #define tx_add_log(hp, a, s)            do { } while(0)
 156 #define tx_dump_log()                   do { } while(0)
 157 #define tx_dump_ring(hp)                do { } while(0)
 158 #endif
 159
 160 #ifdef HMEDEBUG
 161 #define HMD(x)  printk x
 162 #else
 163 #define HMD(x)
 164 #endif
 165
 166 /* #define AUTO_SWITCH_DEBUG */
 167
 168 #ifdef AUTO_SWITCH_DEBUG
 169 #define ASD(x)  printk x
 170 #else
 171 #define ASD(x)
 172 #endif
 173
 174 #define DEFAULT_IPG0      16 /* For lance-mode only */
 175 #define DEFAULT_IPG1       8 /* For all modes */
 176 #define DEFAULT_IPG2       4 /* For all modes */
 177 #define DEFAULT_JAMSIZE    4 /* Toe jam */
 178
 179 /* NOTE: In the descriptor writes one _must_ write the address
 180  *       member _first_.  The card must not be allowed to see
 181  *       the updated descriptor flags until the address is
 182  *       correct.  I've added a write memory barrier between
 183  *       the two stores so that I can sleep well at night... -DaveM
 184  */
 185
 186 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
 187 static void sbus_hme_write32(void __iomem *reg, u32 val)
 188 {
 189         sbus_writel(val, reg);
 190 }
 191
 192 static u32 sbus_hme_read32(void __iomem *reg)
 193 {
 194         return sbus_readl(reg);
 195 }
 196
 197 static void sbus_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
 198 {
 199         rxd->rx_addr = (__force hme32)addr;
 200         wmb();
 201         rxd->rx_flags = (__force hme32)flags;
 202 }
 203
 204 static void sbus_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
 205 {
 206         txd->tx_addr = (__force hme32)addr;
 207         wmb();
 208         txd->tx_flags = (__force hme32)flags;
 209 }
 210
 211 static u32 sbus_hme_read_desc32(hme32 *p)
 212 {
 213         return (__force u32)*p;
 214 }
 215
 216 static void pci_hme_write32(void __iomem *reg, u32 val)
 217 {
 218         writel(val, reg);
 219 }
 220
 221 static u32 pci_hme_read32(void __iomem *reg)
 222 {
 223         return readl(reg);
 224 }
 225
 226 static void pci_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
 227 {
 228         rxd->rx_addr = (__force hme32)cpu_to_le32(addr);
 229         wmb();
 230         rxd->rx_flags = (__force hme32)cpu_to_le32(flags);
 231 }
 232
 233 static void pci_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
 234 {
 235         txd->tx_addr = (__force hme32)cpu_to_le32(addr);
 236         wmb();
 237         txd->tx_flags = (__force hme32)cpu_to_le32(flags);
 238 }
 239
 240 static u32 pci_hme_read_desc32(hme32 *p)
 241 {
 242         return le32_to_cpup((__le32 *)p);
 243 }
 244
 245 #define hme_write32(__hp, __reg, __val) \
 246         ((__hp)->write32((__reg), (__val)))
 247 #define hme_read32(__hp, __reg) \
 248         ((__hp)->read32(__reg))
 249 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
 250         ((__hp)->write_rxd((__rxd), (__flags), (__addr)))
 251 #define hme_write_txd(__hp, __txd, __flags, __addr) \
 252         ((__hp)->write_txd((__txd), (__flags), (__addr)))
 253 #define hme_read_desc32(__hp, __p) \
 254         ((__hp)->read_desc32(__p))
 255 #define hme_dma_map(__hp, __ptr, __size, __dir) \
 256         ((__hp)->dma_map((__hp)->dma_dev, (__ptr), (__size), (__dir)))
 257 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
 258         ((__hp)->dma_unmap((__hp)->dma_dev, (__addr), (__size), (__dir)))
 259 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
 260         ((__hp)->dma_sync_for_cpu((__hp)->dma_dev, (__addr), (__size), (__dir)))
 261 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
 262         ((__hp)->dma_sync_for_device((__hp)->dma_dev, (__addr), (__size), (__dir)))
 263 #else
 264 #ifdef CONFIG_SBUS
 265 /* SBUS only compilation */
 266 #define hme_write32(__hp, __reg, __val) \
 267         sbus_writel((__val), (__reg))
 268 #define hme_read32(__hp, __reg) \
 269         sbus_readl(__reg)
 270 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
 271 do {    (__rxd)->rx_addr = (__force hme32)(u32)(__addr); \
 272         wmb(); \
 273         (__rxd)->rx_flags = (__force hme32)(u32)(__flags); \
 274 } while(0)
 275 #define hme_write_txd(__hp, __txd, __flags, __addr) \
 276 do {    (__txd)->tx_addr = (__force hme32)(u32)(__addr); \
 277         wmb(); \
 278         (__txd)->tx_flags = (__force hme32)(u32)(__flags); \
 279 } while(0)
 280 #define hme_read_desc32(__hp, __p)      ((__force u32)(hme32)*(__p))
 281 #define hme_dma_map(__hp, __ptr, __size, __dir) \
 282         dma_map_single((__hp)->dma_dev, (__ptr), (__size), (__dir))
 283 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
 284         dma_unmap_single((__hp)->dma_dev, (__addr), (__size), (__dir))
 285 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
 286         dma_dma_sync_single_for_cpu((__hp)->dma_dev, (__addr), (__size), (__dir))
 287 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
 288         dma_dma_sync_single_for_device((__hp)->dma_dev, (__addr), (__size), (__dir))
 289 #else
 290 /* PCI only compilation */
 291 #define hme_write32(__hp, __reg, __val) \
 292         writel((__val), (__reg))
 293 #define hme_read32(__hp, __reg) \
 294         readl(__reg)
 295 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
 296 do {    (__rxd)->rx_addr = (__force hme32)cpu_to_le32(__addr); \
 297         wmb(); \
 298         (__rxd)->rx_flags = (__force hme32)cpu_to_le32(__flags); \
 299 } while(0)
 300 #define hme_write_txd(__hp, __txd, __flags, __addr) \
 301 do {    (__txd)->tx_addr = (__force hme32)cpu_to_le32(__addr); \
 302         wmb(); \
 303         (__txd)->tx_flags = (__force hme32)cpu_to_le32(__flags); \
 304 } while(0)
 305 static inline u32 hme_read_desc32(struct happy_meal *hp, hme32 *p)
 306 {
 307         return le32_to_cpup((__le32 *)p);
 308 }
 309 #define hme_dma_map(__hp, __ptr, __size, __dir) \
 310         pci_map_single((__hp)->dma_dev, (__ptr), (__size), (__dir))
 311 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
 312         pci_unmap_single((__hp)->dma_dev, (__addr), (__size), (__dir))
 313 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
 314         pci_dma_sync_single_for_cpu((__hp)->dma_dev, (__addr), (__size), (__dir))
 315 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
 316         pci_dma_sync_single_for_device((__hp)->dma_dev, (__addr), (__size), (__dir))
 317 #endif
 318 #endif
 319
 320
 321 /* Oh yes, the MIF BitBang is mighty fun to program.  BitBucket is more like it. */
 322 static void BB_PUT_BIT(struct happy_meal *hp, void __iomem *tregs, int bit)
 323 {
 324         hme_write32(hp, tregs + TCVR_BBDATA, bit);
 325         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
 326         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
 327 }
 328
 329 #if 0
 330 static u32 BB_GET_BIT(struct happy_meal *hp, void __iomem *tregs, int internal)
 331 {
 332         u32 ret;
 333
 334         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
 335         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
 336         ret = hme_read32(hp, tregs + TCVR_CFG);
 337         if (internal)
 338                 ret &= TCV_CFG_MDIO0;
 339         else
 340                 ret &= TCV_CFG_MDIO1;
 341
 342         return ret;
 343 }
 344 #endif
 345
 346 static u32 BB_GET_BIT2(struct happy_meal *hp, void __iomem *tregs, int internal)
 347 {
 348         u32 retval;
 349
 350         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
 351         udelay(1);
 352         retval = hme_read32(hp, tregs + TCVR_CFG);
 353         if (internal)
 354                 retval &= TCV_CFG_MDIO0;
 355         else
 356                 retval &= TCV_CFG_MDIO1;
 357         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
 358
 359         return retval;
 360 }
 361
 362 #define TCVR_FAILURE      0x80000000     /* Impossible MIF read value */
 363
 364 static int happy_meal_bb_read(struct happy_meal *hp,
 365                               void __iomem *tregs, int reg)
 366 {
 367         u32 tmp;
 368         int retval = 0;
 369         int i;
 370
 371         ASD(("happy_meal_bb_read: reg=%d ", reg));
 372
 373         /* Enable the MIF BitBang outputs. */
 374         hme_write32(hp, tregs + TCVR_BBOENAB, 1);
 375
 376         /* Force BitBang into the idle state. */
 377         for (i = 0; i < 32; i++)
 378                 BB_PUT_BIT(hp, tregs, 1);
 379
 380         /* Give it the read sequence. */
 381         BB_PUT_BIT(hp, tregs, 0);
 382         BB_PUT_BIT(hp, tregs, 1);
 383         BB_PUT_BIT(hp, tregs, 1);
 384         BB_PUT_BIT(hp, tregs, 0);
 385
 386         /* Give it the PHY address. */
 387         tmp = hp->paddr & 0xff;
 388         for (i = 4; i >= 0; i--)
 389                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 390
 391         /* Tell it what register we want to read. */
 392         tmp = (reg & 0xff);
 393         for (i = 4; i >= 0; i--)
 394                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 395
 396         /* Close down the MIF BitBang outputs. */
 397         hme_write32(hp, tregs + TCVR_BBOENAB, 0);
 398
 399         /* Now read in the value. */
 400         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 401         for (i = 15; i >= 0; i--)
 402                 retval |= BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 403         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 404         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 405         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 406         ASD(("value=%x\n", retval));
 407         return retval;
 408 }
 409
 410 static void happy_meal_bb_write(struct happy_meal *hp,
 411                                 void __iomem *tregs, int reg,
 412                                 unsigned short value)
 413 {
 414         u32 tmp;
 415         int i;
 416
 417         ASD(("happy_meal_bb_write: reg=%d value=%x\n", reg, value));
 418
 419         /* Enable the MIF BitBang outputs. */
 420         hme_write32(hp, tregs + TCVR_BBOENAB, 1);
 421
 422         /* Force BitBang into the idle state. */
 423         for (i = 0; i < 32; i++)
 424                 BB_PUT_BIT(hp, tregs, 1);
 425
 426         /* Give it write sequence. */
 427         BB_PUT_BIT(hp, tregs, 0);
 428         BB_PUT_BIT(hp, tregs, 1);
 429         BB_PUT_BIT(hp, tregs, 0);
 430         BB_PUT_BIT(hp, tregs, 1);
 431
 432         /* Give it the PHY address. */
 433         tmp = (hp->paddr & 0xff);
 434         for (i = 4; i >= 0; i--)
 435                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 436
 437         /* Tell it what register we will be writing. */
 438         tmp = (reg & 0xff);
 439         for (i = 4; i >= 0; i--)
 440                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 441
 442         /* Tell it to become ready for the bits. */
 443         BB_PUT_BIT(hp, tregs, 1);
 444         BB_PUT_BIT(hp, tregs, 0);
 445
 446         for (i = 15; i >= 0; i--)
 447                 BB_PUT_BIT(hp, tregs, ((value >> i) & 1));
 448
 449         /* Close down the MIF BitBang outputs. */
 450         hme_write32(hp, tregs + TCVR_BBOENAB, 0);
 451 }
 452
 453 #define TCVR_READ_TRIES   16
 454
 455 static int happy_meal_tcvr_read(struct happy_meal *hp,
 456                                 void __iomem *tregs, int reg)
 457 {
 458         int tries = TCVR_READ_TRIES;
 459         int retval;
 460
 461         ASD(("happy_meal_tcvr_read: reg=0x%02x ", reg));
 462         if (hp->tcvr_type == none) {
 463                 ASD(("no transceiver, value=TCVR_FAILURE\n"));
 464                 return TCVR_FAILURE;
 465         }
 466
 467         if (!(hp->happy_flags & HFLAG_FENABLE)) {
 468                 ASD(("doing bit bang\n"));
 469                 return happy_meal_bb_read(hp, tregs, reg);
 470         }
 471
 472         hme_write32(hp, tregs + TCVR_FRAME,
 473                     (FRAME_READ | (hp->paddr << 23) | ((reg & 0xff) << 18)));
 474         while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
 475                 udelay(20);
 476         if (!tries) {
 477                 printk(KERN_ERR "happy meal: Aieee, transceiver MIF read bolixed\n");
 478                 return TCVR_FAILURE;
 479         }
 480         retval = hme_read32(hp, tregs + TCVR_FRAME) & 0xffff;
 481         ASD(("value=%04x\n", retval));
 482         return retval;
 483 }
 484
 485 #define TCVR_WRITE_TRIES  16
 486
 487 static void happy_meal_tcvr_write(struct happy_meal *hp,
 488                                   void __iomem *tregs, int reg,
 489                                   unsigned short value)
 490 {
 491         int tries = TCVR_WRITE_TRIES;
 492
 493         ASD(("happy_meal_tcvr_write: reg=0x%02x value=%04x\n", reg, value));
 494
 495         /* Welcome to Sun Microsystems, can I take your order please? */
 496         if (!(hp->happy_flags & HFLAG_FENABLE)) {
 497                 happy_meal_bb_write(hp, tregs, reg, value);
 498                 return;
 499         }
 500
 501         /* Would you like fries with that? */
 502         hme_write32(hp, tregs + TCVR_FRAME,
 503                     (FRAME_WRITE | (hp->paddr << 23) |
 504                      ((reg & 0xff) << 18) | (value & 0xffff)));
 505         while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
 506                 udelay(20);
 507
 508         /* Anything else? */
 509         if (!tries)
 510                 printk(KERN_ERR "happy meal: Aieee, transceiver MIF write bolixed\n");
 511
 512         /* Fifty-two cents is your change, have a nice day. */
 513 }
 514
 515 /* Auto negotiation.  The scheme is very simple.  We have a timer routine
 516  * that keeps watching the auto negotiation process as it progresses.
 517  * The DP83840 is first told to start doing it's thing, we set up the time
 518  * and place the timer state machine in it's initial state.
 519  *
 520  * Here the timer peeks at the DP83840 status registers at each click to see
 521  * if the auto negotiation has completed, we assume here that the DP83840 PHY
 522  * will time out at some point and just tell us what (didn't) happen.  For
 523  * complete coverage we only allow so many of the ticks at this level to run,
 524  * when this has expired we print a warning message and try another strategy.
 525  * This "other" strategy is to force the interface into various speed/duplex
 526  * configurations and we stop when we see a link-up condition before the
 527  * maximum number of "peek" ticks have occurred.
 528  *
 529  * Once a valid link status has been detected we configure the BigMAC and
 530  * the rest of the Happy Meal to speak the most efficient protocol we could
 531  * get a clean link for.  The priority for link configurations, highest first
 532  * is:
 533  *                 100 Base-T Full Duplex
 534  *                 100 Base-T Half Duplex
 535  *                 10 Base-T Full Duplex
 536  *                 10 Base-T Half Duplex
 537  *
 538  * We start a new timer now, after a successful auto negotiation status has
 539  * been detected.  This timer just waits for the link-up bit to get set in
 540  * the BMCR of the DP83840.  When this occurs we print a kernel log message
 541  * describing the link type in use and the fact that it is up.
 542  *
 543  * If a fatal error of some sort is signalled and detected in the interrupt
 544  * service routine, and the chip is reset, or the link is ifconfig'd down
 545  * and then back up, this entire process repeats itself all over again.
 546  */
 547 static int try_next_permutation(struct happy_meal *hp, void __iomem *tregs)
 548 {
 549         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 550
 551         /* Downgrade from full to half duplex.  Only possible
 552          * via ethtool.
 553          */
 554         if (hp->sw_bmcr & BMCR_FULLDPLX) {
 555                 hp->sw_bmcr &= ~(BMCR_FULLDPLX);
 556                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
 557                 return 0;
 558         }
 559
 560         /* Downgrade from 100 to 10. */
 561         if (hp->sw_bmcr & BMCR_SPEED100) {
 562                 hp->sw_bmcr &= ~(BMCR_SPEED100);
 563                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
 564                 return 0;
 565         }
 566
 567         /* We've tried everything. */
 568         return -1;
 569 }
 570
 571 static void display_link_mode(struct happy_meal *hp, void __iomem *tregs)
 572 {
 573         printk(KERN_INFO "%s: Link is up using ", hp->dev->name);
 574         if (hp->tcvr_type == external)
 575                 printk("external ");
 576         else
 577                 printk("internal ");
 578         printk("transceiver at ");
 579         hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
 580         if (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) {
 581                 if (hp->sw_lpa & LPA_100FULL)
 582                         printk("100Mb/s, Full Duplex.\n");
 583                 else
 584                         printk("100Mb/s, Half Duplex.\n");
 585         } else {
 586                 if (hp->sw_lpa & LPA_10FULL)
 587                         printk("10Mb/s, Full Duplex.\n");
 588                 else
 589                         printk("10Mb/s, Half Duplex.\n");
 590         }
 591 }
 592
 593 static void display_forced_link_mode(struct happy_meal *hp, void __iomem *tregs)
 594 {
 595         printk(KERN_INFO "%s: Link has been forced up using ", hp->dev->name);
 596         if (hp->tcvr_type == external)
 597                 printk("external ");
 598         else
 599                 printk("internal ");
 600         printk("transceiver at ");
 601         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 602         if (hp->sw_bmcr & BMCR_SPEED100)
 603                 printk("100Mb/s, ");
 604         else
 605                 printk("10Mb/s, ");
 606         if (hp->sw_bmcr & BMCR_FULLDPLX)
 607                 printk("Full Duplex.\n");
 608         else
 609                 printk("Half Duplex.\n");
 610 }
 611
 612 static int set_happy_link_modes(struct happy_meal *hp, void __iomem *tregs)
 613 {
 614         int full;
 615
 616         /* All we care about is making sure the bigmac tx_cfg has a
 617          * proper duplex setting.
 618          */
 619         if (hp->timer_state == arbwait) {
 620                 hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
 621                 if (!(hp->sw_lpa & (LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL)))
 622                         goto no_response;
 623                 if (hp->sw_lpa & LPA_100FULL)
 624                         full = 1;
 625                 else if (hp->sw_lpa & LPA_100HALF)
 626                         full = 0;
 627                 else if (hp->sw_lpa & LPA_10FULL)
 628                         full = 1;
 629                 else
 630                         full = 0;
 631         } else {
 632                 /* Forcing a link mode. */
 633                 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 634                 if (hp->sw_bmcr & BMCR_FULLDPLX)
 635                         full = 1;
 636                 else
 637                         full = 0;
 638         }
 639
 640         /* Before changing other bits in the tx_cfg register, and in
 641          * general any of other the TX config registers too, you
 642          * must:
 643          * 1) Clear Enable
 644          * 2) Poll with reads until that bit reads back as zero
 645          * 3) Make TX configuration changes
 646          * 4) Set Enable once more
 647          */
 648         hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 649                     hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
 650                     ~(BIGMAC_TXCFG_ENABLE));
 651         while (hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) & BIGMAC_TXCFG_ENABLE)
 652                 barrier();
 653         if (full) {
 654                 hp->happy_flags |= HFLAG_FULL;
 655                 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 656                             hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
 657                             BIGMAC_TXCFG_FULLDPLX);
 658         } else {
 659                 hp->happy_flags &= ~(HFLAG_FULL);
 660                 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 661                             hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
 662                             ~(BIGMAC_TXCFG_FULLDPLX));
 663         }
 664         hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 665                     hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
 666                     BIGMAC_TXCFG_ENABLE);
 667         return 0;
 668 no_response:
 669         return 1;
 670 }
 671
 672 static int happy_meal_init(struct happy_meal *hp);
 673
 674 static int is_lucent_phy(struct happy_meal *hp)
 675 {
 676         void __iomem *tregs = hp->tcvregs;
 677         unsigned short mr2, mr3;
 678         int ret = 0;
 679
 680         mr2 = happy_meal_tcvr_read(hp, tregs, 2);
 681         mr3 = happy_meal_tcvr_read(hp, tregs, 3);
 682         if ((mr2 & 0xffff) == 0x0180 &&
 683             ((mr3 & 0xffff) >> 10) == 0x1d)
 684                 ret = 1;
 685
 686         return ret;
 687 }
 688
 689 static void happy_meal_timer(unsigned long data)
 690 {
 691         struct happy_meal *hp = (struct happy_meal *) data;
 692         void __iomem *tregs = hp->tcvregs;
 693         int restart_timer = 0;
 694
 695         spin_lock_irq(&hp->happy_lock);
 696
 697         hp->timer_ticks++;
 698         switch(hp->timer_state) {
 699         case arbwait:
 700                 /* Only allow for 5 ticks, thats 10 seconds and much too
 701                  * long to wait for arbitration to complete.
 702                  */
 703                 if (hp->timer_ticks >= 10) {
 704                         /* Enter force mode. */
 705         do_force_mode:
 706                         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 707                         printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful, trying force link mode\n",
 708                                hp->dev->name);
 709                         hp->sw_bmcr = BMCR_SPEED100;
 710                         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
 711
 712                         if (!is_lucent_phy(hp)) {
 713                                 /* OK, seems we need do disable the transceiver for the first
 714                                  * tick to make sure we get an accurate link state at the
 715                                  * second tick.
 716                                  */
 717                                 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
 718                                 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
 719                                 happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG, hp->sw_csconfig);
 720                         }
 721                         hp->timer_state = ltrywait;
 722                         hp->timer_ticks = 0;
 723                         restart_timer = 1;
 724                 } else {
 725                         /* Anything interesting happen? */
 726                         hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
 727                         if (hp->sw_bmsr & BMSR_ANEGCOMPLETE) {
 728                                 int ret;
 729
 730                                 /* Just what we've been waiting for... */
 731                                 ret = set_happy_link_modes(hp, tregs);
 732                                 if (ret) {
 733                                         /* Ooops, something bad happened, go to force
 734                                          * mode.
 735                                          *
 736                                          * XXX Broken hubs which don't support 802.3u
 737                                          * XXX auto-negotiation make this happen as well.
 738                                          */
 739                                         goto do_force_mode;
 740                                 }
 741
 742                                 /* Success, at least so far, advance our state engine. */
 743                                 hp->timer_state = lupwait;
 744                                 restart_timer = 1;
 745                         } else {
 746                                 restart_timer = 1;
 747                         }
 748                 }
 749                 break;
 750
 751         case lupwait:
 752                 /* Auto negotiation was successful and we are awaiting a
 753                  * link up status.  I have decided to let this timer run
 754                  * forever until some sort of error is signalled, reporting
 755                  * a message to the user at 10 second intervals.
 756                  */
 757                 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
 758                 if (hp->sw_bmsr & BMSR_LSTATUS) {
 759                         /* Wheee, it's up, display the link mode in use and put
 760                          * the timer to sleep.
 761                          */
 762                         display_link_mode(hp, tregs);
 763                         hp->timer_state = asleep;
 764                         restart_timer = 0;
 765                 } else {
 766                         if (hp->timer_ticks >= 10) {
 767                                 printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
 768                                        "not completely up.\n", hp->dev->name);
 769                                 hp->timer_ticks = 0;
 770                                 restart_timer = 1;
 771                         } else {
 772                                 restart_timer = 1;
 773                         }
 774                 }
 775                 break;
 776
 777         case ltrywait:
 778                 /* Making the timeout here too long can make it take
 779                  * annoyingly long to attempt all of the link mode
 780                  * permutations, but then again this is essentially
 781                  * error recovery code for the most part.
 782                  */
 783                 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
 784                 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
 785                 if (hp->timer_ticks == 1) {
 786                         if (!is_lucent_phy(hp)) {
 787                                 /* Re-enable transceiver, we'll re-enable the transceiver next
 788                                  * tick, then check link state on the following tick.
 789                                  */
 790                                 hp->sw_csconfig |= CSCONFIG_TCVDISAB;
 791                                 happy_meal_tcvr_write(hp, tregs,
 792                                                       DP83840_CSCONFIG, hp->sw_csconfig);
 793                         }
 794                         restart_timer = 1;
 795                         break;
 796                 }
 797                 if (hp->timer_ticks == 2) {
 798                         if (!is_lucent_phy(hp)) {
 799                                 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
 800                                 happy_meal_tcvr_write(hp, tregs,
 801                                                       DP83840_CSCONFIG, hp->sw_csconfig);
 802                         }
 803                         restart_timer = 1;
 804                         break;
 805                 }
 806                 if (hp->sw_bmsr & BMSR_LSTATUS) {
 807                         /* Force mode selection success. */
 808                         display_forced_link_mode(hp, tregs);
 809                         set_happy_link_modes(hp, tregs); /* XXX error? then what? */
 810                         hp->timer_state = asleep;
 811                         restart_timer = 0;
 812                 } else {
 813                         if (hp->timer_ticks >= 4) { /* 6 seconds or so... */
 814                                 int ret;
 815
 816                                 ret = try_next_permutation(hp, tregs);
 817                                 if (ret == -1) {
 818                                         /* Aieee, tried them all, reset the
 819                                          * chip and try all over again.
 820                                          */
 821
 822                                         /* Let the user know... */
 823                                         printk(KERN_NOTICE "%s: Link down, cable problem?\n",
 824                                                hp->dev->name);
 825
 826                                         ret = happy_meal_init(hp);
 827                                         if (ret) {
 828                                                 /* ho hum... */
 829                                                 printk(KERN_ERR "%s: Error, cannot re-init the "
 830                                                        "Happy Meal.\n", hp->dev->name);
 831                                         }
 832                                         goto out;
 833                                 }
 834                                 if (!is_lucent_phy(hp)) {
 835                                         hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
 836                                                                                DP83840_CSCONFIG);
 837                                         hp->sw_csconfig |= CSCONFIG_TCVDISAB;
 838                                         happy_meal_tcvr_write(hp, tregs,
 839                                                               DP83840_CSCONFIG, hp->sw_csconfig);
 840                                 }
 841                                 hp->timer_ticks = 0;
 842                                 restart_timer = 1;
 843                         } else {
 844                                 restart_timer = 1;
 845                         }
 846                 }
 847                 break;
 848
 849         case asleep:
 850         default:
 851                 /* Can't happens.... */
 852                 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got one anyways!\n",
 853                        hp->dev->name);
 854                 restart_timer = 0;
 855                 hp->timer_ticks = 0;
 856                 hp->timer_state = asleep; /* foo on you */
 857                 break;
 858         };
 859
 860         if (restart_timer) {
 861                 hp->happy_timer.expires = jiffies + ((12 * HZ)/10); /* 1.2 sec. */
 862                 add_timer(&hp->happy_timer);
 863         }
 864
 865 out:
 866         spin_unlock_irq(&hp->happy_lock);
 867 }
 868
 869 #define TX_RESET_TRIES     32
 870 #define RX_RESET_TRIES     32
 871
 872 /* hp->happy_lock must be held */
 873 static void happy_meal_tx_reset(struct happy_meal *hp, void __iomem *bregs)
 874 {
 875         int tries = TX_RESET_TRIES;
 876
 877         HMD(("happy_meal_tx_reset: reset, "));
 878
 879         /* Would you like to try our SMCC Delux? */
 880         hme_write32(hp, bregs + BMAC_TXSWRESET, 0);
 881         while ((hme_read32(hp, bregs + BMAC_TXSWRESET) & 1) && --tries)
 882                 udelay(20);
 883
 884         /* Lettuce, tomato, buggy hardware (no extra charge)? */
 885         if (!tries)
 886                 printk(KERN_ERR "happy meal: Transceiver BigMac ATTACK!");
 887
 888         /* Take care. */
 889         HMD(("done\n"));
 890 }
 891
 892 /* hp->happy_lock must be held */
 893 static void happy_meal_rx_reset(struct happy_meal *hp, void __iomem *bregs)
 894 {
 895         int tries = RX_RESET_TRIES;
 896
 897         HMD(("happy_meal_rx_reset: reset, "));
 898
 899         /* We have a special on GNU/Viking hardware bugs today. */
 900         hme_write32(hp, bregs + BMAC_RXSWRESET, 0);
 901         while ((hme_read32(hp, bregs + BMAC_RXSWRESET) & 1) && --tries)
 902                 udelay(20);
 903
 904         /* Will that be all? */
 905         if (!tries)
 906                 printk(KERN_ERR "happy meal: Receiver BigMac ATTACK!");
 907
 908         /* Don't forget your vik_1137125_wa.  Have a nice day. */
 909         HMD(("done\n"));
 910 }
 911
 912 #define STOP_TRIES         16
 913
 914 /* hp->happy_lock must be held */
 915 static void happy_meal_stop(struct happy_meal *hp, void __iomem *gregs)
 916 {
 917         int tries = STOP_TRIES;
 918
 919         HMD(("happy_meal_stop: reset, "));
 920
 921         /* We're consolidating our STB products, it's your lucky day. */
 922         hme_write32(hp, gregs + GREG_SWRESET, GREG_RESET_ALL);
 923         while (hme_read32(hp, gregs + GREG_SWRESET) && --tries)
 924                 udelay(20);
 925
 926         /* Come back next week when we are "Sun Microelectronics". */
 927         if (!tries)
 928                 printk(KERN_ERR "happy meal: Fry guys.");
 929
 930         /* Remember: "Different name, same old buggy as shit hardware." */
 931         HMD(("done\n"));
 932 }
 933
 934 /* hp->happy_lock must be held */
 935 static void happy_meal_get_counters(struct happy_meal *hp, void __iomem *bregs)
 936 {
 937         struct net_device_stats *stats = &hp->net_stats;
 938
 939         stats->rx_crc_errors += hme_read32(hp, bregs + BMAC_RCRCECTR);
 940         hme_write32(hp, bregs + BMAC_RCRCECTR, 0);
 941
 942         stats->rx_frame_errors += hme_read32(hp, bregs + BMAC_UNALECTR);
 943         hme_write32(hp, bregs + BMAC_UNALECTR, 0);
 944
 945         stats->rx_length_errors += hme_read32(hp, bregs + BMAC_GLECTR);
 946         hme_write32(hp, bregs + BMAC_GLECTR, 0);
 947
 948         stats->tx_aborted_errors += hme_read32(hp, bregs + BMAC_EXCTR);
 949
 950         stats->collisions +=
 951                 (hme_read32(hp, bregs + BMAC_EXCTR) +
 952                  hme_read32(hp, bregs + BMAC_LTCTR));
 953         hme_write32(hp, bregs + BMAC_EXCTR, 0);
 954         hme_write32(hp, bregs + BMAC_LTCTR, 0);
 955 }
 956
 957 /* hp->happy_lock must be held */
 958 static void happy_meal_poll_stop(struct happy_meal *hp, void __iomem *tregs)
 959 {
 960         ASD(("happy_meal_poll_stop: "));
 961
 962         /* If polling disabled or not polling already, nothing to do. */
 963         if ((hp->happy_flags & (HFLAG_POLLENABLE | HFLAG_POLL)) !=
 964            (HFLAG_POLLENABLE | HFLAG_POLL)) {
 965                 HMD(("not polling, return\n"));
 966                 return;
 967         }
 968
 969         /* Shut up the MIF. */
 970         ASD(("were polling, mif ints off, "));
 971         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
 972
 973         /* Turn off polling. */
 974         ASD(("polling off, "));
 975         hme_write32(hp, tregs + TCVR_CFG,
 976                     hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_PENABLE));
 977
 978         /* We are no longer polling. */
 979         hp->happy_flags &= ~(HFLAG_POLL);
 980
 981         /* Let the bits set. */
 982         udelay(200);
 983         ASD(("done\n"));
 984 }
 985
 986 /* Only Sun can take such nice parts and fuck up the programming interface
 987  * like this.  Good job guys...
 988  */
 989 #define TCVR_RESET_TRIES       16 /* It should reset quickly        */
 990 #define TCVR_UNISOLATE_TRIES   32 /* Dis-isolation can take longer. */
 991
 992 /* hp->happy_lock must be held */
 993 static int happy_meal_tcvr_reset(struct happy_meal *hp, void __iomem *tregs)
 994 {
 995         u32 tconfig;
 996         int result, tries = TCVR_RESET_TRIES;
 997
 998         tconfig = hme_read32(hp, tregs + TCVR_CFG);
 999         ASD(("happy_meal_tcvr_reset: tcfg<%08lx> ", tconfig));
1000         if (hp->tcvr_type == external) {
1001                 ASD(("external<"));
1002                 hme_write32(hp, tregs + TCVR_CFG, tconfig & ~(TCV_CFG_PSELECT));
1003                 hp->tcvr_type = internal;
1004                 hp->paddr = TCV_PADDR_ITX;
1005                 ASD(("ISOLATE,"));
1006                 happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1007                                       (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1008                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1009                 if (result == TCVR_FAILURE) {
1010                         ASD(("phyread_fail>\n"));
1011                         return -1;
1012                 }
1013                 ASD(("phyread_ok,PSELECT>"));
1014                 hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1015                 hp->tcvr_type = external;
1016                 hp->paddr = TCV_PADDR_ETX;
1017         } else {
1018                 if (tconfig & TCV_CFG_MDIO1) {
1019                         ASD(("internal<PSELECT,"));
1020                         hme_write32(hp, tregs + TCVR_CFG, (tconfig | TCV_CFG_PSELECT));
1021                         ASD(("ISOLATE,"));
1022                         happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1023                                               (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1024                         result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1025                         if (result == TCVR_FAILURE) {
1026                                 ASD(("phyread_fail>\n"));
1027                                 return -1;
1028                         }
1029                         ASD(("phyread_ok,~PSELECT>"));
1030                         hme_write32(hp, tregs + TCVR_CFG, (tconfig & ~(TCV_CFG_PSELECT)));
1031                         hp->tcvr_type = internal;
1032                         hp->paddr = TCV_PADDR_ITX;
1033                 }
1034         }
1035
1036         ASD(("BMCR_RESET "));
1037         happy_meal_tcvr_write(hp, tregs, MII_BMCR, BMCR_RESET);
1038
1039         while (--tries) {
1040                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1041                 if (result == TCVR_FAILURE)
1042                         return -1;
1043                 hp->sw_bmcr = result;
1044                 if (!(result & BMCR_RESET))
1045                         break;
1046                 udelay(20);
1047         }
1048         if (!tries) {
1049                 ASD(("BMCR RESET FAILED!\n"));
1050                 return -1;
1051         }
1052         ASD(("RESET_OK\n"));
1053
1054         /* Get fresh copies of the PHY registers. */
1055         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1056         hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1057         hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1058         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1059
1060         ASD(("UNISOLATE"));
1061         hp->sw_bmcr &= ~(BMCR_ISOLATE);
1062         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1063
1064         tries = TCVR_UNISOLATE_TRIES;
1065         while (--tries) {
1066                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1067                 if (result == TCVR_FAILURE)
1068                         return -1;
1069                 if (!(result & BMCR_ISOLATE))
1070                         break;
1071                 udelay(20);
1072         }
1073         if (!tries) {
1074                 ASD((" FAILED!\n"));
1075                 return -1;
1076         }
1077         ASD((" SUCCESS and CSCONFIG_DFBYPASS\n"));
1078         if (!is_lucent_phy(hp)) {
1079                 result = happy_meal_tcvr_read(hp, tregs,
1080                                               DP83840_CSCONFIG);
1081                 happy_meal_tcvr_write(hp, tregs,
1082                                       DP83840_CSCONFIG, (result | CSCONFIG_DFBYPASS));
1083         }
1084         return 0;
1085 }
1086
1087 /* Figure out whether we have an internal or external transceiver.
1088  *
1089  * hp->happy_lock must be held
1090  */
1091 static void happy_meal_transceiver_check(struct happy_meal *hp, void __iomem *tregs)
1092 {
1093         unsigned long tconfig = hme_read32(hp, tregs + TCVR_CFG);
1094
1095         ASD(("happy_meal_transceiver_check: tcfg=%08lx ", tconfig));
1096         if (hp->happy_flags & HFLAG_POLL) {
1097                 /* If we are polling, we must stop to get the transceiver type. */
1098                 ASD(("<polling> "));
1099                 if (hp->tcvr_type == internal) {
1100                         if (tconfig & TCV_CFG_MDIO1) {
1101                                 ASD(("<internal> <poll stop> "));
1102                                 happy_meal_poll_stop(hp, tregs);
1103                                 hp->paddr = TCV_PADDR_ETX;
1104                                 hp->tcvr_type = external;
1105                                 ASD(("<external>\n"));
1106                                 tconfig &= ~(TCV_CFG_PENABLE);
1107                                 tconfig |= TCV_CFG_PSELECT;
1108                                 hme_write32(hp, tregs + TCVR_CFG, tconfig);
1109                         }
1110                 } else {
1111                         if (hp->tcvr_type == external) {
1112                                 ASD(("<external> "));
1113                                 if (!(hme_read32(hp, tregs + TCVR_STATUS) >> 16)) {
1114                                         ASD(("<poll stop> "));
1115                                         happy_meal_poll_stop(hp, tregs);
1116                                         hp->paddr = TCV_PADDR_ITX;
1117                                         hp->tcvr_type = internal;
1118                                         ASD(("<internal>\n"));
1119                                         hme_write32(hp, tregs + TCVR_CFG,
1120                                                     hme_read32(hp, tregs + TCVR_CFG) &
1121                                                     ~(TCV_CFG_PSELECT));
1122                                 }
1123                                 ASD(("\n"));
1124                         } else {
1125                                 ASD(("<none>\n"));
1126                         }
1127                 }
1128         } else {
1129                 u32 reread = hme_read32(hp, tregs + TCVR_CFG);
1130
1131                 /* Else we can just work off of the MDIO bits. */
1132                 ASD(("<not polling> "));
1133                 if (reread & TCV_CFG_MDIO1) {
1134                         hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1135                         hp->paddr = TCV_PADDR_ETX;
1136                         hp->tcvr_type = external;
1137                         ASD(("<external>\n"));
1138                 } else {
1139                         if (reread & TCV_CFG_MDIO0) {
1140                                 hme_write32(hp, tregs + TCVR_CFG,
1141                                             tconfig & ~(TCV_CFG_PSELECT));
1142                                 hp->paddr = TCV_PADDR_ITX;
1143                                 hp->tcvr_type = internal;
1144                                 ASD(("<internal>\n"));
1145                         } else {
1146                                 printk(KERN_ERR "happy meal: Transceiver and a coke please.");
1147                                 hp->tcvr_type = none; /* Grrr... */
1148                                 ASD(("<none>\n"));
1149                         }
1150                 }
1151         }
1152 }
1153
1154 /* The receive ring buffers are a bit tricky to get right.  Here goes...
1155  *
1156  * The buffers we dma into must be 64 byte aligned.  So we use a special
1157  * alloc_skb() routine for the happy meal to allocate 64 bytes more than
1158  * we really need.
1159  *
1160  * We use skb_reserve() to align the data block we get in the skb.  We
1161  * also program the etxregs->cfg register to use an offset of 2.  This
1162  * imperical constant plus the ethernet header size will always leave
1163  * us with a nicely aligned ip header once we pass things up to the
1164  * protocol layers.
1165  *
1166  * The numbers work out to:
1167  *
1168  *         Max ethernet frame size         1518
1169  *         Ethernet header size              14
1170  *         Happy Meal base offset             2
1171  *
1172  * Say a skb data area is at 0xf001b010, and its size alloced is
1173  * (ETH_FRAME_LEN + 64 + 2) = (1514 + 64 + 2) = 1580 bytes.
1174  *
1175  * First our alloc_skb() routine aligns the data base to a 64 byte
1176  * boundary.  We now have 0xf001b040 as our skb data address.  We
1177  * plug this into the receive descriptor address.
1178  *
1179  * Next, we skb_reserve() 2 bytes to account for the Happy Meal offset.
1180  * So now the data we will end up looking at starts at 0xf001b042.  When
1181  * the packet arrives, we will check out the size received and subtract
1182  * this from the skb->length.  Then we just pass the packet up to the
1183  * protocols as is, and allocate a new skb to replace this slot we have
1184  * just received from.
1185  *
1186  * The ethernet layer will strip the ether header from the front of the
1187  * skb we just sent to it, this leaves us with the ip header sitting
1188  * nicely aligned at 0xf001b050.  Also, for tcp and udp packets the
1189  * Happy Meal has even checksummed the tcp/udp data for us.  The 16
1190  * bit checksum is obtained from the low bits of the receive descriptor
1191  * flags, thus:
1192  *
1193  *      skb->csum = rxd->rx_flags & 0xffff;
1194  *      skb->ip_summed = CHECKSUM_COMPLETE;
1195  *
1196  * before sending off the skb to the protocols, and we are good as gold.
1197  */
1198 static void happy_meal_clean_rings(struct happy_meal *hp)
1199 {
1200         int i;
1201
1202         for (i = 0; i < RX_RING_SIZE; i++) {
1203                 if (hp->rx_skbs[i] != NULL) {
1204                         struct sk_buff *skb = hp->rx_skbs[i];
1205                         struct happy_meal_rxd *rxd;
1206                         u32 dma_addr;
1207
1208                         rxd = &hp->happy_block->happy_meal_rxd[i];
1209                         dma_addr = hme_read_desc32(hp, &rxd->rx_addr);
1210                         dma_unmap_single(hp->dma_dev, dma_addr,
1211                                          RX_BUF_ALLOC_SIZE, DMA_FROM_DEVICE);
1212                         dev_kfree_skb_any(skb);
1213                         hp->rx_skbs[i] = NULL;
1214                 }
1215         }
1216
1217         for (i = 0; i < TX_RING_SIZE; i++) {
1218                 if (hp->tx_skbs[i] != NULL) {
1219                         struct sk_buff *skb = hp->tx_skbs[i];
1220                         struct happy_meal_txd *txd;
1221                         u32 dma_addr;
1222                         int frag;
1223
1224                         hp->tx_skbs[i] = NULL;
1225
1226                         for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1227                                 txd = &hp->happy_block->happy_meal_txd[i];
1228                                 dma_addr = hme_read_desc32(hp, &txd->tx_addr);
1229                                 dma_unmap_single(hp->dma_dev, dma_addr,
1230                                                  (hme_read_desc32(hp, &txd->tx_flags)
1231                                                   & TXFLAG_SIZE),
1232                                                  DMA_TO_DEVICE);
1233
1234                                 if (frag != skb_shinfo(skb)->nr_frags)
1235                                         i++;
1236                         }
1237
1238                         dev_kfree_skb_any(skb);
1239                 }
1240         }
1241 }
1242
1243 /* hp->happy_lock must be held */
1244 static void happy_meal_init_rings(struct happy_meal *hp)
1245 {
1246         struct hmeal_init_block *hb = hp->happy_block;
1247         struct net_device *dev = hp->dev;
1248         int i;
1249
1250         HMD(("happy_meal_init_rings: counters to zero, "));
1251         hp->rx_new = hp->rx_old = hp->tx_new = hp->tx_old = 0;
1252
1253         /* Free any skippy bufs left around in the rings. */
1254         HMD(("clean, "));
1255         happy_meal_clean_rings(hp);
1256
1257         /* Now get new skippy bufs for the receive ring. */
1258         HMD(("init rxring, "));
1259         for (i = 0; i < RX_RING_SIZE; i++) {
1260                 struct sk_buff *skb;
1261
1262                 skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
1263                 if (!skb) {
1264                         hme_write_rxd(hp, &hb->happy_meal_rxd[i], 0, 0);
1265                         continue;
1266                 }
1267                 hp->rx_skbs[i] = skb;
1268                 skb->dev = dev;
1269
1270                 /* Because we reserve afterwards. */
1271                 skb_put(skb, (ETH_FRAME_LEN + RX_OFFSET + 4));
1272                 hme_write_rxd(hp, &hb->happy_meal_rxd[i],
1273                               (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16)),
1274                               dma_map_single(hp->dma_dev, skb->data, RX_BUF_ALLOC_SIZE,
1275                                              DMA_FROM_DEVICE));
1276                 skb_reserve(skb, RX_OFFSET);
1277         }
1278
1279         HMD(("init txring, "));
1280         for (i = 0; i < TX_RING_SIZE; i++)
1281                 hme_write_txd(hp, &hb->happy_meal_txd[i], 0, 0);
1282
1283         HMD(("done\n"));
1284 }
1285
1286 /* hp->happy_lock must be held */
1287 static void happy_meal_begin_auto_negotiation(struct happy_meal *hp,
1288                                               void __iomem *tregs,
1289                                               struct ethtool_cmd *ep)
1290 {
1291         int timeout;
1292
1293         /* Read all of the registers we are interested in now. */
1294         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1295         hp->sw_bmcr      = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1296         hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1297         hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1298
1299         /* XXX Check BMSR_ANEGCAPABLE, should not be necessary though. */
1300
1301         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1302         if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1303                 /* Advertise everything we can support. */
1304                 if (hp->sw_bmsr & BMSR_10HALF)
1305                         hp->sw_advertise |= (ADVERTISE_10HALF);
1306                 else
1307                         hp->sw_advertise &= ~(ADVERTISE_10HALF);
1308
1309                 if (hp->sw_bmsr & BMSR_10FULL)
1310                         hp->sw_advertise |= (ADVERTISE_10FULL);
1311                 else
1312                         hp->sw_advertise &= ~(ADVERTISE_10FULL);
1313                 if (hp->sw_bmsr & BMSR_100HALF)
1314                         hp->sw_advertise |= (ADVERTISE_100HALF);
1315                 else
1316                         hp->sw_advertise &= ~(ADVERTISE_100HALF);
1317                 if (hp->sw_bmsr & BMSR_100FULL)
1318                         hp->sw_advertise |= (ADVERTISE_100FULL);
1319                 else
1320                         hp->sw_advertise &= ~(ADVERTISE_100FULL);
1321                 happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1322
1323                 /* XXX Currently no Happy Meal cards I know off support 100BaseT4,
1324                  * XXX and this is because the DP83840 does not support it, changes
1325                  * XXX would need to be made to the tx/rx logic in the driver as well
1326                  * XXX so I completely skip checking for it in the BMSR for now.
1327                  */
1328
1329 #ifdef AUTO_SWITCH_DEBUG
1330                 ASD(("%s: Advertising [ ", hp->dev->name));
1331                 if (hp->sw_advertise & ADVERTISE_10HALF)
1332                         ASD(("10H "));
1333                 if (hp->sw_advertise & ADVERTISE_10FULL)
1334                         ASD(("10F "));
1335                 if (hp->sw_advertise & ADVERTISE_100HALF)
1336                         ASD(("100H "));
1337                 if (hp->sw_advertise & ADVERTISE_100FULL)
1338                         ASD(("100F "));
1339 #endif
1340
1341                 /* Enable Auto-Negotiation, this is usually on already... */
1342                 hp->sw_bmcr |= BMCR_ANENABLE;
1343                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1344
1345                 /* Restart it to make sure it is going. */
1346                 hp->sw_bmcr |= BMCR_ANRESTART;
1347                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1348
1349                 /* BMCR_ANRESTART self clears when the process has begun. */
1350
1351                 timeout = 64;  /* More than enough. */
1352                 while (--timeout) {
1353                         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1354                         if (!(hp->sw_bmcr & BMCR_ANRESTART))
1355                                 break; /* got it. */
1356                         udelay(10);
1357                 }
1358                 if (!timeout) {
1359                         printk(KERN_ERR "%s: Happy Meal would not start auto negotiation "
1360                                "BMCR=0x%04x\n", hp->dev->name, hp->sw_bmcr);
1361                         printk(KERN_NOTICE "%s: Performing force link detection.\n",
1362                                hp->dev->name);
1363                         goto force_link;
1364                 } else {
1365                         hp->timer_state = arbwait;
1366                 }
1367         } else {
1368 force_link:
1369                 /* Force the link up, trying first a particular mode.
1370                  * Either we are here at the request of ethtool or
1371                  * because the Happy Meal would not start to autoneg.
1372                  */
1373
1374                 /* Disable auto-negotiation in BMCR, enable the duplex and
1375                  * speed setting, init the timer state machine, and fire it off.
1376                  */
1377                 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1378                         hp->sw_bmcr = BMCR_SPEED100;
1379                 } else {
1380                         if (ep->speed == SPEED_100)
1381                                 hp->sw_bmcr = BMCR_SPEED100;
1382                         else
1383                                 hp->sw_bmcr = 0;
1384                         if (ep->duplex == DUPLEX_FULL)
1385                                 hp->sw_bmcr |= BMCR_FULLDPLX;
1386                 }
1387                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1388
1389                 if (!is_lucent_phy(hp)) {
1390                         /* OK, seems we need do disable the transceiver for the first
1391                          * tick to make sure we get an accurate link state at the
1392                          * second tick.
1393                          */
1394                         hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
1395                                                                DP83840_CSCONFIG);
1396                         hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
1397                         happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG,
1398                                               hp->sw_csconfig);
1399                 }
1400                 hp->timer_state = ltrywait;
1401         }
1402
1403         hp->timer_ticks = 0;
1404         hp->happy_timer.expires = jiffies + (12 * HZ)/10;  /* 1.2 sec. */
1405         hp->happy_timer.data = (unsigned long) hp;
1406         hp->happy_timer.function = &happy_meal_timer;
1407         add_timer(&hp->happy_timer);
1408 }
1409
1410 /* hp->happy_lock must be held */
1411 static int happy_meal_init(struct happy_meal *hp)
1412 {
1413         void __iomem *gregs        = hp->gregs;
1414         void __iomem *etxregs      = hp->etxregs;
1415         void __iomem *erxregs      = hp->erxregs;
1416         void __iomem *bregs        = hp->bigmacregs;
1417         void __iomem *tregs        = hp->tcvregs;
1418         u32 regtmp, rxcfg;
1419         unsigned char *e = &hp->dev->dev_addr[0];
1420
1421         /* If auto-negotiation timer is running, kill it. */
1422         del_timer(&hp->happy_timer);
1423
1424         HMD(("happy_meal_init: happy_flags[%08x] ",
1425              hp->happy_flags));
1426         if (!(hp->happy_flags & HFLAG_INIT)) {
1427                 HMD(("set HFLAG_INIT, "));
1428                 hp->happy_flags |= HFLAG_INIT;
1429                 happy_meal_get_counters(hp, bregs);
1430         }
1431
1432         /* Stop polling. */
1433         HMD(("to happy_meal_poll_stop\n"));
1434         happy_meal_poll_stop(hp, tregs);
1435
1436         /* Stop transmitter and receiver. */
1437         HMD(("happy_meal_init: to happy_meal_stop\n"));
1438         happy_meal_stop(hp, gregs);
1439
1440         /* Alloc and reset the tx/rx descriptor chains. */
1441         HMD(("happy_meal_init: to happy_meal_init_rings\n"));
1442         happy_meal_init_rings(hp);
1443
1444         /* Shut up the MIF. */
1445         HMD(("happy_meal_init: Disable all MIF irqs (old[%08x]), ",
1446              hme_read32(hp, tregs + TCVR_IMASK)));
1447         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1448
1449         /* See if we can enable the MIF frame on this card to speak to the DP83840. */
1450         if (hp->happy_flags & HFLAG_FENABLE) {
1451                 HMD(("use frame old[%08x], ",
1452                      hme_read32(hp, tregs + TCVR_CFG)));
1453                 hme_write32(hp, tregs + TCVR_CFG,
1454                             hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1455         } else {
1456                 HMD(("use bitbang old[%08x], ",
1457                      hme_read32(hp, tregs + TCVR_CFG)));
1458                 hme_write32(hp, tregs + TCVR_CFG,
1459                             hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1460         }
1461
1462         /* Check the state of the transceiver. */
1463         HMD(("to happy_meal_transceiver_check\n"));
1464         happy_meal_transceiver_check(hp, tregs);
1465
1466         /* Put the Big Mac into a sane state. */
1467         HMD(("happy_meal_init: "));
1468         switch(hp->tcvr_type) {
1469         case none:
1470                 /* Cannot operate if we don't know the transceiver type! */
1471                 HMD(("AAIEEE no transceiver type, EAGAIN"));
1472                 return -EAGAIN;
1473
1474         case internal:
1475                 /* Using the MII buffers. */
1476                 HMD(("internal, using MII, "));
1477                 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1478                 break;
1479
1480         case external:
1481                 /* Not using the MII, disable it. */
1482                 HMD(("external, disable MII, "));
1483                 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1484                 break;
1485         };
1486
1487         if (happy_meal_tcvr_reset(hp, tregs))
1488                 return -EAGAIN;
1489
1490         /* Reset the Happy Meal Big Mac transceiver and the receiver. */
1491         HMD(("tx/rx reset, "));
1492         happy_meal_tx_reset(hp, bregs);
1493         happy_meal_rx_reset(hp, bregs);
1494
1495         /* Set jam size and inter-packet gaps to reasonable defaults. */
1496         HMD(("jsize/ipg1/ipg2, "));
1497         hme_write32(hp, bregs + BMAC_JSIZE, DEFAULT_JAMSIZE);
1498         hme_write32(hp, bregs + BMAC_IGAP1, DEFAULT_IPG1);
1499         hme_write32(hp, bregs + BMAC_IGAP2, DEFAULT_IPG2);
1500
1501         /* Load up the MAC address and random seed. */
1502         HMD(("rseed/macaddr, "));
1503
1504         /* The docs recommend to use the 10LSB of our MAC here. */
1505         hme_write32(hp, bregs + BMAC_RSEED, ((e[5] | e[4]<<8)&0x3ff));
1506
1507         hme_write32(hp, bregs + BMAC_MACADDR2, ((e[4] << 8) | e[5]));
1508         hme_write32(hp, bregs + BMAC_MACADDR1, ((e[2] << 8) | e[3]));
1509         hme_write32(hp, bregs + BMAC_MACADDR0, ((e[0] << 8) | e[1]));
1510
1511         HMD(("htable, "));
1512         if ((hp->dev->flags & IFF_ALLMULTI) ||
1513             (hp->dev->mc_count > 64)) {
1514                 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
1515                 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
1516                 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
1517                 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
1518         } else if ((hp->dev->flags & IFF_PROMISC) == 0) {
1519                 u16 hash_table[4];
1520                 struct dev_mc_list *dmi = hp->dev->mc_list;
1521                 char *addrs;
1522                 int i;
1523                 u32 crc;
1524
1525                 for (i = 0; i < 4; i++)
1526                         hash_table[i] = 0;
1527
1528                 for (i = 0; i < hp->dev->mc_count; i++) {
1529                         addrs = dmi->dmi_addr;
1530                         dmi = dmi->next;
1531
1532                         if (!(*addrs & 1))
1533                                 continue;
1534
1535                         crc = ether_crc_le(6, addrs);
1536                         crc >>= 26;
1537                         hash_table[crc >> 4] |= 1 << (crc & 0xf);
1538                 }
1539                 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
1540                 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
1541                 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
1542                 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
1543         } else {
1544                 hme_write32(hp, bregs + BMAC_HTABLE3, 0);
1545                 hme_write32(hp, bregs + BMAC_HTABLE2, 0);
1546                 hme_write32(hp, bregs + BMAC_HTABLE1, 0);
1547                 hme_write32(hp, bregs + BMAC_HTABLE0, 0);
1548         }
1549
1550         /* Set the RX and TX ring ptrs. */
1551         HMD(("ring ptrs rxr[%08x] txr[%08x]\n",
1552              ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)),
1553              ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0))));
1554         hme_write32(hp, erxregs + ERX_RING,
1555                     ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)));
1556         hme_write32(hp, etxregs + ETX_RING,
1557                     ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0)));
1558
1559         /* Parity issues in the ERX unit of some HME revisions can cause some
1560          * registers to not be written unless their parity is even.  Detect such
1561          * lost writes and simply rewrite with a low bit set (which will be ignored
1562          * since the rxring needs to be 2K aligned).
1563          */
1564         if (hme_read32(hp, erxregs + ERX_RING) !=
1565             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)))
1566                 hme_write32(hp, erxregs + ERX_RING,
1567                             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0))
1568                             | 0x4);
1569
1570         /* Set the supported burst sizes. */
1571         HMD(("happy_meal_init: old[%08x] bursts<",
1572              hme_read32(hp, gregs + GREG_CFG)));
1573
1574 #ifndef CONFIG_SPARC
1575         /* It is always PCI and can handle 64byte bursts. */
1576         hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST64);
1577 #else
1578         if ((hp->happy_bursts & DMA_BURST64) &&
1579             ((hp->happy_flags & HFLAG_PCI) != 0
1580 #ifdef CONFIG_SBUS
1581              || sbus_can_burst64()
1582 #endif
1583              || 0)) {
1584                 u32 gcfg = GREG_CFG_BURST64;
1585
1586                 /* I have no idea if I should set the extended
1587                  * transfer mode bit for Cheerio, so for now I
1588                  * do not.  -DaveM
1589                  */
1590 #ifdef CONFIG_SBUS
1591                 if ((hp->happy_flags & HFLAG_PCI) == 0) {
1592                         struct of_device *op = hp->happy_dev;
1593                         if (sbus_can_dma_64bit()) {
1594                                 sbus_set_sbus64(&op->dev,
1595                                                 hp->happy_bursts);
1596                                 gcfg |= GREG_CFG_64BIT;
1597                         }
1598                 }
1599 #endif
1600
1601                 HMD(("64>"));
1602                 hme_write32(hp, gregs + GREG_CFG, gcfg);
1603         } else if (hp->happy_bursts & DMA_BURST32) {
1604                 HMD(("32>"));
1605                 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST32);
1606         } else if (hp->happy_bursts & DMA_BURST16) {
1607                 HMD(("16>"));
1608                 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST16);
1609         } else {
1610                 HMD(("XXX>"));
1611                 hme_write32(hp, gregs + GREG_CFG, 0);
1612         }
1613 #endif /* CONFIG_SPARC */
1614
1615         /* Turn off interrupts we do not want to hear. */
1616         HMD((", enable global interrupts, "));
1617         hme_write32(hp, gregs + GREG_IMASK,
1618                     (GREG_IMASK_GOTFRAME | GREG_IMASK_RCNTEXP |
1619                      GREG_IMASK_SENTFRAME | GREG_IMASK_TXPERR));
1620
1621         /* Set the transmit ring buffer size. */
1622         HMD(("tx rsize=%d oreg[%08x], ", (int)TX_RING_SIZE,
1623              hme_read32(hp, etxregs + ETX_RSIZE)));
1624         hme_write32(hp, etxregs + ETX_RSIZE, (TX_RING_SIZE >> ETX_RSIZE_SHIFT) - 1);
1625
1626         /* Enable transmitter DVMA. */
1627         HMD(("tx dma enable old[%08x], ",
1628              hme_read32(hp, etxregs + ETX_CFG)));
1629         hme_write32(hp, etxregs + ETX_CFG,
1630                     hme_read32(hp, etxregs + ETX_CFG) | ETX_CFG_DMAENABLE);
1631
1632         /* This chip really rots, for the receiver sometimes when you
1633          * write to its control registers not all the bits get there
1634          * properly.  I cannot think of a sane way to provide complete
1635          * coverage for this hardware bug yet.
1636          */
1637         HMD(("erx regs bug old[%08x]\n",
1638              hme_read32(hp, erxregs + ERX_CFG)));
1639         hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1640         regtmp = hme_read32(hp, erxregs + ERX_CFG);
1641         hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1642         if (hme_read32(hp, erxregs + ERX_CFG) != ERX_CFG_DEFAULT(RX_OFFSET)) {
1643                 printk(KERN_ERR "happy meal: Eieee, rx config register gets greasy fries.\n");
1644                 printk(KERN_ERR "happy meal: Trying to set %08x, reread gives %08x\n",
1645                        ERX_CFG_DEFAULT(RX_OFFSET), regtmp);
1646                 /* XXX Should return failure here... */
1647         }
1648
1649         /* Enable Big Mac hash table filter. */
1650         HMD(("happy_meal_init: enable hash rx_cfg_old[%08x], ",
1651              hme_read32(hp, bregs + BMAC_RXCFG)));
1652         rxcfg = BIGMAC_RXCFG_HENABLE | BIGMAC_RXCFG_REJME;
1653         if (hp->dev->flags & IFF_PROMISC)
1654                 rxcfg |= BIGMAC_RXCFG_PMISC;
1655         hme_write32(hp, bregs + BMAC_RXCFG, rxcfg);
1656
1657         /* Let the bits settle in the chip. */
1658         udelay(10);
1659
1660         /* Ok, configure the Big Mac transmitter. */
1661         HMD(("BIGMAC init, "));
1662         regtmp = 0;
1663         if (hp->happy_flags & HFLAG_FULL)
1664                 regtmp |= BIGMAC_TXCFG_FULLDPLX;
1665
1666         /* Don't turn on the "don't give up" bit for now.  It could cause hme
1667          * to deadlock with the PHY if a Jabber occurs.
1668          */
1669         hme_write32(hp, bregs + BMAC_TXCFG, regtmp /*| BIGMAC_TXCFG_DGIVEUP*/);
1670
1671         /* Give up after 16 TX attempts. */
1672         hme_write32(hp, bregs + BMAC_ALIMIT, 16);
1673
1674         /* Enable the output drivers no matter what. */
1675         regtmp = BIGMAC_XCFG_ODENABLE;
1676
1677         /* If card can do lance mode, enable it. */
1678         if (hp->happy_flags & HFLAG_LANCE)
1679                 regtmp |= (DEFAULT_IPG0 << 5) | BIGMAC_XCFG_LANCE;
1680
1681         /* Disable the MII buffers if using external transceiver. */
1682         if (hp->tcvr_type == external)
1683                 regtmp |= BIGMAC_XCFG_MIIDISAB;
1684
1685         HMD(("XIF config old[%08x], ",
1686              hme_read32(hp, bregs + BMAC_XIFCFG)));
1687         hme_write32(hp, bregs + BMAC_XIFCFG, regtmp);
1688
1689         /* Start things up. */
1690         HMD(("tx old[%08x] and rx [%08x] ON!\n",
1691              hme_read32(hp, bregs + BMAC_TXCFG),
1692              hme_read32(hp, bregs + BMAC_RXCFG)));
1693
1694         /* Set larger TX/RX size to allow for 802.1q */
1695         hme_write32(hp, bregs + BMAC_TXMAX, ETH_FRAME_LEN + 8);
1696         hme_write32(hp, bregs + BMAC_RXMAX, ETH_FRAME_LEN + 8);
1697
1698         hme_write32(hp, bregs + BMAC_TXCFG,
1699                     hme_read32(hp, bregs + BMAC_TXCFG) | BIGMAC_TXCFG_ENABLE);
1700         hme_write32(hp, bregs + BMAC_RXCFG,
1701                     hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_ENABLE);
1702
1703         /* Get the autonegotiation started, and the watch timer ticking. */
1704         happy_meal_begin_auto_negotiation(hp, tregs, NULL);
1705
1706         /* Success. */
1707         return 0;
1708 }
1709
1710 /* hp->happy_lock must be held */
1711 static void happy_meal_set_initial_advertisement(struct happy_meal *hp)
1712 {
1713         void __iomem *tregs     = hp->tcvregs;
1714         void __iomem *bregs     = hp->bigmacregs;
1715         void __iomem *gregs     = hp->gregs;
1716
1717         happy_meal_stop(hp, gregs);
1718         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1719         if (hp->happy_flags & HFLAG_FENABLE)
1720                 hme_write32(hp, tregs + TCVR_CFG,
1721                             hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1722         else
1723                 hme_write32(hp, tregs + TCVR_CFG,
1724                             hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1725         happy_meal_transceiver_check(hp, tregs);
1726         switch(hp->tcvr_type) {
1727         case none:
1728                 return;
1729         case internal:
1730                 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1731                 break;
1732         case external:
1733                 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1734                 break;
1735         };
1736         if (happy_meal_tcvr_reset(hp, tregs))
1737                 return;
1738
1739         /* Latch PHY registers as of now. */
1740         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1741         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1742
1743         /* Advertise everything we can support. */
1744         if (hp->sw_bmsr & BMSR_10HALF)
1745                 hp->sw_advertise |= (ADVERTISE_10HALF);
1746         else
1747                 hp->sw_advertise &= ~(ADVERTISE_10HALF);
1748
1749         if (hp->sw_bmsr & BMSR_10FULL)
1750                 hp->sw_advertise |= (ADVERTISE_10FULL);
1751         else
1752                 hp->sw_advertise &= ~(ADVERTISE_10FULL);
1753         if (hp->sw_bmsr & BMSR_100HALF)
1754                 hp->sw_advertise |= (ADVERTISE_100HALF);
1755         else
1756                 hp->sw_advertise &= ~(ADVERTISE_100HALF);
1757         if (hp->sw_bmsr & BMSR_100FULL)
1758                 hp->sw_advertise |= (ADVERTISE_100FULL);
1759         else
1760                 hp->sw_advertise &= ~(ADVERTISE_100FULL);
1761
1762         /* Update the PHY advertisement register. */
1763         happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1764 }
1765
1766 /* Once status is latched (by happy_meal_interrupt) it is cleared by
1767  * the hardware, so we cannot re-read it and get a correct value.
1768  *
1769  * hp->happy_lock must be held
1770  */
1771 static int happy_meal_is_not_so_happy(struct happy_meal *hp, u32 status)
1772 {
1773         int reset = 0;
1774
1775         /* Only print messages for non-counter related interrupts. */
1776         if (status & (GREG_STAT_STSTERR | GREG_STAT_TFIFO_UND |
1777                       GREG_STAT_MAXPKTERR | GREG_STAT_RXERR |
1778                       GREG_STAT_RXPERR | GREG_STAT_RXTERR | GREG_STAT_EOPERR |
1779                       GREG_STAT_MIFIRQ | GREG_STAT_TXEACK | GREG_STAT_TXLERR |
1780                       GREG_STAT_TXPERR | GREG_STAT_TXTERR | GREG_STAT_SLVERR |
1781                       GREG_STAT_SLVPERR))
1782                 printk(KERN_ERR "%s: Error interrupt for happy meal, status = %08x\n",
1783                        hp->dev->name, status);
1784
1785         if (status & GREG_STAT_RFIFOVF) {
1786                 /* Receive FIFO overflow is harmless and the hardware will take
1787                    care of it, just some packets are lost. Who cares. */
1788                 printk(KERN_DEBUG "%s: Happy Meal receive FIFO overflow.\n", hp->dev->name);
1789         }
1790
1791         if (status & GREG_STAT_STSTERR) {
1792                 /* BigMAC SQE link test failed. */
1793                 printk(KERN_ERR "%s: Happy Meal BigMAC SQE test failed.\n", hp->dev->name);
1794                 reset = 1;
1795         }
1796
1797         if (status & GREG_STAT_TFIFO_UND) {
1798                 /* Transmit FIFO underrun, again DMA error likely. */
1799                 printk(KERN_ERR "%s: Happy Meal transmitter FIFO underrun, DMA error.\n",
1800                        hp->dev->name);
1801                 reset = 1;
1802         }
1803
1804         if (status & GREG_STAT_MAXPKTERR) {
1805                 /* Driver error, tried to transmit something larger
1806                  * than ethernet max mtu.
1807                  */
1808                 printk(KERN_ERR "%s: Happy Meal MAX Packet size error.\n", hp->dev->name);
1809                 reset = 1;
1810         }
1811
1812         if (status & GREG_STAT_NORXD) {
1813                 /* This is harmless, it just means the system is
1814                  * quite loaded and the incoming packet rate was
1815                  * faster than the interrupt handler could keep up
1816                  * with.
1817                  */
1818                 printk(KERN_INFO "%s: Happy Meal out of receive "
1819                        "descriptors, packet dropped.\n",
1820                        hp->dev->name);
1821         }
1822
1823         if (status & (GREG_STAT_RXERR|GREG_STAT_RXPERR|GREG_STAT_RXTERR)) {
1824                 /* All sorts of DMA receive errors. */
1825                 printk(KERN_ERR "%s: Happy Meal rx DMA errors [ ", hp->dev->name);
1826                 if (status & GREG_STAT_RXERR)
1827                         printk("GenericError ");
1828                 if (status & GREG_STAT_RXPERR)
1829                         printk("ParityError ");
1830                 if (status & GREG_STAT_RXTERR)
1831                         printk("RxTagBotch ");
1832                 printk("]\n");
1833                 reset = 1;
1834         }
1835
1836         if (status & GREG_STAT_EOPERR) {
1837                 /* Driver bug, didn't set EOP bit in tx descriptor given
1838                  * to the happy meal.
1839                  */
1840                 printk(KERN_ERR "%s: EOP not set in happy meal transmit descriptor!\n",
1841                        hp->dev->name);
1842                 reset = 1;
1843         }
1844
1845         if (status & GREG_STAT_MIFIRQ) {
1846                 /* MIF signalled an interrupt, were we polling it? */
1847                 printk(KERN_ERR "%s: Happy Meal MIF interrupt.\n", hp->dev->name);
1848         }
1849
1850         if (status &
1851             (GREG_STAT_TXEACK|GREG_STAT_TXLERR|GREG_STAT_TXPERR|GREG_STAT_TXTERR)) {
1852                 /* All sorts of transmit DMA errors. */
1853                 printk(KERN_ERR "%s: Happy Meal tx DMA errors [ ", hp->dev->name);
1854                 if (status & GREG_STAT_TXEACK)
1855                         printk("GenericError ");
1856                 if (status & GREG_STAT_TXLERR)
1857                         printk("LateError ");
1858                 if (status & GREG_STAT_TXPERR)
1859                         printk("ParityErro ");
1860                 if (status & GREG_STAT_TXTERR)
1861                         printk("TagBotch ");
1862                 printk("]\n");
1863                 reset = 1;
1864         }
1865
1866         if (status & (GREG_STAT_SLVERR|GREG_STAT_SLVPERR)) {
1867                 /* Bus or parity error when cpu accessed happy meal registers
1868                  * or it's internal FIFO's.  Should never see this.
1869                  */
1870                 printk(KERN_ERR "%s: Happy Meal register access SBUS slave (%s) error.\n",
1871                        hp->dev->name,
1872                        (status & GREG_STAT_SLVPERR) ? "parity" : "generic");
1873                 reset = 1;
1874         }
1875
1876         if (reset) {
1877                 printk(KERN_NOTICE "%s: Resetting...\n", hp->dev->name);
1878                 happy_meal_init(hp);
1879                 return 1;
1880         }
1881         return 0;
1882 }
1883
1884 /* hp->happy_lock must be held */
1885 static void happy_meal_mif_interrupt(struct happy_meal *hp)
1886 {
1887         void __iomem *tregs = hp->tcvregs;
1888
1889         printk(KERN_INFO "%s: Link status change.\n", hp->dev->name);
1890         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1891         hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
1892
1893         /* Use the fastest transmission protocol possible. */
1894         if (hp->sw_lpa & LPA_100FULL) {
1895                 printk(KERN_INFO "%s: Switching to 100Mbps at full duplex.", hp->dev->name);
1896                 hp->sw_bmcr |= (BMCR_FULLDPLX | BMCR_SPEED100);
1897         } else if (hp->sw_lpa & LPA_100HALF) {
1898                 printk(KERN_INFO "%s: Switching to 100MBps at half duplex.", hp->dev->name);
1899                 hp->sw_bmcr |= BMCR_SPEED100;
1900         } else if (hp->sw_lpa & LPA_10FULL) {
1901                 printk(KERN_INFO "%s: Switching to 10MBps at full duplex.", hp->dev->name);
1902                 hp->sw_bmcr |= BMCR_FULLDPLX;
1903         } else {
1904                 printk(KERN_INFO "%s: Using 10Mbps at half duplex.", hp->dev->name);
1905         }
1906         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1907
1908         /* Finally stop polling and shut up the MIF. */
1909         happy_meal_poll_stop(hp, tregs);
1910 }
1911
1912 #ifdef TXDEBUG
1913 #define TXD(x) printk x
1914 #else
1915 #define TXD(x)
1916 #endif
1917
1918 /* hp->happy_lock must be held */
1919 static void happy_meal_tx(struct happy_meal *hp)
1920 {
1921         struct happy_meal_txd *txbase = &hp->happy_block->happy_meal_txd[0];
1922         struct happy_meal_txd *this;
1923         struct net_device *dev = hp->dev;
1924         int elem;
1925
1926         elem = hp->tx_old;
1927         TXD(("TX<"));
1928         while (elem != hp->tx_new) {
1929                 struct sk_buff *skb;
1930                 u32 flags, dma_addr, dma_len;
1931                 int frag;
1932
1933                 TXD(("[%d]", elem));
1934                 this = &txbase[elem];
1935                 flags = hme_read_desc32(hp, &this->tx_flags);
1936                 if (flags & TXFLAG_OWN)
1937                         break;
1938                 skb = hp->tx_skbs[elem];
1939                 if (skb_shinfo(skb)->nr_frags) {
1940                         int last;
1941
1942                         last = elem + skb_shinfo(skb)->nr_frags;
1943                         last &= (TX_RING_SIZE - 1);
1944                         flags = hme_read_desc32(hp, &txbase[last].tx_flags);
1945                         if (flags & TXFLAG_OWN)
1946                                 break;
1947                 }
1948                 hp->tx_skbs[elem] = NULL;
1949                 hp->net_stats.tx_bytes += skb->len;
1950
1951                 for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1952                         dma_addr = hme_read_desc32(hp, &this->tx_addr);
1953                         dma_len = hme_read_desc32(hp, &this->tx_flags);
1954
1955                         dma_len &= TXFLAG_SIZE;
1956                         dma_unmap_single(hp->dma_dev, dma_addr, dma_len, DMA_TO_DEVICE);
1957
1958                         elem = NEXT_TX(elem);
1959                         this = &txbase[elem];
1960                 }
1961
1962                 dev_kfree_skb_irq(skb);
1963                 hp->net_stats.tx_packets++;
1964         }
1965         hp->tx_old = elem;
1966         TXD((">"));
1967
1968         if (netif_queue_stopped(dev) &&
1969             TX_BUFFS_AVAIL(hp) > (MAX_SKB_FRAGS + 1))
1970                 netif_wake_queue(dev);
1971 }
1972
1973 #ifdef RXDEBUG
1974 #define RXD(x) printk x
1975 #else
1976 #define RXD(x)
1977 #endif
1978
1979 /* Originally I used to handle the allocation failure by just giving back just
1980  * that one ring buffer to the happy meal.  Problem is that usually when that
1981  * condition is triggered, the happy meal expects you to do something reasonable
1982  * with all of the packets it has DMA'd in.  So now I just drop the entire
1983  * ring when we cannot get a new skb and give them all back to the happy meal,
1984  * maybe things will be "happier" now.
1985  *
1986  * hp->happy_lock must be held
1987  */
1988 static void happy_meal_rx(struct happy_meal *hp, struct net_device *dev)
1989 {
1990         struct happy_meal_rxd *rxbase = &hp->happy_block->happy_meal_rxd[0];
1991         struct happy_meal_rxd *this;
1992         int elem = hp->rx_new, drops = 0;
1993         u32 flags;
1994
1995         RXD(("RX<"));
1996         this = &rxbase[elem];
1997         while (!((flags = hme_read_desc32(hp, &this->rx_flags)) & RXFLAG_OWN)) {
1998                 struct sk_buff *skb;
1999                 int len = flags >> 16;
2000                 u16 csum = flags & RXFLAG_CSUM;
2001                 u32 dma_addr = hme_read_desc32(hp, &this->rx_addr);
2002
2003                 RXD(("[%d ", elem));
2004
2005                 /* Check for errors. */
2006                 if ((len < ETH_ZLEN) || (flags & RXFLAG_OVERFLOW)) {
2007                         RXD(("ERR(%08x)]", flags));
2008                         hp->net_stats.rx_errors++;
2009                         if (len < ETH_ZLEN)
2010                                 hp->net_stats.rx_length_errors++;
2011                         if (len & (RXFLAG_OVERFLOW >> 16)) {
2012                                 hp->net_stats.rx_over_errors++;
2013                                 hp->net_stats.rx_fifo_errors++;
2014                         }
2015
2016                         /* Return it to the Happy meal. */
2017         drop_it:
2018                         hp->net_stats.rx_dropped++;
2019                         hme_write_rxd(hp, this,
2020                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2021                                       dma_addr);
2022                         goto next;
2023                 }
2024                 skb = hp->rx_skbs[elem];
2025                 if (len > RX_COPY_THRESHOLD) {
2026                         struct sk_buff *new_skb;
2027
2028                         /* Now refill the entry, if we can. */
2029                         new_skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
2030                         if (new_skb == NULL) {
2031                                 drops++;
2032                                 goto drop_it;
2033                         }
2034                         dma_unmap_single(hp->dma_dev, dma_addr, RX_BUF_ALLOC_SIZE, DMA_FROM_DEVICE);
2035                         hp->rx_skbs[elem] = new_skb;
2036                         new_skb->dev = dev;
2037                         skb_put(new_skb, (ETH_FRAME_LEN + RX_OFFSET + 4));
2038                         hme_write_rxd(hp, this,
2039                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2040                                       dma_map_single(hp->dma_dev, new_skb->data, RX_BUF_ALLOC_SIZE,
2041                                                      DMA_FROM_DEVICE));
2042                         skb_reserve(new_skb, RX_OFFSET);
2043
2044                         /* Trim the original skb for the netif. */
2045                         skb_trim(skb, len);
2046                 } else {
2047                         struct sk_buff *copy_skb = dev_alloc_skb(len + 2);
2048
2049                         if (copy_skb == NULL) {
2050                                 drops++;
2051                                 goto drop_it;
2052                         }
2053
2054                         skb_reserve(copy_skb, 2);
2055                         skb_put(copy_skb, len);
2056                         dma_sync_single_for_cpu(hp->dma_dev, dma_addr, len, DMA_FROM_DEVICE);
2057                         skb_copy_from_linear_data(skb, copy_skb->data, len);
2058                         dma_sync_single_for_device(hp->dma_dev, dma_addr, len, DMA_FROM_DEVICE);
2059                         /* Reuse original ring buffer. */
2060                         hme_write_rxd(hp, this,
2061                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2062                                       dma_addr);
2063
2064                         skb = copy_skb;
2065                 }
2066
2067                 /* This card is _fucking_ hot... */
2068                 skb->csum = csum_unfold(~(__force __sum16)htons(csum));
2069                 skb->ip_summed = CHECKSUM_COMPLETE;
2070
2071                 RXD(("len=%d csum=%4x]", len, csum));
2072                 skb->protocol = eth_type_trans(skb, dev);
2073                 netif_rx(skb);
2074
2075                 hp->net_stats.rx_packets++;
2076                 hp->net_stats.rx_bytes += len;
2077         next:
2078                 elem = NEXT_RX(elem);
2079                 this = &rxbase[elem];
2080         }
2081         hp->rx_new = elem;
2082         if (drops)
2083                 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", hp->dev->name);
2084         RXD((">"));
2085 }
2086
2087 static irqreturn_t happy_meal_interrupt(int irq, void *dev_id)
2088 {
2089         struct net_device *dev = dev_id;
2090         struct happy_meal *hp  = netdev_priv(dev);
2091         u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2092
2093         HMD(("happy_meal_interrupt: status=%08x ", happy_status));
2094
2095         spin_lock(&hp->happy_lock);
2096
2097         if (happy_status & GREG_STAT_ERRORS) {
2098                 HMD(("ERRORS "));
2099                 if (happy_meal_is_not_so_happy(hp, /* un- */ happy_status))
2100                         goto out;
2101         }
2102
2103         if (happy_status & GREG_STAT_MIFIRQ) {
2104                 HMD(("MIFIRQ "));
2105                 happy_meal_mif_interrupt(hp);
2106         }
2107
2108         if (happy_status & GREG_STAT_TXALL) {
2109                 HMD(("TXALL "));
2110                 happy_meal_tx(hp);
2111         }
2112
2113         if (happy_status & GREG_STAT_RXTOHOST) {
2114                 HMD(("RXTOHOST "));
2115                 happy_meal_rx(hp, dev);
2116         }
2117
2118         HMD(("done\n"));
2119 out:
2120         spin_unlock(&hp->happy_lock);
2121
2122         return IRQ_HANDLED;
2123 }
2124
2125 #ifdef CONFIG_SBUS
2126 static irqreturn_t quattro_sbus_interrupt(int irq, void *cookie)
2127 {
2128         struct quattro *qp = (struct quattro *) cookie;
2129         int i;
2130
2131         for (i = 0; i < 4; i++) {
2132                 struct net_device *dev = qp->happy_meals[i];
2133                 struct happy_meal *hp  = netdev_priv(dev);
2134                 u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2135
2136                 HMD(("quattro_interrupt: status=%08x ", happy_status));
2137
2138                 if (!(happy_status & (GREG_STAT_ERRORS |
2139                                       GREG_STAT_MIFIRQ |
2140                                       GREG_STAT_TXALL |
2141                                       GREG_STAT_RXTOHOST)))
2142                         continue;
2143
2144                 spin_lock(&hp->happy_lock);
2145
2146                 if (happy_status & GREG_STAT_ERRORS) {
2147                         HMD(("ERRORS "));
2148                         if (happy_meal_is_not_so_happy(hp, happy_status))
2149                                 goto next;
2150                 }
2151
2152                 if (happy_status & GREG_STAT_MIFIRQ) {
2153                         HMD(("MIFIRQ "));
2154                         happy_meal_mif_interrupt(hp);
2155                 }
2156
2157                 if (happy_status & GREG_STAT_TXALL) {
2158                         HMD(("TXALL "));
2159                         happy_meal_tx(hp);
2160                 }
2161
2162                 if (happy_status & GREG_STAT_RXTOHOST) {
2163                         HMD(("RXTOHOST "));
2164                         happy_meal_rx(hp, dev);
2165                 }
2166
2167         next:
2168                 spin_unlock(&hp->happy_lock);
2169         }
2170         HMD(("done\n"));
2171
2172         return IRQ_HANDLED;
2173 }
2174 #endif
2175
2176 static int happy_meal_open(struct net_device *dev)
2177 {
2178         struct happy_meal *hp = netdev_priv(dev);
2179         int res;
2180
2181         HMD(("happy_meal_open: "));
2182
2183         /* On SBUS Quattro QFE cards, all hme interrupts are concentrated
2184          * into a single source which we register handling at probe time.
2185          */
2186         if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO) {
2187                 if (request_irq(dev->irq, &happy_meal_interrupt,
2188                                 IRQF_SHARED, dev->name, (void *)dev)) {
2189                         HMD(("EAGAIN\n"));
2190                         printk(KERN_ERR "happy_meal(SBUS): Can't order irq %d to go.\n",
2191                                dev->irq);
2192
2193                         return -EAGAIN;
2194                 }
2195         }
2196
2197         HMD(("to happy_meal_init\n"));
2198
2199         spin_lock_irq(&hp->happy_lock);
2200         res = happy_meal_init(hp);
2201         spin_unlock_irq(&hp->happy_lock);
2202
2203         if (res && ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO))
2204                 free_irq(dev->irq, dev);
2205         return res;
2206 }
2207
2208 static int happy_meal_close(struct net_device *dev)
2209 {
2210         struct happy_meal *hp = netdev_priv(dev);
2211
2212         spin_lock_irq(&hp->happy_lock);
2213         happy_meal_stop(hp, hp->gregs);
2214         happy_meal_clean_rings(hp);
2215
2216         /* If auto-negotiation timer is running, kill it. */
2217         del_timer(&hp->happy_timer);
2218
2219         spin_unlock_irq(&hp->happy_lock);
2220
2221         /* On Quattro QFE cards, all hme interrupts are concentrated
2222          * into a single source which we register handling at probe
2223          * time and never unregister.
2224          */
2225         if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO)
2226                 free_irq(dev->irq, dev);
2227
2228         return 0;
2229 }
2230
2231 #ifdef SXDEBUG
2232 #define SXD(x) printk x
2233 #else
2234 #define SXD(x)
2235 #endif
2236
2237 static void happy_meal_tx_timeout(struct net_device *dev)
2238 {
2239         struct happy_meal *hp = netdev_priv(dev);
2240
2241         printk (KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
2242         tx_dump_log();
2243         printk (KERN_ERR "%s: Happy Status %08x TX[%08x:%08x]\n", dev->name,
2244                 hme_read32(hp, hp->gregs + GREG_STAT),
2245                 hme_read32(hp, hp->etxregs + ETX_CFG),
2246                 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG));
2247
2248         spin_lock_irq(&hp->happy_lock);
2249         happy_meal_init(hp);
2250         spin_unlock_irq(&hp->happy_lock);
2251
2252         netif_wake_queue(dev);
2253 }
2254
2255 static netdev_tx_t happy_meal_start_xmit(struct sk_buff *skb,
2256                                          struct net_device *dev)
2257 {
2258         struct happy_meal *hp = netdev_priv(dev);
2259         int entry;
2260         u32 tx_flags;
2261
2262         tx_flags = TXFLAG_OWN;
2263         if (skb->ip_summed == CHECKSUM_PARTIAL) {
2264                 const u32 csum_start_off = skb_transport_offset(skb);
2265                 const u32 csum_stuff_off = csum_start_off + skb->csum_offset;
2266
2267                 tx_flags = (TXFLAG_OWN | TXFLAG_CSENABLE |
2268                             ((csum_start_off << 14) & TXFLAG_CSBUFBEGIN) |
2269                             ((csum_stuff_off << 20) & TXFLAG_CSLOCATION));
2270         }
2271
2272         spin_lock_irq(&hp->happy_lock);
2273
2274         if (TX_BUFFS_AVAIL(hp) <= (skb_shinfo(skb)->nr_frags + 1)) {
2275                 netif_stop_queue(dev);
2276                 spin_unlock_irq(&hp->happy_lock);
2277                 printk(KERN_ERR "%s: BUG! Tx Ring full when queue awake!\n",
2278                        dev->name);
2279                 return NETDEV_TX_BUSY;
2280         }
2281
2282         entry = hp->tx_new;
2283         SXD(("SX<l[%d]e[%d]>", len, entry));
2284         hp->tx_skbs[entry] = skb;
2285
2286         if (skb_shinfo(skb)->nr_frags == 0) {
2287                 u32 mapping, len;
2288
2289                 len = skb->len;
2290                 mapping = dma_map_single(hp->dma_dev, skb->data, len, DMA_TO_DEVICE);
2291                 tx_flags |= (TXFLAG_SOP | TXFLAG_EOP);
2292                 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2293                               (tx_flags | (len & TXFLAG_SIZE)),
2294                               mapping);
2295                 entry = NEXT_TX(entry);
2296         } else {
2297                 u32 first_len, first_mapping;
2298                 int frag, first_entry = entry;
2299
2300                 /* We must give this initial chunk to the device last.
2301                  * Otherwise we could race with the device.
2302                  */
2303                 first_len = skb_headlen(skb);
2304                 first_mapping = dma_map_single(hp->dma_dev, skb->data, first_len,
2305                                                DMA_TO_DEVICE);
2306                 entry = NEXT_TX(entry);
2307
2308                 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
2309                         skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
2310                         u32 len, mapping, this_txflags;
2311
2312                         len = this_frag->size;
2313                         mapping = dma_map_page(hp->dma_dev, this_frag->page,
2314                                                this_frag->page_offset, len,
2315                                                DMA_TO_DEVICE);
2316                         this_txflags = tx_flags;
2317                         if (frag == skb_shinfo(skb)->nr_frags - 1)
2318                                 this_txflags |= TXFLAG_EOP;
2319                         hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2320                                       (this_txflags | (len & TXFLAG_SIZE)),
2321                                       mapping);
2322                         entry = NEXT_TX(entry);
2323                 }
2324                 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[first_entry],
2325                               (tx_flags | TXFLAG_SOP | (first_len & TXFLAG_SIZE)),
2326                               first_mapping);
2327         }
2328
2329         hp->tx_new = entry;
2330
2331         if (TX_BUFFS_AVAIL(hp) <= (MAX_SKB_FRAGS + 1))
2332                 netif_stop_queue(dev);
2333
2334         /* Get it going. */
2335         hme_write32(hp, hp->etxregs + ETX_PENDING, ETX_TP_DMAWAKEUP);
2336
2337         spin_unlock_irq(&hp->happy_lock);
2338
2339         dev->trans_start = jiffies;
2340
2341         tx_add_log(hp, TXLOG_ACTION_TXMIT, 0);
2342         return NETDEV_TX_OK;
2343 }
2344
2345 static struct net_device_stats *happy_meal_get_stats(struct net_device *dev)
2346 {
2347         struct happy_meal *hp = netdev_priv(dev);
2348
2349         spin_lock_irq(&hp->happy_lock);
2350         happy_meal_get_counters(hp, hp->bigmacregs);
2351         spin_unlock_irq(&hp->happy_lock);
2352
2353         return &hp->net_stats;
2354 }
2355
2356 static void happy_meal_set_multicast(struct net_device *dev)
2357 {
2358         struct happy_meal *hp = netdev_priv(dev);
2359         void __iomem *bregs = hp->bigmacregs;
2360         struct dev_mc_list *dmi = dev->mc_list;
2361         char *addrs;
2362         int i;
2363         u32 crc;
2364
2365         spin_lock_irq(&hp->happy_lock);
2366
2367         if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 64)) {
2368                 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
2369                 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
2370                 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
2371                 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
2372         } else if (dev->flags & IFF_PROMISC) {
2373                 hme_write32(hp, bregs + BMAC_RXCFG,
2374                             hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_PMISC);
2375         } else {
2376                 u16 hash_table[4];
2377
2378                 for (i = 0; i < 4; i++)
2379                         hash_table[i] = 0;
2380
2381                 for (i = 0; i < dev->mc_count; i++) {
2382                         addrs = dmi->dmi_addr;
2383                         dmi = dmi->next;
2384
2385                         if (!(*addrs & 1))
2386                                 continue;
2387
2388                         crc = ether_crc_le(6, addrs);
2389                         crc >>= 26;
2390                         hash_table[crc >> 4] |= 1 << (crc & 0xf);
2391                 }
2392                 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
2393                 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
2394                 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
2395                 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
2396         }
2397
2398         spin_unlock_irq(&hp->happy_lock);
2399 }
2400
2401 /* Ethtool support... */
2402 static int hme_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2403 {
2404         struct happy_meal *hp = netdev_priv(dev);
2405
2406         cmd->supported =
2407                 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2408                  SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2409                  SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII);
2410
2411         /* XXX hardcoded stuff for now */
2412         cmd->port = PORT_TP; /* XXX no MII support */
2413         cmd->transceiver = XCVR_INTERNAL; /* XXX no external xcvr support */
2414         cmd->phy_address = 0; /* XXX fixed PHYAD */
2415
2416         /* Record PHY settings. */
2417         spin_lock_irq(&hp->happy_lock);
2418         hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2419         hp->sw_lpa = happy_meal_tcvr_read(hp, hp->tcvregs, MII_LPA);
2420         spin_unlock_irq(&hp->happy_lock);
2421
2422         if (hp->sw_bmcr & BMCR_ANENABLE) {
2423                 cmd->autoneg = AUTONEG_ENABLE;
2424                 cmd->speed =
2425                         (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) ?
2426                         SPEED_100 : SPEED_10;
2427                 if (cmd->speed == SPEED_100)
2428                         cmd->duplex =
2429                                 (hp->sw_lpa & (LPA_100FULL)) ?
2430                                 DUPLEX_FULL : DUPLEX_HALF;
2431                 else
2432                         cmd->duplex =
2433                                 (hp->sw_lpa & (LPA_10FULL)) ?
2434                                 DUPLEX_FULL : DUPLEX_HALF;
2435         } else {
2436                 cmd->autoneg = AUTONEG_DISABLE;
2437                 cmd->speed =
2438                         (hp->sw_bmcr & BMCR_SPEED100) ?
2439                         SPEED_100 : SPEED_10;
2440                 cmd->duplex =
2441                         (hp->sw_bmcr & BMCR_FULLDPLX) ?
2442                         DUPLEX_FULL : DUPLEX_HALF;
2443         }
2444         return 0;
2445 }
2446
2447 static int hme_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2448 {
2449         struct happy_meal *hp = netdev_priv(dev);
2450
2451         /* Verify the settings we care about. */
2452         if (cmd->autoneg != AUTONEG_ENABLE &&
2453             cmd->autoneg != AUTONEG_DISABLE)
2454                 return -EINVAL;
2455         if (cmd->autoneg == AUTONEG_DISABLE &&
2456             ((cmd->speed != SPEED_100 &&
2457               cmd->speed != SPEED_10) ||
2458              (cmd->duplex != DUPLEX_HALF &&
2459               cmd->duplex != DUPLEX_FULL)))
2460                 return -EINVAL;
2461
2462         /* Ok, do it to it. */
2463         spin_lock_irq(&hp->happy_lock);
2464         del_timer(&hp->happy_timer);
2465         happy_meal_begin_auto_negotiation(hp, hp->tcvregs, cmd);
2466         spin_unlock_irq(&hp->happy_lock);
2467
2468         return 0;
2469 }
2470
2471 static void hme_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2472 {
2473         struct happy_meal *hp = netdev_priv(dev);
2474
2475         strcpy(info->driver, "sunhme");
2476         strcpy(info->version, "2.02");
2477         if (hp->happy_flags & HFLAG_PCI) {
2478                 struct pci_dev *pdev = hp->happy_dev;
2479                 strcpy(info->bus_info, pci_name(pdev));
2480         }
2481 #ifdef CONFIG_SBUS
2482         else {
2483                 const struct linux_prom_registers *regs;
2484                 struct of_device *op = hp->happy_dev;
2485                 regs = of_get_property(op->node, "regs", NULL);
2486                 if (regs)
2487                         sprintf(info->bus_info, "SBUS:%d",
2488                                 regs->which_io);
2489         }
2490 #endif
2491 }
2492
2493 static u32 hme_get_link(struct net_device *dev)
2494 {
2495         struct happy_meal *hp = netdev_priv(dev);
2496
2497         spin_lock_irq(&hp->happy_lock);
2498         hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2499         spin_unlock_irq(&hp->happy_lock);
2500
2501         return (hp->sw_bmsr & BMSR_LSTATUS);
2502 }
2503
2504 static const struct ethtool_ops hme_ethtool_ops = {
2505         .get_settings           = hme_get_settings,
2506         .set_settings           = hme_set_settings,
2507         .get_drvinfo            = hme_get_drvinfo,
2508         .get_link               = hme_get_link,
2509 };
2510
2511 static int hme_version_printed;
2512
2513 #ifdef CONFIG_SBUS
2514 /* Given a happy meal sbus device, find it's quattro parent.
2515  * If none exist, allocate and return a new one.
2516  *
2517  * Return NULL on failure.
2518  */
2519 static struct quattro * __devinit quattro_sbus_find(struct of_device *child)
2520 {
2521         struct device *parent = child->dev.parent;
2522         struct of_device *op;
2523         struct quattro *qp;
2524
2525         op = to_of_device(parent);
2526         qp = dev_get_drvdata(&op->dev);
2527         if (qp)
2528                 return qp;
2529
2530         qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2531         if (qp != NULL) {
2532                 int i;
2533
2534                 for (i = 0; i < 4; i++)
2535                         qp->happy_meals[i] = NULL;
2536
2537                 qp->quattro_dev = child;
2538                 qp->next = qfe_sbus_list;
2539                 qfe_sbus_list = qp;
2540
2541                 dev_set_drvdata(&op->dev, qp);
2542         }
2543         return qp;
2544 }
2545
2546 /* After all quattro cards have been probed, we call these functions
2547  * to register the IRQ handlers for the cards that have been
2548  * successfully probed and skip the cards that failed to initialize
2549  */
2550 static int __init quattro_sbus_register_irqs(void)
2551 {
2552         struct quattro *qp;
2553
2554         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2555                 struct of_device *op = qp->quattro_dev;
2556                 int err, qfe_slot, skip = 0;
2557
2558                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++) {
2559                         if (!qp->happy_meals[qfe_slot])
2560                                 skip = 1;
2561                 }
2562                 if (skip)
2563                         continue;
2564
2565                 err = request_irq(op->irqs[0],
2566                                   quattro_sbus_interrupt,
2567                                   IRQF_SHARED, "Quattro",
2568                                   qp);
2569                 if (err != 0) {
2570                         printk(KERN_ERR "Quattro HME: IRQ registration "
2571                                "error %d.\n", err);
2572                         return err;
2573                 }
2574         }
2575
2576         return 0;
2577 }
2578
2579 static void quattro_sbus_free_irqs(void)
2580 {
2581         struct quattro *qp;
2582
2583         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2584                 struct of_device *op = qp->quattro_dev;
2585                 int qfe_slot, skip = 0;
2586
2587                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++) {
2588                         if (!qp->happy_meals[qfe_slot])
2589                                 skip = 1;
2590                 }
2591                 if (skip)
2592                         continue;
2593
2594                 free_irq(op->irqs[0], qp);
2595         }
2596 }
2597 #endif /* CONFIG_SBUS */
2598
2599 #ifdef CONFIG_PCI
2600 static struct quattro * __devinit quattro_pci_find(struct pci_dev *pdev)
2601 {
2602         struct pci_dev *bdev = pdev->bus->self;
2603         struct quattro *qp;
2604
2605         if (!bdev) return NULL;
2606         for (qp = qfe_pci_list; qp != NULL; qp = qp->next) {
2607                 struct pci_dev *qpdev = qp->quattro_dev;
2608
2609                 if (qpdev == bdev)
2610                         return qp;
2611         }
2612         qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2613         if (qp != NULL) {
2614                 int i;
2615
2616                 for (i = 0; i < 4; i++)
2617                         qp->happy_meals[i] = NULL;
2618
2619                 qp->quattro_dev = bdev;
2620                 qp->next = qfe_pci_list;
2621                 qfe_pci_list = qp;
2622
2623                 /* No range tricks necessary on PCI. */
2624                 qp->nranges = 0;
2625         }
2626         return qp;
2627 }
2628 #endif /* CONFIG_PCI */
2629
2630 static const struct net_device_ops hme_netdev_ops = {
2631         .ndo_open               = happy_meal_open,
2632         .ndo_stop               = happy_meal_close,
2633         .ndo_start_xmit         = happy_meal_start_xmit,
2634         .ndo_tx_timeout         = happy_meal_tx_timeout,
2635         .ndo_get_stats          = happy_meal_get_stats,
2636         .ndo_set_multicast_list = happy_meal_set_multicast,
2637         .ndo_change_mtu         = eth_change_mtu,
2638         .ndo_set_mac_address    = eth_mac_addr,
2639         .ndo_validate_addr      = eth_validate_addr,
2640 };
2641
2642 #ifdef CONFIG_SBUS
2643 static int __devinit happy_meal_sbus_probe_one(struct of_device *op, int is_qfe)
2644 {
2645         struct device_node *dp = op->node, *sbus_dp;
2646         struct quattro *qp = NULL;
2647         struct happy_meal *hp;
2648         struct net_device *dev;
2649         int i, qfe_slot = -1;
2650         int err = -ENODEV;
2651
2652         sbus_dp = to_of_device(op->dev.parent)->node;
2653
2654         /* We can match PCI devices too, do not accept those here. */
2655         if (strcmp(sbus_dp->name, "sbus"))
2656                 return err;
2657
2658         if (is_qfe) {
2659                 qp = quattro_sbus_find(op);
2660                 if (qp == NULL)
2661                         goto err_out;
2662                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
2663                         if (qp->happy_meals[qfe_slot] == NULL)
2664                                 break;
2665                 if (qfe_slot == 4)
2666                         goto err_out;
2667         }
2668
2669         err = -ENOMEM;
2670         dev = alloc_etherdev(sizeof(struct happy_meal));
2671         if (!dev)
2672                 goto err_out;
2673         SET_NETDEV_DEV(dev, &op->dev);
2674
2675         if (hme_version_printed++ == 0)
2676                 printk(KERN_INFO "%s", version);
2677
2678         /* If user did not specify a MAC address specifically, use
2679          * the Quattro local-mac-address property...
2680          */
2681         for (i = 0; i < 6; i++) {
2682                 if (macaddr[i] != 0)
2683                         break;
2684         }
2685         if (i < 6) { /* a mac address was given */
2686                 for (i = 0; i < 6; i++)
2687                         dev->dev_addr[i] = macaddr[i];
2688                 macaddr[5]++;
2689         } else {
2690                 const unsigned char *addr;
2691                 int len;
2692
2693                 addr = of_get_property(dp, "local-mac-address", &len);
2694
2695                 if (qfe_slot != -1 && addr && len == 6)
2696                         memcpy(dev->dev_addr, addr, 6);
2697                 else
2698                         memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
2699         }
2700
2701         hp = netdev_priv(dev);
2702
2703         hp->happy_dev = op;
2704         hp->dma_dev = &op->dev;
2705
2706         spin_lock_init(&hp->happy_lock);
2707
2708         err = -ENODEV;
2709         if (qp != NULL) {
2710                 hp->qfe_parent = qp;
2711                 hp->qfe_ent = qfe_slot;
2712                 qp->happy_meals[qfe_slot] = dev;
2713         }
2714
2715         hp->gregs = of_ioremap(&op->resource[0], 0,
2716                                GREG_REG_SIZE, "HME Global Regs");
2717         if (!hp->gregs) {
2718                 printk(KERN_ERR "happymeal: Cannot map global registers.\n");
2719                 goto err_out_free_netdev;
2720         }
2721
2722         hp->etxregs = of_ioremap(&op->resource[1], 0,
2723                                  ETX_REG_SIZE, "HME TX Regs");
2724         if (!hp->etxregs) {
2725                 printk(KERN_ERR "happymeal: Cannot map MAC TX registers.\n");
2726                 goto err_out_iounmap;
2727         }
2728
2729         hp->erxregs = of_ioremap(&op->resource[2], 0,
2730                                  ERX_REG_SIZE, "HME RX Regs");
2731         if (!hp->erxregs) {
2732                 printk(KERN_ERR "happymeal: Cannot map MAC RX registers.\n");
2733                 goto err_out_iounmap;
2734         }
2735
2736         hp->bigmacregs = of_ioremap(&op->resource[3], 0,
2737                                     BMAC_REG_SIZE, "HME BIGMAC Regs");
2738         if (!hp->bigmacregs) {
2739                 printk(KERN_ERR "happymeal: Cannot map BIGMAC registers.\n");
2740                 goto err_out_iounmap;
2741         }
2742
2743         hp->tcvregs = of_ioremap(&op->resource[4], 0,
2744                                  TCVR_REG_SIZE, "HME Tranceiver Regs");
2745         if (!hp->tcvregs) {
2746                 printk(KERN_ERR "happymeal: Cannot map TCVR registers.\n");
2747                 goto err_out_iounmap;
2748         }
2749
2750         hp->hm_revision = of_getintprop_default(dp, "hm-rev", 0xff);
2751         if (hp->hm_revision == 0xff)
2752                 hp->hm_revision = 0xa0;
2753
2754         /* Now enable the feature flags we can. */
2755         if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
2756                 hp->happy_flags = HFLAG_20_21;
2757         else if (hp->hm_revision != 0xa0)
2758                 hp->happy_flags = HFLAG_NOT_A0;
2759
2760         if (qp != NULL)
2761                 hp->happy_flags |= HFLAG_QUATTRO;
2762
2763         /* Get the supported DVMA burst sizes from our Happy SBUS. */
2764         hp->happy_bursts = of_getintprop_default(sbus_dp,
2765                                                  "burst-sizes", 0x00);
2766
2767         hp->happy_block = dma_alloc_coherent(hp->dma_dev,
2768                                              PAGE_SIZE,
2769                                              &hp->hblock_dvma,
2770                                              GFP_ATOMIC);
2771         err = -ENOMEM;
2772         if (!hp->happy_block) {
2773                 printk(KERN_ERR "happymeal: Cannot allocate descriptors.\n");
2774                 goto err_out_iounmap;
2775         }
2776
2777         /* Force check of the link first time we are brought up. */
2778         hp->linkcheck = 0;
2779
2780         /* Force timer state to 'asleep' with count of zero. */
2781         hp->timer_state = asleep;
2782         hp->timer_ticks = 0;
2783
2784         init_timer(&hp->happy_timer);
2785
2786         hp->dev = dev;
2787         dev->netdev_ops = &hme_netdev_ops;
2788         dev->watchdog_timeo = 5*HZ;
2789         dev->ethtool_ops = &hme_ethtool_ops;
2790
2791         /* Happy Meal can do it all... */
2792         dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
2793
2794         dev->irq = op->irqs[0];
2795
2796 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
2797         /* Hook up SBUS register/descriptor accessors. */
2798         hp->read_desc32 = sbus_hme_read_desc32;
2799         hp->write_txd = sbus_hme_write_txd;
2800         hp->write_rxd = sbus_hme_write_rxd;
2801         hp->read32 = sbus_hme_read32;
2802         hp->write32 = sbus_hme_write32;
2803 #endif
2804
2805         /* Grrr, Happy Meal comes up by default not advertising
2806          * full duplex 100baseT capabilities, fix this.
2807          */
2808         spin_lock_irq(&hp->happy_lock);
2809         happy_meal_set_initial_advertisement(hp);
2810         spin_unlock_irq(&hp->happy_lock);
2811
2812         if (register_netdev(hp->dev)) {
2813                 printk(KERN_ERR "happymeal: Cannot register net device, "
2814                        "aborting.\n");
2815                 goto err_out_free_coherent;
2816         }
2817
2818         dev_set_drvdata(&op->dev, hp);
2819
2820         if (qfe_slot != -1)
2821                 printk(KERN_INFO "%s: Quattro HME slot %d (SBUS) 10/100baseT Ethernet ",
2822                        dev->name, qfe_slot);
2823         else
2824                 printk(KERN_INFO "%s: HAPPY MEAL (SBUS) 10/100baseT Ethernet ",
2825                        dev->name);
2826
2827         printk("%pM\n", dev->dev_addr);
2828
2829         return 0;
2830
2831 err_out_free_coherent:
2832         dma_free_coherent(hp->dma_dev,
2833                           PAGE_SIZE,
2834                           hp->happy_block,
2835                           hp->hblock_dvma);
2836
2837 err_out_iounmap:
2838         if (hp->gregs)
2839                 of_iounmap(&op->resource[0], hp->gregs, GREG_REG_SIZE);
2840         if (hp->etxregs)
2841                 of_iounmap(&op->resource[1], hp->etxregs, ETX_REG_SIZE);
2842         if (hp->erxregs)
2843                 of_iounmap(&op->resource[2], hp->erxregs, ERX_REG_SIZE);
2844         if (hp->bigmacregs)
2845                 of_iounmap(&op->resource[3], hp->bigmacregs, BMAC_REG_SIZE);
2846         if (hp->tcvregs)
2847                 of_iounmap(&op->resource[4], hp->tcvregs, TCVR_REG_SIZE);
2848
2849         if (qp)
2850                 qp->happy_meals[qfe_slot] = NULL;
2851
2852 err_out_free_netdev:
2853         free_netdev(dev);
2854
2855 err_out:
2856         return err;
2857 }
2858 #endif
2859
2860 #ifdef CONFIG_PCI
2861 #ifndef CONFIG_SPARC
2862 static int is_quattro_p(struct pci_dev *pdev)
2863 {
2864         struct pci_dev *busdev = pdev->bus->self;
2865         struct list_head *tmp;
2866         int n_hmes;
2867
2868         if (busdev == NULL ||
2869             busdev->vendor != PCI_VENDOR_ID_DEC ||
2870             busdev->device != PCI_DEVICE_ID_DEC_21153)
2871                 return 0;
2872
2873         n_hmes = 0;
2874         tmp = pdev->bus->devices.next;
2875         while (tmp != &pdev->bus->devices) {
2876                 struct pci_dev *this_pdev = pci_dev_b(tmp);
2877
2878                 if (this_pdev->vendor == PCI_VENDOR_ID_SUN &&
2879                     this_pdev->device == PCI_DEVICE_ID_SUN_HAPPYMEAL)
2880                         n_hmes++;
2881
2882                 tmp = tmp->next;
2883         }
2884
2885         if (n_hmes != 4)
2886                 return 0;
2887
2888         return 1;
2889 }
2890
2891 /* Fetch MAC address from vital product data of PCI ROM. */
2892 static int find_eth_addr_in_vpd(void __iomem *rom_base, int len, int index, unsigned char *dev_addr)
2893 {
2894         int this_offset;
2895
2896         for (this_offset = 0x20; this_offset < len; this_offset++) {
2897                 void __iomem *p = rom_base + this_offset;
2898
2899                 if (readb(p + 0) != 0x90 ||
2900                     readb(p + 1) != 0x00 ||
2901                     readb(p + 2) != 0x09 ||
2902                     readb(p + 3) != 0x4e ||
2903                     readb(p + 4) != 0x41 ||
2904                     readb(p + 5) != 0x06)
2905                         continue;
2906
2907                 this_offset += 6;
2908                 p += 6;
2909
2910                 if (index == 0) {
2911                         int i;
2912
2913                         for (i = 0; i < 6; i++)
2914                                 dev_addr[i] = readb(p + i);
2915                         return 1;
2916                 }
2917                 index--;
2918         }
2919         return 0;
2920 }
2921
2922 static void get_hme_mac_nonsparc(struct pci_dev *pdev, unsigned char *dev_addr)
2923 {
2924         size_t size;
2925         void __iomem *p = pci_map_rom(pdev, &size);
2926
2927         if (p) {
2928                 int index = 0;
2929                 int found;
2930
2931                 if (is_quattro_p(pdev))
2932                         index = PCI_SLOT(pdev->devfn);
2933
2934                 found = readb(p) == 0x55 &&
2935                         readb(p + 1) == 0xaa &&
2936                         find_eth_addr_in_vpd(p, (64 * 1024), index, dev_addr);
2937                 pci_unmap_rom(pdev, p);
2938                 if (found)
2939                         return;
2940         }
2941
2942         /* Sun MAC prefix then 3 random bytes. */
2943         dev_addr[0] = 0x08;
2944         dev_addr[1] = 0x00;
2945         dev_addr[2] = 0x20;
2946         get_random_bytes(&dev_addr[3], 3);
2947         return;
2948 }
2949 #endif /* !(CONFIG_SPARC) */
2950
2951 static int __devinit happy_meal_pci_probe(struct pci_dev *pdev,
2952                                           const struct pci_device_id *ent)
2953 {
2954         struct quattro *qp = NULL;
2955 #ifdef CONFIG_SPARC
2956         struct device_node *dp;
2957 #endif
2958         struct happy_meal *hp;
2959         struct net_device *dev;
2960         void __iomem *hpreg_base;
2961         unsigned long hpreg_res;
2962         int i, qfe_slot = -1;
2963         char prom_name[64];
2964         int err;
2965
2966         /* Now make sure pci_dev cookie is there. */
2967 #ifdef CONFIG_SPARC
2968         dp = pci_device_to_OF_node(pdev);
2969         strcpy(prom_name, dp->name);
2970 #else
2971         if (is_quattro_p(pdev))
2972                 strcpy(prom_name, "SUNW,qfe");
2973         else
2974                 strcpy(prom_name, "SUNW,hme");
2975 #endif
2976
2977         err = -ENODEV;
2978
2979         if (pci_enable_device(pdev))
2980                 goto err_out;
2981         pci_set_master(pdev);
2982
2983         if (!strcmp(prom_name, "SUNW,qfe") || !strcmp(prom_name, "qfe")) {
2984                 qp = quattro_pci_find(pdev);
2985                 if (qp == NULL)
2986                         goto err_out;
2987                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
2988                         if (qp->happy_meals[qfe_slot] == NULL)
2989                                 break;
2990                 if (qfe_slot == 4)
2991                         goto err_out;
2992         }
2993
2994         dev = alloc_etherdev(sizeof(struct happy_meal));
2995         err = -ENOMEM;
2996         if (!dev)
2997                 goto err_out;
2998         SET_NETDEV_DEV(dev, &pdev->dev);
2999
3000         if (hme_version_printed++ == 0)
3001                 printk(KERN_INFO "%s", version);
3002
3003         dev->base_addr = (long) pdev;
3004
3005         hp = netdev_priv(dev);
3006         memset(hp, 0, sizeof(*hp));
3007
3008         hp->happy_dev = pdev;
3009         hp->dma_dev = &pdev->dev;
3010
3011         spin_lock_init(&hp->happy_lock);
3012
3013         if (qp != NULL) {
3014                 hp->qfe_parent = qp;
3015                 hp->qfe_ent = qfe_slot;
3016                 qp->happy_meals[qfe_slot] = dev;
3017         }
3018
3019         hpreg_res = pci_resource_start(pdev, 0);
3020         err = -ENODEV;
3021         if ((pci_resource_flags(pdev, 0) & IORESOURCE_IO) != 0) {
3022                 printk(KERN_ERR "happymeal(PCI): Cannot find proper PCI device base address.\n");
3023                 goto err_out_clear_quattro;
3024         }
3025         if (pci_request_regions(pdev, DRV_NAME)) {
3026                 printk(KERN_ERR "happymeal(PCI): Cannot obtain PCI resources, "
3027                        "aborting.\n");
3028                 goto err_out_clear_quattro;
3029         }
3030
3031         if ((hpreg_base = ioremap(hpreg_res, 0x8000)) == NULL) {
3032                 printk(KERN_ERR "happymeal(PCI): Unable to remap card memory.\n");
3033                 goto err_out_free_res;
3034         }
3035
3036         for (i = 0; i < 6; i++) {
3037                 if (macaddr[i] != 0)
3038                         break;
3039         }
3040         if (i < 6) { /* a mac address was given */
3041                 for (i = 0; i < 6; i++)
3042                         dev->dev_addr[i] = macaddr[i];
3043                 macaddr[5]++;
3044         } else {
3045 #ifdef CONFIG_SPARC
3046                 const unsigned char *addr;
3047                 int len;
3048
3049                 if (qfe_slot != -1 &&
3050                     (addr = of_get_property(dp,
3051                                             "local-mac-address", &len)) != NULL
3052                     && len == 6) {
3053                         memcpy(dev->dev_addr, addr, 6);
3054                 } else {
3055                         memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
3056                 }
3057 #else
3058                 get_hme_mac_nonsparc(pdev, &dev->dev_addr[0]);
3059 #endif
3060         }
3061
3062         /* Layout registers. */
3063         hp->gregs      = (hpreg_base + 0x0000UL);
3064         hp->etxregs    = (hpreg_base + 0x2000UL);
3065         hp->erxregs    = (hpreg_base + 0x4000UL);
3066         hp->bigmacregs = (hpreg_base + 0x6000UL);
3067         hp->tcvregs    = (hpreg_base + 0x7000UL);
3068
3069 #ifdef CONFIG_SPARC
3070         hp->hm_revision = of_getintprop_default(dp, "hm-rev", 0xff);
3071         if (hp->hm_revision == 0xff)
3072                 hp->hm_revision = 0xc0 | (pdev->revision & 0x0f);
3073 #else
3074         /* works with this on non-sparc hosts */
3075         hp->hm_revision = 0x20;
3076 #endif
3077
3078         /* Now enable the feature flags we can. */
3079         if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
3080                 hp->happy_flags = HFLAG_20_21;
3081         else if (hp->hm_revision != 0xa0 && hp->hm_revision != 0xc0)
3082                 hp->happy_flags = HFLAG_NOT_A0;
3083
3084         if (qp != NULL)
3085                 hp->happy_flags |= HFLAG_QUATTRO;
3086
3087         /* And of course, indicate this is PCI. */
3088         hp->happy_flags |= HFLAG_PCI;
3089
3090 #ifdef CONFIG_SPARC
3091         /* Assume PCI happy meals can handle all burst sizes. */
3092         hp->happy_bursts = DMA_BURSTBITS;
3093 #endif
3094
3095         hp->happy_block = (struct hmeal_init_block *)
3096                 dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &hp->hblock_dvma, GFP_KERNEL);
3097
3098         err = -ENODEV;
3099         if (!hp->happy_block) {
3100                 printk(KERN_ERR "happymeal(PCI): Cannot get hme init block.\n");
3101                 goto err_out_iounmap;
3102         }
3103
3104         hp->linkcheck = 0;
3105         hp->timer_state = asleep;
3106         hp->timer_ticks = 0;
3107
3108         init_timer(&hp->happy_timer);
3109
3110         hp->dev = dev;
3111         dev->netdev_ops = &hme_netdev_ops;
3112         dev->watchdog_timeo = 5*HZ;
3113         dev->ethtool_ops = &hme_ethtool_ops;
3114         dev->irq = pdev->irq;
3115         dev->dma = 0;
3116
3117         /* Happy Meal can do it all... */
3118         dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
3119
3120 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
3121         /* Hook up PCI register/descriptor accessors. */
3122         hp->read_desc32 = pci_hme_read_desc32;
3123         hp->write_txd = pci_hme_write_txd;
3124         hp->write_rxd = pci_hme_write_rxd;
3125         hp->read32 = pci_hme_read32;
3126         hp->write32 = pci_hme_write32;
3127 #endif
3128
3129         /* Grrr, Happy Meal comes up by default not advertising
3130          * full duplex 100baseT capabilities, fix this.
3131          */
3132         spin_lock_irq(&hp->happy_lock);
3133         happy_meal_set_initial_advertisement(hp);
3134         spin_unlock_irq(&hp->happy_lock);
3135
3136         if (register_netdev(hp->dev)) {
3137                 printk(KERN_ERR "happymeal(PCI): Cannot register net device, "
3138                        "aborting.\n");
3139                 goto err_out_iounmap;
3140         }
3141
3142         dev_set_drvdata(&pdev->dev, hp);
3143
3144         if (!qfe_slot) {
3145                 struct pci_dev *qpdev = qp->quattro_dev;
3146
3147                 prom_name[0] = 0;
3148                 if (!strncmp(dev->name, "eth", 3)) {
3149                         int i = simple_strtoul(dev->name + 3, NULL, 10);
3150                         sprintf(prom_name, "-%d", i + 3);
3151                 }
3152                 printk(KERN_INFO "%s%s: Quattro HME (PCI/CheerIO) 10/100baseT Ethernet ", dev->name, prom_name);
3153                 if (qpdev->vendor == PCI_VENDOR_ID_DEC &&
3154                     qpdev->device == PCI_DEVICE_ID_DEC_21153)
3155                         printk("DEC 21153 PCI Bridge\n");
3156                 else
3157                         printk("unknown bridge %04x.%04x\n",
3158                                 qpdev->vendor, qpdev->device);
3159         }
3160
3161         if (qfe_slot != -1)
3162                 printk(KERN_INFO "%s: Quattro HME slot %d (PCI/CheerIO) 10/100baseT Ethernet ",
3163                        dev->name, qfe_slot);
3164         else
3165                 printk(KERN_INFO "%s: HAPPY MEAL (PCI/CheerIO) 10/100BaseT Ethernet ",
3166                        dev->name);
3167
3168         printk("%pM\n", dev->dev_addr);
3169
3170         return 0;
3171
3172 err_out_iounmap:
3173         iounmap(hp->gregs);
3174
3175 err_out_free_res:
3176         pci_release_regions(pdev);
3177
3178 err_out_clear_quattro:
3179         if (qp != NULL)
3180                 qp->happy_meals[qfe_slot] = NULL;
3181
3182         free_netdev(dev);
3183
3184 err_out:
3185         return err;
3186 }
3187
3188 static void __devexit happy_meal_pci_remove(struct pci_dev *pdev)
3189 {
3190         struct happy_meal *hp = dev_get_drvdata(&pdev->dev);
3191         struct net_device *net_dev = hp->dev;
3192
3193         unregister_netdev(net_dev);
3194
3195         dma_free_coherent(hp->dma_dev, PAGE_SIZE,
3196                           hp->happy_block, hp->hblock_dvma);
3197         iounmap(hp->gregs);
3198         pci_release_regions(hp->happy_dev);
3199
3200         free_netdev(net_dev);
3201
3202         dev_set_drvdata(&pdev->dev, NULL);
3203 }
3204
3205 static struct pci_device_id happymeal_pci_ids[] = {
3206         { PCI_DEVICE(PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_HAPPYMEAL) },
3207         { }                     /* Terminating entry */
3208 };
3209
3210 MODULE_DEVICE_TABLE(pci, happymeal_pci_ids);
3211
3212 static struct pci_driver hme_pci_driver = {
3213         .name           = "hme",
3214         .id_table       = happymeal_pci_ids,
3215         .probe          = happy_meal_pci_probe,
3216         .remove         = __devexit_p(happy_meal_pci_remove),
3217 };
3218
3219 static int __init happy_meal_pci_init(void)
3220 {
3221         return pci_register_driver(&hme_pci_driver);
3222 }
3223
3224 static void happy_meal_pci_exit(void)
3225 {
3226         pci_unregister_driver(&hme_pci_driver);
3227
3228         while (qfe_pci_list) {
3229                 struct quattro *qfe = qfe_pci_list;
3230                 struct quattro *next = qfe->next;
3231
3232                 kfree(qfe);
3233
3234                 qfe_pci_list = next;
3235         }
3236 }
3237
3238 #endif
3239
3240 #ifdef CONFIG_SBUS
3241 static int __devinit hme_sbus_probe(struct of_device *op, const struct of_device_id *match)
3242 {
3243         struct device_node *dp = op->node;
3244         const char *model = of_get_property(dp, "model", NULL);
3245         int is_qfe = (match->data != NULL);
3246
3247         if (!is_qfe && model && !strcmp(model, "SUNW,sbus-qfe"))
3248                 is_qfe = 1;
3249
3250         return happy_meal_sbus_probe_one(op, is_qfe);
3251 }
3252
3253 static int __devexit hme_sbus_remove(struct of_device *op)
3254 {
3255         struct happy_meal *hp = dev_get_drvdata(&op->dev);
3256         struct net_device *net_dev = hp->dev;
3257
3258         unregister_netdev(net_dev);
3259
3260         /* XXX qfe parent interrupt... */
3261
3262         of_iounmap(&op->resource[0], hp->gregs, GREG_REG_SIZE);
3263         of_iounmap(&op->resource[1], hp->etxregs, ETX_REG_SIZE);
3264         of_iounmap(&op->resource[2], hp->erxregs, ERX_REG_SIZE);
3265         of_iounmap(&op->resource[3], hp->bigmacregs, BMAC_REG_SIZE);
3266         of_iounmap(&op->resource[4], hp->tcvregs, TCVR_REG_SIZE);
3267         dma_free_coherent(hp->dma_dev,
3268                           PAGE_SIZE,
3269                           hp->happy_block,
3270                           hp->hblock_dvma);
3271
3272         free_netdev(net_dev);
3273
3274         dev_set_drvdata(&op->dev, NULL);
3275
3276         return 0;
3277 }
3278
3279 static const struct of_device_id hme_sbus_match[] = {
3280         {
3281                 .name = "SUNW,hme",
3282         },
3283         {
3284                 .name = "SUNW,qfe",
3285                 .data = (void *) 1,
3286         },
3287         {
3288                 .name = "qfe",
3289                 .data = (void *) 1,
3290         },
3291         {},
3292 };
3293
3294 MODULE_DEVICE_TABLE(of, hme_sbus_match);
3295
3296 static struct of_platform_driver hme_sbus_driver = {
3297         .name           = "hme",
3298         .match_table    = hme_sbus_match,
3299         .probe          = hme_sbus_probe,
3300         .remove         = __devexit_p(hme_sbus_remove),
3301 };
3302
3303 static int __init happy_meal_sbus_init(void)
3304 {
3305         int err;
3306
3307         err = of_register_driver(&hme_sbus_driver, &of_bus_type);
3308         if (!err)
3309                 err = quattro_sbus_register_irqs();
3310
3311         return err;
3312 }
3313
3314 static void happy_meal_sbus_exit(void)
3315 {
3316         of_unregister_driver(&hme_sbus_driver);
3317         quattro_sbus_free_irqs();
3318
3319         while (qfe_sbus_list) {
3320                 struct quattro *qfe = qfe_sbus_list;
3321                 struct quattro *next = qfe->next;
3322
3323                 kfree(qfe);
3324
3325                 qfe_sbus_list = next;
3326         }
3327 }
3328 #endif
3329
3330 static int __init happy_meal_probe(void)
3331 {
3332         int err = 0;
3333
3334 #ifdef CONFIG_SBUS
3335         err = happy_meal_sbus_init();
3336 #endif
3337 #ifdef CONFIG_PCI
3338         if (!err) {
3339                 err = happy_meal_pci_init();
3340 #ifdef CONFIG_SBUS
3341                 if (err)
3342                         happy_meal_sbus_exit();
3343 #endif
3344         }
3345 #endif
3346
3347         return err;
3348 }
3349
3350
3351 static void __exit happy_meal_exit(void)
3352 {
3353 #ifdef CONFIG_SBUS
3354         happy_meal_sbus_exit();
3355 #endif
3356 #ifdef CONFIG_PCI
3357         happy_meal_pci_exit();
3358 #endif
3359 }
3360
3361 module_init(happy_meal_probe);
3362 module_exit(happy_meal_exit);