drivers/net/stmmac/stmmac_main.c

   1 /*******************************************************************************
   2   This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
   3   ST Ethernet IPs are built around a Synopsys IP Core.
   4
   5   Copyright (C) 2007-2009  STMicroelectronics Ltd
   6
   7   This program is free software; you can redistribute it and/or modify it
   8   under the terms and conditions of the GNU General Public License,
   9   version 2, as published by the Free Software Foundation.
  10
  11   This program is distributed in the hope it will be useful, but WITHOUT
  12   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14   more details.
  15
  16   You should have received a copy of the GNU General Public License along with
  17   this program; if not, write to the Free Software Foundation, Inc.,
  18   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  19
  20   The full GNU General Public License is included in this distribution in
  21   the file called "COPYING".
  22
  23   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
  24
  25   Documentation available at:
  26         http://www.stlinux.com
  27   Support available at:
  28         https://bugzilla.stlinux.com/
  29 *******************************************************************************/
  30
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/kernel.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/etherdevice.h>
  36 #include <linux/platform_device.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/skbuff.h>
  40 #include <linux/ethtool.h>
  41 #include <linux/if_ether.h>
  42 #include <linux/crc32.h>
  43 #include <linux/mii.h>
  44 #include <linux/phy.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/dma-mapping.h>
  47 #include <linux/slab.h>
  48 #include "stmmac.h"
  49
  50 #define STMMAC_RESOURCE_NAME    "stmmaceth"
  51 #define PHY_RESOURCE_NAME       "stmmacphy"
  52
  53 #undef STMMAC_DEBUG
  54 /*#define STMMAC_DEBUG*/
  55 #ifdef STMMAC_DEBUG
  56 #define DBG(nlevel, klevel, fmt, args...) \
  57                 ((void)(netif_msg_##nlevel(priv) && \
  58                 printk(KERN_##klevel fmt, ## args)))
  59 #else
  60 #define DBG(nlevel, klevel, fmt, args...) do { } while (0)
  61 #endif
  62
  63 #undef STMMAC_RX_DEBUG
  64 /*#define STMMAC_RX_DEBUG*/
  65 #ifdef STMMAC_RX_DEBUG
  66 #define RX_DBG(fmt, args...)  printk(fmt, ## args)
  67 #else
  68 #define RX_DBG(fmt, args...)  do { } while (0)
  69 #endif
  70
  71 #undef STMMAC_XMIT_DEBUG
  72 /*#define STMMAC_XMIT_DEBUG*/
  73 #ifdef STMMAC_TX_DEBUG
  74 #define TX_DBG(fmt, args...)  printk(fmt, ## args)
  75 #else
  76 #define TX_DBG(fmt, args...)  do { } while (0)
  77 #endif
  78
  79 #define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
  80 #define JUMBO_LEN       9000
  81
  82 /* Module parameters */
  83 #define TX_TIMEO 5000 /* default 5 seconds */
  84 static int watchdog = TX_TIMEO;
  85 module_param(watchdog, int, S_IRUGO | S_IWUSR);
  86 MODULE_PARM_DESC(watchdog, "Transmit timeout in milliseconds");
  87
  88 static int debug = -1;          /* -1: default, 0: no output, 16:  all */
  89 module_param(debug, int, S_IRUGO | S_IWUSR);
  90 MODULE_PARM_DESC(debug, "Message Level (0: no output, 16: all)");
  91
  92 static int phyaddr = -1;
  93 module_param(phyaddr, int, S_IRUGO);
  94 MODULE_PARM_DESC(phyaddr, "Physical device address");
  95
  96 #define DMA_TX_SIZE 256
  97 static int dma_txsize = DMA_TX_SIZE;
  98 module_param(dma_txsize, int, S_IRUGO | S_IWUSR);
  99 MODULE_PARM_DESC(dma_txsize, "Number of descriptors in the TX list");
 100
 101 #define DMA_RX_SIZE 256
 102 static int dma_rxsize = DMA_RX_SIZE;
 103 module_param(dma_rxsize, int, S_IRUGO | S_IWUSR);
 104 MODULE_PARM_DESC(dma_rxsize, "Number of descriptors in the RX list");
 105
 106 static int flow_ctrl = FLOW_OFF;
 107 module_param(flow_ctrl, int, S_IRUGO | S_IWUSR);
 108 MODULE_PARM_DESC(flow_ctrl, "Flow control ability [on/off]");
 109
 110 static int pause = PAUSE_TIME;
 111 module_param(pause, int, S_IRUGO | S_IWUSR);
 112 MODULE_PARM_DESC(pause, "Flow Control Pause Time");
 113
 114 #define TC_DEFAULT 64
 115 static int tc = TC_DEFAULT;
 116 module_param(tc, int, S_IRUGO | S_IWUSR);
 117 MODULE_PARM_DESC(tc, "DMA threshold control value");
 118
 119 #define RX_NO_COALESCE  1       /* Always interrupt on completion */
 120 #define TX_NO_COALESCE  -1      /* No moderation by default */
 121
 122 /* Pay attention to tune this parameter; take care of both
 123  * hardware capability and network stabitily/performance impact.
 124  * Many tests showed that ~4ms latency seems to be good enough. */
 125 #ifdef CONFIG_STMMAC_TIMER
 126 #define DEFAULT_PERIODIC_RATE   256
 127 static int tmrate = DEFAULT_PERIODIC_RATE;
 128 module_param(tmrate, int, S_IRUGO | S_IWUSR);
 129 MODULE_PARM_DESC(tmrate, "External timer freq. (default: 256Hz)");
 130 #endif
 131
 132 #define DMA_BUFFER_SIZE BUF_SIZE_2KiB
 133 static int buf_sz = DMA_BUFFER_SIZE;
 134 module_param(buf_sz, int, S_IRUGO | S_IWUSR);
 135 MODULE_PARM_DESC(buf_sz, "DMA buffer size");
 136
 137 /* In case of Giga ETH, we can enable/disable the COE for the
 138  * transmit HW checksum computation.
 139  * Note that, if tx csum is off in HW, SG will be still supported. */
 140 static int tx_coe = HW_CSUM;
 141 module_param(tx_coe, int, S_IRUGO | S_IWUSR);
 142 MODULE_PARM_DESC(tx_coe, "GMAC COE type 2 [on/off]");
 143
 144 static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
 145                                       NETIF_MSG_LINK | NETIF_MSG_IFUP |
 146                                       NETIF_MSG_IFDOWN | NETIF_MSG_TIMER);
 147
 148 static irqreturn_t stmmac_interrupt(int irq, void *dev_id);
 149 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev);
 150
 151 /**
 152  * stmmac_verify_args - verify the driver parameters.
 153  * Description: it verifies if some wrong parameter is passed to the driver.
 154  * Note that wrong parameters are replaced with the default values.
 155  */
 156 static void stmmac_verify_args(void)
 157 {
 158         if (unlikely(watchdog < 0))
 159                 watchdog = TX_TIMEO;
 160         if (unlikely(dma_rxsize < 0))
 161                 dma_rxsize = DMA_RX_SIZE;
 162         if (unlikely(dma_txsize < 0))
 163                 dma_txsize = DMA_TX_SIZE;
 164         if (unlikely((buf_sz < DMA_BUFFER_SIZE) || (buf_sz > BUF_SIZE_16KiB)))
 165                 buf_sz = DMA_BUFFER_SIZE;
 166         if (unlikely(flow_ctrl > 1))
 167                 flow_ctrl = FLOW_AUTO;
 168         else if (likely(flow_ctrl < 0))
 169                 flow_ctrl = FLOW_OFF;
 170         if (unlikely((pause < 0) || (pause > 0xffff)))
 171                 pause = PAUSE_TIME;
 172
 173         return;
 174 }
 175
 176 #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
 177 static void print_pkt(unsigned char *buf, int len)
 178 {
 179         int j;
 180         pr_info("len = %d byte, buf addr: 0x%p", len, buf);
 181         for (j = 0; j < len; j++) {
 182                 if ((j % 16) == 0)
 183                         pr_info("\n %03x:", j);
 184                 pr_info(" %02x", buf[j]);
 185         }
 186         pr_info("\n");
 187         return;
 188 }
 189 #endif
 190
 191 /* minimum number of free TX descriptors required to wake up TX process */
 192 #define STMMAC_TX_THRESH(x)     (x->dma_tx_size/4)
 193
 194 static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
 195 {
 196         return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1;
 197 }
 198
 199 /**
 200  * stmmac_adjust_link
 201  * @dev: net device structure
 202  * Description: it adjusts the link parameters.
 203  */
 204 static void stmmac_adjust_link(struct net_device *dev)
 205 {
 206         struct stmmac_priv *priv = netdev_priv(dev);
 207         struct phy_device *phydev = priv->phydev;
 208         unsigned long ioaddr = dev->base_addr;
 209         unsigned long flags;
 210         int new_state = 0;
 211         unsigned int fc = priv->flow_ctrl, pause_time = priv->pause;
 212
 213         if (phydev == NULL)
 214                 return;
 215
 216         DBG(probe, DEBUG, "stmmac_adjust_link: called.  address %d link %d\n",
 217             phydev->addr, phydev->link);
 218
 219         spin_lock_irqsave(&priv->lock, flags);
 220         if (phydev->link) {
 221                 u32 ctrl = readl(ioaddr + MAC_CTRL_REG);
 222
 223                 /* Now we make sure that we can be in full duplex mode.
 224                  * If not, we operate in half-duplex mode. */
 225                 if (phydev->duplex != priv->oldduplex) {
 226                         new_state = 1;
 227                         if (!(phydev->duplex))
 228                                 ctrl &= ~priv->hw->link.duplex;
 229                         else
 230                                 ctrl |= priv->hw->link.duplex;
 231                         priv->oldduplex = phydev->duplex;
 232                 }
 233                 /* Flow Control operation */
 234                 if (phydev->pause)
 235                         priv->hw->mac->flow_ctrl(ioaddr, phydev->duplex,
 236                                                  fc, pause_time);
 237
 238                 if (phydev->speed != priv->speed) {
 239                         new_state = 1;
 240                         switch (phydev->speed) {
 241                         case 1000:
 242                                 if (likely(priv->is_gmac))
 243                                         ctrl &= ~priv->hw->link.port;
 244                                 break;
 245                         case 100:
 246                         case 10:
 247                                 if (priv->is_gmac) {
 248                                         ctrl |= priv->hw->link.port;
 249                                         if (phydev->speed == SPEED_100) {
 250                                                 ctrl |= priv->hw->link.speed;
 251                                         } else {
 252                                                 ctrl &= ~(priv->hw->link.speed);
 253                                         }
 254                                 } else {
 255                                         ctrl &= ~priv->hw->link.port;
 256                                 }
 257                                 if (likely(priv->fix_mac_speed))
 258                                         priv->fix_mac_speed(priv->bsp_priv,
 259                                                             phydev->speed);
 260                                 break;
 261                         default:
 262                                 if (netif_msg_link(priv))
 263                                         pr_warning("%s: Speed (%d) is not 10"
 264                                        " or 100!\n", dev->name, phydev->speed);
 265                                 break;
 266                         }
 267
 268                         priv->speed = phydev->speed;
 269                 }
 270
 271                 writel(ctrl, ioaddr + MAC_CTRL_REG);
 272
 273                 if (!priv->oldlink) {
 274                         new_state = 1;
 275                         priv->oldlink = 1;
 276                 }
 277         } else if (priv->oldlink) {
 278                 new_state = 1;
 279                 priv->oldlink = 0;
 280                 priv->speed = 0;
 281                 priv->oldduplex = -1;
 282         }
 283
 284         if (new_state && netif_msg_link(priv))
 285                 phy_print_status(phydev);
 286
 287         spin_unlock_irqrestore(&priv->lock, flags);
 288
 289         DBG(probe, DEBUG, "stmmac_adjust_link: exiting\n");
 290 }
 291
 292 /**
 293  * stmmac_init_phy - PHY initialization
 294  * @dev: net device structure
 295  * Description: it initializes the driver's PHY state, and attaches the PHY
 296  * to the mac driver.
 297  *  Return value:
 298  *  0 on success
 299  */
 300 static int stmmac_init_phy(struct net_device *dev)
 301 {
 302         struct stmmac_priv *priv = netdev_priv(dev);
 303         struct phy_device *phydev;
 304         char phy_id[MII_BUS_ID_SIZE + 3];
 305         char bus_id[MII_BUS_ID_SIZE];
 306
 307         priv->oldlink = 0;
 308         priv->speed = 0;
 309         priv->oldduplex = -1;
 310
 311         if (priv->phy_addr == -1) {
 312                 /* We don't have a PHY, so do nothing */
 313                 return 0;
 314         }
 315
 316         snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->bus_id);
 317         snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
 318                  priv->phy_addr);
 319         pr_debug("stmmac_init_phy:  trying to attach to %s\n", phy_id);
 320
 321         phydev = phy_connect(dev, phy_id, &stmmac_adjust_link, 0,
 322                         priv->phy_interface);
 323
 324         if (IS_ERR(phydev)) {
 325                 pr_err("%s: Could not attach to PHY\n", dev->name);
 326                 return PTR_ERR(phydev);
 327         }
 328
 329         /*
 330          * Broken HW is sometimes missing the pull-up resistor on the
 331          * MDIO line, which results in reads to non-existent devices returning
 332          * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
 333          * device as well.
 334          * Note: phydev->phy_id is the result of reading the UID PHY registers.
 335          */
 336         if (phydev->phy_id == 0) {
 337                 phy_disconnect(phydev);
 338                 return -ENODEV;
 339         }
 340         pr_debug("stmmac_init_phy:  %s: attached to PHY (UID 0x%x)"
 341                " Link = %d\n", dev->name, phydev->phy_id, phydev->link);
 342
 343         priv->phydev = phydev;
 344
 345         return 0;
 346 }
 347
 348 static inline void stmmac_mac_enable_rx(unsigned long ioaddr)
 349 {
 350         u32 value = readl(ioaddr + MAC_CTRL_REG);
 351         value |= MAC_RNABLE_RX;
 352         /* Set the RE (receive enable bit into the MAC CTRL register).  */
 353         writel(value, ioaddr + MAC_CTRL_REG);
 354 }
 355
 356 static inline void stmmac_mac_enable_tx(unsigned long ioaddr)
 357 {
 358         u32 value = readl(ioaddr + MAC_CTRL_REG);
 359         value |= MAC_ENABLE_TX;
 360         /* Set the TE (transmit enable bit into the MAC CTRL register).  */
 361         writel(value, ioaddr + MAC_CTRL_REG);
 362 }
 363
 364 static inline void stmmac_mac_disable_rx(unsigned long ioaddr)
 365 {
 366         u32 value = readl(ioaddr + MAC_CTRL_REG);
 367         value &= ~MAC_RNABLE_RX;
 368         writel(value, ioaddr + MAC_CTRL_REG);
 369 }
 370
 371 static inline void stmmac_mac_disable_tx(unsigned long ioaddr)
 372 {
 373         u32 value = readl(ioaddr + MAC_CTRL_REG);
 374         value &= ~MAC_ENABLE_TX;
 375         writel(value, ioaddr + MAC_CTRL_REG);
 376 }
 377
 378 /**
 379  * display_ring
 380  * @p: pointer to the ring.
 381  * @size: size of the ring.
 382  * Description: display all the descriptors within the ring.
 383  */
 384 static void display_ring(struct dma_desc *p, int size)
 385 {
 386         struct tmp_s {
 387                 u64 a;
 388                 unsigned int b;
 389                 unsigned int c;
 390         };
 391         int i;
 392         for (i = 0; i < size; i++) {
 393                 struct tmp_s *x = (struct tmp_s *)(p + i);
 394                 pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
 395                        i, (unsigned int)virt_to_phys(&p[i]),
 396                        (unsigned int)(x->a), (unsigned int)((x->a) >> 32),
 397                        x->b, x->c);
 398                 pr_info("\n");
 399         }
 400 }
 401
 402 /**
 403  * init_dma_desc_rings - init the RX/TX descriptor rings
 404  * @dev: net device structure
 405  * Description:  this function initializes the DMA RX/TX descriptors
 406  * and allocates the socket buffers.
 407  */
 408 static void init_dma_desc_rings(struct net_device *dev)
 409 {
 410         int i;
 411         struct stmmac_priv *priv = netdev_priv(dev);
 412         struct sk_buff *skb;
 413         unsigned int txsize = priv->dma_tx_size;
 414         unsigned int rxsize = priv->dma_rx_size;
 415         unsigned int bfsize = priv->dma_buf_sz;
 416         int buff2_needed = 0, dis_ic = 0;
 417
 418         /* Set the Buffer size according to the MTU;
 419          * indeed, in case of jumbo we need to bump-up the buffer sizes.
 420          */
 421         if (unlikely(dev->mtu >= BUF_SIZE_8KiB))
 422                 bfsize = BUF_SIZE_16KiB;
 423         else if (unlikely(dev->mtu >= BUF_SIZE_4KiB))
 424                 bfsize = BUF_SIZE_8KiB;
 425         else if (unlikely(dev->mtu >= BUF_SIZE_2KiB))
 426                 bfsize = BUF_SIZE_4KiB;
 427         else if (unlikely(dev->mtu >= DMA_BUFFER_SIZE))
 428                 bfsize = BUF_SIZE_2KiB;
 429         else
 430                 bfsize = DMA_BUFFER_SIZE;
 431
 432 #ifdef CONFIG_STMMAC_TIMER
 433         /* Disable interrupts on completion for the reception if timer is on */
 434         if (likely(priv->tm->enable))
 435                 dis_ic = 1;
 436 #endif
 437         /* If the MTU exceeds 8k so use the second buffer in the chain */
 438         if (bfsize >= BUF_SIZE_8KiB)
 439                 buff2_needed = 1;
 440
 441         DBG(probe, INFO, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
 442             txsize, rxsize, bfsize);
 443
 444         priv->rx_skbuff_dma = kmalloc(rxsize * sizeof(dma_addr_t), GFP_KERNEL);
 445         priv->rx_skbuff =
 446             kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL);
 447         priv->dma_rx =
 448             (struct dma_desc *)dma_alloc_coherent(priv->device,
 449                                                   rxsize *
 450                                                   sizeof(struct dma_desc),
 451                                                   &priv->dma_rx_phy,
 452                                                   GFP_KERNEL);
 453         priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize,
 454                                        GFP_KERNEL);
 455         priv->dma_tx =
 456             (struct dma_desc *)dma_alloc_coherent(priv->device,
 457                                                   txsize *
 458                                                   sizeof(struct dma_desc),
 459                                                   &priv->dma_tx_phy,
 460                                                   GFP_KERNEL);
 461
 462         if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) {
 463                 pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__);
 464                 return;
 465         }
 466
 467         DBG(probe, INFO, "stmmac (%s) DMA desc rings: virt addr (Rx %p, "
 468             "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
 469             dev->name, priv->dma_rx, priv->dma_tx,
 470             (unsigned int)priv->dma_rx_phy, (unsigned int)priv->dma_tx_phy);
 471
 472         /* RX INITIALIZATION */
 473         DBG(probe, INFO, "stmmac: SKB addresses:\n"
 474                          "skb\t\tskb data\tdma data\n");
 475
 476         for (i = 0; i < rxsize; i++) {
 477                 struct dma_desc *p = priv->dma_rx + i;
 478
 479                 skb = netdev_alloc_skb_ip_align(dev, bfsize);
 480                 if (unlikely(skb == NULL)) {
 481                         pr_err("%s: Rx init fails; skb is NULL\n", __func__);
 482                         break;
 483                 }
 484                 priv->rx_skbuff[i] = skb;
 485                 priv->rx_skbuff_dma[i] = dma_map_single(priv->device, skb->data,
 486                                                 bfsize, DMA_FROM_DEVICE);
 487
 488                 p->des2 = priv->rx_skbuff_dma[i];
 489                 if (unlikely(buff2_needed))
 490                         p->des3 = p->des2 + BUF_SIZE_8KiB;
 491                 DBG(probe, INFO, "[%p]\t[%p]\t[%x]\n", priv->rx_skbuff[i],
 492                         priv->rx_skbuff[i]->data, priv->rx_skbuff_dma[i]);
 493         }
 494         priv->cur_rx = 0;
 495         priv->dirty_rx = (unsigned int)(i - rxsize);
 496         priv->dma_buf_sz = bfsize;
 497         buf_sz = bfsize;
 498
 499         /* TX INITIALIZATION */
 500         for (i = 0; i < txsize; i++) {
 501                 priv->tx_skbuff[i] = NULL;
 502                 priv->dma_tx[i].des2 = 0;
 503         }
 504         priv->dirty_tx = 0;
 505         priv->cur_tx = 0;
 506
 507         /* Clear the Rx/Tx descriptors */
 508         priv->hw->desc->init_rx_desc(priv->dma_rx, rxsize, dis_ic);
 509         priv->hw->desc->init_tx_desc(priv->dma_tx, txsize);
 510
 511         if (netif_msg_hw(priv)) {
 512                 pr_info("RX descriptor ring:\n");
 513                 display_ring(priv->dma_rx, rxsize);
 514                 pr_info("TX descriptor ring:\n");
 515                 display_ring(priv->dma_tx, txsize);
 516         }
 517         return;
 518 }
 519
 520 static void dma_free_rx_skbufs(struct stmmac_priv *priv)
 521 {
 522         int i;
 523
 524         for (i = 0; i < priv->dma_rx_size; i++) {
 525                 if (priv->rx_skbuff[i]) {
 526                         dma_unmap_single(priv->device, priv->rx_skbuff_dma[i],
 527                                          priv->dma_buf_sz, DMA_FROM_DEVICE);
 528                         dev_kfree_skb_any(priv->rx_skbuff[i]);
 529                 }
 530                 priv->rx_skbuff[i] = NULL;
 531         }
 532         return;
 533 }
 534
 535 static void dma_free_tx_skbufs(struct stmmac_priv *priv)
 536 {
 537         int i;
 538
 539         for (i = 0; i < priv->dma_tx_size; i++) {
 540                 if (priv->tx_skbuff[i] != NULL) {
 541                         struct dma_desc *p = priv->dma_tx + i;
 542                         if (p->des2)
 543                                 dma_unmap_single(priv->device, p->des2,
 544                                                  priv->hw->desc->get_tx_len(p),
 545                                                  DMA_TO_DEVICE);
 546                         dev_kfree_skb_any(priv->tx_skbuff[i]);
 547                         priv->tx_skbuff[i] = NULL;
 548                 }
 549         }
 550         return;
 551 }
 552
 553 static void free_dma_desc_resources(struct stmmac_priv *priv)
 554 {
 555         /* Release the DMA TX/RX socket buffers */
 556         dma_free_rx_skbufs(priv);
 557         dma_free_tx_skbufs(priv);
 558
 559         /* Free the region of consistent memory previously allocated for
 560          * the DMA */
 561         dma_free_coherent(priv->device,
 562                           priv->dma_tx_size * sizeof(struct dma_desc),
 563                           priv->dma_tx, priv->dma_tx_phy);
 564         dma_free_coherent(priv->device,
 565                           priv->dma_rx_size * sizeof(struct dma_desc),
 566                           priv->dma_rx, priv->dma_rx_phy);
 567         kfree(priv->rx_skbuff_dma);
 568         kfree(priv->rx_skbuff);
 569         kfree(priv->tx_skbuff);
 570
 571         return;
 572 }
 573
 574 /**
 575  *  stmmac_dma_operation_mode - HW DMA operation mode
 576  *  @priv : pointer to the private device structure.
 577  *  Description: it sets the DMA operation mode: tx/rx DMA thresholds
 578  *  or Store-And-Forward capability. It also verifies the COE for the
 579  *  transmission in case of Giga ETH.
 580  */
 581 static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
 582 {
 583         if (!priv->is_gmac) {
 584                 /* MAC 10/100 */
 585                 priv->hw->dma->dma_mode(priv->dev->base_addr, tc, 0);
 586                 priv->tx_coe = NO_HW_CSUM;
 587         } else {
 588                 if ((priv->dev->mtu <= ETH_DATA_LEN) && (tx_coe)) {
 589                         priv->hw->dma->dma_mode(priv->dev->base_addr,
 590                                                 SF_DMA_MODE, SF_DMA_MODE);
 591                         tc = SF_DMA_MODE;
 592                         priv->tx_coe = HW_CSUM;
 593                 } else {
 594                         /* Checksum computation is performed in software. */
 595                         priv->hw->dma->dma_mode(priv->dev->base_addr, tc,
 596                                                 SF_DMA_MODE);
 597                         priv->tx_coe = NO_HW_CSUM;
 598                 }
 599         }
 600         tx_coe = priv->tx_coe;
 601
 602         return;
 603 }
 604
 605 /**
 606  * stmmac_tx:
 607  * @priv: private driver structure
 608  * Description: it reclaims resources after transmission completes.
 609  */
 610 static void stmmac_tx(struct stmmac_priv *priv)
 611 {
 612         unsigned int txsize = priv->dma_tx_size;
 613         unsigned long ioaddr = priv->dev->base_addr;
 614
 615         while (priv->dirty_tx != priv->cur_tx) {
 616                 int last;
 617                 unsigned int entry = priv->dirty_tx % txsize;
 618                 struct sk_buff *skb = priv->tx_skbuff[entry];
 619                 struct dma_desc *p = priv->dma_tx + entry;
 620
 621                 /* Check if the descriptor is owned by the DMA. */
 622                 if (priv->hw->desc->get_tx_owner(p))
 623                         break;
 624
 625                 /* Verify tx error by looking at the last segment */
 626                 last = priv->hw->desc->get_tx_ls(p);
 627                 if (likely(last)) {
 628                         int tx_error =
 629                                 priv->hw->desc->tx_status(&priv->dev->stats,
 630                                                           &priv->xstats, p,
 631                                                           ioaddr);
 632                         if (likely(tx_error == 0)) {
 633                                 priv->dev->stats.tx_packets++;
 634                                 priv->xstats.tx_pkt_n++;
 635                         } else
 636                                 priv->dev->stats.tx_errors++;
 637                 }
 638                 TX_DBG("%s: curr %d, dirty %d\n", __func__,
 639                         priv->cur_tx, priv->dirty_tx);
 640
 641                 if (likely(p->des2))
 642                         dma_unmap_single(priv->device, p->des2,
 643                                          priv->hw->desc->get_tx_len(p),
 644                                          DMA_TO_DEVICE);
 645                 if (unlikely(p->des3))
 646                         p->des3 = 0;
 647
 648                 if (likely(skb != NULL)) {
 649                         /*
 650                          * If there's room in the queue (limit it to size)
 651                          * we add this skb back into the pool,
 652                          * if it's the right size.
 653                          */
 654                         if ((skb_queue_len(&priv->rx_recycle) <
 655                                 priv->dma_rx_size) &&
 656                                 skb_recycle_check(skb, priv->dma_buf_sz))
 657                                 __skb_queue_head(&priv->rx_recycle, skb);
 658                         else
 659                                 dev_kfree_skb(skb);
 660
 661                         priv->tx_skbuff[entry] = NULL;
 662                 }
 663
 664                 priv->hw->desc->release_tx_desc(p);
 665
 666                 entry = (++priv->dirty_tx) % txsize;
 667         }
 668         if (unlikely(netif_queue_stopped(priv->dev) &&
 669                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv))) {
 670                 netif_tx_lock(priv->dev);
 671                 if (netif_queue_stopped(priv->dev) &&
 672                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv)) {
 673                         TX_DBG("%s: restart transmit\n", __func__);
 674                         netif_wake_queue(priv->dev);
 675                 }
 676                 netif_tx_unlock(priv->dev);
 677         }
 678         return;
 679 }
 680
 681 static inline void stmmac_enable_irq(struct stmmac_priv *priv)
 682 {
 683 #ifdef CONFIG_STMMAC_TIMER
 684         if (likely(priv->tm->enable))
 685                 priv->tm->timer_start(tmrate);
 686         else
 687 #endif
 688                 priv->hw->dma->enable_dma_irq(priv->dev->base_addr);
 689 }
 690
 691 static inline void stmmac_disable_irq(struct stmmac_priv *priv)
 692 {
 693 #ifdef CONFIG_STMMAC_TIMER
 694         if (likely(priv->tm->enable))
 695                 priv->tm->timer_stop();
 696         else
 697 #endif
 698                 priv->hw->dma->disable_dma_irq(priv->dev->base_addr);
 699 }
 700
 701 static int stmmac_has_work(struct stmmac_priv *priv)
 702 {
 703         unsigned int has_work = 0;
 704         int rxret, tx_work = 0;
 705
 706         rxret = priv->hw->desc->get_rx_owner(priv->dma_rx +
 707                 (priv->cur_rx % priv->dma_rx_size));
 708
 709         if (priv->dirty_tx != priv->cur_tx)
 710                 tx_work = 1;
 711
 712         if (likely(!rxret || tx_work))
 713                 has_work = 1;
 714
 715         return has_work;
 716 }
 717
 718 static inline void _stmmac_schedule(struct stmmac_priv *priv)
 719 {
 720         if (likely(stmmac_has_work(priv))) {
 721                 stmmac_disable_irq(priv);
 722                 napi_schedule(&priv->napi);
 723         }
 724 }
 725
 726 #ifdef CONFIG_STMMAC_TIMER
 727 void stmmac_schedule(struct net_device *dev)
 728 {
 729         struct stmmac_priv *priv = netdev_priv(dev);
 730
 731         priv->xstats.sched_timer_n++;
 732
 733         _stmmac_schedule(priv);
 734
 735         return;
 736 }
 737
 738 static void stmmac_no_timer_started(unsigned int x)
 739 {;
 740 };
 741
 742 static void stmmac_no_timer_stopped(void)
 743 {;
 744 };
 745 #endif
 746
 747 /**
 748  * stmmac_tx_err:
 749  * @priv: pointer to the private device structure
 750  * Description: it cleans the descriptors and restarts the transmission
 751  * in case of errors.
 752  */
 753 static void stmmac_tx_err(struct stmmac_priv *priv)
 754 {
 755         netif_stop_queue(priv->dev);
 756
 757         priv->hw->dma->stop_tx(priv->dev->base_addr);
 758         dma_free_tx_skbufs(priv);
 759         priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
 760         priv->dirty_tx = 0;
 761         priv->cur_tx = 0;
 762         priv->hw->dma->start_tx(priv->dev->base_addr);
 763
 764         priv->dev->stats.tx_errors++;
 765         netif_wake_queue(priv->dev);
 766
 767         return;
 768 }
 769
 770
 771 static void stmmac_dma_interrupt(struct stmmac_priv *priv)
 772 {
 773         unsigned long ioaddr = priv->dev->base_addr;
 774         int status;
 775
 776         status = priv->hw->dma->dma_interrupt(priv->dev->base_addr,
 777                                               &priv->xstats);
 778         if (likely(status == handle_tx_rx))
 779                 _stmmac_schedule(priv);
 780
 781         else if (unlikely(status == tx_hard_error_bump_tc)) {
 782                 /* Try to bump up the dma threshold on this failure */
 783                 if (unlikely(tc != SF_DMA_MODE) && (tc <= 256)) {
 784                         tc += 64;
 785                         priv->hw->dma->dma_mode(ioaddr, tc, SF_DMA_MODE);
 786                         priv->xstats.threshold = tc;
 787                 }
 788                 stmmac_tx_err(priv);
 789         } else if (unlikely(status == tx_hard_error))
 790                 stmmac_tx_err(priv);
 791
 792         return;
 793 }
 794
 795 /**
 796  *  stmmac_open - open entry point of the driver
 797  *  @dev : pointer to the device structure.
 798  *  Description:
 799  *  This function is the open entry point of the driver.
 800  *  Return value:
 801  *  0 on success and an appropriate (-)ve integer as defined in errno.h
 802  *  file on failure.
 803  */
 804 static int stmmac_open(struct net_device *dev)
 805 {
 806         struct stmmac_priv *priv = netdev_priv(dev);
 807         unsigned long ioaddr = dev->base_addr;
 808         int ret;
 809
 810         /* Check that the MAC address is valid.  If its not, refuse
 811          * to bring the device up. The user must specify an
 812          * address using the following linux command:
 813          *      ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx  */
 814         if (!is_valid_ether_addr(dev->dev_addr)) {
 815                 random_ether_addr(dev->dev_addr);
 816                 pr_warning("%s: generated random MAC address %pM\n", dev->name,
 817                         dev->dev_addr);
 818         }
 819
 820         stmmac_verify_args();
 821
 822         ret = stmmac_init_phy(dev);
 823         if (unlikely(ret)) {
 824                 pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__, ret);
 825                 return ret;
 826         }
 827
 828         /* Request the IRQ lines */
 829         ret = request_irq(dev->irq, stmmac_interrupt,
 830                           IRQF_SHARED, dev->name, dev);
 831         if (unlikely(ret < 0)) {
 832                 pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
 833                        __func__, dev->irq, ret);
 834                 return ret;
 835         }
 836
 837 #ifdef CONFIG_STMMAC_TIMER
 838         priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
 839         if (unlikely(priv->tm == NULL)) {
 840                 pr_err("%s: ERROR: timer memory alloc failed \n", __func__);
 841                 return -ENOMEM;
 842         }
 843         priv->tm->freq = tmrate;
 844
 845         /* Test if the external timer can be actually used.
 846          * In case of failure continue without timer. */
 847         if (unlikely((stmmac_open_ext_timer(dev, priv->tm)) < 0)) {
 848                 pr_warning("stmmaceth: cannot attach the external timer.\n");
 849                 tmrate = 0;
 850                 priv->tm->freq = 0;
 851                 priv->tm->timer_start = stmmac_no_timer_started;
 852                 priv->tm->timer_stop = stmmac_no_timer_stopped;
 853         } else
 854                 priv->tm->enable = 1;
 855 #endif
 856
 857         /* Create and initialize the TX/RX descriptors chains. */
 858         priv->dma_tx_size = STMMAC_ALIGN(dma_txsize);
 859         priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
 860         priv->dma_buf_sz = STMMAC_ALIGN(buf_sz);
 861         init_dma_desc_rings(dev);
 862
 863         /* DMA initialization and SW reset */
 864         if (unlikely(priv->hw->dma->init(ioaddr, priv->pbl, priv->dma_tx_phy,
 865                                          priv->dma_rx_phy) < 0)) {
 866
 867                 pr_err("%s: DMA initialization failed\n", __func__);
 868                 return -1;
 869         }
 870
 871         /* Copy the MAC addr into the HW  */
 872         priv->hw->mac->set_umac_addr(ioaddr, dev->dev_addr, 0);
 873         /* If required, perform hw setup of the bus. */
 874         if (priv->bus_setup)
 875                 priv->bus_setup(ioaddr);
 876         /* Initialize the MAC Core */
 877         priv->hw->mac->core_init(ioaddr);
 878
 879         priv->shutdown = 0;
 880
 881         /* Initialise the MMC (if present) to disable all interrupts. */
 882         writel(0xffffffff, ioaddr + MMC_HIGH_INTR_MASK);
 883         writel(0xffffffff, ioaddr + MMC_LOW_INTR_MASK);
 884
 885         /* Enable the MAC Rx/Tx */
 886         stmmac_mac_enable_rx(ioaddr);
 887         stmmac_mac_enable_tx(ioaddr);
 888
 889         /* Set the HW DMA mode and the COE */
 890         stmmac_dma_operation_mode(priv);
 891
 892         /* Extra statistics */
 893         memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
 894         priv->xstats.threshold = tc;
 895
 896         /* Start the ball rolling... */
 897         DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
 898         priv->hw->dma->start_tx(ioaddr);
 899         priv->hw->dma->start_rx(ioaddr);
 900
 901 #ifdef CONFIG_STMMAC_TIMER
 902         priv->tm->timer_start(tmrate);
 903 #endif
 904         /* Dump DMA/MAC registers */
 905         if (netif_msg_hw(priv)) {
 906                 priv->hw->mac->dump_regs(ioaddr);
 907                 priv->hw->dma->dump_regs(ioaddr);
 908         }
 909
 910         if (priv->phydev)
 911                 phy_start(priv->phydev);
 912
 913         napi_enable(&priv->napi);
 914         skb_queue_head_init(&priv->rx_recycle);
 915         netif_start_queue(dev);
 916         return 0;
 917 }
 918
 919 /**
 920  *  stmmac_release - close entry point of the driver
 921  *  @dev : device pointer.
 922  *  Description:
 923  *  This is the stop entry point of the driver.
 924  */
 925 static int stmmac_release(struct net_device *dev)
 926 {
 927         struct stmmac_priv *priv = netdev_priv(dev);
 928
 929         /* Stop and disconnect the PHY */
 930         if (priv->phydev) {
 931                 phy_stop(priv->phydev);
 932                 phy_disconnect(priv->phydev);
 933                 priv->phydev = NULL;
 934         }
 935
 936         netif_stop_queue(dev);
 937
 938 #ifdef CONFIG_STMMAC_TIMER
 939         /* Stop and release the timer */
 940         stmmac_close_ext_timer();
 941         if (priv->tm != NULL)
 942                 kfree(priv->tm);
 943 #endif
 944         napi_disable(&priv->napi);
 945         skb_queue_purge(&priv->rx_recycle);
 946
 947         /* Free the IRQ lines */
 948         free_irq(dev->irq, dev);
 949
 950         /* Stop TX/RX DMA and clear the descriptors */
 951         priv->hw->dma->stop_tx(dev->base_addr);
 952         priv->hw->dma->stop_rx(dev->base_addr);
 953
 954         /* Release and free the Rx/Tx resources */
 955         free_dma_desc_resources(priv);
 956
 957         /* Disable the MAC core */
 958         stmmac_mac_disable_tx(dev->base_addr);
 959         stmmac_mac_disable_rx(dev->base_addr);
 960
 961         netif_carrier_off(dev);
 962
 963         return 0;
 964 }
 965
 966 /*
 967  * To perform emulated hardware segmentation on skb.
 968  */
 969 static int stmmac_sw_tso(struct stmmac_priv *priv, struct sk_buff *skb)
 970 {
 971         struct sk_buff *segs, *curr_skb;
 972         int gso_segs = skb_shinfo(skb)->gso_segs;
 973
 974         /* Estimate the number of fragments in the worst case */
 975         if (unlikely(stmmac_tx_avail(priv) < gso_segs)) {
 976                 netif_stop_queue(priv->dev);
 977                 TX_DBG(KERN_ERR "%s: TSO BUG! Tx Ring full when queue awake\n",
 978                        __func__);
 979                 if (stmmac_tx_avail(priv) < gso_segs)
 980                         return NETDEV_TX_BUSY;
 981
 982                 netif_wake_queue(priv->dev);
 983         }
 984         TX_DBG("\tstmmac_sw_tso: segmenting: skb %p (len %d)\n",
 985                skb, skb->len);
 986
 987         segs = skb_gso_segment(skb, priv->dev->features & ~NETIF_F_TSO);
 988         if (unlikely(IS_ERR(segs)))
 989                 goto sw_tso_end;
 990
 991         do {
 992                 curr_skb = segs;
 993                 segs = segs->next;
 994                 TX_DBG("\t\tcurrent skb->len: %d, *curr %p,"
 995                        "*next %p\n", curr_skb->len, curr_skb, segs);
 996                 curr_skb->next = NULL;
 997                 stmmac_xmit(curr_skb, priv->dev);
 998         } while (segs);
 999
1000 sw_tso_end:
1001         dev_kfree_skb(skb);
1002
1003         return NETDEV_TX_OK;
1004 }
1005
1006 static unsigned int stmmac_handle_jumbo_frames(struct sk_buff *skb,
1007                                                struct net_device *dev,
1008                                                int csum_insertion)
1009 {
1010         struct stmmac_priv *priv = netdev_priv(dev);
1011         unsigned int nopaged_len = skb_headlen(skb);
1012         unsigned int txsize = priv->dma_tx_size;
1013         unsigned int entry = priv->cur_tx % txsize;
1014         struct dma_desc *desc = priv->dma_tx + entry;
1015
1016         if (nopaged_len > BUF_SIZE_8KiB) {
1017
1018                 int buf2_size = nopaged_len - BUF_SIZE_8KiB;
1019
1020                 desc->des2 = dma_map_single(priv->device, skb->data,
1021                                             BUF_SIZE_8KiB, DMA_TO_DEVICE);
1022                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1023                 priv->hw->desc->prepare_tx_desc(desc, 1, BUF_SIZE_8KiB,
1024                                                 csum_insertion);
1025
1026                 entry = (++priv->cur_tx) % txsize;
1027                 desc = priv->dma_tx + entry;
1028
1029                 desc->des2 = dma_map_single(priv->device,
1030                                         skb->data + BUF_SIZE_8KiB,
1031                                         buf2_size, DMA_TO_DEVICE);
1032                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1033                 priv->hw->desc->prepare_tx_desc(desc, 0, buf2_size,
1034                                                 csum_insertion);
1035                 priv->hw->desc->set_tx_owner(desc);
1036                 priv->tx_skbuff[entry] = NULL;
1037         } else {
1038                 desc->des2 = dma_map_single(priv->device, skb->data,
1039                                         nopaged_len, DMA_TO_DEVICE);
1040                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1041                 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1042                                                 csum_insertion);
1043         }
1044         return entry;
1045 }
1046
1047 /**
1048  *  stmmac_xmit:
1049  *  @skb : the socket buffer
1050  *  @dev : device pointer
1051  *  Description : Tx entry point of the driver.
1052  */
1053 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
1054 {
1055         struct stmmac_priv *priv = netdev_priv(dev);
1056         unsigned int txsize = priv->dma_tx_size;
1057         unsigned int entry;
1058         int i, csum_insertion = 0;
1059         int nfrags = skb_shinfo(skb)->nr_frags;
1060         struct dma_desc *desc, *first;
1061
1062         if (unlikely(stmmac_tx_avail(priv) < nfrags + 1)) {
1063                 if (!netif_queue_stopped(dev)) {
1064                         netif_stop_queue(dev);
1065                         /* This is a hard error, log it. */
1066                         pr_err("%s: BUG! Tx Ring full when queue awake\n",
1067                                 __func__);
1068                 }
1069                 return NETDEV_TX_BUSY;
1070         }
1071
1072         entry = priv->cur_tx % txsize;
1073
1074 #ifdef STMMAC_XMIT_DEBUG
1075         if ((skb->len > ETH_FRAME_LEN) || nfrags)
1076                 pr_info("stmmac xmit:\n"
1077                        "\tskb addr %p - len: %d - nopaged_len: %d\n"
1078                        "\tn_frags: %d - ip_summed: %d - %s gso\n",
1079                        skb, skb->len, skb_headlen(skb), nfrags, skb->ip_summed,
1080                        !skb_is_gso(skb) ? "isn't" : "is");
1081 #endif
1082
1083         if (unlikely(skb_is_gso(skb)))
1084                 return stmmac_sw_tso(priv, skb);
1085
1086         if (likely((skb->ip_summed == CHECKSUM_PARTIAL))) {
1087                 if (likely(priv->tx_coe == NO_HW_CSUM))
1088                         skb_checksum_help(skb);
1089                 else
1090                         csum_insertion = 1;
1091         }
1092
1093         desc = priv->dma_tx + entry;
1094         first = desc;
1095
1096 #ifdef STMMAC_XMIT_DEBUG
1097         if ((nfrags > 0) || (skb->len > ETH_FRAME_LEN))
1098                 pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1099                        "\t\tn_frags: %d, ip_summed: %d\n",
1100                        skb->len, skb_headlen(skb), nfrags, skb->ip_summed);
1101 #endif
1102         priv->tx_skbuff[entry] = skb;
1103         if (unlikely(skb->len >= BUF_SIZE_4KiB)) {
1104                 entry = stmmac_handle_jumbo_frames(skb, dev, csum_insertion);
1105                 desc = priv->dma_tx + entry;
1106         } else {
1107                 unsigned int nopaged_len = skb_headlen(skb);
1108                 desc->des2 = dma_map_single(priv->device, skb->data,
1109                                         nopaged_len, DMA_TO_DEVICE);
1110                 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1111                                                 csum_insertion);
1112         }
1113
1114         for (i = 0; i < nfrags; i++) {
1115                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1116                 int len = frag->size;
1117
1118                 entry = (++priv->cur_tx) % txsize;
1119                 desc = priv->dma_tx + entry;
1120
1121                 TX_DBG("\t[entry %d] segment len: %d\n", entry, len);
1122                 desc->des2 = dma_map_page(priv->device, frag->page,
1123                                           frag->page_offset,
1124                                           len, DMA_TO_DEVICE);
1125                 priv->tx_skbuff[entry] = NULL;
1126                 priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion);
1127                 priv->hw->desc->set_tx_owner(desc);
1128         }
1129
1130         /* Interrupt on completition only for the latest segment */
1131         priv->hw->desc->close_tx_desc(desc);
1132
1133 #ifdef CONFIG_STMMAC_TIMER
1134         /* Clean IC while using timer */
1135         if (likely(priv->tm->enable))
1136                 priv->hw->desc->clear_tx_ic(desc);
1137 #endif
1138         /* To avoid raise condition */
1139         priv->hw->desc->set_tx_owner(first);
1140
1141         priv->cur_tx++;
1142
1143 #ifdef STMMAC_XMIT_DEBUG
1144         if (netif_msg_pktdata(priv)) {
1145                 pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1146                        "first=%p, nfrags=%d\n",
1147                        (priv->cur_tx % txsize), (priv->dirty_tx % txsize),
1148                        entry, first, nfrags);
1149                 display_ring(priv->dma_tx, txsize);
1150                 pr_info(">>> frame to be transmitted: ");
1151                 print_pkt(skb->data, skb->len);
1152         }
1153 #endif
1154         if (unlikely(stmmac_tx_avail(priv) <= (MAX_SKB_FRAGS + 1))) {
1155                 TX_DBG("%s: stop transmitted packets\n", __func__);
1156                 netif_stop_queue(dev);
1157         }
1158
1159         dev->stats.tx_bytes += skb->len;
1160
1161         priv->hw->dma->enable_dma_transmission(dev->base_addr);
1162
1163         return NETDEV_TX_OK;
1164 }
1165
1166 static inline void stmmac_rx_refill(struct stmmac_priv *priv)
1167 {
1168         unsigned int rxsize = priv->dma_rx_size;
1169         int bfsize = priv->dma_buf_sz;
1170         struct dma_desc *p = priv->dma_rx;
1171
1172         for (; priv->cur_rx - priv->dirty_rx > 0; priv->dirty_rx++) {
1173                 unsigned int entry = priv->dirty_rx % rxsize;
1174                 if (likely(priv->rx_skbuff[entry] == NULL)) {
1175                         struct sk_buff *skb;
1176
1177                         skb = __skb_dequeue(&priv->rx_recycle);
1178                         if (skb == NULL)
1179                                 skb = netdev_alloc_skb_ip_align(priv->dev,
1180                                                                 bfsize);
1181
1182                         if (unlikely(skb == NULL))
1183                                 break;
1184
1185                         priv->rx_skbuff[entry] = skb;
1186                         priv->rx_skbuff_dma[entry] =
1187                             dma_map_single(priv->device, skb->data, bfsize,
1188                                            DMA_FROM_DEVICE);
1189
1190                         (p + entry)->des2 = priv->rx_skbuff_dma[entry];
1191                         if (unlikely(priv->is_gmac)) {
1192                                 if (bfsize >= BUF_SIZE_8KiB)
1193                                         (p + entry)->des3 =
1194                                             (p + entry)->des2 + BUF_SIZE_8KiB;
1195                         }
1196                         RX_DBG(KERN_INFO "\trefill entry #%d\n", entry);
1197                 }
1198                 priv->hw->desc->set_rx_owner(p + entry);
1199         }
1200         return;
1201 }
1202
1203 static int stmmac_rx(struct stmmac_priv *priv, int limit)
1204 {
1205         unsigned int rxsize = priv->dma_rx_size;
1206         unsigned int entry = priv->cur_rx % rxsize;
1207         unsigned int next_entry;
1208         unsigned int count = 0;
1209         struct dma_desc *p = priv->dma_rx + entry;
1210         struct dma_desc *p_next;
1211
1212 #ifdef STMMAC_RX_DEBUG
1213         if (netif_msg_hw(priv)) {
1214                 pr_debug(">>> stmmac_rx: descriptor ring:\n");
1215                 display_ring(priv->dma_rx, rxsize);
1216         }
1217 #endif
1218         count = 0;
1219         while (!priv->hw->desc->get_rx_owner(p)) {
1220                 int status;
1221
1222                 if (count >= limit)
1223                         break;
1224
1225                 count++;
1226
1227                 next_entry = (++priv->cur_rx) % rxsize;
1228                 p_next = priv->dma_rx + next_entry;
1229                 prefetch(p_next);
1230
1231                 /* read the status of the incoming frame */
1232                 status = (priv->hw->desc->rx_status(&priv->dev->stats,
1233                                                     &priv->xstats, p));
1234                 if (unlikely(status == discard_frame))
1235                         priv->dev->stats.rx_errors++;
1236                 else {
1237                         struct sk_buff *skb;
1238                         /* Length should omit the CRC */
1239                         int frame_len = priv->hw->desc->get_rx_frame_len(p) - 4;
1240
1241 #ifdef STMMAC_RX_DEBUG
1242                         if (frame_len > ETH_FRAME_LEN)
1243                                 pr_debug("\tRX frame size %d, COE status: %d\n",
1244                                         frame_len, status);
1245
1246                         if (netif_msg_hw(priv))
1247                                 pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1248                                         p, entry, p->des2);
1249 #endif
1250                         skb = priv->rx_skbuff[entry];
1251                         if (unlikely(!skb)) {
1252                                 pr_err("%s: Inconsistent Rx descriptor chain\n",
1253                                         priv->dev->name);
1254                                 priv->dev->stats.rx_dropped++;
1255                                 break;
1256                         }
1257                         prefetch(skb->data - NET_IP_ALIGN);
1258                         priv->rx_skbuff[entry] = NULL;
1259
1260                         skb_put(skb, frame_len);
1261                         dma_unmap_single(priv->device,
1262                                          priv->rx_skbuff_dma[entry],
1263                                          priv->dma_buf_sz, DMA_FROM_DEVICE);
1264 #ifdef STMMAC_RX_DEBUG
1265                         if (netif_msg_pktdata(priv)) {
1266                                 pr_info(" frame received (%dbytes)", frame_len);
1267                                 print_pkt(skb->data, frame_len);
1268                         }
1269 #endif
1270                         skb->protocol = eth_type_trans(skb, priv->dev);
1271
1272                         if (unlikely(status == csum_none)) {
1273                                 /* always for the old mac 10/100 */
1274                                 skb->ip_summed = CHECKSUM_NONE;
1275                                 netif_receive_skb(skb);
1276                         } else {
1277                                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1278                                 napi_gro_receive(&priv->napi, skb);
1279                         }
1280
1281                         priv->dev->stats.rx_packets++;
1282                         priv->dev->stats.rx_bytes += frame_len;
1283                         priv->dev->last_rx = jiffies;
1284                 }
1285                 entry = next_entry;
1286                 p = p_next;     /* use prefetched values */
1287         }
1288
1289         stmmac_rx_refill(priv);
1290
1291         priv->xstats.rx_pkt_n += count;
1292
1293         return count;
1294 }
1295
1296 /**
1297  *  stmmac_poll - stmmac poll method (NAPI)
1298  *  @napi : pointer to the napi structure.
1299  *  @budget : maximum number of packets that the current CPU can receive from
1300  *            all interfaces.
1301  *  Description :
1302  *   This function implements the the reception process.
1303  *   Also it runs the TX completion thread
1304  */
1305 static int stmmac_poll(struct napi_struct *napi, int budget)
1306 {
1307         struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
1308         int work_done = 0;
1309
1310         priv->xstats.poll_n++;
1311         stmmac_tx(priv);
1312         work_done = stmmac_rx(priv, budget);
1313
1314         if (work_done < budget) {
1315                 napi_complete(napi);
1316                 stmmac_enable_irq(priv);
1317         }
1318         return work_done;
1319 }
1320
1321 /**
1322  *  stmmac_tx_timeout
1323  *  @dev : Pointer to net device structure
1324  *  Description: this function is called when a packet transmission fails to
1325  *   complete within a reasonable tmrate. The driver will mark the error in the
1326  *   netdev structure and arrange for the device to be reset to a sane state
1327  *   in order to transmit a new packet.
1328  */
1329 static void stmmac_tx_timeout(struct net_device *dev)
1330 {
1331         struct stmmac_priv *priv = netdev_priv(dev);
1332
1333         /* Clear Tx resources and restart transmitting again */
1334         stmmac_tx_err(priv);
1335         return;
1336 }
1337
1338 /* Configuration changes (passed on by ifconfig) */
1339 static int stmmac_config(struct net_device *dev, struct ifmap *map)
1340 {
1341         if (dev->flags & IFF_UP)        /* can't act on a running interface */
1342                 return -EBUSY;
1343
1344         /* Don't allow changing the I/O address */
1345         if (map->base_addr != dev->base_addr) {
1346                 pr_warning("%s: can't change I/O address\n", dev->name);
1347                 return -EOPNOTSUPP;
1348         }
1349
1350         /* Don't allow changing the IRQ */
1351         if (map->irq != dev->irq) {
1352                 pr_warning("%s: can't change IRQ number %d\n",
1353                        dev->name, dev->irq);
1354                 return -EOPNOTSUPP;
1355         }
1356
1357         /* ignore other fields */
1358         return 0;
1359 }
1360
1361 /**
1362  *  stmmac_multicast_list - entry point for multicast addressing
1363  *  @dev : pointer to the device structure
1364  *  Description:
1365  *  This function is a driver entry point which gets called by the kernel
1366  *  whenever multicast addresses must be enabled/disabled.
1367  *  Return value:
1368  *  void.
1369  */
1370 static void stmmac_multicast_list(struct net_device *dev)
1371 {
1372         struct stmmac_priv *priv = netdev_priv(dev);
1373
1374         spin_lock(&priv->lock);
1375         priv->hw->mac->set_filter(dev);
1376         spin_unlock(&priv->lock);
1377         return;
1378 }
1379
1380 /**
1381  *  stmmac_change_mtu - entry point to change MTU size for the device.
1382  *  @dev : device pointer.
1383  *  @new_mtu : the new MTU size for the device.
1384  *  Description: the Maximum Transfer Unit (MTU) is used by the network layer
1385  *  to drive packet transmission. Ethernet has an MTU of 1500 octets
1386  *  (ETH_DATA_LEN). This value can be changed with ifconfig.
1387  *  Return value:
1388  *  0 on success and an appropriate (-)ve integer as defined in errno.h
1389  *  file on failure.
1390  */
1391 static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
1392 {
1393         struct stmmac_priv *priv = netdev_priv(dev);
1394         int max_mtu;
1395
1396         if (netif_running(dev)) {
1397                 pr_err("%s: must be stopped to change its MTU\n", dev->name);
1398                 return -EBUSY;
1399         }
1400
1401         if (priv->is_gmac)
1402                 max_mtu = JUMBO_LEN;
1403         else
1404                 max_mtu = ETH_DATA_LEN;
1405
1406         if ((new_mtu < 46) || (new_mtu > max_mtu)) {
1407                 pr_err("%s: invalid MTU, max MTU is: %d\n", dev->name, max_mtu);
1408                 return -EINVAL;
1409         }
1410
1411         dev->mtu = new_mtu;
1412
1413         return 0;
1414 }
1415
1416 static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
1417 {
1418         struct net_device *dev = (struct net_device *)dev_id;
1419         struct stmmac_priv *priv = netdev_priv(dev);
1420
1421         if (unlikely(!dev)) {
1422                 pr_err("%s: invalid dev pointer\n", __func__);
1423                 return IRQ_NONE;
1424         }
1425
1426         if (priv->is_gmac) {
1427                 unsigned long ioaddr = dev->base_addr;
1428                 /* To handle GMAC own interrupts */
1429                 priv->hw->mac->host_irq_status(ioaddr);
1430         }
1431
1432         stmmac_dma_interrupt(priv);
1433
1434         return IRQ_HANDLED;
1435 }
1436
1437 #ifdef CONFIG_NET_POLL_CONTROLLER
1438 /* Polling receive - used by NETCONSOLE and other diagnostic tools
1439  * to allow network I/O with interrupts disabled. */
1440 static void stmmac_poll_controller(struct net_device *dev)
1441 {
1442         disable_irq(dev->irq);
1443         stmmac_interrupt(dev->irq, dev);
1444         enable_irq(dev->irq);
1445 }
1446 #endif
1447
1448 /**
1449  *  stmmac_ioctl - Entry point for the Ioctl
1450  *  @dev: Device pointer.
1451  *  @rq: An IOCTL specefic structure, that can contain a pointer to
1452  *  a proprietary structure used to pass information to the driver.
1453  *  @cmd: IOCTL command
1454  *  Description:
1455  *  Currently there are no special functionality supported in IOCTL, just the
1456  *  phy_mii_ioctl(...) can be invoked.
1457  */
1458 static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1459 {
1460         struct stmmac_priv *priv = netdev_priv(dev);
1461         int ret = -EOPNOTSUPP;
1462
1463         if (!netif_running(dev))
1464                 return -EINVAL;
1465
1466         switch (cmd) {
1467         case SIOCGMIIPHY:
1468         case SIOCGMIIREG:
1469         case SIOCSMIIREG:
1470                 if (!priv->phydev)
1471                         return -EINVAL;
1472
1473                 spin_lock(&priv->lock);
1474                 ret = phy_mii_ioctl(priv->phydev, if_mii(rq), cmd);
1475                 spin_unlock(&priv->lock);
1476         default:
1477                 break;
1478         }
1479         return ret;
1480 }
1481
1482 #ifdef STMMAC_VLAN_TAG_USED
1483 static void stmmac_vlan_rx_register(struct net_device *dev,
1484                                     struct vlan_group *grp)
1485 {
1486         struct stmmac_priv *priv = netdev_priv(dev);
1487
1488         DBG(probe, INFO, "%s: Setting vlgrp to %p\n", dev->name, grp);
1489
1490         spin_lock(&priv->lock);
1491         priv->vlgrp = grp;
1492         spin_unlock(&priv->lock);
1493
1494         return;
1495 }
1496 #endif
1497
1498 static const struct net_device_ops stmmac_netdev_ops = {
1499         .ndo_open = stmmac_open,
1500         .ndo_start_xmit = stmmac_xmit,
1501         .ndo_stop = stmmac_release,
1502         .ndo_change_mtu = stmmac_change_mtu,
1503         .ndo_set_multicast_list = stmmac_multicast_list,
1504         .ndo_tx_timeout = stmmac_tx_timeout,
1505         .ndo_do_ioctl = stmmac_ioctl,
1506         .ndo_set_config = stmmac_config,
1507 #ifdef STMMAC_VLAN_TAG_USED
1508         .ndo_vlan_rx_register = stmmac_vlan_rx_register,
1509 #endif
1510 #ifdef CONFIG_NET_POLL_CONTROLLER
1511         .ndo_poll_controller = stmmac_poll_controller,
1512 #endif
1513         .ndo_set_mac_address = eth_mac_addr,
1514 };
1515
1516 /**
1517  * stmmac_probe - Initialization of the adapter .
1518  * @dev : device pointer
1519  * Description: The function initializes the network device structure for
1520  * the STMMAC driver. It also calls the low level routines
1521  * in order to init the HW (i.e. the DMA engine)
1522  */
1523 static int stmmac_probe(struct net_device *dev)
1524 {
1525         int ret = 0;
1526         struct stmmac_priv *priv = netdev_priv(dev);
1527
1528         ether_setup(dev);
1529
1530         dev->netdev_ops = &stmmac_netdev_ops;
1531         stmmac_set_ethtool_ops(dev);
1532
1533         dev->features |= (NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA);
1534         dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1535 #ifdef STMMAC_VLAN_TAG_USED
1536         /* Both mac100 and gmac support receive VLAN tag detection */
1537         dev->features |= NETIF_F_HW_VLAN_RX;
1538 #endif
1539         priv->msg_enable = netif_msg_init(debug, default_msg_level);
1540
1541         if (priv->is_gmac)
1542                 priv->rx_csum = 1;
1543
1544         if (flow_ctrl)
1545                 priv->flow_ctrl = FLOW_AUTO;    /* RX/TX pause on */
1546
1547         priv->pause = pause;
1548         netif_napi_add(dev, &priv->napi, stmmac_poll, 64);
1549
1550         /* Get the MAC address */
1551         priv->hw->mac->get_umac_addr(dev->base_addr, dev->dev_addr, 0);
1552
1553         if (!is_valid_ether_addr(dev->dev_addr))
1554                 pr_warning("\tno valid MAC address;"
1555                         "please, use ifconfig or nwhwconfig!\n");
1556
1557         ret = register_netdev(dev);
1558         if (ret) {
1559                 pr_err("%s: ERROR %i registering the device\n",
1560                        __func__, ret);
1561                 return -ENODEV;
1562         }
1563
1564         DBG(probe, DEBUG, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1565             dev->name, (dev->features & NETIF_F_SG) ? "on" : "off",
1566             (dev->features & NETIF_F_HW_CSUM) ? "on" : "off");
1567
1568         spin_lock_init(&priv->lock);
1569
1570         return ret;
1571 }
1572
1573 /**
1574  * stmmac_mac_device_setup
1575  * @dev : device pointer
1576  * Description: select and initialise the mac device (mac100 or Gmac).
1577  */
1578 static int stmmac_mac_device_setup(struct net_device *dev)
1579 {
1580         struct stmmac_priv *priv = netdev_priv(dev);
1581         unsigned long ioaddr = dev->base_addr;
1582
1583         struct mac_device_info *device;
1584
1585         if (priv->is_gmac)
1586                 device = dwmac1000_setup(ioaddr);
1587         else
1588                 device = dwmac100_setup(ioaddr);
1589
1590         if (!device)
1591                 return -ENOMEM;
1592
1593         priv->hw = device;
1594
1595         priv->wolenabled = priv->hw->pmt;       /* PMT supported */
1596         if (priv->wolenabled == PMT_SUPPORTED)
1597                 priv->wolopts = WAKE_MAGIC;             /* Magic Frame */
1598
1599         return 0;
1600 }
1601
1602 static int stmmacphy_dvr_probe(struct platform_device *pdev)
1603 {
1604         struct plat_stmmacphy_data *plat_dat = pdev->dev.platform_data;
1605
1606         pr_debug("stmmacphy_dvr_probe: added phy for bus %d\n",
1607                plat_dat->bus_id);
1608
1609         return 0;
1610 }
1611
1612 static int stmmacphy_dvr_remove(struct platform_device *pdev)
1613 {
1614         return 0;
1615 }
1616
1617 static struct platform_driver stmmacphy_driver = {
1618         .driver = {
1619                    .name = PHY_RESOURCE_NAME,
1620                    },
1621         .probe = stmmacphy_dvr_probe,
1622         .remove = stmmacphy_dvr_remove,
1623 };
1624
1625 /**
1626  * stmmac_associate_phy
1627  * @dev: pointer to device structure
1628  * @data: points to the private structure.
1629  * Description: Scans through all the PHYs we have registered and checks if
1630  * any are associated with our MAC.  If so, then just fill in
1631  * the blanks in our local context structure
1632  */
1633 static int stmmac_associate_phy(struct device *dev, void *data)
1634 {
1635         struct stmmac_priv *priv = (struct stmmac_priv *)data;
1636         struct plat_stmmacphy_data *plat_dat = dev->platform_data;
1637
1638         DBG(probe, DEBUG, "%s: checking phy for bus %d\n", __func__,
1639                 plat_dat->bus_id);
1640
1641         /* Check that this phy is for the MAC being initialised */
1642         if (priv->bus_id != plat_dat->bus_id)
1643                 return 0;
1644
1645         /* OK, this PHY is connected to the MAC.
1646            Go ahead and get the parameters */
1647         DBG(probe, DEBUG, "%s: OK. Found PHY config\n", __func__);
1648         priv->phy_irq =
1649             platform_get_irq_byname(to_platform_device(dev), "phyirq");
1650         DBG(probe, DEBUG, "%s: PHY irq on bus %d is %d\n", __func__,
1651             plat_dat->bus_id, priv->phy_irq);
1652
1653         /* Override with kernel parameters if supplied XXX CRS XXX
1654          * this needs to have multiple instances */
1655         if ((phyaddr >= 0) && (phyaddr <= 31))
1656                 plat_dat->phy_addr = phyaddr;
1657
1658         priv->phy_addr = plat_dat->phy_addr;
1659         priv->phy_mask = plat_dat->phy_mask;
1660         priv->phy_interface = plat_dat->interface;
1661         priv->phy_reset = plat_dat->phy_reset;
1662
1663         DBG(probe, DEBUG, "%s: exiting\n", __func__);
1664         return 1;       /* forces exit of driver_for_each_device() */
1665 }
1666
1667 /**
1668  * stmmac_dvr_probe
1669  * @pdev: platform device pointer
1670  * Description: the driver is initialized through platform_device.
1671  */
1672 static int stmmac_dvr_probe(struct platform_device *pdev)
1673 {
1674         int ret = 0;
1675         struct resource *res;
1676         unsigned int *addr = NULL;
1677         struct net_device *ndev = NULL;
1678         struct stmmac_priv *priv;
1679         struct plat_stmmacenet_data *plat_dat;
1680
1681         pr_info("STMMAC driver:\n\tplatform registration... ");
1682         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1683         if (!res) {
1684                 ret = -ENODEV;
1685                 goto out;
1686         }
1687         pr_info("done!\n");
1688
1689         if (!request_mem_region(res->start, resource_size(res),
1690                                 pdev->name)) {
1691                 pr_err("%s: ERROR: memory allocation failed"
1692                        "cannot get the I/O addr 0x%x\n",
1693                        __func__, (unsigned int)res->start);
1694                 ret = -EBUSY;
1695                 goto out;
1696         }
1697
1698         addr = ioremap(res->start, resource_size(res));
1699         if (!addr) {
1700                 pr_err("%s: ERROR: memory mapping failed\n", __func__);
1701                 ret = -ENOMEM;
1702                 goto out;
1703         }
1704
1705         ndev = alloc_etherdev(sizeof(struct stmmac_priv));
1706         if (!ndev) {
1707                 pr_err("%s: ERROR: allocating the device\n", __func__);
1708                 ret = -ENOMEM;
1709                 goto out;
1710         }
1711
1712         SET_NETDEV_DEV(ndev, &pdev->dev);
1713
1714         /* Get the MAC information */
1715         ndev->irq = platform_get_irq_byname(pdev, "macirq");
1716         if (ndev->irq == -ENXIO) {
1717                 pr_err("%s: ERROR: MAC IRQ configuration "
1718                        "information not found\n", __func__);
1719                 ret = -ENODEV;
1720                 goto out;
1721         }
1722
1723         priv = netdev_priv(ndev);
1724         priv->device = &(pdev->dev);
1725         priv->dev = ndev;
1726         plat_dat = pdev->dev.platform_data;
1727         priv->bus_id = plat_dat->bus_id;
1728         priv->pbl = plat_dat->pbl;      /* TLI */
1729         priv->is_gmac = plat_dat->has_gmac;     /* GMAC is on board */
1730
1731         platform_set_drvdata(pdev, ndev);
1732
1733         /* Set the I/O base addr */
1734         ndev->base_addr = (unsigned long)addr;
1735
1736         /* Verify embedded resource for the platform */
1737         ret = stmmac_claim_resource(pdev);
1738         if (ret < 0)
1739                 goto out;
1740
1741         /* MAC HW revice detection */
1742         ret = stmmac_mac_device_setup(ndev);
1743         if (ret < 0)
1744                 goto out;
1745
1746         /* Network Device Registration */
1747         ret = stmmac_probe(ndev);
1748         if (ret < 0)
1749                 goto out;
1750
1751         /* associate a PHY - it is provided by another platform bus */
1752         if (!driver_for_each_device
1753             (&(stmmacphy_driver.driver), NULL, (void *)priv,
1754              stmmac_associate_phy)) {
1755                 pr_err("No PHY device is associated with this MAC!\n");
1756                 ret = -ENODEV;
1757                 goto out;
1758         }
1759
1760         priv->fix_mac_speed = plat_dat->fix_mac_speed;
1761         priv->bus_setup = plat_dat->bus_setup;
1762         priv->bsp_priv = plat_dat->bsp_priv;
1763
1764         pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1765                "\tIO base addr: 0x%08x)\n", ndev->name, pdev->name,
1766                pdev->id, ndev->irq, (unsigned int)addr);
1767
1768         /* MDIO bus Registration */
1769         pr_debug("\tMDIO bus (id: %d)...", priv->bus_id);
1770         ret = stmmac_mdio_register(ndev);
1771         if (ret < 0)
1772                 goto out;
1773         pr_debug("registered!\n");
1774
1775 out:
1776         if (ret < 0) {
1777                 platform_set_drvdata(pdev, NULL);
1778                 release_mem_region(res->start, resource_size(res));
1779                 if (addr != NULL)
1780                         iounmap(addr);
1781         }
1782
1783         return ret;
1784 }
1785
1786 /**
1787  * stmmac_dvr_remove
1788  * @pdev: platform device pointer
1789  * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1790  * changes the link status, releases the DMA descriptor rings,
1791  * unregisters the MDIO bus and unmaps the allocated memory.
1792  */
1793 static int stmmac_dvr_remove(struct platform_device *pdev)
1794 {
1795         struct net_device *ndev = platform_get_drvdata(pdev);
1796         struct stmmac_priv *priv = netdev_priv(ndev);
1797         struct resource *res;
1798
1799         pr_info("%s:\n\tremoving driver", __func__);
1800
1801         priv->hw->dma->stop_rx(ndev->base_addr);
1802         priv->hw->dma->stop_tx(ndev->base_addr);
1803
1804         stmmac_mac_disable_rx(ndev->base_addr);
1805         stmmac_mac_disable_tx(ndev->base_addr);
1806
1807         netif_carrier_off(ndev);
1808
1809         stmmac_mdio_unregister(ndev);
1810
1811         platform_set_drvdata(pdev, NULL);
1812         unregister_netdev(ndev);
1813
1814         iounmap((void *)ndev->base_addr);
1815         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1816         release_mem_region(res->start, resource_size(res));
1817
1818         free_netdev(ndev);
1819
1820         return 0;
1821 }
1822
1823 #ifdef CONFIG_PM
1824 static int stmmac_suspend(struct platform_device *pdev, pm_message_t state)
1825 {
1826         struct net_device *dev = platform_get_drvdata(pdev);
1827         struct stmmac_priv *priv = netdev_priv(dev);
1828         int dis_ic = 0;
1829
1830         if (!dev || !netif_running(dev))
1831                 return 0;
1832
1833         spin_lock(&priv->lock);
1834
1835         if (state.event == PM_EVENT_SUSPEND) {
1836                 netif_device_detach(dev);
1837                 netif_stop_queue(dev);
1838                 if (priv->phydev)
1839                         phy_stop(priv->phydev);
1840
1841 #ifdef CONFIG_STMMAC_TIMER
1842                 priv->tm->timer_stop();
1843                 if (likely(priv->tm->enable))
1844                         dis_ic = 1;
1845 #endif
1846                 napi_disable(&priv->napi);
1847
1848                 /* Stop TX/RX DMA */
1849                 priv->hw->dma->stop_tx(dev->base_addr);
1850                 priv->hw->dma->stop_rx(dev->base_addr);
1851                 /* Clear the Rx/Tx descriptors */
1852                 priv->hw->desc->init_rx_desc(priv->dma_rx, priv->dma_rx_size,
1853                                              dis_ic);
1854                 priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
1855
1856                 stmmac_mac_disable_tx(dev->base_addr);
1857
1858                 if (device_may_wakeup(&(pdev->dev))) {
1859                         /* Enable Power down mode by programming the PMT regs */
1860                         if (priv->wolenabled == PMT_SUPPORTED)
1861                                 priv->hw->mac->pmt(dev->base_addr,
1862                                                    priv->wolopts);
1863                 } else {
1864                         stmmac_mac_disable_rx(dev->base_addr);
1865                 }
1866         } else {
1867                 priv->shutdown = 1;
1868                 /* Although this can appear slightly redundant it actually
1869                  * makes fast the standby operation and guarantees the driver
1870                  * working if hibernation is on media. */
1871                 stmmac_release(dev);
1872         }
1873
1874         spin_unlock(&priv->lock);
1875         return 0;
1876 }
1877
1878 static int stmmac_resume(struct platform_device *pdev)
1879 {
1880         struct net_device *dev = platform_get_drvdata(pdev);
1881         struct stmmac_priv *priv = netdev_priv(dev);
1882         unsigned long ioaddr = dev->base_addr;
1883
1884         if (!netif_running(dev))
1885                 return 0;
1886
1887         spin_lock(&priv->lock);
1888
1889         if (priv->shutdown) {
1890                 /* Re-open the interface and re-init the MAC/DMA
1891                    and the rings. */
1892                 stmmac_open(dev);
1893                 goto out_resume;
1894         }
1895
1896         /* Power Down bit, into the PM register, is cleared
1897          * automatically as soon as a magic packet or a Wake-up frame
1898          * is received. Anyway, it's better to manually clear
1899          * this bit because it can generate problems while resuming
1900          * from another devices (e.g. serial console). */
1901         if (device_may_wakeup(&(pdev->dev)))
1902                 if (priv->wolenabled == PMT_SUPPORTED)
1903                         priv->hw->mac->pmt(dev->base_addr, 0);
1904
1905         netif_device_attach(dev);
1906
1907         /* Enable the MAC and DMA */
1908         stmmac_mac_enable_rx(ioaddr);
1909         stmmac_mac_enable_tx(ioaddr);
1910         priv->hw->dma->start_tx(ioaddr);
1911         priv->hw->dma->start_rx(ioaddr);
1912
1913 #ifdef CONFIG_STMMAC_TIMER
1914         priv->tm->timer_start(tmrate);
1915 #endif
1916         napi_enable(&priv->napi);
1917
1918         if (priv->phydev)
1919                 phy_start(priv->phydev);
1920
1921         netif_start_queue(dev);
1922
1923 out_resume:
1924         spin_unlock(&priv->lock);
1925         return 0;
1926 }
1927 #endif
1928
1929 static struct platform_driver stmmac_driver = {
1930         .driver = {
1931                    .name = STMMAC_RESOURCE_NAME,
1932                    },
1933         .probe = stmmac_dvr_probe,
1934         .remove = stmmac_dvr_remove,
1935 #ifdef CONFIG_PM
1936         .suspend = stmmac_suspend,
1937         .resume = stmmac_resume,
1938 #endif
1939
1940 };
1941
1942 /**
1943  * stmmac_init_module - Entry point for the driver
1944  * Description: This function is the entry point for the driver.
1945  */
1946 static int __init stmmac_init_module(void)
1947 {
1948         int ret;
1949
1950         if (platform_driver_register(&stmmacphy_driver)) {
1951                 pr_err("No PHY devices registered!\n");
1952                 return -ENODEV;
1953         }
1954
1955         ret = platform_driver_register(&stmmac_driver);
1956         return ret;
1957 }
1958
1959 /**
1960  * stmmac_cleanup_module - Cleanup routine for the driver
1961  * Description: This function is the cleanup routine for the driver.
1962  */
1963 static void __exit stmmac_cleanup_module(void)
1964 {
1965         platform_driver_unregister(&stmmacphy_driver);
1966         platform_driver_unregister(&stmmac_driver);
1967 }
1968
1969 #ifndef MODULE
1970 static int __init stmmac_cmdline_opt(char *str)
1971 {
1972         char *opt;
1973
1974         if (!str || !*str)
1975                 return -EINVAL;
1976         while ((opt = strsep(&str, ",")) != NULL) {
1977                 if (!strncmp(opt, "debug:", 6))
1978                         strict_strtoul(opt + 6, 0, (unsigned long *)&debug);
1979                 else if (!strncmp(opt, "phyaddr:", 8))
1980                         strict_strtoul(opt + 8, 0, (unsigned long *)&phyaddr);
1981                 else if (!strncmp(opt, "dma_txsize:", 11))
1982                         strict_strtoul(opt + 11, 0,
1983                                        (unsigned long *)&dma_txsize);
1984                 else if (!strncmp(opt, "dma_rxsize:", 11))
1985                         strict_strtoul(opt + 11, 0,
1986                                        (unsigned long *)&dma_rxsize);
1987                 else if (!strncmp(opt, "buf_sz:", 7))
1988                         strict_strtoul(opt + 7, 0, (unsigned long *)&buf_sz);
1989                 else if (!strncmp(opt, "tc:", 3))
1990                         strict_strtoul(opt + 3, 0, (unsigned long *)&tc);
1991                 else if (!strncmp(opt, "tx_coe:", 7))
1992                         strict_strtoul(opt + 7, 0, (unsigned long *)&tx_coe);
1993                 else if (!strncmp(opt, "watchdog:", 9))
1994                         strict_strtoul(opt + 9, 0, (unsigned long *)&watchdog);
1995                 else if (!strncmp(opt, "flow_ctrl:", 10))
1996                         strict_strtoul(opt + 10, 0,
1997                                        (unsigned long *)&flow_ctrl);
1998                 else if (!strncmp(opt, "pause:", 6))
1999                         strict_strtoul(opt + 6, 0, (unsigned long *)&pause);
2000 #ifdef CONFIG_STMMAC_TIMER
2001                 else if (!strncmp(opt, "tmrate:", 7))
2002                         strict_strtoul(opt + 7, 0, (unsigned long *)&tmrate);
2003 #endif
2004         }
2005         return 0;
2006 }
2007
2008 __setup("stmmaceth=", stmmac_cmdline_opt);
2009 #endif
2010
2011 module_init(stmmac_init_module);
2012 module_exit(stmmac_cleanup_module);
2013
2014 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
2015 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
2016 MODULE_LICENSE("GPL");