1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include <linux/cpu_rmap.h>
25 #include "net_driver.h"
30 #include "workarounds.h"
32 /**************************************************************************
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
41 const char *efx_loopback_mode_names[] = {
42 [LOOPBACK_NONE] = "NONE",
43 [LOOPBACK_DATA] = "DATAPATH",
44 [LOOPBACK_GMAC] = "GMAC",
45 [LOOPBACK_XGMII] = "XGMII",
46 [LOOPBACK_XGXS] = "XGXS",
47 [LOOPBACK_XAUI] = "XAUI",
48 [LOOPBACK_GMII] = "GMII",
49 [LOOPBACK_SGMII] = "SGMII",
50 [LOOPBACK_XGBR] = "XGBR",
51 [LOOPBACK_XFI] = "XFI",
52 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR] = "XFI_FAR",
56 [LOOPBACK_GPHY] = "GPHY",
57 [LOOPBACK_PHYXS] = "PHYXS",
58 [LOOPBACK_PCS] = "PCS",
59 [LOOPBACK_PMAPMD] = "PMA/PMD",
60 [LOOPBACK_XPORT] = "XPORT",
61 [LOOPBACK_XGMII_WS] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS] = "GMII_WS",
66 [LOOPBACK_XFI_WS] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
72 const char *efx_reset_type_names[] = {
73 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
74 [RESET_TYPE_ALL] = "ALL",
75 [RESET_TYPE_WORLD] = "WORLD",
76 [RESET_TYPE_DISABLE] = "DISABLE",
77 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
78 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
79 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
80 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
81 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
82 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
83 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
86 #define EFX_MAX_MTU (9 * 1024)
88 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
89 * queued onto this work queue. This is not a per-nic work queue, because
90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
92 static struct workqueue_struct *reset_workqueue;
94 /**************************************************************************
98 *************************************************************************/
101 * Use separate channels for TX and RX events
103 * Set this to 1 to use separate channels for TX and RX. It allows us
104 * to control interrupt affinity separately for TX and RX.
106 * This is only used in MSI-X interrupt mode
108 static unsigned int separate_tx_channels;
109 module_param(separate_tx_channels, uint, 0444);
110 MODULE_PARM_DESC(separate_tx_channels,
111 "Use separate channels for TX and RX");
113 /* This is the weight assigned to each of the (per-channel) virtual
116 static int napi_weight = 64;
118 /* This is the time (in jiffies) between invocations of the hardware
119 * monitor. On Falcon-based NICs, this will:
120 * - Check the on-board hardware monitor;
121 * - Poll the link state and reconfigure the hardware as necessary.
123 static unsigned int efx_monitor_interval = 1 * HZ;
125 /* This controls whether or not the driver will initialise devices
126 * with invalid MAC addresses stored in the EEPROM or flash. If true,
127 * such devices will be initialised with a random locally-generated
128 * MAC address. This allows for loading the sfc_mtd driver to
129 * reprogram the flash, even if the flash contents (including the MAC
130 * address) have previously been erased.
132 static unsigned int allow_bad_hwaddr;
134 /* Initial interrupt moderation settings. They can be modified after
135 * module load with ethtool.
137 * The default for RX should strike a balance between increasing the
138 * round-trip latency and reducing overhead.
140 static unsigned int rx_irq_mod_usec = 60;
142 /* Initial interrupt moderation settings. They can be modified after
143 * module load with ethtool.
145 * This default is chosen to ensure that a 10G link does not go idle
146 * while a TX queue is stopped after it has become full. A queue is
147 * restarted when it drops below half full. The time this takes (assuming
148 * worst case 3 descriptors per packet and 1024 descriptors) is
149 * 512 / 3 * 1.2 = 205 usec.
151 static unsigned int tx_irq_mod_usec = 150;
153 /* This is the first interrupt mode to try out of:
158 static unsigned int interrupt_mode;
160 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
161 * i.e. the number of CPUs among which we may distribute simultaneous
162 * interrupt handling.
164 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
165 * The default (0) means to assign an interrupt to each package (level II cache)
167 static unsigned int rss_cpus;
168 module_param(rss_cpus, uint, 0444);
169 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
171 static int phy_flash_cfg;
172 module_param(phy_flash_cfg, int, 0644);
173 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
175 static unsigned irq_adapt_low_thresh = 10000;
176 module_param(irq_adapt_low_thresh, uint, 0644);
177 MODULE_PARM_DESC(irq_adapt_low_thresh,
178 "Threshold score for reducing IRQ moderation");
180 static unsigned irq_adapt_high_thresh = 20000;
181 module_param(irq_adapt_high_thresh, uint, 0644);
182 MODULE_PARM_DESC(irq_adapt_high_thresh,
183 "Threshold score for increasing IRQ moderation");
185 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
186 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
187 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
188 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
189 module_param(debug, uint, 0);
190 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
192 /**************************************************************************
194 * Utility functions and prototypes
196 *************************************************************************/
198 static void efx_remove_channels(struct efx_nic *efx);
199 static void efx_remove_port(struct efx_nic *efx);
200 static void efx_init_napi(struct efx_nic *efx);
201 static void efx_fini_napi(struct efx_nic *efx);
202 static void efx_fini_napi_channel(struct efx_channel *channel);
203 static void efx_fini_struct(struct efx_nic *efx);
204 static void efx_start_all(struct efx_nic *efx);
205 static void efx_stop_all(struct efx_nic *efx);
207 #define EFX_ASSERT_RESET_SERIALISED(efx) \
209 if ((efx->state == STATE_RUNNING) || \
210 (efx->state == STATE_DISABLED)) \
214 /**************************************************************************
216 * Event queue processing
218 *************************************************************************/
220 /* Process channel's event queue
222 * This function is responsible for processing the event queue of a
223 * single channel. The caller must guarantee that this function will
224 * never be concurrently called more than once on the same channel,
225 * though different channels may be being processed concurrently.
227 static int efx_process_channel(struct efx_channel *channel, int budget)
229 struct efx_nic *efx = channel->efx;
232 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
236 spent = efx_nic_process_eventq(channel, budget);
240 /* Deliver last RX packet. */
241 if (channel->rx_pkt) {
242 __efx_rx_packet(channel, channel->rx_pkt,
243 channel->rx_pkt_csummed);
244 channel->rx_pkt = NULL;
247 efx_rx_strategy(channel);
249 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel));
254 /* Mark channel as finished processing
256 * Note that since we will not receive further interrupts for this
257 * channel before we finish processing and call the eventq_read_ack()
258 * method, there is no need to use the interrupt hold-off timers.
260 static inline void efx_channel_processed(struct efx_channel *channel)
262 /* The interrupt handler for this channel may set work_pending
263 * as soon as we acknowledge the events we've seen. Make sure
264 * it's cleared before then. */
265 channel->work_pending = false;
268 efx_nic_eventq_read_ack(channel);
273 * NAPI guarantees serialisation of polls of the same device, which
274 * provides the guarantee required by efx_process_channel().
276 static int efx_poll(struct napi_struct *napi, int budget)
278 struct efx_channel *channel =
279 container_of(napi, struct efx_channel, napi_str);
280 struct efx_nic *efx = channel->efx;
283 netif_vdbg(efx, intr, efx->net_dev,
284 "channel %d NAPI poll executing on CPU %d\n",
285 channel->channel, raw_smp_processor_id());
287 spent = efx_process_channel(channel, budget);
289 if (spent < budget) {
290 if (channel->channel < efx->n_rx_channels &&
291 efx->irq_rx_adaptive &&
292 unlikely(++channel->irq_count == 1000)) {
293 if (unlikely(channel->irq_mod_score <
294 irq_adapt_low_thresh)) {
295 if (channel->irq_moderation > 1) {
296 channel->irq_moderation -= 1;
297 efx->type->push_irq_moderation(channel);
299 } else if (unlikely(channel->irq_mod_score >
300 irq_adapt_high_thresh)) {
301 if (channel->irq_moderation <
302 efx->irq_rx_moderation) {
303 channel->irq_moderation += 1;
304 efx->type->push_irq_moderation(channel);
307 channel->irq_count = 0;
308 channel->irq_mod_score = 0;
311 efx_filter_rfs_expire(channel);
313 /* There is no race here; although napi_disable() will
314 * only wait for napi_complete(), this isn't a problem
315 * since efx_channel_processed() will have no effect if
316 * interrupts have already been disabled.
319 efx_channel_processed(channel);
325 /* Process the eventq of the specified channel immediately on this CPU
327 * Disable hardware generated interrupts, wait for any existing
328 * processing to finish, then directly poll (and ack ) the eventq.
329 * Finally reenable NAPI and interrupts.
331 * Since we are touching interrupts the caller should hold the suspend lock
333 void efx_process_channel_now(struct efx_channel *channel)
335 struct efx_nic *efx = channel->efx;
337 BUG_ON(channel->channel >= efx->n_channels);
338 BUG_ON(!channel->enabled);
340 /* Disable interrupts and wait for ISRs to complete */
341 efx_nic_disable_interrupts(efx);
342 if (efx->legacy_irq) {
343 synchronize_irq(efx->legacy_irq);
344 efx->legacy_irq_enabled = false;
347 synchronize_irq(channel->irq);
349 /* Wait for any NAPI processing to complete */
350 napi_disable(&channel->napi_str);
352 /* Poll the channel */
353 efx_process_channel(channel, channel->eventq_mask + 1);
355 /* Ack the eventq. This may cause an interrupt to be generated
356 * when they are reenabled */
357 efx_channel_processed(channel);
359 napi_enable(&channel->napi_str);
361 efx->legacy_irq_enabled = true;
362 efx_nic_enable_interrupts(efx);
365 /* Create event queue
366 * Event queue memory allocations are done only once. If the channel
367 * is reset, the memory buffer will be reused; this guards against
368 * errors during channel reset and also simplifies interrupt handling.
370 static int efx_probe_eventq(struct efx_channel *channel)
372 struct efx_nic *efx = channel->efx;
373 unsigned long entries;
375 netif_dbg(channel->efx, probe, channel->efx->net_dev,
376 "chan %d create event queue\n", channel->channel);
378 /* Build an event queue with room for one event per tx and rx buffer,
379 * plus some extra for link state events and MCDI completions. */
380 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
381 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
382 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
384 return efx_nic_probe_eventq(channel);
387 /* Prepare channel's event queue */
388 static void efx_init_eventq(struct efx_channel *channel)
390 netif_dbg(channel->efx, drv, channel->efx->net_dev,
391 "chan %d init event queue\n", channel->channel);
393 channel->eventq_read_ptr = 0;
395 efx_nic_init_eventq(channel);
398 static void efx_fini_eventq(struct efx_channel *channel)
400 netif_dbg(channel->efx, drv, channel->efx->net_dev,
401 "chan %d fini event queue\n", channel->channel);
403 efx_nic_fini_eventq(channel);
406 static void efx_remove_eventq(struct efx_channel *channel)
408 netif_dbg(channel->efx, drv, channel->efx->net_dev,
409 "chan %d remove event queue\n", channel->channel);
411 efx_nic_remove_eventq(channel);
414 /**************************************************************************
418 *************************************************************************/
420 /* Allocate and initialise a channel structure, optionally copying
421 * parameters (but not resources) from an old channel structure. */
422 static struct efx_channel *
423 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
425 struct efx_channel *channel;
426 struct efx_rx_queue *rx_queue;
427 struct efx_tx_queue *tx_queue;
431 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
435 *channel = *old_channel;
437 channel->napi_dev = NULL;
438 memset(&channel->eventq, 0, sizeof(channel->eventq));
440 rx_queue = &channel->rx_queue;
441 rx_queue->buffer = NULL;
442 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
444 for (j = 0; j < EFX_TXQ_TYPES; j++) {
445 tx_queue = &channel->tx_queue[j];
446 if (tx_queue->channel)
447 tx_queue->channel = channel;
448 tx_queue->buffer = NULL;
449 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
452 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
457 channel->channel = i;
459 for (j = 0; j < EFX_TXQ_TYPES; j++) {
460 tx_queue = &channel->tx_queue[j];
462 tx_queue->queue = i * EFX_TXQ_TYPES + j;
463 tx_queue->channel = channel;
467 rx_queue = &channel->rx_queue;
469 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
470 (unsigned long)rx_queue);
475 static int efx_probe_channel(struct efx_channel *channel)
477 struct efx_tx_queue *tx_queue;
478 struct efx_rx_queue *rx_queue;
481 netif_dbg(channel->efx, probe, channel->efx->net_dev,
482 "creating channel %d\n", channel->channel);
484 rc = efx_probe_eventq(channel);
488 efx_for_each_channel_tx_queue(tx_queue, channel) {
489 rc = efx_probe_tx_queue(tx_queue);
494 efx_for_each_channel_rx_queue(rx_queue, channel) {
495 rc = efx_probe_rx_queue(rx_queue);
500 channel->n_rx_frm_trunc = 0;
505 efx_for_each_channel_rx_queue(rx_queue, channel)
506 efx_remove_rx_queue(rx_queue);
508 efx_for_each_channel_tx_queue(tx_queue, channel)
509 efx_remove_tx_queue(tx_queue);
515 static void efx_set_channel_names(struct efx_nic *efx)
517 struct efx_channel *channel;
518 const char *type = "";
521 efx_for_each_channel(channel, efx) {
522 number = channel->channel;
523 if (efx->n_channels > efx->n_rx_channels) {
524 if (channel->channel < efx->n_rx_channels) {
528 number -= efx->n_rx_channels;
531 snprintf(efx->channel_name[channel->channel],
532 sizeof(efx->channel_name[0]),
533 "%s%s-%d", efx->name, type, number);
537 static int efx_probe_channels(struct efx_nic *efx)
539 struct efx_channel *channel;
542 /* Restart special buffer allocation */
543 efx->next_buffer_table = 0;
545 efx_for_each_channel(channel, efx) {
546 rc = efx_probe_channel(channel);
548 netif_err(efx, probe, efx->net_dev,
549 "failed to create channel %d\n",
554 efx_set_channel_names(efx);
559 efx_remove_channels(efx);
563 /* Channels are shutdown and reinitialised whilst the NIC is running
564 * to propagate configuration changes (mtu, checksum offload), or
565 * to clear hardware error conditions
567 static void efx_init_channels(struct efx_nic *efx)
569 struct efx_tx_queue *tx_queue;
570 struct efx_rx_queue *rx_queue;
571 struct efx_channel *channel;
573 /* Calculate the rx buffer allocation parameters required to
574 * support the current MTU, including padding for header
575 * alignment and overruns.
577 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
578 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
579 efx->type->rx_buffer_hash_size +
580 efx->type->rx_buffer_padding);
581 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
582 sizeof(struct efx_rx_page_state));
584 /* Initialise the channels */
585 efx_for_each_channel(channel, efx) {
586 netif_dbg(channel->efx, drv, channel->efx->net_dev,
587 "init chan %d\n", channel->channel);
589 efx_init_eventq(channel);
591 efx_for_each_channel_tx_queue(tx_queue, channel)
592 efx_init_tx_queue(tx_queue);
594 /* The rx buffer allocation strategy is MTU dependent */
595 efx_rx_strategy(channel);
597 efx_for_each_channel_rx_queue(rx_queue, channel)
598 efx_init_rx_queue(rx_queue);
600 WARN_ON(channel->rx_pkt != NULL);
601 efx_rx_strategy(channel);
605 /* This enables event queue processing and packet transmission.
607 * Note that this function is not allowed to fail, since that would
608 * introduce too much complexity into the suspend/resume path.
610 static void efx_start_channel(struct efx_channel *channel)
612 struct efx_rx_queue *rx_queue;
614 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
615 "starting chan %d\n", channel->channel);
617 /* The interrupt handler for this channel may set work_pending
618 * as soon as we enable it. Make sure it's cleared before
619 * then. Similarly, make sure it sees the enabled flag set. */
620 channel->work_pending = false;
621 channel->enabled = true;
624 /* Fill the queues before enabling NAPI */
625 efx_for_each_channel_rx_queue(rx_queue, channel)
626 efx_fast_push_rx_descriptors(rx_queue);
628 napi_enable(&channel->napi_str);
631 /* This disables event queue processing and packet transmission.
632 * This function does not guarantee that all queue processing
633 * (e.g. RX refill) is complete.
635 static void efx_stop_channel(struct efx_channel *channel)
637 if (!channel->enabled)
640 netif_dbg(channel->efx, ifdown, channel->efx->net_dev,
641 "stop chan %d\n", channel->channel);
643 channel->enabled = false;
644 napi_disable(&channel->napi_str);
647 static void efx_fini_channels(struct efx_nic *efx)
649 struct efx_channel *channel;
650 struct efx_tx_queue *tx_queue;
651 struct efx_rx_queue *rx_queue;
654 EFX_ASSERT_RESET_SERIALISED(efx);
655 BUG_ON(efx->port_enabled);
657 rc = efx_nic_flush_queues(efx);
658 if (rc && EFX_WORKAROUND_7803(efx)) {
659 /* Schedule a reset to recover from the flush failure. The
660 * descriptor caches reference memory we're about to free,
661 * but falcon_reconfigure_mac_wrapper() won't reconnect
662 * the MACs because of the pending reset. */
663 netif_err(efx, drv, efx->net_dev,
664 "Resetting to recover from flush failure\n");
665 efx_schedule_reset(efx, RESET_TYPE_ALL);
667 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
669 netif_dbg(efx, drv, efx->net_dev,
670 "successfully flushed all queues\n");
673 efx_for_each_channel(channel, efx) {
674 netif_dbg(channel->efx, drv, channel->efx->net_dev,
675 "shut down chan %d\n", channel->channel);
677 efx_for_each_channel_rx_queue(rx_queue, channel)
678 efx_fini_rx_queue(rx_queue);
679 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
680 efx_fini_tx_queue(tx_queue);
681 efx_fini_eventq(channel);
685 static void efx_remove_channel(struct efx_channel *channel)
687 struct efx_tx_queue *tx_queue;
688 struct efx_rx_queue *rx_queue;
690 netif_dbg(channel->efx, drv, channel->efx->net_dev,
691 "destroy chan %d\n", channel->channel);
693 efx_for_each_channel_rx_queue(rx_queue, channel)
694 efx_remove_rx_queue(rx_queue);
695 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
696 efx_remove_tx_queue(tx_queue);
697 efx_remove_eventq(channel);
700 static void efx_remove_channels(struct efx_nic *efx)
702 struct efx_channel *channel;
704 efx_for_each_channel(channel, efx)
705 efx_remove_channel(channel);
709 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
711 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
712 u32 old_rxq_entries, old_txq_entries;
717 efx_fini_channels(efx);
720 memset(other_channel, 0, sizeof(other_channel));
721 for (i = 0; i < efx->n_channels; i++) {
722 channel = efx_alloc_channel(efx, i, efx->channel[i]);
727 other_channel[i] = channel;
730 /* Swap entry counts and channel pointers */
731 old_rxq_entries = efx->rxq_entries;
732 old_txq_entries = efx->txq_entries;
733 efx->rxq_entries = rxq_entries;
734 efx->txq_entries = txq_entries;
735 for (i = 0; i < efx->n_channels; i++) {
736 channel = efx->channel[i];
737 efx->channel[i] = other_channel[i];
738 other_channel[i] = channel;
741 rc = efx_probe_channels(efx);
747 /* Destroy old channels */
748 for (i = 0; i < efx->n_channels; i++) {
749 efx_fini_napi_channel(other_channel[i]);
750 efx_remove_channel(other_channel[i]);
753 /* Free unused channel structures */
754 for (i = 0; i < efx->n_channels; i++)
755 kfree(other_channel[i]);
757 efx_init_channels(efx);
763 efx->rxq_entries = old_rxq_entries;
764 efx->txq_entries = old_txq_entries;
765 for (i = 0; i < efx->n_channels; i++) {
766 channel = efx->channel[i];
767 efx->channel[i] = other_channel[i];
768 other_channel[i] = channel;
773 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
775 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
778 /**************************************************************************
782 **************************************************************************/
784 /* This ensures that the kernel is kept informed (via
785 * netif_carrier_on/off) of the link status, and also maintains the
786 * link status's stop on the port's TX queue.
788 void efx_link_status_changed(struct efx_nic *efx)
790 struct efx_link_state *link_state = &efx->link_state;
792 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
793 * that no events are triggered between unregister_netdev() and the
794 * driver unloading. A more general condition is that NETDEV_CHANGE
795 * can only be generated between NETDEV_UP and NETDEV_DOWN */
796 if (!netif_running(efx->net_dev))
799 if (efx->port_inhibited) {
800 netif_carrier_off(efx->net_dev);
804 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
805 efx->n_link_state_changes++;
808 netif_carrier_on(efx->net_dev);
810 netif_carrier_off(efx->net_dev);
813 /* Status message for kernel log */
814 if (link_state->up) {
815 netif_info(efx, link, efx->net_dev,
816 "link up at %uMbps %s-duplex (MTU %d)%s\n",
817 link_state->speed, link_state->fd ? "full" : "half",
819 (efx->promiscuous ? " [PROMISC]" : ""));
821 netif_info(efx, link, efx->net_dev, "link down\n");
826 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
828 efx->link_advertising = advertising;
830 if (advertising & ADVERTISED_Pause)
831 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
833 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
834 if (advertising & ADVERTISED_Asym_Pause)
835 efx->wanted_fc ^= EFX_FC_TX;
839 void efx_link_set_wanted_fc(struct efx_nic *efx, enum efx_fc_type wanted_fc)
841 efx->wanted_fc = wanted_fc;
842 if (efx->link_advertising) {
843 if (wanted_fc & EFX_FC_RX)
844 efx->link_advertising |= (ADVERTISED_Pause |
845 ADVERTISED_Asym_Pause);
847 efx->link_advertising &= ~(ADVERTISED_Pause |
848 ADVERTISED_Asym_Pause);
849 if (wanted_fc & EFX_FC_TX)
850 efx->link_advertising ^= ADVERTISED_Asym_Pause;
854 static void efx_fini_port(struct efx_nic *efx);
856 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
857 * the MAC appropriately. All other PHY configuration changes are pushed
858 * through phy_op->set_settings(), and pushed asynchronously to the MAC
859 * through efx_monitor().
861 * Callers must hold the mac_lock
863 int __efx_reconfigure_port(struct efx_nic *efx)
865 enum efx_phy_mode phy_mode;
868 WARN_ON(!mutex_is_locked(&efx->mac_lock));
870 /* Serialise the promiscuous flag with efx_set_multicast_list. */
871 if (efx_dev_registered(efx)) {
872 netif_addr_lock_bh(efx->net_dev);
873 netif_addr_unlock_bh(efx->net_dev);
876 /* Disable PHY transmit in mac level loopbacks */
877 phy_mode = efx->phy_mode;
878 if (LOOPBACK_INTERNAL(efx))
879 efx->phy_mode |= PHY_MODE_TX_DISABLED;
881 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
883 rc = efx->type->reconfigure_port(efx);
886 efx->phy_mode = phy_mode;
891 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
893 int efx_reconfigure_port(struct efx_nic *efx)
897 EFX_ASSERT_RESET_SERIALISED(efx);
899 mutex_lock(&efx->mac_lock);
900 rc = __efx_reconfigure_port(efx);
901 mutex_unlock(&efx->mac_lock);
906 /* Asynchronous work item for changing MAC promiscuity and multicast
907 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
909 static void efx_mac_work(struct work_struct *data)
911 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
913 mutex_lock(&efx->mac_lock);
914 if (efx->port_enabled) {
915 efx->type->push_multicast_hash(efx);
916 efx->mac_op->reconfigure(efx);
918 mutex_unlock(&efx->mac_lock);
921 static int efx_probe_port(struct efx_nic *efx)
923 unsigned char *perm_addr;
926 netif_dbg(efx, probe, efx->net_dev, "create port\n");
929 efx->phy_mode = PHY_MODE_SPECIAL;
931 /* Connect up MAC/PHY operations table */
932 rc = efx->type->probe_port(efx);
936 /* Sanity check MAC address */
937 perm_addr = efx->net_dev->perm_addr;
938 if (is_valid_ether_addr(perm_addr)) {
939 memcpy(efx->net_dev->dev_addr, perm_addr, ETH_ALEN);
941 netif_err(efx, probe, efx->net_dev, "invalid MAC address %pM\n",
943 if (!allow_bad_hwaddr) {
947 random_ether_addr(efx->net_dev->dev_addr);
948 netif_info(efx, probe, efx->net_dev,
949 "using locally-generated MAC %pM\n",
950 efx->net_dev->dev_addr);
956 efx->type->remove_port(efx);
960 static int efx_init_port(struct efx_nic *efx)
964 netif_dbg(efx, drv, efx->net_dev, "init port\n");
966 mutex_lock(&efx->mac_lock);
968 rc = efx->phy_op->init(efx);
972 efx->port_initialized = true;
974 /* Reconfigure the MAC before creating dma queues (required for
975 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
976 efx->mac_op->reconfigure(efx);
978 /* Ensure the PHY advertises the correct flow control settings */
979 rc = efx->phy_op->reconfigure(efx);
983 mutex_unlock(&efx->mac_lock);
987 efx->phy_op->fini(efx);
989 mutex_unlock(&efx->mac_lock);
993 static void efx_start_port(struct efx_nic *efx)
995 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
996 BUG_ON(efx->port_enabled);
998 mutex_lock(&efx->mac_lock);
999 efx->port_enabled = true;
1001 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1002 * and then cancelled by efx_flush_all() */
1003 efx->type->push_multicast_hash(efx);
1004 efx->mac_op->reconfigure(efx);
1006 mutex_unlock(&efx->mac_lock);
1009 /* Prevent efx_mac_work() and efx_monitor() from working */
1010 static void efx_stop_port(struct efx_nic *efx)
1012 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1014 mutex_lock(&efx->mac_lock);
1015 efx->port_enabled = false;
1016 mutex_unlock(&efx->mac_lock);
1018 /* Serialise against efx_set_multicast_list() */
1019 if (efx_dev_registered(efx)) {
1020 netif_addr_lock_bh(efx->net_dev);
1021 netif_addr_unlock_bh(efx->net_dev);
1025 static void efx_fini_port(struct efx_nic *efx)
1027 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1029 if (!efx->port_initialized)
1032 efx->phy_op->fini(efx);
1033 efx->port_initialized = false;
1035 efx->link_state.up = false;
1036 efx_link_status_changed(efx);
1039 static void efx_remove_port(struct efx_nic *efx)
1041 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1043 efx->type->remove_port(efx);
1046 /**************************************************************************
1050 **************************************************************************/
1052 /* This configures the PCI device to enable I/O and DMA. */
1053 static int efx_init_io(struct efx_nic *efx)
1055 struct pci_dev *pci_dev = efx->pci_dev;
1056 dma_addr_t dma_mask = efx->type->max_dma_mask;
1060 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1062 rc = pci_enable_device(pci_dev);
1064 netif_err(efx, probe, efx->net_dev,
1065 "failed to enable PCI device\n");
1069 pci_set_master(pci_dev);
1071 /* Set the PCI DMA mask. Try all possibilities from our
1072 * genuine mask down to 32 bits, because some architectures
1073 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1074 * masks event though they reject 46 bit masks.
1076 while (dma_mask > 0x7fffffffUL) {
1077 if (pci_dma_supported(pci_dev, dma_mask) &&
1078 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
1083 netif_err(efx, probe, efx->net_dev,
1084 "could not find a suitable DMA mask\n");
1087 netif_dbg(efx, probe, efx->net_dev,
1088 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1089 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1091 /* pci_set_consistent_dma_mask() is not *allowed* to
1092 * fail with a mask that pci_set_dma_mask() accepted,
1093 * but just in case...
1095 netif_err(efx, probe, efx->net_dev,
1096 "failed to set consistent DMA mask\n");
1100 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1101 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1103 netif_err(efx, probe, efx->net_dev,
1104 "request for memory BAR failed\n");
1109 /* bug22643: If SR-IOV is enabled then tx push over a write combined
1110 * mapping is unsafe. We need to disable write combining in this case.
1111 * MSI is unsupported when SR-IOV is enabled, and the firmware will
1112 * have removed the MSI capability. So write combining is safe if
1113 * there is an MSI capability.
1115 use_wc = (!EFX_WORKAROUND_22643(efx) ||
1116 pci_find_capability(pci_dev, PCI_CAP_ID_MSI));
1118 efx->membase = ioremap_wc(efx->membase_phys,
1119 efx->type->mem_map_size);
1121 efx->membase = ioremap_nocache(efx->membase_phys,
1122 efx->type->mem_map_size);
1123 if (!efx->membase) {
1124 netif_err(efx, probe, efx->net_dev,
1125 "could not map memory BAR at %llx+%x\n",
1126 (unsigned long long)efx->membase_phys,
1127 efx->type->mem_map_size);
1131 netif_dbg(efx, probe, efx->net_dev,
1132 "memory BAR at %llx+%x (virtual %p)\n",
1133 (unsigned long long)efx->membase_phys,
1134 efx->type->mem_map_size, efx->membase);
1139 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1141 efx->membase_phys = 0;
1143 pci_disable_device(efx->pci_dev);
1148 static void efx_fini_io(struct efx_nic *efx)
1150 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1153 iounmap(efx->membase);
1154 efx->membase = NULL;
1157 if (efx->membase_phys) {
1158 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1159 efx->membase_phys = 0;
1162 pci_disable_device(efx->pci_dev);
1165 /* Get number of channels wanted. Each channel will have its own IRQ,
1166 * 1 RX queue and/or 2 TX queues. */
1167 static int efx_wanted_channels(void)
1169 cpumask_var_t core_mask;
1176 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
1178 "sfc: RSS disabled due to allocation failure\n");
1183 for_each_online_cpu(cpu) {
1184 if (!cpumask_test_cpu(cpu, core_mask)) {
1186 cpumask_or(core_mask, core_mask,
1187 topology_core_cpumask(cpu));
1191 free_cpumask_var(core_mask);
1196 efx_init_rx_cpu_rmap(struct efx_nic *efx, struct msix_entry *xentries)
1198 #ifdef CONFIG_RFS_ACCEL
1201 efx->net_dev->rx_cpu_rmap = alloc_irq_cpu_rmap(efx->n_rx_channels);
1202 if (!efx->net_dev->rx_cpu_rmap)
1204 for (i = 0; i < efx->n_rx_channels; i++) {
1205 rc = irq_cpu_rmap_add(efx->net_dev->rx_cpu_rmap,
1206 xentries[i].vector);
1208 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
1209 efx->net_dev->rx_cpu_rmap = NULL;
1217 /* Probe the number and type of interrupts we are able to obtain, and
1218 * the resulting numbers of channels and RX queues.
1220 static int efx_probe_interrupts(struct efx_nic *efx)
1223 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1226 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1227 struct msix_entry xentries[EFX_MAX_CHANNELS];
1230 n_channels = efx_wanted_channels();
1231 if (separate_tx_channels)
1233 n_channels = min(n_channels, max_channels);
1235 for (i = 0; i < n_channels; i++)
1236 xentries[i].entry = i;
1237 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1239 netif_err(efx, drv, efx->net_dev,
1240 "WARNING: Insufficient MSI-X vectors"
1241 " available (%d < %d).\n", rc, n_channels);
1242 netif_err(efx, drv, efx->net_dev,
1243 "WARNING: Performance may be reduced.\n");
1244 EFX_BUG_ON_PARANOID(rc >= n_channels);
1246 rc = pci_enable_msix(efx->pci_dev, xentries,
1251 efx->n_channels = n_channels;
1252 if (separate_tx_channels) {
1253 efx->n_tx_channels =
1254 max(efx->n_channels / 2, 1U);
1255 efx->n_rx_channels =
1256 max(efx->n_channels -
1257 efx->n_tx_channels, 1U);
1259 efx->n_tx_channels = efx->n_channels;
1260 efx->n_rx_channels = efx->n_channels;
1262 rc = efx_init_rx_cpu_rmap(efx, xentries);
1264 pci_disable_msix(efx->pci_dev);
1267 for (i = 0; i < n_channels; i++)
1268 efx_get_channel(efx, i)->irq =
1271 /* Fall back to single channel MSI */
1272 efx->interrupt_mode = EFX_INT_MODE_MSI;
1273 netif_err(efx, drv, efx->net_dev,
1274 "could not enable MSI-X\n");
1278 /* Try single interrupt MSI */
1279 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1280 efx->n_channels = 1;
1281 efx->n_rx_channels = 1;
1282 efx->n_tx_channels = 1;
1283 rc = pci_enable_msi(efx->pci_dev);
1285 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1287 netif_err(efx, drv, efx->net_dev,
1288 "could not enable MSI\n");
1289 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1293 /* Assume legacy interrupts */
1294 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1295 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1296 efx->n_rx_channels = 1;
1297 efx->n_tx_channels = 1;
1298 efx->legacy_irq = efx->pci_dev->irq;
1304 static void efx_remove_interrupts(struct efx_nic *efx)
1306 struct efx_channel *channel;
1308 /* Remove MSI/MSI-X interrupts */
1309 efx_for_each_channel(channel, efx)
1311 pci_disable_msi(efx->pci_dev);
1312 pci_disable_msix(efx->pci_dev);
1314 /* Remove legacy interrupt */
1315 efx->legacy_irq = 0;
1318 static void efx_set_channels(struct efx_nic *efx)
1320 efx->tx_channel_offset =
1321 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1324 static int efx_probe_nic(struct efx_nic *efx)
1329 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1331 /* Carry out hardware-type specific initialisation */
1332 rc = efx->type->probe(efx);
1336 /* Determine the number of channels and queues by trying to hook
1337 * in MSI-X interrupts. */
1338 rc = efx_probe_interrupts(efx);
1342 if (efx->n_channels > 1)
1343 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1344 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1345 efx->rx_indir_table[i] = i % efx->n_rx_channels;
1347 efx_set_channels(efx);
1348 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1349 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1351 /* Initialise the interrupt moderation settings */
1352 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1357 efx->type->remove(efx);
1361 static void efx_remove_nic(struct efx_nic *efx)
1363 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1365 efx_remove_interrupts(efx);
1366 efx->type->remove(efx);
1369 /**************************************************************************
1371 * NIC startup/shutdown
1373 *************************************************************************/
1375 static int efx_probe_all(struct efx_nic *efx)
1379 rc = efx_probe_nic(efx);
1381 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1385 rc = efx_probe_port(efx);
1387 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1391 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1392 rc = efx_probe_channels(efx);
1396 rc = efx_probe_filters(efx);
1398 netif_err(efx, probe, efx->net_dev,
1399 "failed to create filter tables\n");
1406 efx_remove_channels(efx);
1408 efx_remove_port(efx);
1410 efx_remove_nic(efx);
1415 /* Called after previous invocation(s) of efx_stop_all, restarts the
1416 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1417 * and ensures that the port is scheduled to be reconfigured.
1418 * This function is safe to call multiple times when the NIC is in any
1420 static void efx_start_all(struct efx_nic *efx)
1422 struct efx_channel *channel;
1424 EFX_ASSERT_RESET_SERIALISED(efx);
1426 /* Check that it is appropriate to restart the interface. All
1427 * of these flags are safe to read under just the rtnl lock */
1428 if (efx->port_enabled)
1430 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1432 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1435 /* Mark the port as enabled so port reconfigurations can start, then
1436 * restart the transmit interface early so the watchdog timer stops */
1437 efx_start_port(efx);
1439 if (efx_dev_registered(efx))
1440 netif_tx_wake_all_queues(efx->net_dev);
1442 efx_for_each_channel(channel, efx)
1443 efx_start_channel(channel);
1445 if (efx->legacy_irq)
1446 efx->legacy_irq_enabled = true;
1447 efx_nic_enable_interrupts(efx);
1449 /* Switch to event based MCDI completions after enabling interrupts.
1450 * If a reset has been scheduled, then we need to stay in polled mode.
1451 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1452 * reset_pending [modified from an atomic context], we instead guarantee
1453 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1454 efx_mcdi_mode_event(efx);
1455 if (efx->reset_pending != RESET_TYPE_NONE)
1456 efx_mcdi_mode_poll(efx);
1458 /* Start the hardware monitor if there is one. Otherwise (we're link
1459 * event driven), we have to poll the PHY because after an event queue
1460 * flush, we could have a missed a link state change */
1461 if (efx->type->monitor != NULL) {
1462 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1463 efx_monitor_interval);
1465 mutex_lock(&efx->mac_lock);
1466 if (efx->phy_op->poll(efx))
1467 efx_link_status_changed(efx);
1468 mutex_unlock(&efx->mac_lock);
1471 efx->type->start_stats(efx);
1474 /* Flush all delayed work. Should only be called when no more delayed work
1475 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1476 * since we're holding the rtnl_lock at this point. */
1477 static void efx_flush_all(struct efx_nic *efx)
1479 /* Make sure the hardware monitor is stopped */
1480 cancel_delayed_work_sync(&efx->monitor_work);
1481 /* Stop scheduled port reconfigurations */
1482 cancel_work_sync(&efx->mac_work);
1485 /* Quiesce hardware and software without bringing the link down.
1486 * Safe to call multiple times, when the nic and interface is in any
1487 * state. The caller is guaranteed to subsequently be in a position
1488 * to modify any hardware and software state they see fit without
1490 static void efx_stop_all(struct efx_nic *efx)
1492 struct efx_channel *channel;
1494 EFX_ASSERT_RESET_SERIALISED(efx);
1496 /* port_enabled can be read safely under the rtnl lock */
1497 if (!efx->port_enabled)
1500 efx->type->stop_stats(efx);
1502 /* Switch to MCDI polling on Siena before disabling interrupts */
1503 efx_mcdi_mode_poll(efx);
1505 /* Disable interrupts and wait for ISR to complete */
1506 efx_nic_disable_interrupts(efx);
1507 if (efx->legacy_irq) {
1508 synchronize_irq(efx->legacy_irq);
1509 efx->legacy_irq_enabled = false;
1511 efx_for_each_channel(channel, efx) {
1513 synchronize_irq(channel->irq);
1516 /* Stop all NAPI processing and synchronous rx refills */
1517 efx_for_each_channel(channel, efx)
1518 efx_stop_channel(channel);
1520 /* Stop all asynchronous port reconfigurations. Since all
1521 * event processing has already been stopped, there is no
1522 * window to loose phy events */
1525 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1528 /* Stop the kernel transmit interface late, so the watchdog
1529 * timer isn't ticking over the flush */
1530 if (efx_dev_registered(efx)) {
1531 netif_tx_stop_all_queues(efx->net_dev);
1532 netif_tx_lock_bh(efx->net_dev);
1533 netif_tx_unlock_bh(efx->net_dev);
1537 static void efx_remove_all(struct efx_nic *efx)
1539 efx_remove_filters(efx);
1540 efx_remove_channels(efx);
1541 efx_remove_port(efx);
1542 efx_remove_nic(efx);
1545 /**************************************************************************
1547 * Interrupt moderation
1549 **************************************************************************/
1551 static unsigned irq_mod_ticks(int usecs, int resolution)
1554 return 0; /* cannot receive interrupts ahead of time :-) */
1555 if (usecs < resolution)
1556 return 1; /* never round down to 0 */
1557 return usecs / resolution;
1560 /* Set interrupt moderation parameters */
1561 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1564 struct efx_channel *channel;
1565 unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
1566 unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
1568 EFX_ASSERT_RESET_SERIALISED(efx);
1570 efx->irq_rx_adaptive = rx_adaptive;
1571 efx->irq_rx_moderation = rx_ticks;
1572 efx_for_each_channel(channel, efx) {
1573 if (efx_channel_has_rx_queue(channel))
1574 channel->irq_moderation = rx_ticks;
1575 else if (efx_channel_has_tx_queues(channel))
1576 channel->irq_moderation = tx_ticks;
1580 /**************************************************************************
1584 **************************************************************************/
1586 /* Run periodically off the general workqueue */
1587 static void efx_monitor(struct work_struct *data)
1589 struct efx_nic *efx = container_of(data, struct efx_nic,
1592 netif_vdbg(efx, timer, efx->net_dev,
1593 "hardware monitor executing on CPU %d\n",
1594 raw_smp_processor_id());
1595 BUG_ON(efx->type->monitor == NULL);
1597 /* If the mac_lock is already held then it is likely a port
1598 * reconfiguration is already in place, which will likely do
1599 * most of the work of monitor() anyway. */
1600 if (mutex_trylock(&efx->mac_lock)) {
1601 if (efx->port_enabled)
1602 efx->type->monitor(efx);
1603 mutex_unlock(&efx->mac_lock);
1606 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1607 efx_monitor_interval);
1610 /**************************************************************************
1614 *************************************************************************/
1617 * Context: process, rtnl_lock() held.
1619 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1621 struct efx_nic *efx = netdev_priv(net_dev);
1622 struct mii_ioctl_data *data = if_mii(ifr);
1624 EFX_ASSERT_RESET_SERIALISED(efx);
1626 /* Convert phy_id from older PRTAD/DEVAD format */
1627 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1628 (data->phy_id & 0xfc00) == 0x0400)
1629 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1631 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1634 /**************************************************************************
1638 **************************************************************************/
1640 static void efx_init_napi(struct efx_nic *efx)
1642 struct efx_channel *channel;
1644 efx_for_each_channel(channel, efx) {
1645 channel->napi_dev = efx->net_dev;
1646 netif_napi_add(channel->napi_dev, &channel->napi_str,
1647 efx_poll, napi_weight);
1651 static void efx_fini_napi_channel(struct efx_channel *channel)
1653 if (channel->napi_dev)
1654 netif_napi_del(&channel->napi_str);
1655 channel->napi_dev = NULL;
1658 static void efx_fini_napi(struct efx_nic *efx)
1660 struct efx_channel *channel;
1662 efx_for_each_channel(channel, efx)
1663 efx_fini_napi_channel(channel);
1666 /**************************************************************************
1668 * Kernel netpoll interface
1670 *************************************************************************/
1672 #ifdef CONFIG_NET_POLL_CONTROLLER
1674 /* Although in the common case interrupts will be disabled, this is not
1675 * guaranteed. However, all our work happens inside the NAPI callback,
1676 * so no locking is required.
1678 static void efx_netpoll(struct net_device *net_dev)
1680 struct efx_nic *efx = netdev_priv(net_dev);
1681 struct efx_channel *channel;
1683 efx_for_each_channel(channel, efx)
1684 efx_schedule_channel(channel);
1689 /**************************************************************************
1691 * Kernel net device interface
1693 *************************************************************************/
1695 /* Context: process, rtnl_lock() held. */
1696 static int efx_net_open(struct net_device *net_dev)
1698 struct efx_nic *efx = netdev_priv(net_dev);
1699 EFX_ASSERT_RESET_SERIALISED(efx);
1701 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1702 raw_smp_processor_id());
1704 if (efx->state == STATE_DISABLED)
1706 if (efx->phy_mode & PHY_MODE_SPECIAL)
1708 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1711 /* Notify the kernel of the link state polled during driver load,
1712 * before the monitor starts running */
1713 efx_link_status_changed(efx);
1719 /* Context: process, rtnl_lock() held.
1720 * Note that the kernel will ignore our return code; this method
1721 * should really be a void.
1723 static int efx_net_stop(struct net_device *net_dev)
1725 struct efx_nic *efx = netdev_priv(net_dev);
1727 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1728 raw_smp_processor_id());
1730 if (efx->state != STATE_DISABLED) {
1731 /* Stop the device and flush all the channels */
1733 efx_fini_channels(efx);
1734 efx_init_channels(efx);
1740 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1741 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats)
1743 struct efx_nic *efx = netdev_priv(net_dev);
1744 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1746 spin_lock_bh(&efx->stats_lock);
1747 efx->type->update_stats(efx);
1748 spin_unlock_bh(&efx->stats_lock);
1750 stats->rx_packets = mac_stats->rx_packets;
1751 stats->tx_packets = mac_stats->tx_packets;
1752 stats->rx_bytes = mac_stats->rx_bytes;
1753 stats->tx_bytes = mac_stats->tx_bytes;
1754 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1755 stats->multicast = mac_stats->rx_multicast;
1756 stats->collisions = mac_stats->tx_collision;
1757 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1758 mac_stats->rx_length_error);
1759 stats->rx_crc_errors = mac_stats->rx_bad;
1760 stats->rx_frame_errors = mac_stats->rx_align_error;
1761 stats->rx_fifo_errors = mac_stats->rx_overflow;
1762 stats->rx_missed_errors = mac_stats->rx_missed;
1763 stats->tx_window_errors = mac_stats->tx_late_collision;
1765 stats->rx_errors = (stats->rx_length_errors +
1766 stats->rx_crc_errors +
1767 stats->rx_frame_errors +
1768 mac_stats->rx_symbol_error);
1769 stats->tx_errors = (stats->tx_window_errors +
1775 /* Context: netif_tx_lock held, BHs disabled. */
1776 static void efx_watchdog(struct net_device *net_dev)
1778 struct efx_nic *efx = netdev_priv(net_dev);
1780 netif_err(efx, tx_err, efx->net_dev,
1781 "TX stuck with port_enabled=%d: resetting channels\n",
1784 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1788 /* Context: process, rtnl_lock() held. */
1789 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1791 struct efx_nic *efx = netdev_priv(net_dev);
1794 EFX_ASSERT_RESET_SERIALISED(efx);
1796 if (new_mtu > EFX_MAX_MTU)
1801 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1803 efx_fini_channels(efx);
1805 mutex_lock(&efx->mac_lock);
1806 /* Reconfigure the MAC before enabling the dma queues so that
1807 * the RX buffers don't overflow */
1808 net_dev->mtu = new_mtu;
1809 efx->mac_op->reconfigure(efx);
1810 mutex_unlock(&efx->mac_lock);
1812 efx_init_channels(efx);
1818 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1820 struct efx_nic *efx = netdev_priv(net_dev);
1821 struct sockaddr *addr = data;
1822 char *new_addr = addr->sa_data;
1824 EFX_ASSERT_RESET_SERIALISED(efx);
1826 if (!is_valid_ether_addr(new_addr)) {
1827 netif_err(efx, drv, efx->net_dev,
1828 "invalid ethernet MAC address requested: %pM\n",
1833 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1835 /* Reconfigure the MAC */
1836 mutex_lock(&efx->mac_lock);
1837 efx->mac_op->reconfigure(efx);
1838 mutex_unlock(&efx->mac_lock);
1843 /* Context: netif_addr_lock held, BHs disabled. */
1844 static void efx_set_multicast_list(struct net_device *net_dev)
1846 struct efx_nic *efx = netdev_priv(net_dev);
1847 struct netdev_hw_addr *ha;
1848 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1852 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1854 /* Build multicast hash table */
1855 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1856 memset(mc_hash, 0xff, sizeof(*mc_hash));
1858 memset(mc_hash, 0x00, sizeof(*mc_hash));
1859 netdev_for_each_mc_addr(ha, net_dev) {
1860 crc = ether_crc_le(ETH_ALEN, ha->addr);
1861 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1862 set_bit_le(bit, mc_hash->byte);
1865 /* Broadcast packets go through the multicast hash filter.
1866 * ether_crc_le() of the broadcast address is 0xbe2612ff
1867 * so we always add bit 0xff to the mask.
1869 set_bit_le(0xff, mc_hash->byte);
1872 if (efx->port_enabled)
1873 queue_work(efx->workqueue, &efx->mac_work);
1874 /* Otherwise efx_start_port() will do this */
1877 static int efx_set_features(struct net_device *net_dev, u32 data)
1879 struct efx_nic *efx = netdev_priv(net_dev);
1881 /* If disabling RX n-tuple filtering, clear existing filters */
1882 if (net_dev->features & ~data & NETIF_F_NTUPLE)
1883 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
1888 static const struct net_device_ops efx_netdev_ops = {
1889 .ndo_open = efx_net_open,
1890 .ndo_stop = efx_net_stop,
1891 .ndo_get_stats64 = efx_net_stats,
1892 .ndo_tx_timeout = efx_watchdog,
1893 .ndo_start_xmit = efx_hard_start_xmit,
1894 .ndo_validate_addr = eth_validate_addr,
1895 .ndo_do_ioctl = efx_ioctl,
1896 .ndo_change_mtu = efx_change_mtu,
1897 .ndo_set_mac_address = efx_set_mac_address,
1898 .ndo_set_multicast_list = efx_set_multicast_list,
1899 .ndo_set_features = efx_set_features,
1900 #ifdef CONFIG_NET_POLL_CONTROLLER
1901 .ndo_poll_controller = efx_netpoll,
1903 .ndo_setup_tc = efx_setup_tc,
1904 #ifdef CONFIG_RFS_ACCEL
1905 .ndo_rx_flow_steer = efx_filter_rfs,
1909 static void efx_update_name(struct efx_nic *efx)
1911 strcpy(efx->name, efx->net_dev->name);
1912 efx_mtd_rename(efx);
1913 efx_set_channel_names(efx);
1916 static int efx_netdev_event(struct notifier_block *this,
1917 unsigned long event, void *ptr)
1919 struct net_device *net_dev = ptr;
1921 if (net_dev->netdev_ops == &efx_netdev_ops &&
1922 event == NETDEV_CHANGENAME)
1923 efx_update_name(netdev_priv(net_dev));
1928 static struct notifier_block efx_netdev_notifier = {
1929 .notifier_call = efx_netdev_event,
1933 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1935 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1936 return sprintf(buf, "%d\n", efx->phy_type);
1938 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1940 static int efx_register_netdev(struct efx_nic *efx)
1942 struct net_device *net_dev = efx->net_dev;
1943 struct efx_channel *channel;
1946 net_dev->watchdog_timeo = 5 * HZ;
1947 net_dev->irq = efx->pci_dev->irq;
1948 net_dev->netdev_ops = &efx_netdev_ops;
1949 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1951 /* Clear MAC statistics */
1952 efx->mac_op->update_stats(efx);
1953 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1957 rc = dev_alloc_name(net_dev, net_dev->name);
1960 efx_update_name(efx);
1962 rc = register_netdevice(net_dev);
1966 efx_for_each_channel(channel, efx) {
1967 struct efx_tx_queue *tx_queue;
1968 efx_for_each_channel_tx_queue(tx_queue, channel)
1969 efx_init_tx_queue_core_txq(tx_queue);
1972 /* Always start with carrier off; PHY events will detect the link */
1973 netif_carrier_off(efx->net_dev);
1977 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1979 netif_err(efx, drv, efx->net_dev,
1980 "failed to init net dev attributes\n");
1981 goto fail_registered;
1988 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
1992 unregister_netdev(net_dev);
1996 static void efx_unregister_netdev(struct efx_nic *efx)
1998 struct efx_channel *channel;
1999 struct efx_tx_queue *tx_queue;
2004 BUG_ON(netdev_priv(efx->net_dev) != efx);
2006 /* Free up any skbs still remaining. This has to happen before
2007 * we try to unregister the netdev as running their destructors
2008 * may be needed to get the device ref. count to 0. */
2009 efx_for_each_channel(channel, efx) {
2010 efx_for_each_channel_tx_queue(tx_queue, channel)
2011 efx_release_tx_buffers(tx_queue);
2014 if (efx_dev_registered(efx)) {
2015 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2016 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2017 unregister_netdev(efx->net_dev);
2021 /**************************************************************************
2023 * Device reset and suspend
2025 **************************************************************************/
2027 /* Tears down the entire software state and most of the hardware state
2029 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2031 EFX_ASSERT_RESET_SERIALISED(efx);
2034 mutex_lock(&efx->mac_lock);
2036 efx_fini_channels(efx);
2037 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2038 efx->phy_op->fini(efx);
2039 efx->type->fini(efx);
2042 /* This function will always ensure that the locks acquired in
2043 * efx_reset_down() are released. A failure return code indicates
2044 * that we were unable to reinitialise the hardware, and the
2045 * driver should be disabled. If ok is false, then the rx and tx
2046 * engines are not restarted, pending a RESET_DISABLE. */
2047 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2051 EFX_ASSERT_RESET_SERIALISED(efx);
2053 rc = efx->type->init(efx);
2055 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2062 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2063 rc = efx->phy_op->init(efx);
2066 if (efx->phy_op->reconfigure(efx))
2067 netif_err(efx, drv, efx->net_dev,
2068 "could not restore PHY settings\n");
2071 efx->mac_op->reconfigure(efx);
2073 efx_init_channels(efx);
2074 efx_restore_filters(efx);
2076 mutex_unlock(&efx->mac_lock);
2083 efx->port_initialized = false;
2085 mutex_unlock(&efx->mac_lock);
2090 /* Reset the NIC using the specified method. Note that the reset may
2091 * fail, in which case the card will be left in an unusable state.
2093 * Caller must hold the rtnl_lock.
2095 int efx_reset(struct efx_nic *efx, enum reset_type method)
2100 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2101 RESET_TYPE(method));
2103 efx_reset_down(efx, method);
2105 rc = efx->type->reset(efx, method);
2107 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2111 /* Allow resets to be rescheduled. */
2112 efx->reset_pending = RESET_TYPE_NONE;
2114 /* Reinitialise bus-mastering, which may have been turned off before
2115 * the reset was scheduled. This is still appropriate, even in the
2116 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2117 * can respond to requests. */
2118 pci_set_master(efx->pci_dev);
2121 /* Leave device stopped if necessary */
2122 disabled = rc || method == RESET_TYPE_DISABLE;
2123 rc2 = efx_reset_up(efx, method, !disabled);
2131 dev_close(efx->net_dev);
2132 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2133 efx->state = STATE_DISABLED;
2135 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2140 /* The worker thread exists so that code that cannot sleep can
2141 * schedule a reset for later.
2143 static void efx_reset_work(struct work_struct *data)
2145 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2147 if (efx->reset_pending == RESET_TYPE_NONE)
2150 /* If we're not RUNNING then don't reset. Leave the reset_pending
2151 * flag set so that efx_pci_probe_main will be retried */
2152 if (efx->state != STATE_RUNNING) {
2153 netif_info(efx, drv, efx->net_dev,
2154 "scheduled reset quenched. NIC not RUNNING\n");
2159 (void)efx_reset(efx, efx->reset_pending);
2163 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2165 enum reset_type method;
2167 if (efx->reset_pending != RESET_TYPE_NONE) {
2168 netif_info(efx, drv, efx->net_dev,
2169 "quenching already scheduled reset\n");
2174 case RESET_TYPE_INVISIBLE:
2175 case RESET_TYPE_ALL:
2176 case RESET_TYPE_WORLD:
2177 case RESET_TYPE_DISABLE:
2180 case RESET_TYPE_RX_RECOVERY:
2181 case RESET_TYPE_RX_DESC_FETCH:
2182 case RESET_TYPE_TX_DESC_FETCH:
2183 case RESET_TYPE_TX_SKIP:
2184 method = RESET_TYPE_INVISIBLE;
2186 case RESET_TYPE_MC_FAILURE:
2188 method = RESET_TYPE_ALL;
2193 netif_dbg(efx, drv, efx->net_dev,
2194 "scheduling %s reset for %s\n",
2195 RESET_TYPE(method), RESET_TYPE(type));
2197 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2198 RESET_TYPE(method));
2200 efx->reset_pending = method;
2202 /* efx_process_channel() will no longer read events once a
2203 * reset is scheduled. So switch back to poll'd MCDI completions. */
2204 efx_mcdi_mode_poll(efx);
2206 queue_work(reset_workqueue, &efx->reset_work);
2209 /**************************************************************************
2211 * List of NICs we support
2213 **************************************************************************/
2215 /* PCI device ID table */
2216 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2217 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
2218 .driver_data = (unsigned long) &falcon_a1_nic_type},
2219 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
2220 .driver_data = (unsigned long) &falcon_b0_nic_type},
2221 {PCI_DEVICE(EFX_VENDID_SFC, BETHPAGE_A_P_DEVID),
2222 .driver_data = (unsigned long) &siena_a0_nic_type},
2223 {PCI_DEVICE(EFX_VENDID_SFC, SIENA_A_P_DEVID),
2224 .driver_data = (unsigned long) &siena_a0_nic_type},
2225 {0} /* end of list */
2228 /**************************************************************************
2230 * Dummy PHY/MAC operations
2232 * Can be used for some unimplemented operations
2233 * Needed so all function pointers are valid and do not have to be tested
2236 **************************************************************************/
2237 int efx_port_dummy_op_int(struct efx_nic *efx)
2241 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2243 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2248 static struct efx_phy_operations efx_dummy_phy_operations = {
2249 .init = efx_port_dummy_op_int,
2250 .reconfigure = efx_port_dummy_op_int,
2251 .poll = efx_port_dummy_op_poll,
2252 .fini = efx_port_dummy_op_void,
2255 /**************************************************************************
2259 **************************************************************************/
2261 /* This zeroes out and then fills in the invariants in a struct
2262 * efx_nic (including all sub-structures).
2264 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
2265 struct pci_dev *pci_dev, struct net_device *net_dev)
2269 /* Initialise common structures */
2270 memset(efx, 0, sizeof(*efx));
2271 spin_lock_init(&efx->biu_lock);
2272 #ifdef CONFIG_SFC_MTD
2273 INIT_LIST_HEAD(&efx->mtd_list);
2275 INIT_WORK(&efx->reset_work, efx_reset_work);
2276 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2277 efx->pci_dev = pci_dev;
2278 efx->msg_enable = debug;
2279 efx->state = STATE_INIT;
2280 efx->reset_pending = RESET_TYPE_NONE;
2281 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2283 efx->net_dev = net_dev;
2284 spin_lock_init(&efx->stats_lock);
2285 mutex_init(&efx->mac_lock);
2286 efx->mac_op = type->default_mac_ops;
2287 efx->phy_op = &efx_dummy_phy_operations;
2288 efx->mdio.dev = net_dev;
2289 INIT_WORK(&efx->mac_work, efx_mac_work);
2291 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2292 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2293 if (!efx->channel[i])
2299 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2301 /* Higher numbered interrupt modes are less capable! */
2302 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2305 /* Would be good to use the net_dev name, but we're too early */
2306 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2308 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2309 if (!efx->workqueue)
2315 efx_fini_struct(efx);
2319 static void efx_fini_struct(struct efx_nic *efx)
2323 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2324 kfree(efx->channel[i]);
2326 if (efx->workqueue) {
2327 destroy_workqueue(efx->workqueue);
2328 efx->workqueue = NULL;
2332 /**************************************************************************
2336 **************************************************************************/
2338 /* Main body of final NIC shutdown code
2339 * This is called only at module unload (or hotplug removal).
2341 static void efx_pci_remove_main(struct efx_nic *efx)
2343 #ifdef CONFIG_RFS_ACCEL
2344 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
2345 efx->net_dev->rx_cpu_rmap = NULL;
2347 efx_nic_fini_interrupt(efx);
2348 efx_fini_channels(efx);
2350 efx->type->fini(efx);
2352 efx_remove_all(efx);
2355 /* Final NIC shutdown
2356 * This is called only at module unload (or hotplug removal).
2358 static void efx_pci_remove(struct pci_dev *pci_dev)
2360 struct efx_nic *efx;
2362 efx = pci_get_drvdata(pci_dev);
2366 /* Mark the NIC as fini, then stop the interface */
2368 efx->state = STATE_FINI;
2369 dev_close(efx->net_dev);
2371 /* Allow any queued efx_resets() to complete */
2374 efx_unregister_netdev(efx);
2376 efx_mtd_remove(efx);
2378 /* Wait for any scheduled resets to complete. No more will be
2379 * scheduled from this point because efx_stop_all() has been
2380 * called, we are no longer registered with driverlink, and
2381 * the net_device's have been removed. */
2382 cancel_work_sync(&efx->reset_work);
2384 efx_pci_remove_main(efx);
2387 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2389 pci_set_drvdata(pci_dev, NULL);
2390 efx_fini_struct(efx);
2391 free_netdev(efx->net_dev);
2394 /* Main body of NIC initialisation
2395 * This is called at module load (or hotplug insertion, theoretically).
2397 static int efx_pci_probe_main(struct efx_nic *efx)
2401 /* Do start-of-day initialisation */
2402 rc = efx_probe_all(efx);
2408 rc = efx->type->init(efx);
2410 netif_err(efx, probe, efx->net_dev,
2411 "failed to initialise NIC\n");
2415 rc = efx_init_port(efx);
2417 netif_err(efx, probe, efx->net_dev,
2418 "failed to initialise port\n");
2422 efx_init_channels(efx);
2424 rc = efx_nic_init_interrupt(efx);
2431 efx_fini_channels(efx);
2434 efx->type->fini(efx);
2437 efx_remove_all(efx);
2442 /* NIC initialisation
2444 * This is called at module load (or hotplug insertion,
2445 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2446 * sets up and registers the network devices with the kernel and hooks
2447 * the interrupt service routine. It does not prepare the device for
2448 * transmission; this is left to the first time one of the network
2449 * interfaces is brought up (i.e. efx_net_open).
2451 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2452 const struct pci_device_id *entry)
2454 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2455 struct net_device *net_dev;
2456 struct efx_nic *efx;
2459 /* Allocate and initialise a struct net_device and struct efx_nic */
2460 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2464 net_dev->features |= (type->offload_features | NETIF_F_SG |
2465 NETIF_F_HIGHDMA | NETIF_F_TSO |
2467 if (type->offload_features & NETIF_F_V6_CSUM)
2468 net_dev->features |= NETIF_F_TSO6;
2469 /* Mask for features that also apply to VLAN devices */
2470 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2471 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2473 /* All offloads can be toggled */
2474 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2475 efx = netdev_priv(net_dev);
2476 pci_set_drvdata(pci_dev, efx);
2477 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2478 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2482 netif_info(efx, probe, efx->net_dev,
2483 "Solarflare Communications NIC detected\n");
2485 /* Set up basic I/O (BAR mappings etc) */
2486 rc = efx_init_io(efx);
2490 /* No serialisation is required with the reset path because
2491 * we're in STATE_INIT. */
2492 for (i = 0; i < 5; i++) {
2493 rc = efx_pci_probe_main(efx);
2495 /* Serialise against efx_reset(). No more resets will be
2496 * scheduled since efx_stop_all() has been called, and we
2497 * have not and never have been registered with either
2498 * the rtnetlink or driverlink layers. */
2499 cancel_work_sync(&efx->reset_work);
2502 if (efx->reset_pending != RESET_TYPE_NONE) {
2503 /* If there was a scheduled reset during
2504 * probe, the NIC is probably hosed anyway */
2505 efx_pci_remove_main(efx);
2512 /* Retry if a recoverably reset event has been scheduled */
2513 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2514 (efx->reset_pending != RESET_TYPE_ALL))
2517 efx->reset_pending = RESET_TYPE_NONE;
2521 netif_err(efx, probe, efx->net_dev, "Could not reset NIC\n");
2525 /* Switch to the running state before we expose the device to the OS,
2526 * so that dev_open()|efx_start_all() will actually start the device */
2527 efx->state = STATE_RUNNING;
2529 rc = efx_register_netdev(efx);
2533 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2536 efx_mtd_probe(efx); /* allowed to fail */
2541 efx_pci_remove_main(efx);
2546 efx_fini_struct(efx);
2549 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2550 free_netdev(net_dev);
2554 static int efx_pm_freeze(struct device *dev)
2556 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2558 efx->state = STATE_FINI;
2560 netif_device_detach(efx->net_dev);
2563 efx_fini_channels(efx);
2568 static int efx_pm_thaw(struct device *dev)
2570 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2572 efx->state = STATE_INIT;
2574 efx_init_channels(efx);
2576 mutex_lock(&efx->mac_lock);
2577 efx->phy_op->reconfigure(efx);
2578 mutex_unlock(&efx->mac_lock);
2582 netif_device_attach(efx->net_dev);
2584 efx->state = STATE_RUNNING;
2586 efx->type->resume_wol(efx);
2588 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2589 queue_work(reset_workqueue, &efx->reset_work);
2594 static int efx_pm_poweroff(struct device *dev)
2596 struct pci_dev *pci_dev = to_pci_dev(dev);
2597 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2599 efx->type->fini(efx);
2601 efx->reset_pending = RESET_TYPE_NONE;
2603 pci_save_state(pci_dev);
2604 return pci_set_power_state(pci_dev, PCI_D3hot);
2607 /* Used for both resume and restore */
2608 static int efx_pm_resume(struct device *dev)
2610 struct pci_dev *pci_dev = to_pci_dev(dev);
2611 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2614 rc = pci_set_power_state(pci_dev, PCI_D0);
2617 pci_restore_state(pci_dev);
2618 rc = pci_enable_device(pci_dev);
2621 pci_set_master(efx->pci_dev);
2622 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2625 rc = efx->type->init(efx);
2632 static int efx_pm_suspend(struct device *dev)
2637 rc = efx_pm_poweroff(dev);
2643 static struct dev_pm_ops efx_pm_ops = {
2644 .suspend = efx_pm_suspend,
2645 .resume = efx_pm_resume,
2646 .freeze = efx_pm_freeze,
2647 .thaw = efx_pm_thaw,
2648 .poweroff = efx_pm_poweroff,
2649 .restore = efx_pm_resume,
2652 static struct pci_driver efx_pci_driver = {
2653 .name = KBUILD_MODNAME,
2654 .id_table = efx_pci_table,
2655 .probe = efx_pci_probe,
2656 .remove = efx_pci_remove,
2657 .driver.pm = &efx_pm_ops,
2660 /**************************************************************************
2662 * Kernel module interface
2664 *************************************************************************/
2666 module_param(interrupt_mode, uint, 0444);
2667 MODULE_PARM_DESC(interrupt_mode,
2668 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2670 static int __init efx_init_module(void)
2674 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2676 rc = register_netdevice_notifier(&efx_netdev_notifier);
2680 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2681 if (!reset_workqueue) {
2686 rc = pci_register_driver(&efx_pci_driver);
2693 destroy_workqueue(reset_workqueue);
2695 unregister_netdevice_notifier(&efx_netdev_notifier);
2700 static void __exit efx_exit_module(void)
2702 printk(KERN_INFO "Solarflare NET driver unloading\n");
2704 pci_unregister_driver(&efx_pci_driver);
2705 destroy_workqueue(reset_workqueue);
2706 unregister_netdevice_notifier(&efx_netdev_notifier);
2710 module_init(efx_init_module);
2711 module_exit(efx_exit_module);
2713 MODULE_AUTHOR("Solarflare Communications and "
2714 "Michael Brown <mbrown@fensystems.co.uk>");
2715 MODULE_DESCRIPTION("Solarflare Communications network driver");
2716 MODULE_LICENSE("GPL");
2717 MODULE_DEVICE_TABLE(pci, efx_pci_table);