drivers/net/r8169.c

   1 /*
   2 =========================================================================
   3  r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
   4  --------------------------------------------------------------------
   5
   6  History:
   7  Feb  4 2002    - created initially by ShuChen <shuchen@realtek.com.tw>.
   8  May 20 2002    - Add link status force-mode and TBI mode support.
   9         2004    - Massive updates. See kernel SCM system for details.
  10 =========================================================================
  11   1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
  12          Command: 'insmod r8169 media = SET_MEDIA'
  13          Ex:      'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
  14
  15          SET_MEDIA can be:
  16                 _10_Half        = 0x01
  17                 _10_Full        = 0x02
  18                 _100_Half       = 0x04
  19                 _100_Full       = 0x08
  20                 _1000_Full      = 0x10
  21
  22   2. Support TBI mode.
  23 =========================================================================
  24 VERSION 1.1     <2002/10/4>
  25
  26         The bit4:0 of MII register 4 is called "selector field", and have to be
  27         00001b to indicate support of IEEE std 802.3 during NWay process of
  28         exchanging Link Code Word (FLP).
  29
  30 VERSION 1.2     <2002/11/30>
  31
  32         - Large style cleanup
  33         - Use ether_crc in stock kernel (linux/crc32.h)
  34         - Copy mc_filter setup code from 8139cp
  35           (includes an optimization, and avoids set_bit use)
  36
  37 VERSION 1.6LK   <2004/04/14>
  38
  39         - Merge of Realtek's version 1.6
  40         - Conversion to DMA API
  41         - Suspend/resume
  42         - Endianness
  43         - Misc Rx/Tx bugs
  44
  45 VERSION 2.2LK   <2005/01/25>
  46
  47         - RX csum, TX csum/SG, TSO
  48         - VLAN
  49         - baby (< 7200) Jumbo frames support
  50         - Merge of Realtek's version 2.2 (new phy)
  51  */
  52
  53 #include <linux/module.h>
  54 #include <linux/moduleparam.h>
  55 #include <linux/pci.h>
  56 #include <linux/netdevice.h>
  57 #include <linux/etherdevice.h>
  58 #include <linux/delay.h>
  59 #include <linux/ethtool.h>
  60 #include <linux/mii.h>
  61 #include <linux/if_vlan.h>
  62 #include <linux/crc32.h>
  63 #include <linux/in.h>
  64 #include <linux/ip.h>
  65 #include <linux/tcp.h>
  66 #include <linux/init.h>
  67 #include <linux/dma-mapping.h>
  68
  69 #include <asm/io.h>
  70 #include <asm/irq.h>
  71
  72 #ifdef CONFIG_R8169_NAPI
  73 #define NAPI_SUFFIX     "-NAPI"
  74 #else
  75 #define NAPI_SUFFIX     ""
  76 #endif
  77
  78 #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
  79 #define MODULENAME "r8169"
  80 #define PFX MODULENAME ": "
  81
  82 #ifdef RTL8169_DEBUG
  83 #define assert(expr) \
  84         if (!(expr)) {                                  \
  85                 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
  86                 #expr,__FILE__,__FUNCTION__,__LINE__);          \
  87         }
  88 #define dprintk(fmt, args...)   do { printk(PFX fmt, ## args); } while (0)
  89 #else
  90 #define assert(expr) do {} while (0)
  91 #define dprintk(fmt, args...)   do {} while (0)
  92 #endif /* RTL8169_DEBUG */
  93
  94 #define R8169_MSG_DEFAULT \
  95         (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
  96
  97 #define TX_BUFFS_AVAIL(tp) \
  98         (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
  99
 100 #ifdef CONFIG_R8169_NAPI
 101 #define rtl8169_rx_skb                  netif_receive_skb
 102 #define rtl8169_rx_hwaccel_skb          vlan_hwaccel_receive_skb
 103 #define rtl8169_rx_quota(count, quota)  min(count, quota)
 104 #else
 105 #define rtl8169_rx_skb                  netif_rx
 106 #define rtl8169_rx_hwaccel_skb          vlan_hwaccel_rx
 107 #define rtl8169_rx_quota(count, quota)  count
 108 #endif
 109
 110 /* media options */
 111 #define MAX_UNITS 8
 112 static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
 113 static int num_media = 0;
 114
 115 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
 116 static const int max_interrupt_work = 20;
 117
 118 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
 119    The RTL chips use a 64 element hash table based on the Ethernet CRC. */
 120 static const int multicast_filter_limit = 32;
 121
 122 /* MAC address length */
 123 #define MAC_ADDR_LEN    6
 124
 125 #define RX_FIFO_THRESH  7       /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
 126 #define RX_DMA_BURST    6       /* Maximum PCI burst, '6' is 1024 */
 127 #define TX_DMA_BURST    6       /* Maximum PCI burst, '6' is 1024 */
 128 #define EarlyTxThld     0x3F    /* 0x3F means NO early transmit */
 129 #define RxPacketMaxSize 0x3FE8  /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
 130 #define SafeMtu         0x1c20  /* ... actually life sucks beyond ~7k */
 131 #define InterFrameGap   0x03    /* 3 means InterFrameGap = the shortest one */
 132
 133 #define R8169_REGS_SIZE         256
 134 #define R8169_NAPI_WEIGHT       64
 135 #define NUM_TX_DESC     64      /* Number of Tx descriptor registers */
 136 #define NUM_RX_DESC     256     /* Number of Rx descriptor registers */
 137 #define RX_BUF_SIZE     1536    /* Rx Buffer size */
 138 #define R8169_TX_RING_BYTES     (NUM_TX_DESC * sizeof(struct TxDesc))
 139 #define R8169_RX_RING_BYTES     (NUM_RX_DESC * sizeof(struct RxDesc))
 140
 141 #define RTL8169_TX_TIMEOUT      (6*HZ)
 142 #define RTL8169_PHY_TIMEOUT     (10*HZ)
 143
 144 /* write/read MMIO register */
 145 #define RTL_W8(reg, val8)       writeb ((val8), ioaddr + (reg))
 146 #define RTL_W16(reg, val16)     writew ((val16), ioaddr + (reg))
 147 #define RTL_W32(reg, val32)     writel ((val32), ioaddr + (reg))
 148 #define RTL_R8(reg)             readb (ioaddr + (reg))
 149 #define RTL_R16(reg)            readw (ioaddr + (reg))
 150 #define RTL_R32(reg)            ((unsigned long) readl (ioaddr + (reg)))
 151
 152 enum mac_version {
 153         RTL_GIGA_MAC_VER_01 = 0x00,
 154         RTL_GIGA_MAC_VER_02 = 0x01,
 155         RTL_GIGA_MAC_VER_03 = 0x02,
 156         RTL_GIGA_MAC_VER_04 = 0x03,
 157         RTL_GIGA_MAC_VER_05 = 0x04,
 158         RTL_GIGA_MAC_VER_11 = 0x0b,
 159         RTL_GIGA_MAC_VER_12 = 0x0c,
 160         RTL_GIGA_MAC_VER_13 = 0x0d,
 161         RTL_GIGA_MAC_VER_14 = 0x0e,
 162         RTL_GIGA_MAC_VER_15 = 0x0f
 163 };
 164
 165 enum phy_version {
 166         RTL_GIGA_PHY_VER_C = 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
 167         RTL_GIGA_PHY_VER_D = 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
 168         RTL_GIGA_PHY_VER_E = 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
 169         RTL_GIGA_PHY_VER_F = 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
 170         RTL_GIGA_PHY_VER_G = 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
 171         RTL_GIGA_PHY_VER_H = 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
 172 };
 173
 174 #define _R(NAME,MAC,MASK) \
 175         { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
 176
 177 static const struct {
 178         const char *name;
 179         u8 mac_version;
 180         u32 RxConfigMask;       /* Clears the bits supported by this chip */
 181 } rtl_chip_info[] = {
 182         _R("RTL8169",           RTL_GIGA_MAC_VER_01, 0xff7e1880),
 183         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_02, 0xff7e1880),
 184         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_03, 0xff7e1880),
 185         _R("RTL8169sb/8110sb",  RTL_GIGA_MAC_VER_04, 0xff7e1880),
 186         _R("RTL8169sc/8110sc",  RTL_GIGA_MAC_VER_05, 0xff7e1880),
 187         _R("RTL8168b/8111b",    RTL_GIGA_MAC_VER_11, 0xff7e1880), // PCI-E
 188         _R("RTL8168b/8111b",    RTL_GIGA_MAC_VER_12, 0xff7e1880), // PCI-E
 189         _R("RTL8101e",          RTL_GIGA_MAC_VER_13, 0xff7e1880), // PCI-E 8139
 190         _R("RTL8100e",          RTL_GIGA_MAC_VER_14, 0xff7e1880), // PCI-E 8139
 191         _R("RTL8100e",          RTL_GIGA_MAC_VER_15, 0xff7e1880)  // PCI-E 8139
 192 };
 193 #undef _R
 194
 195 enum cfg_version {
 196         RTL_CFG_0 = 0x00,
 197         RTL_CFG_1,
 198         RTL_CFG_2
 199 };
 200
 201 static const struct {
 202         unsigned int region;
 203         unsigned int align;
 204 } rtl_cfg_info[] = {
 205         [RTL_CFG_0] = { 1, NET_IP_ALIGN },
 206         [RTL_CFG_1] = { 2, NET_IP_ALIGN },
 207         [RTL_CFG_2] = { 2, 8 }
 208 };
 209
 210 static struct pci_device_id rtl8169_pci_tbl[] = {
 211         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8129), 0, 0, RTL_CFG_0 },
 212         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8136), 0, 0, RTL_CFG_2 },
 213         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8167), 0, 0, RTL_CFG_1 },
 214         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8168), 0, 0, RTL_CFG_2 },
 215         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8169), 0, 0, RTL_CFG_0 },
 216         { PCI_DEVICE(PCI_VENDOR_ID_DLINK,       0x4300), 0, 0, RTL_CFG_0 },
 217         { PCI_DEVICE(0x16ec,                    0x0116), 0, 0, RTL_CFG_0 },
 218         { PCI_VENDOR_ID_LINKSYS,                0x1032,
 219                 PCI_ANY_ID, 0x0024, 0, 0, RTL_CFG_0 },
 220         {0,},
 221 };
 222
 223 MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
 224
 225 static int rx_copybreak = 200;
 226 static int use_dac;
 227 static struct {
 228         u32 msg_enable;
 229 } debug = { -1 };
 230
 231 enum RTL8169_registers {
 232         MAC0 = 0,               /* Ethernet hardware address. */
 233         MAR0 = 8,               /* Multicast filter. */
 234         CounterAddrLow = 0x10,
 235         CounterAddrHigh = 0x14,
 236         TxDescStartAddrLow = 0x20,
 237         TxDescStartAddrHigh = 0x24,
 238         TxHDescStartAddrLow = 0x28,
 239         TxHDescStartAddrHigh = 0x2c,
 240         FLASH = 0x30,
 241         ERSR = 0x36,
 242         ChipCmd = 0x37,
 243         TxPoll = 0x38,
 244         IntrMask = 0x3C,
 245         IntrStatus = 0x3E,
 246         TxConfig = 0x40,
 247         RxConfig = 0x44,
 248         RxMissed = 0x4C,
 249         Cfg9346 = 0x50,
 250         Config0 = 0x51,
 251         Config1 = 0x52,
 252         Config2 = 0x53,
 253         Config3 = 0x54,
 254         Config4 = 0x55,
 255         Config5 = 0x56,
 256         MultiIntr = 0x5C,
 257         PHYAR = 0x60,
 258         TBICSR = 0x64,
 259         TBI_ANAR = 0x68,
 260         TBI_LPAR = 0x6A,
 261         PHYstatus = 0x6C,
 262         RxMaxSize = 0xDA,
 263         CPlusCmd = 0xE0,
 264         IntrMitigate = 0xE2,
 265         RxDescAddrLow = 0xE4,
 266         RxDescAddrHigh = 0xE8,
 267         EarlyTxThres = 0xEC,
 268         FuncEvent = 0xF0,
 269         FuncEventMask = 0xF4,
 270         FuncPresetState = 0xF8,
 271         FuncForceEvent = 0xFC,
 272 };
 273
 274 enum RTL8169_register_content {
 275         /* InterruptStatusBits */
 276         SYSErr = 0x8000,
 277         PCSTimeout = 0x4000,
 278         SWInt = 0x0100,
 279         TxDescUnavail = 0x80,
 280         RxFIFOOver = 0x40,
 281         LinkChg = 0x20,
 282         RxOverflow = 0x10,
 283         TxErr = 0x08,
 284         TxOK = 0x04,
 285         RxErr = 0x02,
 286         RxOK = 0x01,
 287
 288         /* RxStatusDesc */
 289         RxFOVF  = (1 << 23),
 290         RxRWT   = (1 << 22),
 291         RxRES   = (1 << 21),
 292         RxRUNT  = (1 << 20),
 293         RxCRC   = (1 << 19),
 294
 295         /* ChipCmdBits */
 296         CmdReset = 0x10,
 297         CmdRxEnb = 0x08,
 298         CmdTxEnb = 0x04,
 299         RxBufEmpty = 0x01,
 300
 301         /* Cfg9346Bits */
 302         Cfg9346_Lock = 0x00,
 303         Cfg9346_Unlock = 0xC0,
 304
 305         /* rx_mode_bits */
 306         AcceptErr = 0x20,
 307         AcceptRunt = 0x10,
 308         AcceptBroadcast = 0x08,
 309         AcceptMulticast = 0x04,
 310         AcceptMyPhys = 0x02,
 311         AcceptAllPhys = 0x01,
 312
 313         /* RxConfigBits */
 314         RxCfgFIFOShift = 13,
 315         RxCfgDMAShift = 8,
 316
 317         /* TxConfigBits */
 318         TxInterFrameGapShift = 24,
 319         TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
 320
 321         /* Config1 register p.24 */
 322         PMEnable        = (1 << 0),     /* Power Management Enable */
 323
 324         /* Config3 register p.25 */
 325         MagicPacket     = (1 << 5),     /* Wake up when receives a Magic Packet */
 326         LinkUp          = (1 << 4),     /* Wake up when the cable connection is re-established */
 327
 328         /* Config5 register p.27 */
 329         BWF             = (1 << 6),     /* Accept Broadcast wakeup frame */
 330         MWF             = (1 << 5),     /* Accept Multicast wakeup frame */
 331         UWF             = (1 << 4),     /* Accept Unicast wakeup frame */
 332         LanWake         = (1 << 1),     /* LanWake enable/disable */
 333         PMEStatus       = (1 << 0),     /* PME status can be reset by PCI RST# */
 334
 335         /* TBICSR p.28 */
 336         TBIReset        = 0x80000000,
 337         TBILoopback     = 0x40000000,
 338         TBINwEnable     = 0x20000000,
 339         TBINwRestart    = 0x10000000,
 340         TBILinkOk       = 0x02000000,
 341         TBINwComplete   = 0x01000000,
 342
 343         /* CPlusCmd p.31 */
 344         RxVlan          = (1 << 6),
 345         RxChkSum        = (1 << 5),
 346         PCIDAC          = (1 << 4),
 347         PCIMulRW        = (1 << 3),
 348
 349         /* rtl8169_PHYstatus */
 350         TBI_Enable = 0x80,
 351         TxFlowCtrl = 0x40,
 352         RxFlowCtrl = 0x20,
 353         _1000bpsF = 0x10,
 354         _100bps = 0x08,
 355         _10bps = 0x04,
 356         LinkStatus = 0x02,
 357         FullDup = 0x01,
 358
 359         /* _MediaType */
 360         _10_Half = 0x01,
 361         _10_Full = 0x02,
 362         _100_Half = 0x04,
 363         _100_Full = 0x08,
 364         _1000_Full = 0x10,
 365
 366         /* _TBICSRBit */
 367         TBILinkOK = 0x02000000,
 368
 369         /* DumpCounterCommand */
 370         CounterDump = 0x8,
 371 };
 372
 373 enum _DescStatusBit {
 374         DescOwn         = (1 << 31), /* Descriptor is owned by NIC */
 375         RingEnd         = (1 << 30), /* End of descriptor ring */
 376         FirstFrag       = (1 << 29), /* First segment of a packet */
 377         LastFrag        = (1 << 28), /* Final segment of a packet */
 378
 379         /* Tx private */
 380         LargeSend       = (1 << 27), /* TCP Large Send Offload (TSO) */
 381         MSSShift        = 16,        /* MSS value position */
 382         MSSMask         = 0xfff,     /* MSS value + LargeSend bit: 12 bits */
 383         IPCS            = (1 << 18), /* Calculate IP checksum */
 384         UDPCS           = (1 << 17), /* Calculate UDP/IP checksum */
 385         TCPCS           = (1 << 16), /* Calculate TCP/IP checksum */
 386         TxVlanTag       = (1 << 17), /* Add VLAN tag */
 387
 388         /* Rx private */
 389         PID1            = (1 << 18), /* Protocol ID bit 1/2 */
 390         PID0            = (1 << 17), /* Protocol ID bit 2/2 */
 391
 392 #define RxProtoUDP      (PID1)
 393 #define RxProtoTCP      (PID0)
 394 #define RxProtoIP       (PID1 | PID0)
 395 #define RxProtoMask     RxProtoIP
 396
 397         IPFail          = (1 << 16), /* IP checksum failed */
 398         UDPFail         = (1 << 15), /* UDP/IP checksum failed */
 399         TCPFail         = (1 << 14), /* TCP/IP checksum failed */
 400         RxVlanTag       = (1 << 16), /* VLAN tag available */
 401 };
 402
 403 #define RsvdMask        0x3fffc000
 404
 405 struct TxDesc {
 406         u32 opts1;
 407         u32 opts2;
 408         u64 addr;
 409 };
 410
 411 struct RxDesc {
 412         u32 opts1;
 413         u32 opts2;
 414         u64 addr;
 415 };
 416
 417 struct ring_info {
 418         struct sk_buff  *skb;
 419         u32             len;
 420         u8              __pad[sizeof(void *) - sizeof(u32)];
 421 };
 422
 423 struct rtl8169_private {
 424         void __iomem *mmio_addr;        /* memory map physical address */
 425         struct pci_dev *pci_dev;        /* Index of PCI device */
 426         struct net_device_stats stats;  /* statistics of net device */
 427         spinlock_t lock;                /* spin lock flag */
 428         u32 msg_enable;
 429         int chipset;
 430         int mac_version;
 431         int phy_version;
 432         u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
 433         u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
 434         u32 dirty_rx;
 435         u32 dirty_tx;
 436         struct TxDesc *TxDescArray;     /* 256-aligned Tx descriptor ring */
 437         struct RxDesc *RxDescArray;     /* 256-aligned Rx descriptor ring */
 438         dma_addr_t TxPhyAddr;
 439         dma_addr_t RxPhyAddr;
 440         struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */
 441         struct ring_info tx_skb[NUM_TX_DESC];   /* Tx data buffers */
 442         unsigned align;
 443         unsigned rx_buf_sz;
 444         struct timer_list timer;
 445         u16 cp_cmd;
 446         u16 intr_mask;
 447         int phy_auto_nego_reg;
 448         int phy_1000_ctrl_reg;
 449 #ifdef CONFIG_R8169_VLAN
 450         struct vlan_group *vlgrp;
 451 #endif
 452         int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex);
 453         void (*get_settings)(struct net_device *, struct ethtool_cmd *);
 454         void (*phy_reset_enable)(void __iomem *);
 455         unsigned int (*phy_reset_pending)(void __iomem *);
 456         unsigned int (*link_ok)(void __iomem *);
 457         struct work_struct task;
 458         unsigned wol_enabled : 1;
 459 };
 460
 461 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
 462 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
 463 module_param_array(media, int, &num_media, 0);
 464 MODULE_PARM_DESC(media, "force phy operation. Deprecated by ethtool (8).");
 465 module_param(rx_copybreak, int, 0);
 466 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
 467 module_param(use_dac, int, 0);
 468 MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
 469 module_param_named(debug, debug.msg_enable, int, 0);
 470 MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
 471 MODULE_LICENSE("GPL");
 472 MODULE_VERSION(RTL8169_VERSION);
 473
 474 static int rtl8169_open(struct net_device *dev);
 475 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev);
 476 static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance,
 477                               struct pt_regs *regs);
 478 static int rtl8169_init_ring(struct net_device *dev);
 479 static void rtl8169_hw_start(struct net_device *dev);
 480 static int rtl8169_close(struct net_device *dev);
 481 static void rtl8169_set_rx_mode(struct net_device *dev);
 482 static void rtl8169_tx_timeout(struct net_device *dev);
 483 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev);
 484 static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *,
 485                                 void __iomem *);
 486 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu);
 487 static void rtl8169_down(struct net_device *dev);
 488
 489 #ifdef CONFIG_R8169_NAPI
 490 static int rtl8169_poll(struct net_device *dev, int *budget);
 491 #endif
 492
 493 static const u16 rtl8169_intr_mask =
 494         SYSErr | LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
 495 static const u16 rtl8169_napi_event =
 496         RxOK | RxOverflow | RxFIFOOver | TxOK | TxErr;
 497 static const unsigned int rtl8169_rx_config =
 498         (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
 499
 500 static void mdio_write(void __iomem *ioaddr, int RegAddr, int value)
 501 {
 502         int i;
 503
 504         RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);
 505
 506         for (i = 20; i > 0; i--) {
 507                 /* Check if the RTL8169 has completed writing to the specified MII register */
 508                 if (!(RTL_R32(PHYAR) & 0x80000000))
 509                         break;
 510                 udelay(25);
 511         }
 512 }
 513
 514 static int mdio_read(void __iomem *ioaddr, int RegAddr)
 515 {
 516         int i, value = -1;
 517
 518         RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);
 519
 520         for (i = 20; i > 0; i--) {
 521                 /* Check if the RTL8169 has completed retrieving data from the specified MII register */
 522                 if (RTL_R32(PHYAR) & 0x80000000) {
 523                         value = (int) (RTL_R32(PHYAR) & 0xFFFF);
 524                         break;
 525                 }
 526                 udelay(25);
 527         }
 528         return value;
 529 }
 530
 531 static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
 532 {
 533         RTL_W16(IntrMask, 0x0000);
 534
 535         RTL_W16(IntrStatus, 0xffff);
 536 }
 537
 538 static void rtl8169_asic_down(void __iomem *ioaddr)
 539 {
 540         RTL_W8(ChipCmd, 0x00);
 541         rtl8169_irq_mask_and_ack(ioaddr);
 542         RTL_R16(CPlusCmd);
 543 }
 544
 545 static unsigned int rtl8169_tbi_reset_pending(void __iomem *ioaddr)
 546 {
 547         return RTL_R32(TBICSR) & TBIReset;
 548 }
 549
 550 static unsigned int rtl8169_xmii_reset_pending(void __iomem *ioaddr)
 551 {
 552         return mdio_read(ioaddr, MII_BMCR) & BMCR_RESET;
 553 }
 554
 555 static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr)
 556 {
 557         return RTL_R32(TBICSR) & TBILinkOk;
 558 }
 559
 560 static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr)
 561 {
 562         return RTL_R8(PHYstatus) & LinkStatus;
 563 }
 564
 565 static void rtl8169_tbi_reset_enable(void __iomem *ioaddr)
 566 {
 567         RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
 568 }
 569
 570 static void rtl8169_xmii_reset_enable(void __iomem *ioaddr)
 571 {
 572         unsigned int val;
 573
 574         val = (mdio_read(ioaddr, MII_BMCR) | BMCR_RESET) & 0xffff;
 575         mdio_write(ioaddr, MII_BMCR, val);
 576 }
 577
 578 static void rtl8169_check_link_status(struct net_device *dev,
 579                                       struct rtl8169_private *tp, void __iomem *ioaddr)
 580 {
 581         unsigned long flags;
 582
 583         spin_lock_irqsave(&tp->lock, flags);
 584         if (tp->link_ok(ioaddr)) {
 585                 netif_carrier_on(dev);
 586                 if (netif_msg_ifup(tp))
 587                         printk(KERN_INFO PFX "%s: link up\n", dev->name);
 588         } else {
 589                 if (netif_msg_ifdown(tp))
 590                         printk(KERN_INFO PFX "%s: link down\n", dev->name);
 591                 netif_carrier_off(dev);
 592         }
 593         spin_unlock_irqrestore(&tp->lock, flags);
 594 }
 595
 596 static void rtl8169_link_option(int idx, u8 *autoneg, u16 *speed, u8 *duplex)
 597 {
 598         struct {
 599                 u16 speed;
 600                 u8 duplex;
 601                 u8 autoneg;
 602                 u8 media;
 603         } link_settings[] = {
 604                 { SPEED_10,     DUPLEX_HALF, AUTONEG_DISABLE,   _10_Half },
 605                 { SPEED_10,     DUPLEX_FULL, AUTONEG_DISABLE,   _10_Full },
 606                 { SPEED_100,    DUPLEX_HALF, AUTONEG_DISABLE,   _100_Half },
 607                 { SPEED_100,    DUPLEX_FULL, AUTONEG_DISABLE,   _100_Full },
 608                 { SPEED_1000,   DUPLEX_FULL, AUTONEG_DISABLE,   _1000_Full },
 609                 /* Make TBI happy */
 610                 { SPEED_1000,   DUPLEX_FULL, AUTONEG_ENABLE,    0xff }
 611         }, *p;
 612         unsigned char option;
 613
 614         option = ((idx < MAX_UNITS) && (idx >= 0)) ? media[idx] : 0xff;
 615
 616         if ((option != 0xff) && !idx && netif_msg_drv(&debug))
 617                 printk(KERN_WARNING PFX "media option is deprecated.\n");
 618
 619         for (p = link_settings; p->media != 0xff; p++) {
 620                 if (p->media == option)
 621                         break;
 622         }
 623         *autoneg = p->autoneg;
 624         *speed = p->speed;
 625         *duplex = p->duplex;
 626 }
 627
 628 static void rtl8169_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 629 {
 630         struct rtl8169_private *tp = netdev_priv(dev);
 631         void __iomem *ioaddr = tp->mmio_addr;
 632         u8 options;
 633
 634         wol->wolopts = 0;
 635
 636 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
 637         wol->supported = WAKE_ANY;
 638
 639         spin_lock_irq(&tp->lock);
 640
 641         options = RTL_R8(Config1);
 642         if (!(options & PMEnable))
 643                 goto out_unlock;
 644
 645         options = RTL_R8(Config3);
 646         if (options & LinkUp)
 647                 wol->wolopts |= WAKE_PHY;
 648         if (options & MagicPacket)
 649                 wol->wolopts |= WAKE_MAGIC;
 650
 651         options = RTL_R8(Config5);
 652         if (options & UWF)
 653                 wol->wolopts |= WAKE_UCAST;
 654         if (options & BWF)
 655                 wol->wolopts |= WAKE_BCAST;
 656         if (options & MWF)
 657                 wol->wolopts |= WAKE_MCAST;
 658
 659 out_unlock:
 660         spin_unlock_irq(&tp->lock);
 661 }
 662
 663 static int rtl8169_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 664 {
 665         struct rtl8169_private *tp = netdev_priv(dev);
 666         void __iomem *ioaddr = tp->mmio_addr;
 667         int i;
 668         static struct {
 669                 u32 opt;
 670                 u16 reg;
 671                 u8  mask;
 672         } cfg[] = {
 673                 { WAKE_ANY,   Config1, PMEnable },
 674                 { WAKE_PHY,   Config3, LinkUp },
 675                 { WAKE_MAGIC, Config3, MagicPacket },
 676                 { WAKE_UCAST, Config5, UWF },
 677                 { WAKE_BCAST, Config5, BWF },
 678                 { WAKE_MCAST, Config5, MWF },
 679                 { WAKE_ANY,   Config5, LanWake }
 680         };
 681
 682         spin_lock_irq(&tp->lock);
 683
 684         RTL_W8(Cfg9346, Cfg9346_Unlock);
 685
 686         for (i = 0; i < ARRAY_SIZE(cfg); i++) {
 687                 u8 options = RTL_R8(cfg[i].reg) & ~cfg[i].mask;
 688                 if (wol->wolopts & cfg[i].opt)
 689                         options |= cfg[i].mask;
 690                 RTL_W8(cfg[i].reg, options);
 691         }
 692
 693         RTL_W8(Cfg9346, Cfg9346_Lock);
 694
 695         tp->wol_enabled = (wol->wolopts) ? 1 : 0;
 696
 697         spin_unlock_irq(&tp->lock);
 698
 699         return 0;
 700 }
 701
 702 static void rtl8169_get_drvinfo(struct net_device *dev,
 703                                 struct ethtool_drvinfo *info)
 704 {
 705         struct rtl8169_private *tp = netdev_priv(dev);
 706
 707         strcpy(info->driver, MODULENAME);
 708         strcpy(info->version, RTL8169_VERSION);
 709         strcpy(info->bus_info, pci_name(tp->pci_dev));
 710 }
 711
 712 static int rtl8169_get_regs_len(struct net_device *dev)
 713 {
 714         return R8169_REGS_SIZE;
 715 }
 716
 717 static int rtl8169_set_speed_tbi(struct net_device *dev,
 718                                  u8 autoneg, u16 speed, u8 duplex)
 719 {
 720         struct rtl8169_private *tp = netdev_priv(dev);
 721         void __iomem *ioaddr = tp->mmio_addr;
 722         int ret = 0;
 723         u32 reg;
 724
 725         reg = RTL_R32(TBICSR);
 726         if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
 727             (duplex == DUPLEX_FULL)) {
 728                 RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
 729         } else if (autoneg == AUTONEG_ENABLE)
 730                 RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
 731         else {
 732                 if (netif_msg_link(tp)) {
 733                         printk(KERN_WARNING "%s: "
 734                                "incorrect speed setting refused in TBI mode\n",
 735                                dev->name);
 736                 }
 737                 ret = -EOPNOTSUPP;
 738         }
 739
 740         return ret;
 741 }
 742
 743 static int rtl8169_set_speed_xmii(struct net_device *dev,
 744                                   u8 autoneg, u16 speed, u8 duplex)
 745 {
 746         struct rtl8169_private *tp = netdev_priv(dev);
 747         void __iomem *ioaddr = tp->mmio_addr;
 748         int auto_nego, giga_ctrl;
 749
 750         auto_nego = mdio_read(ioaddr, MII_ADVERTISE);
 751         auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
 752                        ADVERTISE_100HALF | ADVERTISE_100FULL);
 753         giga_ctrl = mdio_read(ioaddr, MII_CTRL1000);
 754         giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 755
 756         if (autoneg == AUTONEG_ENABLE) {
 757                 auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL |
 758                               ADVERTISE_100HALF | ADVERTISE_100FULL);
 759                 giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
 760         } else {
 761                 if (speed == SPEED_10)
 762                         auto_nego |= ADVERTISE_10HALF | ADVERTISE_10FULL;
 763                 else if (speed == SPEED_100)
 764                         auto_nego |= ADVERTISE_100HALF | ADVERTISE_100FULL;
 765                 else if (speed == SPEED_1000)
 766                         giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
 767
 768                 if (duplex == DUPLEX_HALF)
 769                         auto_nego &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL);
 770
 771                 if (duplex == DUPLEX_FULL)
 772                         auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF);
 773
 774                 /* This tweak comes straight from Realtek's driver. */
 775                 if ((speed == SPEED_100) && (duplex == DUPLEX_HALF) &&
 776                     (tp->mac_version == RTL_GIGA_MAC_VER_13)) {
 777                         auto_nego = ADVERTISE_100HALF | ADVERTISE_CSMA;
 778                 }
 779         }
 780
 781         /* The 8100e/8101e do Fast Ethernet only. */
 782         if ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
 783             (tp->mac_version == RTL_GIGA_MAC_VER_14) ||
 784             (tp->mac_version == RTL_GIGA_MAC_VER_15)) {
 785                 if ((giga_ctrl & (ADVERTISE_1000FULL | ADVERTISE_1000HALF)) &&
 786                     netif_msg_link(tp)) {
 787                         printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n",
 788                                dev->name);
 789                 }
 790                 giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 791         }
 792
 793         auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
 794
 795         tp->phy_auto_nego_reg = auto_nego;
 796         tp->phy_1000_ctrl_reg = giga_ctrl;
 797
 798         mdio_write(ioaddr, MII_ADVERTISE, auto_nego);
 799         mdio_write(ioaddr, MII_CTRL1000, giga_ctrl);
 800         mdio_write(ioaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
 801         return 0;
 802 }
 803
 804 static int rtl8169_set_speed(struct net_device *dev,
 805                              u8 autoneg, u16 speed, u8 duplex)
 806 {
 807         struct rtl8169_private *tp = netdev_priv(dev);
 808         int ret;
 809
 810         ret = tp->set_speed(dev, autoneg, speed, duplex);
 811
 812         if (netif_running(dev) && (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL))
 813                 mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
 814
 815         return ret;
 816 }
 817
 818 static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 819 {
 820         struct rtl8169_private *tp = netdev_priv(dev);
 821         unsigned long flags;
 822         int ret;
 823
 824         spin_lock_irqsave(&tp->lock, flags);
 825         ret = rtl8169_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex);
 826         spin_unlock_irqrestore(&tp->lock, flags);
 827
 828         return ret;
 829 }
 830
 831 static u32 rtl8169_get_rx_csum(struct net_device *dev)
 832 {
 833         struct rtl8169_private *tp = netdev_priv(dev);
 834
 835         return tp->cp_cmd & RxChkSum;
 836 }
 837
 838 static int rtl8169_set_rx_csum(struct net_device *dev, u32 data)
 839 {
 840         struct rtl8169_private *tp = netdev_priv(dev);
 841         void __iomem *ioaddr = tp->mmio_addr;
 842         unsigned long flags;
 843
 844         spin_lock_irqsave(&tp->lock, flags);
 845
 846         if (data)
 847                 tp->cp_cmd |= RxChkSum;
 848         else
 849                 tp->cp_cmd &= ~RxChkSum;
 850
 851         RTL_W16(CPlusCmd, tp->cp_cmd);
 852         RTL_R16(CPlusCmd);
 853
 854         spin_unlock_irqrestore(&tp->lock, flags);
 855
 856         return 0;
 857 }
 858
 859 #ifdef CONFIG_R8169_VLAN
 860
 861 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
 862                                       struct sk_buff *skb)
 863 {
 864         return (tp->vlgrp && vlan_tx_tag_present(skb)) ?
 865                 TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
 866 }
 867
 868 static void rtl8169_vlan_rx_register(struct net_device *dev,
 869                                      struct vlan_group *grp)
 870 {
 871         struct rtl8169_private *tp = netdev_priv(dev);
 872         void __iomem *ioaddr = tp->mmio_addr;
 873         unsigned long flags;
 874
 875         spin_lock_irqsave(&tp->lock, flags);
 876         tp->vlgrp = grp;
 877         if (tp->vlgrp)
 878                 tp->cp_cmd |= RxVlan;
 879         else
 880                 tp->cp_cmd &= ~RxVlan;
 881         RTL_W16(CPlusCmd, tp->cp_cmd);
 882         RTL_R16(CPlusCmd);
 883         spin_unlock_irqrestore(&tp->lock, flags);
 884 }
 885
 886 static void rtl8169_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
 887 {
 888         struct rtl8169_private *tp = netdev_priv(dev);
 889         unsigned long flags;
 890
 891         spin_lock_irqsave(&tp->lock, flags);
 892         if (tp->vlgrp)
 893                 tp->vlgrp->vlan_devices[vid] = NULL;
 894         spin_unlock_irqrestore(&tp->lock, flags);
 895 }
 896
 897 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
 898                                struct sk_buff *skb)
 899 {
 900         u32 opts2 = le32_to_cpu(desc->opts2);
 901         int ret;
 902
 903         if (tp->vlgrp && (opts2 & RxVlanTag)) {
 904                 rtl8169_rx_hwaccel_skb(skb, tp->vlgrp,
 905                                        swab16(opts2 & 0xffff));
 906                 ret = 0;
 907         } else
 908                 ret = -1;
 909         desc->opts2 = 0;
 910         return ret;
 911 }
 912
 913 #else /* !CONFIG_R8169_VLAN */
 914
 915 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
 916                                       struct sk_buff *skb)
 917 {
 918         return 0;
 919 }
 920
 921 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
 922                                struct sk_buff *skb)
 923 {
 924         return -1;
 925 }
 926
 927 #endif
 928
 929 static void rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
 930 {
 931         struct rtl8169_private *tp = netdev_priv(dev);
 932         void __iomem *ioaddr = tp->mmio_addr;
 933         u32 status;
 934
 935         cmd->supported =
 936                 SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
 937         cmd->port = PORT_FIBRE;
 938         cmd->transceiver = XCVR_INTERNAL;
 939
 940         status = RTL_R32(TBICSR);
 941         cmd->advertising = (status & TBINwEnable) ?  ADVERTISED_Autoneg : 0;
 942         cmd->autoneg = !!(status & TBINwEnable);
 943
 944         cmd->speed = SPEED_1000;
 945         cmd->duplex = DUPLEX_FULL; /* Always set */
 946 }
 947
 948 static void rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
 949 {
 950         struct rtl8169_private *tp = netdev_priv(dev);
 951         void __iomem *ioaddr = tp->mmio_addr;
 952         u8 status;
 953
 954         cmd->supported = SUPPORTED_10baseT_Half |
 955                          SUPPORTED_10baseT_Full |
 956                          SUPPORTED_100baseT_Half |
 957                          SUPPORTED_100baseT_Full |
 958                          SUPPORTED_1000baseT_Full |
 959                          SUPPORTED_Autoneg |
 960                          SUPPORTED_TP;
 961
 962         cmd->autoneg = 1;
 963         cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
 964
 965         if (tp->phy_auto_nego_reg & ADVERTISE_10HALF)
 966                 cmd->advertising |= ADVERTISED_10baseT_Half;
 967         if (tp->phy_auto_nego_reg & ADVERTISE_10FULL)
 968                 cmd->advertising |= ADVERTISED_10baseT_Full;
 969         if (tp->phy_auto_nego_reg & ADVERTISE_100HALF)
 970                 cmd->advertising |= ADVERTISED_100baseT_Half;
 971         if (tp->phy_auto_nego_reg & ADVERTISE_100FULL)
 972                 cmd->advertising |= ADVERTISED_100baseT_Full;
 973         if (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL)
 974                 cmd->advertising |= ADVERTISED_1000baseT_Full;
 975
 976         status = RTL_R8(PHYstatus);
 977
 978         if (status & _1000bpsF)
 979                 cmd->speed = SPEED_1000;
 980         else if (status & _100bps)
 981                 cmd->speed = SPEED_100;
 982         else if (status & _10bps)
 983                 cmd->speed = SPEED_10;
 984
 985         if (status & TxFlowCtrl)
 986                 cmd->advertising |= ADVERTISED_Asym_Pause;
 987         if (status & RxFlowCtrl)
 988                 cmd->advertising |= ADVERTISED_Pause;
 989
 990         cmd->duplex = ((status & _1000bpsF) || (status & FullDup)) ?
 991                       DUPLEX_FULL : DUPLEX_HALF;
 992 }
 993
 994 static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 995 {
 996         struct rtl8169_private *tp = netdev_priv(dev);
 997         unsigned long flags;
 998
 999         spin_lock_irqsave(&tp->lock, flags);
1000
1001         tp->get_settings(dev, cmd);
1002
1003         spin_unlock_irqrestore(&tp->lock, flags);
1004         return 0;
1005 }
1006
1007 static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1008                              void *p)
1009 {
1010         struct rtl8169_private *tp = netdev_priv(dev);
1011         unsigned long flags;
1012
1013         if (regs->len > R8169_REGS_SIZE)
1014                 regs->len = R8169_REGS_SIZE;
1015
1016         spin_lock_irqsave(&tp->lock, flags);
1017         memcpy_fromio(p, tp->mmio_addr, regs->len);
1018         spin_unlock_irqrestore(&tp->lock, flags);
1019 }
1020
1021 static u32 rtl8169_get_msglevel(struct net_device *dev)
1022 {
1023         struct rtl8169_private *tp = netdev_priv(dev);
1024
1025         return tp->msg_enable;
1026 }
1027
1028 static void rtl8169_set_msglevel(struct net_device *dev, u32 value)
1029 {
1030         struct rtl8169_private *tp = netdev_priv(dev);
1031
1032         tp->msg_enable = value;
1033 }
1034
1035 static const char rtl8169_gstrings[][ETH_GSTRING_LEN] = {
1036         "tx_packets",
1037         "rx_packets",
1038         "tx_errors",
1039         "rx_errors",
1040         "rx_missed",
1041         "align_errors",
1042         "tx_single_collisions",
1043         "tx_multi_collisions",
1044         "unicast",
1045         "broadcast",
1046         "multicast",
1047         "tx_aborted",
1048         "tx_underrun",
1049 };
1050
1051 struct rtl8169_counters {
1052         u64     tx_packets;
1053         u64     rx_packets;
1054         u64     tx_errors;
1055         u32     rx_errors;
1056         u16     rx_missed;
1057         u16     align_errors;
1058         u32     tx_one_collision;
1059         u32     tx_multi_collision;
1060         u64     rx_unicast;
1061         u64     rx_broadcast;
1062         u32     rx_multicast;
1063         u16     tx_aborted;
1064         u16     tx_underun;
1065 };
1066
1067 static int rtl8169_get_stats_count(struct net_device *dev)
1068 {
1069         return ARRAY_SIZE(rtl8169_gstrings);
1070 }
1071
1072 static void rtl8169_get_ethtool_stats(struct net_device *dev,
1073                                       struct ethtool_stats *stats, u64 *data)
1074 {
1075         struct rtl8169_private *tp = netdev_priv(dev);
1076         void __iomem *ioaddr = tp->mmio_addr;
1077         struct rtl8169_counters *counters;
1078         dma_addr_t paddr;
1079         u32 cmd;
1080
1081         ASSERT_RTNL();
1082
1083         counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr);
1084         if (!counters)
1085                 return;
1086
1087         RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
1088         cmd = (u64)paddr & DMA_32BIT_MASK;
1089         RTL_W32(CounterAddrLow, cmd);
1090         RTL_W32(CounterAddrLow, cmd | CounterDump);
1091
1092         while (RTL_R32(CounterAddrLow) & CounterDump) {
1093                 if (msleep_interruptible(1))
1094                         break;
1095         }
1096
1097         RTL_W32(CounterAddrLow, 0);
1098         RTL_W32(CounterAddrHigh, 0);
1099
1100         data[0] = le64_to_cpu(counters->tx_packets);
1101         data[1] = le64_to_cpu(counters->rx_packets);
1102         data[2] = le64_to_cpu(counters->tx_errors);
1103         data[3] = le32_to_cpu(counters->rx_errors);
1104         data[4] = le16_to_cpu(counters->rx_missed);
1105         data[5] = le16_to_cpu(counters->align_errors);
1106         data[6] = le32_to_cpu(counters->tx_one_collision);
1107         data[7] = le32_to_cpu(counters->tx_multi_collision);
1108         data[8] = le64_to_cpu(counters->rx_unicast);
1109         data[9] = le64_to_cpu(counters->rx_broadcast);
1110         data[10] = le32_to_cpu(counters->rx_multicast);
1111         data[11] = le16_to_cpu(counters->tx_aborted);
1112         data[12] = le16_to_cpu(counters->tx_underun);
1113
1114         pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr);
1115 }
1116
1117 static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
1118 {
1119         switch(stringset) {
1120         case ETH_SS_STATS:
1121                 memcpy(data, *rtl8169_gstrings, sizeof(rtl8169_gstrings));
1122                 break;
1123         }
1124 }
1125
1126
1127 static struct ethtool_ops rtl8169_ethtool_ops = {
1128         .get_drvinfo            = rtl8169_get_drvinfo,
1129         .get_regs_len           = rtl8169_get_regs_len,
1130         .get_link               = ethtool_op_get_link,
1131         .get_settings           = rtl8169_get_settings,
1132         .set_settings           = rtl8169_set_settings,
1133         .get_msglevel           = rtl8169_get_msglevel,
1134         .set_msglevel           = rtl8169_set_msglevel,
1135         .get_rx_csum            = rtl8169_get_rx_csum,
1136         .set_rx_csum            = rtl8169_set_rx_csum,
1137         .get_tx_csum            = ethtool_op_get_tx_csum,
1138         .set_tx_csum            = ethtool_op_set_tx_csum,
1139         .get_sg                 = ethtool_op_get_sg,
1140         .set_sg                 = ethtool_op_set_sg,
1141         .get_tso                = ethtool_op_get_tso,
1142         .set_tso                = ethtool_op_set_tso,
1143         .get_regs               = rtl8169_get_regs,
1144         .get_wol                = rtl8169_get_wol,
1145         .set_wol                = rtl8169_set_wol,
1146         .get_strings            = rtl8169_get_strings,
1147         .get_stats_count        = rtl8169_get_stats_count,
1148         .get_ethtool_stats      = rtl8169_get_ethtool_stats,
1149         .get_perm_addr          = ethtool_op_get_perm_addr,
1150 };
1151
1152 static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum,
1153                                        int bitval)
1154 {
1155         int val;
1156
1157         val = mdio_read(ioaddr, reg);
1158         val = (bitval == 1) ?
1159                 val | (bitval << bitnum) :  val & ~(0x0001 << bitnum);
1160         mdio_write(ioaddr, reg, val & 0xffff);
1161 }
1162
1163 static void rtl8169_get_mac_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1164 {
1165         const struct {
1166                 u32 mask;
1167                 int mac_version;
1168         } mac_info[] = {
1169                 { 0x38800000,   RTL_GIGA_MAC_VER_15 },
1170                 { 0x38000000,   RTL_GIGA_MAC_VER_12 },
1171                 { 0x34000000,   RTL_GIGA_MAC_VER_13 },
1172                 { 0x30800000,   RTL_GIGA_MAC_VER_14 },
1173                 { 0x30000000,   RTL_GIGA_MAC_VER_11 },
1174                 { 0x18000000,   RTL_GIGA_MAC_VER_05 },
1175                 { 0x10000000,   RTL_GIGA_MAC_VER_04 },
1176                 { 0x04000000,   RTL_GIGA_MAC_VER_03 },
1177                 { 0x00800000,   RTL_GIGA_MAC_VER_02 },
1178                 { 0x00000000,   RTL_GIGA_MAC_VER_01 }   /* Catch-all */
1179         }, *p = mac_info;
1180         u32 reg;
1181
1182         reg = RTL_R32(TxConfig) & 0x7c800000;
1183         while ((reg & p->mask) != p->mask)
1184                 p++;
1185         tp->mac_version = p->mac_version;
1186 }
1187
1188 static void rtl8169_print_mac_version(struct rtl8169_private *tp)
1189 {
1190         dprintk("mac_version = 0x%02x\n", tp->mac_version);
1191 }
1192
1193 static void rtl8169_get_phy_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1194 {
1195         const struct {
1196                 u16 mask;
1197                 u16 set;
1198                 int phy_version;
1199         } phy_info[] = {
1200                 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G },
1201                 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F },
1202                 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E },
1203                 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D } /* Catch-all */
1204         }, *p = phy_info;
1205         u16 reg;
1206
1207         reg = mdio_read(ioaddr, MII_PHYSID2) & 0xffff;
1208         while ((reg & p->mask) != p->set)
1209                 p++;
1210         tp->phy_version = p->phy_version;
1211 }
1212
1213 static void rtl8169_print_phy_version(struct rtl8169_private *tp)
1214 {
1215         struct {
1216                 int version;
1217                 char *msg;
1218                 u32 reg;
1219         } phy_print[] = {
1220                 { RTL_GIGA_PHY_VER_G, "RTL_GIGA_PHY_VER_G", 0x0002 },
1221                 { RTL_GIGA_PHY_VER_F, "RTL_GIGA_PHY_VER_F", 0x0001 },
1222                 { RTL_GIGA_PHY_VER_E, "RTL_GIGA_PHY_VER_E", 0x0000 },
1223                 { RTL_GIGA_PHY_VER_D, "RTL_GIGA_PHY_VER_D", 0x0000 },
1224                 { 0, NULL, 0x0000 }
1225         }, *p;
1226
1227         for (p = phy_print; p->msg; p++) {
1228                 if (tp->phy_version == p->version) {
1229                         dprintk("phy_version == %s (%04x)\n", p->msg, p->reg);
1230                         return;
1231                 }
1232         }
1233         dprintk("phy_version == Unknown\n");
1234 }
1235
1236 static void rtl8169_hw_phy_config(struct net_device *dev)
1237 {
1238         struct rtl8169_private *tp = netdev_priv(dev);
1239         void __iomem *ioaddr = tp->mmio_addr;
1240         struct {
1241                 u16 regs[5]; /* Beware of bit-sign propagation */
1242         } phy_magic[5] = { {
1243                 { 0x0000,       //w 4 15 12 0
1244                   0x00a1,       //w 3 15 0 00a1
1245                   0x0008,       //w 2 15 0 0008
1246                   0x1020,       //w 1 15 0 1020
1247                   0x1000 } },{  //w 0 15 0 1000
1248                 { 0x7000,       //w 4 15 12 7
1249                   0xff41,       //w 3 15 0 ff41
1250                   0xde60,       //w 2 15 0 de60
1251                   0x0140,       //w 1 15 0 0140
1252                   0x0077 } },{  //w 0 15 0 0077
1253                 { 0xa000,       //w 4 15 12 a
1254                   0xdf01,       //w 3 15 0 df01
1255                   0xdf20,       //w 2 15 0 df20
1256                   0xff95,       //w 1 15 0 ff95
1257                   0xfa00 } },{  //w 0 15 0 fa00
1258                 { 0xb000,       //w 4 15 12 b
1259                   0xff41,       //w 3 15 0 ff41
1260                   0xde20,       //w 2 15 0 de20
1261                   0x0140,       //w 1 15 0 0140
1262                   0x00bb } },{  //w 0 15 0 00bb
1263                 { 0xf000,       //w 4 15 12 f
1264                   0xdf01,       //w 3 15 0 df01
1265                   0xdf20,       //w 2 15 0 df20
1266                   0xff95,       //w 1 15 0 ff95
1267                   0xbf00 }      //w 0 15 0 bf00
1268                 }
1269         }, *p = phy_magic;
1270         int i;
1271
1272         rtl8169_print_mac_version(tp);
1273         rtl8169_print_phy_version(tp);
1274
1275         if (tp->mac_version <= RTL_GIGA_MAC_VER_01)
1276                 return;
1277         if (tp->phy_version >= RTL_GIGA_PHY_VER_H)
1278                 return;
1279
1280         dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1281         dprintk("Do final_reg2.cfg\n");
1282
1283         /* Shazam ! */
1284
1285         if (tp->mac_version == RTL_GIGA_MAC_VER_04) {
1286                 mdio_write(ioaddr, 31, 0x0001);
1287                 mdio_write(ioaddr,  9, 0x273a);
1288                 mdio_write(ioaddr, 14, 0x7bfb);
1289                 mdio_write(ioaddr, 27, 0x841e);
1290
1291                 mdio_write(ioaddr, 31, 0x0002);
1292                 mdio_write(ioaddr,  1, 0x90d0);
1293                 mdio_write(ioaddr, 31, 0x0000);
1294                 return;
1295         }
1296
1297         /* phy config for RTL8169s mac_version C chip */
1298         mdio_write(ioaddr, 31, 0x0001);                 //w 31 2 0 1
1299         mdio_write(ioaddr, 21, 0x1000);                 //w 21 15 0 1000
1300         mdio_write(ioaddr, 24, 0x65c7);                 //w 24 15 0 65c7
1301         rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0);   //w 4 11 11 0
1302
1303         for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) {
1304                 int val, pos = 4;
1305
1306                 val = (mdio_read(ioaddr, pos) & 0x0fff) | (p->regs[0] & 0xffff);
1307                 mdio_write(ioaddr, pos, val);
1308                 while (--pos >= 0)
1309                         mdio_write(ioaddr, pos, p->regs[4 - pos] & 0xffff);
1310                 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1
1311                 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
1312         }
1313         mdio_write(ioaddr, 31, 0x0000); //w 31 2 0 0
1314 }
1315
1316 static void rtl8169_phy_timer(unsigned long __opaque)
1317 {
1318         struct net_device *dev = (struct net_device *)__opaque;
1319         struct rtl8169_private *tp = netdev_priv(dev);
1320         struct timer_list *timer = &tp->timer;
1321         void __iomem *ioaddr = tp->mmio_addr;
1322         unsigned long timeout = RTL8169_PHY_TIMEOUT;
1323
1324         assert(tp->mac_version > RTL_GIGA_MAC_VER_01);
1325         assert(tp->phy_version < RTL_GIGA_PHY_VER_H);
1326
1327         if (!(tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL))
1328                 return;
1329
1330         spin_lock_irq(&tp->lock);
1331
1332         if (tp->phy_reset_pending(ioaddr)) {
1333                 /*
1334                  * A busy loop could burn quite a few cycles on nowadays CPU.
1335                  * Let's delay the execution of the timer for a few ticks.
1336                  */
1337                 timeout = HZ/10;
1338                 goto out_mod_timer;
1339         }
1340
1341         if (tp->link_ok(ioaddr))
1342                 goto out_unlock;
1343
1344         if (netif_msg_link(tp))
1345                 printk(KERN_WARNING "%s: PHY reset until link up\n", dev->name);
1346
1347         tp->phy_reset_enable(ioaddr);
1348
1349 out_mod_timer:
1350         mod_timer(timer, jiffies + timeout);
1351 out_unlock:
1352         spin_unlock_irq(&tp->lock);
1353 }
1354
1355 static inline void rtl8169_delete_timer(struct net_device *dev)
1356 {
1357         struct rtl8169_private *tp = netdev_priv(dev);
1358         struct timer_list *timer = &tp->timer;
1359
1360         if ((tp->mac_version <= RTL_GIGA_MAC_VER_01) ||
1361             (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1362                 return;
1363
1364         del_timer_sync(timer);
1365 }
1366
1367 static inline void rtl8169_request_timer(struct net_device *dev)
1368 {
1369         struct rtl8169_private *tp = netdev_priv(dev);
1370         struct timer_list *timer = &tp->timer;
1371
1372         if ((tp->mac_version <= RTL_GIGA_MAC_VER_01) ||
1373             (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1374                 return;
1375
1376         init_timer(timer);
1377         timer->expires = jiffies + RTL8169_PHY_TIMEOUT;
1378         timer->data = (unsigned long)(dev);
1379         timer->function = rtl8169_phy_timer;
1380         add_timer(timer);
1381 }
1382
1383 #ifdef CONFIG_NET_POLL_CONTROLLER
1384 /*
1385  * Polling 'interrupt' - used by things like netconsole to send skbs
1386  * without having to re-enable interrupts. It's not called while
1387  * the interrupt routine is executing.
1388  */
1389 static void rtl8169_netpoll(struct net_device *dev)
1390 {
1391         struct rtl8169_private *tp = netdev_priv(dev);
1392         struct pci_dev *pdev = tp->pci_dev;
1393
1394         disable_irq(pdev->irq);
1395         rtl8169_interrupt(pdev->irq, dev, NULL);
1396         enable_irq(pdev->irq);
1397 }
1398 #endif
1399
1400 static void __rtl8169_set_mac_addr(struct net_device *dev, void __iomem *ioaddr)
1401 {
1402         unsigned int i, j;
1403
1404         RTL_W8(Cfg9346, Cfg9346_Unlock);
1405         for (i = 0; i < 2; i++) {
1406                 __le32 l = 0;
1407
1408                 for (j = 0; j < 4; j++) {
1409                         l <<= 8;
1410                         l |= dev->dev_addr[4*i + j];
1411                 }
1412                 RTL_W32(MAC0 + 4*i, cpu_to_be32(l));
1413         }
1414         RTL_W8(Cfg9346, Cfg9346_Lock);
1415 }
1416
1417 static int rtl8169_set_mac_addr(struct net_device *dev, void *p)
1418 {
1419         struct rtl8169_private *tp = netdev_priv(dev);
1420         struct sockaddr *addr = p;
1421
1422         if (!is_valid_ether_addr(addr->sa_data))
1423                 return -EINVAL;
1424
1425         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1426
1427         if (netif_running(dev)) {
1428                 spin_lock_irq(&tp->lock);
1429                 __rtl8169_set_mac_addr(dev, tp->mmio_addr);
1430                 spin_unlock_irq(&tp->lock);
1431         }
1432         return 0;
1433 }
1434
1435 static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev,
1436                                   void __iomem *ioaddr)
1437 {
1438         iounmap(ioaddr);
1439         pci_release_regions(pdev);
1440         pci_disable_device(pdev);
1441         free_netdev(dev);
1442 }
1443
1444 static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp)
1445 {
1446         void __iomem *ioaddr = tp->mmio_addr;
1447         static int board_idx = -1;
1448         u8 autoneg, duplex;
1449         u16 speed;
1450
1451         board_idx++;
1452
1453         rtl8169_hw_phy_config(dev);
1454
1455         dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1456         RTL_W8(0x82, 0x01);
1457
1458         if (tp->mac_version < RTL_GIGA_MAC_VER_03) {
1459                 dprintk("Set PCI Latency=0x40\n");
1460                 pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40);
1461         }
1462
1463         if (tp->mac_version == RTL_GIGA_MAC_VER_02) {
1464                 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1465                 RTL_W8(0x82, 0x01);
1466                 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1467                 mdio_write(ioaddr, 0x0b, 0x0000); //w 0x0b 15 0 0
1468         }
1469
1470         rtl8169_link_option(board_idx, &autoneg, &speed, &duplex);
1471
1472         rtl8169_set_speed(dev, autoneg, speed, duplex);
1473
1474         if ((RTL_R8(PHYstatus) & TBI_Enable) && netif_msg_link(tp))
1475                 printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name);
1476 }
1477
1478 static int rtl8169_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1479 {
1480         struct rtl8169_private *tp = netdev_priv(dev);
1481         struct mii_ioctl_data *data = if_mii(ifr);
1482
1483         if (!netif_running(dev))
1484                 return -ENODEV;
1485
1486         switch (cmd) {
1487         case SIOCGMIIPHY:
1488                 data->phy_id = 32; /* Internal PHY */
1489                 return 0;
1490
1491         case SIOCGMIIREG:
1492                 data->val_out = mdio_read(tp->mmio_addr, data->reg_num & 0x1f);
1493                 return 0;
1494
1495         case SIOCSMIIREG:
1496                 if (!capable(CAP_NET_ADMIN))
1497                         return -EPERM;
1498                 mdio_write(tp->mmio_addr, data->reg_num & 0x1f, data->val_in);
1499                 return 0;
1500         }
1501         return -EOPNOTSUPP;
1502 }
1503
1504 static int __devinit
1505 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1506 {
1507         const unsigned int region = rtl_cfg_info[ent->driver_data].region;
1508         struct rtl8169_private *tp;
1509         struct net_device *dev;
1510         void __iomem *ioaddr;
1511         unsigned int i, pm_cap;
1512         int rc;
1513
1514         if (netif_msg_drv(&debug)) {
1515                 printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
1516                        MODULENAME, RTL8169_VERSION);
1517         }
1518
1519         dev = alloc_etherdev(sizeof (*tp));
1520         if (!dev) {
1521                 if (netif_msg_drv(&debug))
1522                         dev_err(&pdev->dev, "unable to alloc new ethernet\n");
1523                 rc = -ENOMEM;
1524                 goto out;
1525         }
1526
1527         SET_MODULE_OWNER(dev);
1528         SET_NETDEV_DEV(dev, &pdev->dev);
1529         tp = netdev_priv(dev);
1530         tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
1531
1532         /* enable device (incl. PCI PM wakeup and hotplug setup) */
1533         rc = pci_enable_device(pdev);
1534         if (rc < 0) {
1535                 if (netif_msg_probe(tp))
1536                         dev_err(&pdev->dev, "enable failure\n");
1537                 goto err_out_free_dev_1;
1538         }
1539
1540         rc = pci_set_mwi(pdev);
1541         if (rc < 0)
1542                 goto err_out_disable_2;
1543
1544         /* save power state before pci_enable_device overwrites it */
1545         pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
1546         if (pm_cap) {
1547                 u16 pwr_command, acpi_idle_state;
1548
1549                 pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command);
1550                 acpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
1551         } else {
1552                 if (netif_msg_probe(tp)) {
1553                         dev_err(&pdev->dev,
1554                                 "PowerManagement capability not found.\n");
1555                 }
1556         }
1557
1558         /* make sure PCI base addr 1 is MMIO */
1559         if (!(pci_resource_flags(pdev, region) & IORESOURCE_MEM)) {
1560                 if (netif_msg_probe(tp)) {
1561                         dev_err(&pdev->dev,
1562                                 "region #%d not an MMIO resource, aborting\n",
1563                                 region);
1564                 }
1565                 rc = -ENODEV;
1566                 goto err_out_mwi_3;
1567         }
1568
1569         /* check for weird/broken PCI region reporting */
1570         if (pci_resource_len(pdev, region) < R8169_REGS_SIZE) {
1571                 if (netif_msg_probe(tp)) {
1572                         dev_err(&pdev->dev,
1573                                 "Invalid PCI region size(s), aborting\n");
1574                 }
1575                 rc = -ENODEV;
1576                 goto err_out_mwi_3;
1577         }
1578
1579         rc = pci_request_regions(pdev, MODULENAME);
1580         if (rc < 0) {
1581                 if (netif_msg_probe(tp))
1582                         dev_err(&pdev->dev, "could not request regions.\n");
1583                 goto err_out_mwi_3;
1584         }
1585
1586         tp->cp_cmd = PCIMulRW | RxChkSum;
1587
1588         if ((sizeof(dma_addr_t) > 4) &&
1589             !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) {
1590                 tp->cp_cmd |= PCIDAC;
1591                 dev->features |= NETIF_F_HIGHDMA;
1592         } else {
1593                 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1594                 if (rc < 0) {
1595                         if (netif_msg_probe(tp)) {
1596                                 dev_err(&pdev->dev,
1597                                         "DMA configuration failed.\n");
1598                         }
1599                         goto err_out_free_res_4;
1600                 }
1601         }
1602
1603         pci_set_master(pdev);
1604
1605         /* ioremap MMIO region */
1606         ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE);
1607         if (!ioaddr) {
1608                 if (netif_msg_probe(tp))
1609                         dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
1610                 rc = -EIO;
1611                 goto err_out_free_res_4;
1612         }
1613
1614         /* Unneeded ? Don't mess with Mrs. Murphy. */
1615         rtl8169_irq_mask_and_ack(ioaddr);
1616
1617         /* Soft reset the chip. */
1618         RTL_W8(ChipCmd, CmdReset);
1619
1620         /* Check that the chip has finished the reset. */
1621         for (i = 100; i > 0; i--) {
1622                 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1623                         break;
1624                 msleep_interruptible(1);
1625         }
1626
1627         /* Identify chip attached to board */
1628         rtl8169_get_mac_version(tp, ioaddr);
1629         rtl8169_get_phy_version(tp, ioaddr);
1630
1631         rtl8169_print_mac_version(tp);
1632         rtl8169_print_phy_version(tp);
1633
1634         for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
1635                 if (tp->mac_version == rtl_chip_info[i].mac_version)
1636                         break;
1637         }
1638         if (i < 0) {
1639                 /* Unknown chip: assume array element #0, original RTL-8169 */
1640                 if (netif_msg_probe(tp)) {
1641                         dev_printk(KERN_DEBUG, &pdev->dev,
1642                                 "unknown chip version, assuming %s\n",
1643                                 rtl_chip_info[0].name);
1644                 }
1645                 i++;
1646         }
1647         tp->chipset = i;
1648
1649         RTL_W8(Cfg9346, Cfg9346_Unlock);
1650         RTL_W8(Config1, RTL_R8(Config1) | PMEnable);
1651         RTL_W8(Config5, RTL_R8(Config5) & PMEStatus);
1652         RTL_W8(Cfg9346, Cfg9346_Lock);
1653
1654         if (RTL_R8(PHYstatus) & TBI_Enable) {
1655                 tp->set_speed = rtl8169_set_speed_tbi;
1656                 tp->get_settings = rtl8169_gset_tbi;
1657                 tp->phy_reset_enable = rtl8169_tbi_reset_enable;
1658                 tp->phy_reset_pending = rtl8169_tbi_reset_pending;
1659                 tp->link_ok = rtl8169_tbi_link_ok;
1660
1661                 tp->phy_1000_ctrl_reg = ADVERTISE_1000FULL; /* Implied by TBI */
1662         } else {
1663                 tp->set_speed = rtl8169_set_speed_xmii;
1664                 tp->get_settings = rtl8169_gset_xmii;
1665                 tp->phy_reset_enable = rtl8169_xmii_reset_enable;
1666                 tp->phy_reset_pending = rtl8169_xmii_reset_pending;
1667                 tp->link_ok = rtl8169_xmii_link_ok;
1668
1669                 dev->do_ioctl = rtl8169_ioctl;
1670         }
1671
1672         /* Get MAC address.  FIXME: read EEPROM */
1673         for (i = 0; i < MAC_ADDR_LEN; i++)
1674                 dev->dev_addr[i] = RTL_R8(MAC0 + i);
1675         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1676
1677         dev->open = rtl8169_open;
1678         dev->hard_start_xmit = rtl8169_start_xmit;
1679         dev->get_stats = rtl8169_get_stats;
1680         SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
1681         dev->stop = rtl8169_close;
1682         dev->tx_timeout = rtl8169_tx_timeout;
1683         dev->set_multicast_list = rtl8169_set_rx_mode;
1684         dev->set_mac_address = rtl8169_set_mac_addr;
1685         dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
1686         dev->irq = pdev->irq;
1687         dev->base_addr = (unsigned long) ioaddr;
1688         dev->change_mtu = rtl8169_change_mtu;
1689
1690 #ifdef CONFIG_R8169_NAPI
1691         dev->poll = rtl8169_poll;
1692         dev->weight = R8169_NAPI_WEIGHT;
1693 #endif
1694
1695 #ifdef CONFIG_R8169_VLAN
1696         dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1697         dev->vlan_rx_register = rtl8169_vlan_rx_register;
1698         dev->vlan_rx_kill_vid = rtl8169_vlan_rx_kill_vid;
1699 #endif
1700
1701 #ifdef CONFIG_NET_POLL_CONTROLLER
1702         dev->poll_controller = rtl8169_netpoll;
1703 #endif
1704
1705         tp->intr_mask = 0xffff;
1706         tp->pci_dev = pdev;
1707         tp->mmio_addr = ioaddr;
1708         tp->align = rtl_cfg_info[ent->driver_data].align;
1709
1710         spin_lock_init(&tp->lock);
1711
1712         rc = register_netdev(dev);
1713         if (rc < 0)
1714                 goto err_out_unmap_5;
1715
1716         pci_set_drvdata(pdev, dev);
1717
1718         if (netif_msg_probe(tp)) {
1719                 printk(KERN_INFO "%s: %s at 0x%lx, "
1720                        "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1721                        "IRQ %d\n",
1722                        dev->name,
1723                        rtl_chip_info[tp->chipset].name,
1724                        dev->base_addr,
1725                        dev->dev_addr[0], dev->dev_addr[1],
1726                        dev->dev_addr[2], dev->dev_addr[3],
1727                        dev->dev_addr[4], dev->dev_addr[5], dev->irq);
1728         }
1729
1730         rtl8169_init_phy(dev, tp);
1731
1732 out:
1733         return rc;
1734
1735 err_out_unmap_5:
1736         iounmap(ioaddr);
1737 err_out_free_res_4:
1738         pci_release_regions(pdev);
1739 err_out_mwi_3:
1740         pci_clear_mwi(pdev);
1741 err_out_disable_2:
1742         pci_disable_device(pdev);
1743 err_out_free_dev_1:
1744         free_netdev(dev);
1745         goto out;
1746 }
1747
1748 static void __devexit
1749 rtl8169_remove_one(struct pci_dev *pdev)
1750 {
1751         struct net_device *dev = pci_get_drvdata(pdev);
1752         struct rtl8169_private *tp = netdev_priv(dev);
1753
1754         assert(dev != NULL);
1755         assert(tp != NULL);
1756
1757         unregister_netdev(dev);
1758         rtl8169_release_board(pdev, dev, tp->mmio_addr);
1759         pci_set_drvdata(pdev, NULL);
1760 }
1761
1762 static void rtl8169_set_rxbufsize(struct rtl8169_private *tp,
1763                                   struct net_device *dev)
1764 {
1765         unsigned int mtu = dev->mtu;
1766
1767         tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
1768 }
1769
1770 static int rtl8169_open(struct net_device *dev)
1771 {
1772         struct rtl8169_private *tp = netdev_priv(dev);
1773         struct pci_dev *pdev = tp->pci_dev;
1774         int retval;
1775
1776         rtl8169_set_rxbufsize(tp, dev);
1777
1778         retval =
1779             request_irq(dev->irq, rtl8169_interrupt, IRQF_SHARED, dev->name, dev);
1780         if (retval < 0)
1781                 goto out;
1782
1783         retval = -ENOMEM;
1784
1785         /*
1786          * Rx and Tx desscriptors needs 256 bytes alignment.
1787          * pci_alloc_consistent provides more.
1788          */
1789         tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES,
1790                                                &tp->TxPhyAddr);
1791         if (!tp->TxDescArray)
1792                 goto err_free_irq;
1793
1794         tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES,
1795                                                &tp->RxPhyAddr);
1796         if (!tp->RxDescArray)
1797                 goto err_free_tx;
1798
1799         retval = rtl8169_init_ring(dev);
1800         if (retval < 0)
1801                 goto err_free_rx;
1802
1803         INIT_WORK(&tp->task, NULL, dev);
1804
1805         rtl8169_hw_start(dev);
1806
1807         rtl8169_request_timer(dev);
1808
1809         rtl8169_check_link_status(dev, tp, tp->mmio_addr);
1810 out:
1811         return retval;
1812
1813 err_free_rx:
1814         pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
1815                             tp->RxPhyAddr);
1816 err_free_tx:
1817         pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
1818                             tp->TxPhyAddr);
1819 err_free_irq:
1820         free_irq(dev->irq, dev);
1821         goto out;
1822 }
1823
1824 static void rtl8169_hw_reset(void __iomem *ioaddr)
1825 {
1826         /* Disable interrupts */
1827         rtl8169_irq_mask_and_ack(ioaddr);
1828
1829         /* Reset the chipset */
1830         RTL_W8(ChipCmd, CmdReset);
1831
1832         /* PCI commit */
1833         RTL_R8(ChipCmd);
1834 }
1835
1836 static void
1837 rtl8169_hw_start(struct net_device *dev)
1838 {
1839         struct rtl8169_private *tp = netdev_priv(dev);
1840         void __iomem *ioaddr = tp->mmio_addr;
1841         struct pci_dev *pdev = tp->pci_dev;
1842         u32 i;
1843
1844         /* Soft reset the chip. */
1845         RTL_W8(ChipCmd, CmdReset);
1846
1847         /* Check that the chip has finished the reset. */
1848         for (i = 100; i > 0; i--) {
1849                 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1850                         break;
1851                 msleep_interruptible(1);
1852         }
1853
1854         if (tp->mac_version == RTL_GIGA_MAC_VER_13) {
1855                 pci_write_config_word(pdev, 0x68, 0x00);
1856                 pci_write_config_word(pdev, 0x69, 0x08);
1857         }
1858
1859         /* Undocumented stuff. */
1860         if (tp->mac_version == RTL_GIGA_MAC_VER_05) {
1861                 u16 cmd;
1862
1863                 /* Realtek's r1000_n.c driver uses '&& 0x01' here. Well... */
1864                 if ((RTL_R8(Config2) & 0x07) & 0x01)
1865                         RTL_W32(0x7c, 0x0007ffff);
1866
1867                 RTL_W32(0x7c, 0x0007ff00);
1868
1869                 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
1870                 cmd = cmd & 0xef;
1871                 pci_write_config_word(pdev, PCI_COMMAND, cmd);
1872         }
1873
1874
1875         RTL_W8(Cfg9346, Cfg9346_Unlock);
1876         RTL_W8(EarlyTxThres, EarlyTxThld);
1877
1878         /* Low hurts. Let's disable the filtering. */
1879         RTL_W16(RxMaxSize, 16383);
1880
1881         /* Set Rx Config register */
1882         i = rtl8169_rx_config |
1883                 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
1884         RTL_W32(RxConfig, i);
1885
1886         /* Set DMA burst size and Interframe Gap Time */
1887         RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
1888                 (InterFrameGap << TxInterFrameGapShift));
1889
1890         tp->cp_cmd |= RTL_R16(CPlusCmd) | PCIMulRW;
1891
1892         if ((tp->mac_version == RTL_GIGA_MAC_VER_02) ||
1893             (tp->mac_version == RTL_GIGA_MAC_VER_03)) {
1894                 dprintk(KERN_INFO PFX "Set MAC Reg C+CR Offset 0xE0. "
1895                         "Bit-3 and bit-14 MUST be 1\n");
1896                 tp->cp_cmd |= (1 << 14);
1897         }
1898
1899         RTL_W16(CPlusCmd, tp->cp_cmd);
1900
1901         /*
1902          * Undocumented corner. Supposedly:
1903          * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1904          */
1905         RTL_W16(IntrMitigate, 0x0000);
1906
1907         RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
1908         RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
1909         RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
1910         RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
1911         RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1912         RTL_W8(Cfg9346, Cfg9346_Lock);
1913
1914         /* Initially a 10 us delay. Turned it into a PCI commit. - FR */
1915         RTL_R8(IntrMask);
1916
1917         RTL_W32(RxMissed, 0);
1918
1919         rtl8169_set_rx_mode(dev);
1920
1921         /* no early-rx interrupts */
1922         RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
1923
1924         /* Enable all known interrupts by setting the interrupt mask. */
1925         RTL_W16(IntrMask, rtl8169_intr_mask);
1926
1927         __rtl8169_set_mac_addr(dev, ioaddr);
1928
1929         netif_start_queue(dev);
1930 }
1931
1932 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
1933 {
1934         struct rtl8169_private *tp = netdev_priv(dev);
1935         int ret = 0;
1936
1937         if (new_mtu < ETH_ZLEN || new_mtu > SafeMtu)
1938                 return -EINVAL;
1939
1940         dev->mtu = new_mtu;
1941
1942         if (!netif_running(dev))
1943                 goto out;
1944
1945         rtl8169_down(dev);
1946
1947         rtl8169_set_rxbufsize(tp, dev);
1948
1949         ret = rtl8169_init_ring(dev);
1950         if (ret < 0)
1951                 goto out;
1952
1953         netif_poll_enable(dev);
1954
1955         rtl8169_hw_start(dev);
1956
1957         rtl8169_request_timer(dev);
1958
1959 out:
1960         return ret;
1961 }
1962
1963 static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
1964 {
1965         desc->addr = 0x0badbadbadbadbadull;
1966         desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
1967 }
1968
1969 static void rtl8169_free_rx_skb(struct rtl8169_private *tp,
1970                                 struct sk_buff **sk_buff, struct RxDesc *desc)
1971 {
1972         struct pci_dev *pdev = tp->pci_dev;
1973
1974         pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz,
1975                          PCI_DMA_FROMDEVICE);
1976         dev_kfree_skb(*sk_buff);
1977         *sk_buff = NULL;
1978         rtl8169_make_unusable_by_asic(desc);
1979 }
1980
1981 static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
1982 {
1983         u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
1984
1985         desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
1986 }
1987
1988 static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
1989                                        u32 rx_buf_sz)
1990 {
1991         desc->addr = cpu_to_le64(mapping);
1992         wmb();
1993         rtl8169_mark_to_asic(desc, rx_buf_sz);
1994 }
1995
1996 static int rtl8169_alloc_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
1997                                 struct RxDesc *desc, int rx_buf_sz,
1998                                 unsigned int align)
1999 {
2000         struct sk_buff *skb;
2001         dma_addr_t mapping;
2002         int ret = 0;
2003
2004         skb = dev_alloc_skb(rx_buf_sz + align);
2005         if (!skb)
2006                 goto err_out;
2007
2008         skb_reserve(skb, align);
2009         *sk_buff = skb;
2010
2011         mapping = pci_map_single(pdev, skb->data, rx_buf_sz,
2012                                  PCI_DMA_FROMDEVICE);
2013
2014         rtl8169_map_to_asic(desc, mapping, rx_buf_sz);
2015
2016 out:
2017         return ret;
2018
2019 err_out:
2020         ret = -ENOMEM;
2021         rtl8169_make_unusable_by_asic(desc);
2022         goto out;
2023 }
2024
2025 static void rtl8169_rx_clear(struct rtl8169_private *tp)
2026 {
2027         int i;
2028
2029         for (i = 0; i < NUM_RX_DESC; i++) {
2030                 if (tp->Rx_skbuff[i]) {
2031                         rtl8169_free_rx_skb(tp, tp->Rx_skbuff + i,
2032                                             tp->RxDescArray + i);
2033                 }
2034         }
2035 }
2036
2037 static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev,
2038                            u32 start, u32 end)
2039 {
2040         u32 cur;
2041
2042         for (cur = start; end - cur > 0; cur++) {
2043                 int ret, i = cur % NUM_RX_DESC;
2044
2045                 if (tp->Rx_skbuff[i])
2046                         continue;
2047
2048                 ret = rtl8169_alloc_rx_skb(tp->pci_dev, tp->Rx_skbuff + i,
2049                         tp->RxDescArray + i, tp->rx_buf_sz, tp->align);
2050                 if (ret < 0)
2051                         break;
2052         }
2053         return cur - start;
2054 }
2055
2056 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
2057 {
2058         desc->opts1 |= cpu_to_le32(RingEnd);
2059 }
2060
2061 static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
2062 {
2063         tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
2064 }
2065
2066 static int rtl8169_init_ring(struct net_device *dev)
2067 {
2068         struct rtl8169_private *tp = netdev_priv(dev);
2069
2070         rtl8169_init_ring_indexes(tp);
2071
2072         memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
2073         memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
2074
2075         if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
2076                 goto err_out;
2077
2078         rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
2079
2080         return 0;
2081
2082 err_out:
2083         rtl8169_rx_clear(tp);
2084         return -ENOMEM;
2085 }
2086
2087 static void rtl8169_unmap_tx_skb(struct pci_dev *pdev, struct ring_info *tx_skb,
2088                                  struct TxDesc *desc)
2089 {
2090         unsigned int len = tx_skb->len;
2091
2092         pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
2093         desc->opts1 = 0x00;
2094         desc->opts2 = 0x00;
2095         desc->addr = 0x00;
2096         tx_skb->len = 0;
2097 }
2098
2099 static void rtl8169_tx_clear(struct rtl8169_private *tp)
2100 {
2101         unsigned int i;
2102
2103         for (i = tp->dirty_tx; i < tp->dirty_tx + NUM_TX_DESC; i++) {
2104                 unsigned int entry = i % NUM_TX_DESC;
2105                 struct ring_info *tx_skb = tp->tx_skb + entry;
2106                 unsigned int len = tx_skb->len;
2107
2108                 if (len) {
2109                         struct sk_buff *skb = tx_skb->skb;
2110
2111                         rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb,
2112                                              tp->TxDescArray + entry);
2113                         if (skb) {
2114                                 dev_kfree_skb(skb);
2115                                 tx_skb->skb = NULL;
2116                         }
2117                         tp->stats.tx_dropped++;
2118                 }
2119         }
2120         tp->cur_tx = tp->dirty_tx = 0;
2121 }
2122
2123 static void rtl8169_schedule_work(struct net_device *dev, void (*task)(void *))
2124 {
2125         struct rtl8169_private *tp = netdev_priv(dev);
2126
2127         PREPARE_WORK(&tp->task, task, dev);
2128         schedule_delayed_work(&tp->task, 4);
2129 }
2130
2131 static void rtl8169_wait_for_quiescence(struct net_device *dev)
2132 {
2133         struct rtl8169_private *tp = netdev_priv(dev);
2134         void __iomem *ioaddr = tp->mmio_addr;
2135
2136         synchronize_irq(dev->irq);
2137
2138         /* Wait for any pending NAPI task to complete */
2139         netif_poll_disable(dev);
2140
2141         rtl8169_irq_mask_and_ack(ioaddr);
2142
2143         netif_poll_enable(dev);
2144 }
2145
2146 static void rtl8169_reinit_task(void *_data)
2147 {
2148         struct net_device *dev = _data;
2149         int ret;
2150
2151         if (netif_running(dev)) {
2152                 rtl8169_wait_for_quiescence(dev);
2153                 rtl8169_close(dev);
2154         }
2155
2156         ret = rtl8169_open(dev);
2157         if (unlikely(ret < 0)) {
2158                 if (net_ratelimit()) {
2159                         struct rtl8169_private *tp = netdev_priv(dev);
2160
2161                         if (netif_msg_drv(tp)) {
2162                                 printk(PFX KERN_ERR
2163                                        "%s: reinit failure (status = %d)."
2164                                        " Rescheduling.\n", dev->name, ret);
2165                         }
2166                 }
2167                 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2168         }
2169 }
2170
2171 static void rtl8169_reset_task(void *_data)
2172 {
2173         struct net_device *dev = _data;
2174         struct rtl8169_private *tp = netdev_priv(dev);
2175
2176         if (!netif_running(dev))
2177                 return;
2178
2179         rtl8169_wait_for_quiescence(dev);
2180
2181         rtl8169_rx_interrupt(dev, tp, tp->mmio_addr);
2182         rtl8169_tx_clear(tp);
2183
2184         if (tp->dirty_rx == tp->cur_rx) {
2185                 rtl8169_init_ring_indexes(tp);
2186                 rtl8169_hw_start(dev);
2187                 netif_wake_queue(dev);
2188         } else {
2189                 if (net_ratelimit()) {
2190                         struct rtl8169_private *tp = netdev_priv(dev);
2191
2192                         if (netif_msg_intr(tp)) {
2193                                 printk(PFX KERN_EMERG
2194                                        "%s: Rx buffers shortage\n", dev->name);
2195                         }
2196                 }
2197                 rtl8169_schedule_work(dev, rtl8169_reset_task);
2198         }
2199 }
2200
2201 static void rtl8169_tx_timeout(struct net_device *dev)
2202 {
2203         struct rtl8169_private *tp = netdev_priv(dev);
2204
2205         rtl8169_hw_reset(tp->mmio_addr);
2206
2207         /* Let's wait a bit while any (async) irq lands on */
2208         rtl8169_schedule_work(dev, rtl8169_reset_task);
2209 }
2210
2211 static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb,
2212                               u32 opts1)
2213 {
2214         struct skb_shared_info *info = skb_shinfo(skb);
2215         unsigned int cur_frag, entry;
2216         struct TxDesc *txd;
2217
2218         entry = tp->cur_tx;
2219         for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
2220                 skb_frag_t *frag = info->frags + cur_frag;
2221                 dma_addr_t mapping;
2222                 u32 status, len;
2223                 void *addr;
2224
2225                 entry = (entry + 1) % NUM_TX_DESC;
2226
2227                 txd = tp->TxDescArray + entry;
2228                 len = frag->size;
2229                 addr = ((void *) page_address(frag->page)) + frag->page_offset;
2230                 mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
2231
2232                 /* anti gcc 2.95.3 bugware (sic) */
2233                 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2234
2235                 txd->opts1 = cpu_to_le32(status);
2236                 txd->addr = cpu_to_le64(mapping);
2237
2238                 tp->tx_skb[entry].len = len;
2239         }
2240
2241         if (cur_frag) {
2242                 tp->tx_skb[entry].skb = skb;
2243                 txd->opts1 |= cpu_to_le32(LastFrag);
2244         }
2245
2246         return cur_frag;
2247 }
2248
2249 static inline u32 rtl8169_tso_csum(struct sk_buff *skb, struct net_device *dev)
2250 {
2251         if (dev->features & NETIF_F_TSO) {
2252                 u32 mss = skb_shinfo(skb)->gso_size;
2253
2254                 if (mss)
2255                         return LargeSend | ((mss & MSSMask) << MSSShift);
2256         }
2257         if (skb->ip_summed == CHECKSUM_HW) {
2258                 const struct iphdr *ip = skb->nh.iph;
2259
2260                 if (ip->protocol == IPPROTO_TCP)
2261                         return IPCS | TCPCS;
2262                 else if (ip->protocol == IPPROTO_UDP)
2263                         return IPCS | UDPCS;
2264                 WARN_ON(1);     /* we need a WARN() */
2265         }
2266         return 0;
2267 }
2268
2269 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
2270 {
2271         struct rtl8169_private *tp = netdev_priv(dev);
2272         unsigned int frags, entry = tp->cur_tx % NUM_TX_DESC;
2273         struct TxDesc *txd = tp->TxDescArray + entry;
2274         void __iomem *ioaddr = tp->mmio_addr;
2275         dma_addr_t mapping;
2276         u32 status, len;
2277         u32 opts1;
2278         int ret = NETDEV_TX_OK;
2279
2280         if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) {
2281                 if (netif_msg_drv(tp)) {
2282                         printk(KERN_ERR
2283                                "%s: BUG! Tx Ring full when queue awake!\n",
2284                                dev->name);
2285                 }
2286                 goto err_stop;
2287         }
2288
2289         if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
2290                 goto err_stop;
2291
2292         opts1 = DescOwn | rtl8169_tso_csum(skb, dev);
2293
2294         frags = rtl8169_xmit_frags(tp, skb, opts1);
2295         if (frags) {
2296                 len = skb_headlen(skb);
2297                 opts1 |= FirstFrag;
2298         } else {
2299                 len = skb->len;
2300
2301                 if (unlikely(len < ETH_ZLEN)) {
2302                         if (skb_padto(skb, ETH_ZLEN))
2303                                 goto err_update_stats;
2304                         len = ETH_ZLEN;
2305                 }
2306
2307                 opts1 |= FirstFrag | LastFrag;
2308                 tp->tx_skb[entry].skb = skb;
2309         }
2310
2311         mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
2312
2313         tp->tx_skb[entry].len = len;
2314         txd->addr = cpu_to_le64(mapping);
2315         txd->opts2 = cpu_to_le32(rtl8169_tx_vlan_tag(tp, skb));
2316
2317         wmb();
2318
2319         /* anti gcc 2.95.3 bugware (sic) */
2320         status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2321         txd->opts1 = cpu_to_le32(status);
2322
2323         dev->trans_start = jiffies;
2324
2325         tp->cur_tx += frags + 1;
2326
2327         smp_wmb();
2328
2329         RTL_W8(TxPoll, 0x40);   /* set polling bit */
2330
2331         if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) {
2332                 netif_stop_queue(dev);
2333                 smp_rmb();
2334                 if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)
2335                         netif_wake_queue(dev);
2336         }
2337
2338 out:
2339         return ret;
2340
2341 err_stop:
2342         netif_stop_queue(dev);
2343         ret = NETDEV_TX_BUSY;
2344 err_update_stats:
2345         tp->stats.tx_dropped++;
2346         goto out;
2347 }
2348
2349 static void rtl8169_pcierr_interrupt(struct net_device *dev)
2350 {
2351         struct rtl8169_private *tp = netdev_priv(dev);
2352         struct pci_dev *pdev = tp->pci_dev;
2353         void __iomem *ioaddr = tp->mmio_addr;
2354         u16 pci_status, pci_cmd;
2355
2356         pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
2357         pci_read_config_word(pdev, PCI_STATUS, &pci_status);
2358
2359         if (netif_msg_intr(tp)) {
2360                 printk(KERN_ERR
2361                        "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2362                        dev->name, pci_cmd, pci_status);
2363         }
2364
2365         /*
2366          * The recovery sequence below admits a very elaborated explanation:
2367          * - it seems to work;
2368          * - I did not see what else could be done.
2369          *
2370          * Feel free to adjust to your needs.
2371          */
2372         pci_write_config_word(pdev, PCI_COMMAND,
2373                               pci_cmd | PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
2374
2375         pci_write_config_word(pdev, PCI_STATUS,
2376                 pci_status & (PCI_STATUS_DETECTED_PARITY |
2377                 PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
2378                 PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));
2379
2380         /* The infamous DAC f*ckup only happens at boot time */
2381         if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) {
2382                 if (netif_msg_intr(tp))
2383                         printk(KERN_INFO "%s: disabling PCI DAC.\n", dev->name);
2384                 tp->cp_cmd &= ~PCIDAC;
2385                 RTL_W16(CPlusCmd, tp->cp_cmd);
2386                 dev->features &= ~NETIF_F_HIGHDMA;
2387                 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2388         }
2389
2390         rtl8169_hw_reset(ioaddr);
2391 }
2392
2393 static void
2394 rtl8169_tx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2395                      void __iomem *ioaddr)
2396 {
2397         unsigned int dirty_tx, tx_left;
2398
2399         assert(dev != NULL);
2400         assert(tp != NULL);
2401         assert(ioaddr != NULL);
2402
2403         dirty_tx = tp->dirty_tx;
2404         smp_rmb();
2405         tx_left = tp->cur_tx - dirty_tx;
2406
2407         while (tx_left > 0) {
2408                 unsigned int entry = dirty_tx % NUM_TX_DESC;
2409                 struct ring_info *tx_skb = tp->tx_skb + entry;
2410                 u32 len = tx_skb->len;
2411                 u32 status;
2412
2413                 rmb();
2414                 status = le32_to_cpu(tp->TxDescArray[entry].opts1);
2415                 if (status & DescOwn)
2416                         break;
2417
2418                 tp->stats.tx_bytes += len;
2419                 tp->stats.tx_packets++;
2420
2421                 rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb, tp->TxDescArray + entry);
2422
2423                 if (status & LastFrag) {
2424                         dev_kfree_skb_irq(tx_skb->skb);
2425                         tx_skb->skb = NULL;
2426                 }
2427                 dirty_tx++;
2428                 tx_left--;
2429         }
2430
2431         if (tp->dirty_tx != dirty_tx) {
2432                 tp->dirty_tx = dirty_tx;
2433                 smp_wmb();
2434                 if (netif_queue_stopped(dev) &&
2435                     (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) {
2436                         netif_wake_queue(dev);
2437                 }
2438         }
2439 }
2440
2441 static inline int rtl8169_fragmented_frame(u32 status)
2442 {
2443         return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
2444 }
2445
2446 static inline void rtl8169_rx_csum(struct sk_buff *skb, struct RxDesc *desc)
2447 {
2448         u32 opts1 = le32_to_cpu(desc->opts1);
2449         u32 status = opts1 & RxProtoMask;
2450
2451         if (((status == RxProtoTCP) && !(opts1 & TCPFail)) ||
2452             ((status == RxProtoUDP) && !(opts1 & UDPFail)) ||
2453             ((status == RxProtoIP) && !(opts1 & IPFail)))
2454                 skb->ip_summed = CHECKSUM_UNNECESSARY;
2455         else
2456                 skb->ip_summed = CHECKSUM_NONE;
2457 }
2458
2459 static inline int rtl8169_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
2460                                       struct RxDesc *desc, int rx_buf_sz,
2461                                       unsigned int align)
2462 {
2463         int ret = -1;
2464
2465         if (pkt_size < rx_copybreak) {
2466                 struct sk_buff *skb;
2467
2468                 skb = dev_alloc_skb(pkt_size + align);
2469                 if (skb) {
2470                         skb_reserve(skb, align);
2471                         eth_copy_and_sum(skb, sk_buff[0]->data, pkt_size, 0);
2472                         *sk_buff = skb;
2473                         rtl8169_mark_to_asic(desc, rx_buf_sz);
2474                         ret = 0;
2475                 }
2476         }
2477         return ret;
2478 }
2479
2480 static int
2481 rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2482                      void __iomem *ioaddr)
2483 {
2484         unsigned int cur_rx, rx_left;
2485         unsigned int delta, count;
2486
2487         assert(dev != NULL);
2488         assert(tp != NULL);
2489         assert(ioaddr != NULL);
2490
2491         cur_rx = tp->cur_rx;
2492         rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
2493         rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota);
2494
2495         for (; rx_left > 0; rx_left--, cur_rx++) {
2496                 unsigned int entry = cur_rx % NUM_RX_DESC;
2497                 struct RxDesc *desc = tp->RxDescArray + entry;
2498                 u32 status;
2499
2500                 rmb();
2501                 status = le32_to_cpu(desc->opts1);
2502
2503                 if (status & DescOwn)
2504                         break;
2505                 if (unlikely(status & RxRES)) {
2506                         if (netif_msg_rx_err(tp)) {
2507                                 printk(KERN_INFO
2508                                        "%s: Rx ERROR. status = %08x\n",
2509                                        dev->name, status);
2510                         }
2511                         tp->stats.rx_errors++;
2512                         if (status & (RxRWT | RxRUNT))
2513                                 tp->stats.rx_length_errors++;
2514                         if (status & RxCRC)
2515                                 tp->stats.rx_crc_errors++;
2516                         if (status & RxFOVF) {
2517                                 rtl8169_schedule_work(dev, rtl8169_reset_task);
2518                                 tp->stats.rx_fifo_errors++;
2519                         }
2520                         rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2521                 } else {
2522                         struct sk_buff *skb = tp->Rx_skbuff[entry];
2523                         int pkt_size = (status & 0x00001FFF) - 4;
2524                         void (*pci_action)(struct pci_dev *, dma_addr_t,
2525                                 size_t, int) = pci_dma_sync_single_for_device;
2526
2527                         /*
2528                          * The driver does not support incoming fragmented
2529                          * frames. They are seen as a symptom of over-mtu
2530                          * sized frames.
2531                          */
2532                         if (unlikely(rtl8169_fragmented_frame(status))) {
2533                                 tp->stats.rx_dropped++;
2534                                 tp->stats.rx_length_errors++;
2535                                 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2536                                 continue;
2537                         }
2538
2539                         rtl8169_rx_csum(skb, desc);
2540
2541                         pci_dma_sync_single_for_cpu(tp->pci_dev,
2542                                 le64_to_cpu(desc->addr), tp->rx_buf_sz,
2543                                 PCI_DMA_FROMDEVICE);
2544
2545                         if (rtl8169_try_rx_copy(&skb, pkt_size, desc,
2546                                                 tp->rx_buf_sz, tp->align)) {
2547                                 pci_action = pci_unmap_single;
2548                                 tp->Rx_skbuff[entry] = NULL;
2549                         }
2550
2551                         pci_action(tp->pci_dev, le64_to_cpu(desc->addr),
2552                                    tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
2553
2554                         skb->dev = dev;
2555                         skb_put(skb, pkt_size);
2556                         skb->protocol = eth_type_trans(skb, dev);
2557
2558                         if (rtl8169_rx_vlan_skb(tp, desc, skb) < 0)
2559                                 rtl8169_rx_skb(skb);
2560
2561                         dev->last_rx = jiffies;
2562                         tp->stats.rx_bytes += pkt_size;
2563                         tp->stats.rx_packets++;
2564                 }
2565         }
2566
2567         count = cur_rx - tp->cur_rx;
2568         tp->cur_rx = cur_rx;
2569
2570         delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
2571         if (!delta && count && netif_msg_intr(tp))
2572                 printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name);
2573         tp->dirty_rx += delta;
2574
2575         /*
2576          * FIXME: until there is periodic timer to try and refill the ring,
2577          * a temporary shortage may definitely kill the Rx process.
2578          * - disable the asic to try and avoid an overflow and kick it again
2579          *   after refill ?
2580          * - how do others driver handle this condition (Uh oh...).
2581          */
2582         if ((tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) && netif_msg_intr(tp))
2583                 printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name);
2584
2585         return count;
2586 }
2587
2588 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
2589 static irqreturn_t
2590 rtl8169_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
2591 {
2592         struct net_device *dev = (struct net_device *) dev_instance;
2593         struct rtl8169_private *tp = netdev_priv(dev);
2594         int boguscnt = max_interrupt_work;
2595         void __iomem *ioaddr = tp->mmio_addr;
2596         int status;
2597         int handled = 0;
2598
2599         do {
2600                 status = RTL_R16(IntrStatus);
2601
2602                 /* hotplug/major error/no more work/shared irq */
2603                 if ((status == 0xFFFF) || !status)
2604                         break;
2605
2606                 handled = 1;
2607
2608                 if (unlikely(!netif_running(dev))) {
2609                         rtl8169_asic_down(ioaddr);
2610                         goto out;
2611                 }
2612
2613                 status &= tp->intr_mask;
2614                 RTL_W16(IntrStatus,
2615                         (status & RxFIFOOver) ? (status | RxOverflow) : status);
2616
2617                 if (!(status & rtl8169_intr_mask))
2618                         break;
2619
2620                 if (unlikely(status & SYSErr)) {
2621                         rtl8169_pcierr_interrupt(dev);
2622                         break;
2623                 }
2624
2625                 if (status & LinkChg)
2626                         rtl8169_check_link_status(dev, tp, ioaddr);
2627
2628 #ifdef CONFIG_R8169_NAPI
2629                 RTL_W16(IntrMask, rtl8169_intr_mask & ~rtl8169_napi_event);
2630                 tp->intr_mask = ~rtl8169_napi_event;
2631
2632                 if (likely(netif_rx_schedule_prep(dev)))
2633                         __netif_rx_schedule(dev);
2634                 else if (netif_msg_intr(tp)) {
2635                         printk(KERN_INFO "%s: interrupt %04x taken in poll\n",
2636                                dev->name, status);
2637                 }
2638                 break;
2639 #else
2640                 /* Rx interrupt */
2641                 if (status & (RxOK | RxOverflow | RxFIFOOver)) {
2642                         rtl8169_rx_interrupt(dev, tp, ioaddr);
2643                 }
2644                 /* Tx interrupt */
2645                 if (status & (TxOK | TxErr))
2646                         rtl8169_tx_interrupt(dev, tp, ioaddr);
2647 #endif
2648
2649                 boguscnt--;
2650         } while (boguscnt > 0);
2651
2652         if (boguscnt <= 0) {
2653                 if (netif_msg_intr(tp) && net_ratelimit() ) {
2654                         printk(KERN_WARNING
2655                                "%s: Too much work at interrupt!\n", dev->name);
2656                 }
2657                 /* Clear all interrupt sources. */
2658                 RTL_W16(IntrStatus, 0xffff);
2659         }
2660 out:
2661         return IRQ_RETVAL(handled);
2662 }
2663
2664 #ifdef CONFIG_R8169_NAPI
2665 static int rtl8169_poll(struct net_device *dev, int *budget)
2666 {
2667         unsigned int work_done, work_to_do = min(*budget, dev->quota);
2668         struct rtl8169_private *tp = netdev_priv(dev);
2669         void __iomem *ioaddr = tp->mmio_addr;
2670
2671         work_done = rtl8169_rx_interrupt(dev, tp, ioaddr);
2672         rtl8169_tx_interrupt(dev, tp, ioaddr);
2673
2674         *budget -= work_done;
2675         dev->quota -= work_done;
2676
2677         if (work_done < work_to_do) {
2678                 netif_rx_complete(dev);
2679                 tp->intr_mask = 0xffff;
2680                 /*
2681                  * 20040426: the barrier is not strictly required but the
2682                  * behavior of the irq handler could be less predictable
2683                  * without it. Btw, the lack of flush for the posted pci
2684                  * write is safe - FR
2685                  */
2686                 smp_wmb();
2687                 RTL_W16(IntrMask, rtl8169_intr_mask);
2688         }
2689
2690         return (work_done >= work_to_do);
2691 }
2692 #endif
2693
2694 static void rtl8169_down(struct net_device *dev)
2695 {
2696         struct rtl8169_private *tp = netdev_priv(dev);
2697         void __iomem *ioaddr = tp->mmio_addr;
2698         unsigned int poll_locked = 0;
2699
2700         rtl8169_delete_timer(dev);
2701
2702         netif_stop_queue(dev);
2703
2704         flush_scheduled_work();
2705
2706 core_down:
2707         spin_lock_irq(&tp->lock);
2708
2709         rtl8169_asic_down(ioaddr);
2710
2711         /* Update the error counts. */
2712         tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2713         RTL_W32(RxMissed, 0);
2714
2715         spin_unlock_irq(&tp->lock);
2716
2717         synchronize_irq(dev->irq);
2718
2719         if (!poll_locked) {
2720                 netif_poll_disable(dev);
2721                 poll_locked++;
2722         }
2723
2724         /* Give a racing hard_start_xmit a few cycles to complete. */
2725         synchronize_sched();  /* FIXME: should this be synchronize_irq()? */
2726
2727         /*
2728          * And now for the 50k$ question: are IRQ disabled or not ?
2729          *
2730          * Two paths lead here:
2731          * 1) dev->close
2732          *    -> netif_running() is available to sync the current code and the
2733          *       IRQ handler. See rtl8169_interrupt for details.
2734          * 2) dev->change_mtu
2735          *    -> rtl8169_poll can not be issued again and re-enable the
2736          *       interruptions. Let's simply issue the IRQ down sequence again.
2737          */
2738         if (RTL_R16(IntrMask))
2739                 goto core_down;
2740
2741         rtl8169_tx_clear(tp);
2742
2743         rtl8169_rx_clear(tp);
2744 }
2745
2746 static int rtl8169_close(struct net_device *dev)
2747 {
2748         struct rtl8169_private *tp = netdev_priv(dev);
2749         struct pci_dev *pdev = tp->pci_dev;
2750
2751         rtl8169_down(dev);
2752
2753         free_irq(dev->irq, dev);
2754
2755         netif_poll_enable(dev);
2756
2757         pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
2758                             tp->RxPhyAddr);
2759         pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
2760                             tp->TxPhyAddr);
2761         tp->TxDescArray = NULL;
2762         tp->RxDescArray = NULL;
2763
2764         return 0;
2765 }
2766
2767 static void
2768 rtl8169_set_rx_mode(struct net_device *dev)
2769 {
2770         struct rtl8169_private *tp = netdev_priv(dev);
2771         void __iomem *ioaddr = tp->mmio_addr;
2772         unsigned long flags;
2773         u32 mc_filter[2];       /* Multicast hash filter */
2774         int i, rx_mode;
2775         u32 tmp = 0;
2776
2777         if (dev->flags & IFF_PROMISC) {
2778                 /* Unconditionally log net taps. */
2779                 if (netif_msg_link(tp)) {
2780                         printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
2781                                dev->name);
2782                 }
2783                 rx_mode =
2784                     AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
2785                     AcceptAllPhys;
2786                 mc_filter[1] = mc_filter[0] = 0xffffffff;
2787         } else if ((dev->mc_count > multicast_filter_limit)
2788                    || (dev->flags & IFF_ALLMULTI)) {
2789                 /* Too many to filter perfectly -- accept all multicasts. */
2790                 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
2791                 mc_filter[1] = mc_filter[0] = 0xffffffff;
2792         } else {
2793                 struct dev_mc_list *mclist;
2794                 rx_mode = AcceptBroadcast | AcceptMyPhys;
2795                 mc_filter[1] = mc_filter[0] = 0;
2796                 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
2797                      i++, mclist = mclist->next) {
2798                         int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
2799                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2800                         rx_mode |= AcceptMulticast;
2801                 }
2802         }
2803
2804         spin_lock_irqsave(&tp->lock, flags);
2805
2806         tmp = rtl8169_rx_config | rx_mode |
2807               (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
2808
2809         if ((tp->mac_version == RTL_GIGA_MAC_VER_11) ||
2810             (tp->mac_version == RTL_GIGA_MAC_VER_12) ||
2811             (tp->mac_version == RTL_GIGA_MAC_VER_13) ||
2812             (tp->mac_version == RTL_GIGA_MAC_VER_14) ||
2813             (tp->mac_version == RTL_GIGA_MAC_VER_15)) {
2814                 mc_filter[0] = 0xffffffff;
2815                 mc_filter[1] = 0xffffffff;
2816         }
2817
2818         RTL_W32(RxConfig, tmp);
2819         RTL_W32(MAR0 + 0, mc_filter[0]);
2820         RTL_W32(MAR0 + 4, mc_filter[1]);
2821
2822         spin_unlock_irqrestore(&tp->lock, flags);
2823 }
2824
2825 /**
2826  *  rtl8169_get_stats - Get rtl8169 read/write statistics
2827  *  @dev: The Ethernet Device to get statistics for
2828  *
2829  *  Get TX/RX statistics for rtl8169
2830  */
2831 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
2832 {
2833         struct rtl8169_private *tp = netdev_priv(dev);
2834         void __iomem *ioaddr = tp->mmio_addr;
2835         unsigned long flags;
2836
2837         if (netif_running(dev)) {
2838                 spin_lock_irqsave(&tp->lock, flags);
2839                 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2840                 RTL_W32(RxMissed, 0);
2841                 spin_unlock_irqrestore(&tp->lock, flags);
2842         }
2843
2844         return &tp->stats;
2845 }
2846
2847 #ifdef CONFIG_PM
2848
2849 static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
2850 {
2851         struct net_device *dev = pci_get_drvdata(pdev);
2852         struct rtl8169_private *tp = netdev_priv(dev);
2853         void __iomem *ioaddr = tp->mmio_addr;
2854
2855         if (!netif_running(dev))
2856                 goto out;
2857
2858         netif_device_detach(dev);
2859         netif_stop_queue(dev);
2860
2861         spin_lock_irq(&tp->lock);
2862
2863         rtl8169_asic_down(ioaddr);
2864
2865         tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2866         RTL_W32(RxMissed, 0);
2867
2868         spin_unlock_irq(&tp->lock);
2869
2870         pci_save_state(pdev);
2871         pci_enable_wake(pdev, pci_choose_state(pdev, state), tp->wol_enabled);
2872         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2873 out:
2874         return 0;
2875 }
2876
2877 static int rtl8169_resume(struct pci_dev *pdev)
2878 {
2879         struct net_device *dev = pci_get_drvdata(pdev);
2880
2881         if (!netif_running(dev))
2882                 goto out;
2883
2884         netif_device_attach(dev);
2885
2886         pci_set_power_state(pdev, PCI_D0);
2887         pci_restore_state(pdev);
2888         pci_enable_wake(pdev, PCI_D0, 0);
2889
2890         rtl8169_schedule_work(dev, rtl8169_reset_task);
2891 out:
2892         return 0;
2893 }
2894
2895 #endif /* CONFIG_PM */
2896
2897 static struct pci_driver rtl8169_pci_driver = {
2898         .name           = MODULENAME,
2899         .id_table       = rtl8169_pci_tbl,
2900         .probe          = rtl8169_init_one,
2901         .remove         = __devexit_p(rtl8169_remove_one),
2902 #ifdef CONFIG_PM
2903         .suspend        = rtl8169_suspend,
2904         .resume         = rtl8169_resume,
2905 #endif
2906 };
2907
2908 static int __init
2909 rtl8169_init_module(void)
2910 {
2911         return pci_module_init(&rtl8169_pci_driver);
2912 }
2913
2914 static void __exit
2915 rtl8169_cleanup_module(void)
2916 {
2917         pci_unregister_driver(&rtl8169_pci_driver);
2918 }
2919
2920 module_init(rtl8169_init_module);
2921 module_exit(rtl8169_cleanup_module);