drivers/net/mlx4/main.c

   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
   4  * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
   5  * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
   6  *
   7  * This software is available to you under a choice of one of two
   8  * licenses.  You may choose to be licensed under the terms of the GNU
   9  * General Public License (GPL) Version 2, available from the file
  10  * COPYING in the main directory of this source tree, or the
  11  * OpenIB.org BSD license below:
  12  *
  13  *     Redistribution and use in source and binary forms, with or
  14  *     without modification, are permitted provided that the following
  15  *     conditions are met:
  16  *
  17  *      - Redistributions of source code must retain the above
  18  *        copyright notice, this list of conditions and the following
  19  *        disclaimer.
  20  *
  21  *      - Redistributions in binary form must reproduce the above
  22  *        copyright notice, this list of conditions and the following
  23  *        disclaimer in the documentation and/or other materials
  24  *        provided with the distribution.
  25  *
  26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33  * SOFTWARE.
  34  */
  35
  36 #include <linux/module.h>
  37 #include <linux/init.h>
  38 #include <linux/errno.h>
  39 #include <linux/pci.h>
  40 #include <linux/dma-mapping.h>
  41
  42 #include <linux/mlx4/device.h>
  43 #include <linux/mlx4/doorbell.h>
  44
  45 #include "mlx4.h"
  46 #include "fw.h"
  47 #include "icm.h"
  48
  49 MODULE_AUTHOR("Roland Dreier");
  50 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
  51 MODULE_LICENSE("Dual BSD/GPL");
  52 MODULE_VERSION(DRV_VERSION);
  53
  54 #ifdef CONFIG_MLX4_DEBUG
  55
  56 int mlx4_debug_level = 0;
  57 module_param_named(debug_level, mlx4_debug_level, int, 0644);
  58 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
  59
  60 #endif /* CONFIG_MLX4_DEBUG */
  61
  62 #ifdef CONFIG_PCI_MSI
  63
  64 static int msi_x;
  65 module_param(msi_x, int, 0444);
  66 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
  67
  68 #else /* CONFIG_PCI_MSI */
  69
  70 #define msi_x (0)
  71
  72 #endif /* CONFIG_PCI_MSI */
  73
  74 static const char mlx4_version[] __devinitdata =
  75         DRV_NAME ": Mellanox ConnectX core driver v"
  76         DRV_VERSION " (" DRV_RELDATE ")\n";
  77
  78 static struct mlx4_profile default_profile = {
  79         .num_qp         = 1 << 16,
  80         .num_srq        = 1 << 16,
  81         .rdmarc_per_qp  = 4,
  82         .num_cq         = 1 << 16,
  83         .num_mcg        = 1 << 13,
  84         .num_mpt        = 1 << 17,
  85         .num_mtt        = 1 << 20,
  86 };
  87
  88 static int __devinit mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
  89 {
  90         int err;
  91         int i;
  92
  93         err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
  94         if (err) {
  95                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
  96                 return err;
  97         }
  98
  99         if (dev_cap->min_page_sz > PAGE_SIZE) {
 100                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 101                          "kernel PAGE_SIZE of %ld, aborting.\n",
 102                          dev_cap->min_page_sz, PAGE_SIZE);
 103                 return -ENODEV;
 104         }
 105         if (dev_cap->num_ports > MLX4_MAX_PORTS) {
 106                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 107                          "aborting.\n",
 108                          dev_cap->num_ports, MLX4_MAX_PORTS);
 109                 return -ENODEV;
 110         }
 111
 112         if (dev_cap->uar_size > pci_resource_len(dev->pdev, 2)) {
 113                 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than "
 114                          "PCI resource 2 size of 0x%llx, aborting.\n",
 115                          dev_cap->uar_size,
 116                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 117                 return -ENODEV;
 118         }
 119
 120         dev->caps.num_ports          = dev_cap->num_ports;
 121         for (i = 1; i <= dev->caps.num_ports; ++i) {
 122                 dev->caps.vl_cap[i]         = dev_cap->max_vl[i];
 123                 dev->caps.mtu_cap[i]        = dev_cap->max_mtu[i];
 124                 dev->caps.gid_table_len[i]  = dev_cap->max_gids[i];
 125                 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
 126                 dev->caps.port_width_cap[i] = dev_cap->max_port_width[i];
 127         }
 128
 129         dev->caps.num_uars           = dev_cap->uar_size / PAGE_SIZE;
 130         dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
 131         dev->caps.bf_reg_size        = dev_cap->bf_reg_size;
 132         dev->caps.bf_regs_per_page   = dev_cap->bf_regs_per_page;
 133         dev->caps.max_sq_sg          = dev_cap->max_sq_sg;
 134         dev->caps.max_rq_sg          = dev_cap->max_rq_sg;
 135         dev->caps.max_wqes           = dev_cap->max_qp_sz;
 136         dev->caps.max_qp_init_rdma   = dev_cap->max_requester_per_qp;
 137         dev->caps.reserved_qps       = dev_cap->reserved_qps;
 138         dev->caps.max_srq_wqes       = dev_cap->max_srq_sz;
 139         dev->caps.max_srq_sge        = dev_cap->max_rq_sg - 1;
 140         dev->caps.reserved_srqs      = dev_cap->reserved_srqs;
 141         dev->caps.max_sq_desc_sz     = dev_cap->max_sq_desc_sz;
 142         dev->caps.max_rq_desc_sz     = dev_cap->max_rq_desc_sz;
 143         dev->caps.num_qp_per_mgm     = MLX4_QP_PER_MGM;
 144         /*
 145          * Subtract 1 from the limit because we need to allocate a
 146          * spare CQE so the HCA HW can tell the difference between an
 147          * empty CQ and a full CQ.
 148          */
 149         dev->caps.max_cqes           = dev_cap->max_cq_sz - 1;
 150         dev->caps.reserved_cqs       = dev_cap->reserved_cqs;
 151         dev->caps.reserved_eqs       = dev_cap->reserved_eqs;
 152         dev->caps.reserved_mtts      = dev_cap->reserved_mtts;
 153         dev->caps.reserved_mrws      = dev_cap->reserved_mrws;
 154         dev->caps.reserved_uars      = dev_cap->reserved_uars;
 155         dev->caps.reserved_pds       = dev_cap->reserved_pds;
 156         dev->caps.mtt_entry_sz       = MLX4_MTT_ENTRY_PER_SEG * dev_cap->mtt_entry_sz;
 157         dev->caps.max_msg_sz         = dev_cap->max_msg_sz;
 158         dev->caps.page_size_cap      = ~(u32) (dev_cap->min_page_sz - 1);
 159         dev->caps.flags              = dev_cap->flags;
 160         dev->caps.stat_rate_support  = dev_cap->stat_rate_support;
 161
 162         return 0;
 163 }
 164
 165 static int __devinit mlx4_load_fw(struct mlx4_dev *dev)
 166 {
 167         struct mlx4_priv *priv = mlx4_priv(dev);
 168         int err;
 169
 170         priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages,
 171                                          GFP_HIGHUSER | __GFP_NOWARN);
 172         if (!priv->fw.fw_icm) {
 173                 mlx4_err(dev, "Couldn't allocate FW area, aborting.\n");
 174                 return -ENOMEM;
 175         }
 176
 177         err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
 178         if (err) {
 179                 mlx4_err(dev, "MAP_FA command failed, aborting.\n");
 180                 goto err_free;
 181         }
 182
 183         err = mlx4_RUN_FW(dev);
 184         if (err) {
 185                 mlx4_err(dev, "RUN_FW command failed, aborting.\n");
 186                 goto err_unmap_fa;
 187         }
 188
 189         return 0;
 190
 191 err_unmap_fa:
 192         mlx4_UNMAP_FA(dev);
 193
 194 err_free:
 195         mlx4_free_icm(dev, priv->fw.fw_icm);
 196         return err;
 197 }
 198
 199 static int __devinit mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
 200                                           int cmpt_entry_sz)
 201 {
 202         struct mlx4_priv *priv = mlx4_priv(dev);
 203         int err;
 204
 205         err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
 206                                   cmpt_base +
 207                                   ((u64) (MLX4_CMPT_TYPE_QP *
 208                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 209                                   cmpt_entry_sz, dev->caps.num_qps,
 210                                   dev->caps.reserved_qps, 0);
 211         if (err)
 212                 goto err;
 213
 214         err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
 215                                   cmpt_base +
 216                                   ((u64) (MLX4_CMPT_TYPE_SRQ *
 217                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 218                                   cmpt_entry_sz, dev->caps.num_srqs,
 219                                   dev->caps.reserved_srqs, 0);
 220         if (err)
 221                 goto err_qp;
 222
 223         err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
 224                                   cmpt_base +
 225                                   ((u64) (MLX4_CMPT_TYPE_CQ *
 226                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 227                                   cmpt_entry_sz, dev->caps.num_cqs,
 228                                   dev->caps.reserved_cqs, 0);
 229         if (err)
 230                 goto err_srq;
 231
 232         err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
 233                                   cmpt_base +
 234                                   ((u64) (MLX4_CMPT_TYPE_EQ *
 235                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 236                                   cmpt_entry_sz,
 237                                   roundup_pow_of_two(MLX4_NUM_EQ +
 238                                                      dev->caps.reserved_eqs),
 239                                   MLX4_NUM_EQ + dev->caps.reserved_eqs, 0);
 240         if (err)
 241                 goto err_cq;
 242
 243         return 0;
 244
 245 err_cq:
 246         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 247
 248 err_srq:
 249         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 250
 251 err_qp:
 252         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 253
 254 err:
 255         return err;
 256 }
 257
 258 static int __devinit mlx4_init_icm(struct mlx4_dev *dev,
 259                                    struct mlx4_dev_cap *dev_cap,
 260                                    struct mlx4_init_hca_param *init_hca,
 261                                    u64 icm_size)
 262 {
 263         struct mlx4_priv *priv = mlx4_priv(dev);
 264         u64 aux_pages;
 265         int err;
 266
 267         err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
 268         if (err) {
 269                 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n");
 270                 return err;
 271         }
 272
 273         mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n",
 274                  (unsigned long long) icm_size >> 10,
 275                  (unsigned long long) aux_pages << 2);
 276
 277         priv->fw.aux_icm = mlx4_alloc_icm(dev, aux_pages,
 278                                           GFP_HIGHUSER | __GFP_NOWARN);
 279         if (!priv->fw.aux_icm) {
 280                 mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n");
 281                 return -ENOMEM;
 282         }
 283
 284         err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
 285         if (err) {
 286                 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n");
 287                 goto err_free_aux;
 288         }
 289
 290         err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
 291         if (err) {
 292                 mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n");
 293                 goto err_unmap_aux;
 294         }
 295
 296         err = mlx4_map_eq_icm(dev, init_hca->eqc_base);
 297         if (err) {
 298                 mlx4_err(dev, "Failed to map EQ context memory, aborting.\n");
 299                 goto err_unmap_cmpt;
 300         }
 301
 302         err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
 303                                   init_hca->mtt_base,
 304                                   dev->caps.mtt_entry_sz,
 305                                   dev->caps.num_mtt_segs,
 306                                   dev->caps.reserved_mtts, 1);
 307         if (err) {
 308                 mlx4_err(dev, "Failed to map MTT context memory, aborting.\n");
 309                 goto err_unmap_eq;
 310         }
 311
 312         err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
 313                                   init_hca->dmpt_base,
 314                                   dev_cap->dmpt_entry_sz,
 315                                   dev->caps.num_mpts,
 316                                   dev->caps.reserved_mrws, 1);
 317         if (err) {
 318                 mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n");
 319                 goto err_unmap_mtt;
 320         }
 321
 322         err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
 323                                   init_hca->qpc_base,
 324                                   dev_cap->qpc_entry_sz,
 325                                   dev->caps.num_qps,
 326                                   dev->caps.reserved_qps, 0);
 327         if (err) {
 328                 mlx4_err(dev, "Failed to map QP context memory, aborting.\n");
 329                 goto err_unmap_dmpt;
 330         }
 331
 332         err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
 333                                   init_hca->auxc_base,
 334                                   dev_cap->aux_entry_sz,
 335                                   dev->caps.num_qps,
 336                                   dev->caps.reserved_qps, 0);
 337         if (err) {
 338                 mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n");
 339                 goto err_unmap_qp;
 340         }
 341
 342         err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
 343                                   init_hca->altc_base,
 344                                   dev_cap->altc_entry_sz,
 345                                   dev->caps.num_qps,
 346                                   dev->caps.reserved_qps, 0);
 347         if (err) {
 348                 mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n");
 349                 goto err_unmap_auxc;
 350         }
 351
 352         err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
 353                                   init_hca->rdmarc_base,
 354                                   dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift,
 355                                   dev->caps.num_qps,
 356                                   dev->caps.reserved_qps, 0);
 357         if (err) {
 358                 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n");
 359                 goto err_unmap_altc;
 360         }
 361
 362         err = mlx4_init_icm_table(dev, &priv->cq_table.table,
 363                                   init_hca->cqc_base,
 364                                   dev_cap->cqc_entry_sz,
 365                                   dev->caps.num_cqs,
 366                                   dev->caps.reserved_cqs, 0);
 367         if (err) {
 368                 mlx4_err(dev, "Failed to map CQ context memory, aborting.\n");
 369                 goto err_unmap_rdmarc;
 370         }
 371
 372         err = mlx4_init_icm_table(dev, &priv->srq_table.table,
 373                                   init_hca->srqc_base,
 374                                   dev_cap->srq_entry_sz,
 375                                   dev->caps.num_srqs,
 376                                   dev->caps.reserved_srqs, 0);
 377         if (err) {
 378                 mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n");
 379                 goto err_unmap_cq;
 380         }
 381
 382         /*
 383          * It's not strictly required, but for simplicity just map the
 384          * whole multicast group table now.  The table isn't very big
 385          * and it's a lot easier than trying to track ref counts.
 386          */
 387         err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
 388                                   init_hca->mc_base, MLX4_MGM_ENTRY_SIZE,
 389                                   dev->caps.num_mgms + dev->caps.num_amgms,
 390                                   dev->caps.num_mgms + dev->caps.num_amgms,
 391                                   0);
 392         if (err) {
 393                 mlx4_err(dev, "Failed to map MCG context memory, aborting.\n");
 394                 goto err_unmap_srq;
 395         }
 396
 397         return 0;
 398
 399 err_unmap_srq:
 400         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
 401
 402 err_unmap_cq:
 403         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
 404
 405 err_unmap_rdmarc:
 406         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
 407
 408 err_unmap_altc:
 409         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
 410
 411 err_unmap_auxc:
 412         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
 413
 414 err_unmap_qp:
 415         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
 416
 417 err_unmap_dmpt:
 418         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
 419
 420 err_unmap_mtt:
 421         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
 422
 423 err_unmap_eq:
 424         mlx4_unmap_eq_icm(dev);
 425
 426 err_unmap_cmpt:
 427         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
 428         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 429         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 430         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 431
 432 err_unmap_aux:
 433         mlx4_UNMAP_ICM_AUX(dev);
 434
 435 err_free_aux:
 436         mlx4_free_icm(dev, priv->fw.aux_icm);
 437
 438         return err;
 439 }
 440
 441 static void mlx4_free_icms(struct mlx4_dev *dev)
 442 {
 443         struct mlx4_priv *priv = mlx4_priv(dev);
 444
 445         mlx4_cleanup_icm_table(dev, &priv->mcg_table.table);
 446         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
 447         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
 448         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
 449         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
 450         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
 451         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
 452         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
 453         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
 454         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
 455         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 456         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 457         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 458         mlx4_unmap_eq_icm(dev);
 459
 460         mlx4_UNMAP_ICM_AUX(dev);
 461         mlx4_free_icm(dev, priv->fw.aux_icm);
 462 }
 463
 464 static void mlx4_close_hca(struct mlx4_dev *dev)
 465 {
 466         mlx4_CLOSE_HCA(dev, 0);
 467         mlx4_free_icms(dev);
 468         mlx4_UNMAP_FA(dev);
 469         mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm);
 470 }
 471
 472 static int __devinit mlx4_init_hca(struct mlx4_dev *dev)
 473 {
 474         struct mlx4_priv          *priv = mlx4_priv(dev);
 475         struct mlx4_adapter        adapter;
 476         struct mlx4_dev_cap        dev_cap;
 477         struct mlx4_profile        profile;
 478         struct mlx4_init_hca_param init_hca;
 479         u64 icm_size;
 480         int err;
 481
 482         err = mlx4_QUERY_FW(dev);
 483         if (err) {
 484                 mlx4_err(dev, "QUERY_FW command failed, aborting.\n");
 485                 return err;
 486         }
 487
 488         err = mlx4_load_fw(dev);
 489         if (err) {
 490                 mlx4_err(dev, "Failed to start FW, aborting.\n");
 491                 return err;
 492         }
 493
 494         err = mlx4_dev_cap(dev, &dev_cap);
 495         if (err) {
 496                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 497                 goto err_stop_fw;
 498         }
 499
 500         profile = default_profile;
 501
 502         icm_size = mlx4_make_profile(dev, &profile, &dev_cap, &init_hca);
 503         if ((long long) icm_size < 0) {
 504                 err = icm_size;
 505                 goto err_stop_fw;
 506         }
 507
 508         init_hca.log_uar_sz = ilog2(dev->caps.num_uars);
 509
 510         err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
 511         if (err)
 512                 goto err_stop_fw;
 513
 514         err = mlx4_INIT_HCA(dev, &init_hca);
 515         if (err) {
 516                 mlx4_err(dev, "INIT_HCA command failed, aborting.\n");
 517                 goto err_free_icm;
 518         }
 519
 520         err = mlx4_QUERY_ADAPTER(dev, &adapter);
 521         if (err) {
 522                 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n");
 523                 goto err_close;
 524         }
 525
 526         priv->eq_table.inta_pin = adapter.inta_pin;
 527         priv->rev_id            = adapter.revision_id;
 528         memcpy(priv->board_id, adapter.board_id, sizeof priv->board_id);
 529
 530         return 0;
 531
 532 err_close:
 533         mlx4_close_hca(dev);
 534
 535 err_free_icm:
 536         mlx4_free_icms(dev);
 537
 538 err_stop_fw:
 539         mlx4_UNMAP_FA(dev);
 540         mlx4_free_icm(dev, priv->fw.fw_icm);
 541
 542         return err;
 543 }
 544
 545 static int __devinit mlx4_setup_hca(struct mlx4_dev *dev)
 546 {
 547         struct mlx4_priv *priv = mlx4_priv(dev);
 548         int err;
 549
 550         err = mlx4_init_uar_table(dev);
 551         if (err) {
 552                 mlx4_err(dev, "Failed to initialize "
 553                          "user access region table, aborting.\n");
 554                 return err;
 555         }
 556
 557         err = mlx4_uar_alloc(dev, &priv->driver_uar);
 558         if (err) {
 559                 mlx4_err(dev, "Failed to allocate driver access region, "
 560                          "aborting.\n");
 561                 goto err_uar_table_free;
 562         }
 563
 564         priv->kar = ioremap(priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
 565         if (!priv->kar) {
 566                 mlx4_err(dev, "Couldn't map kernel access region, "
 567                          "aborting.\n");
 568                 err = -ENOMEM;
 569                 goto err_uar_free;
 570         }
 571
 572         err = mlx4_init_pd_table(dev);
 573         if (err) {
 574                 mlx4_err(dev, "Failed to initialize "
 575                          "protection domain table, aborting.\n");
 576                 goto err_kar_unmap;
 577         }
 578
 579         err = mlx4_init_mr_table(dev);
 580         if (err) {
 581                 mlx4_err(dev, "Failed to initialize "
 582                          "memory region table, aborting.\n");
 583                 goto err_pd_table_free;
 584         }
 585
 586         mlx4_map_catas_buf(dev);
 587
 588         err = mlx4_init_eq_table(dev);
 589         if (err) {
 590                 mlx4_err(dev, "Failed to initialize "
 591                          "event queue table, aborting.\n");
 592                 goto err_catas_buf;
 593         }
 594
 595         err = mlx4_cmd_use_events(dev);
 596         if (err) {
 597                 mlx4_err(dev, "Failed to switch to event-driven "
 598                          "firmware commands, aborting.\n");
 599                 goto err_eq_table_free;
 600         }
 601
 602         err = mlx4_NOP(dev);
 603         if (err) {
 604                 mlx4_err(dev, "NOP command failed to generate interrupt "
 605                          "(IRQ %d), aborting.\n",
 606                          priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
 607                 if (dev->flags & MLX4_FLAG_MSI_X)
 608                         mlx4_err(dev, "Try again with MSI-X disabled.\n");
 609                 else
 610                         mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n");
 611
 612                 goto err_cmd_poll;
 613         }
 614
 615         mlx4_dbg(dev, "NOP command IRQ test passed\n");
 616
 617         err = mlx4_init_cq_table(dev);
 618         if (err) {
 619                 mlx4_err(dev, "Failed to initialize "
 620                          "completion queue table, aborting.\n");
 621                 goto err_cmd_poll;
 622         }
 623
 624         err = mlx4_init_srq_table(dev);
 625         if (err) {
 626                 mlx4_err(dev, "Failed to initialize "
 627                          "shared receive queue table, aborting.\n");
 628                 goto err_cq_table_free;
 629         }
 630
 631         err = mlx4_init_qp_table(dev);
 632         if (err) {
 633                 mlx4_err(dev, "Failed to initialize "
 634                          "queue pair table, aborting.\n");
 635                 goto err_srq_table_free;
 636         }
 637
 638         err = mlx4_init_mcg_table(dev);
 639         if (err) {
 640                 mlx4_err(dev, "Failed to initialize "
 641                          "multicast group table, aborting.\n");
 642                 goto err_qp_table_free;
 643         }
 644
 645         return 0;
 646
 647 err_qp_table_free:
 648         mlx4_cleanup_qp_table(dev);
 649
 650 err_srq_table_free:
 651         mlx4_cleanup_srq_table(dev);
 652
 653 err_cq_table_free:
 654         mlx4_cleanup_cq_table(dev);
 655
 656 err_cmd_poll:
 657         mlx4_cmd_use_polling(dev);
 658
 659 err_eq_table_free:
 660         mlx4_cleanup_eq_table(dev);
 661
 662 err_catas_buf:
 663         mlx4_unmap_catas_buf(dev);
 664         mlx4_cleanup_mr_table(dev);
 665
 666 err_pd_table_free:
 667         mlx4_cleanup_pd_table(dev);
 668
 669 err_kar_unmap:
 670         iounmap(priv->kar);
 671
 672 err_uar_free:
 673         mlx4_uar_free(dev, &priv->driver_uar);
 674
 675 err_uar_table_free:
 676         mlx4_cleanup_uar_table(dev);
 677         return err;
 678 }
 679
 680 static void __devinit mlx4_enable_msi_x(struct mlx4_dev *dev)
 681 {
 682         struct mlx4_priv *priv = mlx4_priv(dev);
 683         struct msix_entry entries[MLX4_NUM_EQ];
 684         int err;
 685         int i;
 686
 687         if (msi_x) {
 688                 for (i = 0; i < MLX4_NUM_EQ; ++i)
 689                         entries[i].entry = i;
 690
 691                 err = pci_enable_msix(dev->pdev, entries, ARRAY_SIZE(entries));
 692                 if (err) {
 693                         if (err > 0)
 694                                 mlx4_info(dev, "Only %d MSI-X vectors available, "
 695                                           "not using MSI-X\n", err);
 696                         goto no_msi;
 697                 }
 698
 699                 for (i = 0; i < MLX4_NUM_EQ; ++i)
 700                         priv->eq_table.eq[i].irq = entries[i].vector;
 701
 702                 dev->flags |= MLX4_FLAG_MSI_X;
 703                 return;
 704         }
 705
 706 no_msi:
 707         for (i = 0; i < MLX4_NUM_EQ; ++i)
 708                 priv->eq_table.eq[i].irq = dev->pdev->irq;
 709 }
 710
 711 static int __devinit mlx4_init_one(struct pci_dev *pdev,
 712                                    const struct pci_device_id *id)
 713 {
 714         static int mlx4_version_printed;
 715         struct mlx4_priv *priv;
 716         struct mlx4_dev *dev;
 717         int err;
 718
 719         if (!mlx4_version_printed) {
 720                 printk(KERN_INFO "%s", mlx4_version);
 721                 ++mlx4_version_printed;
 722         }
 723
 724         printk(KERN_INFO PFX "Initializing %s\n",
 725                pci_name(pdev));
 726
 727         err = pci_enable_device(pdev);
 728         if (err) {
 729                 dev_err(&pdev->dev, "Cannot enable PCI device, "
 730                         "aborting.\n");
 731                 return err;
 732         }
 733
 734         /*
 735          * Check for BARs.  We expect 0: 1MB, 2: 8MB, 4: DDR (may not
 736          * be present)
 737          */
 738         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
 739             pci_resource_len(pdev, 0) != 1 << 20) {
 740                 dev_err(&pdev->dev, "Missing DCS, aborting.\n");
 741                 err = -ENODEV;
 742                 goto err_disable_pdev;
 743         }
 744         if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
 745                 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
 746                 err = -ENODEV;
 747                 goto err_disable_pdev;
 748         }
 749
 750         err = pci_request_region(pdev, 0, DRV_NAME);
 751         if (err) {
 752                 dev_err(&pdev->dev, "Cannot request control region, aborting.\n");
 753                 goto err_disable_pdev;
 754         }
 755
 756         err = pci_request_region(pdev, 2, DRV_NAME);
 757         if (err) {
 758                 dev_err(&pdev->dev, "Cannot request UAR region, aborting.\n");
 759                 goto err_release_bar0;
 760         }
 761
 762         pci_set_master(pdev);
 763
 764         err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
 765         if (err) {
 766                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
 767                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
 768                 if (err) {
 769                         dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
 770                         goto err_release_bar2;
 771                 }
 772         }
 773         err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
 774         if (err) {
 775                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
 776                          "consistent PCI DMA mask.\n");
 777                 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
 778                 if (err) {
 779                         dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
 780                                 "aborting.\n");
 781                         goto err_release_bar2;
 782                 }
 783         }
 784
 785         priv = kzalloc(sizeof *priv, GFP_KERNEL);
 786         if (!priv) {
 787                 dev_err(&pdev->dev, "Device struct alloc failed, "
 788                         "aborting.\n");
 789                 err = -ENOMEM;
 790                 goto err_release_bar2;
 791         }
 792
 793         dev       = &priv->dev;
 794         dev->pdev = pdev;
 795         INIT_LIST_HEAD(&priv->ctx_list);
 796         spin_lock_init(&priv->ctx_lock);
 797
 798         /*
 799          * Now reset the HCA before we touch the PCI capabilities or
 800          * attempt a firmware command, since a boot ROM may have left
 801          * the HCA in an undefined state.
 802          */
 803         err = mlx4_reset(dev);
 804         if (err) {
 805                 mlx4_err(dev, "Failed to reset HCA, aborting.\n");
 806                 goto err_free_dev;
 807         }
 808
 809         mlx4_enable_msi_x(dev);
 810
 811         if (mlx4_cmd_init(dev)) {
 812                 mlx4_err(dev, "Failed to init command interface, aborting.\n");
 813                 goto err_free_dev;
 814         }
 815
 816         err = mlx4_init_hca(dev);
 817         if (err)
 818                 goto err_cmd;
 819
 820         err = mlx4_setup_hca(dev);
 821         if (err)
 822                 goto err_close;
 823
 824         err = mlx4_register_device(dev);
 825         if (err)
 826                 goto err_cleanup;
 827
 828         pci_set_drvdata(pdev, dev);
 829
 830         return 0;
 831
 832 err_cleanup:
 833         mlx4_cleanup_mcg_table(dev);
 834         mlx4_cleanup_qp_table(dev);
 835         mlx4_cleanup_srq_table(dev);
 836         mlx4_cleanup_cq_table(dev);
 837         mlx4_cmd_use_polling(dev);
 838         mlx4_cleanup_eq_table(dev);
 839
 840         mlx4_unmap_catas_buf(dev);
 841
 842         mlx4_cleanup_mr_table(dev);
 843         mlx4_cleanup_pd_table(dev);
 844         mlx4_cleanup_uar_table(dev);
 845
 846 err_close:
 847         mlx4_close_hca(dev);
 848
 849 err_cmd:
 850         mlx4_cmd_cleanup(dev);
 851
 852 err_free_dev:
 853         if (dev->flags & MLX4_FLAG_MSI_X)
 854                 pci_disable_msix(pdev);
 855
 856         kfree(priv);
 857
 858 err_release_bar2:
 859         pci_release_region(pdev, 2);
 860
 861 err_release_bar0:
 862         pci_release_region(pdev, 0);
 863
 864 err_disable_pdev:
 865         pci_disable_device(pdev);
 866         pci_set_drvdata(pdev, NULL);
 867         return err;
 868 }
 869
 870 static void __devexit mlx4_remove_one(struct pci_dev *pdev)
 871 {
 872         struct mlx4_dev  *dev  = pci_get_drvdata(pdev);
 873         struct mlx4_priv *priv = mlx4_priv(dev);
 874         int p;
 875
 876         if (dev) {
 877                 mlx4_unregister_device(dev);
 878
 879                 for (p = 1; p <= dev->caps.num_ports; ++p)
 880                         mlx4_CLOSE_PORT(dev, p);
 881
 882                 mlx4_cleanup_mcg_table(dev);
 883                 mlx4_cleanup_qp_table(dev);
 884                 mlx4_cleanup_srq_table(dev);
 885                 mlx4_cleanup_cq_table(dev);
 886                 mlx4_cmd_use_polling(dev);
 887                 mlx4_cleanup_eq_table(dev);
 888
 889                 mlx4_unmap_catas_buf(dev);
 890
 891                 mlx4_cleanup_mr_table(dev);
 892                 mlx4_cleanup_pd_table(dev);
 893
 894                 iounmap(priv->kar);
 895                 mlx4_uar_free(dev, &priv->driver_uar);
 896                 mlx4_cleanup_uar_table(dev);
 897                 mlx4_close_hca(dev);
 898                 mlx4_cmd_cleanup(dev);
 899
 900                 if (dev->flags & MLX4_FLAG_MSI_X)
 901                         pci_disable_msix(pdev);
 902
 903                 kfree(priv);
 904                 pci_release_region(pdev, 2);
 905                 pci_release_region(pdev, 0);
 906                 pci_disable_device(pdev);
 907                 pci_set_drvdata(pdev, NULL);
 908         }
 909 }
 910
 911 static struct pci_device_id mlx4_pci_table[] = {
 912         { PCI_VDEVICE(MELLANOX, 0x6340) }, /* MT25408 "Hermon" SDR */
 913         { PCI_VDEVICE(MELLANOX, 0x634a) }, /* MT25408 "Hermon" DDR */
 914         { PCI_VDEVICE(MELLANOX, 0x6354) }, /* MT25408 "Hermon" QDR */
 915         { PCI_VDEVICE(MELLANOX, 0x6732) }, /* MT25408 "Hermon" DDR PCIe gen2 */
 916         { PCI_VDEVICE(MELLANOX, 0x673c) }, /* MT25408 "Hermon" QDR PCIe gen2 */
 917         { 0, }
 918 };
 919
 920 MODULE_DEVICE_TABLE(pci, mlx4_pci_table);
 921
 922 static struct pci_driver mlx4_driver = {
 923         .name           = DRV_NAME,
 924         .id_table       = mlx4_pci_table,
 925         .probe          = mlx4_init_one,
 926         .remove         = __devexit_p(mlx4_remove_one)
 927 };
 928
 929 static int __init mlx4_init(void)
 930 {
 931         int ret;
 932
 933         ret = pci_register_driver(&mlx4_driver);
 934         return ret < 0 ? ret : 0;
 935 }
 936
 937 static void __exit mlx4_cleanup(void)
 938 {
 939         pci_unregister_driver(&mlx4_driver);
 940 }
 941
 942 module_init(mlx4_init);
 943 module_exit(mlx4_cleanup);