drivers/net/mlx4/main.c

   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
   4  * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
   5  * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
   6  *
   7  * This software is available to you under a choice of one of two
   8  * licenses.  You may choose to be licensed under the terms of the GNU
   9  * General Public License (GPL) Version 2, available from the file
  10  * COPYING in the main directory of this source tree, or the
  11  * OpenIB.org BSD license below:
  12  *
  13  *     Redistribution and use in source and binary forms, with or
  14  *     without modification, are permitted provided that the following
  15  *     conditions are met:
  16  *
  17  *      - Redistributions of source code must retain the above
  18  *        copyright notice, this list of conditions and the following
  19  *        disclaimer.
  20  *
  21  *      - Redistributions in binary form must reproduce the above
  22  *        copyright notice, this list of conditions and the following
  23  *        disclaimer in the documentation and/or other materials
  24  *        provided with the distribution.
  25  *
  26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33  * SOFTWARE.
  34  */
  35
  36 #include <linux/module.h>
  37 #include <linux/init.h>
  38 #include <linux/errno.h>
  39 #include <linux/pci.h>
  40 #include <linux/dma-mapping.h>
  41
  42 #include <linux/mlx4/device.h>
  43 #include <linux/mlx4/doorbell.h>
  44
  45 #include "mlx4.h"
  46 #include "fw.h"
  47 #include "icm.h"
  48
  49 MODULE_AUTHOR("Roland Dreier");
  50 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
  51 MODULE_LICENSE("Dual BSD/GPL");
  52 MODULE_VERSION(DRV_VERSION);
  53
  54 #ifdef CONFIG_MLX4_DEBUG
  55
  56 int mlx4_debug_level = 0;
  57 module_param_named(debug_level, mlx4_debug_level, int, 0644);
  58 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
  59
  60 #endif /* CONFIG_MLX4_DEBUG */
  61
  62 #ifdef CONFIG_PCI_MSI
  63
  64 static int msi_x = 1;
  65 module_param(msi_x, int, 0444);
  66 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
  67
  68 #else /* CONFIG_PCI_MSI */
  69
  70 #define msi_x (0)
  71
  72 #endif /* CONFIG_PCI_MSI */
  73
  74 static char mlx4_version[] __devinitdata =
  75         DRV_NAME ": Mellanox ConnectX core driver v"
  76         DRV_VERSION " (" DRV_RELDATE ")\n";
  77
  78 static struct mlx4_profile default_profile = {
  79         .num_qp         = 1 << 17,
  80         .num_srq        = 1 << 16,
  81         .rdmarc_per_qp  = 1 << 4,
  82         .num_cq         = 1 << 16,
  83         .num_mcg        = 1 << 13,
  84         .num_mpt        = 1 << 17,
  85         .num_mtt        = 1 << 20,
  86 };
  87
  88 static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
  89 {
  90         int err;
  91         int i;
  92
  93         err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
  94         if (err) {
  95                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
  96                 return err;
  97         }
  98
  99         if (dev_cap->min_page_sz > PAGE_SIZE) {
 100                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 101                          "kernel PAGE_SIZE of %ld, aborting.\n",
 102                          dev_cap->min_page_sz, PAGE_SIZE);
 103                 return -ENODEV;
 104         }
 105         if (dev_cap->num_ports > MLX4_MAX_PORTS) {
 106                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 107                          "aborting.\n",
 108                          dev_cap->num_ports, MLX4_MAX_PORTS);
 109                 return -ENODEV;
 110         }
 111
 112         if (dev_cap->uar_size > pci_resource_len(dev->pdev, 2)) {
 113                 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than "
 114                          "PCI resource 2 size of 0x%llx, aborting.\n",
 115                          dev_cap->uar_size,
 116                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 117                 return -ENODEV;
 118         }
 119
 120         dev->caps.num_ports          = dev_cap->num_ports;
 121         for (i = 1; i <= dev->caps.num_ports; ++i) {
 122                 dev->caps.vl_cap[i]         = dev_cap->max_vl[i];
 123                 dev->caps.mtu_cap[i]        = dev_cap->max_mtu[i];
 124                 dev->caps.gid_table_len[i]  = dev_cap->max_gids[i];
 125                 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
 126                 dev->caps.port_width_cap[i] = dev_cap->max_port_width[i];
 127         }
 128
 129         dev->caps.num_uars           = dev_cap->uar_size / PAGE_SIZE;
 130         dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
 131         dev->caps.bf_reg_size        = dev_cap->bf_reg_size;
 132         dev->caps.bf_regs_per_page   = dev_cap->bf_regs_per_page;
 133         dev->caps.max_sq_sg          = dev_cap->max_sq_sg;
 134         dev->caps.max_rq_sg          = dev_cap->max_rq_sg;
 135         dev->caps.max_wqes           = dev_cap->max_qp_sz;
 136         dev->caps.max_qp_init_rdma   = dev_cap->max_requester_per_qp;
 137         dev->caps.reserved_qps       = dev_cap->reserved_qps;
 138         dev->caps.max_srq_wqes       = dev_cap->max_srq_sz;
 139         dev->caps.max_srq_sge        = dev_cap->max_rq_sg - 1;
 140         dev->caps.reserved_srqs      = dev_cap->reserved_srqs;
 141         dev->caps.max_sq_desc_sz     = dev_cap->max_sq_desc_sz;
 142         dev->caps.max_rq_desc_sz     = dev_cap->max_rq_desc_sz;
 143         dev->caps.num_qp_per_mgm     = MLX4_QP_PER_MGM;
 144         /*
 145          * Subtract 1 from the limit because we need to allocate a
 146          * spare CQE so the HCA HW can tell the difference between an
 147          * empty CQ and a full CQ.
 148          */
 149         dev->caps.max_cqes           = dev_cap->max_cq_sz - 1;
 150         dev->caps.reserved_cqs       = dev_cap->reserved_cqs;
 151         dev->caps.reserved_eqs       = dev_cap->reserved_eqs;
 152         dev->caps.reserved_mtts      = DIV_ROUND_UP(dev_cap->reserved_mtts,
 153                                                     MLX4_MTT_ENTRY_PER_SEG);
 154         dev->caps.reserved_mrws      = dev_cap->reserved_mrws;
 155         dev->caps.reserved_uars      = dev_cap->reserved_uars;
 156         dev->caps.reserved_pds       = dev_cap->reserved_pds;
 157         dev->caps.mtt_entry_sz       = MLX4_MTT_ENTRY_PER_SEG * dev_cap->mtt_entry_sz;
 158         dev->caps.max_msg_sz         = dev_cap->max_msg_sz;
 159         dev->caps.page_size_cap      = ~(u32) (dev_cap->min_page_sz - 1);
 160         dev->caps.flags              = dev_cap->flags;
 161         dev->caps.stat_rate_support  = dev_cap->stat_rate_support;
 162         dev->caps.max_gso_sz         = dev_cap->max_gso_sz;
 163
 164         return 0;
 165 }
 166
 167 static int mlx4_load_fw(struct mlx4_dev *dev)
 168 {
 169         struct mlx4_priv *priv = mlx4_priv(dev);
 170         int err;
 171
 172         priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages,
 173                                          GFP_HIGHUSER | __GFP_NOWARN, 0);
 174         if (!priv->fw.fw_icm) {
 175                 mlx4_err(dev, "Couldn't allocate FW area, aborting.\n");
 176                 return -ENOMEM;
 177         }
 178
 179         err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
 180         if (err) {
 181                 mlx4_err(dev, "MAP_FA command failed, aborting.\n");
 182                 goto err_free;
 183         }
 184
 185         err = mlx4_RUN_FW(dev);
 186         if (err) {
 187                 mlx4_err(dev, "RUN_FW command failed, aborting.\n");
 188                 goto err_unmap_fa;
 189         }
 190
 191         return 0;
 192
 193 err_unmap_fa:
 194         mlx4_UNMAP_FA(dev);
 195
 196 err_free:
 197         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
 198         return err;
 199 }
 200
 201 static int mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
 202                                 int cmpt_entry_sz)
 203 {
 204         struct mlx4_priv *priv = mlx4_priv(dev);
 205         int err;
 206
 207         err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
 208                                   cmpt_base +
 209                                   ((u64) (MLX4_CMPT_TYPE_QP *
 210                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 211                                   cmpt_entry_sz, dev->caps.num_qps,
 212                                   dev->caps.reserved_qps, 0, 0);
 213         if (err)
 214                 goto err;
 215
 216         err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
 217                                   cmpt_base +
 218                                   ((u64) (MLX4_CMPT_TYPE_SRQ *
 219                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 220                                   cmpt_entry_sz, dev->caps.num_srqs,
 221                                   dev->caps.reserved_srqs, 0, 0);
 222         if (err)
 223                 goto err_qp;
 224
 225         err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
 226                                   cmpt_base +
 227                                   ((u64) (MLX4_CMPT_TYPE_CQ *
 228                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 229                                   cmpt_entry_sz, dev->caps.num_cqs,
 230                                   dev->caps.reserved_cqs, 0, 0);
 231         if (err)
 232                 goto err_srq;
 233
 234         err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
 235                                   cmpt_base +
 236                                   ((u64) (MLX4_CMPT_TYPE_EQ *
 237                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 238                                   cmpt_entry_sz,
 239                                   roundup_pow_of_two(MLX4_NUM_EQ +
 240                                                      dev->caps.reserved_eqs),
 241                                   MLX4_NUM_EQ + dev->caps.reserved_eqs, 0, 0);
 242         if (err)
 243                 goto err_cq;
 244
 245         return 0;
 246
 247 err_cq:
 248         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 249
 250 err_srq:
 251         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 252
 253 err_qp:
 254         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 255
 256 err:
 257         return err;
 258 }
 259
 260 static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
 261                          struct mlx4_init_hca_param *init_hca, u64 icm_size)
 262 {
 263         struct mlx4_priv *priv = mlx4_priv(dev);
 264         u64 aux_pages;
 265         int err;
 266
 267         err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
 268         if (err) {
 269                 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n");
 270                 return err;
 271         }
 272
 273         mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n",
 274                  (unsigned long long) icm_size >> 10,
 275                  (unsigned long long) aux_pages << 2);
 276
 277         priv->fw.aux_icm = mlx4_alloc_icm(dev, aux_pages,
 278                                           GFP_HIGHUSER | __GFP_NOWARN, 0);
 279         if (!priv->fw.aux_icm) {
 280                 mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n");
 281                 return -ENOMEM;
 282         }
 283
 284         err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
 285         if (err) {
 286                 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n");
 287                 goto err_free_aux;
 288         }
 289
 290         err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
 291         if (err) {
 292                 mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n");
 293                 goto err_unmap_aux;
 294         }
 295
 296         err = mlx4_map_eq_icm(dev, init_hca->eqc_base);
 297         if (err) {
 298                 mlx4_err(dev, "Failed to map EQ context memory, aborting.\n");
 299                 goto err_unmap_cmpt;
 300         }
 301
 302         /*
 303          * Reserved MTT entries must be aligned up to a cacheline
 304          * boundary, since the FW will write to them, while the driver
 305          * writes to all other MTT entries. (The variable
 306          * dev->caps.mtt_entry_sz below is really the MTT segment
 307          * size, not the raw entry size)
 308          */
 309         dev->caps.reserved_mtts =
 310                 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz,
 311                       dma_get_cache_alignment()) / dev->caps.mtt_entry_sz;
 312
 313         err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
 314                                   init_hca->mtt_base,
 315                                   dev->caps.mtt_entry_sz,
 316                                   dev->caps.num_mtt_segs,
 317                                   dev->caps.reserved_mtts, 1, 0);
 318         if (err) {
 319                 mlx4_err(dev, "Failed to map MTT context memory, aborting.\n");
 320                 goto err_unmap_eq;
 321         }
 322
 323         err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
 324                                   init_hca->dmpt_base,
 325                                   dev_cap->dmpt_entry_sz,
 326                                   dev->caps.num_mpts,
 327                                   dev->caps.reserved_mrws, 1, 1);
 328         if (err) {
 329                 mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n");
 330                 goto err_unmap_mtt;
 331         }
 332
 333         err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
 334                                   init_hca->qpc_base,
 335                                   dev_cap->qpc_entry_sz,
 336                                   dev->caps.num_qps,
 337                                   dev->caps.reserved_qps, 0, 0);
 338         if (err) {
 339                 mlx4_err(dev, "Failed to map QP context memory, aborting.\n");
 340                 goto err_unmap_dmpt;
 341         }
 342
 343         err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
 344                                   init_hca->auxc_base,
 345                                   dev_cap->aux_entry_sz,
 346                                   dev->caps.num_qps,
 347                                   dev->caps.reserved_qps, 0, 0);
 348         if (err) {
 349                 mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n");
 350                 goto err_unmap_qp;
 351         }
 352
 353         err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
 354                                   init_hca->altc_base,
 355                                   dev_cap->altc_entry_sz,
 356                                   dev->caps.num_qps,
 357                                   dev->caps.reserved_qps, 0, 0);
 358         if (err) {
 359                 mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n");
 360                 goto err_unmap_auxc;
 361         }
 362
 363         err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
 364                                   init_hca->rdmarc_base,
 365                                   dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift,
 366                                   dev->caps.num_qps,
 367                                   dev->caps.reserved_qps, 0, 0);
 368         if (err) {
 369                 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n");
 370                 goto err_unmap_altc;
 371         }
 372
 373         err = mlx4_init_icm_table(dev, &priv->cq_table.table,
 374                                   init_hca->cqc_base,
 375                                   dev_cap->cqc_entry_sz,
 376                                   dev->caps.num_cqs,
 377                                   dev->caps.reserved_cqs, 0, 0);
 378         if (err) {
 379                 mlx4_err(dev, "Failed to map CQ context memory, aborting.\n");
 380                 goto err_unmap_rdmarc;
 381         }
 382
 383         err = mlx4_init_icm_table(dev, &priv->srq_table.table,
 384                                   init_hca->srqc_base,
 385                                   dev_cap->srq_entry_sz,
 386                                   dev->caps.num_srqs,
 387                                   dev->caps.reserved_srqs, 0, 0);
 388         if (err) {
 389                 mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n");
 390                 goto err_unmap_cq;
 391         }
 392
 393         /*
 394          * It's not strictly required, but for simplicity just map the
 395          * whole multicast group table now.  The table isn't very big
 396          * and it's a lot easier than trying to track ref counts.
 397          */
 398         err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
 399                                   init_hca->mc_base, MLX4_MGM_ENTRY_SIZE,
 400                                   dev->caps.num_mgms + dev->caps.num_amgms,
 401                                   dev->caps.num_mgms + dev->caps.num_amgms,
 402                                   0, 0);
 403         if (err) {
 404                 mlx4_err(dev, "Failed to map MCG context memory, aborting.\n");
 405                 goto err_unmap_srq;
 406         }
 407
 408         return 0;
 409
 410 err_unmap_srq:
 411         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
 412
 413 err_unmap_cq:
 414         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
 415
 416 err_unmap_rdmarc:
 417         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
 418
 419 err_unmap_altc:
 420         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
 421
 422 err_unmap_auxc:
 423         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
 424
 425 err_unmap_qp:
 426         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
 427
 428 err_unmap_dmpt:
 429         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
 430
 431 err_unmap_mtt:
 432         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
 433
 434 err_unmap_eq:
 435         mlx4_unmap_eq_icm(dev);
 436
 437 err_unmap_cmpt:
 438         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
 439         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 440         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 441         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 442
 443 err_unmap_aux:
 444         mlx4_UNMAP_ICM_AUX(dev);
 445
 446 err_free_aux:
 447         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
 448
 449         return err;
 450 }
 451
 452 static void mlx4_free_icms(struct mlx4_dev *dev)
 453 {
 454         struct mlx4_priv *priv = mlx4_priv(dev);
 455
 456         mlx4_cleanup_icm_table(dev, &priv->mcg_table.table);
 457         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
 458         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
 459         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
 460         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
 461         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
 462         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
 463         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
 464         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
 465         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
 466         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 467         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 468         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 469         mlx4_unmap_eq_icm(dev);
 470
 471         mlx4_UNMAP_ICM_AUX(dev);
 472         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
 473 }
 474
 475 static void mlx4_close_hca(struct mlx4_dev *dev)
 476 {
 477         mlx4_CLOSE_HCA(dev, 0);
 478         mlx4_free_icms(dev);
 479         mlx4_UNMAP_FA(dev);
 480         mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0);
 481 }
 482
 483 static int mlx4_init_hca(struct mlx4_dev *dev)
 484 {
 485         struct mlx4_priv          *priv = mlx4_priv(dev);
 486         struct mlx4_adapter        adapter;
 487         struct mlx4_dev_cap        dev_cap;
 488         struct mlx4_mod_stat_cfg   mlx4_cfg;
 489         struct mlx4_profile        profile;
 490         struct mlx4_init_hca_param init_hca;
 491         u64 icm_size;
 492         int err;
 493
 494         err = mlx4_QUERY_FW(dev);
 495         if (err) {
 496                 mlx4_err(dev, "QUERY_FW command failed, aborting.\n");
 497                 return err;
 498         }
 499
 500         err = mlx4_load_fw(dev);
 501         if (err) {
 502                 mlx4_err(dev, "Failed to start FW, aborting.\n");
 503                 return err;
 504         }
 505
 506         mlx4_cfg.log_pg_sz_m = 1;
 507         mlx4_cfg.log_pg_sz = 0;
 508         err = mlx4_MOD_STAT_CFG(dev, &mlx4_cfg);
 509         if (err)
 510                 mlx4_warn(dev, "Failed to override log_pg_sz parameter\n");
 511
 512         err = mlx4_dev_cap(dev, &dev_cap);
 513         if (err) {
 514                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 515                 goto err_stop_fw;
 516         }
 517
 518         profile = default_profile;
 519
 520         icm_size = mlx4_make_profile(dev, &profile, &dev_cap, &init_hca);
 521         if ((long long) icm_size < 0) {
 522                 err = icm_size;
 523                 goto err_stop_fw;
 524         }
 525
 526         init_hca.log_uar_sz = ilog2(dev->caps.num_uars);
 527
 528         err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
 529         if (err)
 530                 goto err_stop_fw;
 531
 532         err = mlx4_INIT_HCA(dev, &init_hca);
 533         if (err) {
 534                 mlx4_err(dev, "INIT_HCA command failed, aborting.\n");
 535                 goto err_free_icm;
 536         }
 537
 538         err = mlx4_QUERY_ADAPTER(dev, &adapter);
 539         if (err) {
 540                 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n");
 541                 goto err_close;
 542         }
 543
 544         priv->eq_table.inta_pin = adapter.inta_pin;
 545         memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id);
 546
 547         return 0;
 548
 549 err_close:
 550         mlx4_close_hca(dev);
 551
 552 err_free_icm:
 553         mlx4_free_icms(dev);
 554
 555 err_stop_fw:
 556         mlx4_UNMAP_FA(dev);
 557         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
 558
 559         return err;
 560 }
 561
 562 static int mlx4_setup_hca(struct mlx4_dev *dev)
 563 {
 564         struct mlx4_priv *priv = mlx4_priv(dev);
 565         int err;
 566
 567         err = mlx4_init_uar_table(dev);
 568         if (err) {
 569                 mlx4_err(dev, "Failed to initialize "
 570                          "user access region table, aborting.\n");
 571                 return err;
 572         }
 573
 574         err = mlx4_uar_alloc(dev, &priv->driver_uar);
 575         if (err) {
 576                 mlx4_err(dev, "Failed to allocate driver access region, "
 577                          "aborting.\n");
 578                 goto err_uar_table_free;
 579         }
 580
 581         priv->kar = ioremap(priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
 582         if (!priv->kar) {
 583                 mlx4_err(dev, "Couldn't map kernel access region, "
 584                          "aborting.\n");
 585                 err = -ENOMEM;
 586                 goto err_uar_free;
 587         }
 588
 589         err = mlx4_init_pd_table(dev);
 590         if (err) {
 591                 mlx4_err(dev, "Failed to initialize "
 592                          "protection domain table, aborting.\n");
 593                 goto err_kar_unmap;
 594         }
 595
 596         err = mlx4_init_mr_table(dev);
 597         if (err) {
 598                 mlx4_err(dev, "Failed to initialize "
 599                          "memory region table, aborting.\n");
 600                 goto err_pd_table_free;
 601         }
 602
 603         err = mlx4_init_eq_table(dev);
 604         if (err) {
 605                 mlx4_err(dev, "Failed to initialize "
 606                          "event queue table, aborting.\n");
 607                 goto err_mr_table_free;
 608         }
 609
 610         err = mlx4_cmd_use_events(dev);
 611         if (err) {
 612                 mlx4_err(dev, "Failed to switch to event-driven "
 613                          "firmware commands, aborting.\n");
 614                 goto err_eq_table_free;
 615         }
 616
 617         err = mlx4_NOP(dev);
 618         if (err) {
 619                 if (dev->flags & MLX4_FLAG_MSI_X) {
 620                         mlx4_warn(dev, "NOP command failed to generate MSI-X "
 621                                   "interrupt IRQ %d).\n",
 622                                   priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
 623                         mlx4_warn(dev, "Trying again without MSI-X.\n");
 624                 } else {
 625                         mlx4_err(dev, "NOP command failed to generate interrupt "
 626                                  "(IRQ %d), aborting.\n",
 627                                  priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
 628                         mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n");
 629                 }
 630
 631                 goto err_cmd_poll;
 632         }
 633
 634         mlx4_dbg(dev, "NOP command IRQ test passed\n");
 635
 636         err = mlx4_init_cq_table(dev);
 637         if (err) {
 638                 mlx4_err(dev, "Failed to initialize "
 639                          "completion queue table, aborting.\n");
 640                 goto err_cmd_poll;
 641         }
 642
 643         err = mlx4_init_srq_table(dev);
 644         if (err) {
 645                 mlx4_err(dev, "Failed to initialize "
 646                          "shared receive queue table, aborting.\n");
 647                 goto err_cq_table_free;
 648         }
 649
 650         err = mlx4_init_qp_table(dev);
 651         if (err) {
 652                 mlx4_err(dev, "Failed to initialize "
 653                          "queue pair table, aborting.\n");
 654                 goto err_srq_table_free;
 655         }
 656
 657         err = mlx4_init_mcg_table(dev);
 658         if (err) {
 659                 mlx4_err(dev, "Failed to initialize "
 660                          "multicast group table, aborting.\n");
 661                 goto err_qp_table_free;
 662         }
 663
 664         return 0;
 665
 666 err_qp_table_free:
 667         mlx4_cleanup_qp_table(dev);
 668
 669 err_srq_table_free:
 670         mlx4_cleanup_srq_table(dev);
 671
 672 err_cq_table_free:
 673         mlx4_cleanup_cq_table(dev);
 674
 675 err_cmd_poll:
 676         mlx4_cmd_use_polling(dev);
 677
 678 err_eq_table_free:
 679         mlx4_cleanup_eq_table(dev);
 680
 681 err_mr_table_free:
 682         mlx4_cleanup_mr_table(dev);
 683
 684 err_pd_table_free:
 685         mlx4_cleanup_pd_table(dev);
 686
 687 err_kar_unmap:
 688         iounmap(priv->kar);
 689
 690 err_uar_free:
 691         mlx4_uar_free(dev, &priv->driver_uar);
 692
 693 err_uar_table_free:
 694         mlx4_cleanup_uar_table(dev);
 695         return err;
 696 }
 697
 698 static void mlx4_enable_msi_x(struct mlx4_dev *dev)
 699 {
 700         struct mlx4_priv *priv = mlx4_priv(dev);
 701         struct msix_entry entries[MLX4_NUM_EQ];
 702         int err;
 703         int i;
 704
 705         if (msi_x) {
 706                 for (i = 0; i < MLX4_NUM_EQ; ++i)
 707                         entries[i].entry = i;
 708
 709                 err = pci_enable_msix(dev->pdev, entries, ARRAY_SIZE(entries));
 710                 if (err) {
 711                         if (err > 0)
 712                                 mlx4_info(dev, "Only %d MSI-X vectors available, "
 713                                           "not using MSI-X\n", err);
 714                         goto no_msi;
 715                 }
 716
 717                 for (i = 0; i < MLX4_NUM_EQ; ++i)
 718                         priv->eq_table.eq[i].irq = entries[i].vector;
 719
 720                 dev->flags |= MLX4_FLAG_MSI_X;
 721                 return;
 722         }
 723
 724 no_msi:
 725         for (i = 0; i < MLX4_NUM_EQ; ++i)
 726                 priv->eq_table.eq[i].irq = dev->pdev->irq;
 727 }
 728
 729 static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 730 {
 731         struct mlx4_priv *priv;
 732         struct mlx4_dev *dev;
 733         int err;
 734
 735         printk(KERN_INFO PFX "Initializing %s\n",
 736                pci_name(pdev));
 737
 738         err = pci_enable_device(pdev);
 739         if (err) {
 740                 dev_err(&pdev->dev, "Cannot enable PCI device, "
 741                         "aborting.\n");
 742                 return err;
 743         }
 744
 745         /*
 746          * Check for BARs.  We expect 0: 1MB
 747          */
 748         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
 749             pci_resource_len(pdev, 0) != 1 << 20) {
 750                 dev_err(&pdev->dev, "Missing DCS, aborting.\n");
 751                 err = -ENODEV;
 752                 goto err_disable_pdev;
 753         }
 754         if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
 755                 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
 756                 err = -ENODEV;
 757                 goto err_disable_pdev;
 758         }
 759
 760         err = pci_request_region(pdev, 0, DRV_NAME);
 761         if (err) {
 762                 dev_err(&pdev->dev, "Cannot request control region, aborting.\n");
 763                 goto err_disable_pdev;
 764         }
 765
 766         err = pci_request_region(pdev, 2, DRV_NAME);
 767         if (err) {
 768                 dev_err(&pdev->dev, "Cannot request UAR region, aborting.\n");
 769                 goto err_release_bar0;
 770         }
 771
 772         pci_set_master(pdev);
 773
 774         err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
 775         if (err) {
 776                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
 777                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
 778                 if (err) {
 779                         dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
 780                         goto err_release_bar2;
 781                 }
 782         }
 783         err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
 784         if (err) {
 785                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
 786                          "consistent PCI DMA mask.\n");
 787                 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
 788                 if (err) {
 789                         dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
 790                                 "aborting.\n");
 791                         goto err_release_bar2;
 792                 }
 793         }
 794
 795         priv = kzalloc(sizeof *priv, GFP_KERNEL);
 796         if (!priv) {
 797                 dev_err(&pdev->dev, "Device struct alloc failed, "
 798                         "aborting.\n");
 799                 err = -ENOMEM;
 800                 goto err_release_bar2;
 801         }
 802
 803         dev       = &priv->dev;
 804         dev->pdev = pdev;
 805         INIT_LIST_HEAD(&priv->ctx_list);
 806         spin_lock_init(&priv->ctx_lock);
 807
 808         INIT_LIST_HEAD(&priv->pgdir_list);
 809         mutex_init(&priv->pgdir_mutex);
 810
 811         /*
 812          * Now reset the HCA before we touch the PCI capabilities or
 813          * attempt a firmware command, since a boot ROM may have left
 814          * the HCA in an undefined state.
 815          */
 816         err = mlx4_reset(dev);
 817         if (err) {
 818                 mlx4_err(dev, "Failed to reset HCA, aborting.\n");
 819                 goto err_free_dev;
 820         }
 821
 822         if (mlx4_cmd_init(dev)) {
 823                 mlx4_err(dev, "Failed to init command interface, aborting.\n");
 824                 goto err_free_dev;
 825         }
 826
 827         err = mlx4_init_hca(dev);
 828         if (err)
 829                 goto err_cmd;
 830
 831         mlx4_enable_msi_x(dev);
 832
 833         err = mlx4_setup_hca(dev);
 834         if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X)) {
 835                 dev->flags &= ~MLX4_FLAG_MSI_X;
 836                 pci_disable_msix(pdev);
 837                 err = mlx4_setup_hca(dev);
 838         }
 839
 840         if (err)
 841                 goto err_close;
 842
 843         err = mlx4_register_device(dev);
 844         if (err)
 845                 goto err_cleanup;
 846
 847         pci_set_drvdata(pdev, dev);
 848
 849         return 0;
 850
 851 err_cleanup:
 852         mlx4_cleanup_mcg_table(dev);
 853         mlx4_cleanup_qp_table(dev);
 854         mlx4_cleanup_srq_table(dev);
 855         mlx4_cleanup_cq_table(dev);
 856         mlx4_cmd_use_polling(dev);
 857         mlx4_cleanup_eq_table(dev);
 858         mlx4_cleanup_mr_table(dev);
 859         mlx4_cleanup_pd_table(dev);
 860         mlx4_cleanup_uar_table(dev);
 861
 862 err_close:
 863         if (dev->flags & MLX4_FLAG_MSI_X)
 864                 pci_disable_msix(pdev);
 865
 866         mlx4_close_hca(dev);
 867
 868 err_cmd:
 869         mlx4_cmd_cleanup(dev);
 870
 871 err_free_dev:
 872         kfree(priv);
 873
 874 err_release_bar2:
 875         pci_release_region(pdev, 2);
 876
 877 err_release_bar0:
 878         pci_release_region(pdev, 0);
 879
 880 err_disable_pdev:
 881         pci_disable_device(pdev);
 882         pci_set_drvdata(pdev, NULL);
 883         return err;
 884 }
 885
 886 static int __devinit mlx4_init_one(struct pci_dev *pdev,
 887                                    const struct pci_device_id *id)
 888 {
 889         static int mlx4_version_printed;
 890
 891         if (!mlx4_version_printed) {
 892                 printk(KERN_INFO "%s", mlx4_version);
 893                 ++mlx4_version_printed;
 894         }
 895
 896         return __mlx4_init_one(pdev, id);
 897 }
 898
 899 static void mlx4_remove_one(struct pci_dev *pdev)
 900 {
 901         struct mlx4_dev  *dev  = pci_get_drvdata(pdev);
 902         struct mlx4_priv *priv = mlx4_priv(dev);
 903         int p;
 904
 905         if (dev) {
 906                 mlx4_unregister_device(dev);
 907
 908                 for (p = 1; p <= dev->caps.num_ports; ++p)
 909                         mlx4_CLOSE_PORT(dev, p);
 910
 911                 mlx4_cleanup_mcg_table(dev);
 912                 mlx4_cleanup_qp_table(dev);
 913                 mlx4_cleanup_srq_table(dev);
 914                 mlx4_cleanup_cq_table(dev);
 915                 mlx4_cmd_use_polling(dev);
 916                 mlx4_cleanup_eq_table(dev);
 917                 mlx4_cleanup_mr_table(dev);
 918                 mlx4_cleanup_pd_table(dev);
 919
 920                 iounmap(priv->kar);
 921                 mlx4_uar_free(dev, &priv->driver_uar);
 922                 mlx4_cleanup_uar_table(dev);
 923                 mlx4_close_hca(dev);
 924                 mlx4_cmd_cleanup(dev);
 925
 926                 if (dev->flags & MLX4_FLAG_MSI_X)
 927                         pci_disable_msix(pdev);
 928
 929                 kfree(priv);
 930                 pci_release_region(pdev, 2);
 931                 pci_release_region(pdev, 0);
 932                 pci_disable_device(pdev);
 933                 pci_set_drvdata(pdev, NULL);
 934         }
 935 }
 936
 937 int mlx4_restart_one(struct pci_dev *pdev)
 938 {
 939         mlx4_remove_one(pdev);
 940         return __mlx4_init_one(pdev, NULL);
 941 }
 942
 943 static struct pci_device_id mlx4_pci_table[] = {
 944         { PCI_VDEVICE(MELLANOX, 0x6340) }, /* MT25408 "Hermon" SDR */
 945         { PCI_VDEVICE(MELLANOX, 0x634a) }, /* MT25408 "Hermon" DDR */
 946         { PCI_VDEVICE(MELLANOX, 0x6354) }, /* MT25408 "Hermon" QDR */
 947         { PCI_VDEVICE(MELLANOX, 0x6732) }, /* MT25408 "Hermon" DDR PCIe gen2 */
 948         { PCI_VDEVICE(MELLANOX, 0x673c) }, /* MT25408 "Hermon" QDR PCIe gen2 */
 949         { 0, }
 950 };
 951
 952 MODULE_DEVICE_TABLE(pci, mlx4_pci_table);
 953
 954 static struct pci_driver mlx4_driver = {
 955         .name           = DRV_NAME,
 956         .id_table       = mlx4_pci_table,
 957         .probe          = mlx4_init_one,
 958         .remove         = __devexit_p(mlx4_remove_one)
 959 };
 960
 961 static int __init mlx4_init(void)
 962 {
 963         int ret;
 964
 965         ret = mlx4_catas_init();
 966         if (ret)
 967                 return ret;
 968
 969         ret = pci_register_driver(&mlx4_driver);
 970         return ret < 0 ? ret : 0;
 971 }
 972
 973 static void __exit mlx4_cleanup(void)
 974 {
 975         pci_unregister_driver(&mlx4_driver);
 976         mlx4_catas_cleanup();
 977 }
 978
 979 module_init(mlx4_init);
 980 module_exit(mlx4_cleanup);