drivers/net/irda/nsc-ircc.c

   1 /*********************************************************************
   2  *
   3  * Filename:      nsc-ircc.c
   4  * Version:       1.0
   5  * Description:   Driver for the NSC PC'108 and PC'338 IrDA chipsets
   6  * Status:        Stable.
   7  * Author:        Dag Brattli <dagb@cs.uit.no>
   8  * Created at:    Sat Nov  7 21:43:15 1998
   9  * Modified at:   Wed Mar  1 11:29:34 2000
  10  * Modified by:   Dag Brattli <dagb@cs.uit.no>
  11  *
  12  *     Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
  13  *     Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
  14  *     Copyright (c) 1998 Actisys Corp., www.actisys.com
  15  *     Copyright (c) 2000-2004 Jean Tourrilhes <jt@hpl.hp.com>
  16  *     All Rights Reserved
  17  *
  18  *     This program is free software; you can redistribute it and/or
  19  *     modify it under the terms of the GNU General Public License as
  20  *     published by the Free Software Foundation; either version 2 of
  21  *     the License, or (at your option) any later version.
  22  *
  23  *     Neither Dag Brattli nor University of Tromsø admit liability nor
  24  *     provide warranty for any of this software. This material is
  25  *     provided "AS-IS" and at no charge.
  26  *
  27  *     Notice that all functions that needs to access the chip in _any_
  28  *     way, must save BSR register on entry, and restore it on exit.
  29  *     It is _very_ important to follow this policy!
  30  *
  31  *         __u8 bank;
  32  *
  33  *         bank = inb(iobase+BSR);
  34  *
  35  *         do_your_stuff_here();
  36  *
  37  *         outb(bank, iobase+BSR);
  38  *
  39  *    If you find bugs in this file, its very likely that the same bug
  40  *    will also be in w83977af_ir.c since the implementations are quite
  41  *    similar.
  42  *
  43  ********************************************************************/
  44
  45 #include <linux/module.h>
  46
  47 #include <linux/kernel.h>
  48 #include <linux/types.h>
  49 #include <linux/skbuff.h>
  50 #include <linux/netdevice.h>
  51 #include <linux/ioport.h>
  52 #include <linux/delay.h>
  53 #include <linux/slab.h>
  54 #include <linux/init.h>
  55 #include <linux/rtnetlink.h>
  56 #include <linux/dma-mapping.h>
  57 #include <linux/pnp.h>
  58 #include <linux/platform_device.h>
  59
  60 #include <asm/io.h>
  61 #include <asm/dma.h>
  62 #include <asm/byteorder.h>
  63
  64 #include <net/irda/wrapper.h>
  65 #include <net/irda/irda.h>
  66 #include <net/irda/irda_device.h>
  67
  68 #include "nsc-ircc.h"
  69
  70 #define CHIP_IO_EXTENT 8
  71 #define BROKEN_DONGLE_ID
  72
  73 static char *driver_name = "nsc-ircc";
  74
  75 /* Power Management */
  76 #define NSC_IRCC_DRIVER_NAME                  "nsc-ircc"
  77 static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state);
  78 static int nsc_ircc_resume(struct platform_device *dev);
  79
  80 static struct platform_driver nsc_ircc_driver = {
  81         .suspend        = nsc_ircc_suspend,
  82         .resume         = nsc_ircc_resume,
  83         .driver         = {
  84                 .name   = NSC_IRCC_DRIVER_NAME,
  85         },
  86 };
  87
  88 /* Module parameters */
  89 static int qos_mtt_bits = 0x07;  /* 1 ms or more */
  90 static int dongle_id;
  91
  92 /* Use BIOS settions by default, but user may supply module parameters */
  93 static unsigned int io[]  = { ~0, ~0, ~0, ~0, ~0 };
  94 static unsigned int irq[] = {  0,  0,  0,  0,  0 };
  95 static unsigned int dma[] = {  0,  0,  0,  0,  0 };
  96
  97 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
  98 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
  99 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
 100 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
 101 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
 102 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
 103 static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id);
 104
 105 /* These are the known NSC chips */
 106 static nsc_chip_t chips[] = {
 107 /*  Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
 108         { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
 109           nsc_ircc_probe_108, nsc_ircc_init_108 },
 110         { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
 111           nsc_ircc_probe_338, nsc_ircc_init_338 },
 112         /* Contributed by Steffen Pingel - IBM X40 */
 113         { "PC8738x", { 0x164e, 0x4e, 0x2e }, 0x20, 0xf4, 0xff,
 114           nsc_ircc_probe_39x, nsc_ircc_init_39x },
 115         /* Contributed by Jan Frey - IBM A30/A31 */
 116         { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
 117           nsc_ircc_probe_39x, nsc_ircc_init_39x },
 118         /* IBM ThinkPads using PC8738x (T60/X60/Z60) */
 119         { "IBM-PC8738x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf4, 0xff,
 120           nsc_ircc_probe_39x, nsc_ircc_init_39x },
 121         /* IBM ThinkPads using PC8394T (T43/R52/?) */
 122         { "IBM-PC8394T", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf9, 0xff,
 123           nsc_ircc_probe_39x, nsc_ircc_init_39x },
 124         { NULL }
 125 };
 126
 127 static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL, NULL };
 128
 129 static char *dongle_types[] = {
 130         "Differential serial interface",
 131         "Differential serial interface",
 132         "Reserved",
 133         "Reserved",
 134         "Sharp RY5HD01",
 135         "Reserved",
 136         "Single-ended serial interface",
 137         "Consumer-IR only",
 138         "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
 139         "IBM31T1100 or Temic TFDS6000/TFDS6500",
 140         "Reserved",
 141         "Reserved",
 142         "HP HSDL-1100/HSDL-2100",
 143         "HP HSDL-1100/HSDL-2100",
 144         "Supports SIR Mode only",
 145         "No dongle connected",
 146 };
 147
 148 /* PNP probing */
 149 static chipio_t pnp_info;
 150 static const struct pnp_device_id nsc_ircc_pnp_table[] = {
 151         { .id = "NSC6001", .driver_data = 0 },
 152         { .id = "IBM0071", .driver_data = 0 },
 153         { }
 154 };
 155
 156 MODULE_DEVICE_TABLE(pnp, nsc_ircc_pnp_table);
 157
 158 static struct pnp_driver nsc_ircc_pnp_driver = {
 159         .name = "nsc-ircc",
 160         .id_table = nsc_ircc_pnp_table,
 161         .probe = nsc_ircc_pnp_probe,
 162 };
 163
 164 /* Some prototypes */
 165 static int  nsc_ircc_open(chipio_t *info);
 166 static int  nsc_ircc_close(struct nsc_ircc_cb *self);
 167 static int  nsc_ircc_setup(chipio_t *info);
 168 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
 169 static int  nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
 170 static int  nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
 171 static int  nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
 172 static int  nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
 173 static int  nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
 174 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
 175 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
 176 static int  nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
 177 static int  nsc_ircc_read_dongle_id (int iobase);
 178 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
 179
 180 static int  nsc_ircc_net_open(struct net_device *dev);
 181 static int  nsc_ircc_net_close(struct net_device *dev);
 182 static int  nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 183 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev);
 184
 185 /* Globals */
 186 static int pnp_registered;
 187 static int pnp_succeeded;
 188
 189 /*
 190  * Function nsc_ircc_init ()
 191  *
 192  *    Initialize chip. Just try to find out how many chips we are dealing with
 193  *    and where they are
 194  */
 195 static int __init nsc_ircc_init(void)
 196 {
 197         chipio_t info;
 198         nsc_chip_t *chip;
 199         int ret;
 200         int cfg_base;
 201         int cfg, id;
 202         int reg;
 203         int i = 0;
 204
 205         ret = platform_driver_register(&nsc_ircc_driver);
 206         if (ret) {
 207                 IRDA_ERROR("%s, Can't register driver!\n", driver_name);
 208                 return ret;
 209         }
 210
 211         /* Register with PnP subsystem to detect disable ports */
 212         ret = pnp_register_driver(&nsc_ircc_pnp_driver);
 213
 214         if (!ret)
 215                 pnp_registered = 1;
 216
 217         ret = -ENODEV;
 218
 219         /* Probe for all the NSC chipsets we know about */
 220         for (chip = chips; chip->name ; chip++) {
 221                 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __FUNCTION__,
 222                            chip->name);
 223
 224                 /* Try all config registers for this chip */
 225                 for (cfg = 0; cfg < ARRAY_SIZE(chip->cfg); cfg++) {
 226                         cfg_base = chip->cfg[cfg];
 227                         if (!cfg_base)
 228                                 continue;
 229
 230                         /* Read index register */
 231                         reg = inb(cfg_base);
 232                         if (reg == 0xff) {
 233                                 IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __FUNCTION__, cfg_base);
 234                                 continue;
 235                         }
 236
 237                         /* Read chip identification register */
 238                         outb(chip->cid_index, cfg_base);
 239                         id = inb(cfg_base+1);
 240                         if ((id & chip->cid_mask) == chip->cid_value) {
 241                                 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
 242                                            __FUNCTION__, chip->name, id & ~chip->cid_mask);
 243
 244                                 /*
 245                                  * If we found a correct PnP setting,
 246                                  * we first try it.
 247                                  */
 248                                 if (pnp_succeeded) {
 249                                         memset(&info, 0, sizeof(chipio_t));
 250                                         info.cfg_base = cfg_base;
 251                                         info.fir_base = pnp_info.fir_base;
 252                                         info.dma = pnp_info.dma;
 253                                         info.irq = pnp_info.irq;
 254
 255                                         if (info.fir_base < 0x2000) {
 256                                                 IRDA_MESSAGE("%s, chip->init\n", driver_name);
 257                                                 chip->init(chip, &info);
 258                                         } else
 259                                                 chip->probe(chip, &info);
 260
 261                                         if (nsc_ircc_open(&info) >= 0)
 262                                                 ret = 0;
 263                                 }
 264
 265                                 /*
 266                                  * Opening based on PnP values failed.
 267                                  * Let's fallback to user values, or probe
 268                                  * the chip.
 269                                  */
 270                                 if (ret) {
 271                                         IRDA_DEBUG(2, "%s, PnP init failed\n", driver_name);
 272                                         memset(&info, 0, sizeof(chipio_t));
 273                                         info.cfg_base = cfg_base;
 274                                         info.fir_base = io[i];
 275                                         info.dma = dma[i];
 276                                         info.irq = irq[i];
 277
 278                                         /*
 279                                          * If the user supplies the base address, then
 280                                          * we init the chip, if not we probe the values
 281                                          * set by the BIOS
 282                                          */
 283                                         if (io[i] < 0x2000) {
 284                                                 chip->init(chip, &info);
 285                                         } else
 286                                                 chip->probe(chip, &info);
 287
 288                                         if (nsc_ircc_open(&info) >= 0)
 289                                                 ret = 0;
 290                                 }
 291                                 i++;
 292                         } else {
 293                                 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __FUNCTION__, id);
 294                         }
 295                 }
 296         }
 297
 298         if (ret) {
 299                 platform_driver_unregister(&nsc_ircc_driver);
 300                 pnp_unregister_driver(&nsc_ircc_pnp_driver);
 301                 pnp_registered = 0;
 302         }
 303
 304         return ret;
 305 }
 306
 307 /*
 308  * Function nsc_ircc_cleanup ()
 309  *
 310  *    Close all configured chips
 311  *
 312  */
 313 static void __exit nsc_ircc_cleanup(void)
 314 {
 315         int i;
 316
 317         for (i = 0; i < ARRAY_SIZE(dev_self); i++) {
 318                 if (dev_self[i])
 319                         nsc_ircc_close(dev_self[i]);
 320         }
 321
 322         platform_driver_unregister(&nsc_ircc_driver);
 323
 324         if (pnp_registered)
 325                 pnp_unregister_driver(&nsc_ircc_pnp_driver);
 326
 327         pnp_registered = 0;
 328 }
 329
 330 /*
 331  * Function nsc_ircc_open (iobase, irq)
 332  *
 333  *    Open driver instance
 334  *
 335  */
 336 static int __init nsc_ircc_open(chipio_t *info)
 337 {
 338         struct net_device *dev;
 339         struct nsc_ircc_cb *self;
 340         void *ret;
 341         int err, chip_index;
 342
 343         IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
 344
 345
 346         for (chip_index = 0; chip_index < ARRAY_SIZE(dev_self); chip_index++) {
 347                 if (!dev_self[chip_index])
 348                         break;
 349         }
 350
 351         if (chip_index == ARRAY_SIZE(dev_self)) {
 352                 IRDA_ERROR("%s(), maximum number of supported chips reached!\n", __FUNCTION__);
 353                 return -ENOMEM;
 354         }
 355
 356         IRDA_MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
 357                      info->cfg_base);
 358
 359         if ((nsc_ircc_setup(info)) == -1)
 360                 return -1;
 361
 362         IRDA_MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
 363
 364         dev = alloc_irdadev(sizeof(struct nsc_ircc_cb));
 365         if (dev == NULL) {
 366                 IRDA_ERROR("%s(), can't allocate memory for "
 367                            "control block!\n", __FUNCTION__);
 368                 return -ENOMEM;
 369         }
 370
 371         self = dev->priv;
 372         self->netdev = dev;
 373         spin_lock_init(&self->lock);
 374
 375         /* Need to store self somewhere */
 376         dev_self[chip_index] = self;
 377         self->index = chip_index;
 378
 379         /* Initialize IO */
 380         self->io.cfg_base  = info->cfg_base;
 381         self->io.fir_base  = info->fir_base;
 382         self->io.irq       = info->irq;
 383         self->io.fir_ext   = CHIP_IO_EXTENT;
 384         self->io.dma       = info->dma;
 385         self->io.fifo_size = 32;
 386
 387         /* Reserve the ioports that we need */
 388         ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
 389         if (!ret) {
 390                 IRDA_WARNING("%s(), can't get iobase of 0x%03x\n",
 391                              __FUNCTION__, self->io.fir_base);
 392                 err = -ENODEV;
 393                 goto out1;
 394         }
 395
 396         /* Initialize QoS for this device */
 397         irda_init_max_qos_capabilies(&self->qos);
 398
 399         /* The only value we must override it the baudrate */
 400         self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
 401                 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
 402
 403         self->qos.min_turn_time.bits = qos_mtt_bits;
 404         irda_qos_bits_to_value(&self->qos);
 405
 406         /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
 407         self->rx_buff.truesize = 14384;
 408         self->tx_buff.truesize = 14384;
 409
 410         /* Allocate memory if needed */
 411         self->rx_buff.head =
 412                 dma_alloc_coherent(NULL, self->rx_buff.truesize,
 413                                    &self->rx_buff_dma, GFP_KERNEL);
 414         if (self->rx_buff.head == NULL) {
 415                 err = -ENOMEM;
 416                 goto out2;
 417
 418         }
 419         memset(self->rx_buff.head, 0, self->rx_buff.truesize);
 420
 421         self->tx_buff.head =
 422                 dma_alloc_coherent(NULL, self->tx_buff.truesize,
 423                                    &self->tx_buff_dma, GFP_KERNEL);
 424         if (self->tx_buff.head == NULL) {
 425                 err = -ENOMEM;
 426                 goto out3;
 427         }
 428         memset(self->tx_buff.head, 0, self->tx_buff.truesize);
 429
 430         self->rx_buff.in_frame = FALSE;
 431         self->rx_buff.state = OUTSIDE_FRAME;
 432         self->tx_buff.data = self->tx_buff.head;
 433         self->rx_buff.data = self->rx_buff.head;
 434
 435         /* Reset Tx queue info */
 436         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
 437         self->tx_fifo.tail = self->tx_buff.head;
 438
 439         /* Override the network functions we need to use */
 440         SET_MODULE_OWNER(dev);
 441         dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
 442         dev->open            = nsc_ircc_net_open;
 443         dev->stop            = nsc_ircc_net_close;
 444         dev->do_ioctl        = nsc_ircc_net_ioctl;
 445         dev->get_stats       = nsc_ircc_net_get_stats;
 446
 447         err = register_netdev(dev);
 448         if (err) {
 449                 IRDA_ERROR("%s(), register_netdev() failed!\n", __FUNCTION__);
 450                 goto out4;
 451         }
 452         IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
 453
 454         /* Check if user has supplied a valid dongle id or not */
 455         if ((dongle_id <= 0) ||
 456             (dongle_id >= ARRAY_SIZE(dongle_types))) {
 457                 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
 458
 459                 IRDA_MESSAGE("%s, Found dongle: %s\n", driver_name,
 460                              dongle_types[dongle_id]);
 461         } else {
 462                 IRDA_MESSAGE("%s, Using dongle: %s\n", driver_name,
 463                              dongle_types[dongle_id]);
 464         }
 465
 466         self->io.dongle_id = dongle_id;
 467         nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
 468
 469         self->pldev = platform_device_register_simple(NSC_IRCC_DRIVER_NAME,
 470                                                       self->index, NULL, 0);
 471         if (IS_ERR(self->pldev)) {
 472                 err = PTR_ERR(self->pldev);
 473                 goto out5;
 474         }
 475         platform_set_drvdata(self->pldev, self);
 476
 477         return chip_index;
 478
 479  out5:
 480         unregister_netdev(dev);
 481  out4:
 482         dma_free_coherent(NULL, self->tx_buff.truesize,
 483                           self->tx_buff.head, self->tx_buff_dma);
 484  out3:
 485         dma_free_coherent(NULL, self->rx_buff.truesize,
 486                           self->rx_buff.head, self->rx_buff_dma);
 487  out2:
 488         release_region(self->io.fir_base, self->io.fir_ext);
 489  out1:
 490         free_netdev(dev);
 491         dev_self[chip_index] = NULL;
 492         return err;
 493 }
 494
 495 /*
 496  * Function nsc_ircc_close (self)
 497  *
 498  *    Close driver instance
 499  *
 500  */
 501 static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
 502 {
 503         int iobase;
 504
 505         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
 506
 507         IRDA_ASSERT(self != NULL, return -1;);
 508
 509         iobase = self->io.fir_base;
 510
 511         platform_device_unregister(self->pldev);
 512
 513         /* Remove netdevice */
 514         unregister_netdev(self->netdev);
 515
 516         /* Release the PORT that this driver is using */
 517         IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
 518                    __FUNCTION__, self->io.fir_base);
 519         release_region(self->io.fir_base, self->io.fir_ext);
 520
 521         if (self->tx_buff.head)
 522                 dma_free_coherent(NULL, self->tx_buff.truesize,
 523                                   self->tx_buff.head, self->tx_buff_dma);
 524
 525         if (self->rx_buff.head)
 526                 dma_free_coherent(NULL, self->rx_buff.truesize,
 527                                   self->rx_buff.head, self->rx_buff_dma);
 528
 529         dev_self[self->index] = NULL;
 530         free_netdev(self->netdev);
 531
 532         return 0;
 533 }
 534
 535 /*
 536  * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
 537  *
 538  *    Initialize the NSC '108 chip
 539  *
 540  */
 541 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
 542 {
 543         int cfg_base = info->cfg_base;
 544         __u8 temp=0;
 545
 546         outb(2, cfg_base);      /* Mode Control Register (MCTL) */
 547         outb(0x00, cfg_base+1); /* Disable device */
 548
 549         /* Base Address and Interrupt Control Register (BAIC) */
 550         outb(CFG_108_BAIC, cfg_base);
 551         switch (info->fir_base) {
 552         case 0x3e8: outb(0x14, cfg_base+1); break;
 553         case 0x2e8: outb(0x15, cfg_base+1); break;
 554         case 0x3f8: outb(0x16, cfg_base+1); break;
 555         case 0x2f8: outb(0x17, cfg_base+1); break;
 556         default: IRDA_ERROR("%s(), invalid base_address", __FUNCTION__);
 557         }
 558
 559         /* Control Signal Routing Register (CSRT) */
 560         switch (info->irq) {
 561         case 3:  temp = 0x01; break;
 562         case 4:  temp = 0x02; break;
 563         case 5:  temp = 0x03; break;
 564         case 7:  temp = 0x04; break;
 565         case 9:  temp = 0x05; break;
 566         case 11: temp = 0x06; break;
 567         case 15: temp = 0x07; break;
 568         default: IRDA_ERROR("%s(), invalid irq", __FUNCTION__);
 569         }
 570         outb(CFG_108_CSRT, cfg_base);
 571
 572         switch (info->dma) {
 573         case 0: outb(0x08+temp, cfg_base+1); break;
 574         case 1: outb(0x10+temp, cfg_base+1); break;
 575         case 3: outb(0x18+temp, cfg_base+1); break;
 576         default: IRDA_ERROR("%s(), invalid dma", __FUNCTION__);
 577         }
 578
 579         outb(CFG_108_MCTL, cfg_base);      /* Mode Control Register (MCTL) */
 580         outb(0x03, cfg_base+1); /* Enable device */
 581
 582         return 0;
 583 }
 584
 585 /*
 586  * Function nsc_ircc_probe_108 (chip, info)
 587  *
 588  *
 589  *
 590  */
 591 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
 592 {
 593         int cfg_base = info->cfg_base;
 594         int reg;
 595
 596         /* Read address and interrupt control register (BAIC) */
 597         outb(CFG_108_BAIC, cfg_base);
 598         reg = inb(cfg_base+1);
 599
 600         switch (reg & 0x03) {
 601         case 0:
 602                 info->fir_base = 0x3e8;
 603                 break;
 604         case 1:
 605                 info->fir_base = 0x2e8;
 606                 break;
 607         case 2:
 608                 info->fir_base = 0x3f8;
 609                 break;
 610         case 3:
 611                 info->fir_base = 0x2f8;
 612                 break;
 613         }
 614         info->sir_base = info->fir_base;
 615         IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __FUNCTION__,
 616                    info->fir_base);
 617
 618         /* Read control signals routing register (CSRT) */
 619         outb(CFG_108_CSRT, cfg_base);
 620         reg = inb(cfg_base+1);
 621
 622         switch (reg & 0x07) {
 623         case 0:
 624                 info->irq = -1;
 625                 break;
 626         case 1:
 627                 info->irq = 3;
 628                 break;
 629         case 2:
 630                 info->irq = 4;
 631                 break;
 632         case 3:
 633                 info->irq = 5;
 634                 break;
 635         case 4:
 636                 info->irq = 7;
 637                 break;
 638         case 5:
 639                 info->irq = 9;
 640                 break;
 641         case 6:
 642                 info->irq = 11;
 643                 break;
 644         case 7:
 645                 info->irq = 15;
 646                 break;
 647         }
 648         IRDA_DEBUG(2, "%s(), probing irq=%d\n", __FUNCTION__, info->irq);
 649
 650         /* Currently we only read Rx DMA but it will also be used for Tx */
 651         switch ((reg >> 3) & 0x03) {
 652         case 0:
 653                 info->dma = -1;
 654                 break;
 655         case 1:
 656                 info->dma = 0;
 657                 break;
 658         case 2:
 659                 info->dma = 1;
 660                 break;
 661         case 3:
 662                 info->dma = 3;
 663                 break;
 664         }
 665         IRDA_DEBUG(2, "%s(), probing dma=%d\n", __FUNCTION__, info->dma);
 666
 667         /* Read mode control register (MCTL) */
 668         outb(CFG_108_MCTL, cfg_base);
 669         reg = inb(cfg_base+1);
 670
 671         info->enabled = reg & 0x01;
 672         info->suspended = !((reg >> 1) & 0x01);
 673
 674         return 0;
 675 }
 676
 677 /*
 678  * Function nsc_ircc_init_338 (chip, info)
 679  *
 680  *    Initialize the NSC '338 chip. Remember that the 87338 needs two
 681  *    consecutive writes to the data registers while CPU interrupts are
 682  *    disabled. The 97338 does not require this, but shouldn't be any
 683  *    harm if we do it anyway.
 684  */
 685 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
 686 {
 687         /* No init yet */
 688
 689         return 0;
 690 }
 691
 692 /*
 693  * Function nsc_ircc_probe_338 (chip, info)
 694  *
 695  *
 696  *
 697  */
 698 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
 699 {
 700         int cfg_base = info->cfg_base;
 701         int reg, com = 0;
 702         int pnp;
 703
 704         /* Read funtion enable register (FER) */
 705         outb(CFG_338_FER, cfg_base);
 706         reg = inb(cfg_base+1);
 707
 708         info->enabled = (reg >> 2) & 0x01;
 709
 710         /* Check if we are in Legacy or PnP mode */
 711         outb(CFG_338_PNP0, cfg_base);
 712         reg = inb(cfg_base+1);
 713
 714         pnp = (reg >> 3) & 0x01;
 715         if (pnp) {
 716                 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
 717                 outb(0x46, cfg_base);
 718                 reg = (inb(cfg_base+1) & 0xfe) << 2;
 719
 720                 outb(0x47, cfg_base);
 721                 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
 722
 723                 info->fir_base = reg;
 724         } else {
 725                 /* Read function address register (FAR) */
 726                 outb(CFG_338_FAR, cfg_base);
 727                 reg = inb(cfg_base+1);
 728
 729                 switch ((reg >> 4) & 0x03) {
 730                 case 0:
 731                         info->fir_base = 0x3f8;
 732                         break;
 733                 case 1:
 734                         info->fir_base = 0x2f8;
 735                         break;
 736                 case 2:
 737                         com = 3;
 738                         break;
 739                 case 3:
 740                         com = 4;
 741                         break;
 742                 }
 743
 744                 if (com) {
 745                         switch ((reg >> 6) & 0x03) {
 746                         case 0:
 747                                 if (com == 3)
 748                                         info->fir_base = 0x3e8;
 749                                 else
 750                                         info->fir_base = 0x2e8;
 751                                 break;
 752                         case 1:
 753                                 if (com == 3)
 754                                         info->fir_base = 0x338;
 755                                 else
 756                                         info->fir_base = 0x238;
 757                                 break;
 758                         case 2:
 759                                 if (com == 3)
 760                                         info->fir_base = 0x2e8;
 761                                 else
 762                                         info->fir_base = 0x2e0;
 763                                 break;
 764                         case 3:
 765                                 if (com == 3)
 766                                         info->fir_base = 0x220;
 767                                 else
 768                                         info->fir_base = 0x228;
 769                                 break;
 770                         }
 771                 }
 772         }
 773         info->sir_base = info->fir_base;
 774
 775         /* Read PnP register 1 (PNP1) */
 776         outb(CFG_338_PNP1, cfg_base);
 777         reg = inb(cfg_base+1);
 778
 779         info->irq = reg >> 4;
 780
 781         /* Read PnP register 3 (PNP3) */
 782         outb(CFG_338_PNP3, cfg_base);
 783         reg = inb(cfg_base+1);
 784
 785         info->dma = (reg & 0x07) - 1;
 786
 787         /* Read power and test register (PTR) */
 788         outb(CFG_338_PTR, cfg_base);
 789         reg = inb(cfg_base+1);
 790
 791         info->suspended = reg & 0x01;
 792
 793         return 0;
 794 }
 795
 796
 797 /*
 798  * Function nsc_ircc_init_39x (chip, info)
 799  *
 800  *    Now that we know it's a '39x (see probe below), we need to
 801  *    configure it so we can use it.
 802  *
 803  * The NSC '338 chip is a Super I/O chip with a "bank" architecture,
 804  * the configuration of the different functionality (serial, parallel,
 805  * floppy...) are each in a different bank (Logical Device Number).
 806  * The base address, irq and dma configuration registers are common
 807  * to all functionalities (index 0x30 to 0x7F).
 808  * There is only one configuration register specific to the
 809  * serial port, CFG_39X_SPC.
 810  * JeanII
 811  *
 812  * Note : this code was written by Jan Frey <janfrey@web.de>
 813  */
 814 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info)
 815 {
 816         int cfg_base = info->cfg_base;
 817         int enabled;
 818
 819         /* User is sure about his config... accept it. */
 820         IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): "
 821                    "io=0x%04x, irq=%d, dma=%d\n",
 822                    __FUNCTION__, info->fir_base, info->irq, info->dma);
 823
 824         /* Access bank for SP2 */
 825         outb(CFG_39X_LDN, cfg_base);
 826         outb(0x02, cfg_base+1);
 827
 828         /* Configure SP2 */
 829
 830         /* We want to enable the device if not enabled */
 831         outb(CFG_39X_ACT, cfg_base);
 832         enabled = inb(cfg_base+1) & 0x01;
 833
 834         if (!enabled) {
 835                 /* Enable the device */
 836                 outb(CFG_39X_SIOCF1, cfg_base);
 837                 outb(0x01, cfg_base+1);
 838                 /* May want to update info->enabled. Jean II */
 839         }
 840
 841         /* Enable UART bank switching (bit 7) ; Sets the chip to normal
 842          * power mode (wake up from sleep mode) (bit 1) */
 843         outb(CFG_39X_SPC, cfg_base);
 844         outb(0x82, cfg_base+1);
 845
 846         return 0;
 847 }
 848
 849 /*
 850  * Function nsc_ircc_probe_39x (chip, info)
 851  *
 852  *    Test if we really have a '39x chip at the given address
 853  *
 854  * Note : this code was written by Jan Frey <janfrey@web.de>
 855  */
 856 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
 857 {
 858         int cfg_base = info->cfg_base;
 859         int reg1, reg2, irq, irqt, dma1, dma2;
 860         int enabled, susp;
 861
 862         IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n",
 863                    __FUNCTION__, cfg_base);
 864
 865         /* This function should be executed with irq off to avoid
 866          * another driver messing with the Super I/O bank - Jean II */
 867
 868         /* Access bank for SP2 */
 869         outb(CFG_39X_LDN, cfg_base);
 870         outb(0x02, cfg_base+1);
 871
 872         /* Read infos about SP2 ; store in info struct */
 873         outb(CFG_39X_BASEH, cfg_base);
 874         reg1 = inb(cfg_base+1);
 875         outb(CFG_39X_BASEL, cfg_base);
 876         reg2 = inb(cfg_base+1);
 877         info->fir_base = (reg1 << 8) | reg2;
 878
 879         outb(CFG_39X_IRQNUM, cfg_base);
 880         irq = inb(cfg_base+1);
 881         outb(CFG_39X_IRQSEL, cfg_base);
 882         irqt = inb(cfg_base+1);
 883         info->irq = irq;
 884
 885         outb(CFG_39X_DMA0, cfg_base);
 886         dma1 = inb(cfg_base+1);
 887         outb(CFG_39X_DMA1, cfg_base);
 888         dma2 = inb(cfg_base+1);
 889         info->dma = dma1 -1;
 890
 891         outb(CFG_39X_ACT, cfg_base);
 892         info->enabled = enabled = inb(cfg_base+1) & 0x01;
 893
 894         outb(CFG_39X_SPC, cfg_base);
 895         susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);
 896
 897         IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __FUNCTION__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
 898
 899         /* Configure SP2 */
 900
 901         /* We want to enable the device if not enabled */
 902         outb(CFG_39X_ACT, cfg_base);
 903         enabled = inb(cfg_base+1) & 0x01;
 904
 905         if (!enabled) {
 906                 /* Enable the device */
 907                 outb(CFG_39X_SIOCF1, cfg_base);
 908                 outb(0x01, cfg_base+1);
 909                 /* May want to update info->enabled. Jean II */
 910         }
 911
 912         /* Enable UART bank switching (bit 7) ; Sets the chip to normal
 913          * power mode (wake up from sleep mode) (bit 1) */
 914         outb(CFG_39X_SPC, cfg_base);
 915         outb(0x82, cfg_base+1);
 916
 917         return 0;
 918 }
 919
 920 /* PNP probing */
 921 static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id)
 922 {
 923         memset(&pnp_info, 0, sizeof(chipio_t));
 924         pnp_info.irq = -1;
 925         pnp_info.dma = -1;
 926         pnp_succeeded = 1;
 927
 928         /* There don't seem to be any way to get the cfg_base.
 929          * On my box, cfg_base is in the PnP descriptor of the
 930          * motherboard. Oh well... Jean II */
 931
 932         if (pnp_port_valid(dev, 0) &&
 933                 !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED))
 934                 pnp_info.fir_base = pnp_port_start(dev, 0);
 935
 936         if (pnp_irq_valid(dev, 0) &&
 937                 !(pnp_irq_flags(dev, 0) & IORESOURCE_DISABLED))
 938                 pnp_info.irq = pnp_irq(dev, 0);
 939
 940         if (pnp_dma_valid(dev, 0) &&
 941                 !(pnp_dma_flags(dev, 0) & IORESOURCE_DISABLED))
 942                 pnp_info.dma = pnp_dma(dev, 0);
 943
 944         IRDA_DEBUG(0, "%s() : From PnP, found firbase 0x%03X ; irq %d ; dma %d.\n",
 945                    __FUNCTION__, pnp_info.fir_base, pnp_info.irq, pnp_info.dma);
 946
 947         if((pnp_info.fir_base == 0) ||
 948            (pnp_info.irq == -1) || (pnp_info.dma == -1)) {
 949                 /* Returning an error will disable the device. Yuck ! */
 950                 //return -EINVAL;
 951                 pnp_succeeded = 0;
 952         }
 953
 954         return 0;
 955 }
 956
 957 /*
 958  * Function nsc_ircc_setup (info)
 959  *
 960  *    Returns non-negative on success.
 961  *
 962  */
 963 static int nsc_ircc_setup(chipio_t *info)
 964 {
 965         int version;
 966         int iobase = info->fir_base;
 967
 968         /* Read the Module ID */
 969         switch_bank(iobase, BANK3);
 970         version = inb(iobase+MID);
 971
 972         IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n",
 973                    __FUNCTION__, driver_name, version);
 974
 975         /* Should be 0x2? */
 976         if (0x20 != (version & 0xf0)) {
 977                 IRDA_ERROR("%s, Wrong chip version %02x\n",
 978                            driver_name, version);
 979                 return -1;
 980         }
 981
 982         /* Switch to advanced mode */
 983         switch_bank(iobase, BANK2);
 984         outb(ECR1_EXT_SL, iobase+ECR1);
 985         switch_bank(iobase, BANK0);
 986
 987         /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
 988         switch_bank(iobase, BANK0);
 989         outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
 990
 991         outb(0x03, iobase+LCR);         /* 8 bit word length */
 992         outb(MCR_SIR, iobase+MCR);      /* Start at SIR-mode, also clears LSR*/
 993
 994         /* Set FIFO size to 32 */
 995         switch_bank(iobase, BANK2);
 996         outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
 997
 998         /* IRCR2: FEND_MD is not set */
 999         switch_bank(iobase, BANK5);
1000         outb(0x02, iobase+4);
1001
1002         /* Make sure that some defaults are OK */
1003         switch_bank(iobase, BANK6);
1004         outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
1005         outb(0x0a, iobase+1); /* Set MIR pulse width */
1006         outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
1007         outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
1008
1009         /* Enable receive interrupts */
1010         switch_bank(iobase, BANK0);
1011         outb(IER_RXHDL_IE, iobase+IER);
1012
1013         return 0;
1014 }
1015
1016 /*
1017  * Function nsc_ircc_read_dongle_id (void)
1018  *
1019  * Try to read dongle indentification. This procedure needs to be executed
1020  * once after power-on/reset. It also needs to be used whenever you suspect
1021  * that the user may have plugged/unplugged the IrDA Dongle.
1022  */
1023 static int nsc_ircc_read_dongle_id (int iobase)
1024 {
1025         int dongle_id;
1026         __u8 bank;
1027
1028         bank = inb(iobase+BSR);
1029
1030         /* Select Bank 7 */
1031         switch_bank(iobase, BANK7);
1032
1033         /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
1034         outb(0x00, iobase+7);
1035
1036         /* ID0, 1, and 2 are pulled up/down very slowly */
1037         udelay(50);
1038
1039         /* IRCFG1: read the ID bits */
1040         dongle_id = inb(iobase+4) & 0x0f;
1041
1042 #ifdef BROKEN_DONGLE_ID
1043         if (dongle_id == 0x0a)
1044                 dongle_id = 0x09;
1045 #endif
1046         /* Go back to  bank 0 before returning */
1047         switch_bank(iobase, BANK0);
1048
1049         outb(bank, iobase+BSR);
1050
1051         return dongle_id;
1052 }
1053
1054 /*
1055  * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
1056  *
1057  *     This function initializes the dongle for the transceiver that is
1058  *     used. This procedure needs to be executed once after
1059  *     power-on/reset. It also needs to be used whenever you suspect that
1060  *     the dongle is changed.
1061  */
1062 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
1063 {
1064         int bank;
1065
1066         /* Save current bank */
1067         bank = inb(iobase+BSR);
1068
1069         /* Select Bank 7 */
1070         switch_bank(iobase, BANK7);
1071
1072         /* IRCFG4: set according to dongle_id */
1073         switch (dongle_id) {
1074         case 0x00: /* same as */
1075         case 0x01: /* Differential serial interface */
1076                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1077                            __FUNCTION__, dongle_types[dongle_id]);
1078                 break;
1079         case 0x02: /* same as */
1080         case 0x03: /* Reserved */
1081                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1082                            __FUNCTION__, dongle_types[dongle_id]);
1083                 break;
1084         case 0x04: /* Sharp RY5HD01 */
1085                 break;
1086         case 0x05: /* Reserved, but this is what the Thinkpad reports */
1087                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1088                            __FUNCTION__, dongle_types[dongle_id]);
1089                 break;
1090         case 0x06: /* Single-ended serial interface */
1091                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1092                            __FUNCTION__, dongle_types[dongle_id]);
1093                 break;
1094         case 0x07: /* Consumer-IR only */
1095                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1096                            __FUNCTION__, dongle_types[dongle_id]);
1097                 break;
1098         case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1099                 IRDA_DEBUG(0, "%s(), %s\n",
1100                            __FUNCTION__, dongle_types[dongle_id]);
1101                 break;
1102         case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1103                 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1104                 break;
1105         case 0x0A: /* same as */
1106         case 0x0B: /* Reserved */
1107                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1108                            __FUNCTION__, dongle_types[dongle_id]);
1109                 break;
1110         case 0x0C: /* same as */
1111         case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1112                 /*
1113                  * Set irsl0 as input, irsl[1-2] as output, and separate
1114                  * inputs are used for SIR and MIR/FIR
1115                  */
1116                 outb(0x48, iobase+7);
1117                 break;
1118         case 0x0E: /* Supports SIR Mode only */
1119                 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1120                 break;
1121         case 0x0F: /* No dongle connected */
1122                 IRDA_DEBUG(0, "%s(), %s\n",
1123                            __FUNCTION__, dongle_types[dongle_id]);
1124
1125                 switch_bank(iobase, BANK0);
1126                 outb(0x62, iobase+MCR);
1127                 break;
1128         default:
1129                 IRDA_DEBUG(0, "%s(), invalid dongle_id %#x",
1130                            __FUNCTION__, dongle_id);
1131         }
1132
1133         /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
1134         outb(0x00, iobase+4);
1135
1136         /* Restore bank register */
1137         outb(bank, iobase+BSR);
1138
1139 } /* set_up_dongle_interface */
1140
1141 /*
1142  * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
1143  *
1144  *    Change speed of the attach dongle
1145  *
1146  */
1147 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
1148 {
1149         __u8 bank;
1150
1151         /* Save current bank */
1152         bank = inb(iobase+BSR);
1153
1154         /* Select Bank 7 */
1155         switch_bank(iobase, BANK7);
1156
1157         /* IRCFG1: set according to dongle_id */
1158         switch (dongle_id) {
1159         case 0x00: /* same as */
1160         case 0x01: /* Differential serial interface */
1161                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1162                            __FUNCTION__, dongle_types[dongle_id]);
1163                 break;
1164         case 0x02: /* same as */
1165         case 0x03: /* Reserved */
1166                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1167                            __FUNCTION__, dongle_types[dongle_id]);
1168                 break;
1169         case 0x04: /* Sharp RY5HD01 */
1170                 break;
1171         case 0x05: /* Reserved */
1172                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1173                            __FUNCTION__, dongle_types[dongle_id]);
1174                 break;
1175         case 0x06: /* Single-ended serial interface */
1176                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1177                            __FUNCTION__, dongle_types[dongle_id]);
1178                 break;
1179         case 0x07: /* Consumer-IR only */
1180                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1181                            __FUNCTION__, dongle_types[dongle_id]);
1182                 break;
1183         case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1184                 IRDA_DEBUG(0, "%s(), %s\n",
1185                            __FUNCTION__, dongle_types[dongle_id]);
1186                 outb(0x00, iobase+4);
1187                 if (speed > 115200)
1188                         outb(0x01, iobase+4);
1189                 break;
1190         case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1191                 outb(0x01, iobase+4);
1192
1193                 if (speed == 4000000) {
1194                         /* There was a cli() there, but we now are already
1195                          * under spin_lock_irqsave() - JeanII */
1196                         outb(0x81, iobase+4);
1197                         outb(0x80, iobase+4);
1198                 } else
1199                         outb(0x00, iobase+4);
1200                 break;
1201         case 0x0A: /* same as */
1202         case 0x0B: /* Reserved */
1203                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1204                            __FUNCTION__, dongle_types[dongle_id]);
1205                 break;
1206         case 0x0C: /* same as */
1207         case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1208                 break;
1209         case 0x0E: /* Supports SIR Mode only */
1210                 break;
1211         case 0x0F: /* No dongle connected */
1212                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1213                            __FUNCTION__, dongle_types[dongle_id]);
1214
1215                 switch_bank(iobase, BANK0);
1216                 outb(0x62, iobase+MCR);
1217                 break;
1218         default:
1219                 IRDA_DEBUG(0, "%s(), invalid data_rate\n", __FUNCTION__);
1220         }
1221         /* Restore bank register */
1222         outb(bank, iobase+BSR);
1223 }
1224
1225 /*
1226  * Function nsc_ircc_change_speed (self, baud)
1227  *
1228  *    Change the speed of the device
1229  *
1230  * This function *must* be called with irq off and spin-lock.
1231  */
1232 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
1233 {
1234         struct net_device *dev = self->netdev;
1235         __u8 mcr = MCR_SIR;
1236         int iobase;
1237         __u8 bank;
1238         __u8 ier;                  /* Interrupt enable register */
1239
1240         IRDA_DEBUG(2, "%s(), speed=%d\n", __FUNCTION__, speed);
1241
1242         IRDA_ASSERT(self != NULL, return 0;);
1243
1244         iobase = self->io.fir_base;
1245
1246         /* Update accounting for new speed */
1247         self->io.speed = speed;
1248
1249         /* Save current bank */
1250         bank = inb(iobase+BSR);
1251
1252         /* Disable interrupts */
1253         switch_bank(iobase, BANK0);
1254         outb(0, iobase+IER);
1255
1256         /* Select Bank 2 */
1257         switch_bank(iobase, BANK2);
1258
1259         outb(0x00, iobase+BGDH);
1260         switch (speed) {
1261         case 9600:   outb(0x0c, iobase+BGDL); break;
1262         case 19200:  outb(0x06, iobase+BGDL); break;
1263         case 38400:  outb(0x03, iobase+BGDL); break;
1264         case 57600:  outb(0x02, iobase+BGDL); break;
1265         case 115200: outb(0x01, iobase+BGDL); break;
1266         case 576000:
1267                 switch_bank(iobase, BANK5);
1268
1269                 /* IRCR2: MDRS is set */
1270                 outb(inb(iobase+4) | 0x04, iobase+4);
1271
1272                 mcr = MCR_MIR;
1273                 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
1274                 break;
1275         case 1152000:
1276                 mcr = MCR_MIR;
1277                 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __FUNCTION__);
1278                 break;
1279         case 4000000:
1280                 mcr = MCR_FIR;
1281                 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __FUNCTION__);
1282                 break;
1283         default:
1284                 mcr = MCR_FIR;
1285                 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n",
1286                            __FUNCTION__, speed);
1287                 break;
1288         }
1289
1290         /* Set appropriate speed mode */
1291         switch_bank(iobase, BANK0);
1292         outb(mcr | MCR_TX_DFR, iobase+MCR);
1293
1294         /* Give some hits to the transceiver */
1295         nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1296
1297         /* Set FIFO threshold to TX17, RX16 */
1298         switch_bank(iobase, BANK0);
1299         outb(0x00, iobase+FCR);
1300         outb(FCR_FIFO_EN, iobase+FCR);
1301         outb(FCR_RXTH|     /* Set Rx FIFO threshold */
1302              FCR_TXTH|     /* Set Tx FIFO threshold */
1303              FCR_TXSR|     /* Reset Tx FIFO */
1304              FCR_RXSR|     /* Reset Rx FIFO */
1305              FCR_FIFO_EN,  /* Enable FIFOs */
1306              iobase+FCR);
1307
1308         /* Set FIFO size to 32 */
1309         switch_bank(iobase, BANK2);
1310         outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1311
1312         /* Enable some interrupts so we can receive frames */
1313         switch_bank(iobase, BANK0);
1314         if (speed > 115200) {
1315                 /* Install FIR xmit handler */
1316                 dev->hard_start_xmit = nsc_ircc_hard_xmit_fir;
1317                 ier = IER_SFIF_IE;
1318                 nsc_ircc_dma_receive(self);
1319         } else {
1320                 /* Install SIR xmit handler */
1321                 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
1322                 ier = IER_RXHDL_IE;
1323         }
1324         /* Set our current interrupt mask */
1325         outb(ier, iobase+IER);
1326
1327         /* Restore BSR */
1328         outb(bank, iobase+BSR);
1329
1330         /* Make sure interrupt handlers keep the proper interrupt mask */
1331         return(ier);
1332 }
1333
1334 /*
1335  * Function nsc_ircc_hard_xmit (skb, dev)
1336  *
1337  *    Transmit the frame!
1338  *
1339  */
1340 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
1341 {
1342         struct nsc_ircc_cb *self;
1343         unsigned long flags;
1344         int iobase;
1345         __s32 speed;
1346         __u8 bank;
1347
1348         self = (struct nsc_ircc_cb *) dev->priv;
1349
1350         IRDA_ASSERT(self != NULL, return 0;);
1351
1352         iobase = self->io.fir_base;
1353
1354         netif_stop_queue(dev);
1355
1356         /* Make sure tests *& speed change are atomic */
1357         spin_lock_irqsave(&self->lock, flags);
1358
1359         /* Check if we need to change the speed */
1360         speed = irda_get_next_speed(skb);
1361         if ((speed != self->io.speed) && (speed != -1)) {
1362                 /* Check for empty frame. */
1363                 if (!skb->len) {
1364                         /* If we just sent a frame, we get called before
1365                          * the last bytes get out (because of the SIR FIFO).
1366                          * If this is the case, let interrupt handler change
1367                          * the speed itself... Jean II */
1368                         if (self->io.direction == IO_RECV) {
1369                                 nsc_ircc_change_speed(self, speed);
1370                                 /* TODO : For SIR->SIR, the next packet
1371                                  * may get corrupted - Jean II */
1372                                 netif_wake_queue(dev);
1373                         } else {
1374                                 self->new_speed = speed;
1375                                 /* Queue will be restarted after speed change
1376                                  * to make sure packets gets through the
1377                                  * proper xmit handler - Jean II */
1378                         }
1379                         dev->trans_start = jiffies;
1380                         spin_unlock_irqrestore(&self->lock, flags);
1381                         dev_kfree_skb(skb);
1382                         return 0;
1383                 } else
1384                         self->new_speed = speed;
1385         }
1386
1387         /* Save current bank */
1388         bank = inb(iobase+BSR);
1389
1390         self->tx_buff.data = self->tx_buff.head;
1391
1392         self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1393                                            self->tx_buff.truesize);
1394
1395         self->stats.tx_bytes += self->tx_buff.len;
1396
1397         /* Add interrupt on tx low level (will fire immediately) */
1398         switch_bank(iobase, BANK0);
1399         outb(IER_TXLDL_IE, iobase+IER);
1400
1401         /* Restore bank register */
1402         outb(bank, iobase+BSR);
1403
1404         dev->trans_start = jiffies;
1405         spin_unlock_irqrestore(&self->lock, flags);
1406
1407         dev_kfree_skb(skb);
1408
1409         return 0;
1410 }
1411
1412 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1413 {
1414         struct nsc_ircc_cb *self;
1415         unsigned long flags;
1416         int iobase;
1417         __s32 speed;
1418         __u8 bank;
1419         int mtt, diff;
1420
1421         self = (struct nsc_ircc_cb *) dev->priv;
1422         iobase = self->io.fir_base;
1423
1424         netif_stop_queue(dev);
1425
1426         /* Make sure tests *& speed change are atomic */
1427         spin_lock_irqsave(&self->lock, flags);
1428
1429         /* Check if we need to change the speed */
1430         speed = irda_get_next_speed(skb);
1431         if ((speed != self->io.speed) && (speed != -1)) {
1432                 /* Check for empty frame. */
1433                 if (!skb->len) {
1434                         /* If we are currently transmitting, defer to
1435                          * interrupt handler. - Jean II */
1436                         if(self->tx_fifo.len == 0) {
1437                                 nsc_ircc_change_speed(self, speed);
1438                                 netif_wake_queue(dev);
1439                         } else {
1440                                 self->new_speed = speed;
1441                                 /* Keep queue stopped :
1442                                  * the speed change operation may change the
1443                                  * xmit handler, and we want to make sure
1444                                  * the next packet get through the proper
1445                                  * Tx path, so block the Tx queue until
1446                                  * the speed change has been done.
1447                                  * Jean II */
1448                         }
1449                         dev->trans_start = jiffies;
1450                         spin_unlock_irqrestore(&self->lock, flags);
1451                         dev_kfree_skb(skb);
1452                         return 0;
1453                 } else {
1454                         /* Change speed after current frame */
1455                         self->new_speed = speed;
1456                 }
1457         }
1458
1459         /* Save current bank */
1460         bank = inb(iobase+BSR);
1461
1462         /* Register and copy this frame to DMA memory */
1463         self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1464         self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1465         self->tx_fifo.tail += skb->len;
1466
1467         self->stats.tx_bytes += skb->len;
1468
1469         skb_copy_from_linear_data(skb, self->tx_fifo.queue[self->tx_fifo.free].start,
1470                       skb->len);
1471         self->tx_fifo.len++;
1472         self->tx_fifo.free++;
1473
1474         /* Start transmit only if there is currently no transmit going on */
1475         if (self->tx_fifo.len == 1) {
1476                 /* Check if we must wait the min turn time or not */
1477                 mtt = irda_get_mtt(skb);
1478                 if (mtt) {
1479                         /* Check how much time we have used already */
1480                         do_gettimeofday(&self->now);
1481                         diff = self->now.tv_usec - self->stamp.tv_usec;
1482                         if (diff < 0)
1483                                 diff += 1000000;
1484
1485                         /* Check if the mtt is larger than the time we have
1486                          * already used by all the protocol processing
1487                          */
1488                         if (mtt > diff) {
1489                                 mtt -= diff;
1490
1491                                 /*
1492                                  * Use timer if delay larger than 125 us, and
1493                                  * use udelay for smaller values which should
1494                                  * be acceptable
1495                                  */
1496                                 if (mtt > 125) {
1497                                         /* Adjust for timer resolution */
1498                                         mtt = mtt / 125;
1499
1500                                         /* Setup timer */
1501                                         switch_bank(iobase, BANK4);
1502                                         outb(mtt & 0xff, iobase+TMRL);
1503                                         outb((mtt >> 8) & 0x0f, iobase+TMRH);
1504
1505                                         /* Start timer */
1506                                         outb(IRCR1_TMR_EN, iobase+IRCR1);
1507                                         self->io.direction = IO_XMIT;
1508
1509                                         /* Enable timer interrupt */
1510                                         switch_bank(iobase, BANK0);
1511                                         outb(IER_TMR_IE, iobase+IER);
1512
1513                                         /* Timer will take care of the rest */
1514                                         goto out;
1515                                 } else
1516                                         udelay(mtt);
1517                         }
1518                 }
1519                 /* Enable DMA interrupt */
1520                 switch_bank(iobase, BANK0);
1521                 outb(IER_DMA_IE, iobase+IER);
1522
1523                 /* Transmit frame */
1524                 nsc_ircc_dma_xmit(self, iobase);
1525         }
1526  out:
1527         /* Not busy transmitting anymore if window is not full,
1528          * and if we don't need to change speed */
1529         if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0))
1530                 netif_wake_queue(self->netdev);
1531
1532         /* Restore bank register */
1533         outb(bank, iobase+BSR);
1534
1535         dev->trans_start = jiffies;
1536         spin_unlock_irqrestore(&self->lock, flags);
1537         dev_kfree_skb(skb);
1538
1539         return 0;
1540 }
1541
1542 /*
1543  * Function nsc_ircc_dma_xmit (self, iobase)
1544  *
1545  *    Transmit data using DMA
1546  *
1547  */
1548 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1549 {
1550         int bsr;
1551
1552         /* Save current bank */
1553         bsr = inb(iobase+BSR);
1554
1555         /* Disable DMA */
1556         switch_bank(iobase, BANK0);
1557         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1558
1559         self->io.direction = IO_XMIT;
1560
1561         /* Choose transmit DMA channel  */
1562         switch_bank(iobase, BANK2);
1563         outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1564
1565         irda_setup_dma(self->io.dma,
1566                        ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1567                         self->tx_buff.head) + self->tx_buff_dma,
1568                        self->tx_fifo.queue[self->tx_fifo.ptr].len,
1569                        DMA_TX_MODE);
1570
1571         /* Enable DMA and SIR interaction pulse */
1572         switch_bank(iobase, BANK0);
1573         outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1574
1575         /* Restore bank register */
1576         outb(bsr, iobase+BSR);
1577 }
1578
1579 /*
1580  * Function nsc_ircc_pio_xmit (self, iobase)
1581  *
1582  *    Transmit data using PIO. Returns the number of bytes that actually
1583  *    got transferred
1584  *
1585  */
1586 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1587 {
1588         int actual = 0;
1589         __u8 bank;
1590
1591         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
1592
1593         /* Save current bank */
1594         bank = inb(iobase+BSR);
1595
1596         switch_bank(iobase, BANK0);
1597         if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1598                 IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n",
1599                            __FUNCTION__);
1600
1601                 /* FIFO may still be filled to the Tx interrupt threshold */
1602                 fifo_size -= 17;
1603         }
1604
1605         /* Fill FIFO with current frame */
1606         while ((fifo_size-- > 0) && (actual < len)) {
1607                 /* Transmit next byte */
1608                 outb(buf[actual++], iobase+TXD);
1609         }
1610
1611         IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
1612                    __FUNCTION__, fifo_size, actual, len);
1613
1614         /* Restore bank */
1615         outb(bank, iobase+BSR);
1616
1617         return actual;
1618 }
1619
1620 /*
1621  * Function nsc_ircc_dma_xmit_complete (self)
1622  *
1623  *    The transfer of a frame in finished. This function will only be called
1624  *    by the interrupt handler
1625  *
1626  */
1627 static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1628 {
1629         int iobase;
1630         __u8 bank;
1631         int ret = TRUE;
1632
1633         IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
1634
1635         iobase = self->io.fir_base;
1636
1637         /* Save current bank */
1638         bank = inb(iobase+BSR);
1639
1640         /* Disable DMA */
1641         switch_bank(iobase, BANK0);
1642         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1643
1644         /* Check for underrrun! */
1645         if (inb(iobase+ASCR) & ASCR_TXUR) {
1646                 self->stats.tx_errors++;
1647                 self->stats.tx_fifo_errors++;
1648
1649                 /* Clear bit, by writing 1 into it */
1650                 outb(ASCR_TXUR, iobase+ASCR);
1651         } else {
1652                 self->stats.tx_packets++;
1653         }
1654
1655         /* Finished with this frame, so prepare for next */
1656         self->tx_fifo.ptr++;
1657         self->tx_fifo.len--;
1658
1659         /* Any frames to be sent back-to-back? */
1660         if (self->tx_fifo.len) {
1661                 nsc_ircc_dma_xmit(self, iobase);
1662
1663                 /* Not finished yet! */
1664                 ret = FALSE;
1665         } else {
1666                 /* Reset Tx FIFO info */
1667                 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1668                 self->tx_fifo.tail = self->tx_buff.head;
1669         }
1670
1671         /* Make sure we have room for more frames and
1672          * that we don't need to change speed */
1673         if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) {
1674                 /* Not busy transmitting anymore */
1675                 /* Tell the network layer, that we can accept more frames */
1676                 netif_wake_queue(self->netdev);
1677         }
1678
1679         /* Restore bank */
1680         outb(bank, iobase+BSR);
1681
1682         return ret;
1683 }
1684
1685 /*
1686  * Function nsc_ircc_dma_receive (self)
1687  *
1688  *    Get ready for receiving a frame. The device will initiate a DMA
1689  *    if it starts to receive a frame.
1690  *
1691  */
1692 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1693 {
1694         int iobase;
1695         __u8 bsr;
1696
1697         iobase = self->io.fir_base;
1698
1699         /* Reset Tx FIFO info */
1700         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1701         self->tx_fifo.tail = self->tx_buff.head;
1702
1703         /* Save current bank */
1704         bsr = inb(iobase+BSR);
1705
1706         /* Disable DMA */
1707         switch_bank(iobase, BANK0);
1708         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1709
1710         /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1711         switch_bank(iobase, BANK2);
1712         outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1713
1714         self->io.direction = IO_RECV;
1715         self->rx_buff.data = self->rx_buff.head;
1716
1717         /* Reset Rx FIFO. This will also flush the ST_FIFO */
1718         switch_bank(iobase, BANK0);
1719         outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1720
1721         self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1722         self->st_fifo.tail = self->st_fifo.head = 0;
1723
1724         irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1725                        DMA_RX_MODE);
1726
1727         /* Enable DMA */
1728         switch_bank(iobase, BANK0);
1729         outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1730
1731         /* Restore bank register */
1732         outb(bsr, iobase+BSR);
1733
1734         return 0;
1735 }
1736
1737 /*
1738  * Function nsc_ircc_dma_receive_complete (self)
1739  *
1740  *    Finished with receiving frames
1741  *
1742  *
1743  */
1744 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1745 {
1746         struct st_fifo *st_fifo;
1747         struct sk_buff *skb;
1748         __u8 status;
1749         __u8 bank;
1750         int len;
1751
1752         st_fifo = &self->st_fifo;
1753
1754         /* Save current bank */
1755         bank = inb(iobase+BSR);
1756
1757         /* Read all entries in status FIFO */
1758         switch_bank(iobase, BANK5);
1759         while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1760                 /* We must empty the status FIFO no matter what */
1761                 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1762
1763                 if (st_fifo->tail >= MAX_RX_WINDOW) {
1764                         IRDA_DEBUG(0, "%s(), window is full!\n", __FUNCTION__);
1765                         continue;
1766                 }
1767
1768                 st_fifo->entries[st_fifo->tail].status = status;
1769                 st_fifo->entries[st_fifo->tail].len = len;
1770                 st_fifo->pending_bytes += len;
1771                 st_fifo->tail++;
1772                 st_fifo->len++;
1773         }
1774         /* Try to process all entries in status FIFO */
1775         while (st_fifo->len > 0) {
1776                 /* Get first entry */
1777                 status = st_fifo->entries[st_fifo->head].status;
1778                 len    = st_fifo->entries[st_fifo->head].len;
1779                 st_fifo->pending_bytes -= len;
1780                 st_fifo->head++;
1781                 st_fifo->len--;
1782
1783                 /* Check for errors */
1784                 if (status & FRM_ST_ERR_MSK) {
1785                         if (status & FRM_ST_LOST_FR) {
1786                                 /* Add number of lost frames to stats */
1787                                 self->stats.rx_errors += len;
1788                         } else {
1789                                 /* Skip frame */
1790                                 self->stats.rx_errors++;
1791
1792                                 self->rx_buff.data += len;
1793
1794                                 if (status & FRM_ST_MAX_LEN)
1795                                         self->stats.rx_length_errors++;
1796
1797                                 if (status & FRM_ST_PHY_ERR)
1798                                         self->stats.rx_frame_errors++;
1799
1800                                 if (status & FRM_ST_BAD_CRC)
1801                                         self->stats.rx_crc_errors++;
1802                         }
1803                         /* The errors below can be reported in both cases */
1804                         if (status & FRM_ST_OVR1)
1805                                 self->stats.rx_fifo_errors++;
1806
1807                         if (status & FRM_ST_OVR2)
1808                                 self->stats.rx_fifo_errors++;
1809                 } else {
1810                         /*
1811                          * First we must make sure that the frame we
1812                          * want to deliver is all in main memory. If we
1813                          * cannot tell, then we check if the Rx FIFO is
1814                          * empty. If not then we will have to take a nap
1815                          * and try again later.
1816                          */
1817                         if (st_fifo->pending_bytes < self->io.fifo_size) {
1818                                 switch_bank(iobase, BANK0);
1819                                 if (inb(iobase+LSR) & LSR_RXDA) {
1820                                         /* Put this entry back in fifo */
1821                                         st_fifo->head--;
1822                                         st_fifo->len++;
1823                                         st_fifo->pending_bytes += len;
1824                                         st_fifo->entries[st_fifo->head].status = status;
1825                                         st_fifo->entries[st_fifo->head].len = len;
1826                                         /*
1827                                          * DMA not finished yet, so try again
1828                                          * later, set timer value, resolution
1829                                          * 125 us
1830                                          */
1831                                         switch_bank(iobase, BANK4);
1832                                         outb(0x02, iobase+TMRL); /* x 125 us */
1833                                         outb(0x00, iobase+TMRH);
1834
1835                                         /* Start timer */
1836                                         outb(IRCR1_TMR_EN, iobase+IRCR1);
1837
1838                                         /* Restore bank register */
1839                                         outb(bank, iobase+BSR);
1840
1841                                         return FALSE; /* I'll be back! */
1842                                 }
1843                         }
1844
1845                         /*
1846                          * Remember the time we received this frame, so we can
1847                          * reduce the min turn time a bit since we will know
1848                          * how much time we have used for protocol processing
1849                          */
1850                         do_gettimeofday(&self->stamp);
1851
1852                         skb = dev_alloc_skb(len+1);
1853                         if (skb == NULL)  {
1854                                 IRDA_WARNING("%s(), memory squeeze, "
1855                                              "dropping frame.\n",
1856                                              __FUNCTION__);
1857                                 self->stats.rx_dropped++;
1858
1859                                 /* Restore bank register */
1860                                 outb(bank, iobase+BSR);
1861
1862                                 return FALSE;
1863                         }
1864
1865                         /* Make sure IP header gets aligned */
1866                         skb_reserve(skb, 1);
1867
1868                         /* Copy frame without CRC */
1869                         if (self->io.speed < 4000000) {
1870                                 skb_put(skb, len-2);
1871                                 skb_copy_to_linear_data(skb,
1872                                                         self->rx_buff.data,
1873                                                         len - 2);
1874                         } else {
1875                                 skb_put(skb, len-4);
1876                                 skb_copy_to_linear_data(skb,
1877                                                         self->rx_buff.data,
1878                                                         len - 4);
1879                         }
1880
1881                         /* Move to next frame */
1882                         self->rx_buff.data += len;
1883                         self->stats.rx_bytes += len;
1884                         self->stats.rx_packets++;
1885
1886                         skb->dev = self->netdev;
1887                         skb_reset_mac_header(skb);
1888                         skb->protocol = htons(ETH_P_IRDA);
1889                         netif_rx(skb);
1890                         self->netdev->last_rx = jiffies;
1891                 }
1892         }
1893         /* Restore bank register */
1894         outb(bank, iobase+BSR);
1895
1896         return TRUE;
1897 }
1898
1899 /*
1900  * Function nsc_ircc_pio_receive (self)
1901  *
1902  *    Receive all data in receiver FIFO
1903  *
1904  */
1905 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1906 {
1907         __u8 byte;
1908         int iobase;
1909
1910         iobase = self->io.fir_base;
1911
1912         /*  Receive all characters in Rx FIFO */
1913         do {
1914                 byte = inb(iobase+RXD);
1915                 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1916                                   byte);
1917         } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1918 }
1919
1920 /*
1921  * Function nsc_ircc_sir_interrupt (self, eir)
1922  *
1923  *    Handle SIR interrupt
1924  *
1925  */
1926 static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1927 {
1928         int actual;
1929
1930         /* Check if transmit FIFO is low on data */
1931         if (eir & EIR_TXLDL_EV) {
1932                 /* Write data left in transmit buffer */
1933                 actual = nsc_ircc_pio_write(self->io.fir_base,
1934                                            self->tx_buff.data,
1935                                            self->tx_buff.len,
1936                                            self->io.fifo_size);
1937                 self->tx_buff.data += actual;
1938                 self->tx_buff.len  -= actual;
1939
1940                 self->io.direction = IO_XMIT;
1941
1942                 /* Check if finished */
1943                 if (self->tx_buff.len > 0)
1944                         self->ier = IER_TXLDL_IE;
1945                 else {
1946
1947                         self->stats.tx_packets++;
1948                         netif_wake_queue(self->netdev);
1949                         self->ier = IER_TXEMP_IE;
1950                 }
1951
1952         }
1953         /* Check if transmission has completed */
1954         if (eir & EIR_TXEMP_EV) {
1955                 /* Turn around and get ready to receive some data */
1956                 self->io.direction = IO_RECV;
1957                 self->ier = IER_RXHDL_IE;
1958                 /* Check if we need to change the speed?
1959                  * Need to be after self->io.direction to avoid race with
1960                  * nsc_ircc_hard_xmit_sir() - Jean II */
1961                 if (self->new_speed) {
1962                         IRDA_DEBUG(2, "%s(), Changing speed!\n", __FUNCTION__);
1963                         self->ier = nsc_ircc_change_speed(self,
1964                                                           self->new_speed);
1965                         self->new_speed = 0;
1966                         netif_wake_queue(self->netdev);
1967
1968                         /* Check if we are going to FIR */
1969                         if (self->io.speed > 115200) {
1970                                 /* No need to do anymore SIR stuff */
1971                                 return;
1972                         }
1973                 }
1974         }
1975
1976         /* Rx FIFO threshold or timeout */
1977         if (eir & EIR_RXHDL_EV) {
1978                 nsc_ircc_pio_receive(self);
1979
1980                 /* Keep receiving */
1981                 self->ier = IER_RXHDL_IE;
1982         }
1983 }
1984
1985 /*
1986  * Function nsc_ircc_fir_interrupt (self, eir)
1987  *
1988  *    Handle MIR/FIR interrupt
1989  *
1990  */
1991 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
1992                                    int eir)
1993 {
1994         __u8 bank;
1995
1996         bank = inb(iobase+BSR);
1997
1998         /* Status FIFO event*/
1999         if (eir & EIR_SFIF_EV) {
2000                 /* Check if DMA has finished */
2001                 if (nsc_ircc_dma_receive_complete(self, iobase)) {
2002                         /* Wait for next status FIFO interrupt */
2003                         self->ier = IER_SFIF_IE;
2004                 } else {
2005                         self->ier = IER_SFIF_IE | IER_TMR_IE;
2006                 }
2007         } else if (eir & EIR_TMR_EV) { /* Timer finished */
2008                 /* Disable timer */
2009                 switch_bank(iobase, BANK4);
2010                 outb(0, iobase+IRCR1);
2011
2012                 /* Clear timer event */
2013                 switch_bank(iobase, BANK0);
2014                 outb(ASCR_CTE, iobase+ASCR);
2015
2016                 /* Check if this is a Tx timer interrupt */
2017                 if (self->io.direction == IO_XMIT) {
2018                         nsc_ircc_dma_xmit(self, iobase);
2019
2020                         /* Interrupt on DMA */
2021                         self->ier = IER_DMA_IE;
2022                 } else {
2023                         /* Check (again) if DMA has finished */
2024                         if (nsc_ircc_dma_receive_complete(self, iobase)) {
2025                                 self->ier = IER_SFIF_IE;
2026                         } else {
2027                                 self->ier = IER_SFIF_IE | IER_TMR_IE;
2028                         }
2029                 }
2030         } else if (eir & EIR_DMA_EV) {
2031                 /* Finished with all transmissions? */
2032                 if (nsc_ircc_dma_xmit_complete(self)) {
2033                         if(self->new_speed != 0) {
2034                                 /* As we stop the Tx queue, the speed change
2035                                  * need to be done when the Tx fifo is
2036                                  * empty. Ask for a Tx done interrupt */
2037                                 self->ier = IER_TXEMP_IE;
2038                         } else {
2039                                 /* Check if there are more frames to be
2040                                  * transmitted */
2041                                 if (irda_device_txqueue_empty(self->netdev)) {
2042                                         /* Prepare for receive */
2043                                         nsc_ircc_dma_receive(self);
2044                                         self->ier = IER_SFIF_IE;
2045                                 } else
2046                                         IRDA_WARNING("%s(), potential "
2047                                                      "Tx queue lockup !\n",
2048                                                      __FUNCTION__);
2049                         }
2050                 } else {
2051                         /*  Not finished yet, so interrupt on DMA again */
2052                         self->ier = IER_DMA_IE;
2053                 }
2054         } else if (eir & EIR_TXEMP_EV) {
2055                 /* The Tx FIFO has totally drained out, so now we can change
2056                  * the speed... - Jean II */
2057                 self->ier = nsc_ircc_change_speed(self, self->new_speed);
2058                 self->new_speed = 0;
2059                 netif_wake_queue(self->netdev);
2060                 /* Note : nsc_ircc_change_speed() restarted Rx fifo */
2061         }
2062
2063         outb(bank, iobase+BSR);
2064 }
2065
2066 /*
2067  * Function nsc_ircc_interrupt (irq, dev_id, regs)
2068  *
2069  *    An interrupt from the chip has arrived. Time to do some work
2070  *
2071  */
2072 static irqreturn_t nsc_ircc_interrupt(int irq, void *dev_id)
2073 {
2074         struct net_device *dev = dev_id;
2075         struct nsc_ircc_cb *self;
2076         __u8 bsr, eir;
2077         int iobase;
2078
2079         self = dev->priv;
2080
2081         spin_lock(&self->lock);
2082
2083         iobase = self->io.fir_base;
2084
2085         bsr = inb(iobase+BSR);  /* Save current bank */
2086
2087         switch_bank(iobase, BANK0);
2088         self->ier = inb(iobase+IER);
2089         eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
2090
2091         outb(0, iobase+IER); /* Disable interrupts */
2092
2093         if (eir) {
2094                 /* Dispatch interrupt handler for the current speed */
2095                 if (self->io.speed > 115200)
2096                         nsc_ircc_fir_interrupt(self, iobase, eir);
2097                 else
2098                         nsc_ircc_sir_interrupt(self, eir);
2099         }
2100
2101         outb(self->ier, iobase+IER); /* Restore interrupts */
2102         outb(bsr, iobase+BSR);       /* Restore bank register */
2103
2104         spin_unlock(&self->lock);
2105         return IRQ_RETVAL(eir);
2106 }
2107
2108 /*
2109  * Function nsc_ircc_is_receiving (self)
2110  *
2111  *    Return TRUE is we are currently receiving a frame
2112  *
2113  */
2114 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
2115 {
2116         unsigned long flags;
2117         int status = FALSE;
2118         int iobase;
2119         __u8 bank;
2120
2121         IRDA_ASSERT(self != NULL, return FALSE;);
2122
2123         spin_lock_irqsave(&self->lock, flags);
2124
2125         if (self->io.speed > 115200) {
2126                 iobase = self->io.fir_base;
2127
2128                 /* Check if rx FIFO is not empty */
2129                 bank = inb(iobase+BSR);
2130                 switch_bank(iobase, BANK2);
2131                 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
2132                         /* We are receiving something */
2133                         status =  TRUE;
2134                 }
2135                 outb(bank, iobase+BSR);
2136         } else
2137                 status = (self->rx_buff.state != OUTSIDE_FRAME);
2138
2139         spin_unlock_irqrestore(&self->lock, flags);
2140
2141         return status;
2142 }
2143
2144 /*
2145  * Function nsc_ircc_net_open (dev)
2146  *
2147  *    Start the device
2148  *
2149  */
2150 static int nsc_ircc_net_open(struct net_device *dev)
2151 {
2152         struct nsc_ircc_cb *self;
2153         int iobase;
2154         char hwname[32];
2155         __u8 bank;
2156
2157         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2158
2159         IRDA_ASSERT(dev != NULL, return -1;);
2160         self = (struct nsc_ircc_cb *) dev->priv;
2161
2162         IRDA_ASSERT(self != NULL, return 0;);
2163
2164         iobase = self->io.fir_base;
2165
2166         if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
2167                 IRDA_WARNING("%s, unable to allocate irq=%d\n",
2168                              driver_name, self->io.irq);
2169                 return -EAGAIN;
2170         }
2171         /*
2172          * Always allocate the DMA channel after the IRQ, and clean up on
2173          * failure.
2174          */
2175         if (request_dma(self->io.dma, dev->name)) {
2176                 IRDA_WARNING("%s, unable to allocate dma=%d\n",
2177                              driver_name, self->io.dma);
2178                 free_irq(self->io.irq, dev);
2179                 return -EAGAIN;
2180         }
2181
2182         /* Save current bank */
2183         bank = inb(iobase+BSR);
2184
2185         /* turn on interrupts */
2186         switch_bank(iobase, BANK0);
2187         outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
2188
2189         /* Restore bank register */
2190         outb(bank, iobase+BSR);
2191
2192         /* Ready to play! */
2193         netif_start_queue(dev);
2194
2195         /* Give self a hardware name */
2196         sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
2197
2198         /*
2199          * Open new IrLAP layer instance, now that everything should be
2200          * initialized properly
2201          */
2202         self->irlap = irlap_open(dev, &self->qos, hwname);
2203
2204         return 0;
2205 }
2206
2207 /*
2208  * Function nsc_ircc_net_close (dev)
2209  *
2210  *    Stop the device
2211  *
2212  */
2213 static int nsc_ircc_net_close(struct net_device *dev)
2214 {
2215         struct nsc_ircc_cb *self;
2216         int iobase;
2217         __u8 bank;
2218
2219         IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
2220
2221         IRDA_ASSERT(dev != NULL, return -1;);
2222
2223         self = (struct nsc_ircc_cb *) dev->priv;
2224         IRDA_ASSERT(self != NULL, return 0;);
2225
2226         /* Stop device */
2227         netif_stop_queue(dev);
2228
2229         /* Stop and remove instance of IrLAP */
2230         if (self->irlap)
2231                 irlap_close(self->irlap);
2232         self->irlap = NULL;
2233
2234         iobase = self->io.fir_base;
2235
2236         disable_dma(self->io.dma);
2237
2238         /* Save current bank */
2239         bank = inb(iobase+BSR);
2240
2241         /* Disable interrupts */
2242         switch_bank(iobase, BANK0);
2243         outb(0, iobase+IER);
2244
2245         free_irq(self->io.irq, dev);
2246         free_dma(self->io.dma);
2247
2248         /* Restore bank register */
2249         outb(bank, iobase+BSR);
2250
2251         return 0;
2252 }
2253
2254 /*
2255  * Function nsc_ircc_net_ioctl (dev, rq, cmd)
2256  *
2257  *    Process IOCTL commands for this device
2258  *
2259  */
2260 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2261 {
2262         struct if_irda_req *irq = (struct if_irda_req *) rq;
2263         struct nsc_ircc_cb *self;
2264         unsigned long flags;
2265         int ret = 0;
2266
2267         IRDA_ASSERT(dev != NULL, return -1;);
2268
2269         self = dev->priv;
2270
2271         IRDA_ASSERT(self != NULL, return -1;);
2272
2273         IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
2274
2275         switch (cmd) {
2276         case SIOCSBANDWIDTH: /* Set bandwidth */
2277                 if (!capable(CAP_NET_ADMIN)) {
2278                         ret = -EPERM;
2279                         break;
2280                 }
2281                 spin_lock_irqsave(&self->lock, flags);
2282                 nsc_ircc_change_speed(self, irq->ifr_baudrate);
2283                 spin_unlock_irqrestore(&self->lock, flags);
2284                 break;
2285         case SIOCSMEDIABUSY: /* Set media busy */
2286                 if (!capable(CAP_NET_ADMIN)) {
2287                         ret = -EPERM;
2288                         break;
2289                 }
2290                 irda_device_set_media_busy(self->netdev, TRUE);
2291                 break;
2292         case SIOCGRECEIVING: /* Check if we are receiving right now */
2293                 /* This is already protected */
2294                 irq->ifr_receiving = nsc_ircc_is_receiving(self);
2295                 break;
2296         default:
2297                 ret = -EOPNOTSUPP;
2298         }
2299         return ret;
2300 }
2301
2302 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev)
2303 {
2304         struct nsc_ircc_cb *self = (struct nsc_ircc_cb *) dev->priv;
2305
2306         return &self->stats;
2307 }
2308
2309 static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state)
2310 {
2311         struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2312         int bank;
2313         unsigned long flags;
2314         int iobase = self->io.fir_base;
2315
2316         if (self->io.suspended)
2317                 return 0;
2318
2319         IRDA_DEBUG(1, "%s, Suspending\n", driver_name);
2320
2321         rtnl_lock();
2322         if (netif_running(self->netdev)) {
2323                 netif_device_detach(self->netdev);
2324                 spin_lock_irqsave(&self->lock, flags);
2325                 /* Save current bank */
2326                 bank = inb(iobase+BSR);
2327
2328                 /* Disable interrupts */
2329                 switch_bank(iobase, BANK0);
2330                 outb(0, iobase+IER);
2331
2332                 /* Restore bank register */
2333                 outb(bank, iobase+BSR);
2334
2335                 spin_unlock_irqrestore(&self->lock, flags);
2336                 free_irq(self->io.irq, self->netdev);
2337                 disable_dma(self->io.dma);
2338         }
2339         self->io.suspended = 1;
2340         rtnl_unlock();
2341
2342         return 0;
2343 }
2344
2345 static int nsc_ircc_resume(struct platform_device *dev)
2346 {
2347         struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2348         unsigned long flags;
2349
2350         if (!self->io.suspended)
2351                 return 0;
2352
2353         IRDA_DEBUG(1, "%s, Waking up\n", driver_name);
2354
2355         rtnl_lock();
2356         nsc_ircc_setup(&self->io);
2357         nsc_ircc_init_dongle_interface(self->io.fir_base, self->io.dongle_id);
2358
2359         if (netif_running(self->netdev)) {
2360                 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0,
2361                                 self->netdev->name, self->netdev)) {
2362                         IRDA_WARNING("%s, unable to allocate irq=%d\n",
2363                                      driver_name, self->io.irq);
2364
2365                         /*
2366                          * Don't fail resume process, just kill this
2367                          * network interface
2368                          */
2369                         unregister_netdevice(self->netdev);
2370                 } else {
2371                         spin_lock_irqsave(&self->lock, flags);
2372                         nsc_ircc_change_speed(self, self->io.speed);
2373                         spin_unlock_irqrestore(&self->lock, flags);
2374                         netif_device_attach(self->netdev);
2375                 }
2376
2377         } else {
2378                 spin_lock_irqsave(&self->lock, flags);
2379                 nsc_ircc_change_speed(self, 9600);
2380                 spin_unlock_irqrestore(&self->lock, flags);
2381         }
2382         self->io.suspended = 0;
2383         rtnl_unlock();
2384
2385         return 0;
2386 }
2387
2388 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2389 MODULE_DESCRIPTION("NSC IrDA Device Driver");
2390 MODULE_LICENSE("GPL");
2391
2392
2393 module_param(qos_mtt_bits, int, 0);
2394 MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2395 module_param_array(io, int, NULL, 0);
2396 MODULE_PARM_DESC(io, "Base I/O addresses");
2397 module_param_array(irq, int, NULL, 0);
2398 MODULE_PARM_DESC(irq, "IRQ lines");
2399 module_param_array(dma, int, NULL, 0);
2400 MODULE_PARM_DESC(dma, "DMA channels");
2401 module_param(dongle_id, int, 0);
2402 MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2403
2404 module_init(nsc_ircc_init);
2405 module_exit(nsc_ircc_cleanup);
2406