2 * Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device.
4 * This is a new flat driver which is based on the original emac_lite
5 * driver from John Williams <john.williams@petalogix.com>.
7 * 2007-2009 (c) Xilinx, Inc.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #include <linux/module.h>
16 #include <linux/uaccess.h>
17 #include <linux/init.h>
18 #include <linux/netdevice.h>
19 #include <linux/etherdevice.h>
20 #include <linux/skbuff.h>
22 #include <linux/slab.h>
23 #include <linux/of_address.h>
24 #include <linux/of_device.h>
25 #include <linux/of_platform.h>
26 #include <linux/of_mdio.h>
27 #include <linux/of_net.h>
28 #include <linux/phy.h>
29 #include <linux/interrupt.h>
31 #define DRIVER_NAME "xilinx_emaclite"
33 /* Register offsets for the EmacLite Core */
34 #define XEL_TXBUFF_OFFSET 0x0 /* Transmit Buffer */
35 #define XEL_MDIOADDR_OFFSET 0x07E4 /* MDIO Address Register */
36 #define XEL_MDIOWR_OFFSET 0x07E8 /* MDIO Write Data Register */
37 #define XEL_MDIORD_OFFSET 0x07EC /* MDIO Read Data Register */
38 #define XEL_MDIOCTRL_OFFSET 0x07F0 /* MDIO Control Register */
39 #define XEL_GIER_OFFSET 0x07F8 /* GIE Register */
40 #define XEL_TSR_OFFSET 0x07FC /* Tx status */
41 #define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */
43 #define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */
44 #define XEL_RPLR_OFFSET 0x100C /* Rx packet length */
45 #define XEL_RSR_OFFSET 0x17FC /* Rx status */
47 #define XEL_BUFFER_OFFSET 0x0800 /* Next Tx/Rx buffer's offset */
49 /* MDIO Address Register Bit Masks */
50 #define XEL_MDIOADDR_REGADR_MASK 0x0000001F /* Register Address */
51 #define XEL_MDIOADDR_PHYADR_MASK 0x000003E0 /* PHY Address */
52 #define XEL_MDIOADDR_PHYADR_SHIFT 5
53 #define XEL_MDIOADDR_OP_MASK 0x00000400 /* RD/WR Operation */
55 /* MDIO Write Data Register Bit Masks */
56 #define XEL_MDIOWR_WRDATA_MASK 0x0000FFFF /* Data to be Written */
58 /* MDIO Read Data Register Bit Masks */
59 #define XEL_MDIORD_RDDATA_MASK 0x0000FFFF /* Data to be Read */
61 /* MDIO Control Register Bit Masks */
62 #define XEL_MDIOCTRL_MDIOSTS_MASK 0x00000001 /* MDIO Status Mask */
63 #define XEL_MDIOCTRL_MDIOEN_MASK 0x00000008 /* MDIO Enable */
65 /* Global Interrupt Enable Register (GIER) Bit Masks */
66 #define XEL_GIER_GIE_MASK 0x80000000 /* Global Enable */
68 /* Transmit Status Register (TSR) Bit Masks */
69 #define XEL_TSR_XMIT_BUSY_MASK 0x00000001 /* Tx complete */
70 #define XEL_TSR_PROGRAM_MASK 0x00000002 /* Program the MAC address */
71 #define XEL_TSR_XMIT_IE_MASK 0x00000008 /* Tx interrupt enable bit */
72 #define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000 /* Buffer is active, SW bit
73 * only. This is not documented
76 /* Define for programming the MAC address into the EmacLite */
77 #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)
79 /* Receive Status Register (RSR) */
80 #define XEL_RSR_RECV_DONE_MASK 0x00000001 /* Rx complete */
81 #define XEL_RSR_RECV_IE_MASK 0x00000008 /* Rx interrupt enable bit */
83 /* Transmit Packet Length Register (TPLR) */
84 #define XEL_TPLR_LENGTH_MASK 0x0000FFFF /* Tx packet length */
86 /* Receive Packet Length Register (RPLR) */
87 #define XEL_RPLR_LENGTH_MASK 0x0000FFFF /* Rx packet length */
89 #define XEL_HEADER_OFFSET 12 /* Offset to length field */
90 #define XEL_HEADER_SHIFT 16 /* Shift value for length */
92 /* General Ethernet Definitions */
93 #define XEL_ARP_PACKET_SIZE 28 /* Max ARP packet size */
94 #define XEL_HEADER_IP_LENGTH_OFFSET 16 /* IP Length Offset */
98 #define TX_TIMEOUT (60*HZ) /* Tx timeout is 60 seconds. */
101 /* BUFFER_ALIGN(adr) calculates the number of bytes to the next alignment. */
102 #define BUFFER_ALIGN(adr) ((ALIGNMENT - ((u32) adr)) % ALIGNMENT)
105 * struct net_local - Our private per device data
106 * @ndev: instance of the network device
107 * @tx_ping_pong: indicates whether Tx Pong buffer is configured in HW
108 * @rx_ping_pong: indicates whether Rx Pong buffer is configured in HW
109 * @next_tx_buf_to_use: next Tx buffer to write to
110 * @next_rx_buf_to_use: next Rx buffer to read from
111 * @base_addr: base address of the Emaclite device
112 * @reset_lock: lock used for synchronization
113 * @deferred_skb: holds an skb (for transmission at a later time) when the
114 * Tx buffer is not free
115 * @phy_dev: pointer to the PHY device
116 * @phy_node: pointer to the PHY device node
117 * @mii_bus: pointer to the MII bus
118 * @mdio_irqs: IRQs table for MDIO bus
119 * @last_link: last link status
120 * @has_mdio: indicates whether MDIO is included in the HW
124 struct net_device *ndev;
128 u32 next_tx_buf_to_use;
129 u32 next_rx_buf_to_use;
130 void __iomem *base_addr;
132 spinlock_t reset_lock;
133 struct sk_buff *deferred_skb;
135 struct phy_device *phy_dev;
136 struct device_node *phy_node;
138 struct mii_bus *mii_bus;
139 int mdio_irqs[PHY_MAX_ADDR];
146 /*************************/
147 /* EmacLite driver calls */
148 /*************************/
151 * xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device
152 * @drvdata: Pointer to the Emaclite device private data
154 * This function enables the Tx and Rx interrupts for the Emaclite device along
155 * with the Global Interrupt Enable.
157 static void xemaclite_enable_interrupts(struct net_local *drvdata)
161 /* Enable the Tx interrupts for the first Buffer */
162 reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET);
163 out_be32(drvdata->base_addr + XEL_TSR_OFFSET,
164 reg_data | XEL_TSR_XMIT_IE_MASK);
166 /* Enable the Tx interrupts for the second Buffer if
167 * configured in HW */
168 if (drvdata->tx_ping_pong != 0) {
169 reg_data = in_be32(drvdata->base_addr +
170 XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
171 out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
173 reg_data | XEL_TSR_XMIT_IE_MASK);
176 /* Enable the Rx interrupts for the first buffer */
177 out_be32(drvdata->base_addr + XEL_RSR_OFFSET,
178 XEL_RSR_RECV_IE_MASK);
180 /* Enable the Rx interrupts for the second Buffer if
181 * configured in HW */
182 if (drvdata->rx_ping_pong != 0) {
183 out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
185 XEL_RSR_RECV_IE_MASK);
188 /* Enable the Global Interrupt Enable */
189 out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK);
193 * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device
194 * @drvdata: Pointer to the Emaclite device private data
196 * This function disables the Tx and Rx interrupts for the Emaclite device,
197 * along with the Global Interrupt Enable.
199 static void xemaclite_disable_interrupts(struct net_local *drvdata)
203 /* Disable the Global Interrupt Enable */
204 out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK);
206 /* Disable the Tx interrupts for the first buffer */
207 reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET);
208 out_be32(drvdata->base_addr + XEL_TSR_OFFSET,
209 reg_data & (~XEL_TSR_XMIT_IE_MASK));
211 /* Disable the Tx interrupts for the second Buffer
212 * if configured in HW */
213 if (drvdata->tx_ping_pong != 0) {
214 reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
216 out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
218 reg_data & (~XEL_TSR_XMIT_IE_MASK));
221 /* Disable the Rx interrupts for the first buffer */
222 reg_data = in_be32(drvdata->base_addr + XEL_RSR_OFFSET);
223 out_be32(drvdata->base_addr + XEL_RSR_OFFSET,
224 reg_data & (~XEL_RSR_RECV_IE_MASK));
226 /* Disable the Rx interrupts for the second buffer
227 * if configured in HW */
228 if (drvdata->rx_ping_pong != 0) {
230 reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
232 out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
234 reg_data & (~XEL_RSR_RECV_IE_MASK));
239 * xemaclite_aligned_write - Write from 16-bit aligned to 32-bit aligned address
240 * @src_ptr: Void pointer to the 16-bit aligned source address
241 * @dest_ptr: Pointer to the 32-bit aligned destination address
242 * @length: Number bytes to write from source to destination
244 * This function writes data from a 16-bit aligned buffer to a 32-bit aligned
245 * address in the EmacLite device.
247 static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr,
252 u16 *from_u16_ptr, *to_u16_ptr;
254 to_u32_ptr = dest_ptr;
255 from_u16_ptr = src_ptr;
258 for (; length > 3; length -= 4) {
259 to_u16_ptr = (u16 *)&align_buffer;
260 *to_u16_ptr++ = *from_u16_ptr++;
261 *to_u16_ptr++ = *from_u16_ptr++;
264 *to_u32_ptr++ = align_buffer;
267 u8 *from_u8_ptr, *to_u8_ptr;
269 /* Set up to output the remaining data */
271 to_u8_ptr = (u8 *) &align_buffer;
272 from_u8_ptr = (u8 *) from_u16_ptr;
274 /* Output the remaining data */
275 for (; length > 0; length--)
276 *to_u8_ptr++ = *from_u8_ptr++;
278 *to_u32_ptr = align_buffer;
283 * xemaclite_aligned_read - Read from 32-bit aligned to 16-bit aligned buffer
284 * @src_ptr: Pointer to the 32-bit aligned source address
285 * @dest_ptr: Pointer to the 16-bit aligned destination address
286 * @length: Number bytes to read from source to destination
288 * This function reads data from a 32-bit aligned address in the EmacLite device
289 * to a 16-bit aligned buffer.
291 static void xemaclite_aligned_read(u32 *src_ptr, u8 *dest_ptr,
294 u16 *to_u16_ptr, *from_u16_ptr;
298 from_u32_ptr = src_ptr;
299 to_u16_ptr = (u16 *) dest_ptr;
301 for (; length > 3; length -= 4) {
302 /* Copy each word into the temporary buffer */
303 align_buffer = *from_u32_ptr++;
304 from_u16_ptr = (u16 *)&align_buffer;
306 /* Read data from source */
307 *to_u16_ptr++ = *from_u16_ptr++;
308 *to_u16_ptr++ = *from_u16_ptr++;
312 u8 *to_u8_ptr, *from_u8_ptr;
314 /* Set up to read the remaining data */
315 to_u8_ptr = (u8 *) to_u16_ptr;
316 align_buffer = *from_u32_ptr++;
317 from_u8_ptr = (u8 *) &align_buffer;
319 /* Read the remaining data */
320 for (; length > 0; length--)
321 *to_u8_ptr = *from_u8_ptr;
326 * xemaclite_send_data - Send an Ethernet frame
327 * @drvdata: Pointer to the Emaclite device private data
328 * @data: Pointer to the data to be sent
329 * @byte_count: Total frame size, including header
331 * This function checks if the Tx buffer of the Emaclite device is free to send
332 * data. If so, it fills the Tx buffer with data for transmission. Otherwise, it
335 * Return: 0 upon success or -1 if the buffer(s) are full.
337 * Note: The maximum Tx packet size can not be more than Ethernet header
338 * (14 Bytes) + Maximum MTU (1500 bytes). This is excluding FCS.
340 static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
341 unsigned int byte_count)
346 /* Determine the expected Tx buffer address */
347 addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
349 /* If the length is too large, truncate it */
350 if (byte_count > ETH_FRAME_LEN)
351 byte_count = ETH_FRAME_LEN;
353 /* Check if the expected buffer is available */
354 reg_data = in_be32(addr + XEL_TSR_OFFSET);
355 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
356 XEL_TSR_XMIT_ACTIVE_MASK)) == 0) {
358 /* Switch to next buffer if configured */
359 if (drvdata->tx_ping_pong != 0)
360 drvdata->next_tx_buf_to_use ^= XEL_BUFFER_OFFSET;
361 } else if (drvdata->tx_ping_pong != 0) {
362 /* If the expected buffer is full, try the other buffer,
363 * if it is configured in HW */
365 addr = (void __iomem __force *)((u32 __force)addr ^
367 reg_data = in_be32(addr + XEL_TSR_OFFSET);
369 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
370 XEL_TSR_XMIT_ACTIVE_MASK)) != 0)
371 return -1; /* Buffers were full, return failure */
373 return -1; /* Buffer was full, return failure */
375 /* Write the frame to the buffer */
376 xemaclite_aligned_write(data, (u32 __force *) addr, byte_count);
378 out_be32(addr + XEL_TPLR_OFFSET, (byte_count & XEL_TPLR_LENGTH_MASK));
380 /* Update the Tx Status Register to indicate that there is a
381 * frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which
382 * is used by the interrupt handler to check whether a frame
383 * has been transmitted */
384 reg_data = in_be32(addr + XEL_TSR_OFFSET);
385 reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK);
386 out_be32(addr + XEL_TSR_OFFSET, reg_data);
392 * xemaclite_recv_data - Receive a frame
393 * @drvdata: Pointer to the Emaclite device private data
394 * @data: Address where the data is to be received
396 * This function is intended to be called from the interrupt context or
397 * with a wrapper which waits for the receive frame to be available.
399 * Return: Total number of bytes received
401 static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data, int maxlen)
404 u16 length, proto_type;
407 /* Determine the expected buffer address */
408 addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use);
410 /* Verify which buffer has valid data */
411 reg_data = in_be32(addr + XEL_RSR_OFFSET);
413 if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
414 if (drvdata->rx_ping_pong != 0)
415 drvdata->next_rx_buf_to_use ^= XEL_BUFFER_OFFSET;
417 /* The instance is out of sync, try other buffer if other
418 * buffer is configured, return 0 otherwise. If the instance is
419 * out of sync, do not update the 'next_rx_buf_to_use' since it
420 * will correct on subsequent calls */
421 if (drvdata->rx_ping_pong != 0)
422 addr = (void __iomem __force *)((u32 __force)addr ^
425 return 0; /* No data was available */
427 /* Verify that buffer has valid data */
428 reg_data = in_be32(addr + XEL_RSR_OFFSET);
429 if ((reg_data & XEL_RSR_RECV_DONE_MASK) !=
430 XEL_RSR_RECV_DONE_MASK)
431 return 0; /* No data was available */
434 /* Get the protocol type of the ethernet frame that arrived */
435 proto_type = ((ntohl(in_be32(addr + XEL_HEADER_OFFSET +
436 XEL_RXBUFF_OFFSET)) >> XEL_HEADER_SHIFT) &
437 XEL_RPLR_LENGTH_MASK);
439 /* Check if received ethernet frame is a raw ethernet frame
440 * or an IP packet or an ARP packet */
441 if (proto_type > ETH_DATA_LEN) {
443 if (proto_type == ETH_P_IP) {
444 length = ((ntohl(in_be32(addr +
445 XEL_HEADER_IP_LENGTH_OFFSET +
446 XEL_RXBUFF_OFFSET)) >>
448 XEL_RPLR_LENGTH_MASK);
449 length = min_t(u16, length, ETH_DATA_LEN);
450 length += ETH_HLEN + ETH_FCS_LEN;
452 } else if (proto_type == ETH_P_ARP)
453 length = XEL_ARP_PACKET_SIZE + ETH_HLEN + ETH_FCS_LEN;
455 /* Field contains type other than IP or ARP, use max
456 * frame size and let user parse it */
457 length = ETH_FRAME_LEN + ETH_FCS_LEN;
459 /* Use the length in the frame, plus the header and trailer */
460 length = proto_type + ETH_HLEN + ETH_FCS_LEN;
462 if (WARN_ON(length > maxlen))
465 /* Read from the EmacLite device */
466 xemaclite_aligned_read((u32 __force *) (addr + XEL_RXBUFF_OFFSET),
469 /* Acknowledge the frame */
470 reg_data = in_be32(addr + XEL_RSR_OFFSET);
471 reg_data &= ~XEL_RSR_RECV_DONE_MASK;
472 out_be32(addr + XEL_RSR_OFFSET, reg_data);
478 * xemaclite_update_address - Update the MAC address in the device
479 * @drvdata: Pointer to the Emaclite device private data
480 * @address_ptr:Pointer to the MAC address (MAC address is a 48-bit value)
482 * Tx must be idle and Rx should be idle for deterministic results.
483 * It is recommended that this function should be called after the
484 * initialization and before transmission of any packets from the device.
485 * The MAC address can be programmed using any of the two transmit
486 * buffers (if configured).
488 static void xemaclite_update_address(struct net_local *drvdata,
494 /* Determine the expected Tx buffer address */
495 addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
497 xemaclite_aligned_write(address_ptr, (u32 __force *) addr, ETH_ALEN);
499 out_be32(addr + XEL_TPLR_OFFSET, ETH_ALEN);
501 /* Update the MAC address in the EmacLite */
502 reg_data = in_be32(addr + XEL_TSR_OFFSET);
503 out_be32(addr + XEL_TSR_OFFSET, reg_data | XEL_TSR_PROG_MAC_ADDR);
505 /* Wait for EmacLite to finish with the MAC address update */
506 while ((in_be32(addr + XEL_TSR_OFFSET) &
507 XEL_TSR_PROG_MAC_ADDR) != 0)
512 * xemaclite_set_mac_address - Set the MAC address for this device
513 * @dev: Pointer to the network device instance
514 * @addr: Void pointer to the sockaddr structure
516 * This function copies the HW address from the sockaddr strucutre to the
517 * net_device structure and updates the address in HW.
519 * Return: Error if the net device is busy or 0 if the addr is set
522 static int xemaclite_set_mac_address(struct net_device *dev, void *address)
524 struct net_local *lp = netdev_priv(dev);
525 struct sockaddr *addr = address;
527 if (netif_running(dev))
530 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
531 xemaclite_update_address(lp, dev->dev_addr);
536 * xemaclite_tx_timeout - Callback for Tx Timeout
537 * @dev: Pointer to the network device
539 * This function is called when Tx time out occurs for Emaclite device.
541 static void xemaclite_tx_timeout(struct net_device *dev)
543 struct net_local *lp = netdev_priv(dev);
546 dev_err(&lp->ndev->dev, "Exceeded transmit timeout of %lu ms\n",
547 TX_TIMEOUT * 1000UL / HZ);
549 dev->stats.tx_errors++;
551 /* Reset the device */
552 spin_lock_irqsave(&lp->reset_lock, flags);
554 /* Shouldn't really be necessary, but shouldn't hurt */
555 netif_stop_queue(dev);
557 xemaclite_disable_interrupts(lp);
558 xemaclite_enable_interrupts(lp);
560 if (lp->deferred_skb) {
561 dev_kfree_skb(lp->deferred_skb);
562 lp->deferred_skb = NULL;
563 dev->stats.tx_errors++;
566 /* To exclude tx timeout */
567 dev->trans_start = jiffies; /* prevent tx timeout */
569 /* We're all ready to go. Start the queue */
570 netif_wake_queue(dev);
571 spin_unlock_irqrestore(&lp->reset_lock, flags);
574 /**********************/
575 /* Interrupt Handlers */
576 /**********************/
579 * xemaclite_tx_handler - Interrupt handler for frames sent
580 * @dev: Pointer to the network device
582 * This function updates the number of packets transmitted and handles the
583 * deferred skb, if there is one.
585 static void xemaclite_tx_handler(struct net_device *dev)
587 struct net_local *lp = netdev_priv(dev);
589 dev->stats.tx_packets++;
590 if (lp->deferred_skb) {
591 if (xemaclite_send_data(lp,
592 (u8 *) lp->deferred_skb->data,
593 lp->deferred_skb->len) != 0)
596 dev->stats.tx_bytes += lp->deferred_skb->len;
597 dev_kfree_skb_irq(lp->deferred_skb);
598 lp->deferred_skb = NULL;
599 dev->trans_start = jiffies; /* prevent tx timeout */
600 netif_wake_queue(dev);
606 * xemaclite_rx_handler- Interrupt handler for frames received
607 * @dev: Pointer to the network device
609 * This function allocates memory for a socket buffer, fills it with data
610 * received and hands it over to the TCP/IP stack.
612 static void xemaclite_rx_handler(struct net_device *dev)
614 struct net_local *lp = netdev_priv(dev);
619 len = ETH_FRAME_LEN + ETH_FCS_LEN;
620 skb = dev_alloc_skb(len + ALIGNMENT);
622 /* Couldn't get memory. */
623 dev->stats.rx_dropped++;
624 dev_err(&lp->ndev->dev, "Could not allocate receive buffer\n");
629 * A new skb should have the data halfword aligned, but this code is
630 * here just in case that isn't true. Calculate how many
631 * bytes we should reserve to get the data to start on a word
633 align = BUFFER_ALIGN(skb->data);
635 skb_reserve(skb, align);
639 len = xemaclite_recv_data(lp, (u8 *) skb->data, len);
642 dev->stats.rx_errors++;
643 dev_kfree_skb_irq(skb);
647 skb_put(skb, len); /* Tell the skb how much data we got */
649 skb->protocol = eth_type_trans(skb, dev);
650 skb_checksum_none_assert(skb);
652 dev->stats.rx_packets++;
653 dev->stats.rx_bytes += len;
655 if (!skb_defer_rx_timestamp(skb))
656 netif_rx(skb); /* Send the packet upstream */
660 * xemaclite_interrupt - Interrupt handler for this driver
661 * @irq: Irq of the Emaclite device
662 * @dev_id: Void pointer to the network device instance used as callback
665 * This function handles the Tx and Rx interrupts of the EmacLite device.
667 static irqreturn_t xemaclite_interrupt(int irq, void *dev_id)
669 bool tx_complete = 0;
670 struct net_device *dev = dev_id;
671 struct net_local *lp = netdev_priv(dev);
672 void __iomem *base_addr = lp->base_addr;
675 /* Check if there is Rx Data available */
676 if ((in_be32(base_addr + XEL_RSR_OFFSET) & XEL_RSR_RECV_DONE_MASK) ||
677 (in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)
678 & XEL_RSR_RECV_DONE_MASK))
680 xemaclite_rx_handler(dev);
682 /* Check if the Transmission for the first buffer is completed */
683 tx_status = in_be32(base_addr + XEL_TSR_OFFSET);
684 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
685 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
687 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
688 out_be32(base_addr + XEL_TSR_OFFSET, tx_status);
693 /* Check if the Transmission for the second buffer is completed */
694 tx_status = in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
695 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
696 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
698 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
699 out_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET,
705 /* If there was a Tx interrupt, call the Tx Handler */
706 if (tx_complete != 0)
707 xemaclite_tx_handler(dev);
712 /**********************/
713 /* MDIO Bus functions */
714 /**********************/
717 * xemaclite_mdio_wait - Wait for the MDIO to be ready to use
718 * @lp: Pointer to the Emaclite device private data
720 * This function waits till the device is ready to accept a new MDIO
723 * Return: 0 for success or ETIMEDOUT for a timeout
726 static int xemaclite_mdio_wait(struct net_local *lp)
728 long end = jiffies + 2;
730 /* wait for the MDIO interface to not be busy or timeout
733 while (in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET) &
734 XEL_MDIOCTRL_MDIOSTS_MASK) {
735 if (end - jiffies <= 0) {
745 * xemaclite_mdio_read - Read from a given MII management register
746 * @bus: the mii_bus struct
747 * @phy_id: the phy address
748 * @reg: register number to read from
750 * This function waits till the device is ready to accept a new MDIO
751 * request and then writes the phy address to the MDIO Address register
752 * and reads data from MDIO Read Data register, when its available.
754 * Return: Value read from the MII management register
756 static int xemaclite_mdio_read(struct mii_bus *bus, int phy_id, int reg)
758 struct net_local *lp = bus->priv;
762 if (xemaclite_mdio_wait(lp))
765 /* Write the PHY address, register number and set the OP bit in the
766 * MDIO Address register. Set the Status bit in the MDIO Control
767 * register to start a MDIO read transaction.
769 ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET);
770 out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET,
771 XEL_MDIOADDR_OP_MASK |
772 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg));
773 out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
774 ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK);
776 if (xemaclite_mdio_wait(lp))
779 rc = in_be32(lp->base_addr + XEL_MDIORD_OFFSET);
781 dev_dbg(&lp->ndev->dev,
782 "xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n",
789 * xemaclite_mdio_write - Write to a given MII management register
790 * @bus: the mii_bus struct
791 * @phy_id: the phy address
792 * @reg: register number to write to
793 * @val: value to write to the register number specified by reg
795 * This function waits till the device is ready to accept a new MDIO
796 * request and then writes the val to the MDIO Write Data register.
798 static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg,
801 struct net_local *lp = bus->priv;
804 dev_dbg(&lp->ndev->dev,
805 "xemaclite_mdio_write(phy_id=%i, reg=%x, val=%x)\n",
808 if (xemaclite_mdio_wait(lp))
811 /* Write the PHY address, register number and clear the OP bit in the
812 * MDIO Address register and then write the value into the MDIO Write
813 * Data register. Finally, set the Status bit in the MDIO Control
814 * register to start a MDIO write transaction.
816 ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET);
817 out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET,
818 ~XEL_MDIOADDR_OP_MASK &
819 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg));
820 out_be32(lp->base_addr + XEL_MDIOWR_OFFSET, val);
821 out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
822 ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK);
828 * xemaclite_mdio_reset - Reset the mdio bus.
829 * @bus: Pointer to the MII bus
831 * This function is required(?) as per Documentation/networking/phy.txt.
832 * There is no reset in this device; this function always returns 0.
834 static int xemaclite_mdio_reset(struct mii_bus *bus)
840 * xemaclite_mdio_setup - Register mii_bus for the Emaclite device
841 * @lp: Pointer to the Emaclite device private data
842 * @ofdev: Pointer to OF device structure
844 * This function enables MDIO bus in the Emaclite device and registers a
847 * Return: 0 upon success or a negative error upon failure
849 static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
854 struct device_node *np = of_get_parent(lp->phy_node);
856 /* Don't register the MDIO bus if the phy_node or its parent node
862 /* Enable the MDIO bus by asserting the enable bit in MDIO Control
865 out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
866 XEL_MDIOCTRL_MDIOEN_MASK);
868 bus = mdiobus_alloc();
872 of_address_to_resource(np, 0, &res);
873 snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
874 (unsigned long long)res.start);
876 bus->name = "Xilinx Emaclite MDIO";
877 bus->read = xemaclite_mdio_read;
878 bus->write = xemaclite_mdio_write;
879 bus->reset = xemaclite_mdio_reset;
881 bus->irq = lp->mdio_irqs; /* preallocated IRQ table */
885 rc = of_mdiobus_register(bus, np);
897 * xemaclite_adjust_link - Link state callback for the Emaclite device
898 * @ndev: pointer to net_device struct
900 * There's nothing in the Emaclite device to be configured when the link
901 * state changes. We just print the status.
903 void xemaclite_adjust_link(struct net_device *ndev)
905 struct net_local *lp = netdev_priv(ndev);
906 struct phy_device *phy = lp->phy_dev;
909 /* hash together the state values to decide if something has changed */
910 link_state = phy->speed | (phy->duplex << 1) | phy->link;
912 if (lp->last_link != link_state) {
913 lp->last_link = link_state;
914 phy_print_status(phy);
919 * xemaclite_open - Open the network device
920 * @dev: Pointer to the network device
922 * This function sets the MAC address, requests an IRQ and enables interrupts
923 * for the Emaclite device and starts the Tx queue.
924 * It also connects to the phy device, if MDIO is included in Emaclite device.
926 static int xemaclite_open(struct net_device *dev)
928 struct net_local *lp = netdev_priv(dev);
931 /* Just to be safe, stop the device first */
932 xemaclite_disable_interrupts(lp);
937 lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
938 xemaclite_adjust_link, 0,
939 PHY_INTERFACE_MODE_MII);
941 dev_err(&lp->ndev->dev, "of_phy_connect() failed\n");
945 /* EmacLite doesn't support giga-bit speeds */
946 lp->phy_dev->supported &= (PHY_BASIC_FEATURES);
947 lp->phy_dev->advertising = lp->phy_dev->supported;
949 /* Don't advertise 1000BASE-T Full/Half duplex speeds */
950 phy_write(lp->phy_dev, MII_CTRL1000, 0);
952 /* Advertise only 10 and 100mbps full/half duplex speeds */
953 phy_write(lp->phy_dev, MII_ADVERTISE, ADVERTISE_ALL);
955 /* Restart auto negotiation */
956 bmcr = phy_read(lp->phy_dev, MII_BMCR);
957 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
958 phy_write(lp->phy_dev, MII_BMCR, bmcr);
960 phy_start(lp->phy_dev);
963 /* Set the MAC address each time opened */
964 xemaclite_update_address(lp, dev->dev_addr);
967 retval = request_irq(dev->irq, xemaclite_interrupt, 0, dev->name, dev);
969 dev_err(&lp->ndev->dev, "Could not allocate interrupt %d\n",
972 phy_disconnect(lp->phy_dev);
978 /* Enable Interrupts */
979 xemaclite_enable_interrupts(lp);
981 /* We're ready to go */
982 netif_start_queue(dev);
988 * xemaclite_close - Close the network device
989 * @dev: Pointer to the network device
991 * This function stops the Tx queue, disables interrupts and frees the IRQ for
992 * the Emaclite device.
993 * It also disconnects the phy device associated with the Emaclite device.
995 static int xemaclite_close(struct net_device *dev)
997 struct net_local *lp = netdev_priv(dev);
999 netif_stop_queue(dev);
1000 xemaclite_disable_interrupts(lp);
1001 free_irq(dev->irq, dev);
1004 phy_disconnect(lp->phy_dev);
1011 * xemaclite_send - Transmit a frame
1012 * @orig_skb: Pointer to the socket buffer to be transmitted
1013 * @dev: Pointer to the network device
1015 * This function checks if the Tx buffer of the Emaclite device is free to send
1016 * data. If so, it fills the Tx buffer with data from socket buffer data,
1017 * updates the stats and frees the socket buffer. The Tx completion is signaled
1018 * by an interrupt. If the Tx buffer isn't free, then the socket buffer is
1019 * deferred and the Tx queue is stopped so that the deferred socket buffer can
1020 * be transmitted when the Emaclite device is free to transmit data.
1022 * Return: 0, always.
1024 static int xemaclite_send(struct sk_buff *orig_skb, struct net_device *dev)
1026 struct net_local *lp = netdev_priv(dev);
1027 struct sk_buff *new_skb;
1029 unsigned long flags;
1031 len = orig_skb->len;
1035 spin_lock_irqsave(&lp->reset_lock, flags);
1036 if (xemaclite_send_data(lp, (u8 *) new_skb->data, len) != 0) {
1037 /* If the Emaclite Tx buffer is busy, stop the Tx queue and
1038 * defer the skb for transmission during the ISR, after the
1039 * current transmission is complete */
1040 netif_stop_queue(dev);
1041 lp->deferred_skb = new_skb;
1042 /* Take the time stamp now, since we can't do this in an ISR. */
1043 skb_tx_timestamp(new_skb);
1044 spin_unlock_irqrestore(&lp->reset_lock, flags);
1047 spin_unlock_irqrestore(&lp->reset_lock, flags);
1049 skb_tx_timestamp(new_skb);
1051 dev->stats.tx_bytes += len;
1052 dev_kfree_skb(new_skb);
1058 * xemaclite_remove_ndev - Free the network device
1059 * @ndev: Pointer to the network device to be freed
1061 * This function un maps the IO region of the Emaclite device and frees the net
1064 static void xemaclite_remove_ndev(struct net_device *ndev)
1067 struct net_local *lp = netdev_priv(ndev);
1070 iounmap((void __iomem __force *) (lp->base_addr));
1076 * get_bool - Get a parameter from the OF device
1077 * @ofdev: Pointer to OF device structure
1078 * @s: Property to be retrieved
1080 * This function looks for a property in the device node and returns the value
1081 * of the property if its found or 0 if the property is not found.
1083 * Return: Value of the parameter if the parameter is found, or 0 otherwise
1085 static bool get_bool(struct platform_device *ofdev, const char *s)
1087 u32 *p = (u32 *)of_get_property(ofdev->dev.of_node, s, NULL);
1092 dev_warn(&ofdev->dev, "Parameter %s not found,"
1093 "defaulting to false\n", s);
1098 static struct net_device_ops xemaclite_netdev_ops;
1101 * xemaclite_of_probe - Probe method for the Emaclite device.
1102 * @ofdev: Pointer to OF device structure
1103 * @match: Pointer to the structure used for matching a device
1105 * This function probes for the Emaclite device in the device tree.
1106 * It initializes the driver data structure and the hardware, sets the MAC
1107 * address and registers the network device.
1108 * It also registers a mii_bus for the Emaclite device, if MDIO is included
1111 * Return: 0, if the driver is bound to the Emaclite device, or
1112 * a negative error if there is failure.
1114 static int __devinit xemaclite_of_probe(struct platform_device *ofdev)
1116 struct resource r_irq; /* Interrupt resources */
1117 struct resource r_mem; /* IO mem resources */
1118 struct net_device *ndev = NULL;
1119 struct net_local *lp = NULL;
1120 struct device *dev = &ofdev->dev;
1121 const void *mac_address;
1125 dev_info(dev, "Device Tree Probing\n");
1127 /* Get iospace for the device */
1128 rc = of_address_to_resource(ofdev->dev.of_node, 0, &r_mem);
1130 dev_err(dev, "invalid address\n");
1134 /* Get IRQ for the device */
1135 rc = of_irq_to_resource(ofdev->dev.of_node, 0, &r_irq);
1137 dev_err(dev, "no IRQ found\n");
1141 /* Create an ethernet device instance */
1142 ndev = alloc_etherdev(sizeof(struct net_local));
1144 dev_err(dev, "Could not allocate network device\n");
1148 dev_set_drvdata(dev, ndev);
1149 SET_NETDEV_DEV(ndev, &ofdev->dev);
1151 ndev->irq = r_irq.start;
1152 ndev->mem_start = r_mem.start;
1153 ndev->mem_end = r_mem.end;
1155 lp = netdev_priv(ndev);
1158 if (!request_mem_region(ndev->mem_start,
1159 ndev->mem_end - ndev->mem_start + 1,
1161 dev_err(dev, "Couldn't lock memory region at %p\n",
1162 (void *)ndev->mem_start);
1167 /* Get the virtual base address for the device */
1168 lp->base_addr = ioremap(r_mem.start, resource_size(&r_mem));
1169 if (NULL == lp->base_addr) {
1170 dev_err(dev, "EmacLite: Could not allocate iomem\n");
1175 spin_lock_init(&lp->reset_lock);
1176 lp->next_tx_buf_to_use = 0x0;
1177 lp->next_rx_buf_to_use = 0x0;
1178 lp->tx_ping_pong = get_bool(ofdev, "xlnx,tx-ping-pong");
1179 lp->rx_ping_pong = get_bool(ofdev, "xlnx,rx-ping-pong");
1180 mac_address = of_get_mac_address(ofdev->dev.of_node);
1183 /* Set the MAC address. */
1184 memcpy(ndev->dev_addr, mac_address, 6);
1186 dev_warn(dev, "No MAC address found\n");
1188 /* Clear the Tx CSR's in case this is a restart */
1189 out_be32(lp->base_addr + XEL_TSR_OFFSET, 0);
1190 out_be32(lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET, 0);
1192 /* Set the MAC address in the EmacLite device */
1193 xemaclite_update_address(lp, ndev->dev_addr);
1195 lp->phy_node = of_parse_phandle(ofdev->dev.of_node, "phy-handle", 0);
1196 rc = xemaclite_mdio_setup(lp, &ofdev->dev);
1198 dev_warn(&ofdev->dev, "error registering MDIO bus\n");
1200 dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
1202 ndev->netdev_ops = &xemaclite_netdev_ops;
1203 ndev->flags &= ~IFF_MULTICAST;
1204 ndev->watchdog_timeo = TX_TIMEOUT;
1206 /* Finally, register the device */
1207 rc = register_netdev(ndev);
1210 "Cannot register network device, aborting\n");
1215 "Xilinx EmacLite at 0x%08X mapped to 0x%08X, irq=%d\n",
1216 (unsigned int __force)ndev->mem_start,
1217 (unsigned int __force)lp->base_addr, ndev->irq);
1221 release_mem_region(ndev->mem_start, resource_size(&r_mem));
1224 xemaclite_remove_ndev(ndev);
1229 * xemaclite_of_remove - Unbind the driver from the Emaclite device.
1230 * @of_dev: Pointer to OF device structure
1232 * This function is called if a device is physically removed from the system or
1233 * if the driver module is being unloaded. It frees any resources allocated to
1236 * Return: 0, always.
1238 static int __devexit xemaclite_of_remove(struct platform_device *of_dev)
1240 struct device *dev = &of_dev->dev;
1241 struct net_device *ndev = dev_get_drvdata(dev);
1243 struct net_local *lp = netdev_priv(ndev);
1245 /* Un-register the mii_bus, if configured */
1247 mdiobus_unregister(lp->mii_bus);
1248 kfree(lp->mii_bus->irq);
1249 mdiobus_free(lp->mii_bus);
1253 unregister_netdev(ndev);
1256 of_node_put(lp->phy_node);
1257 lp->phy_node = NULL;
1259 release_mem_region(ndev->mem_start, ndev->mem_end-ndev->mem_start + 1);
1261 xemaclite_remove_ndev(ndev);
1262 dev_set_drvdata(dev, NULL);
1267 #ifdef CONFIG_NET_POLL_CONTROLLER
1269 xemaclite_poll_controller(struct net_device *ndev)
1271 disable_irq(ndev->irq);
1272 xemaclite_interrupt(ndev->irq, ndev);
1273 enable_irq(ndev->irq);
1277 static struct net_device_ops xemaclite_netdev_ops = {
1278 .ndo_open = xemaclite_open,
1279 .ndo_stop = xemaclite_close,
1280 .ndo_start_xmit = xemaclite_send,
1281 .ndo_set_mac_address = xemaclite_set_mac_address,
1282 .ndo_tx_timeout = xemaclite_tx_timeout,
1283 #ifdef CONFIG_NET_POLL_CONTROLLER
1284 .ndo_poll_controller = xemaclite_poll_controller,
1288 /* Match table for OF platform binding */
1289 static struct of_device_id xemaclite_of_match[] __devinitdata = {
1290 { .compatible = "xlnx,opb-ethernetlite-1.01.a", },
1291 { .compatible = "xlnx,opb-ethernetlite-1.01.b", },
1292 { .compatible = "xlnx,xps-ethernetlite-1.00.a", },
1293 { .compatible = "xlnx,xps-ethernetlite-2.00.a", },
1294 { .compatible = "xlnx,xps-ethernetlite-2.01.a", },
1295 { .compatible = "xlnx,xps-ethernetlite-3.00.a", },
1296 { /* end of list */ },
1298 MODULE_DEVICE_TABLE(of, xemaclite_of_match);
1300 static struct platform_driver xemaclite_of_driver = {
1302 .name = DRIVER_NAME,
1303 .owner = THIS_MODULE,
1304 .of_match_table = xemaclite_of_match,
1306 .probe = xemaclite_of_probe,
1307 .remove = __devexit_p(xemaclite_of_remove),
1311 * xgpiopss_init - Initial driver registration call
1313 * Return: 0 upon success, or a negative error upon failure.
1315 static int __init xemaclite_init(void)
1317 /* No kernel boot options used, we just need to register the driver */
1318 return platform_driver_register(&xemaclite_of_driver);
1322 * xemaclite_cleanup - Driver un-registration call
1324 static void __exit xemaclite_cleanup(void)
1326 platform_driver_unregister(&xemaclite_of_driver);
1329 module_init(xemaclite_init);
1330 module_exit(xemaclite_cleanup);
1332 MODULE_AUTHOR("Xilinx, Inc.");
1333 MODULE_DESCRIPTION("Xilinx Ethernet MAC Lite driver");
1334 MODULE_LICENSE("GPL");