drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2011 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for ixgbe */
  29
  30 #include <linux/interrupt.h>
  31 #include <linux/types.h>
  32 #include <linux/module.h>
  33 #include <linux/slab.h>
  34 #include <linux/pci.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/ethtool.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/uaccess.h>
  39
  40 #include "ixgbe.h"
  41
  42
  43 #define IXGBE_ALL_RAR_ENTRIES 16
  44
  45 enum {NETDEV_STATS, IXGBE_STATS};
  46
  47 struct ixgbe_stats {
  48         char stat_string[ETH_GSTRING_LEN];
  49         int type;
  50         int sizeof_stat;
  51         int stat_offset;
  52 };
  53
  54 #define IXGBE_STAT(m)           IXGBE_STATS, \
  55                                 sizeof(((struct ixgbe_adapter *)0)->m), \
  56                                 offsetof(struct ixgbe_adapter, m)
  57 #define IXGBE_NETDEV_STAT(m)    NETDEV_STATS, \
  58                                 sizeof(((struct rtnl_link_stats64 *)0)->m), \
  59                                 offsetof(struct rtnl_link_stats64, m)
  60
  61 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
  62         {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
  63         {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
  64         {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
  65         {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
  66         {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
  67         {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
  68         {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
  69         {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
  70         {"lsc_int", IXGBE_STAT(lsc_int)},
  71         {"tx_busy", IXGBE_STAT(tx_busy)},
  72         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
  73         {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
  74         {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
  75         {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
  76         {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
  77         {"multicast", IXGBE_NETDEV_STAT(multicast)},
  78         {"broadcast", IXGBE_STAT(stats.bprc)},
  79         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
  80         {"collisions", IXGBE_NETDEV_STAT(collisions)},
  81         {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
  82         {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
  83         {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
  84         {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
  85         {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
  86         {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
  87         {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
  88         {"fdir_overflow", IXGBE_STAT(fdir_overflow)},
  89         {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
  90         {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
  91         {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
  92         {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
  93         {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
  94         {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
  95         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
  96         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
  97         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
  98         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
  99         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
 100         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
 101         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
 102         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
 103         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
 104         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
 105         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
 106         {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
 107         {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)},
 108         {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)},
 109         {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)},
 110         {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)},
 111 #ifdef IXGBE_FCOE
 112         {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
 113         {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
 114         {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
 115         {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
 116         {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
 117         {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
 118 #endif /* IXGBE_FCOE */
 119 };
 120
 121 #define IXGBE_QUEUE_STATS_LEN \
 122         ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
 123         ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
 124         (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
 125 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
 126 #define IXGBE_PB_STATS_LEN ( \
 127                  (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
 128                  IXGBE_FLAG_DCB_ENABLED) ? \
 129                  (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
 130                   sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
 131                   sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
 132                   sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
 133                   / sizeof(u64) : 0)
 134 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
 135                          IXGBE_PB_STATS_LEN + \
 136                          IXGBE_QUEUE_STATS_LEN)
 137
 138 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
 139         "Register test  (offline)", "Eeprom test    (offline)",
 140         "Interrupt test (offline)", "Loopback test  (offline)",
 141         "Link test   (on/offline)"
 142 };
 143 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 144
 145 static int ixgbe_get_settings(struct net_device *netdev,
 146                               struct ethtool_cmd *ecmd)
 147 {
 148         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 149         struct ixgbe_hw *hw = &adapter->hw;
 150         u32 link_speed = 0;
 151         bool link_up;
 152
 153         ecmd->supported = SUPPORTED_10000baseT_Full;
 154         ecmd->autoneg = AUTONEG_ENABLE;
 155         ecmd->transceiver = XCVR_EXTERNAL;
 156         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 157             (hw->phy.multispeed_fiber)) {
 158                 ecmd->supported |= (SUPPORTED_1000baseT_Full |
 159                                     SUPPORTED_Autoneg);
 160
 161                 switch (hw->mac.type) {
 162                 case ixgbe_mac_X540:
 163                         ecmd->supported |= SUPPORTED_100baseT_Full;
 164                         break;
 165                 default:
 166                         break;
 167                 }
 168
 169                 ecmd->advertising = ADVERTISED_Autoneg;
 170                 if (hw->phy.autoneg_advertised) {
 171                         if (hw->phy.autoneg_advertised &
 172                             IXGBE_LINK_SPEED_100_FULL)
 173                                 ecmd->advertising |= ADVERTISED_100baseT_Full;
 174                         if (hw->phy.autoneg_advertised &
 175                             IXGBE_LINK_SPEED_10GB_FULL)
 176                                 ecmd->advertising |= ADVERTISED_10000baseT_Full;
 177                         if (hw->phy.autoneg_advertised &
 178                             IXGBE_LINK_SPEED_1GB_FULL)
 179                                 ecmd->advertising |= ADVERTISED_1000baseT_Full;
 180                 } else {
 181                         /*
 182                          * Default advertised modes in case
 183                          * phy.autoneg_advertised isn't set.
 184                          */
 185                         ecmd->advertising |= (ADVERTISED_10000baseT_Full |
 186                                               ADVERTISED_1000baseT_Full);
 187                         if (hw->mac.type == ixgbe_mac_X540)
 188                                 ecmd->advertising |= ADVERTISED_100baseT_Full;
 189                 }
 190
 191                 if (hw->phy.media_type == ixgbe_media_type_copper) {
 192                         ecmd->supported |= SUPPORTED_TP;
 193                         ecmd->advertising |= ADVERTISED_TP;
 194                         ecmd->port = PORT_TP;
 195                 } else {
 196                         ecmd->supported |= SUPPORTED_FIBRE;
 197                         ecmd->advertising |= ADVERTISED_FIBRE;
 198                         ecmd->port = PORT_FIBRE;
 199                 }
 200         } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
 201                 /* Set as FIBRE until SERDES defined in kernel */
 202                 if (hw->device_id == IXGBE_DEV_ID_82598_BX) {
 203                         ecmd->supported = (SUPPORTED_1000baseT_Full |
 204                                            SUPPORTED_FIBRE);
 205                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 206                                              ADVERTISED_FIBRE);
 207                         ecmd->port = PORT_FIBRE;
 208                         ecmd->autoneg = AUTONEG_DISABLE;
 209                 } else if ((hw->device_id == IXGBE_DEV_ID_82599_COMBO_BACKPLANE) ||
 210                            (hw->device_id == IXGBE_DEV_ID_82599_KX4_MEZZ)) {
 211                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 212                                             SUPPORTED_Autoneg |
 213                                             SUPPORTED_FIBRE);
 214                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 215                                              ADVERTISED_1000baseT_Full |
 216                                              ADVERTISED_Autoneg |
 217                                              ADVERTISED_FIBRE);
 218                         ecmd->port = PORT_FIBRE;
 219                 } else {
 220                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 221                                             SUPPORTED_FIBRE);
 222                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 223                                              ADVERTISED_1000baseT_Full |
 224                                              ADVERTISED_FIBRE);
 225                         ecmd->port = PORT_FIBRE;
 226                 }
 227         } else {
 228                 ecmd->supported |= SUPPORTED_FIBRE;
 229                 ecmd->advertising = (ADVERTISED_10000baseT_Full |
 230                                      ADVERTISED_FIBRE);
 231                 ecmd->port = PORT_FIBRE;
 232                 ecmd->autoneg = AUTONEG_DISABLE;
 233         }
 234
 235         /* Get PHY type */
 236         switch (adapter->hw.phy.type) {
 237         case ixgbe_phy_tn:
 238         case ixgbe_phy_aq:
 239         case ixgbe_phy_cu_unknown:
 240                 /* Copper 10G-BASET */
 241                 ecmd->port = PORT_TP;
 242                 break;
 243         case ixgbe_phy_qt:
 244                 ecmd->port = PORT_FIBRE;
 245                 break;
 246         case ixgbe_phy_nl:
 247         case ixgbe_phy_sfp_passive_tyco:
 248         case ixgbe_phy_sfp_passive_unknown:
 249         case ixgbe_phy_sfp_ftl:
 250         case ixgbe_phy_sfp_avago:
 251         case ixgbe_phy_sfp_intel:
 252         case ixgbe_phy_sfp_unknown:
 253                 switch (adapter->hw.phy.sfp_type) {
 254                 /* SFP+ devices, further checking needed */
 255                 case ixgbe_sfp_type_da_cu:
 256                 case ixgbe_sfp_type_da_cu_core0:
 257                 case ixgbe_sfp_type_da_cu_core1:
 258                         ecmd->port = PORT_DA;
 259                         break;
 260                 case ixgbe_sfp_type_sr:
 261                 case ixgbe_sfp_type_lr:
 262                 case ixgbe_sfp_type_srlr_core0:
 263                 case ixgbe_sfp_type_srlr_core1:
 264                         ecmd->port = PORT_FIBRE;
 265                         break;
 266                 case ixgbe_sfp_type_not_present:
 267                         ecmd->port = PORT_NONE;
 268                         break;
 269                 case ixgbe_sfp_type_1g_cu_core0:
 270                 case ixgbe_sfp_type_1g_cu_core1:
 271                         ecmd->port = PORT_TP;
 272                         ecmd->supported = SUPPORTED_TP;
 273                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 274                                              ADVERTISED_TP);
 275                         break;
 276                 case ixgbe_sfp_type_unknown:
 277                 default:
 278                         ecmd->port = PORT_OTHER;
 279                         break;
 280                 }
 281                 break;
 282         case ixgbe_phy_xaui:
 283                 ecmd->port = PORT_NONE;
 284                 break;
 285         case ixgbe_phy_unknown:
 286         case ixgbe_phy_generic:
 287         case ixgbe_phy_sfp_unsupported:
 288         default:
 289                 ecmd->port = PORT_OTHER;
 290                 break;
 291         }
 292
 293         hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
 294         if (link_up) {
 295                 switch (link_speed) {
 296                 case IXGBE_LINK_SPEED_10GB_FULL:
 297                         ethtool_cmd_speed_set(ecmd, SPEED_10000);
 298                         break;
 299                 case IXGBE_LINK_SPEED_1GB_FULL:
 300                         ethtool_cmd_speed_set(ecmd, SPEED_1000);
 301                         break;
 302                 case IXGBE_LINK_SPEED_100_FULL:
 303                         ethtool_cmd_speed_set(ecmd, SPEED_100);
 304                         break;
 305                 default:
 306                         break;
 307                 }
 308                 ecmd->duplex = DUPLEX_FULL;
 309         } else {
 310                 ethtool_cmd_speed_set(ecmd, -1);
 311                 ecmd->duplex = -1;
 312         }
 313
 314         return 0;
 315 }
 316
 317 static int ixgbe_set_settings(struct net_device *netdev,
 318                               struct ethtool_cmd *ecmd)
 319 {
 320         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 321         struct ixgbe_hw *hw = &adapter->hw;
 322         u32 advertised, old;
 323         s32 err = 0;
 324
 325         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 326             (hw->phy.multispeed_fiber)) {
 327                 /*
 328                  * this function does not support duplex forcing, but can
 329                  * limit the advertising of the adapter to the specified speed
 330                  */
 331                 if (ecmd->autoneg == AUTONEG_DISABLE)
 332                         return -EINVAL;
 333
 334                 if (ecmd->advertising & ~ecmd->supported)
 335                         return -EINVAL;
 336
 337                 old = hw->phy.autoneg_advertised;
 338                 advertised = 0;
 339                 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
 340                         advertised |= IXGBE_LINK_SPEED_10GB_FULL;
 341
 342                 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
 343                         advertised |= IXGBE_LINK_SPEED_1GB_FULL;
 344
 345                 if (ecmd->advertising & ADVERTISED_100baseT_Full)
 346                         advertised |= IXGBE_LINK_SPEED_100_FULL;
 347
 348                 if (old == advertised)
 349                         return err;
 350                 /* this sets the link speed and restarts auto-neg */
 351                 hw->mac.autotry_restart = true;
 352                 err = hw->mac.ops.setup_link(hw, advertised, true, true);
 353                 if (err) {
 354                         e_info(probe, "setup link failed with code %d\n", err);
 355                         hw->mac.ops.setup_link(hw, old, true, true);
 356                 }
 357         } else {
 358                 /* in this case we currently only support 10Gb/FULL */
 359                 u32 speed = ethtool_cmd_speed(ecmd);
 360                 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
 361                     (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
 362                     (speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
 363                         return -EINVAL;
 364         }
 365
 366         return err;
 367 }
 368
 369 static void ixgbe_get_pauseparam(struct net_device *netdev,
 370                                  struct ethtool_pauseparam *pause)
 371 {
 372         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 373         struct ixgbe_hw *hw = &adapter->hw;
 374
 375         /*
 376          * Flow Control Autoneg isn't on if
 377          *  - we didn't ask for it OR
 378          *  - it failed, we know this by tx & rx being off
 379          */
 380         if (hw->fc.disable_fc_autoneg ||
 381             (hw->fc.current_mode == ixgbe_fc_none))
 382                 pause->autoneg = 0;
 383         else
 384                 pause->autoneg = 1;
 385
 386         if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
 387                 pause->rx_pause = 1;
 388         } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
 389                 pause->tx_pause = 1;
 390         } else if (hw->fc.current_mode == ixgbe_fc_full) {
 391                 pause->rx_pause = 1;
 392                 pause->tx_pause = 1;
 393 #ifdef CONFIG_DCB
 394         } else if (hw->fc.current_mode == ixgbe_fc_pfc) {
 395                 pause->rx_pause = 0;
 396                 pause->tx_pause = 0;
 397 #endif
 398         }
 399 }
 400
 401 static int ixgbe_set_pauseparam(struct net_device *netdev,
 402                                 struct ethtool_pauseparam *pause)
 403 {
 404         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 405         struct ixgbe_hw *hw = &adapter->hw;
 406         struct ixgbe_fc_info fc;
 407
 408 #ifdef CONFIG_DCB
 409         if (adapter->dcb_cfg.pfc_mode_enable ||
 410                 ((hw->mac.type == ixgbe_mac_82598EB) &&
 411                 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)))
 412                 return -EINVAL;
 413
 414 #endif
 415         fc = hw->fc;
 416
 417         if (pause->autoneg != AUTONEG_ENABLE)
 418                 fc.disable_fc_autoneg = true;
 419         else
 420                 fc.disable_fc_autoneg = false;
 421
 422         if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
 423                 fc.requested_mode = ixgbe_fc_full;
 424         else if (pause->rx_pause && !pause->tx_pause)
 425                 fc.requested_mode = ixgbe_fc_rx_pause;
 426         else if (!pause->rx_pause && pause->tx_pause)
 427                 fc.requested_mode = ixgbe_fc_tx_pause;
 428         else if (!pause->rx_pause && !pause->tx_pause)
 429                 fc.requested_mode = ixgbe_fc_none;
 430         else
 431                 return -EINVAL;
 432
 433 #ifdef CONFIG_DCB
 434         adapter->last_lfc_mode = fc.requested_mode;
 435 #endif
 436
 437         /* if the thing changed then we'll update and use new autoneg */
 438         if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
 439                 hw->fc = fc;
 440                 if (netif_running(netdev))
 441                         ixgbe_reinit_locked(adapter);
 442                 else
 443                         ixgbe_reset(adapter);
 444         }
 445
 446         return 0;
 447 }
 448
 449 static u32 ixgbe_get_msglevel(struct net_device *netdev)
 450 {
 451         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 452         return adapter->msg_enable;
 453 }
 454
 455 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
 456 {
 457         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 458         adapter->msg_enable = data;
 459 }
 460
 461 static int ixgbe_get_regs_len(struct net_device *netdev)
 462 {
 463 #define IXGBE_REGS_LEN  1128
 464         return IXGBE_REGS_LEN * sizeof(u32);
 465 }
 466
 467 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
 468
 469 static void ixgbe_get_regs(struct net_device *netdev,
 470                            struct ethtool_regs *regs, void *p)
 471 {
 472         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 473         struct ixgbe_hw *hw = &adapter->hw;
 474         u32 *regs_buff = p;
 475         u8 i;
 476
 477         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
 478
 479         regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
 480
 481         /* General Registers */
 482         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
 483         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
 484         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 485         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
 486         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
 487         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 488         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
 489         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
 490
 491         /* NVM Register */
 492         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
 493         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
 494         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
 495         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
 496         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
 497         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
 498         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
 499         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
 500         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
 501         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
 502
 503         /* Interrupt */
 504         /* don't read EICR because it can clear interrupt causes, instead
 505          * read EICS which is a shadow but doesn't clear EICR */
 506         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
 507         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
 508         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
 509         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
 510         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
 511         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
 512         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
 513         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
 514         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
 515         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
 516         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
 517         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
 518
 519         /* Flow Control */
 520         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
 521         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
 522         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
 523         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
 524         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
 525         for (i = 0; i < 8; i++) {
 526                 switch (hw->mac.type) {
 527                 case ixgbe_mac_82598EB:
 528                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
 529                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
 530                         break;
 531                 case ixgbe_mac_82599EB:
 532                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
 533                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
 534                         break;
 535                 default:
 536                         break;
 537                 }
 538         }
 539         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
 540         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
 541
 542         /* Receive DMA */
 543         for (i = 0; i < 64; i++)
 544                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 545         for (i = 0; i < 64; i++)
 546                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 547         for (i = 0; i < 64; i++)
 548                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 549         for (i = 0; i < 64; i++)
 550                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 551         for (i = 0; i < 64; i++)
 552                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 553         for (i = 0; i < 64; i++)
 554                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 555         for (i = 0; i < 16; i++)
 556                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 557         for (i = 0; i < 16; i++)
 558                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 559         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 560         for (i = 0; i < 8; i++)
 561                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
 562         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 563         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
 564
 565         /* Receive */
 566         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 567         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
 568         for (i = 0; i < 16; i++)
 569                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
 570         for (i = 0; i < 16; i++)
 571                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
 572         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
 573         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 574         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 575         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
 576         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
 577         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
 578         for (i = 0; i < 8; i++)
 579                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
 580         for (i = 0; i < 8; i++)
 581                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
 582         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
 583
 584         /* Transmit */
 585         for (i = 0; i < 32; i++)
 586                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 587         for (i = 0; i < 32; i++)
 588                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 589         for (i = 0; i < 32; i++)
 590                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 591         for (i = 0; i < 32; i++)
 592                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 593         for (i = 0; i < 32; i++)
 594                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 595         for (i = 0; i < 32; i++)
 596                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 597         for (i = 0; i < 32; i++)
 598                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
 599         for (i = 0; i < 32; i++)
 600                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
 601         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
 602         for (i = 0; i < 16; i++)
 603                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
 604         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
 605         for (i = 0; i < 8; i++)
 606                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
 607         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
 608
 609         /* Wake Up */
 610         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
 611         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
 612         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
 613         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
 614         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
 615         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
 616         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
 617         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
 618         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
 619
 620         /* DCB */
 621         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
 622         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
 623         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
 624         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
 625         for (i = 0; i < 8; i++)
 626                 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
 627         for (i = 0; i < 8; i++)
 628                 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
 629         for (i = 0; i < 8; i++)
 630                 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
 631         for (i = 0; i < 8; i++)
 632                 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
 633         for (i = 0; i < 8; i++)
 634                 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
 635         for (i = 0; i < 8; i++)
 636                 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
 637
 638         /* Statistics */
 639         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
 640         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
 641         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
 642         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
 643         for (i = 0; i < 8; i++)
 644                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
 645         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
 646         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
 647         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
 648         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
 649         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
 650         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
 651         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
 652         for (i = 0; i < 8; i++)
 653                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
 654         for (i = 0; i < 8; i++)
 655                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
 656         for (i = 0; i < 8; i++)
 657                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
 658         for (i = 0; i < 8; i++)
 659                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
 660         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
 661         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
 662         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
 663         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
 664         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
 665         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
 666         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
 667         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
 668         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
 669         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
 670         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
 671         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
 672         for (i = 0; i < 8; i++)
 673                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
 674         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
 675         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
 676         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
 677         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
 678         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
 679         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
 680         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
 681         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
 682         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
 683         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
 684         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
 685         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
 686         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
 687         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
 688         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
 689         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
 690         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
 691         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
 692         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
 693         for (i = 0; i < 16; i++)
 694                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
 695         for (i = 0; i < 16; i++)
 696                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
 697         for (i = 0; i < 16; i++)
 698                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
 699         for (i = 0; i < 16; i++)
 700                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
 701
 702         /* MAC */
 703         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
 704         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
 705         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
 706         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
 707         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
 708         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
 709         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
 710         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
 711         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
 712         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 713         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
 714         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
 715         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
 716         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
 717         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
 718         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
 719         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
 720         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
 721         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
 722         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
 723         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
 724         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
 725         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
 726         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
 727         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
 728         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
 729         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 730         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
 731         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 732         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
 733         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
 734         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
 735         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
 736
 737         /* Diagnostic */
 738         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
 739         for (i = 0; i < 8; i++)
 740                 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
 741         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
 742         for (i = 0; i < 4; i++)
 743                 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
 744         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
 745         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
 746         for (i = 0; i < 8; i++)
 747                 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
 748         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
 749         for (i = 0; i < 4; i++)
 750                 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
 751         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
 752         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
 753         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
 754         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
 755         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
 756         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
 757         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
 758         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
 759         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
 760         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
 761         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
 762         for (i = 0; i < 8; i++)
 763                 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
 764         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
 765         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
 766         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
 767         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
 768         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
 769         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
 770         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
 771         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
 772         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
 773 }
 774
 775 static int ixgbe_get_eeprom_len(struct net_device *netdev)
 776 {
 777         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 778         return adapter->hw.eeprom.word_size * 2;
 779 }
 780
 781 static int ixgbe_get_eeprom(struct net_device *netdev,
 782                             struct ethtool_eeprom *eeprom, u8 *bytes)
 783 {
 784         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 785         struct ixgbe_hw *hw = &adapter->hw;
 786         u16 *eeprom_buff;
 787         int first_word, last_word, eeprom_len;
 788         int ret_val = 0;
 789         u16 i;
 790
 791         if (eeprom->len == 0)
 792                 return -EINVAL;
 793
 794         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 795
 796         first_word = eeprom->offset >> 1;
 797         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 798         eeprom_len = last_word - first_word + 1;
 799
 800         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
 801         if (!eeprom_buff)
 802                 return -ENOMEM;
 803
 804         ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len,
 805                                              eeprom_buff);
 806
 807         /* Device's eeprom is always little-endian, word addressable */
 808         for (i = 0; i < eeprom_len; i++)
 809                 le16_to_cpus(&eeprom_buff[i]);
 810
 811         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
 812         kfree(eeprom_buff);
 813
 814         return ret_val;
 815 }
 816
 817 static void ixgbe_get_drvinfo(struct net_device *netdev,
 818                               struct ethtool_drvinfo *drvinfo)
 819 {
 820         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 821         char firmware_version[32];
 822
 823         strncpy(drvinfo->driver, ixgbe_driver_name,
 824                 sizeof(drvinfo->driver) - 1);
 825         strncpy(drvinfo->version, ixgbe_driver_version,
 826                 sizeof(drvinfo->version) - 1);
 827
 828         snprintf(firmware_version, sizeof(firmware_version), "%d.%d-%d",
 829                  (adapter->eeprom_version & 0xF000) >> 12,
 830                  (adapter->eeprom_version & 0x0FF0) >> 4,
 831                  adapter->eeprom_version & 0x000F);
 832
 833         strncpy(drvinfo->fw_version, firmware_version,
 834                 sizeof(drvinfo->fw_version));
 835         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
 836                 sizeof(drvinfo->bus_info));
 837         drvinfo->n_stats = IXGBE_STATS_LEN;
 838         drvinfo->testinfo_len = IXGBE_TEST_LEN;
 839         drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
 840 }
 841
 842 static void ixgbe_get_ringparam(struct net_device *netdev,
 843                                 struct ethtool_ringparam *ring)
 844 {
 845         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 846         struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
 847         struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
 848
 849         ring->rx_max_pending = IXGBE_MAX_RXD;
 850         ring->tx_max_pending = IXGBE_MAX_TXD;
 851         ring->rx_mini_max_pending = 0;
 852         ring->rx_jumbo_max_pending = 0;
 853         ring->rx_pending = rx_ring->count;
 854         ring->tx_pending = tx_ring->count;
 855         ring->rx_mini_pending = 0;
 856         ring->rx_jumbo_pending = 0;
 857 }
 858
 859 static int ixgbe_set_ringparam(struct net_device *netdev,
 860                                struct ethtool_ringparam *ring)
 861 {
 862         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 863         struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
 864         int i, err = 0;
 865         u32 new_rx_count, new_tx_count;
 866         bool need_update = false;
 867
 868         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 869                 return -EINVAL;
 870
 871         new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
 872         new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
 873         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
 874
 875         new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
 876         new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
 877         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
 878
 879         if ((new_tx_count == adapter->tx_ring[0]->count) &&
 880             (new_rx_count == adapter->rx_ring[0]->count)) {
 881                 /* nothing to do */
 882                 return 0;
 883         }
 884
 885         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
 886                 usleep_range(1000, 2000);
 887
 888         if (!netif_running(adapter->netdev)) {
 889                 for (i = 0; i < adapter->num_tx_queues; i++)
 890                         adapter->tx_ring[i]->count = new_tx_count;
 891                 for (i = 0; i < adapter->num_rx_queues; i++)
 892                         adapter->rx_ring[i]->count = new_rx_count;
 893                 adapter->tx_ring_count = new_tx_count;
 894                 adapter->rx_ring_count = new_rx_count;
 895                 goto clear_reset;
 896         }
 897
 898         temp_tx_ring = vmalloc(adapter->num_tx_queues * sizeof(struct ixgbe_ring));
 899         if (!temp_tx_ring) {
 900                 err = -ENOMEM;
 901                 goto clear_reset;
 902         }
 903
 904         if (new_tx_count != adapter->tx_ring_count) {
 905                 for (i = 0; i < adapter->num_tx_queues; i++) {
 906                         memcpy(&temp_tx_ring[i], adapter->tx_ring[i],
 907                                sizeof(struct ixgbe_ring));
 908                         temp_tx_ring[i].count = new_tx_count;
 909                         err = ixgbe_setup_tx_resources(&temp_tx_ring[i]);
 910                         if (err) {
 911                                 while (i) {
 912                                         i--;
 913                                         ixgbe_free_tx_resources(&temp_tx_ring[i]);
 914                                 }
 915                                 goto clear_reset;
 916                         }
 917                 }
 918                 need_update = true;
 919         }
 920
 921         temp_rx_ring = vmalloc(adapter->num_rx_queues * sizeof(struct ixgbe_ring));
 922         if (!temp_rx_ring) {
 923                 err = -ENOMEM;
 924                 goto err_setup;
 925         }
 926
 927         if (new_rx_count != adapter->rx_ring_count) {
 928                 for (i = 0; i < adapter->num_rx_queues; i++) {
 929                         memcpy(&temp_rx_ring[i], adapter->rx_ring[i],
 930                                sizeof(struct ixgbe_ring));
 931                         temp_rx_ring[i].count = new_rx_count;
 932                         err = ixgbe_setup_rx_resources(&temp_rx_ring[i]);
 933                         if (err) {
 934                                 while (i) {
 935                                         i--;
 936                                         ixgbe_free_rx_resources(&temp_rx_ring[i]);
 937                                 }
 938                                 goto err_setup;
 939                         }
 940                 }
 941                 need_update = true;
 942         }
 943
 944         /* if rings need to be updated, here's the place to do it in one shot */
 945         if (need_update) {
 946                 ixgbe_down(adapter);
 947
 948                 /* tx */
 949                 if (new_tx_count != adapter->tx_ring_count) {
 950                         for (i = 0; i < adapter->num_tx_queues; i++) {
 951                                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
 952                                 memcpy(adapter->tx_ring[i], &temp_tx_ring[i],
 953                                        sizeof(struct ixgbe_ring));
 954                         }
 955                         adapter->tx_ring_count = new_tx_count;
 956                 }
 957
 958                 /* rx */
 959                 if (new_rx_count != adapter->rx_ring_count) {
 960                         for (i = 0; i < adapter->num_rx_queues; i++) {
 961                                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
 962                                 memcpy(adapter->rx_ring[i], &temp_rx_ring[i],
 963                                        sizeof(struct ixgbe_ring));
 964                         }
 965                         adapter->rx_ring_count = new_rx_count;
 966                 }
 967                 ixgbe_up(adapter);
 968         }
 969
 970         vfree(temp_rx_ring);
 971 err_setup:
 972         vfree(temp_tx_ring);
 973 clear_reset:
 974         clear_bit(__IXGBE_RESETTING, &adapter->state);
 975         return err;
 976 }
 977
 978 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
 979 {
 980         switch (sset) {
 981         case ETH_SS_TEST:
 982                 return IXGBE_TEST_LEN;
 983         case ETH_SS_STATS:
 984                 return IXGBE_STATS_LEN;
 985         default:
 986                 return -EOPNOTSUPP;
 987         }
 988 }
 989
 990 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
 991                                     struct ethtool_stats *stats, u64 *data)
 992 {
 993         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 994         struct rtnl_link_stats64 temp;
 995         const struct rtnl_link_stats64 *net_stats;
 996         unsigned int start;
 997         struct ixgbe_ring *ring;
 998         int i, j;
 999         char *p = NULL;
1000
1001         ixgbe_update_stats(adapter);
1002         net_stats = dev_get_stats(netdev, &temp);
1003         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1004                 switch (ixgbe_gstrings_stats[i].type) {
1005                 case NETDEV_STATS:
1006                         p = (char *) net_stats +
1007                                         ixgbe_gstrings_stats[i].stat_offset;
1008                         break;
1009                 case IXGBE_STATS:
1010                         p = (char *) adapter +
1011                                         ixgbe_gstrings_stats[i].stat_offset;
1012                         break;
1013                 }
1014
1015                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1016                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1017         }
1018         for (j = 0; j < adapter->num_tx_queues; j++) {
1019                 ring = adapter->tx_ring[j];
1020                 do {
1021                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1022                         data[i]   = ring->stats.packets;
1023                         data[i+1] = ring->stats.bytes;
1024                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1025                 i += 2;
1026         }
1027         for (j = 0; j < adapter->num_rx_queues; j++) {
1028                 ring = adapter->rx_ring[j];
1029                 do {
1030                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1031                         data[i]   = ring->stats.packets;
1032                         data[i+1] = ring->stats.bytes;
1033                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1034                 i += 2;
1035         }
1036         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1037                 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
1038                         data[i++] = adapter->stats.pxontxc[j];
1039                         data[i++] = adapter->stats.pxofftxc[j];
1040                 }
1041                 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
1042                         data[i++] = adapter->stats.pxonrxc[j];
1043                         data[i++] = adapter->stats.pxoffrxc[j];
1044                 }
1045         }
1046 }
1047
1048 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1049                               u8 *data)
1050 {
1051         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1052         char *p = (char *)data;
1053         int i;
1054
1055         switch (stringset) {
1056         case ETH_SS_TEST:
1057                 memcpy(data, *ixgbe_gstrings_test,
1058                        IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1059                 break;
1060         case ETH_SS_STATS:
1061                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1062                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1063                                ETH_GSTRING_LEN);
1064                         p += ETH_GSTRING_LEN;
1065                 }
1066                 for (i = 0; i < adapter->num_tx_queues; i++) {
1067                         sprintf(p, "tx_queue_%u_packets", i);
1068                         p += ETH_GSTRING_LEN;
1069                         sprintf(p, "tx_queue_%u_bytes", i);
1070                         p += ETH_GSTRING_LEN;
1071                 }
1072                 for (i = 0; i < adapter->num_rx_queues; i++) {
1073                         sprintf(p, "rx_queue_%u_packets", i);
1074                         p += ETH_GSTRING_LEN;
1075                         sprintf(p, "rx_queue_%u_bytes", i);
1076                         p += ETH_GSTRING_LEN;
1077                 }
1078                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1079                         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1080                                 sprintf(p, "tx_pb_%u_pxon", i);
1081                                 p += ETH_GSTRING_LEN;
1082                                 sprintf(p, "tx_pb_%u_pxoff", i);
1083                                 p += ETH_GSTRING_LEN;
1084                         }
1085                         for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
1086                                 sprintf(p, "rx_pb_%u_pxon", i);
1087                                 p += ETH_GSTRING_LEN;
1088                                 sprintf(p, "rx_pb_%u_pxoff", i);
1089                                 p += ETH_GSTRING_LEN;
1090                         }
1091                 }
1092                 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1093                 break;
1094         }
1095 }
1096
1097 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1098 {
1099         struct ixgbe_hw *hw = &adapter->hw;
1100         bool link_up;
1101         u32 link_speed = 0;
1102         *data = 0;
1103
1104         hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1105         if (link_up)
1106                 return *data;
1107         else
1108                 *data = 1;
1109         return *data;
1110 }
1111
1112 /* ethtool register test data */
1113 struct ixgbe_reg_test {
1114         u16 reg;
1115         u8  array_len;
1116         u8  test_type;
1117         u32 mask;
1118         u32 write;
1119 };
1120
1121 /* In the hardware, registers are laid out either singly, in arrays
1122  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1123  * most tests take place on arrays or single registers (handled
1124  * as a single-element array) and special-case the tables.
1125  * Table tests are always pattern tests.
1126  *
1127  * We also make provision for some required setup steps by specifying
1128  * registers to be written without any read-back testing.
1129  */
1130
1131 #define PATTERN_TEST    1
1132 #define SET_READ_TEST   2
1133 #define WRITE_NO_TEST   3
1134 #define TABLE32_TEST    4
1135 #define TABLE64_TEST_LO 5
1136 #define TABLE64_TEST_HI 6
1137
1138 /* default 82599 register test */
1139 static const struct ixgbe_reg_test reg_test_82599[] = {
1140         { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1141         { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1142         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1143         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1144         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1145         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1146         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1147         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1148         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1149         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1150         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1151         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1152         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1153         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1154         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1155         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1156         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1157         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1158         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1159         { 0, 0, 0, 0 }
1160 };
1161
1162 /* default 82598 register test */
1163 static const struct ixgbe_reg_test reg_test_82598[] = {
1164         { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1165         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1166         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1167         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1168         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1169         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1170         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1171         /* Enable all four RX queues before testing. */
1172         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1173         /* RDH is read-only for 82598, only test RDT. */
1174         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1175         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1176         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1177         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1178         { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1179         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1180         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1181         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1182         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1183         { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1184         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1185         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1186         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1187         { 0, 0, 0, 0 }
1188 };
1189
1190 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg,
1191                              u32 mask, u32 write)
1192 {
1193         u32 pat, val, before;
1194         static const u32 test_pattern[] = {
1195                 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1196
1197         for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) {
1198                 before = readl(adapter->hw.hw_addr + reg);
1199                 writel((test_pattern[pat] & write),
1200                        (adapter->hw.hw_addr + reg));
1201                 val = readl(adapter->hw.hw_addr + reg);
1202                 if (val != (test_pattern[pat] & write & mask)) {
1203                         e_err(drv, "pattern test reg %04X failed: got "
1204                               "0x%08X expected 0x%08X\n",
1205                               reg, val, (test_pattern[pat] & write & mask));
1206                         *data = reg;
1207                         writel(before, adapter->hw.hw_addr + reg);
1208                         return 1;
1209                 }
1210                 writel(before, adapter->hw.hw_addr + reg);
1211         }
1212         return 0;
1213 }
1214
1215 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg,
1216                               u32 mask, u32 write)
1217 {
1218         u32 val, before;
1219         before = readl(adapter->hw.hw_addr + reg);
1220         writel((write & mask), (adapter->hw.hw_addr + reg));
1221         val = readl(adapter->hw.hw_addr + reg);
1222         if ((write & mask) != (val & mask)) {
1223                 e_err(drv, "set/check reg %04X test failed: got 0x%08X "
1224                       "expected 0x%08X\n", reg, (val & mask), (write & mask));
1225                 *data = reg;
1226                 writel(before, (adapter->hw.hw_addr + reg));
1227                 return 1;
1228         }
1229         writel(before, (adapter->hw.hw_addr + reg));
1230         return 0;
1231 }
1232
1233 #define REG_PATTERN_TEST(reg, mask, write)                                    \
1234         do {                                                                  \
1235                 if (reg_pattern_test(adapter, data, reg, mask, write))        \
1236                         return 1;                                             \
1237         } while (0)                                                           \
1238
1239
1240 #define REG_SET_AND_CHECK(reg, mask, write)                                   \
1241         do {                                                                  \
1242                 if (reg_set_and_check(adapter, data, reg, mask, write))       \
1243                         return 1;                                             \
1244         } while (0)                                                           \
1245
1246 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1247 {
1248         const struct ixgbe_reg_test *test;
1249         u32 value, before, after;
1250         u32 i, toggle;
1251
1252         switch (adapter->hw.mac.type) {
1253         case ixgbe_mac_82598EB:
1254                 toggle = 0x7FFFF3FF;
1255                 test = reg_test_82598;
1256                 break;
1257         case ixgbe_mac_82599EB:
1258         case ixgbe_mac_X540:
1259                 toggle = 0x7FFFF30F;
1260                 test = reg_test_82599;
1261                 break;
1262         default:
1263                 *data = 1;
1264                 return 1;
1265                 break;
1266         }
1267
1268         /*
1269          * Because the status register is such a special case,
1270          * we handle it separately from the rest of the register
1271          * tests.  Some bits are read-only, some toggle, and some
1272          * are writeable on newer MACs.
1273          */
1274         before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1275         value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1276         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1277         after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1278         if (value != after) {
1279                 e_err(drv, "failed STATUS register test got: 0x%08X "
1280                       "expected: 0x%08X\n", after, value);
1281                 *data = 1;
1282                 return 1;
1283         }
1284         /* restore previous status */
1285         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, before);
1286
1287         /*
1288          * Perform the remainder of the register test, looping through
1289          * the test table until we either fail or reach the null entry.
1290          */
1291         while (test->reg) {
1292                 for (i = 0; i < test->array_len; i++) {
1293                         switch (test->test_type) {
1294                         case PATTERN_TEST:
1295                                 REG_PATTERN_TEST(test->reg + (i * 0x40),
1296                                                  test->mask,
1297                                                  test->write);
1298                                 break;
1299                         case SET_READ_TEST:
1300                                 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1301                                                   test->mask,
1302                                                   test->write);
1303                                 break;
1304                         case WRITE_NO_TEST:
1305                                 writel(test->write,
1306                                        (adapter->hw.hw_addr + test->reg)
1307                                        + (i * 0x40));
1308                                 break;
1309                         case TABLE32_TEST:
1310                                 REG_PATTERN_TEST(test->reg + (i * 4),
1311                                                  test->mask,
1312                                                  test->write);
1313                                 break;
1314                         case TABLE64_TEST_LO:
1315                                 REG_PATTERN_TEST(test->reg + (i * 8),
1316                                                  test->mask,
1317                                                  test->write);
1318                                 break;
1319                         case TABLE64_TEST_HI:
1320                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1321                                                  test->mask,
1322                                                  test->write);
1323                                 break;
1324                         }
1325                 }
1326                 test++;
1327         }
1328
1329         *data = 0;
1330         return 0;
1331 }
1332
1333 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1334 {
1335         struct ixgbe_hw *hw = &adapter->hw;
1336         if (hw->eeprom.ops.validate_checksum(hw, NULL))
1337                 *data = 1;
1338         else
1339                 *data = 0;
1340         return *data;
1341 }
1342
1343 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1344 {
1345         struct net_device *netdev = (struct net_device *) data;
1346         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1347
1348         adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1349
1350         return IRQ_HANDLED;
1351 }
1352
1353 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1354 {
1355         struct net_device *netdev = adapter->netdev;
1356         u32 mask, i = 0, shared_int = true;
1357         u32 irq = adapter->pdev->irq;
1358
1359         *data = 0;
1360
1361         /* Hook up test interrupt handler just for this test */
1362         if (adapter->msix_entries) {
1363                 /* NOTE: we don't test MSI-X interrupts here, yet */
1364                 return 0;
1365         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1366                 shared_int = false;
1367                 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1368                                 netdev)) {
1369                         *data = 1;
1370                         return -1;
1371                 }
1372         } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1373                                 netdev->name, netdev)) {
1374                 shared_int = false;
1375         } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1376                                netdev->name, netdev)) {
1377                 *data = 1;
1378                 return -1;
1379         }
1380         e_info(hw, "testing %s interrupt\n", shared_int ?
1381                "shared" : "unshared");
1382
1383         /* Disable all the interrupts */
1384         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1385         IXGBE_WRITE_FLUSH(&adapter->hw);
1386         usleep_range(10000, 20000);
1387
1388         /* Test each interrupt */
1389         for (; i < 10; i++) {
1390                 /* Interrupt to test */
1391                 mask = 1 << i;
1392
1393                 if (!shared_int) {
1394                         /*
1395                          * Disable the interrupts to be reported in
1396                          * the cause register and then force the same
1397                          * interrupt and see if one gets posted.  If
1398                          * an interrupt was posted to the bus, the
1399                          * test failed.
1400                          */
1401                         adapter->test_icr = 0;
1402                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1403                                         ~mask & 0x00007FFF);
1404                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1405                                         ~mask & 0x00007FFF);
1406                         IXGBE_WRITE_FLUSH(&adapter->hw);
1407                         usleep_range(10000, 20000);
1408
1409                         if (adapter->test_icr & mask) {
1410                                 *data = 3;
1411                                 break;
1412                         }
1413                 }
1414
1415                 /*
1416                  * Enable the interrupt to be reported in the cause
1417                  * register and then force the same interrupt and see
1418                  * if one gets posted.  If an interrupt was not posted
1419                  * to the bus, the test failed.
1420                  */
1421                 adapter->test_icr = 0;
1422                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1423                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1424                 IXGBE_WRITE_FLUSH(&adapter->hw);
1425                 usleep_range(10000, 20000);
1426
1427                 if (!(adapter->test_icr &mask)) {
1428                         *data = 4;
1429                         break;
1430                 }
1431
1432                 if (!shared_int) {
1433                         /*
1434                          * Disable the other interrupts to be reported in
1435                          * the cause register and then force the other
1436                          * interrupts and see if any get posted.  If
1437                          * an interrupt was posted to the bus, the
1438                          * test failed.
1439                          */
1440                         adapter->test_icr = 0;
1441                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1442                                         ~mask & 0x00007FFF);
1443                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1444                                         ~mask & 0x00007FFF);
1445                         IXGBE_WRITE_FLUSH(&adapter->hw);
1446                         usleep_range(10000, 20000);
1447
1448                         if (adapter->test_icr) {
1449                                 *data = 5;
1450                                 break;
1451                         }
1452                 }
1453         }
1454
1455         /* Disable all the interrupts */
1456         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1457         IXGBE_WRITE_FLUSH(&adapter->hw);
1458         usleep_range(10000, 20000);
1459
1460         /* Unhook test interrupt handler */
1461         free_irq(irq, netdev);
1462
1463         return *data;
1464 }
1465
1466 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1467 {
1468         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1469         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1470         struct ixgbe_hw *hw = &adapter->hw;
1471         u32 reg_ctl;
1472
1473         /* shut down the DMA engines now so they can be reinitialized later */
1474
1475         /* first Rx */
1476         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1477         reg_ctl &= ~IXGBE_RXCTRL_RXEN;
1478         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);
1479         ixgbe_disable_rx_queue(adapter, rx_ring);
1480
1481         /* now Tx */
1482         reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1483         reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1484         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1485
1486         switch (hw->mac.type) {
1487         case ixgbe_mac_82599EB:
1488         case ixgbe_mac_X540:
1489                 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1490                 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1491                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1492                 break;
1493         default:
1494                 break;
1495         }
1496
1497         ixgbe_reset(adapter);
1498
1499         ixgbe_free_tx_resources(&adapter->test_tx_ring);
1500         ixgbe_free_rx_resources(&adapter->test_rx_ring);
1501 }
1502
1503 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1504 {
1505         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1506         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1507         u32 rctl, reg_data;
1508         int ret_val;
1509         int err;
1510
1511         /* Setup Tx descriptor ring and Tx buffers */
1512         tx_ring->count = IXGBE_DEFAULT_TXD;
1513         tx_ring->queue_index = 0;
1514         tx_ring->dev = &adapter->pdev->dev;
1515         tx_ring->netdev = adapter->netdev;
1516         tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1517         tx_ring->numa_node = adapter->node;
1518
1519         err = ixgbe_setup_tx_resources(tx_ring);
1520         if (err)
1521                 return 1;
1522
1523         switch (adapter->hw.mac.type) {
1524         case ixgbe_mac_82599EB:
1525         case ixgbe_mac_X540:
1526                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1527                 reg_data |= IXGBE_DMATXCTL_TE;
1528                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1529                 break;
1530         default:
1531                 break;
1532         }
1533
1534         ixgbe_configure_tx_ring(adapter, tx_ring);
1535
1536         /* Setup Rx Descriptor ring and Rx buffers */
1537         rx_ring->count = IXGBE_DEFAULT_RXD;
1538         rx_ring->queue_index = 0;
1539         rx_ring->dev = &adapter->pdev->dev;
1540         rx_ring->netdev = adapter->netdev;
1541         rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1542         rx_ring->rx_buf_len = IXGBE_RXBUFFER_2048;
1543         rx_ring->numa_node = adapter->node;
1544
1545         err = ixgbe_setup_rx_resources(rx_ring);
1546         if (err) {
1547                 ret_val = 4;
1548                 goto err_nomem;
1549         }
1550
1551         rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1552         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);
1553
1554         ixgbe_configure_rx_ring(adapter, rx_ring);
1555
1556         rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;
1557         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1558
1559         return 0;
1560
1561 err_nomem:
1562         ixgbe_free_desc_rings(adapter);
1563         return ret_val;
1564 }
1565
1566 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1567 {
1568         struct ixgbe_hw *hw = &adapter->hw;
1569         u32 reg_data;
1570
1571         /* X540 needs to set the MACC.FLU bit to force link up */
1572         if (adapter->hw.mac.type == ixgbe_mac_X540) {
1573                 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC);
1574                 reg_data |= IXGBE_MACC_FLU;
1575                 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data);
1576         }
1577
1578         /* right now we only support MAC loopback in the driver */
1579         reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1580         /* Setup MAC loopback */
1581         reg_data |= IXGBE_HLREG0_LPBK;
1582         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data);
1583
1584         reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1585         reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1586         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data);
1587
1588         reg_data = IXGBE_READ_REG(hw, IXGBE_AUTOC);
1589         reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1590         reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1591         IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data);
1592         IXGBE_WRITE_FLUSH(hw);
1593         usleep_range(10000, 20000);
1594
1595         /* Disable Atlas Tx lanes; re-enabled in reset path */
1596         if (hw->mac.type == ixgbe_mac_82598EB) {
1597                 u8 atlas;
1598
1599                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1600                 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1601                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1602
1603                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1604                 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1605                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1606
1607                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1608                 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1609                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1610
1611                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1612                 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1613                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1614         }
1615
1616         return 0;
1617 }
1618
1619 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1620 {
1621         u32 reg_data;
1622
1623         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1624         reg_data &= ~IXGBE_HLREG0_LPBK;
1625         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1626 }
1627
1628 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1629                                       unsigned int frame_size)
1630 {
1631         memset(skb->data, 0xFF, frame_size);
1632         frame_size &= ~1;
1633         memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1634         memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1635         memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1636 }
1637
1638 static int ixgbe_check_lbtest_frame(struct sk_buff *skb,
1639                                     unsigned int frame_size)
1640 {
1641         frame_size &= ~1;
1642         if (*(skb->data + 3) == 0xFF) {
1643                 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1644                     (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1645                         return 0;
1646                 }
1647         }
1648         return 13;
1649 }
1650
1651 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1652                                   struct ixgbe_ring *tx_ring,
1653                                   unsigned int size)
1654 {
1655         union ixgbe_adv_rx_desc *rx_desc;
1656         struct ixgbe_rx_buffer *rx_buffer_info;
1657         struct ixgbe_tx_buffer *tx_buffer_info;
1658         const int bufsz = rx_ring->rx_buf_len;
1659         u32 staterr;
1660         u16 rx_ntc, tx_ntc, count = 0;
1661
1662         /* initialize next to clean and descriptor values */
1663         rx_ntc = rx_ring->next_to_clean;
1664         tx_ntc = tx_ring->next_to_clean;
1665         rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1666         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1667
1668         while (staterr & IXGBE_RXD_STAT_DD) {
1669                 /* check Rx buffer */
1670                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1671
1672                 /* unmap Rx buffer, will be remapped by alloc_rx_buffers */
1673                 dma_unmap_single(rx_ring->dev,
1674                                  rx_buffer_info->dma,
1675                                  bufsz,
1676                                  DMA_FROM_DEVICE);
1677                 rx_buffer_info->dma = 0;
1678
1679                 /* verify contents of skb */
1680                 if (!ixgbe_check_lbtest_frame(rx_buffer_info->skb, size))
1681                         count++;
1682
1683                 /* unmap buffer on Tx side */
1684                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1685                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1686
1687                 /* increment Rx/Tx next to clean counters */
1688                 rx_ntc++;
1689                 if (rx_ntc == rx_ring->count)
1690                         rx_ntc = 0;
1691                 tx_ntc++;
1692                 if (tx_ntc == tx_ring->count)
1693                         tx_ntc = 0;
1694
1695                 /* fetch next descriptor */
1696                 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1697                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1698         }
1699
1700         /* re-map buffers to ring, store next to clean values */
1701         ixgbe_alloc_rx_buffers(rx_ring, count);
1702         rx_ring->next_to_clean = rx_ntc;
1703         tx_ring->next_to_clean = tx_ntc;
1704
1705         return count;
1706 }
1707
1708 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1709 {
1710         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1711         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1712         int i, j, lc, good_cnt, ret_val = 0;
1713         unsigned int size = 1024;
1714         netdev_tx_t tx_ret_val;
1715         struct sk_buff *skb;
1716
1717         /* allocate test skb */
1718         skb = alloc_skb(size, GFP_KERNEL);
1719         if (!skb)
1720                 return 11;
1721
1722         /* place data into test skb */
1723         ixgbe_create_lbtest_frame(skb, size);
1724         skb_put(skb, size);
1725
1726         /*
1727          * Calculate the loop count based on the largest descriptor ring
1728          * The idea is to wrap the largest ring a number of times using 64
1729          * send/receive pairs during each loop
1730          */
1731
1732         if (rx_ring->count <= tx_ring->count)
1733                 lc = ((tx_ring->count / 64) * 2) + 1;
1734         else
1735                 lc = ((rx_ring->count / 64) * 2) + 1;
1736
1737         for (j = 0; j <= lc; j++) {
1738                 /* reset count of good packets */
1739                 good_cnt = 0;
1740
1741                 /* place 64 packets on the transmit queue*/
1742                 for (i = 0; i < 64; i++) {
1743                         skb_get(skb);
1744                         tx_ret_val = ixgbe_xmit_frame_ring(skb,
1745                                                            adapter,
1746                                                            tx_ring);
1747                         if (tx_ret_val == NETDEV_TX_OK)
1748                                 good_cnt++;
1749                 }
1750
1751                 if (good_cnt != 64) {
1752                         ret_val = 12;
1753                         break;
1754                 }
1755
1756                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1757                 msleep(200);
1758
1759                 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
1760                 if (good_cnt != 64) {
1761                         ret_val = 13;
1762                         break;
1763                 }
1764         }
1765
1766         /* free the original skb */
1767         kfree_skb(skb);
1768
1769         return ret_val;
1770 }
1771
1772 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1773 {
1774         *data = ixgbe_setup_desc_rings(adapter);
1775         if (*data)
1776                 goto out;
1777         *data = ixgbe_setup_loopback_test(adapter);
1778         if (*data)
1779                 goto err_loopback;
1780         *data = ixgbe_run_loopback_test(adapter);
1781         ixgbe_loopback_cleanup(adapter);
1782
1783 err_loopback:
1784         ixgbe_free_desc_rings(adapter);
1785 out:
1786         return *data;
1787 }
1788
1789 static void ixgbe_diag_test(struct net_device *netdev,
1790                             struct ethtool_test *eth_test, u64 *data)
1791 {
1792         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1793         bool if_running = netif_running(netdev);
1794
1795         set_bit(__IXGBE_TESTING, &adapter->state);
1796         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1797                 /* Offline tests */
1798
1799                 e_info(hw, "offline testing starting\n");
1800
1801                 /* Link test performed before hardware reset so autoneg doesn't
1802                  * interfere with test result */
1803                 if (ixgbe_link_test(adapter, &data[4]))
1804                         eth_test->flags |= ETH_TEST_FL_FAILED;
1805
1806                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1807                         int i;
1808                         for (i = 0; i < adapter->num_vfs; i++) {
1809                                 if (adapter->vfinfo[i].clear_to_send) {
1810                                         netdev_warn(netdev, "%s",
1811                                                     "offline diagnostic is not "
1812                                                     "supported when VFs are "
1813                                                     "present\n");
1814                                         data[0] = 1;
1815                                         data[1] = 1;
1816                                         data[2] = 1;
1817                                         data[3] = 1;
1818                                         eth_test->flags |= ETH_TEST_FL_FAILED;
1819                                         clear_bit(__IXGBE_TESTING,
1820                                                   &adapter->state);
1821                                         goto skip_ol_tests;
1822                                 }
1823                         }
1824                 }
1825
1826                 if (if_running)
1827                         /* indicate we're in test mode */
1828                         dev_close(netdev);
1829                 else
1830                         ixgbe_reset(adapter);
1831
1832                 e_info(hw, "register testing starting\n");
1833                 if (ixgbe_reg_test(adapter, &data[0]))
1834                         eth_test->flags |= ETH_TEST_FL_FAILED;
1835
1836                 ixgbe_reset(adapter);
1837                 e_info(hw, "eeprom testing starting\n");
1838                 if (ixgbe_eeprom_test(adapter, &data[1]))
1839                         eth_test->flags |= ETH_TEST_FL_FAILED;
1840
1841                 ixgbe_reset(adapter);
1842                 e_info(hw, "interrupt testing starting\n");
1843                 if (ixgbe_intr_test(adapter, &data[2]))
1844                         eth_test->flags |= ETH_TEST_FL_FAILED;
1845
1846                 /* If SRIOV or VMDq is enabled then skip MAC
1847                  * loopback diagnostic. */
1848                 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1849                                       IXGBE_FLAG_VMDQ_ENABLED)) {
1850                         e_info(hw, "Skip MAC loopback diagnostic in VT "
1851                                "mode\n");
1852                         data[3] = 0;
1853                         goto skip_loopback;
1854                 }
1855
1856                 ixgbe_reset(adapter);
1857                 e_info(hw, "loopback testing starting\n");
1858                 if (ixgbe_loopback_test(adapter, &data[3]))
1859                         eth_test->flags |= ETH_TEST_FL_FAILED;
1860
1861 skip_loopback:
1862                 ixgbe_reset(adapter);
1863
1864                 clear_bit(__IXGBE_TESTING, &adapter->state);
1865                 if (if_running)
1866                         dev_open(netdev);
1867         } else {
1868                 e_info(hw, "online testing starting\n");
1869                 /* Online tests */
1870                 if (ixgbe_link_test(adapter, &data[4]))
1871                         eth_test->flags |= ETH_TEST_FL_FAILED;
1872
1873                 /* Online tests aren't run; pass by default */
1874                 data[0] = 0;
1875                 data[1] = 0;
1876                 data[2] = 0;
1877                 data[3] = 0;
1878
1879                 clear_bit(__IXGBE_TESTING, &adapter->state);
1880         }
1881 skip_ol_tests:
1882         msleep_interruptible(4 * 1000);
1883 }
1884
1885 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1886                                struct ethtool_wolinfo *wol)
1887 {
1888         struct ixgbe_hw *hw = &adapter->hw;
1889         int retval = 1;
1890
1891         /* WOL not supported except for the following */
1892         switch(hw->device_id) {
1893         case IXGBE_DEV_ID_82599_SFP:
1894                 /* Only this subdevice supports WOL */
1895                 if (hw->subsystem_device_id != IXGBE_SUBDEV_ID_82599_SFP) {
1896                         wol->supported = 0;
1897                         break;
1898                 }
1899                 retval = 0;
1900                 break;
1901         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
1902                 /* All except this subdevice support WOL */
1903                 if (hw->subsystem_device_id ==
1904                     IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) {
1905                         wol->supported = 0;
1906                         break;
1907                 }
1908                 retval = 0;
1909                 break;
1910         case IXGBE_DEV_ID_82599_KX4:
1911                 retval = 0;
1912                 break;
1913         default:
1914                 wol->supported = 0;
1915         }
1916
1917         return retval;
1918 }
1919
1920 static void ixgbe_get_wol(struct net_device *netdev,
1921                           struct ethtool_wolinfo *wol)
1922 {
1923         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1924
1925         wol->supported = WAKE_UCAST | WAKE_MCAST |
1926                          WAKE_BCAST | WAKE_MAGIC;
1927         wol->wolopts = 0;
1928
1929         if (ixgbe_wol_exclusion(adapter, wol) ||
1930             !device_can_wakeup(&adapter->pdev->dev))
1931                 return;
1932
1933         if (adapter->wol & IXGBE_WUFC_EX)
1934                 wol->wolopts |= WAKE_UCAST;
1935         if (adapter->wol & IXGBE_WUFC_MC)
1936                 wol->wolopts |= WAKE_MCAST;
1937         if (adapter->wol & IXGBE_WUFC_BC)
1938                 wol->wolopts |= WAKE_BCAST;
1939         if (adapter->wol & IXGBE_WUFC_MAG)
1940                 wol->wolopts |= WAKE_MAGIC;
1941 }
1942
1943 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1944 {
1945         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1946
1947         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1948                 return -EOPNOTSUPP;
1949
1950         if (ixgbe_wol_exclusion(adapter, wol))
1951                 return wol->wolopts ? -EOPNOTSUPP : 0;
1952
1953         adapter->wol = 0;
1954
1955         if (wol->wolopts & WAKE_UCAST)
1956                 adapter->wol |= IXGBE_WUFC_EX;
1957         if (wol->wolopts & WAKE_MCAST)
1958                 adapter->wol |= IXGBE_WUFC_MC;
1959         if (wol->wolopts & WAKE_BCAST)
1960                 adapter->wol |= IXGBE_WUFC_BC;
1961         if (wol->wolopts & WAKE_MAGIC)
1962                 adapter->wol |= IXGBE_WUFC_MAG;
1963
1964         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1965
1966         return 0;
1967 }
1968
1969 static int ixgbe_nway_reset(struct net_device *netdev)
1970 {
1971         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1972
1973         if (netif_running(netdev))
1974                 ixgbe_reinit_locked(adapter);
1975
1976         return 0;
1977 }
1978
1979 static int ixgbe_set_phys_id(struct net_device *netdev,
1980                              enum ethtool_phys_id_state state)
1981 {
1982         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1983         struct ixgbe_hw *hw = &adapter->hw;
1984
1985         switch (state) {
1986         case ETHTOOL_ID_ACTIVE:
1987                 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
1988                 return 2;
1989
1990         case ETHTOOL_ID_ON:
1991                 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
1992                 break;
1993
1994         case ETHTOOL_ID_OFF:
1995                 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
1996                 break;
1997
1998         case ETHTOOL_ID_INACTIVE:
1999                 /* Restore LED settings */
2000                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
2001                 break;
2002         }
2003
2004         return 0;
2005 }
2006
2007 static int ixgbe_get_coalesce(struct net_device *netdev,
2008                               struct ethtool_coalesce *ec)
2009 {
2010         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2011
2012         ec->tx_max_coalesced_frames_irq = adapter->tx_work_limit;
2013
2014         /* only valid if in constant ITR mode */
2015         switch (adapter->rx_itr_setting) {
2016         case 0:
2017                 /* throttling disabled */
2018                 ec->rx_coalesce_usecs = 0;
2019                 break;
2020         case 1:
2021                 /* dynamic ITR mode */
2022                 ec->rx_coalesce_usecs = 1;
2023                 break;
2024         default:
2025                 /* fixed interrupt rate mode */
2026                 ec->rx_coalesce_usecs = 1000000/adapter->rx_eitr_param;
2027                 break;
2028         }
2029
2030         /* if in mixed tx/rx queues per vector mode, report only rx settings */
2031         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2032                 return 0;
2033
2034         /* only valid if in constant ITR mode */
2035         switch (adapter->tx_itr_setting) {
2036         case 0:
2037                 /* throttling disabled */
2038                 ec->tx_coalesce_usecs = 0;
2039                 break;
2040         case 1:
2041                 /* dynamic ITR mode */
2042                 ec->tx_coalesce_usecs = 1;
2043                 break;
2044         default:
2045                 ec->tx_coalesce_usecs = 1000000/adapter->tx_eitr_param;
2046                 break;
2047         }
2048
2049         return 0;
2050 }
2051
2052 /*
2053  * this function must be called before setting the new value of
2054  * rx_itr_setting
2055  */
2056 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter,
2057                              struct ethtool_coalesce *ec)
2058 {
2059         struct net_device *netdev = adapter->netdev;
2060
2061         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
2062                 return false;
2063
2064         /* if interrupt rate is too high then disable RSC */
2065         if (ec->rx_coalesce_usecs != 1 &&
2066             ec->rx_coalesce_usecs <= 1000000/IXGBE_MAX_RSC_INT_RATE) {
2067                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2068                         e_info(probe, "rx-usecs set too low, "
2069                                       "disabling RSC\n");
2070                         adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2071                         return true;
2072                 }
2073         } else {
2074                 /* check the feature flag value and enable RSC if necessary */
2075                 if ((netdev->features & NETIF_F_LRO) &&
2076                     !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2077                         e_info(probe, "rx-usecs set to %d, "
2078                                       "re-enabling RSC\n",
2079                                ec->rx_coalesce_usecs);
2080                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2081                         return true;
2082                 }
2083         }
2084         return false;
2085 }
2086
2087 static int ixgbe_set_coalesce(struct net_device *netdev,
2088                               struct ethtool_coalesce *ec)
2089 {
2090         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2091         struct ixgbe_q_vector *q_vector;
2092         int i;
2093         bool need_reset = false;
2094
2095         /* don't accept tx specific changes if we've got mixed RxTx vectors */
2096         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count
2097            && ec->tx_coalesce_usecs)
2098                 return -EINVAL;
2099
2100         if (ec->tx_max_coalesced_frames_irq)
2101                 adapter->tx_work_limit = ec->tx_max_coalesced_frames_irq;
2102
2103         if (ec->rx_coalesce_usecs > 1) {
2104                 /* check the limits */
2105                 if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2106                     (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2107                         return -EINVAL;
2108
2109                 /* check the old value and enable RSC if necessary */
2110                 need_reset = ixgbe_update_rsc(adapter, ec);
2111
2112                 /* store the value in ints/second */
2113                 adapter->rx_eitr_param = 1000000/ec->rx_coalesce_usecs;
2114
2115                 /* static value of interrupt rate */
2116                 adapter->rx_itr_setting = adapter->rx_eitr_param;
2117                 /* clear the lower bit as its used for dynamic state */
2118                 adapter->rx_itr_setting &= ~1;
2119         } else if (ec->rx_coalesce_usecs == 1) {
2120                 /* check the old value and enable RSC if necessary */
2121                 need_reset = ixgbe_update_rsc(adapter, ec);
2122
2123                 /* 1 means dynamic mode */
2124                 adapter->rx_eitr_param = 20000;
2125                 adapter->rx_itr_setting = 1;
2126         } else {
2127                 /* check the old value and enable RSC if necessary */
2128                 need_reset = ixgbe_update_rsc(adapter, ec);
2129                 /*
2130                  * any other value means disable eitr, which is best
2131                  * served by setting the interrupt rate very high
2132                  */
2133                 adapter->rx_eitr_param = IXGBE_MAX_INT_RATE;
2134                 adapter->rx_itr_setting = 0;
2135         }
2136
2137         if (ec->tx_coalesce_usecs > 1) {
2138                 /*
2139                  * don't have to worry about max_int as above because
2140                  * tx vectors don't do hardware RSC (an rx function)
2141                  */
2142                 /* check the limits */
2143                 if ((1000000/ec->tx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2144                     (1000000/ec->tx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2145                         return -EINVAL;
2146
2147                 /* store the value in ints/second */
2148                 adapter->tx_eitr_param = 1000000/ec->tx_coalesce_usecs;
2149
2150                 /* static value of interrupt rate */
2151                 adapter->tx_itr_setting = adapter->tx_eitr_param;
2152
2153                 /* clear the lower bit as its used for dynamic state */
2154                 adapter->tx_itr_setting &= ~1;
2155         } else if (ec->tx_coalesce_usecs == 1) {
2156                 /* 1 means dynamic mode */
2157                 adapter->tx_eitr_param = 10000;
2158                 adapter->tx_itr_setting = 1;
2159         } else {
2160                 adapter->tx_eitr_param = IXGBE_MAX_INT_RATE;
2161                 adapter->tx_itr_setting = 0;
2162         }
2163
2164         /* MSI/MSIx Interrupt Mode */
2165         if (adapter->flags &
2166             (IXGBE_FLAG_MSIX_ENABLED | IXGBE_FLAG_MSI_ENABLED)) {
2167                 int num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2168                 for (i = 0; i < num_vectors; i++) {
2169                         q_vector = adapter->q_vector[i];
2170                         if (q_vector->tx.count && !q_vector->rx.count)
2171                                 /* tx only */
2172                                 q_vector->eitr = adapter->tx_eitr_param;
2173                         else
2174                                 /* rx only or mixed */
2175                                 q_vector->eitr = adapter->rx_eitr_param;
2176                         q_vector->tx.work_limit = adapter->tx_work_limit;
2177                         ixgbe_write_eitr(q_vector);
2178                 }
2179         /* Legacy Interrupt Mode */
2180         } else {
2181                 q_vector = adapter->q_vector[0];
2182                 q_vector->eitr = adapter->rx_eitr_param;
2183                 q_vector->tx.work_limit = adapter->tx_work_limit;
2184                 ixgbe_write_eitr(q_vector);
2185         }
2186
2187         /*
2188          * do reset here at the end to make sure EITR==0 case is handled
2189          * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2190          * also locks in RSC enable/disable which requires reset
2191          */
2192         if (need_reset)
2193                 ixgbe_do_reset(netdev);
2194
2195         return 0;
2196 }
2197
2198 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2199                                         struct ethtool_rxnfc *cmd)
2200 {
2201         union ixgbe_atr_input *mask = &adapter->fdir_mask;
2202         struct ethtool_rx_flow_spec *fsp =
2203                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2204         struct hlist_node *node, *node2;
2205         struct ixgbe_fdir_filter *rule = NULL;
2206
2207         /* report total rule count */
2208         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2209
2210         hlist_for_each_entry_safe(rule, node, node2,
2211                                   &adapter->fdir_filter_list, fdir_node) {
2212                 if (fsp->location <= rule->sw_idx)
2213                         break;
2214         }
2215
2216         if (!rule || fsp->location != rule->sw_idx)
2217                 return -EINVAL;
2218
2219         /* fill out the flow spec entry */
2220
2221         /* set flow type field */
2222         switch (rule->filter.formatted.flow_type) {
2223         case IXGBE_ATR_FLOW_TYPE_TCPV4:
2224                 fsp->flow_type = TCP_V4_FLOW;
2225                 break;
2226         case IXGBE_ATR_FLOW_TYPE_UDPV4:
2227                 fsp->flow_type = UDP_V4_FLOW;
2228                 break;
2229         case IXGBE_ATR_FLOW_TYPE_SCTPV4:
2230                 fsp->flow_type = SCTP_V4_FLOW;
2231                 break;
2232         case IXGBE_ATR_FLOW_TYPE_IPV4:
2233                 fsp->flow_type = IP_USER_FLOW;
2234                 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2235                 fsp->h_u.usr_ip4_spec.proto = 0;
2236                 fsp->m_u.usr_ip4_spec.proto = 0;
2237                 break;
2238         default:
2239                 return -EINVAL;
2240         }
2241
2242         fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port;
2243         fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port;
2244         fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port;
2245         fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port;
2246         fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0];
2247         fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0];
2248         fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0];
2249         fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0];
2250         fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id;
2251         fsp->m_ext.vlan_tci = mask->formatted.vlan_id;
2252         fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes;
2253         fsp->m_ext.vlan_etype = mask->formatted.flex_bytes;
2254         fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool);
2255         fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool);
2256         fsp->flow_type |= FLOW_EXT;
2257
2258         /* record action */
2259         if (rule->action == IXGBE_FDIR_DROP_QUEUE)
2260                 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2261         else
2262                 fsp->ring_cookie = rule->action;
2263
2264         return 0;
2265 }
2266
2267 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter,
2268                                       struct ethtool_rxnfc *cmd,
2269                                       u32 *rule_locs)
2270 {
2271         struct hlist_node *node, *node2;
2272         struct ixgbe_fdir_filter *rule;
2273         int cnt = 0;
2274
2275         /* report total rule count */
2276         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2277
2278         hlist_for_each_entry_safe(rule, node, node2,
2279                                   &adapter->fdir_filter_list, fdir_node) {
2280                 if (cnt == cmd->rule_cnt)
2281                         return -EMSGSIZE;
2282                 rule_locs[cnt] = rule->sw_idx;
2283                 cnt++;
2284         }
2285
2286         return 0;
2287 }
2288
2289 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2290                            u32 *rule_locs)
2291 {
2292         struct ixgbe_adapter *adapter = netdev_priv(dev);
2293         int ret = -EOPNOTSUPP;
2294
2295         switch (cmd->cmd) {
2296         case ETHTOOL_GRXRINGS:
2297                 cmd->data = adapter->num_rx_queues;
2298                 ret = 0;
2299                 break;
2300         case ETHTOOL_GRXCLSRLCNT:
2301                 cmd->rule_cnt = adapter->fdir_filter_count;
2302                 ret = 0;
2303                 break;
2304         case ETHTOOL_GRXCLSRULE:
2305                 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd);
2306                 break;
2307         case ETHTOOL_GRXCLSRLALL:
2308                 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs);
2309                 break;
2310         default:
2311                 break;
2312         }
2313
2314         return ret;
2315 }
2316
2317 static int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2318                                            struct ixgbe_fdir_filter *input,
2319                                            u16 sw_idx)
2320 {
2321         struct ixgbe_hw *hw = &adapter->hw;
2322         struct hlist_node *node, *node2, *parent;
2323         struct ixgbe_fdir_filter *rule;
2324         int err = -EINVAL;
2325
2326         parent = NULL;
2327         rule = NULL;
2328
2329         hlist_for_each_entry_safe(rule, node, node2,
2330                                   &adapter->fdir_filter_list, fdir_node) {
2331                 /* hash found, or no matching entry */
2332                 if (rule->sw_idx >= sw_idx)
2333                         break;
2334                 parent = node;
2335         }
2336
2337         /* if there is an old rule occupying our place remove it */
2338         if (rule && (rule->sw_idx == sw_idx)) {
2339                 if (!input || (rule->filter.formatted.bkt_hash !=
2340                                input->filter.formatted.bkt_hash)) {
2341                         err = ixgbe_fdir_erase_perfect_filter_82599(hw,
2342                                                                 &rule->filter,
2343                                                                 sw_idx);
2344                 }
2345
2346                 hlist_del(&rule->fdir_node);
2347                 kfree(rule);
2348                 adapter->fdir_filter_count--;
2349         }
2350
2351         /*
2352          * If no input this was a delete, err should be 0 if a rule was
2353          * successfully found and removed from the list else -EINVAL
2354          */
2355         if (!input)
2356                 return err;
2357
2358         /* initialize node and set software index */
2359         INIT_HLIST_NODE(&input->fdir_node);
2360
2361         /* add filter to the list */
2362         if (parent)
2363                 hlist_add_after(parent, &input->fdir_node);
2364         else
2365                 hlist_add_head(&input->fdir_node,
2366                                &adapter->fdir_filter_list);
2367
2368         /* update counts */
2369         adapter->fdir_filter_count++;
2370
2371         return 0;
2372 }
2373
2374 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp,
2375                                        u8 *flow_type)
2376 {
2377         switch (fsp->flow_type & ~FLOW_EXT) {
2378         case TCP_V4_FLOW:
2379                 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2380                 break;
2381         case UDP_V4_FLOW:
2382                 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2383                 break;
2384         case SCTP_V4_FLOW:
2385                 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2386                 break;
2387         case IP_USER_FLOW:
2388                 switch (fsp->h_u.usr_ip4_spec.proto) {
2389                 case IPPROTO_TCP:
2390                         *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2391                         break;
2392                 case IPPROTO_UDP:
2393                         *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2394                         break;
2395                 case IPPROTO_SCTP:
2396                         *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2397                         break;
2398                 case 0:
2399                         if (!fsp->m_u.usr_ip4_spec.proto) {
2400                                 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2401                                 break;
2402                         }
2403                 default:
2404                         return 0;
2405                 }
2406                 break;
2407         default:
2408                 return 0;
2409         }
2410
2411         return 1;
2412 }
2413
2414 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2415                                         struct ethtool_rxnfc *cmd)
2416 {
2417         struct ethtool_rx_flow_spec *fsp =
2418                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2419         struct ixgbe_hw *hw = &adapter->hw;
2420         struct ixgbe_fdir_filter *input;
2421         union ixgbe_atr_input mask;
2422         int err;
2423
2424         if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
2425                 return -EOPNOTSUPP;
2426
2427         /*
2428          * Don't allow programming if the action is a queue greater than
2429          * the number of online Rx queues.
2430          */
2431         if ((fsp->ring_cookie != RX_CLS_FLOW_DISC) &&
2432             (fsp->ring_cookie >= adapter->num_rx_queues))
2433                 return -EINVAL;
2434
2435         /* Don't allow indexes to exist outside of available space */
2436         if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) {
2437                 e_err(drv, "Location out of range\n");
2438                 return -EINVAL;
2439         }
2440
2441         input = kzalloc(sizeof(*input), GFP_ATOMIC);
2442         if (!input)
2443                 return -ENOMEM;
2444
2445         memset(&mask, 0, sizeof(union ixgbe_atr_input));
2446
2447         /* set SW index */
2448         input->sw_idx = fsp->location;
2449
2450         /* record flow type */
2451         if (!ixgbe_flowspec_to_flow_type(fsp,
2452                                          &input->filter.formatted.flow_type)) {
2453                 e_err(drv, "Unrecognized flow type\n");
2454                 goto err_out;
2455         }
2456
2457         mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
2458                                    IXGBE_ATR_L4TYPE_MASK;
2459
2460         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
2461                 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
2462
2463         /* Copy input into formatted structures */
2464         input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
2465         mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src;
2466         input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
2467         mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst;
2468         input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc;
2469         mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc;
2470         input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst;
2471         mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst;
2472
2473         if (fsp->flow_type & FLOW_EXT) {
2474                 input->filter.formatted.vm_pool =
2475                                 (unsigned char)ntohl(fsp->h_ext.data[1]);
2476                 mask.formatted.vm_pool =
2477                                 (unsigned char)ntohl(fsp->m_ext.data[1]);
2478                 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci;
2479                 mask.formatted.vlan_id = fsp->m_ext.vlan_tci;
2480                 input->filter.formatted.flex_bytes =
2481                                                 fsp->h_ext.vlan_etype;
2482                 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype;
2483         }
2484
2485         /* determine if we need to drop or route the packet */
2486         if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
2487                 input->action = IXGBE_FDIR_DROP_QUEUE;
2488         else
2489                 input->action = fsp->ring_cookie;
2490
2491         spin_lock(&adapter->fdir_perfect_lock);
2492
2493         if (hlist_empty(&adapter->fdir_filter_list)) {
2494                 /* save mask and program input mask into HW */
2495                 memcpy(&adapter->fdir_mask, &mask, sizeof(mask));
2496                 err = ixgbe_fdir_set_input_mask_82599(hw, &mask);
2497                 if (err) {
2498                         e_err(drv, "Error writing mask\n");
2499                         goto err_out_w_lock;
2500                 }
2501         } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) {
2502                 e_err(drv, "Only one mask supported per port\n");
2503                 goto err_out_w_lock;
2504         }
2505
2506         /* apply mask and compute/store hash */
2507         ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask);
2508
2509         /* program filters to filter memory */
2510         err = ixgbe_fdir_write_perfect_filter_82599(hw,
2511                                 &input->filter, input->sw_idx,
2512                                 (input->action == IXGBE_FDIR_DROP_QUEUE) ?
2513                                 IXGBE_FDIR_DROP_QUEUE :
2514                                 adapter->rx_ring[input->action]->reg_idx);
2515         if (err)
2516                 goto err_out_w_lock;
2517
2518         ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
2519
2520         spin_unlock(&adapter->fdir_perfect_lock);
2521
2522         return err;
2523 err_out_w_lock:
2524         spin_unlock(&adapter->fdir_perfect_lock);
2525 err_out:
2526         kfree(input);
2527         return -EINVAL;
2528 }
2529
2530 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2531                                         struct ethtool_rxnfc *cmd)
2532 {
2533         struct ethtool_rx_flow_spec *fsp =
2534                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2535         int err;
2536
2537         spin_lock(&adapter->fdir_perfect_lock);
2538         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location);
2539         spin_unlock(&adapter->fdir_perfect_lock);
2540
2541         return err;
2542 }
2543
2544 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2545 {
2546         struct ixgbe_adapter *adapter = netdev_priv(dev);
2547         int ret = -EOPNOTSUPP;
2548
2549         switch (cmd->cmd) {
2550         case ETHTOOL_SRXCLSRLINS:
2551                 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd);
2552                 break;
2553         case ETHTOOL_SRXCLSRLDEL:
2554                 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd);
2555                 break;
2556         default:
2557                 break;
2558         }
2559
2560         return ret;
2561 }
2562
2563 static const struct ethtool_ops ixgbe_ethtool_ops = {
2564         .get_settings           = ixgbe_get_settings,
2565         .set_settings           = ixgbe_set_settings,
2566         .get_drvinfo            = ixgbe_get_drvinfo,
2567         .get_regs_len           = ixgbe_get_regs_len,
2568         .get_regs               = ixgbe_get_regs,
2569         .get_wol                = ixgbe_get_wol,
2570         .set_wol                = ixgbe_set_wol,
2571         .nway_reset             = ixgbe_nway_reset,
2572         .get_link               = ethtool_op_get_link,
2573         .get_eeprom_len         = ixgbe_get_eeprom_len,
2574         .get_eeprom             = ixgbe_get_eeprom,
2575         .get_ringparam          = ixgbe_get_ringparam,
2576         .set_ringparam          = ixgbe_set_ringparam,
2577         .get_pauseparam         = ixgbe_get_pauseparam,
2578         .set_pauseparam         = ixgbe_set_pauseparam,
2579         .get_msglevel           = ixgbe_get_msglevel,
2580         .set_msglevel           = ixgbe_set_msglevel,
2581         .self_test              = ixgbe_diag_test,
2582         .get_strings            = ixgbe_get_strings,
2583         .set_phys_id            = ixgbe_set_phys_id,
2584         .get_sset_count         = ixgbe_get_sset_count,
2585         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
2586         .get_coalesce           = ixgbe_get_coalesce,
2587         .set_coalesce           = ixgbe_set_coalesce,
2588         .get_rxnfc              = ixgbe_get_rxnfc,
2589         .set_rxnfc              = ixgbe_set_rxnfc,
2590 };
2591
2592 void ixgbe_set_ethtool_ops(struct net_device *netdev)
2593 {
2594         SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
2595 }