2 * Copyright (C) 2005 - 2011 Emulex
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@emulex.com
15 * Costa Mesa, CA 92626
18 #include <linux/prefetch.h>
21 #include <asm/div64.h>
23 MODULE_VERSION(DRV_VER);
24 MODULE_DEVICE_TABLE(pci, be_dev_ids);
25 MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
26 MODULE_AUTHOR("ServerEngines Corporation");
27 MODULE_LICENSE("GPL");
29 static ushort rx_frag_size = 2048;
30 static unsigned int num_vfs;
31 module_param(rx_frag_size, ushort, S_IRUGO);
32 module_param(num_vfs, uint, S_IRUGO);
33 MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
34 MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
36 static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
37 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
38 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
39 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
40 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
41 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID3)},
42 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID4)},
45 MODULE_DEVICE_TABLE(pci, be_dev_ids);
46 /* UE Status Low CSR */
47 static const char * const ue_status_low_desc[] = {
81 /* UE Status High CSR */
82 static const char * const ue_status_hi_desc[] = {
117 static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
119 struct be_dma_mem *mem = &q->dma_mem;
121 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
125 static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
126 u16 len, u16 entry_size)
128 struct be_dma_mem *mem = &q->dma_mem;
130 memset(q, 0, sizeof(*q));
132 q->entry_size = entry_size;
133 mem->size = len * entry_size;
134 mem->va = dma_alloc_coherent(&adapter->pdev->dev, mem->size, &mem->dma,
138 memset(mem->va, 0, mem->size);
142 static void be_intr_set(struct be_adapter *adapter, bool enable)
146 if (adapter->eeh_err)
149 pci_read_config_dword(adapter->pdev, PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET,
151 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
153 if (!enabled && enable)
154 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
155 else if (enabled && !enable)
156 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
160 pci_write_config_dword(adapter->pdev,
161 PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET, reg);
164 static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
167 val |= qid & DB_RQ_RING_ID_MASK;
168 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
171 iowrite32(val, adapter->db + DB_RQ_OFFSET);
174 static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
177 val |= qid & DB_TXULP_RING_ID_MASK;
178 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
181 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
184 static void be_eq_notify(struct be_adapter *adapter, u16 qid,
185 bool arm, bool clear_int, u16 num_popped)
188 val |= qid & DB_EQ_RING_ID_MASK;
189 val |= ((qid & DB_EQ_RING_ID_EXT_MASK) <<
190 DB_EQ_RING_ID_EXT_MASK_SHIFT);
192 if (adapter->eeh_err)
196 val |= 1 << DB_EQ_REARM_SHIFT;
198 val |= 1 << DB_EQ_CLR_SHIFT;
199 val |= 1 << DB_EQ_EVNT_SHIFT;
200 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
201 iowrite32(val, adapter->db + DB_EQ_OFFSET);
204 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
207 val |= qid & DB_CQ_RING_ID_MASK;
208 val |= ((qid & DB_CQ_RING_ID_EXT_MASK) <<
209 DB_CQ_RING_ID_EXT_MASK_SHIFT);
211 if (adapter->eeh_err)
215 val |= 1 << DB_CQ_REARM_SHIFT;
216 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
217 iowrite32(val, adapter->db + DB_CQ_OFFSET);
220 static int be_mac_addr_set(struct net_device *netdev, void *p)
222 struct be_adapter *adapter = netdev_priv(netdev);
223 struct sockaddr *addr = p;
226 if (!is_valid_ether_addr(addr->sa_data))
227 return -EADDRNOTAVAIL;
229 /* MAC addr configuration will be done in hardware for VFs
230 * by their corresponding PFs. Just copy to netdev addr here
232 if (!be_physfn(adapter))
235 status = be_cmd_pmac_del(adapter, adapter->if_handle,
236 adapter->pmac_id, 0);
240 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
241 adapter->if_handle, &adapter->pmac_id, 0);
244 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
249 static void populate_be2_stats(struct be_adapter *adapter)
251 struct be_hw_stats_v0 *hw_stats = hw_stats_from_cmd(adapter);
252 struct be_pmem_stats *pmem_sts = &hw_stats->pmem;
253 struct be_rxf_stats_v0 *rxf_stats = &hw_stats->rxf;
254 struct be_port_rxf_stats_v0 *port_stats =
255 &rxf_stats->port[adapter->port_num];
256 struct be_drv_stats *drvs = &adapter->drv_stats;
258 be_dws_le_to_cpu(hw_stats, sizeof(*hw_stats));
259 drvs->rx_pause_frames = port_stats->rx_pause_frames;
260 drvs->rx_crc_errors = port_stats->rx_crc_errors;
261 drvs->rx_control_frames = port_stats->rx_control_frames;
262 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
263 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
264 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
265 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
266 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
267 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
268 drvs->rxpp_fifo_overflow_drop = port_stats->rx_fifo_overflow;
269 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
270 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
271 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
272 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
273 drvs->rx_input_fifo_overflow_drop = port_stats->rx_input_fifo_overflow;
274 drvs->rx_dropped_header_too_small =
275 port_stats->rx_dropped_header_too_small;
276 drvs->rx_address_match_errors = port_stats->rx_address_match_errors;
277 drvs->rx_alignment_symbol_errors =
278 port_stats->rx_alignment_symbol_errors;
280 drvs->tx_pauseframes = port_stats->tx_pauseframes;
281 drvs->tx_controlframes = port_stats->tx_controlframes;
283 if (adapter->port_num)
284 drvs->jabber_events = rxf_stats->port1_jabber_events;
286 drvs->jabber_events = rxf_stats->port0_jabber_events;
287 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
288 drvs->rx_drops_no_txpb = rxf_stats->rx_drops_no_txpb;
289 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
290 drvs->rx_drops_invalid_ring = rxf_stats->rx_drops_invalid_ring;
291 drvs->forwarded_packets = rxf_stats->forwarded_packets;
292 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
293 drvs->rx_drops_no_tpre_descr = rxf_stats->rx_drops_no_tpre_descr;
294 drvs->rx_drops_too_many_frags = rxf_stats->rx_drops_too_many_frags;
295 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
298 static void populate_be3_stats(struct be_adapter *adapter)
300 struct be_hw_stats_v1 *hw_stats = hw_stats_from_cmd(adapter);
301 struct be_pmem_stats *pmem_sts = &hw_stats->pmem;
302 struct be_rxf_stats_v1 *rxf_stats = &hw_stats->rxf;
303 struct be_port_rxf_stats_v1 *port_stats =
304 &rxf_stats->port[adapter->port_num];
305 struct be_drv_stats *drvs = &adapter->drv_stats;
307 be_dws_le_to_cpu(hw_stats, sizeof(*hw_stats));
308 drvs->rx_pause_frames = port_stats->rx_pause_frames;
309 drvs->rx_crc_errors = port_stats->rx_crc_errors;
310 drvs->rx_control_frames = port_stats->rx_control_frames;
311 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
312 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
313 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
314 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
315 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
316 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
317 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
318 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
319 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
320 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
321 drvs->rx_dropped_header_too_small =
322 port_stats->rx_dropped_header_too_small;
323 drvs->rx_input_fifo_overflow_drop =
324 port_stats->rx_input_fifo_overflow_drop;
325 drvs->rx_address_match_errors = port_stats->rx_address_match_errors;
326 drvs->rx_alignment_symbol_errors =
327 port_stats->rx_alignment_symbol_errors;
328 drvs->rxpp_fifo_overflow_drop = port_stats->rxpp_fifo_overflow_drop;
329 drvs->tx_pauseframes = port_stats->tx_pauseframes;
330 drvs->tx_controlframes = port_stats->tx_controlframes;
331 drvs->jabber_events = port_stats->jabber_events;
332 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
333 drvs->rx_drops_no_txpb = rxf_stats->rx_drops_no_txpb;
334 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
335 drvs->rx_drops_invalid_ring = rxf_stats->rx_drops_invalid_ring;
336 drvs->forwarded_packets = rxf_stats->forwarded_packets;
337 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
338 drvs->rx_drops_no_tpre_descr = rxf_stats->rx_drops_no_tpre_descr;
339 drvs->rx_drops_too_many_frags = rxf_stats->rx_drops_too_many_frags;
340 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
343 static void populate_lancer_stats(struct be_adapter *adapter)
346 struct be_drv_stats *drvs = &adapter->drv_stats;
347 struct lancer_pport_stats *pport_stats =
348 pport_stats_from_cmd(adapter);
350 be_dws_le_to_cpu(pport_stats, sizeof(*pport_stats));
351 drvs->rx_pause_frames = pport_stats->rx_pause_frames_lo;
352 drvs->rx_crc_errors = pport_stats->rx_crc_errors_lo;
353 drvs->rx_control_frames = pport_stats->rx_control_frames_lo;
354 drvs->rx_in_range_errors = pport_stats->rx_in_range_errors;
355 drvs->rx_frame_too_long = pport_stats->rx_frames_too_long_lo;
356 drvs->rx_dropped_runt = pport_stats->rx_dropped_runt;
357 drvs->rx_ip_checksum_errs = pport_stats->rx_ip_checksum_errors;
358 drvs->rx_tcp_checksum_errs = pport_stats->rx_tcp_checksum_errors;
359 drvs->rx_udp_checksum_errs = pport_stats->rx_udp_checksum_errors;
360 drvs->rx_dropped_tcp_length =
361 pport_stats->rx_dropped_invalid_tcp_length;
362 drvs->rx_dropped_too_small = pport_stats->rx_dropped_too_small;
363 drvs->rx_dropped_too_short = pport_stats->rx_dropped_too_short;
364 drvs->rx_out_range_errors = pport_stats->rx_out_of_range_errors;
365 drvs->rx_dropped_header_too_small =
366 pport_stats->rx_dropped_header_too_small;
367 drvs->rx_input_fifo_overflow_drop = pport_stats->rx_fifo_overflow;
368 drvs->rx_address_match_errors = pport_stats->rx_address_match_errors;
369 drvs->rx_alignment_symbol_errors = pport_stats->rx_symbol_errors_lo;
370 drvs->rxpp_fifo_overflow_drop = pport_stats->rx_fifo_overflow;
371 drvs->tx_pauseframes = pport_stats->tx_pause_frames_lo;
372 drvs->tx_controlframes = pport_stats->tx_control_frames_lo;
373 drvs->jabber_events = pport_stats->rx_jabbers;
374 drvs->rx_drops_invalid_ring = pport_stats->rx_drops_invalid_queue;
375 drvs->forwarded_packets = pport_stats->num_forwards_lo;
376 drvs->rx_drops_mtu = pport_stats->rx_drops_mtu_lo;
377 drvs->rx_drops_too_many_frags =
378 pport_stats->rx_drops_too_many_frags_lo;
381 static void accumulate_16bit_val(u32 *acc, u16 val)
383 #define lo(x) (x & 0xFFFF)
384 #define hi(x) (x & 0xFFFF0000)
385 bool wrapped = val < lo(*acc);
386 u32 newacc = hi(*acc) + val;
390 ACCESS_ONCE(*acc) = newacc;
393 void be_parse_stats(struct be_adapter *adapter)
395 struct be_erx_stats_v1 *erx = be_erx_stats_from_cmd(adapter);
396 struct be_rx_obj *rxo;
399 if (adapter->generation == BE_GEN3) {
400 if (lancer_chip(adapter))
401 populate_lancer_stats(adapter);
403 populate_be3_stats(adapter);
405 populate_be2_stats(adapter);
408 /* as erx_v1 is longer than v0, ok to use v1 defn for v0 access */
409 for_all_rx_queues(adapter, rxo, i) {
410 /* below erx HW counter can actually wrap around after
411 * 65535. Driver accumulates a 32-bit value
413 accumulate_16bit_val(&rx_stats(rxo)->rx_drops_no_frags,
414 (u16)erx->rx_drops_no_fragments[rxo->q.id]);
418 static struct rtnl_link_stats64 *be_get_stats64(struct net_device *netdev,
419 struct rtnl_link_stats64 *stats)
421 struct be_adapter *adapter = netdev_priv(netdev);
422 struct be_drv_stats *drvs = &adapter->drv_stats;
423 struct be_rx_obj *rxo;
424 struct be_tx_obj *txo;
429 for_all_rx_queues(adapter, rxo, i) {
430 const struct be_rx_stats *rx_stats = rx_stats(rxo);
432 start = u64_stats_fetch_begin_bh(&rx_stats->sync);
433 pkts = rx_stats(rxo)->rx_pkts;
434 bytes = rx_stats(rxo)->rx_bytes;
435 } while (u64_stats_fetch_retry_bh(&rx_stats->sync, start));
436 stats->rx_packets += pkts;
437 stats->rx_bytes += bytes;
438 stats->multicast += rx_stats(rxo)->rx_mcast_pkts;
439 stats->rx_dropped += rx_stats(rxo)->rx_drops_no_skbs +
440 rx_stats(rxo)->rx_drops_no_frags;
443 for_all_tx_queues(adapter, txo, i) {
444 const struct be_tx_stats *tx_stats = tx_stats(txo);
446 start = u64_stats_fetch_begin_bh(&tx_stats->sync);
447 pkts = tx_stats(txo)->tx_pkts;
448 bytes = tx_stats(txo)->tx_bytes;
449 } while (u64_stats_fetch_retry_bh(&tx_stats->sync, start));
450 stats->tx_packets += pkts;
451 stats->tx_bytes += bytes;
454 /* bad pkts received */
455 stats->rx_errors = drvs->rx_crc_errors +
456 drvs->rx_alignment_symbol_errors +
457 drvs->rx_in_range_errors +
458 drvs->rx_out_range_errors +
459 drvs->rx_frame_too_long +
460 drvs->rx_dropped_too_small +
461 drvs->rx_dropped_too_short +
462 drvs->rx_dropped_header_too_small +
463 drvs->rx_dropped_tcp_length +
464 drvs->rx_dropped_runt;
466 /* detailed rx errors */
467 stats->rx_length_errors = drvs->rx_in_range_errors +
468 drvs->rx_out_range_errors +
469 drvs->rx_frame_too_long;
471 stats->rx_crc_errors = drvs->rx_crc_errors;
473 /* frame alignment errors */
474 stats->rx_frame_errors = drvs->rx_alignment_symbol_errors;
476 /* receiver fifo overrun */
477 /* drops_no_pbuf is no per i/f, it's per BE card */
478 stats->rx_fifo_errors = drvs->rxpp_fifo_overflow_drop +
479 drvs->rx_input_fifo_overflow_drop +
480 drvs->rx_drops_no_pbuf;
484 void be_link_status_update(struct be_adapter *adapter, u32 link_status)
486 struct net_device *netdev = adapter->netdev;
488 /* when link status changes, link speed must be re-queried from card */
489 adapter->link_speed = -1;
490 if ((link_status & LINK_STATUS_MASK) == LINK_UP) {
491 netif_carrier_on(netdev);
492 dev_info(&adapter->pdev->dev, "%s: Link up\n", netdev->name);
494 netif_carrier_off(netdev);
495 dev_info(&adapter->pdev->dev, "%s: Link down\n", netdev->name);
499 static void be_tx_stats_update(struct be_tx_obj *txo,
500 u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
502 struct be_tx_stats *stats = tx_stats(txo);
504 u64_stats_update_begin(&stats->sync);
506 stats->tx_wrbs += wrb_cnt;
507 stats->tx_bytes += copied;
508 stats->tx_pkts += (gso_segs ? gso_segs : 1);
511 u64_stats_update_end(&stats->sync);
514 /* Determine number of WRB entries needed to xmit data in an skb */
515 static u32 wrb_cnt_for_skb(struct be_adapter *adapter, struct sk_buff *skb,
518 int cnt = (skb->len > skb->data_len);
520 cnt += skb_shinfo(skb)->nr_frags;
522 /* to account for hdr wrb */
524 if (lancer_chip(adapter) || !(cnt & 1)) {
527 /* add a dummy to make it an even num */
531 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
535 static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
537 wrb->frag_pa_hi = upper_32_bits(addr);
538 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
539 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
542 static void wrb_fill_hdr(struct be_adapter *adapter, struct be_eth_hdr_wrb *hdr,
543 struct sk_buff *skb, u32 wrb_cnt, u32 len)
548 memset(hdr, 0, sizeof(*hdr));
550 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
552 if (skb_is_gso(skb)) {
553 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
554 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
555 hdr, skb_shinfo(skb)->gso_size);
556 if (skb_is_gso_v6(skb) && !lancer_chip(adapter))
557 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso6, hdr, 1);
558 if (lancer_chip(adapter) && adapter->sli_family ==
559 LANCER_A0_SLI_FAMILY) {
560 AMAP_SET_BITS(struct amap_eth_hdr_wrb, ipcs, hdr, 1);
562 AMAP_SET_BITS(struct amap_eth_hdr_wrb,
564 else if (is_udp_pkt(skb))
565 AMAP_SET_BITS(struct amap_eth_hdr_wrb,
568 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
570 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
571 else if (is_udp_pkt(skb))
572 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
575 if (vlan_tx_tag_present(skb)) {
576 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
577 vlan_tag = vlan_tx_tag_get(skb);
578 vlan_prio = (vlan_tag & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
579 /* If vlan priority provided by OS is NOT in available bmap */
580 if (!(adapter->vlan_prio_bmap & (1 << vlan_prio)))
581 vlan_tag = (vlan_tag & ~VLAN_PRIO_MASK) |
582 adapter->recommended_prio;
583 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag, hdr, vlan_tag);
586 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
587 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
588 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
589 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
592 static void unmap_tx_frag(struct device *dev, struct be_eth_wrb *wrb,
597 be_dws_le_to_cpu(wrb, sizeof(*wrb));
599 dma = (u64)wrb->frag_pa_hi << 32 | (u64)wrb->frag_pa_lo;
602 dma_unmap_single(dev, dma, wrb->frag_len,
605 dma_unmap_page(dev, dma, wrb->frag_len, DMA_TO_DEVICE);
609 static int make_tx_wrbs(struct be_adapter *adapter, struct be_queue_info *txq,
610 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
614 struct device *dev = &adapter->pdev->dev;
615 struct sk_buff *first_skb = skb;
616 struct be_eth_wrb *wrb;
617 struct be_eth_hdr_wrb *hdr;
618 bool map_single = false;
621 hdr = queue_head_node(txq);
623 map_head = txq->head;
625 if (skb->len > skb->data_len) {
626 int len = skb_headlen(skb);
627 busaddr = dma_map_single(dev, skb->data, len, DMA_TO_DEVICE);
628 if (dma_mapping_error(dev, busaddr))
631 wrb = queue_head_node(txq);
632 wrb_fill(wrb, busaddr, len);
633 be_dws_cpu_to_le(wrb, sizeof(*wrb));
638 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
639 struct skb_frag_struct *frag =
640 &skb_shinfo(skb)->frags[i];
641 busaddr = skb_frag_dma_map(dev, frag, 0,
642 frag->size, DMA_TO_DEVICE);
643 if (dma_mapping_error(dev, busaddr))
645 wrb = queue_head_node(txq);
646 wrb_fill(wrb, busaddr, frag->size);
647 be_dws_cpu_to_le(wrb, sizeof(*wrb));
649 copied += frag->size;
653 wrb = queue_head_node(txq);
655 be_dws_cpu_to_le(wrb, sizeof(*wrb));
659 wrb_fill_hdr(adapter, hdr, first_skb, wrb_cnt, copied);
660 be_dws_cpu_to_le(hdr, sizeof(*hdr));
664 txq->head = map_head;
666 wrb = queue_head_node(txq);
667 unmap_tx_frag(dev, wrb, map_single);
669 copied -= wrb->frag_len;
675 static netdev_tx_t be_xmit(struct sk_buff *skb,
676 struct net_device *netdev)
678 struct be_adapter *adapter = netdev_priv(netdev);
679 struct be_tx_obj *txo = &adapter->tx_obj[skb_get_queue_mapping(skb)];
680 struct be_queue_info *txq = &txo->q;
681 u32 wrb_cnt = 0, copied = 0;
682 u32 start = txq->head;
683 bool dummy_wrb, stopped = false;
685 wrb_cnt = wrb_cnt_for_skb(adapter, skb, &dummy_wrb);
687 copied = make_tx_wrbs(adapter, txq, skb, wrb_cnt, dummy_wrb);
689 /* record the sent skb in the sent_skb table */
690 BUG_ON(txo->sent_skb_list[start]);
691 txo->sent_skb_list[start] = skb;
693 /* Ensure txq has space for the next skb; Else stop the queue
694 * *BEFORE* ringing the tx doorbell, so that we serialze the
695 * tx compls of the current transmit which'll wake up the queue
697 atomic_add(wrb_cnt, &txq->used);
698 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
700 netif_stop_subqueue(netdev, skb_get_queue_mapping(skb));
704 be_txq_notify(adapter, txq->id, wrb_cnt);
706 be_tx_stats_update(txo, wrb_cnt, copied,
707 skb_shinfo(skb)->gso_segs, stopped);
710 dev_kfree_skb_any(skb);
715 static int be_change_mtu(struct net_device *netdev, int new_mtu)
717 struct be_adapter *adapter = netdev_priv(netdev);
718 if (new_mtu < BE_MIN_MTU ||
719 new_mtu > (BE_MAX_JUMBO_FRAME_SIZE -
720 (ETH_HLEN + ETH_FCS_LEN))) {
721 dev_info(&adapter->pdev->dev,
722 "MTU must be between %d and %d bytes\n",
724 (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN)));
727 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
728 netdev->mtu, new_mtu);
729 netdev->mtu = new_mtu;
734 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
735 * If the user configures more, place BE in vlan promiscuous mode.
737 static int be_vid_config(struct be_adapter *adapter, bool vf, u32 vf_num)
739 u16 vtag[BE_NUM_VLANS_SUPPORTED];
745 if_handle = adapter->vf_cfg[vf_num].vf_if_handle;
746 vtag[0] = cpu_to_le16(adapter->vf_cfg[vf_num].vf_vlan_tag);
747 status = be_cmd_vlan_config(adapter, if_handle, vtag, 1, 1, 0);
750 /* No need to further configure vids if in promiscuous mode */
751 if (adapter->promiscuous)
754 if (adapter->vlans_added <= adapter->max_vlans) {
755 /* Construct VLAN Table to give to HW */
756 for (i = 0; i < VLAN_N_VID; i++) {
757 if (adapter->vlan_tag[i]) {
758 vtag[ntags] = cpu_to_le16(i);
762 status = be_cmd_vlan_config(adapter, adapter->if_handle,
765 status = be_cmd_vlan_config(adapter, adapter->if_handle,
772 static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
774 struct be_adapter *adapter = netdev_priv(netdev);
776 adapter->vlans_added++;
777 if (!be_physfn(adapter))
780 adapter->vlan_tag[vid] = 1;
781 if (adapter->vlans_added <= (adapter->max_vlans + 1))
782 be_vid_config(adapter, false, 0);
785 static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
787 struct be_adapter *adapter = netdev_priv(netdev);
789 adapter->vlans_added--;
791 if (!be_physfn(adapter))
794 adapter->vlan_tag[vid] = 0;
795 if (adapter->vlans_added <= adapter->max_vlans)
796 be_vid_config(adapter, false, 0);
799 static void be_set_multicast_list(struct net_device *netdev)
801 struct be_adapter *adapter = netdev_priv(netdev);
803 if (netdev->flags & IFF_PROMISC) {
804 be_cmd_rx_filter(adapter, IFF_PROMISC, ON);
805 adapter->promiscuous = true;
809 /* BE was previously in promiscuous mode; disable it */
810 if (adapter->promiscuous) {
811 adapter->promiscuous = false;
812 be_cmd_rx_filter(adapter, IFF_PROMISC, OFF);
814 if (adapter->vlans_added)
815 be_vid_config(adapter, false, 0);
818 /* Enable multicast promisc if num configured exceeds what we support */
819 if (netdev->flags & IFF_ALLMULTI ||
820 netdev_mc_count(netdev) > BE_MAX_MC) {
821 be_cmd_rx_filter(adapter, IFF_ALLMULTI, ON);
825 be_cmd_rx_filter(adapter, IFF_MULTICAST, ON);
830 static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
832 struct be_adapter *adapter = netdev_priv(netdev);
835 if (!adapter->sriov_enabled)
838 if (!is_valid_ether_addr(mac) || (vf >= num_vfs))
841 if (adapter->vf_cfg[vf].vf_pmac_id != BE_INVALID_PMAC_ID)
842 status = be_cmd_pmac_del(adapter,
843 adapter->vf_cfg[vf].vf_if_handle,
844 adapter->vf_cfg[vf].vf_pmac_id, vf + 1);
846 status = be_cmd_pmac_add(adapter, mac,
847 adapter->vf_cfg[vf].vf_if_handle,
848 &adapter->vf_cfg[vf].vf_pmac_id, vf + 1);
851 dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed\n",
854 memcpy(adapter->vf_cfg[vf].vf_mac_addr, mac, ETH_ALEN);
859 static int be_get_vf_config(struct net_device *netdev, int vf,
860 struct ifla_vf_info *vi)
862 struct be_adapter *adapter = netdev_priv(netdev);
864 if (!adapter->sriov_enabled)
871 vi->tx_rate = adapter->vf_cfg[vf].vf_tx_rate;
872 vi->vlan = adapter->vf_cfg[vf].vf_vlan_tag;
874 memcpy(&vi->mac, adapter->vf_cfg[vf].vf_mac_addr, ETH_ALEN);
879 static int be_set_vf_vlan(struct net_device *netdev,
880 int vf, u16 vlan, u8 qos)
882 struct be_adapter *adapter = netdev_priv(netdev);
885 if (!adapter->sriov_enabled)
888 if ((vf >= num_vfs) || (vlan > 4095))
892 adapter->vf_cfg[vf].vf_vlan_tag = vlan;
893 adapter->vlans_added++;
895 adapter->vf_cfg[vf].vf_vlan_tag = 0;
896 adapter->vlans_added--;
899 status = be_vid_config(adapter, true, vf);
902 dev_info(&adapter->pdev->dev,
903 "VLAN %d config on VF %d failed\n", vlan, vf);
907 static int be_set_vf_tx_rate(struct net_device *netdev,
910 struct be_adapter *adapter = netdev_priv(netdev);
913 if (!adapter->sriov_enabled)
916 if ((vf >= num_vfs) || (rate < 0))
922 adapter->vf_cfg[vf].vf_tx_rate = rate;
923 status = be_cmd_set_qos(adapter, rate / 10, vf + 1);
926 dev_info(&adapter->pdev->dev,
927 "tx rate %d on VF %d failed\n", rate, vf);
931 static void be_rx_eqd_update(struct be_adapter *adapter, struct be_rx_obj *rxo)
933 struct be_eq_obj *rx_eq = &rxo->rx_eq;
934 struct be_rx_stats *stats = rx_stats(rxo);
936 ulong delta = now - stats->rx_jiffies;
938 unsigned int start, eqd;
940 if (!rx_eq->enable_aic)
944 if (time_before(now, stats->rx_jiffies)) {
945 stats->rx_jiffies = now;
949 /* Update once a second */
954 start = u64_stats_fetch_begin_bh(&stats->sync);
955 pkts = stats->rx_pkts;
956 } while (u64_stats_fetch_retry_bh(&stats->sync, start));
958 stats->rx_pps = (unsigned long)(pkts - stats->rx_pkts_prev) / (delta / HZ);
959 stats->rx_pkts_prev = pkts;
960 stats->rx_jiffies = now;
961 eqd = stats->rx_pps / 110000;
963 if (eqd > rx_eq->max_eqd)
964 eqd = rx_eq->max_eqd;
965 if (eqd < rx_eq->min_eqd)
966 eqd = rx_eq->min_eqd;
969 if (eqd != rx_eq->cur_eqd) {
970 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
971 rx_eq->cur_eqd = eqd;
975 static void be_rx_stats_update(struct be_rx_obj *rxo,
976 struct be_rx_compl_info *rxcp)
978 struct be_rx_stats *stats = rx_stats(rxo);
980 u64_stats_update_begin(&stats->sync);
982 stats->rx_bytes += rxcp->pkt_size;
984 if (rxcp->pkt_type == BE_MULTICAST_PACKET)
985 stats->rx_mcast_pkts++;
987 stats->rx_compl_err++;
988 u64_stats_update_end(&stats->sync);
991 static inline bool csum_passed(struct be_rx_compl_info *rxcp)
993 /* L4 checksum is not reliable for non TCP/UDP packets.
994 * Also ignore ipcksm for ipv6 pkts */
995 return (rxcp->tcpf || rxcp->udpf) && rxcp->l4_csum &&
996 (rxcp->ip_csum || rxcp->ipv6);
999 static struct be_rx_page_info *
1000 get_rx_page_info(struct be_adapter *adapter,
1001 struct be_rx_obj *rxo,
1004 struct be_rx_page_info *rx_page_info;
1005 struct be_queue_info *rxq = &rxo->q;
1007 rx_page_info = &rxo->page_info_tbl[frag_idx];
1008 BUG_ON(!rx_page_info->page);
1010 if (rx_page_info->last_page_user) {
1011 dma_unmap_page(&adapter->pdev->dev,
1012 dma_unmap_addr(rx_page_info, bus),
1013 adapter->big_page_size, DMA_FROM_DEVICE);
1014 rx_page_info->last_page_user = false;
1017 atomic_dec(&rxq->used);
1018 return rx_page_info;
1021 /* Throwaway the data in the Rx completion */
1022 static void be_rx_compl_discard(struct be_adapter *adapter,
1023 struct be_rx_obj *rxo,
1024 struct be_rx_compl_info *rxcp)
1026 struct be_queue_info *rxq = &rxo->q;
1027 struct be_rx_page_info *page_info;
1028 u16 i, num_rcvd = rxcp->num_rcvd;
1030 for (i = 0; i < num_rcvd; i++) {
1031 page_info = get_rx_page_info(adapter, rxo, rxcp->rxq_idx);
1032 put_page(page_info->page);
1033 memset(page_info, 0, sizeof(*page_info));
1034 index_inc(&rxcp->rxq_idx, rxq->len);
1039 * skb_fill_rx_data forms a complete skb for an ether frame
1040 * indicated by rxcp.
1042 static void skb_fill_rx_data(struct be_adapter *adapter, struct be_rx_obj *rxo,
1043 struct sk_buff *skb, struct be_rx_compl_info *rxcp)
1045 struct be_queue_info *rxq = &rxo->q;
1046 struct be_rx_page_info *page_info;
1048 u16 hdr_len, curr_frag_len, remaining;
1051 page_info = get_rx_page_info(adapter, rxo, rxcp->rxq_idx);
1052 start = page_address(page_info->page) + page_info->page_offset;
1055 /* Copy data in the first descriptor of this completion */
1056 curr_frag_len = min(rxcp->pkt_size, rx_frag_size);
1058 /* Copy the header portion into skb_data */
1059 hdr_len = min(BE_HDR_LEN, curr_frag_len);
1060 memcpy(skb->data, start, hdr_len);
1061 skb->len = curr_frag_len;
1062 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
1063 /* Complete packet has now been moved to data */
1064 put_page(page_info->page);
1066 skb->tail += curr_frag_len;
1068 skb_shinfo(skb)->nr_frags = 1;
1069 skb_frag_set_page(skb, 0, page_info->page);
1070 skb_shinfo(skb)->frags[0].page_offset =
1071 page_info->page_offset + hdr_len;
1072 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
1073 skb->data_len = curr_frag_len - hdr_len;
1074 skb->tail += hdr_len;
1076 page_info->page = NULL;
1078 if (rxcp->pkt_size <= rx_frag_size) {
1079 BUG_ON(rxcp->num_rcvd != 1);
1083 /* More frags present for this completion */
1084 index_inc(&rxcp->rxq_idx, rxq->len);
1085 remaining = rxcp->pkt_size - curr_frag_len;
1086 for (i = 1, j = 0; i < rxcp->num_rcvd; i++) {
1087 page_info = get_rx_page_info(adapter, rxo, rxcp->rxq_idx);
1088 curr_frag_len = min(remaining, rx_frag_size);
1090 /* Coalesce all frags from the same physical page in one slot */
1091 if (page_info->page_offset == 0) {
1094 skb_frag_set_page(skb, j, page_info->page);
1095 skb_shinfo(skb)->frags[j].page_offset =
1096 page_info->page_offset;
1097 skb_shinfo(skb)->frags[j].size = 0;
1098 skb_shinfo(skb)->nr_frags++;
1100 put_page(page_info->page);
1103 skb_shinfo(skb)->frags[j].size += curr_frag_len;
1104 skb->len += curr_frag_len;
1105 skb->data_len += curr_frag_len;
1107 remaining -= curr_frag_len;
1108 index_inc(&rxcp->rxq_idx, rxq->len);
1109 page_info->page = NULL;
1111 BUG_ON(j > MAX_SKB_FRAGS);
1114 /* Process the RX completion indicated by rxcp when GRO is disabled */
1115 static void be_rx_compl_process(struct be_adapter *adapter,
1116 struct be_rx_obj *rxo,
1117 struct be_rx_compl_info *rxcp)
1119 struct net_device *netdev = adapter->netdev;
1120 struct sk_buff *skb;
1122 skb = netdev_alloc_skb_ip_align(netdev, BE_HDR_LEN);
1123 if (unlikely(!skb)) {
1124 rx_stats(rxo)->rx_drops_no_skbs++;
1125 be_rx_compl_discard(adapter, rxo, rxcp);
1129 skb_fill_rx_data(adapter, rxo, skb, rxcp);
1131 if (likely((netdev->features & NETIF_F_RXCSUM) && csum_passed(rxcp)))
1132 skb->ip_summed = CHECKSUM_UNNECESSARY;
1134 skb_checksum_none_assert(skb);
1136 skb->truesize = skb->len + sizeof(struct sk_buff);
1137 skb->protocol = eth_type_trans(skb, netdev);
1138 if (adapter->netdev->features & NETIF_F_RXHASH)
1139 skb->rxhash = rxcp->rss_hash;
1143 __vlan_hwaccel_put_tag(skb, rxcp->vlan_tag);
1145 netif_receive_skb(skb);
1148 /* Process the RX completion indicated by rxcp when GRO is enabled */
1149 static void be_rx_compl_process_gro(struct be_adapter *adapter,
1150 struct be_rx_obj *rxo,
1151 struct be_rx_compl_info *rxcp)
1153 struct be_rx_page_info *page_info;
1154 struct sk_buff *skb = NULL;
1155 struct be_queue_info *rxq = &rxo->q;
1156 struct be_eq_obj *eq_obj = &rxo->rx_eq;
1157 u16 remaining, curr_frag_len;
1160 skb = napi_get_frags(&eq_obj->napi);
1162 be_rx_compl_discard(adapter, rxo, rxcp);
1166 remaining = rxcp->pkt_size;
1167 for (i = 0, j = -1; i < rxcp->num_rcvd; i++) {
1168 page_info = get_rx_page_info(adapter, rxo, rxcp->rxq_idx);
1170 curr_frag_len = min(remaining, rx_frag_size);
1172 /* Coalesce all frags from the same physical page in one slot */
1173 if (i == 0 || page_info->page_offset == 0) {
1174 /* First frag or Fresh page */
1176 skb_frag_set_page(skb, j, page_info->page);
1177 skb_shinfo(skb)->frags[j].page_offset =
1178 page_info->page_offset;
1179 skb_shinfo(skb)->frags[j].size = 0;
1181 put_page(page_info->page);
1183 skb_shinfo(skb)->frags[j].size += curr_frag_len;
1185 remaining -= curr_frag_len;
1186 index_inc(&rxcp->rxq_idx, rxq->len);
1187 memset(page_info, 0, sizeof(*page_info));
1189 BUG_ON(j > MAX_SKB_FRAGS);
1191 skb_shinfo(skb)->nr_frags = j + 1;
1192 skb->len = rxcp->pkt_size;
1193 skb->data_len = rxcp->pkt_size;
1194 skb->truesize += rxcp->pkt_size;
1195 skb->ip_summed = CHECKSUM_UNNECESSARY;
1196 if (adapter->netdev->features & NETIF_F_RXHASH)
1197 skb->rxhash = rxcp->rss_hash;
1200 __vlan_hwaccel_put_tag(skb, rxcp->vlan_tag);
1202 napi_gro_frags(&eq_obj->napi);
1205 static void be_parse_rx_compl_v1(struct be_adapter *adapter,
1206 struct be_eth_rx_compl *compl,
1207 struct be_rx_compl_info *rxcp)
1210 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, pktsize, compl);
1211 rxcp->vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vtp, compl);
1212 rxcp->err = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, err, compl);
1213 rxcp->tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, tcpf, compl);
1214 rxcp->udpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, udpf, compl);
1216 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, ipcksm, compl);
1218 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, l4_cksm, compl);
1220 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, ip_version, compl);
1222 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, fragndx, compl);
1224 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, numfrags, compl);
1226 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, cast_enc, compl);
1228 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, rsshash, rxcp);
1230 rxcp->vtm = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vtm,
1232 rxcp->vlan_tag = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vlan_tag,
1235 rxcp->port = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, port, compl);
1238 static void be_parse_rx_compl_v0(struct be_adapter *adapter,
1239 struct be_eth_rx_compl *compl,
1240 struct be_rx_compl_info *rxcp)
1243 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, pktsize, compl);
1244 rxcp->vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vtp, compl);
1245 rxcp->err = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, err, compl);
1246 rxcp->tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, tcpf, compl);
1247 rxcp->udpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, udpf, compl);
1249 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, ipcksm, compl);
1251 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, l4_cksm, compl);
1253 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, ip_version, compl);
1255 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, fragndx, compl);
1257 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, numfrags, compl);
1259 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, cast_enc, compl);
1261 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, rsshash, rxcp);
1263 rxcp->vtm = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vtm,
1265 rxcp->vlan_tag = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vlan_tag,
1268 rxcp->port = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, port, compl);
1271 static struct be_rx_compl_info *be_rx_compl_get(struct be_rx_obj *rxo)
1273 struct be_eth_rx_compl *compl = queue_tail_node(&rxo->cq);
1274 struct be_rx_compl_info *rxcp = &rxo->rxcp;
1275 struct be_adapter *adapter = rxo->adapter;
1277 /* For checking the valid bit it is Ok to use either definition as the
1278 * valid bit is at the same position in both v0 and v1 Rx compl */
1279 if (compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] == 0)
1283 be_dws_le_to_cpu(compl, sizeof(*compl));
1285 if (adapter->be3_native)
1286 be_parse_rx_compl_v1(adapter, compl, rxcp);
1288 be_parse_rx_compl_v0(adapter, compl, rxcp);
1291 /* vlanf could be wrongly set in some cards.
1292 * ignore if vtm is not set */
1293 if ((adapter->function_mode & 0x400) && !rxcp->vtm)
1296 if (!lancer_chip(adapter))
1297 rxcp->vlan_tag = swab16(rxcp->vlan_tag);
1299 if (adapter->pvid == (rxcp->vlan_tag & VLAN_VID_MASK) &&
1300 !adapter->vlan_tag[rxcp->vlan_tag])
1304 /* As the compl has been parsed, reset it; we wont touch it again */
1305 compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] = 0;
1307 queue_tail_inc(&rxo->cq);
1311 static inline struct page *be_alloc_pages(u32 size, gfp_t gfp)
1313 u32 order = get_order(size);
1317 return alloc_pages(gfp, order);
1321 * Allocate a page, split it to fragments of size rx_frag_size and post as
1322 * receive buffers to BE
1324 static void be_post_rx_frags(struct be_rx_obj *rxo, gfp_t gfp)
1326 struct be_adapter *adapter = rxo->adapter;
1327 struct be_rx_page_info *page_info_tbl = rxo->page_info_tbl;
1328 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
1329 struct be_queue_info *rxq = &rxo->q;
1330 struct page *pagep = NULL;
1331 struct be_eth_rx_d *rxd;
1332 u64 page_dmaaddr = 0, frag_dmaaddr;
1333 u32 posted, page_offset = 0;
1335 page_info = &rxo->page_info_tbl[rxq->head];
1336 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
1338 pagep = be_alloc_pages(adapter->big_page_size, gfp);
1339 if (unlikely(!pagep)) {
1340 rx_stats(rxo)->rx_post_fail++;
1343 page_dmaaddr = dma_map_page(&adapter->pdev->dev, pagep,
1344 0, adapter->big_page_size,
1346 page_info->page_offset = 0;
1349 page_info->page_offset = page_offset + rx_frag_size;
1351 page_offset = page_info->page_offset;
1352 page_info->page = pagep;
1353 dma_unmap_addr_set(page_info, bus, page_dmaaddr);
1354 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
1356 rxd = queue_head_node(rxq);
1357 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
1358 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
1360 /* Any space left in the current big page for another frag? */
1361 if ((page_offset + rx_frag_size + rx_frag_size) >
1362 adapter->big_page_size) {
1364 page_info->last_page_user = true;
1367 prev_page_info = page_info;
1368 queue_head_inc(rxq);
1369 page_info = &page_info_tbl[rxq->head];
1372 prev_page_info->last_page_user = true;
1375 atomic_add(posted, &rxq->used);
1376 be_rxq_notify(adapter, rxq->id, posted);
1377 } else if (atomic_read(&rxq->used) == 0) {
1378 /* Let be_worker replenish when memory is available */
1379 rxo->rx_post_starved = true;
1383 static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
1385 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
1387 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
1391 be_dws_le_to_cpu(txcp, sizeof(*txcp));
1393 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
1395 queue_tail_inc(tx_cq);
1399 static u16 be_tx_compl_process(struct be_adapter *adapter,
1400 struct be_tx_obj *txo, u16 last_index)
1402 struct be_queue_info *txq = &txo->q;
1403 struct be_eth_wrb *wrb;
1404 struct sk_buff **sent_skbs = txo->sent_skb_list;
1405 struct sk_buff *sent_skb;
1406 u16 cur_index, num_wrbs = 1; /* account for hdr wrb */
1407 bool unmap_skb_hdr = true;
1409 sent_skb = sent_skbs[txq->tail];
1411 sent_skbs[txq->tail] = NULL;
1413 /* skip header wrb */
1414 queue_tail_inc(txq);
1417 cur_index = txq->tail;
1418 wrb = queue_tail_node(txq);
1419 unmap_tx_frag(&adapter->pdev->dev, wrb,
1420 (unmap_skb_hdr && skb_headlen(sent_skb)));
1421 unmap_skb_hdr = false;
1424 queue_tail_inc(txq);
1425 } while (cur_index != last_index);
1427 kfree_skb(sent_skb);
1431 static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1433 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1439 eqe->evt = le32_to_cpu(eqe->evt);
1440 queue_tail_inc(&eq_obj->q);
1444 static int event_handle(struct be_adapter *adapter,
1445 struct be_eq_obj *eq_obj,
1448 struct be_eq_entry *eqe;
1451 while ((eqe = event_get(eq_obj)) != NULL) {
1456 /* Deal with any spurious interrupts that come
1462 be_eq_notify(adapter, eq_obj->q.id, rearm, true, num);
1464 napi_schedule(&eq_obj->napi);
1469 /* Just read and notify events without processing them.
1470 * Used at the time of destroying event queues */
1471 static void be_eq_clean(struct be_adapter *adapter,
1472 struct be_eq_obj *eq_obj)
1474 struct be_eq_entry *eqe;
1477 while ((eqe = event_get(eq_obj)) != NULL) {
1483 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1486 static void be_rx_q_clean(struct be_adapter *adapter, struct be_rx_obj *rxo)
1488 struct be_rx_page_info *page_info;
1489 struct be_queue_info *rxq = &rxo->q;
1490 struct be_queue_info *rx_cq = &rxo->cq;
1491 struct be_rx_compl_info *rxcp;
1494 /* First cleanup pending rx completions */
1495 while ((rxcp = be_rx_compl_get(rxo)) != NULL) {
1496 be_rx_compl_discard(adapter, rxo, rxcp);
1497 be_cq_notify(adapter, rx_cq->id, false, 1);
1500 /* Then free posted rx buffer that were not used */
1501 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
1502 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
1503 page_info = get_rx_page_info(adapter, rxo, tail);
1504 put_page(page_info->page);
1505 memset(page_info, 0, sizeof(*page_info));
1507 BUG_ON(atomic_read(&rxq->used));
1508 rxq->tail = rxq->head = 0;
1511 static void be_tx_compl_clean(struct be_adapter *adapter,
1512 struct be_tx_obj *txo)
1514 struct be_queue_info *tx_cq = &txo->cq;
1515 struct be_queue_info *txq = &txo->q;
1516 struct be_eth_tx_compl *txcp;
1517 u16 end_idx, cmpl = 0, timeo = 0, num_wrbs = 0;
1518 struct sk_buff **sent_skbs = txo->sent_skb_list;
1519 struct sk_buff *sent_skb;
1522 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1524 while ((txcp = be_tx_compl_get(tx_cq))) {
1525 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1527 num_wrbs += be_tx_compl_process(adapter, txo, end_idx);
1531 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1532 atomic_sub(num_wrbs, &txq->used);
1537 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1543 if (atomic_read(&txq->used))
1544 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1545 atomic_read(&txq->used));
1547 /* free posted tx for which compls will never arrive */
1548 while (atomic_read(&txq->used)) {
1549 sent_skb = sent_skbs[txq->tail];
1550 end_idx = txq->tail;
1552 wrb_cnt_for_skb(adapter, sent_skb, &dummy_wrb) - 1,
1554 num_wrbs = be_tx_compl_process(adapter, txo, end_idx);
1555 atomic_sub(num_wrbs, &txq->used);
1559 static void be_mcc_queues_destroy(struct be_adapter *adapter)
1561 struct be_queue_info *q;
1563 q = &adapter->mcc_obj.q;
1565 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
1566 be_queue_free(adapter, q);
1568 q = &adapter->mcc_obj.cq;
1570 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1571 be_queue_free(adapter, q);
1574 /* Must be called only after TX qs are created as MCC shares TX EQ */
1575 static int be_mcc_queues_create(struct be_adapter *adapter)
1577 struct be_queue_info *q, *cq;
1579 /* Alloc MCC compl queue */
1580 cq = &adapter->mcc_obj.cq;
1581 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
1582 sizeof(struct be_mcc_compl)))
1585 /* Ask BE to create MCC compl queue; share TX's eq */
1586 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
1589 /* Alloc MCC queue */
1590 q = &adapter->mcc_obj.q;
1591 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1592 goto mcc_cq_destroy;
1594 /* Ask BE to create MCC queue */
1595 if (be_cmd_mccq_create(adapter, q, cq))
1601 be_queue_free(adapter, q);
1603 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1605 be_queue_free(adapter, cq);
1610 static void be_tx_queues_destroy(struct be_adapter *adapter)
1612 struct be_queue_info *q;
1613 struct be_tx_obj *txo;
1616 for_all_tx_queues(adapter, txo, i) {
1619 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
1620 be_queue_free(adapter, q);
1624 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1625 be_queue_free(adapter, q);
1628 /* Clear any residual events */
1629 be_eq_clean(adapter, &adapter->tx_eq);
1631 q = &adapter->tx_eq.q;
1633 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1634 be_queue_free(adapter, q);
1637 /* One TX event queue is shared by all TX compl qs */
1638 static int be_tx_queues_create(struct be_adapter *adapter)
1640 struct be_queue_info *eq, *q, *cq;
1641 struct be_tx_obj *txo;
1644 adapter->tx_eq.max_eqd = 0;
1645 adapter->tx_eq.min_eqd = 0;
1646 adapter->tx_eq.cur_eqd = 96;
1647 adapter->tx_eq.enable_aic = false;
1649 eq = &adapter->tx_eq.q;
1650 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1651 sizeof(struct be_eq_entry)))
1654 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
1656 adapter->tx_eq.eq_idx = adapter->eq_next_idx++;
1658 for_all_tx_queues(adapter, txo, i) {
1660 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1661 sizeof(struct be_eth_tx_compl)))
1664 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
1668 if (be_queue_alloc(adapter, q, TX_Q_LEN,
1669 sizeof(struct be_eth_wrb)))
1672 if (be_cmd_txq_create(adapter, q, cq))
1678 be_tx_queues_destroy(adapter);
1682 static void be_rx_queues_destroy(struct be_adapter *adapter)
1684 struct be_queue_info *q;
1685 struct be_rx_obj *rxo;
1688 for_all_rx_queues(adapter, rxo, i) {
1689 be_queue_free(adapter, &rxo->q);
1693 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1694 be_queue_free(adapter, q);
1698 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1699 be_queue_free(adapter, q);
1703 static u32 be_num_rxqs_want(struct be_adapter *adapter)
1705 if ((adapter->function_caps & BE_FUNCTION_CAPS_RSS) &&
1706 !adapter->sriov_enabled && !(adapter->function_mode & 0x400)) {
1707 return 1 + MAX_RSS_QS; /* one default non-RSS queue */
1709 dev_warn(&adapter->pdev->dev,
1710 "No support for multiple RX queues\n");
1715 static int be_rx_queues_create(struct be_adapter *adapter)
1717 struct be_queue_info *eq, *q, *cq;
1718 struct be_rx_obj *rxo;
1721 adapter->num_rx_qs = min(be_num_rxqs_want(adapter),
1722 msix_enabled(adapter) ?
1723 adapter->num_msix_vec - 1 : 1);
1724 if (adapter->num_rx_qs != MAX_RX_QS)
1725 dev_warn(&adapter->pdev->dev,
1726 "Can create only %d RX queues", adapter->num_rx_qs);
1728 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1729 for_all_rx_queues(adapter, rxo, i) {
1730 rxo->adapter = adapter;
1731 rxo->rx_eq.max_eqd = BE_MAX_EQD;
1732 rxo->rx_eq.enable_aic = true;
1736 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1737 sizeof(struct be_eq_entry));
1741 rc = be_cmd_eq_create(adapter, eq, rxo->rx_eq.cur_eqd);
1745 rxo->rx_eq.eq_idx = adapter->eq_next_idx++;
1749 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1750 sizeof(struct be_eth_rx_compl));
1754 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
1758 /* Rx Q - will be created in be_open() */
1760 rc = be_queue_alloc(adapter, q, RX_Q_LEN,
1761 sizeof(struct be_eth_rx_d));
1769 be_rx_queues_destroy(adapter);
1773 static bool event_peek(struct be_eq_obj *eq_obj)
1775 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1782 static irqreturn_t be_intx(int irq, void *dev)
1784 struct be_adapter *adapter = dev;
1785 struct be_rx_obj *rxo;
1786 int isr, i, tx = 0 , rx = 0;
1788 if (lancer_chip(adapter)) {
1789 if (event_peek(&adapter->tx_eq))
1790 tx = event_handle(adapter, &adapter->tx_eq, false);
1791 for_all_rx_queues(adapter, rxo, i) {
1792 if (event_peek(&rxo->rx_eq))
1793 rx |= event_handle(adapter, &rxo->rx_eq, true);
1800 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
1801 (adapter->tx_eq.q.id / 8) * CEV_ISR_SIZE);
1805 if ((1 << adapter->tx_eq.eq_idx & isr))
1806 event_handle(adapter, &adapter->tx_eq, false);
1808 for_all_rx_queues(adapter, rxo, i) {
1809 if ((1 << rxo->rx_eq.eq_idx & isr))
1810 event_handle(adapter, &rxo->rx_eq, true);
1817 static irqreturn_t be_msix_rx(int irq, void *dev)
1819 struct be_rx_obj *rxo = dev;
1820 struct be_adapter *adapter = rxo->adapter;
1822 event_handle(adapter, &rxo->rx_eq, true);
1827 static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
1829 struct be_adapter *adapter = dev;
1831 event_handle(adapter, &adapter->tx_eq, false);
1836 static inline bool do_gro(struct be_rx_compl_info *rxcp)
1838 return (rxcp->tcpf && !rxcp->err) ? true : false;
1841 static int be_poll_rx(struct napi_struct *napi, int budget)
1843 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1844 struct be_rx_obj *rxo = container_of(rx_eq, struct be_rx_obj, rx_eq);
1845 struct be_adapter *adapter = rxo->adapter;
1846 struct be_queue_info *rx_cq = &rxo->cq;
1847 struct be_rx_compl_info *rxcp;
1850 rx_stats(rxo)->rx_polls++;
1851 for (work_done = 0; work_done < budget; work_done++) {
1852 rxcp = be_rx_compl_get(rxo);
1856 /* Is it a flush compl that has no data */
1857 if (unlikely(rxcp->num_rcvd == 0))
1860 /* Discard compl with partial DMA Lancer B0 */
1861 if (unlikely(!rxcp->pkt_size)) {
1862 be_rx_compl_discard(adapter, rxo, rxcp);
1866 /* On BE drop pkts that arrive due to imperfect filtering in
1867 * promiscuous mode on some skews
1869 if (unlikely(rxcp->port != adapter->port_num &&
1870 !lancer_chip(adapter))) {
1871 be_rx_compl_discard(adapter, rxo, rxcp);
1876 be_rx_compl_process_gro(adapter, rxo, rxcp);
1878 be_rx_compl_process(adapter, rxo, rxcp);
1880 be_rx_stats_update(rxo, rxcp);
1883 /* Refill the queue */
1884 if (work_done && atomic_read(&rxo->q.used) < RX_FRAGS_REFILL_WM)
1885 be_post_rx_frags(rxo, GFP_ATOMIC);
1888 if (work_done < budget) {
1889 napi_complete(napi);
1890 be_cq_notify(adapter, rx_cq->id, true, work_done);
1892 /* More to be consumed; continue with interrupts disabled */
1893 be_cq_notify(adapter, rx_cq->id, false, work_done);
1898 /* As TX and MCC share the same EQ check for both TX and MCC completions.
1899 * For TX/MCC we don't honour budget; consume everything
1901 static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1903 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1904 struct be_adapter *adapter =
1905 container_of(tx_eq, struct be_adapter, tx_eq);
1906 struct be_tx_obj *txo;
1907 struct be_eth_tx_compl *txcp;
1908 int tx_compl, mcc_compl, status = 0;
1912 for_all_tx_queues(adapter, txo, i) {
1915 while ((txcp = be_tx_compl_get(&txo->cq))) {
1916 num_wrbs += be_tx_compl_process(adapter, txo,
1917 AMAP_GET_BITS(struct amap_eth_tx_compl,
1922 be_cq_notify(adapter, txo->cq.id, true, tx_compl);
1924 atomic_sub(num_wrbs, &txo->q.used);
1926 /* As Tx wrbs have been freed up, wake up netdev queue
1927 * if it was stopped due to lack of tx wrbs. */
1928 if (__netif_subqueue_stopped(adapter->netdev, i) &&
1929 atomic_read(&txo->q.used) < txo->q.len / 2) {
1930 netif_wake_subqueue(adapter->netdev, i);
1933 u64_stats_update_begin(&tx_stats(txo)->sync_compl);
1934 tx_stats(txo)->tx_compl += tx_compl;
1935 u64_stats_update_end(&tx_stats(txo)->sync_compl);
1939 mcc_compl = be_process_mcc(adapter, &status);
1942 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
1943 be_cq_notify(adapter, mcc_obj->cq.id, true, mcc_compl);
1946 napi_complete(napi);
1948 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
1949 adapter->drv_stats.tx_events++;
1953 void be_detect_dump_ue(struct be_adapter *adapter)
1955 u32 ue_status_lo, ue_status_hi, ue_status_lo_mask, ue_status_hi_mask;
1958 pci_read_config_dword(adapter->pdev,
1959 PCICFG_UE_STATUS_LOW, &ue_status_lo);
1960 pci_read_config_dword(adapter->pdev,
1961 PCICFG_UE_STATUS_HIGH, &ue_status_hi);
1962 pci_read_config_dword(adapter->pdev,
1963 PCICFG_UE_STATUS_LOW_MASK, &ue_status_lo_mask);
1964 pci_read_config_dword(adapter->pdev,
1965 PCICFG_UE_STATUS_HI_MASK, &ue_status_hi_mask);
1967 ue_status_lo = (ue_status_lo & (~ue_status_lo_mask));
1968 ue_status_hi = (ue_status_hi & (~ue_status_hi_mask));
1970 if (ue_status_lo || ue_status_hi) {
1971 adapter->ue_detected = true;
1972 adapter->eeh_err = true;
1973 dev_err(&adapter->pdev->dev, "UE Detected!!\n");
1977 for (i = 0; ue_status_lo; ue_status_lo >>= 1, i++) {
1978 if (ue_status_lo & 1)
1979 dev_err(&adapter->pdev->dev,
1980 "UE: %s bit set\n", ue_status_low_desc[i]);
1984 for (i = 0; ue_status_hi; ue_status_hi >>= 1, i++) {
1985 if (ue_status_hi & 1)
1986 dev_err(&adapter->pdev->dev,
1987 "UE: %s bit set\n", ue_status_hi_desc[i]);
1993 static void be_worker(struct work_struct *work)
1995 struct be_adapter *adapter =
1996 container_of(work, struct be_adapter, work.work);
1997 struct be_rx_obj *rxo;
2000 if (!adapter->ue_detected && !lancer_chip(adapter))
2001 be_detect_dump_ue(adapter);
2003 /* when interrupts are not yet enabled, just reap any pending
2004 * mcc completions */
2005 if (!netif_running(adapter->netdev)) {
2006 int mcc_compl, status = 0;
2008 mcc_compl = be_process_mcc(adapter, &status);
2011 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
2012 be_cq_notify(adapter, mcc_obj->cq.id, false, mcc_compl);
2018 if (!adapter->stats_cmd_sent) {
2019 if (lancer_chip(adapter))
2020 lancer_cmd_get_pport_stats(adapter,
2021 &adapter->stats_cmd);
2023 be_cmd_get_stats(adapter, &adapter->stats_cmd);
2026 for_all_rx_queues(adapter, rxo, i) {
2027 be_rx_eqd_update(adapter, rxo);
2029 if (rxo->rx_post_starved) {
2030 rxo->rx_post_starved = false;
2031 be_post_rx_frags(rxo, GFP_KERNEL);
2036 adapter->work_counter++;
2037 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
2040 static void be_msix_disable(struct be_adapter *adapter)
2042 if (msix_enabled(adapter)) {
2043 pci_disable_msix(adapter->pdev);
2044 adapter->num_msix_vec = 0;
2048 static void be_msix_enable(struct be_adapter *adapter)
2050 #define BE_MIN_MSIX_VECTORS (1 + 1) /* Rx + Tx */
2051 int i, status, num_vec;
2053 num_vec = be_num_rxqs_want(adapter) + 1;
2055 for (i = 0; i < num_vec; i++)
2056 adapter->msix_entries[i].entry = i;
2058 status = pci_enable_msix(adapter->pdev, adapter->msix_entries, num_vec);
2061 } else if (status >= BE_MIN_MSIX_VECTORS) {
2063 if (pci_enable_msix(adapter->pdev, adapter->msix_entries,
2069 adapter->num_msix_vec = num_vec;
2073 static void be_sriov_enable(struct be_adapter *adapter)
2075 be_check_sriov_fn_type(adapter);
2076 #ifdef CONFIG_PCI_IOV
2077 if (be_physfn(adapter) && num_vfs) {
2081 pos = pci_find_ext_capability(adapter->pdev,
2082 PCI_EXT_CAP_ID_SRIOV);
2083 pci_read_config_word(adapter->pdev,
2084 pos + PCI_SRIOV_TOTAL_VF, &nvfs);
2086 if (num_vfs > nvfs) {
2087 dev_info(&adapter->pdev->dev,
2088 "Device supports %d VFs and not %d\n",
2093 status = pci_enable_sriov(adapter->pdev, num_vfs);
2094 adapter->sriov_enabled = status ? false : true;
2099 static void be_sriov_disable(struct be_adapter *adapter)
2101 #ifdef CONFIG_PCI_IOV
2102 if (adapter->sriov_enabled) {
2103 pci_disable_sriov(adapter->pdev);
2104 adapter->sriov_enabled = false;
2109 static inline int be_msix_vec_get(struct be_adapter *adapter,
2110 struct be_eq_obj *eq_obj)
2112 return adapter->msix_entries[eq_obj->eq_idx].vector;
2115 static int be_request_irq(struct be_adapter *adapter,
2116 struct be_eq_obj *eq_obj,
2117 void *handler, char *desc, void *context)
2119 struct net_device *netdev = adapter->netdev;
2122 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
2123 vec = be_msix_vec_get(adapter, eq_obj);
2124 return request_irq(vec, handler, 0, eq_obj->desc, context);
2127 static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj,
2130 int vec = be_msix_vec_get(adapter, eq_obj);
2131 free_irq(vec, context);
2134 static int be_msix_register(struct be_adapter *adapter)
2136 struct be_rx_obj *rxo;
2140 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx",
2145 for_all_rx_queues(adapter, rxo, i) {
2146 sprintf(qname, "rxq%d", i);
2147 status = be_request_irq(adapter, &rxo->rx_eq, be_msix_rx,
2156 be_free_irq(adapter, &adapter->tx_eq, adapter);
2158 for (i--, rxo = &adapter->rx_obj[i]; i >= 0; i--, rxo--)
2159 be_free_irq(adapter, &rxo->rx_eq, rxo);
2162 dev_warn(&adapter->pdev->dev,
2163 "MSIX Request IRQ failed - err %d\n", status);
2164 be_msix_disable(adapter);
2168 static int be_irq_register(struct be_adapter *adapter)
2170 struct net_device *netdev = adapter->netdev;
2173 if (msix_enabled(adapter)) {
2174 status = be_msix_register(adapter);
2177 /* INTx is not supported for VF */
2178 if (!be_physfn(adapter))
2183 netdev->irq = adapter->pdev->irq;
2184 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
2187 dev_err(&adapter->pdev->dev,
2188 "INTx request IRQ failed - err %d\n", status);
2192 adapter->isr_registered = true;
2196 static void be_irq_unregister(struct be_adapter *adapter)
2198 struct net_device *netdev = adapter->netdev;
2199 struct be_rx_obj *rxo;
2202 if (!adapter->isr_registered)
2206 if (!msix_enabled(adapter)) {
2207 free_irq(netdev->irq, adapter);
2212 be_free_irq(adapter, &adapter->tx_eq, adapter);
2214 for_all_rx_queues(adapter, rxo, i)
2215 be_free_irq(adapter, &rxo->rx_eq, rxo);
2218 adapter->isr_registered = false;
2221 static void be_rx_queues_clear(struct be_adapter *adapter)
2223 struct be_queue_info *q;
2224 struct be_rx_obj *rxo;
2227 for_all_rx_queues(adapter, rxo, i) {
2230 be_cmd_rxq_destroy(adapter, q);
2231 /* After the rxq is invalidated, wait for a grace time
2232 * of 1ms for all dma to end and the flush compl to
2236 be_rx_q_clean(adapter, rxo);
2239 /* Clear any residual events */
2242 be_eq_clean(adapter, &rxo->rx_eq);
2246 static int be_close(struct net_device *netdev)
2248 struct be_adapter *adapter = netdev_priv(netdev);
2249 struct be_rx_obj *rxo;
2250 struct be_tx_obj *txo;
2251 struct be_eq_obj *tx_eq = &adapter->tx_eq;
2254 be_async_mcc_disable(adapter);
2256 if (!lancer_chip(adapter))
2257 be_intr_set(adapter, false);
2259 for_all_rx_queues(adapter, rxo, i)
2260 napi_disable(&rxo->rx_eq.napi);
2262 napi_disable(&tx_eq->napi);
2264 if (lancer_chip(adapter)) {
2265 be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0);
2266 for_all_rx_queues(adapter, rxo, i)
2267 be_cq_notify(adapter, rxo->cq.id, false, 0);
2268 for_all_tx_queues(adapter, txo, i)
2269 be_cq_notify(adapter, txo->cq.id, false, 0);
2272 if (msix_enabled(adapter)) {
2273 vec = be_msix_vec_get(adapter, tx_eq);
2274 synchronize_irq(vec);
2276 for_all_rx_queues(adapter, rxo, i) {
2277 vec = be_msix_vec_get(adapter, &rxo->rx_eq);
2278 synchronize_irq(vec);
2281 synchronize_irq(netdev->irq);
2283 be_irq_unregister(adapter);
2285 /* Wait for all pending tx completions to arrive so that
2286 * all tx skbs are freed.
2288 for_all_tx_queues(adapter, txo, i)
2289 be_tx_compl_clean(adapter, txo);
2291 be_rx_queues_clear(adapter);
2295 static int be_rx_queues_setup(struct be_adapter *adapter)
2297 struct be_rx_obj *rxo;
2299 u8 rsstable[MAX_RSS_QS];
2301 for_all_rx_queues(adapter, rxo, i) {
2302 rc = be_cmd_rxq_create(adapter, &rxo->q, rxo->cq.id,
2303 rx_frag_size, BE_MAX_JUMBO_FRAME_SIZE,
2305 (i > 0) ? 1 : 0/* rss enable */, &rxo->rss_id);
2310 if (be_multi_rxq(adapter)) {
2311 for_all_rss_queues(adapter, rxo, i)
2312 rsstable[i] = rxo->rss_id;
2314 rc = be_cmd_rss_config(adapter, rsstable,
2315 adapter->num_rx_qs - 1);
2320 /* First time posting */
2321 for_all_rx_queues(adapter, rxo, i) {
2322 be_post_rx_frags(rxo, GFP_KERNEL);
2323 napi_enable(&rxo->rx_eq.napi);
2328 static int be_open(struct net_device *netdev)
2330 struct be_adapter *adapter = netdev_priv(netdev);
2331 struct be_eq_obj *tx_eq = &adapter->tx_eq;
2332 struct be_rx_obj *rxo;
2335 status = be_rx_queues_setup(adapter);
2339 napi_enable(&tx_eq->napi);
2341 be_irq_register(adapter);
2343 if (!lancer_chip(adapter))
2344 be_intr_set(adapter, true);
2346 /* The evt queues are created in unarmed state; arm them */
2347 for_all_rx_queues(adapter, rxo, i) {
2348 be_eq_notify(adapter, rxo->rx_eq.q.id, true, false, 0);
2349 be_cq_notify(adapter, rxo->cq.id, true, 0);
2351 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
2353 /* Now that interrupts are on we can process async mcc */
2354 be_async_mcc_enable(adapter);
2356 if (be_physfn(adapter)) {
2357 status = be_vid_config(adapter, false, 0);
2361 status = be_cmd_set_flow_control(adapter,
2362 adapter->tx_fc, adapter->rx_fc);
2369 be_close(adapter->netdev);
2373 static int be_setup_wol(struct be_adapter *adapter, bool enable)
2375 struct be_dma_mem cmd;
2379 memset(mac, 0, ETH_ALEN);
2381 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
2382 cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma,
2386 memset(cmd.va, 0, cmd.size);
2389 status = pci_write_config_dword(adapter->pdev,
2390 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
2392 dev_err(&adapter->pdev->dev,
2393 "Could not enable Wake-on-lan\n");
2394 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va,
2398 status = be_cmd_enable_magic_wol(adapter,
2399 adapter->netdev->dev_addr, &cmd);
2400 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
2401 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
2403 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
2404 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
2405 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
2408 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma);
2413 * Generate a seed MAC address from the PF MAC Address using jhash.
2414 * MAC Address for VFs are assigned incrementally starting from the seed.
2415 * These addresses are programmed in the ASIC by the PF and the VF driver
2416 * queries for the MAC address during its probe.
2418 static inline int be_vf_eth_addr_config(struct be_adapter *adapter)
2424 be_vf_eth_addr_generate(adapter, mac);
2426 for (vf = 0; vf < num_vfs; vf++) {
2427 status = be_cmd_pmac_add(adapter, mac,
2428 adapter->vf_cfg[vf].vf_if_handle,
2429 &adapter->vf_cfg[vf].vf_pmac_id,
2432 dev_err(&adapter->pdev->dev,
2433 "Mac address add failed for VF %d\n", vf);
2435 memcpy(adapter->vf_cfg[vf].vf_mac_addr, mac, ETH_ALEN);
2442 static inline void be_vf_eth_addr_rem(struct be_adapter *adapter)
2446 for (vf = 0; vf < num_vfs; vf++) {
2447 if (adapter->vf_cfg[vf].vf_pmac_id != BE_INVALID_PMAC_ID)
2448 be_cmd_pmac_del(adapter,
2449 adapter->vf_cfg[vf].vf_if_handle,
2450 adapter->vf_cfg[vf].vf_pmac_id, vf + 1);
2454 static int be_setup(struct be_adapter *adapter)
2456 struct net_device *netdev = adapter->netdev;
2457 u32 cap_flags, en_flags, vf = 0;
2461 be_cmd_req_native_mode(adapter);
2463 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED |
2464 BE_IF_FLAGS_BROADCAST |
2465 BE_IF_FLAGS_MULTICAST;
2467 if (be_physfn(adapter)) {
2468 cap_flags |= BE_IF_FLAGS_MCAST_PROMISCUOUS |
2469 BE_IF_FLAGS_PROMISCUOUS |
2470 BE_IF_FLAGS_PASS_L3L4_ERRORS;
2471 en_flags |= BE_IF_FLAGS_PASS_L3L4_ERRORS;
2473 if (adapter->function_caps & BE_FUNCTION_CAPS_RSS) {
2474 cap_flags |= BE_IF_FLAGS_RSS;
2475 en_flags |= BE_IF_FLAGS_RSS;
2479 status = be_cmd_if_create(adapter, cap_flags, en_flags,
2480 netdev->dev_addr, false/* pmac_invalid */,
2481 &adapter->if_handle, &adapter->pmac_id, 0);
2485 if (be_physfn(adapter)) {
2486 if (adapter->sriov_enabled) {
2487 while (vf < num_vfs) {
2488 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED |
2489 BE_IF_FLAGS_BROADCAST;
2490 status = be_cmd_if_create(adapter, cap_flags,
2491 en_flags, mac, true,
2492 &adapter->vf_cfg[vf].vf_if_handle,
2495 dev_err(&adapter->pdev->dev,
2496 "Interface Create failed for VF %d\n",
2500 adapter->vf_cfg[vf].vf_pmac_id =
2506 status = be_cmd_mac_addr_query(adapter, mac,
2507 MAC_ADDRESS_TYPE_NETWORK, false, adapter->if_handle);
2509 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2510 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2514 status = be_tx_queues_create(adapter);
2518 status = be_rx_queues_create(adapter);
2522 /* Allow all priorities by default. A GRP5 evt may modify this */
2523 adapter->vlan_prio_bmap = 0xff;
2525 status = be_mcc_queues_create(adapter);
2529 adapter->link_speed = -1;
2534 be_rx_queues_destroy(adapter);
2536 be_tx_queues_destroy(adapter);
2538 if (be_physfn(adapter) && adapter->sriov_enabled)
2539 for (vf = 0; vf < num_vfs; vf++)
2540 if (adapter->vf_cfg[vf].vf_if_handle)
2541 be_cmd_if_destroy(adapter,
2542 adapter->vf_cfg[vf].vf_if_handle,
2544 be_cmd_if_destroy(adapter, adapter->if_handle, 0);
2549 static int be_clear(struct be_adapter *adapter)
2553 if (be_physfn(adapter) && adapter->sriov_enabled)
2554 be_vf_eth_addr_rem(adapter);
2556 be_mcc_queues_destroy(adapter);
2557 be_rx_queues_destroy(adapter);
2558 be_tx_queues_destroy(adapter);
2559 adapter->eq_next_idx = 0;
2561 if (be_physfn(adapter) && adapter->sriov_enabled)
2562 for (vf = 0; vf < num_vfs; vf++)
2563 if (adapter->vf_cfg[vf].vf_if_handle)
2564 be_cmd_if_destroy(adapter,
2565 adapter->vf_cfg[vf].vf_if_handle,
2568 be_cmd_if_destroy(adapter, adapter->if_handle, 0);
2570 adapter->be3_native = 0;
2572 /* tell fw we're done with firing cmds */
2573 be_cmd_fw_clean(adapter);
2578 #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
2579 static bool be_flash_redboot(struct be_adapter *adapter,
2580 const u8 *p, u32 img_start, int image_size,
2587 crc_offset = hdr_size + img_start + image_size - 4;
2591 status = be_cmd_get_flash_crc(adapter, flashed_crc,
2594 dev_err(&adapter->pdev->dev,
2595 "could not get crc from flash, not flashing redboot\n");
2599 /*update redboot only if crc does not match*/
2600 if (!memcmp(flashed_crc, p, 4))
2606 static bool phy_flashing_required(struct be_adapter *adapter)
2609 struct be_phy_info phy_info;
2611 status = be_cmd_get_phy_info(adapter, &phy_info);
2614 if ((phy_info.phy_type == TN_8022) &&
2615 (phy_info.interface_type == PHY_TYPE_BASET_10GB)) {
2621 static int be_flash_data(struct be_adapter *adapter,
2622 const struct firmware *fw,
2623 struct be_dma_mem *flash_cmd, int num_of_images)
2626 int status = 0, i, filehdr_size = 0;
2627 u32 total_bytes = 0, flash_op;
2629 const u8 *p = fw->data;
2630 struct be_cmd_write_flashrom *req = flash_cmd->va;
2631 const struct flash_comp *pflashcomp;
2634 static const struct flash_comp gen3_flash_types[10] = {
2635 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
2636 FLASH_IMAGE_MAX_SIZE_g3},
2637 { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
2638 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3},
2639 { FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS,
2640 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2641 { FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS,
2642 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2643 { FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS,
2644 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2645 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP,
2646 FLASH_IMAGE_MAX_SIZE_g3},
2647 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,
2648 FLASH_IMAGE_MAX_SIZE_g3},
2649 { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,
2650 FLASH_IMAGE_MAX_SIZE_g3},
2651 { FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW,
2652 FLASH_NCSI_IMAGE_MAX_SIZE_g3},
2653 { FLASH_PHY_FW_START_g3, IMG_TYPE_PHY_FW,
2654 FLASH_PHY_FW_IMAGE_MAX_SIZE_g3}
2656 static const struct flash_comp gen2_flash_types[8] = {
2657 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
2658 FLASH_IMAGE_MAX_SIZE_g2},
2659 { FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,
2660 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2},
2661 { FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS,
2662 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2663 { FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS,
2664 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2665 { FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS,
2666 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2667 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP,
2668 FLASH_IMAGE_MAX_SIZE_g2},
2669 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE,
2670 FLASH_IMAGE_MAX_SIZE_g2},
2671 { FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP,
2672 FLASH_IMAGE_MAX_SIZE_g2}
2675 if (adapter->generation == BE_GEN3) {
2676 pflashcomp = gen3_flash_types;
2677 filehdr_size = sizeof(struct flash_file_hdr_g3);
2678 num_comp = ARRAY_SIZE(gen3_flash_types);
2680 pflashcomp = gen2_flash_types;
2681 filehdr_size = sizeof(struct flash_file_hdr_g2);
2682 num_comp = ARRAY_SIZE(gen2_flash_types);
2684 for (i = 0; i < num_comp; i++) {
2685 if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) &&
2686 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
2688 if (pflashcomp[i].optype == IMG_TYPE_PHY_FW) {
2689 if (!phy_flashing_required(adapter))
2692 if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &&
2693 (!be_flash_redboot(adapter, fw->data,
2694 pflashcomp[i].offset, pflashcomp[i].size, filehdr_size +
2695 (num_of_images * sizeof(struct image_hdr)))))
2698 p += filehdr_size + pflashcomp[i].offset
2699 + (num_of_images * sizeof(struct image_hdr));
2700 if (p + pflashcomp[i].size > fw->data + fw->size)
2702 total_bytes = pflashcomp[i].size;
2703 while (total_bytes) {
2704 if (total_bytes > 32*1024)
2705 num_bytes = 32*1024;
2707 num_bytes = total_bytes;
2708 total_bytes -= num_bytes;
2710 if (pflashcomp[i].optype == IMG_TYPE_PHY_FW)
2711 flash_op = FLASHROM_OPER_PHY_FLASH;
2713 flash_op = FLASHROM_OPER_FLASH;
2715 if (pflashcomp[i].optype == IMG_TYPE_PHY_FW)
2716 flash_op = FLASHROM_OPER_PHY_SAVE;
2718 flash_op = FLASHROM_OPER_SAVE;
2720 memcpy(req->params.data_buf, p, num_bytes);
2722 status = be_cmd_write_flashrom(adapter, flash_cmd,
2723 pflashcomp[i].optype, flash_op, num_bytes);
2725 if ((status == ILLEGAL_IOCTL_REQ) &&
2726 (pflashcomp[i].optype ==
2729 dev_err(&adapter->pdev->dev,
2730 "cmd to write to flash rom failed.\n");
2738 static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr)
2742 if (fhdr->build[0] == '3')
2744 else if (fhdr->build[0] == '2')
2750 static int lancer_fw_download(struct be_adapter *adapter,
2751 const struct firmware *fw)
2753 #define LANCER_FW_DOWNLOAD_CHUNK (32 * 1024)
2754 #define LANCER_FW_DOWNLOAD_LOCATION "/prg"
2755 struct be_dma_mem flash_cmd;
2756 const u8 *data_ptr = NULL;
2757 u8 *dest_image_ptr = NULL;
2758 size_t image_size = 0;
2760 u32 data_written = 0;
2765 if (!IS_ALIGNED(fw->size, sizeof(u32))) {
2766 dev_err(&adapter->pdev->dev,
2767 "FW Image not properly aligned. "
2768 "Length must be 4 byte aligned.\n");
2770 goto lancer_fw_exit;
2773 flash_cmd.size = sizeof(struct lancer_cmd_req_write_object)
2774 + LANCER_FW_DOWNLOAD_CHUNK;
2775 flash_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, flash_cmd.size,
2776 &flash_cmd.dma, GFP_KERNEL);
2777 if (!flash_cmd.va) {
2779 dev_err(&adapter->pdev->dev,
2780 "Memory allocation failure while flashing\n");
2781 goto lancer_fw_exit;
2784 dest_image_ptr = flash_cmd.va +
2785 sizeof(struct lancer_cmd_req_write_object);
2786 image_size = fw->size;
2787 data_ptr = fw->data;
2789 while (image_size) {
2790 chunk_size = min_t(u32, image_size, LANCER_FW_DOWNLOAD_CHUNK);
2792 /* Copy the image chunk content. */
2793 memcpy(dest_image_ptr, data_ptr, chunk_size);
2795 status = lancer_cmd_write_object(adapter, &flash_cmd,
2796 chunk_size, offset, LANCER_FW_DOWNLOAD_LOCATION,
2797 &data_written, &add_status);
2802 offset += data_written;
2803 data_ptr += data_written;
2804 image_size -= data_written;
2808 /* Commit the FW written */
2809 status = lancer_cmd_write_object(adapter, &flash_cmd,
2810 0, offset, LANCER_FW_DOWNLOAD_LOCATION,
2811 &data_written, &add_status);
2814 dma_free_coherent(&adapter->pdev->dev, flash_cmd.size, flash_cmd.va,
2817 dev_err(&adapter->pdev->dev,
2818 "Firmware load error. "
2819 "Status code: 0x%x Additional Status: 0x%x\n",
2820 status, add_status);
2821 goto lancer_fw_exit;
2824 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
2829 static int be_fw_download(struct be_adapter *adapter, const struct firmware* fw)
2831 struct flash_file_hdr_g2 *fhdr;
2832 struct flash_file_hdr_g3 *fhdr3;
2833 struct image_hdr *img_hdr_ptr = NULL;
2834 struct be_dma_mem flash_cmd;
2836 int status = 0, i = 0, num_imgs = 0;
2839 fhdr = (struct flash_file_hdr_g2 *) p;
2841 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
2842 flash_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, flash_cmd.size,
2843 &flash_cmd.dma, GFP_KERNEL);
2844 if (!flash_cmd.va) {
2846 dev_err(&adapter->pdev->dev,
2847 "Memory allocation failure while flashing\n");
2851 if ((adapter->generation == BE_GEN3) &&
2852 (get_ufigen_type(fhdr) == BE_GEN3)) {
2853 fhdr3 = (struct flash_file_hdr_g3 *) fw->data;
2854 num_imgs = le32_to_cpu(fhdr3->num_imgs);
2855 for (i = 0; i < num_imgs; i++) {
2856 img_hdr_ptr = (struct image_hdr *) (fw->data +
2857 (sizeof(struct flash_file_hdr_g3) +
2858 i * sizeof(struct image_hdr)));
2859 if (le32_to_cpu(img_hdr_ptr->imageid) == 1)
2860 status = be_flash_data(adapter, fw, &flash_cmd,
2863 } else if ((adapter->generation == BE_GEN2) &&
2864 (get_ufigen_type(fhdr) == BE_GEN2)) {
2865 status = be_flash_data(adapter, fw, &flash_cmd, 0);
2867 dev_err(&adapter->pdev->dev,
2868 "UFI and Interface are not compatible for flashing\n");
2872 dma_free_coherent(&adapter->pdev->dev, flash_cmd.size, flash_cmd.va,
2875 dev_err(&adapter->pdev->dev, "Firmware load error\n");
2879 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
2885 int be_load_fw(struct be_adapter *adapter, u8 *fw_file)
2887 const struct firmware *fw;
2890 if (!netif_running(adapter->netdev)) {
2891 dev_err(&adapter->pdev->dev,
2892 "Firmware load not allowed (interface is down)\n");
2896 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
2900 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
2902 if (lancer_chip(adapter))
2903 status = lancer_fw_download(adapter, fw);
2905 status = be_fw_download(adapter, fw);
2908 release_firmware(fw);
2912 static struct net_device_ops be_netdev_ops = {
2913 .ndo_open = be_open,
2914 .ndo_stop = be_close,
2915 .ndo_start_xmit = be_xmit,
2916 .ndo_set_rx_mode = be_set_multicast_list,
2917 .ndo_set_mac_address = be_mac_addr_set,
2918 .ndo_change_mtu = be_change_mtu,
2919 .ndo_get_stats64 = be_get_stats64,
2920 .ndo_validate_addr = eth_validate_addr,
2921 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
2922 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
2923 .ndo_set_vf_mac = be_set_vf_mac,
2924 .ndo_set_vf_vlan = be_set_vf_vlan,
2925 .ndo_set_vf_tx_rate = be_set_vf_tx_rate,
2926 .ndo_get_vf_config = be_get_vf_config
2929 static void be_netdev_init(struct net_device *netdev)
2931 struct be_adapter *adapter = netdev_priv(netdev);
2932 struct be_rx_obj *rxo;
2935 netdev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 |
2936 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
2938 if (be_multi_rxq(adapter))
2939 netdev->hw_features |= NETIF_F_RXHASH;
2941 netdev->features |= netdev->hw_features |
2942 NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER;
2944 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 |
2945 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2947 netdev->flags |= IFF_MULTICAST;
2949 /* Default settings for Rx and Tx flow control */
2950 adapter->rx_fc = true;
2951 adapter->tx_fc = true;
2953 netif_set_gso_max_size(netdev, 65535);
2955 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
2957 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
2959 for_all_rx_queues(adapter, rxo, i)
2960 netif_napi_add(netdev, &rxo->rx_eq.napi, be_poll_rx,
2963 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
2967 static void be_unmap_pci_bars(struct be_adapter *adapter)
2970 iounmap(adapter->csr);
2972 iounmap(adapter->db);
2975 static int be_map_pci_bars(struct be_adapter *adapter)
2980 if (lancer_chip(adapter)) {
2981 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 0),
2982 pci_resource_len(adapter->pdev, 0));
2989 if (be_physfn(adapter)) {
2990 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2991 pci_resource_len(adapter->pdev, 2));
2994 adapter->csr = addr;
2997 if (adapter->generation == BE_GEN2) {
3000 if (be_physfn(adapter))
3005 addr = ioremap_nocache(pci_resource_start(adapter->pdev, db_reg),
3006 pci_resource_len(adapter->pdev, db_reg));
3013 be_unmap_pci_bars(adapter);
3018 static void be_ctrl_cleanup(struct be_adapter *adapter)
3020 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
3022 be_unmap_pci_bars(adapter);
3025 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
3028 mem = &adapter->rx_filter;
3030 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
3034 static int be_ctrl_init(struct be_adapter *adapter)
3036 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
3037 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
3038 struct be_dma_mem *rx_filter = &adapter->rx_filter;
3041 status = be_map_pci_bars(adapter);
3045 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
3046 mbox_mem_alloc->va = dma_alloc_coherent(&adapter->pdev->dev,
3047 mbox_mem_alloc->size,
3048 &mbox_mem_alloc->dma,
3050 if (!mbox_mem_alloc->va) {
3052 goto unmap_pci_bars;
3054 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
3055 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
3056 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
3057 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
3059 rx_filter->size = sizeof(struct be_cmd_req_rx_filter);
3060 rx_filter->va = dma_alloc_coherent(&adapter->pdev->dev, rx_filter->size,
3061 &rx_filter->dma, GFP_KERNEL);
3062 if (rx_filter->va == NULL) {
3066 memset(rx_filter->va, 0, rx_filter->size);
3068 mutex_init(&adapter->mbox_lock);
3069 spin_lock_init(&adapter->mcc_lock);
3070 spin_lock_init(&adapter->mcc_cq_lock);
3072 init_completion(&adapter->flash_compl);
3073 pci_save_state(adapter->pdev);
3077 dma_free_coherent(&adapter->pdev->dev, mbox_mem_alloc->size,
3078 mbox_mem_alloc->va, mbox_mem_alloc->dma);
3081 be_unmap_pci_bars(adapter);
3087 static void be_stats_cleanup(struct be_adapter *adapter)
3089 struct be_dma_mem *cmd = &adapter->stats_cmd;
3092 dma_free_coherent(&adapter->pdev->dev, cmd->size,
3096 static int be_stats_init(struct be_adapter *adapter)
3098 struct be_dma_mem *cmd = &adapter->stats_cmd;
3100 if (adapter->generation == BE_GEN2) {
3101 cmd->size = sizeof(struct be_cmd_req_get_stats_v0);
3103 if (lancer_chip(adapter))
3104 cmd->size = sizeof(struct lancer_cmd_req_pport_stats);
3106 cmd->size = sizeof(struct be_cmd_req_get_stats_v1);
3108 cmd->va = dma_alloc_coherent(&adapter->pdev->dev, cmd->size, &cmd->dma,
3110 if (cmd->va == NULL)
3112 memset(cmd->va, 0, cmd->size);
3116 static void __devexit be_remove(struct pci_dev *pdev)
3118 struct be_adapter *adapter = pci_get_drvdata(pdev);
3123 cancel_delayed_work_sync(&adapter->work);
3125 unregister_netdev(adapter->netdev);
3129 be_stats_cleanup(adapter);
3131 be_ctrl_cleanup(adapter);
3133 kfree(adapter->vf_cfg);
3134 be_sriov_disable(adapter);
3136 be_msix_disable(adapter);
3138 pci_set_drvdata(pdev, NULL);
3139 pci_release_regions(pdev);
3140 pci_disable_device(pdev);
3142 free_netdev(adapter->netdev);
3145 static int be_get_config(struct be_adapter *adapter)
3150 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
3154 status = be_cmd_query_fw_cfg(adapter, &adapter->port_num,
3155 &adapter->function_mode, &adapter->function_caps);
3159 memset(mac, 0, ETH_ALEN);
3161 /* A default permanent address is given to each VF for Lancer*/
3162 if (be_physfn(adapter) || lancer_chip(adapter)) {
3163 status = be_cmd_mac_addr_query(adapter, mac,
3164 MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
3169 if (!is_valid_ether_addr(mac))
3170 return -EADDRNOTAVAIL;
3172 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
3173 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
3176 if (adapter->function_mode & 0x400)
3177 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/4;
3179 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED;
3181 status = be_cmd_get_cntl_attributes(adapter);
3185 if ((num_vfs && adapter->sriov_enabled) ||
3186 (adapter->function_mode & 0x400) ||
3187 lancer_chip(adapter) || !be_physfn(adapter)) {
3188 adapter->num_tx_qs = 1;
3189 netif_set_real_num_tx_queues(adapter->netdev,
3190 adapter->num_tx_qs);
3192 adapter->num_tx_qs = MAX_TX_QS;
3198 static int be_dev_family_check(struct be_adapter *adapter)
3200 struct pci_dev *pdev = adapter->pdev;
3201 u32 sli_intf = 0, if_type;
3203 switch (pdev->device) {
3206 adapter->generation = BE_GEN2;
3210 adapter->generation = BE_GEN3;
3214 pci_read_config_dword(pdev, SLI_INTF_REG_OFFSET, &sli_intf);
3215 if_type = (sli_intf & SLI_INTF_IF_TYPE_MASK) >>
3216 SLI_INTF_IF_TYPE_SHIFT;
3218 if (((sli_intf & SLI_INTF_VALID_MASK) != SLI_INTF_VALID) ||
3220 dev_err(&pdev->dev, "SLI_INTF reg val is not valid\n");
3223 adapter->sli_family = ((sli_intf & SLI_INTF_FAMILY_MASK) >>
3224 SLI_INTF_FAMILY_SHIFT);
3225 adapter->generation = BE_GEN3;
3228 adapter->generation = 0;
3233 static int lancer_wait_ready(struct be_adapter *adapter)
3235 #define SLIPORT_READY_TIMEOUT 500
3239 for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) {
3240 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
3241 if (sliport_status & SLIPORT_STATUS_RDY_MASK)
3247 if (i == SLIPORT_READY_TIMEOUT)
3253 static int lancer_test_and_set_rdy_state(struct be_adapter *adapter)
3256 u32 sliport_status, err, reset_needed;
3257 status = lancer_wait_ready(adapter);
3259 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
3260 err = sliport_status & SLIPORT_STATUS_ERR_MASK;
3261 reset_needed = sliport_status & SLIPORT_STATUS_RN_MASK;
3262 if (err && reset_needed) {
3263 iowrite32(SLI_PORT_CONTROL_IP_MASK,
3264 adapter->db + SLIPORT_CONTROL_OFFSET);
3266 /* check adapter has corrected the error */
3267 status = lancer_wait_ready(adapter);
3268 sliport_status = ioread32(adapter->db +
3269 SLIPORT_STATUS_OFFSET);
3270 sliport_status &= (SLIPORT_STATUS_ERR_MASK |
3271 SLIPORT_STATUS_RN_MASK);
3272 if (status || sliport_status)
3274 } else if (err || reset_needed) {
3281 static int __devinit be_probe(struct pci_dev *pdev,
3282 const struct pci_device_id *pdev_id)
3285 struct be_adapter *adapter;
3286 struct net_device *netdev;
3288 status = pci_enable_device(pdev);
3292 status = pci_request_regions(pdev, DRV_NAME);
3295 pci_set_master(pdev);
3297 netdev = alloc_etherdev_mq(sizeof(struct be_adapter), MAX_TX_QS);
3298 if (netdev == NULL) {
3302 adapter = netdev_priv(netdev);
3303 adapter->pdev = pdev;
3304 pci_set_drvdata(pdev, adapter);
3306 status = be_dev_family_check(adapter);
3310 adapter->netdev = netdev;
3311 SET_NETDEV_DEV(netdev, &pdev->dev);
3313 status = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
3315 netdev->features |= NETIF_F_HIGHDMA;
3317 status = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
3319 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
3324 be_sriov_enable(adapter);
3325 if (adapter->sriov_enabled) {
3326 adapter->vf_cfg = kcalloc(num_vfs,
3327 sizeof(struct be_vf_cfg), GFP_KERNEL);
3329 if (!adapter->vf_cfg)
3333 status = be_ctrl_init(adapter);
3337 if (lancer_chip(adapter)) {
3338 status = lancer_test_and_set_rdy_state(adapter);
3340 dev_err(&pdev->dev, "Adapter in non recoverable error\n");
3345 /* sync up with fw's ready state */
3346 if (be_physfn(adapter)) {
3347 status = be_cmd_POST(adapter);
3352 /* tell fw we're ready to fire cmds */
3353 status = be_cmd_fw_init(adapter);
3357 status = be_cmd_reset_function(adapter);
3361 status = be_stats_init(adapter);
3365 status = be_get_config(adapter);
3369 /* The INTR bit may be set in the card when probed by a kdump kernel
3372 if (!lancer_chip(adapter))
3373 be_intr_set(adapter, false);
3375 be_msix_enable(adapter);
3377 INIT_DELAYED_WORK(&adapter->work, be_worker);
3379 status = be_setup(adapter);
3383 be_netdev_init(netdev);
3384 status = register_netdev(netdev);
3388 if (be_physfn(adapter) && adapter->sriov_enabled) {
3392 if (!lancer_chip(adapter)) {
3393 status = be_vf_eth_addr_config(adapter);
3398 for (vf = 0; vf < num_vfs; vf++) {
3399 status = be_cmd_link_status_query(adapter, &mac_speed,
3400 &lnk_speed, vf + 1);
3402 adapter->vf_cfg[vf].vf_tx_rate = lnk_speed * 10;
3408 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
3410 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
3414 unregister_netdev(netdev);
3418 be_msix_disable(adapter);
3420 be_stats_cleanup(adapter);
3422 be_ctrl_cleanup(adapter);
3424 kfree(adapter->vf_cfg);
3426 be_sriov_disable(adapter);
3427 free_netdev(netdev);
3428 pci_set_drvdata(pdev, NULL);
3430 pci_release_regions(pdev);
3432 pci_disable_device(pdev);
3434 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
3438 static int be_suspend(struct pci_dev *pdev, pm_message_t state)
3440 struct be_adapter *adapter = pci_get_drvdata(pdev);
3441 struct net_device *netdev = adapter->netdev;
3443 cancel_delayed_work_sync(&adapter->work);
3445 be_setup_wol(adapter, true);
3447 netif_device_detach(netdev);
3448 if (netif_running(netdev)) {
3453 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
3456 be_msix_disable(adapter);
3457 pci_save_state(pdev);
3458 pci_disable_device(pdev);
3459 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3463 static int be_resume(struct pci_dev *pdev)
3466 struct be_adapter *adapter = pci_get_drvdata(pdev);
3467 struct net_device *netdev = adapter->netdev;
3469 netif_device_detach(netdev);
3471 status = pci_enable_device(pdev);
3475 pci_set_power_state(pdev, 0);
3476 pci_restore_state(pdev);
3478 be_msix_enable(adapter);
3479 /* tell fw we're ready to fire cmds */
3480 status = be_cmd_fw_init(adapter);
3485 if (netif_running(netdev)) {
3490 netif_device_attach(netdev);
3493 be_setup_wol(adapter, false);
3495 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
3500 * An FLR will stop BE from DMAing any data.
3502 static void be_shutdown(struct pci_dev *pdev)
3504 struct be_adapter *adapter = pci_get_drvdata(pdev);
3509 cancel_delayed_work_sync(&adapter->work);
3511 netif_device_detach(adapter->netdev);
3514 be_setup_wol(adapter, true);
3516 be_cmd_reset_function(adapter);
3518 pci_disable_device(pdev);
3521 static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
3522 pci_channel_state_t state)
3524 struct be_adapter *adapter = pci_get_drvdata(pdev);
3525 struct net_device *netdev = adapter->netdev;
3527 dev_err(&adapter->pdev->dev, "EEH error detected\n");
3529 adapter->eeh_err = true;
3531 netif_device_detach(netdev);
3533 if (netif_running(netdev)) {
3540 if (state == pci_channel_io_perm_failure)
3541 return PCI_ERS_RESULT_DISCONNECT;
3543 pci_disable_device(pdev);
3545 return PCI_ERS_RESULT_NEED_RESET;
3548 static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
3550 struct be_adapter *adapter = pci_get_drvdata(pdev);
3553 dev_info(&adapter->pdev->dev, "EEH reset\n");
3554 adapter->eeh_err = false;
3556 status = pci_enable_device(pdev);
3558 return PCI_ERS_RESULT_DISCONNECT;
3560 pci_set_master(pdev);
3561 pci_set_power_state(pdev, 0);
3562 pci_restore_state(pdev);
3564 /* Check if card is ok and fw is ready */
3565 status = be_cmd_POST(adapter);
3567 return PCI_ERS_RESULT_DISCONNECT;
3569 return PCI_ERS_RESULT_RECOVERED;
3572 static void be_eeh_resume(struct pci_dev *pdev)
3575 struct be_adapter *adapter = pci_get_drvdata(pdev);
3576 struct net_device *netdev = adapter->netdev;
3578 dev_info(&adapter->pdev->dev, "EEH resume\n");
3580 pci_save_state(pdev);
3582 /* tell fw we're ready to fire cmds */
3583 status = be_cmd_fw_init(adapter);
3587 status = be_setup(adapter);
3591 if (netif_running(netdev)) {
3592 status = be_open(netdev);
3596 netif_device_attach(netdev);
3599 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
3602 static struct pci_error_handlers be_eeh_handlers = {
3603 .error_detected = be_eeh_err_detected,
3604 .slot_reset = be_eeh_reset,
3605 .resume = be_eeh_resume,
3608 static struct pci_driver be_driver = {
3610 .id_table = be_dev_ids,
3612 .remove = be_remove,
3613 .suspend = be_suspend,
3614 .resume = be_resume,
3615 .shutdown = be_shutdown,
3616 .err_handler = &be_eeh_handlers
3619 static int __init be_init_module(void)
3621 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
3622 rx_frag_size != 2048) {
3623 printk(KERN_WARNING DRV_NAME
3624 " : Module param rx_frag_size must be 2048/4096/8192."
3626 rx_frag_size = 2048;
3629 return pci_register_driver(&be_driver);
3631 module_init(be_init_module);
3633 static void __exit be_exit_module(void)
3635 pci_unregister_driver(&be_driver);
3637 module_exit(be_exit_module);