1 /* bnx2x_sp.h: Broadcom Everest network driver.
3 * Copyright (c) 2011-2012 Broadcom Corporation
5 * Unless you and Broadcom execute a separate written software license
6 * agreement governing use of this software, this software is licensed to you
7 * under the terms of the GNU General Public License version 2, available
8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
10 * Notwithstanding the above, under no circumstances may you combine this
11 * software in any way with any other Broadcom software provided under a
12 * license other than the GPL, without Broadcom's express prior written
15 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
16 * Written by: Vladislav Zolotarov
19 #ifndef BNX2X_SP_VERBS
20 #define BNX2X_SP_VERBS
25 /* Bits representing general command's configuration */
29 /* Wait until all pending commands complete */
31 /* Don't send a ramrod, only update a registry */
33 /* Configure HW according to the current object state */
35 /* Execute the next command now */
38 * Don't add a new command and continue execution of posponed
39 * commands. If not set a new command will be added to the
40 * pending commands list.
51 /* Filtering states */
53 BNX2X_FILTER_MAC_PENDING,
54 BNX2X_FILTER_VLAN_PENDING,
55 BNX2X_FILTER_VLAN_MAC_PENDING,
56 BNX2X_FILTER_RX_MODE_PENDING,
57 BNX2X_FILTER_RX_MODE_SCHED,
58 BNX2X_FILTER_ISCSI_ETH_START_SCHED,
59 BNX2X_FILTER_ISCSI_ETH_STOP_SCHED,
60 BNX2X_FILTER_FCOE_ETH_START_SCHED,
61 BNX2X_FILTER_FCOE_ETH_STOP_SCHED,
62 BNX2X_FILTER_MCAST_PENDING,
63 BNX2X_FILTER_MCAST_SCHED,
64 BNX2X_FILTER_RSS_CONF_PENDING,
65 BNX2X_AFEX_FCOE_Q_UPDATE_PENDING,
66 BNX2X_AFEX_PENDING_VIFSET_MCP_ACK
69 struct bnx2x_raw_obj {
76 /* Ramrod data buffer params */
78 dma_addr_t rdata_mapping;
80 /* Ramrod state params */
81 int state; /* "ramrod is pending" state bit */
82 unsigned long *pstate; /* pointer to state buffer */
84 bnx2x_obj_type obj_type;
86 int (*wait_comp)(struct bnx2x *bp,
87 struct bnx2x_raw_obj *o);
89 bool (*check_pending)(struct bnx2x_raw_obj *o);
90 void (*clear_pending)(struct bnx2x_raw_obj *o);
91 void (*set_pending)(struct bnx2x_raw_obj *o);
94 /************************* VLAN-MAC commands related parameters ***************/
95 struct bnx2x_mac_ramrod_data {
99 struct bnx2x_vlan_ramrod_data {
103 struct bnx2x_vlan_mac_ramrod_data {
108 union bnx2x_classification_ramrod_data {
109 struct bnx2x_mac_ramrod_data mac;
110 struct bnx2x_vlan_ramrod_data vlan;
111 struct bnx2x_vlan_mac_ramrod_data vlan_mac;
114 /* VLAN_MAC commands */
115 enum bnx2x_vlan_mac_cmd {
121 struct bnx2x_vlan_mac_data {
122 /* Requested command: BNX2X_VLAN_MAC_XX */
123 enum bnx2x_vlan_mac_cmd cmd;
125 * used to contain the data related vlan_mac_flags bits from
128 unsigned long vlan_mac_flags;
130 /* Needed for MOVE command */
131 struct bnx2x_vlan_mac_obj *target_obj;
133 union bnx2x_classification_ramrod_data u;
136 /*************************** Exe Queue obj ************************************/
137 union bnx2x_exe_queue_cmd_data {
138 struct bnx2x_vlan_mac_data vlan_mac;
145 struct bnx2x_exeq_elem {
146 struct list_head link;
148 /* Length of this element in the exe_chunk. */
151 union bnx2x_exe_queue_cmd_data cmd_data;
154 union bnx2x_qable_obj;
156 union bnx2x_exeq_comp_elem {
157 union event_ring_elem *elem;
160 struct bnx2x_exe_queue_obj;
162 typedef int (*exe_q_validate)(struct bnx2x *bp,
163 union bnx2x_qable_obj *o,
164 struct bnx2x_exeq_elem *elem);
166 typedef int (*exe_q_remove)(struct bnx2x *bp,
167 union bnx2x_qable_obj *o,
168 struct bnx2x_exeq_elem *elem);
171 * @return positive is entry was optimized, 0 - if not, negative
172 * in case of an error.
174 typedef int (*exe_q_optimize)(struct bnx2x *bp,
175 union bnx2x_qable_obj *o,
176 struct bnx2x_exeq_elem *elem);
177 typedef int (*exe_q_execute)(struct bnx2x *bp,
178 union bnx2x_qable_obj *o,
179 struct list_head *exe_chunk,
180 unsigned long *ramrod_flags);
181 typedef struct bnx2x_exeq_elem *
182 (*exe_q_get)(struct bnx2x_exe_queue_obj *o,
183 struct bnx2x_exeq_elem *elem);
185 struct bnx2x_exe_queue_obj {
187 * Commands pending for an execution.
189 struct list_head exe_queue;
192 * Commands pending for an completion.
194 struct list_head pending_comp;
198 /* Maximum length of commands' list for one execution */
201 union bnx2x_qable_obj *owner;
203 /****** Virtual functions ******/
205 * Called before commands execution for commands that are really
206 * going to be executed (after 'optimize').
208 * Must run under exe_queue->lock
210 exe_q_validate validate;
213 * Called before removing pending commands, cleaning allocated
214 * resources (e.g., credits from validate)
219 * This will try to cancel the current pending commands list
220 * considering the new command.
222 * Returns the number of optimized commands or a negative error code
224 * Must run under exe_queue->lock
226 exe_q_optimize optimize;
229 * Run the next commands chunk (owner specific).
231 exe_q_execute execute;
234 * Return the exe_queue element containing the specific command
235 * if any. Otherwise return NULL.
239 /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/
241 * Element in the VLAN_MAC registry list having all currenty configured
244 struct bnx2x_vlan_mac_registry_elem {
245 struct list_head link;
248 * Used to store the cam offset used for the mac/vlan/vlan-mac.
249 * Relevant for 57710 and 57711 only. VLANs and MACs share the
250 * same CAM for these chips.
254 /* Needed for DEL and RESTORE flows */
255 unsigned long vlan_mac_flags;
257 union bnx2x_classification_ramrod_data u;
260 /* Bits representing VLAN_MAC commands specific flags */
266 BNX2X_DONT_CONSUME_CAM_CREDIT,
267 BNX2X_DONT_CONSUME_CAM_CREDIT_DEST,
270 struct bnx2x_vlan_mac_ramrod_params {
271 /* Object to run the command from */
272 struct bnx2x_vlan_mac_obj *vlan_mac_obj;
274 /* General command flags: COMP_WAIT, etc. */
275 unsigned long ramrod_flags;
277 /* Command specific configuration request */
278 struct bnx2x_vlan_mac_data user_req;
281 struct bnx2x_vlan_mac_obj {
282 struct bnx2x_raw_obj raw;
284 /* Bookkeeping list: will prevent the addition of already existing
287 struct list_head head;
289 /* TODO: Add it's initialization in the init functions */
290 struct bnx2x_exe_queue_obj exe_queue;
292 /* MACs credit pool */
293 struct bnx2x_credit_pool_obj *macs_pool;
295 /* VLANs credit pool */
296 struct bnx2x_credit_pool_obj *vlans_pool;
298 /* RAMROD command to be used */
301 /* copy first n elements onto preallocated buffer
303 * @param n number of elements to get
304 * @param buf buffer preallocated by caller into which elements
305 * will be copied. Note elements are 4-byte aligned
306 * so buffer size must be able to accomodate the
309 * @return number of copied bytes
311 int (*get_n_elements)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o,
315 * Checks if ADD-ramrod with the given params may be performed.
317 * @return zero if the element may be added
320 int (*check_add)(struct bnx2x *bp,
321 struct bnx2x_vlan_mac_obj *o,
322 union bnx2x_classification_ramrod_data *data);
325 * Checks if DEL-ramrod with the given params may be performed.
327 * @return true if the element may be deleted
329 struct bnx2x_vlan_mac_registry_elem *
330 (*check_del)(struct bnx2x *bp,
331 struct bnx2x_vlan_mac_obj *o,
332 union bnx2x_classification_ramrod_data *data);
335 * Checks if DEL-ramrod with the given params may be performed.
337 * @return true if the element may be deleted
339 bool (*check_move)(struct bnx2x *bp,
340 struct bnx2x_vlan_mac_obj *src_o,
341 struct bnx2x_vlan_mac_obj *dst_o,
342 union bnx2x_classification_ramrod_data *data);
345 * Update the relevant credit object(s) (consume/return
348 bool (*get_credit)(struct bnx2x_vlan_mac_obj *o);
349 bool (*put_credit)(struct bnx2x_vlan_mac_obj *o);
350 bool (*get_cam_offset)(struct bnx2x_vlan_mac_obj *o, int *offset);
351 bool (*put_cam_offset)(struct bnx2x_vlan_mac_obj *o, int offset);
354 * Configures one rule in the ramrod data buffer.
356 void (*set_one_rule)(struct bnx2x *bp,
357 struct bnx2x_vlan_mac_obj *o,
358 struct bnx2x_exeq_elem *elem, int rule_idx,
362 * Delete all configured elements having the given
363 * vlan_mac_flags specification. Assumes no pending for
364 * execution commands. Will schedule all all currently
365 * configured MACs/VLANs/VLAN-MACs matching the vlan_mac_flags
366 * specification for deletion and will use the given
367 * ramrod_flags for the last DEL operation.
371 * @param ramrod_flags RAMROD_XX flags
373 * @return 0 if the last operation has completed successfully
374 * and there are no more elements left, positive value
375 * if there are pending for completion commands,
376 * negative value in case of failure.
378 int (*delete_all)(struct bnx2x *bp,
379 struct bnx2x_vlan_mac_obj *o,
380 unsigned long *vlan_mac_flags,
381 unsigned long *ramrod_flags);
384 * Reconfigures the next MAC/VLAN/VLAN-MAC element from the previously
385 * configured elements list.
388 * @param p Command parameters (RAMROD_COMP_WAIT bit in
389 * ramrod_flags is only taken into an account)
390 * @param ppos a pointer to the cooky that should be given back in the
391 * next call to make function handle the next element. If
392 * *ppos is set to NULL it will restart the iterator.
393 * If returned *ppos == NULL this means that the last
394 * element has been handled.
398 int (*restore)(struct bnx2x *bp,
399 struct bnx2x_vlan_mac_ramrod_params *p,
400 struct bnx2x_vlan_mac_registry_elem **ppos);
403 * Should be called on a completion arival.
407 * @param cqe Completion element we are handling
408 * @param ramrod_flags if RAMROD_CONT is set the next bulk of
409 * pending commands will be executed.
410 * RAMROD_DRV_CLR_ONLY and RAMROD_RESTORE
411 * may also be set if needed.
413 * @return 0 if there are neither pending nor waiting for
414 * completion commands. Positive value if there are
415 * pending for execution or for completion commands.
416 * Negative value in case of an error (including an
419 int (*complete)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o,
420 union event_ring_elem *cqe,
421 unsigned long *ramrod_flags);
424 * Wait for completion of all commands. Don't schedule new ones,
425 * just wait. It assumes that the completion code will schedule
428 int (*wait)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o);
432 BNX2X_LLH_CAM_ISCSI_ETH_LINE = 0,
433 BNX2X_LLH_CAM_ETH_LINE,
434 BNX2X_LLH_CAM_MAX_PF_LINE = NIG_REG_LLH1_FUNC_MEM_SIZE / 2
437 void bnx2x_set_mac_in_nig(struct bnx2x *bp,
438 bool add, unsigned char *dev_addr, int index);
440 /** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */
442 /* RX_MODE ramrod spesial flags: set in rx_mode_flags field in
443 * a bnx2x_rx_mode_ramrod_params.
446 BNX2X_RX_MODE_FCOE_ETH,
447 BNX2X_RX_MODE_ISCSI_ETH,
451 BNX2X_ACCEPT_UNICAST,
452 BNX2X_ACCEPT_MULTICAST,
453 BNX2X_ACCEPT_ALL_UNICAST,
454 BNX2X_ACCEPT_ALL_MULTICAST,
455 BNX2X_ACCEPT_BROADCAST,
456 BNX2X_ACCEPT_UNMATCHED,
457 BNX2X_ACCEPT_ANY_VLAN
460 struct bnx2x_rx_mode_ramrod_params {
461 struct bnx2x_rx_mode_obj *rx_mode_obj;
462 unsigned long *pstate;
467 unsigned long ramrod_flags;
468 unsigned long rx_mode_flags;
471 * rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to
472 * a tstorm_eth_mac_filter_config (e1x).
475 dma_addr_t rdata_mapping;
477 /* Rx mode settings */
478 unsigned long rx_accept_flags;
480 /* internal switching settings */
481 unsigned long tx_accept_flags;
484 struct bnx2x_rx_mode_obj {
485 int (*config_rx_mode)(struct bnx2x *bp,
486 struct bnx2x_rx_mode_ramrod_params *p);
488 int (*wait_comp)(struct bnx2x *bp,
489 struct bnx2x_rx_mode_ramrod_params *p);
492 /********************** Set multicast group ***********************************/
494 struct bnx2x_mcast_list_elem {
495 struct list_head link;
499 union bnx2x_mcast_config_data {
501 u8 bin; /* used in a RESTORE flow */
504 struct bnx2x_mcast_ramrod_params {
505 struct bnx2x_mcast_obj *mcast_obj;
507 /* Relevant options are RAMROD_COMP_WAIT and RAMROD_DRV_CLR_ONLY */
508 unsigned long ramrod_flags;
510 struct list_head mcast_list; /* list of struct bnx2x_mcast_list_elem */
512 * - rename it to macs_num.
513 * - Add a new command type for handling pending commands
514 * (remove "zero semantics").
516 * Length of mcast_list. If zero and ADD_CONT command - post
524 BNX2X_MCAST_CMD_CONT,
526 BNX2X_MCAST_CMD_RESTORE,
529 struct bnx2x_mcast_obj {
530 struct bnx2x_raw_obj raw;
534 #define BNX2X_MCAST_BINS_NUM 256
535 #define BNX2X_MCAST_VEC_SZ (BNX2X_MCAST_BINS_NUM / 64)
536 u64 vec[BNX2X_MCAST_VEC_SZ];
538 /** Number of BINs to clear. Should be updated
539 * immediately when a command arrives in order to
540 * properly create DEL commands.
546 struct list_head macs;
551 /* Pending commands */
552 struct list_head pending_cmds_head;
554 /* A state that is set in raw.pstate, when there are pending commands */
557 /* Maximal number of mcast MACs configured in one command */
560 /* Total number of currently pending MACs to configure: both
561 * in the pending commands list and in the current command.
563 int total_pending_num;
568 * @param cmd command to execute (BNX2X_MCAST_CMD_X, see above)
570 int (*config_mcast)(struct bnx2x *bp,
571 struct bnx2x_mcast_ramrod_params *p, int cmd);
574 * Fills the ramrod data during the RESTORE flow.
578 * @param start_idx Registry index to start from
579 * @param rdata_idx Index in the ramrod data to start from
581 * @return -1 if we handled the whole registry or index of the last
582 * handled registry element.
584 int (*hdl_restore)(struct bnx2x *bp, struct bnx2x_mcast_obj *o,
585 int start_bin, int *rdata_idx);
587 int (*enqueue_cmd)(struct bnx2x *bp, struct bnx2x_mcast_obj *o,
588 struct bnx2x_mcast_ramrod_params *p, int cmd);
590 void (*set_one_rule)(struct bnx2x *bp,
591 struct bnx2x_mcast_obj *o, int idx,
592 union bnx2x_mcast_config_data *cfg_data, int cmd);
594 /** Checks if there are more mcast MACs to be set or a previous
595 * command is still pending.
597 bool (*check_pending)(struct bnx2x_mcast_obj *o);
600 * Set/Clear/Check SCHEDULED state of the object
602 void (*set_sched)(struct bnx2x_mcast_obj *o);
603 void (*clear_sched)(struct bnx2x_mcast_obj *o);
604 bool (*check_sched)(struct bnx2x_mcast_obj *o);
606 /* Wait until all pending commands complete */
607 int (*wait_comp)(struct bnx2x *bp, struct bnx2x_mcast_obj *o);
610 * Handle the internal object counters needed for proper
611 * commands handling. Checks that the provided parameters are
614 int (*validate)(struct bnx2x *bp,
615 struct bnx2x_mcast_ramrod_params *p, int cmd);
618 * Restore the values of internal counters in case of a failure.
620 void (*revert)(struct bnx2x *bp,
621 struct bnx2x_mcast_ramrod_params *p,
624 int (*get_registry_size)(struct bnx2x_mcast_obj *o);
625 void (*set_registry_size)(struct bnx2x_mcast_obj *o, int n);
628 /*************************** Credit handling **********************************/
629 struct bnx2x_credit_pool_obj {
631 /* Current amount of credit in the pool */
634 /* Maximum allowed credit. put() will check against it. */
638 * Allocate a pool table statically.
640 * Currently the mamimum allowed size is MAX_MAC_CREDIT_E2(272)
642 * The set bit in the table will mean that the entry is available.
644 #define BNX2X_POOL_VEC_SIZE (MAX_MAC_CREDIT_E2 / 64)
645 u64 pool_mirror[BNX2X_POOL_VEC_SIZE];
647 /* Base pool offset (initialized differently */
648 int base_pool_offset;
651 * Get the next free pool entry.
653 * @return true if there was a free entry in the pool
655 bool (*get_entry)(struct bnx2x_credit_pool_obj *o, int *entry);
658 * Return the entry back to the pool.
660 * @return true if entry is legal and has been successfully
661 * returned to the pool.
663 bool (*put_entry)(struct bnx2x_credit_pool_obj *o, int entry);
666 * Get the requested amount of credit from the pool.
668 * @param cnt Amount of requested credit
669 * @return true if the operation is successful
671 bool (*get)(struct bnx2x_credit_pool_obj *o, int cnt);
674 * Returns the credit to the pool.
676 * @param cnt Amount of credit to return
677 * @return true if the operation is successful
679 bool (*put)(struct bnx2x_credit_pool_obj *o, int cnt);
682 * Reads the current amount of credit.
684 int (*check)(struct bnx2x_credit_pool_obj *o);
687 /*************************** RSS configuration ********************************/
689 /* RSS_MODE bits are mutually exclusive */
690 BNX2X_RSS_MODE_DISABLED,
691 BNX2X_RSS_MODE_REGULAR,
693 BNX2X_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */
701 struct bnx2x_config_rss_params {
702 struct bnx2x_rss_config_obj *rss_obj;
704 /* may have RAMROD_COMP_WAIT set only */
705 unsigned long ramrod_flags;
707 /* BNX2X_RSS_X bits */
708 unsigned long rss_flags;
710 /* Number hash bits to take into an account */
713 /* Indirection table */
714 u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
716 /* RSS hash values */
719 /* valid only iff BNX2X_RSS_UPDATE_TOE is set */
723 struct bnx2x_rss_config_obj {
724 struct bnx2x_raw_obj raw;
726 /* RSS engine to use */
729 /* Last configured indirection table */
730 u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
732 int (*config_rss)(struct bnx2x *bp,
733 struct bnx2x_config_rss_params *p);
736 /*********************** Queue state update ***********************************/
738 /* UPDATE command options */
740 BNX2X_Q_UPDATE_IN_VLAN_REM,
741 BNX2X_Q_UPDATE_IN_VLAN_REM_CHNG,
742 BNX2X_Q_UPDATE_OUT_VLAN_REM,
743 BNX2X_Q_UPDATE_OUT_VLAN_REM_CHNG,
744 BNX2X_Q_UPDATE_ANTI_SPOOF,
745 BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG,
746 BNX2X_Q_UPDATE_ACTIVATE,
747 BNX2X_Q_UPDATE_ACTIVATE_CHNG,
748 BNX2X_Q_UPDATE_DEF_VLAN_EN,
749 BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
750 BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
751 BNX2X_Q_UPDATE_SILENT_VLAN_REM
754 /* Allowed Queue states */
757 BNX2X_Q_STATE_INITIALIZED,
758 BNX2X_Q_STATE_ACTIVE,
759 BNX2X_Q_STATE_MULTI_COS,
760 BNX2X_Q_STATE_MCOS_TERMINATED,
761 BNX2X_Q_STATE_INACTIVE,
762 BNX2X_Q_STATE_STOPPED,
763 BNX2X_Q_STATE_TERMINATED,
768 /* Allowed commands */
769 enum bnx2x_queue_cmd {
772 BNX2X_Q_CMD_SETUP_TX_ONLY,
773 BNX2X_Q_CMD_DEACTIVATE,
774 BNX2X_Q_CMD_ACTIVATE,
776 BNX2X_Q_CMD_UPDATE_TPA,
779 BNX2X_Q_CMD_TERMINATE,
784 /* queue SETUP + INIT flags */
787 BNX2X_Q_FLG_TPA_IPV6,
790 BNX2X_Q_FLG_ZERO_STATS,
799 BNX2X_Q_FLG_LEADING_RSS,
801 BNX2X_Q_FLG_DEF_VLAN,
802 BNX2X_Q_FLG_TX_SWITCH,
804 BNX2X_Q_FLG_ANTI_SPOOF,
805 BNX2X_Q_FLG_SILENT_VLAN_REM,
806 BNX2X_Q_FLG_FORCE_DEFAULT_PRI
809 /* Queue type options: queue type may be a compination of below. */
811 /** TODO: Consider moving both these flags into the init()
818 #define BNX2X_PRIMARY_CID_INDEX 0
819 #define BNX2X_MULTI_TX_COS_E1X 3 /* QM only */
820 #define BNX2X_MULTI_TX_COS_E2_E3A0 2
821 #define BNX2X_MULTI_TX_COS_E3B0 3
822 #define BNX2X_MULTI_TX_COS 3 /* Maximum possible */
825 struct bnx2x_queue_init_params {
840 /* CID context in the host memory */
841 struct eth_context *cxts[BNX2X_MULTI_TX_COS];
843 /* maximum number of cos supported by hardware */
847 struct bnx2x_queue_terminate_params {
848 /* index within the tx_only cids of this queue object */
852 struct bnx2x_queue_cfc_del_params {
853 /* index within the tx_only cids of this queue object */
857 struct bnx2x_queue_update_params {
858 unsigned long update_flags; /* BNX2X_Q_UPDATE_XX bits */
860 u16 silent_removal_value;
861 u16 silent_removal_mask;
862 /* index within the tx_only cids of this queue object */
866 struct rxq_pause_params {
871 u16 sge_th_lo; /* valid iff BNX2X_Q_FLG_TPA */
872 u16 sge_th_hi; /* valid iff BNX2X_Q_FLG_TPA */
877 struct bnx2x_general_setup_params {
878 /* valid iff BNX2X_Q_FLG_STATS */
886 struct bnx2x_rxq_setup_params {
891 dma_addr_t rcq_np_map;
898 /* valid iff BNX2X_Q_FLG_TPA */
905 /* valid iff BNX2X_Q_FLG_MCAST */
912 /* valid iff BXN2X_Q_FLG_SILENT_VLAN_REM */
913 u16 silent_removal_value;
914 u16 silent_removal_mask;
917 struct bnx2x_txq_setup_params {
923 u8 cos; /* valid iff BNX2X_Q_FLG_COS */
925 /* equals to the leading rss client id, used for TX classification*/
926 u8 tss_leading_cl_id;
928 /* valid iff BNX2X_Q_FLG_DEF_VLAN */
932 struct bnx2x_queue_setup_params {
933 struct bnx2x_general_setup_params gen_params;
934 struct bnx2x_txq_setup_params txq_params;
935 struct bnx2x_rxq_setup_params rxq_params;
936 struct rxq_pause_params pause_params;
940 struct bnx2x_queue_setup_tx_only_params {
941 struct bnx2x_general_setup_params gen_params;
942 struct bnx2x_txq_setup_params txq_params;
944 /* index within the tx_only cids of this queue object */
948 struct bnx2x_queue_state_params {
949 struct bnx2x_queue_sp_obj *q_obj;
951 /* Current command */
952 enum bnx2x_queue_cmd cmd;
954 /* may have RAMROD_COMP_WAIT set only */
955 unsigned long ramrod_flags;
957 /* Params according to the current command */
959 struct bnx2x_queue_update_params update;
960 struct bnx2x_queue_setup_params setup;
961 struct bnx2x_queue_init_params init;
962 struct bnx2x_queue_setup_tx_only_params tx_only;
963 struct bnx2x_queue_terminate_params terminate;
964 struct bnx2x_queue_cfc_del_params cfc_del;
968 struct bnx2x_viflist_params {
973 struct bnx2x_queue_sp_obj {
974 u32 cids[BNX2X_MULTI_TX_COS];
979 * number of traffic classes supported by queue.
980 * The primary connection of the queue suppotrs the first traffic
981 * class. Any further traffic class is suppoted by a tx-only
984 * Therefore max_cos is also a number of valid entries in the cids
988 u8 num_tx_only, next_tx_only;
990 enum bnx2x_q_state state, next_state;
992 /* bits from enum bnx2x_q_type */
995 /* BNX2X_Q_CMD_XX bits. This object implements "one
996 * pending" paradigm but for debug and tracing purposes it's
997 * more convinient to have different bits for different
1000 unsigned long pending;
1002 /* Buffer to use as a ramrod data and its mapping */
1004 dma_addr_t rdata_mapping;
1007 * Performs one state change according to the given parameters.
1009 * @return 0 in case of success and negative value otherwise.
1011 int (*send_cmd)(struct bnx2x *bp,
1012 struct bnx2x_queue_state_params *params);
1015 * Sets the pending bit according to the requested transition.
1017 int (*set_pending)(struct bnx2x_queue_sp_obj *o,
1018 struct bnx2x_queue_state_params *params);
1021 * Checks that the requested state transition is legal.
1023 int (*check_transition)(struct bnx2x *bp,
1024 struct bnx2x_queue_sp_obj *o,
1025 struct bnx2x_queue_state_params *params);
1028 * Completes the pending command.
1030 int (*complete_cmd)(struct bnx2x *bp,
1031 struct bnx2x_queue_sp_obj *o,
1032 enum bnx2x_queue_cmd);
1034 int (*wait_comp)(struct bnx2x *bp,
1035 struct bnx2x_queue_sp_obj *o,
1036 enum bnx2x_queue_cmd cmd);
1039 /********************** Function state update *********************************/
1040 /* Allowed Function states */
1041 enum bnx2x_func_state {
1042 BNX2X_F_STATE_RESET,
1043 BNX2X_F_STATE_INITIALIZED,
1044 BNX2X_F_STATE_STARTED,
1045 BNX2X_F_STATE_TX_STOPPED,
1049 /* Allowed Function commands */
1050 enum bnx2x_func_cmd {
1051 BNX2X_F_CMD_HW_INIT,
1054 BNX2X_F_CMD_HW_RESET,
1055 BNX2X_F_CMD_AFEX_UPDATE,
1056 BNX2X_F_CMD_AFEX_VIFLISTS,
1057 BNX2X_F_CMD_TX_STOP,
1058 BNX2X_F_CMD_TX_START,
1062 struct bnx2x_func_hw_init_params {
1063 /* A load phase returned by MCP.
1066 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1067 * FW_MSG_CODE_DRV_LOAD_COMMON
1068 * FW_MSG_CODE_DRV_LOAD_PORT
1069 * FW_MSG_CODE_DRV_LOAD_FUNCTION
1074 struct bnx2x_func_hw_reset_params {
1075 /* A load phase returned by MCP.
1078 * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1079 * FW_MSG_CODE_DRV_LOAD_COMMON
1080 * FW_MSG_CODE_DRV_LOAD_PORT
1081 * FW_MSG_CODE_DRV_LOAD_FUNCTION
1086 struct bnx2x_func_start_params {
1087 /* Multi Function mode:
1089 * - Switch Dependent
1090 * - Switch Independent
1094 /* Switch Dependent mode outer VLAN tag */
1097 /* Function cos mode */
1098 u8 network_cos_mode;
1101 struct bnx2x_func_afex_update_params {
1103 u16 afex_default_vlan;
1104 u8 allowed_priorities;
1107 struct bnx2x_func_afex_viflists_params {
1110 u8 afex_vif_list_command;
1113 struct bnx2x_func_tx_start_params {
1114 struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES];
1117 u8 dont_add_pri_0_en;
1120 struct bnx2x_func_state_params {
1121 struct bnx2x_func_sp_obj *f_obj;
1123 /* Current command */
1124 enum bnx2x_func_cmd cmd;
1126 /* may have RAMROD_COMP_WAIT set only */
1127 unsigned long ramrod_flags;
1129 /* Params according to the current command */
1131 struct bnx2x_func_hw_init_params hw_init;
1132 struct bnx2x_func_hw_reset_params hw_reset;
1133 struct bnx2x_func_start_params start;
1134 struct bnx2x_func_afex_update_params afex_update;
1135 struct bnx2x_func_afex_viflists_params afex_viflists;
1136 struct bnx2x_func_tx_start_params tx_start;
1140 struct bnx2x_func_sp_drv_ops {
1141 /* Init tool + runtime initialization:
1143 * - Common (per Path)
1147 int (*init_hw_cmn_chip)(struct bnx2x *bp);
1148 int (*init_hw_cmn)(struct bnx2x *bp);
1149 int (*init_hw_port)(struct bnx2x *bp);
1150 int (*init_hw_func)(struct bnx2x *bp);
1152 /* Reset Function HW: Common, Port, Function phases. */
1153 void (*reset_hw_cmn)(struct bnx2x *bp);
1154 void (*reset_hw_port)(struct bnx2x *bp);
1155 void (*reset_hw_func)(struct bnx2x *bp);
1157 /* Init/Free GUNZIP resources */
1158 int (*gunzip_init)(struct bnx2x *bp);
1159 void (*gunzip_end)(struct bnx2x *bp);
1161 /* Prepare/Release FW resources */
1162 int (*init_fw)(struct bnx2x *bp);
1163 void (*release_fw)(struct bnx2x *bp);
1166 struct bnx2x_func_sp_obj {
1167 enum bnx2x_func_state state, next_state;
1169 /* BNX2X_FUNC_CMD_XX bits. This object implements "one
1170 * pending" paradigm but for debug and tracing purposes it's
1171 * more convinient to have different bits for different
1174 unsigned long pending;
1176 /* Buffer to use as a ramrod data and its mapping */
1178 dma_addr_t rdata_mapping;
1180 /* Buffer to use as a afex ramrod data and its mapping.
1181 * This can't be same rdata as above because afex ramrod requests
1182 * can arrive to the object in parallel to other ramrod requests.
1185 dma_addr_t afex_rdata_mapping;
1187 /* this mutex validates that when pending flag is taken, the next
1188 * ramrod to be sent will be the one set the pending bit
1190 struct mutex one_pending_mutex;
1192 /* Driver interface */
1193 struct bnx2x_func_sp_drv_ops *drv;
1196 * Performs one state change according to the given parameters.
1198 * @return 0 in case of success and negative value otherwise.
1200 int (*send_cmd)(struct bnx2x *bp,
1201 struct bnx2x_func_state_params *params);
1204 * Checks that the requested state transition is legal.
1206 int (*check_transition)(struct bnx2x *bp,
1207 struct bnx2x_func_sp_obj *o,
1208 struct bnx2x_func_state_params *params);
1211 * Completes the pending command.
1213 int (*complete_cmd)(struct bnx2x *bp,
1214 struct bnx2x_func_sp_obj *o,
1215 enum bnx2x_func_cmd cmd);
1217 int (*wait_comp)(struct bnx2x *bp, struct bnx2x_func_sp_obj *o,
1218 enum bnx2x_func_cmd cmd);
1221 /********************** Interfaces ********************************************/
1222 /* Queueable objects set */
1223 union bnx2x_qable_obj {
1224 struct bnx2x_vlan_mac_obj vlan_mac;
1226 /************** Function state update *********/
1227 void bnx2x_init_func_obj(struct bnx2x *bp,
1228 struct bnx2x_func_sp_obj *obj,
1229 void *rdata, dma_addr_t rdata_mapping,
1230 void *afex_rdata, dma_addr_t afex_rdata_mapping,
1231 struct bnx2x_func_sp_drv_ops *drv_iface);
1233 int bnx2x_func_state_change(struct bnx2x *bp,
1234 struct bnx2x_func_state_params *params);
1236 enum bnx2x_func_state bnx2x_func_get_state(struct bnx2x *bp,
1237 struct bnx2x_func_sp_obj *o);
1238 /******************* Queue State **************/
1239 void bnx2x_init_queue_obj(struct bnx2x *bp,
1240 struct bnx2x_queue_sp_obj *obj, u8 cl_id, u32 *cids,
1241 u8 cid_cnt, u8 func_id, void *rdata,
1242 dma_addr_t rdata_mapping, unsigned long type);
1244 int bnx2x_queue_state_change(struct bnx2x *bp,
1245 struct bnx2x_queue_state_params *params);
1247 /********************* VLAN-MAC ****************/
1248 void bnx2x_init_mac_obj(struct bnx2x *bp,
1249 struct bnx2x_vlan_mac_obj *mac_obj,
1250 u8 cl_id, u32 cid, u8 func_id, void *rdata,
1251 dma_addr_t rdata_mapping, int state,
1252 unsigned long *pstate, bnx2x_obj_type type,
1253 struct bnx2x_credit_pool_obj *macs_pool);
1255 void bnx2x_init_vlan_obj(struct bnx2x *bp,
1256 struct bnx2x_vlan_mac_obj *vlan_obj,
1257 u8 cl_id, u32 cid, u8 func_id, void *rdata,
1258 dma_addr_t rdata_mapping, int state,
1259 unsigned long *pstate, bnx2x_obj_type type,
1260 struct bnx2x_credit_pool_obj *vlans_pool);
1262 void bnx2x_init_vlan_mac_obj(struct bnx2x *bp,
1263 struct bnx2x_vlan_mac_obj *vlan_mac_obj,
1264 u8 cl_id, u32 cid, u8 func_id, void *rdata,
1265 dma_addr_t rdata_mapping, int state,
1266 unsigned long *pstate, bnx2x_obj_type type,
1267 struct bnx2x_credit_pool_obj *macs_pool,
1268 struct bnx2x_credit_pool_obj *vlans_pool);
1270 int bnx2x_config_vlan_mac(struct bnx2x *bp,
1271 struct bnx2x_vlan_mac_ramrod_params *p);
1273 int bnx2x_vlan_mac_move(struct bnx2x *bp,
1274 struct bnx2x_vlan_mac_ramrod_params *p,
1275 struct bnx2x_vlan_mac_obj *dest_o);
1277 /********************* RX MODE ****************/
1279 void bnx2x_init_rx_mode_obj(struct bnx2x *bp,
1280 struct bnx2x_rx_mode_obj *o);
1283 * Send and RX_MODE ramrod according to the provided parameters.
1286 * @param p Command parameters
1288 * @return 0 - if operation was successfull and there is no pending completions,
1289 * positive number - if there are pending completions,
1290 * negative - if there were errors
1292 int bnx2x_config_rx_mode(struct bnx2x *bp,
1293 struct bnx2x_rx_mode_ramrod_params *p);
1295 /****************** MULTICASTS ****************/
1297 void bnx2x_init_mcast_obj(struct bnx2x *bp,
1298 struct bnx2x_mcast_obj *mcast_obj,
1299 u8 mcast_cl_id, u32 mcast_cid, u8 func_id,
1300 u8 engine_id, void *rdata, dma_addr_t rdata_mapping,
1301 int state, unsigned long *pstate,
1302 bnx2x_obj_type type);
1305 * Configure multicast MACs list. May configure a new list
1306 * provided in p->mcast_list (BNX2X_MCAST_CMD_ADD), clean up
1307 * (BNX2X_MCAST_CMD_DEL) or restore (BNX2X_MCAST_CMD_RESTORE) a current
1308 * configuration, continue to execute the pending commands
1309 * (BNX2X_MCAST_CMD_CONT).
1311 * If previous command is still pending or if number of MACs to
1312 * configure is more that maximum number of MACs in one command,
1313 * the current command will be enqueued to the tail of the
1314 * pending commands list.
1318 * @param command to execute: BNX2X_MCAST_CMD_X
1320 * @return 0 is operation was sucessfull and there are no pending completions,
1321 * negative if there were errors, positive if there are pending
1324 int bnx2x_config_mcast(struct bnx2x *bp,
1325 struct bnx2x_mcast_ramrod_params *p, int cmd);
1327 /****************** CREDIT POOL ****************/
1328 void bnx2x_init_mac_credit_pool(struct bnx2x *bp,
1329 struct bnx2x_credit_pool_obj *p, u8 func_id,
1331 void bnx2x_init_vlan_credit_pool(struct bnx2x *bp,
1332 struct bnx2x_credit_pool_obj *p, u8 func_id,
1336 /****************** RSS CONFIGURATION ****************/
1337 void bnx2x_init_rss_config_obj(struct bnx2x *bp,
1338 struct bnx2x_rss_config_obj *rss_obj,
1339 u8 cl_id, u32 cid, u8 func_id, u8 engine_id,
1340 void *rdata, dma_addr_t rdata_mapping,
1341 int state, unsigned long *pstate,
1342 bnx2x_obj_type type);
1345 * Updates RSS configuration according to provided parameters.
1350 * @return 0 in case of success
1352 int bnx2x_config_rss(struct bnx2x *bp,
1353 struct bnx2x_config_rss_params *p);
1356 * Return the current ind_table configuration.
1359 * @param ind_table buffer to fill with the current indirection
1360 * table content. Should be at least
1361 * T_ETH_INDIRECTION_TABLE_SIZE bytes long.
1363 void bnx2x_get_rss_ind_table(struct bnx2x_rss_config_obj *rss_obj,
1366 #endif /* BNX2X_SP_VERBS */