drivers/net/bna/bnad.c

   1 /*
   2  * Linux network driver for Brocade Converged Network Adapter.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License (GPL) Version 2 as
   6  * published by the Free Software Foundation
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  */
  13 /*
  14  * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
  15  * All rights reserved
  16  * www.brocade.com
  17  */
  18 #include <linux/netdevice.h>
  19 #include <linux/skbuff.h>
  20 #include <linux/etherdevice.h>
  21 #include <linux/in.h>
  22 #include <linux/ethtool.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/if_ether.h>
  25 #include <linux/ip.h>
  26
  27 #include "bnad.h"
  28 #include "bna.h"
  29 #include "cna.h"
  30
  31 static DEFINE_MUTEX(bnad_fwimg_mutex);
  32
  33 /*
  34  * Module params
  35  */
  36 static uint bnad_msix_disable;
  37 module_param(bnad_msix_disable, uint, 0444);
  38 MODULE_PARM_DESC(bnad_msix_disable, "Disable MSIX mode");
  39
  40 static uint bnad_ioc_auto_recover = 1;
  41 module_param(bnad_ioc_auto_recover, uint, 0444);
  42 MODULE_PARM_DESC(bnad_ioc_auto_recover, "Enable / Disable auto recovery");
  43
  44 /*
  45  * Global variables
  46  */
  47 u32 bnad_rxqs_per_cq = 2;
  48
  49 static const u8 bnad_bcast_addr[] =  {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
  50
  51 /*
  52  * Local MACROS
  53  */
  54 #define BNAD_TX_UNMAPQ_DEPTH (bnad->txq_depth * 2)
  55
  56 #define BNAD_RX_UNMAPQ_DEPTH (bnad->rxq_depth)
  57
  58 #define BNAD_GET_MBOX_IRQ(_bnad)                                \
  59         (((_bnad)->cfg_flags & BNAD_CF_MSIX) ?                  \
  60          ((_bnad)->msix_table[(_bnad)->msix_num - 1].vector) :  \
  61          ((_bnad)->pcidev->irq))
  62
  63 #define BNAD_FILL_UNMAPQ_MEM_REQ(_res_info, _num, _depth)       \
  64 do {                                                            \
  65         (_res_info)->res_type = BNA_RES_T_MEM;                  \
  66         (_res_info)->res_u.mem_info.mem_type = BNA_MEM_T_KVA;   \
  67         (_res_info)->res_u.mem_info.num = (_num);               \
  68         (_res_info)->res_u.mem_info.len =                       \
  69         sizeof(struct bnad_unmap_q) +                           \
  70         (sizeof(struct bnad_skb_unmap) * ((_depth) - 1));       \
  71 } while (0)
  72
  73 #define BNAD_TXRX_SYNC_MDELAY   250     /* 250 msecs */
  74
  75 /*
  76  * Reinitialize completions in CQ, once Rx is taken down
  77  */
  78 static void
  79 bnad_cq_cmpl_init(struct bnad *bnad, struct bna_ccb *ccb)
  80 {
  81         struct bna_cq_entry *cmpl, *next_cmpl;
  82         unsigned int wi_range, wis = 0, ccb_prod = 0;
  83         int i;
  84
  85         BNA_CQ_QPGE_PTR_GET(ccb_prod, ccb->sw_qpt, cmpl,
  86                             wi_range);
  87
  88         for (i = 0; i < ccb->q_depth; i++) {
  89                 wis++;
  90                 if (likely(--wi_range))
  91                         next_cmpl = cmpl + 1;
  92                 else {
  93                         BNA_QE_INDX_ADD(ccb_prod, wis, ccb->q_depth);
  94                         wis = 0;
  95                         BNA_CQ_QPGE_PTR_GET(ccb_prod, ccb->sw_qpt,
  96                                                 next_cmpl, wi_range);
  97                 }
  98                 cmpl->valid = 0;
  99                 cmpl = next_cmpl;
 100         }
 101 }
 102
 103 /*
 104  * Frees all pending Tx Bufs
 105  * At this point no activity is expected on the Q,
 106  * so DMA unmap & freeing is fine.
 107  */
 108 static void
 109 bnad_free_all_txbufs(struct bnad *bnad,
 110                  struct bna_tcb *tcb)
 111 {
 112         u32             unmap_cons;
 113         struct bnad_unmap_q *unmap_q = tcb->unmap_q;
 114         struct bnad_skb_unmap *unmap_array;
 115         struct sk_buff          *skb = NULL;
 116         int                     i;
 117
 118         unmap_array = unmap_q->unmap_array;
 119
 120         unmap_cons = 0;
 121         while (unmap_cons < unmap_q->q_depth) {
 122                 skb = unmap_array[unmap_cons].skb;
 123                 if (!skb) {
 124                         unmap_cons++;
 125                         continue;
 126                 }
 127                 unmap_array[unmap_cons].skb = NULL;
 128
 129                 dma_unmap_single(&bnad->pcidev->dev,
 130                                  dma_unmap_addr(&unmap_array[unmap_cons],
 131                                                 dma_addr), skb_headlen(skb),
 132                                                 DMA_TO_DEVICE);
 133
 134                 dma_unmap_addr_set(&unmap_array[unmap_cons], dma_addr, 0);
 135                 if (++unmap_cons >= unmap_q->q_depth)
 136                         break;
 137
 138                 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
 139                         dma_unmap_page(&bnad->pcidev->dev,
 140                                        dma_unmap_addr(&unmap_array[unmap_cons],
 141                                                       dma_addr),
 142                                        skb_shinfo(skb)->frags[i].size,
 143                                        DMA_TO_DEVICE);
 144                         dma_unmap_addr_set(&unmap_array[unmap_cons], dma_addr,
 145                                            0);
 146                         if (++unmap_cons >= unmap_q->q_depth)
 147                                 break;
 148                 }
 149                 dev_kfree_skb_any(skb);
 150         }
 151 }
 152
 153 /* Data Path Handlers */
 154
 155 /*
 156  * bnad_free_txbufs : Frees the Tx bufs on Tx completion
 157  * Can be called in a) Interrupt context
 158  *                  b) Sending context
 159  *                  c) Tasklet context
 160  */
 161 static u32
 162 bnad_free_txbufs(struct bnad *bnad,
 163                  struct bna_tcb *tcb)
 164 {
 165         u32             sent_packets = 0, sent_bytes = 0;
 166         u16             wis, unmap_cons, updated_hw_cons;
 167         struct bnad_unmap_q *unmap_q = tcb->unmap_q;
 168         struct bnad_skb_unmap *unmap_array;
 169         struct sk_buff          *skb;
 170         int i;
 171
 172         /*
 173          * Just return if TX is stopped. This check is useful
 174          * when bnad_free_txbufs() runs out of a tasklet scheduled
 175          * before bnad_cb_tx_cleanup() cleared BNAD_TXQ_TX_STARTED bit
 176          * but this routine runs actually after the cleanup has been
 177          * executed.
 178          */
 179         if (!test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags))
 180                 return 0;
 181
 182         updated_hw_cons = *(tcb->hw_consumer_index);
 183
 184         wis = BNA_Q_INDEX_CHANGE(tcb->consumer_index,
 185                                   updated_hw_cons, tcb->q_depth);
 186
 187         BUG_ON(!(wis <= BNA_QE_IN_USE_CNT(tcb, tcb->q_depth)));
 188
 189         unmap_array = unmap_q->unmap_array;
 190         unmap_cons = unmap_q->consumer_index;
 191
 192         prefetch(&unmap_array[unmap_cons + 1]);
 193         while (wis) {
 194                 skb = unmap_array[unmap_cons].skb;
 195
 196                 unmap_array[unmap_cons].skb = NULL;
 197
 198                 sent_packets++;
 199                 sent_bytes += skb->len;
 200                 wis -= BNA_TXQ_WI_NEEDED(1 + skb_shinfo(skb)->nr_frags);
 201
 202                 dma_unmap_single(&bnad->pcidev->dev,
 203                                  dma_unmap_addr(&unmap_array[unmap_cons],
 204                                                 dma_addr), skb_headlen(skb),
 205                                  DMA_TO_DEVICE);
 206                 dma_unmap_addr_set(&unmap_array[unmap_cons], dma_addr, 0);
 207                 BNA_QE_INDX_ADD(unmap_cons, 1, unmap_q->q_depth);
 208
 209                 prefetch(&unmap_array[unmap_cons + 1]);
 210                 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
 211                         prefetch(&unmap_array[unmap_cons + 1]);
 212
 213                         dma_unmap_page(&bnad->pcidev->dev,
 214                                        dma_unmap_addr(&unmap_array[unmap_cons],
 215                                                       dma_addr),
 216                                        skb_shinfo(skb)->frags[i].size,
 217                                        DMA_TO_DEVICE);
 218                         dma_unmap_addr_set(&unmap_array[unmap_cons], dma_addr,
 219                                            0);
 220                         BNA_QE_INDX_ADD(unmap_cons, 1, unmap_q->q_depth);
 221                 }
 222                 dev_kfree_skb_any(skb);
 223         }
 224
 225         /* Update consumer pointers. */
 226         tcb->consumer_index = updated_hw_cons;
 227         unmap_q->consumer_index = unmap_cons;
 228
 229         tcb->txq->tx_packets += sent_packets;
 230         tcb->txq->tx_bytes += sent_bytes;
 231
 232         return sent_packets;
 233 }
 234
 235 /* Tx Free Tasklet function */
 236 /* Frees for all the tcb's in all the Tx's */
 237 /*
 238  * Scheduled from sending context, so that
 239  * the fat Tx lock is not held for too long
 240  * in the sending context.
 241  */
 242 static void
 243 bnad_tx_free_tasklet(unsigned long bnad_ptr)
 244 {
 245         struct bnad *bnad = (struct bnad *)bnad_ptr;
 246         struct bna_tcb *tcb;
 247         u32             acked = 0;
 248         int                     i, j;
 249
 250         for (i = 0; i < bnad->num_tx; i++) {
 251                 for (j = 0; j < bnad->num_txq_per_tx; j++) {
 252                         tcb = bnad->tx_info[i].tcb[j];
 253                         if (!tcb)
 254                                 continue;
 255                         if (((u16) (*tcb->hw_consumer_index) !=
 256                                 tcb->consumer_index) &&
 257                                 (!test_and_set_bit(BNAD_TXQ_FREE_SENT,
 258                                                   &tcb->flags))) {
 259                                 acked = bnad_free_txbufs(bnad, tcb);
 260                                 if (likely(test_bit(BNAD_TXQ_TX_STARTED,
 261                                         &tcb->flags)))
 262                                         bna_ib_ack(tcb->i_dbell, acked);
 263                                 smp_mb__before_clear_bit();
 264                                 clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
 265                         }
 266                         if (unlikely(!test_bit(BNAD_TXQ_TX_STARTED,
 267                                                 &tcb->flags)))
 268                                 continue;
 269                         if (netif_queue_stopped(bnad->netdev)) {
 270                                 if (acked && netif_carrier_ok(bnad->netdev) &&
 271                                         BNA_QE_FREE_CNT(tcb, tcb->q_depth) >=
 272                                                 BNAD_NETIF_WAKE_THRESHOLD) {
 273                                         netif_wake_queue(bnad->netdev);
 274                                         /* TODO */
 275                                         /* Counters for individual TxQs? */
 276                                         BNAD_UPDATE_CTR(bnad,
 277                                                 netif_queue_wakeup);
 278                                 }
 279                         }
 280                 }
 281         }
 282 }
 283
 284 static u32
 285 bnad_tx(struct bnad *bnad, struct bna_tcb *tcb)
 286 {
 287         struct net_device *netdev = bnad->netdev;
 288         u32 sent = 0;
 289
 290         if (test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags))
 291                 return 0;
 292
 293         sent = bnad_free_txbufs(bnad, tcb);
 294         if (sent) {
 295                 if (netif_queue_stopped(netdev) &&
 296                     netif_carrier_ok(netdev) &&
 297                     BNA_QE_FREE_CNT(tcb, tcb->q_depth) >=
 298                                     BNAD_NETIF_WAKE_THRESHOLD) {
 299                         if (test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)) {
 300                                 netif_wake_queue(netdev);
 301                                 BNAD_UPDATE_CTR(bnad, netif_queue_wakeup);
 302                         }
 303                 }
 304         }
 305
 306         if (likely(test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)))
 307                 bna_ib_ack(tcb->i_dbell, sent);
 308
 309         smp_mb__before_clear_bit();
 310         clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
 311
 312         return sent;
 313 }
 314
 315 /* MSIX Tx Completion Handler */
 316 static irqreturn_t
 317 bnad_msix_tx(int irq, void *data)
 318 {
 319         struct bna_tcb *tcb = (struct bna_tcb *)data;
 320         struct bnad *bnad = tcb->bnad;
 321
 322         bnad_tx(bnad, tcb);
 323
 324         return IRQ_HANDLED;
 325 }
 326
 327 static void
 328 bnad_reset_rcb(struct bnad *bnad, struct bna_rcb *rcb)
 329 {
 330         struct bnad_unmap_q *unmap_q = rcb->unmap_q;
 331
 332         rcb->producer_index = 0;
 333         rcb->consumer_index = 0;
 334
 335         unmap_q->producer_index = 0;
 336         unmap_q->consumer_index = 0;
 337 }
 338
 339 static void
 340 bnad_free_all_rxbufs(struct bnad *bnad, struct bna_rcb *rcb)
 341 {
 342         struct bnad_unmap_q *unmap_q;
 343         struct bnad_skb_unmap *unmap_array;
 344         struct sk_buff *skb;
 345         int unmap_cons;
 346
 347         unmap_q = rcb->unmap_q;
 348         unmap_array = unmap_q->unmap_array;
 349         for (unmap_cons = 0; unmap_cons < unmap_q->q_depth; unmap_cons++) {
 350                 skb = unmap_array[unmap_cons].skb;
 351                 if (!skb)
 352                         continue;
 353                 unmap_array[unmap_cons].skb = NULL;
 354                 dma_unmap_single(&bnad->pcidev->dev,
 355                                  dma_unmap_addr(&unmap_array[unmap_cons],
 356                                                 dma_addr),
 357                                  rcb->rxq->buffer_size,
 358                                  DMA_FROM_DEVICE);
 359                 dev_kfree_skb(skb);
 360         }
 361         bnad_reset_rcb(bnad, rcb);
 362 }
 363
 364 static void
 365 bnad_alloc_n_post_rxbufs(struct bnad *bnad, struct bna_rcb *rcb)
 366 {
 367         u16 to_alloc, alloced, unmap_prod, wi_range;
 368         struct bnad_unmap_q *unmap_q = rcb->unmap_q;
 369         struct bnad_skb_unmap *unmap_array;
 370         struct bna_rxq_entry *rxent;
 371         struct sk_buff *skb;
 372         dma_addr_t dma_addr;
 373
 374         alloced = 0;
 375         to_alloc =
 376                 BNA_QE_FREE_CNT(unmap_q, unmap_q->q_depth);
 377
 378         unmap_array = unmap_q->unmap_array;
 379         unmap_prod = unmap_q->producer_index;
 380
 381         BNA_RXQ_QPGE_PTR_GET(unmap_prod, rcb->sw_qpt, rxent, wi_range);
 382
 383         while (to_alloc--) {
 384                 if (!wi_range) {
 385                         BNA_RXQ_QPGE_PTR_GET(unmap_prod, rcb->sw_qpt, rxent,
 386                                              wi_range);
 387                 }
 388                 skb = alloc_skb(rcb->rxq->buffer_size + NET_IP_ALIGN,
 389                                      GFP_ATOMIC);
 390                 if (unlikely(!skb)) {
 391                         BNAD_UPDATE_CTR(bnad, rxbuf_alloc_failed);
 392                         goto finishing;
 393                 }
 394                 skb->dev = bnad->netdev;
 395                 skb_reserve(skb, NET_IP_ALIGN);
 396                 unmap_array[unmap_prod].skb = skb;
 397                 dma_addr = dma_map_single(&bnad->pcidev->dev, skb->data,
 398                                           rcb->rxq->buffer_size,
 399                                           DMA_FROM_DEVICE);
 400                 dma_unmap_addr_set(&unmap_array[unmap_prod], dma_addr,
 401                                    dma_addr);
 402                 BNA_SET_DMA_ADDR(dma_addr, &rxent->host_addr);
 403                 BNA_QE_INDX_ADD(unmap_prod, 1, unmap_q->q_depth);
 404
 405                 rxent++;
 406                 wi_range--;
 407                 alloced++;
 408         }
 409
 410 finishing:
 411         if (likely(alloced)) {
 412                 unmap_q->producer_index = unmap_prod;
 413                 rcb->producer_index = unmap_prod;
 414                 smp_mb();
 415                 if (likely(test_bit(BNAD_RXQ_STARTED, &rcb->flags)))
 416                         bna_rxq_prod_indx_doorbell(rcb);
 417         }
 418 }
 419
 420 static inline void
 421 bnad_refill_rxq(struct bnad *bnad, struct bna_rcb *rcb)
 422 {
 423         struct bnad_unmap_q *unmap_q = rcb->unmap_q;
 424
 425         if (!test_and_set_bit(BNAD_RXQ_REFILL, &rcb->flags)) {
 426                 if (BNA_QE_FREE_CNT(unmap_q, unmap_q->q_depth)
 427                          >> BNAD_RXQ_REFILL_THRESHOLD_SHIFT)
 428                         bnad_alloc_n_post_rxbufs(bnad, rcb);
 429                 smp_mb__before_clear_bit();
 430                 clear_bit(BNAD_RXQ_REFILL, &rcb->flags);
 431         }
 432 }
 433
 434 static u32
 435 bnad_poll_cq(struct bnad *bnad, struct bna_ccb *ccb, int budget)
 436 {
 437         struct bna_cq_entry *cmpl, *next_cmpl;
 438         struct bna_rcb *rcb = NULL;
 439         unsigned int wi_range, packets = 0, wis = 0;
 440         struct bnad_unmap_q *unmap_q;
 441         struct bnad_skb_unmap *unmap_array;
 442         struct sk_buff *skb;
 443         u32 flags, unmap_cons;
 444         u32 qid0 = ccb->rcb[0]->rxq->rxq_id;
 445         struct bna_pkt_rate *pkt_rt = &ccb->pkt_rate;
 446
 447         if (!test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags))
 448                 return 0;
 449
 450         prefetch(bnad->netdev);
 451         BNA_CQ_QPGE_PTR_GET(ccb->producer_index, ccb->sw_qpt, cmpl,
 452                             wi_range);
 453         BUG_ON(!(wi_range <= ccb->q_depth));
 454         while (cmpl->valid && packets < budget) {
 455                 packets++;
 456                 BNA_UPDATE_PKT_CNT(pkt_rt, ntohs(cmpl->length));
 457
 458                 if (qid0 == cmpl->rxq_id)
 459                         rcb = ccb->rcb[0];
 460                 else
 461                         rcb = ccb->rcb[1];
 462
 463                 unmap_q = rcb->unmap_q;
 464                 unmap_array = unmap_q->unmap_array;
 465                 unmap_cons = unmap_q->consumer_index;
 466
 467                 skb = unmap_array[unmap_cons].skb;
 468                 BUG_ON(!(skb));
 469                 unmap_array[unmap_cons].skb = NULL;
 470                 dma_unmap_single(&bnad->pcidev->dev,
 471                                  dma_unmap_addr(&unmap_array[unmap_cons],
 472                                                 dma_addr),
 473                                  rcb->rxq->buffer_size,
 474                                  DMA_FROM_DEVICE);
 475                 BNA_QE_INDX_ADD(unmap_q->consumer_index, 1, unmap_q->q_depth);
 476
 477                 /* Should be more efficient ? Performance ? */
 478                 BNA_QE_INDX_ADD(rcb->consumer_index, 1, rcb->q_depth);
 479
 480                 wis++;
 481                 if (likely(--wi_range))
 482                         next_cmpl = cmpl + 1;
 483                 else {
 484                         BNA_QE_INDX_ADD(ccb->producer_index, wis, ccb->q_depth);
 485                         wis = 0;
 486                         BNA_CQ_QPGE_PTR_GET(ccb->producer_index, ccb->sw_qpt,
 487                                                 next_cmpl, wi_range);
 488                         BUG_ON(!(wi_range <= ccb->q_depth));
 489                 }
 490                 prefetch(next_cmpl);
 491
 492                 flags = ntohl(cmpl->flags);
 493                 if (unlikely
 494                     (flags &
 495                      (BNA_CQ_EF_MAC_ERROR | BNA_CQ_EF_FCS_ERROR |
 496                       BNA_CQ_EF_TOO_LONG))) {
 497                         dev_kfree_skb_any(skb);
 498                         rcb->rxq->rx_packets_with_error++;
 499                         goto next;
 500                 }
 501
 502                 skb_put(skb, ntohs(cmpl->length));
 503                 if (likely
 504                     (bnad->rx_csum &&
 505                      (((flags & BNA_CQ_EF_IPV4) &&
 506                       (flags & BNA_CQ_EF_L3_CKSUM_OK)) ||
 507                       (flags & BNA_CQ_EF_IPV6)) &&
 508                       (flags & (BNA_CQ_EF_TCP | BNA_CQ_EF_UDP)) &&
 509                       (flags & BNA_CQ_EF_L4_CKSUM_OK)))
 510                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 511                 else
 512                         skb_checksum_none_assert(skb);
 513
 514                 rcb->rxq->rx_packets++;
 515                 rcb->rxq->rx_bytes += skb->len;
 516                 skb->protocol = eth_type_trans(skb, bnad->netdev);
 517
 518                 if (bnad->vlan_grp && (flags & BNA_CQ_EF_VLAN)) {
 519                         struct bnad_rx_ctrl *rx_ctrl =
 520                                 (struct bnad_rx_ctrl *)ccb->ctrl;
 521                         if (skb->ip_summed == CHECKSUM_UNNECESSARY)
 522                                 vlan_gro_receive(&rx_ctrl->napi, bnad->vlan_grp,
 523                                                 ntohs(cmpl->vlan_tag), skb);
 524                         else
 525                                 vlan_hwaccel_receive_skb(skb,
 526                                                          bnad->vlan_grp,
 527                                                          ntohs(cmpl->vlan_tag));
 528
 529                 } else { /* Not VLAN tagged/stripped */
 530                         struct bnad_rx_ctrl *rx_ctrl =
 531                                 (struct bnad_rx_ctrl *)ccb->ctrl;
 532                         if (skb->ip_summed == CHECKSUM_UNNECESSARY)
 533                                 napi_gro_receive(&rx_ctrl->napi, skb);
 534                         else
 535                                 netif_receive_skb(skb);
 536                 }
 537
 538 next:
 539                 cmpl->valid = 0;
 540                 cmpl = next_cmpl;
 541         }
 542
 543         BNA_QE_INDX_ADD(ccb->producer_index, wis, ccb->q_depth);
 544
 545         if (likely(ccb)) {
 546                 if (likely(test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags)))
 547                         bna_ib_ack(ccb->i_dbell, packets);
 548                 bnad_refill_rxq(bnad, ccb->rcb[0]);
 549                 if (ccb->rcb[1])
 550                         bnad_refill_rxq(bnad, ccb->rcb[1]);
 551         } else {
 552                 if (likely(test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags)))
 553                         bna_ib_ack(ccb->i_dbell, 0);
 554         }
 555
 556         return packets;
 557 }
 558
 559 static void
 560 bnad_disable_rx_irq(struct bnad *bnad, struct bna_ccb *ccb)
 561 {
 562         if (unlikely(!test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags)))
 563                 return;
 564
 565         bna_ib_coalescing_timer_set(ccb->i_dbell, 0);
 566         bna_ib_ack(ccb->i_dbell, 0);
 567 }
 568
 569 static void
 570 bnad_enable_rx_irq(struct bnad *bnad, struct bna_ccb *ccb)
 571 {
 572         unsigned long flags;
 573
 574         /* Because of polling context */
 575         spin_lock_irqsave(&bnad->bna_lock, flags);
 576         bnad_enable_rx_irq_unsafe(ccb);
 577         spin_unlock_irqrestore(&bnad->bna_lock, flags);
 578 }
 579
 580 static void
 581 bnad_netif_rx_schedule_poll(struct bnad *bnad, struct bna_ccb *ccb)
 582 {
 583         struct bnad_rx_ctrl *rx_ctrl = (struct bnad_rx_ctrl *)(ccb->ctrl);
 584         struct napi_struct *napi = &rx_ctrl->napi;
 585
 586         if (likely(napi_schedule_prep(napi))) {
 587                 bnad_disable_rx_irq(bnad, ccb);
 588                 __napi_schedule(napi);
 589         }
 590         BNAD_UPDATE_CTR(bnad, netif_rx_schedule);
 591 }
 592
 593 /* MSIX Rx Path Handler */
 594 static irqreturn_t
 595 bnad_msix_rx(int irq, void *data)
 596 {
 597         struct bna_ccb *ccb = (struct bna_ccb *)data;
 598         struct bnad *bnad = ccb->bnad;
 599
 600         bnad_netif_rx_schedule_poll(bnad, ccb);
 601
 602         return IRQ_HANDLED;
 603 }
 604
 605 /* Interrupt handlers */
 606
 607 /* Mbox Interrupt Handlers */
 608 static irqreturn_t
 609 bnad_msix_mbox_handler(int irq, void *data)
 610 {
 611         u32 intr_status;
 612         unsigned long flags;
 613         struct bnad *bnad = (struct bnad *)data;
 614
 615         if (unlikely(test_bit(BNAD_RF_MBOX_IRQ_DISABLED, &bnad->run_flags)))
 616                 return IRQ_HANDLED;
 617
 618         spin_lock_irqsave(&bnad->bna_lock, flags);
 619
 620         bna_intr_status_get(&bnad->bna, intr_status);
 621
 622         if (BNA_IS_MBOX_ERR_INTR(intr_status))
 623                 bna_mbox_handler(&bnad->bna, intr_status);
 624
 625         spin_unlock_irqrestore(&bnad->bna_lock, flags);
 626
 627         return IRQ_HANDLED;
 628 }
 629
 630 static irqreturn_t
 631 bnad_isr(int irq, void *data)
 632 {
 633         int i, j;
 634         u32 intr_status;
 635         unsigned long flags;
 636         struct bnad *bnad = (struct bnad *)data;
 637         struct bnad_rx_info *rx_info;
 638         struct bnad_rx_ctrl *rx_ctrl;
 639
 640         if (unlikely(test_bit(BNAD_RF_MBOX_IRQ_DISABLED, &bnad->run_flags)))
 641                 return IRQ_NONE;
 642
 643         bna_intr_status_get(&bnad->bna, intr_status);
 644
 645         if (unlikely(!intr_status))
 646                 return IRQ_NONE;
 647
 648         spin_lock_irqsave(&bnad->bna_lock, flags);
 649
 650         if (BNA_IS_MBOX_ERR_INTR(intr_status))
 651                 bna_mbox_handler(&bnad->bna, intr_status);
 652
 653         spin_unlock_irqrestore(&bnad->bna_lock, flags);
 654
 655         if (!BNA_IS_INTX_DATA_INTR(intr_status))
 656                 return IRQ_HANDLED;
 657
 658         /* Process data interrupts */
 659         /* Tx processing */
 660         for (i = 0; i < bnad->num_tx; i++) {
 661                 for (j = 0; j < bnad->num_txq_per_tx; j++)
 662                         bnad_tx(bnad, bnad->tx_info[i].tcb[j]);
 663         }
 664         /* Rx processing */
 665         for (i = 0; i < bnad->num_rx; i++) {
 666                 rx_info = &bnad->rx_info[i];
 667                 if (!rx_info->rx)
 668                         continue;
 669                 for (j = 0; j < bnad->num_rxp_per_rx; j++) {
 670                         rx_ctrl = &rx_info->rx_ctrl[j];
 671                         if (rx_ctrl->ccb)
 672                                 bnad_netif_rx_schedule_poll(bnad,
 673                                                             rx_ctrl->ccb);
 674                 }
 675         }
 676         return IRQ_HANDLED;
 677 }
 678
 679 /*
 680  * Called in interrupt / callback context
 681  * with bna_lock held, so cfg_flags access is OK
 682  */
 683 static void
 684 bnad_enable_mbox_irq(struct bnad *bnad)
 685 {
 686         clear_bit(BNAD_RF_MBOX_IRQ_DISABLED, &bnad->run_flags);
 687
 688         BNAD_UPDATE_CTR(bnad, mbox_intr_enabled);
 689 }
 690
 691 /*
 692  * Called with bnad->bna_lock held b'cos of
 693  * bnad->cfg_flags access.
 694  */
 695 static void
 696 bnad_disable_mbox_irq(struct bnad *bnad)
 697 {
 698         set_bit(BNAD_RF_MBOX_IRQ_DISABLED, &bnad->run_flags);
 699
 700         BNAD_UPDATE_CTR(bnad, mbox_intr_disabled);
 701 }
 702
 703 static void
 704 bnad_set_netdev_perm_addr(struct bnad *bnad)
 705 {
 706         struct net_device *netdev = bnad->netdev;
 707
 708         memcpy(netdev->perm_addr, &bnad->perm_addr, netdev->addr_len);
 709         if (is_zero_ether_addr(netdev->dev_addr))
 710                 memcpy(netdev->dev_addr, &bnad->perm_addr, netdev->addr_len);
 711 }
 712
 713 /* Control Path Handlers */
 714
 715 /* Callbacks */
 716 void
 717 bnad_cb_device_enable_mbox_intr(struct bnad *bnad)
 718 {
 719         bnad_enable_mbox_irq(bnad);
 720 }
 721
 722 void
 723 bnad_cb_device_disable_mbox_intr(struct bnad *bnad)
 724 {
 725         bnad_disable_mbox_irq(bnad);
 726 }
 727
 728 void
 729 bnad_cb_device_enabled(struct bnad *bnad, enum bna_cb_status status)
 730 {
 731         complete(&bnad->bnad_completions.ioc_comp);
 732         bnad->bnad_completions.ioc_comp_status = status;
 733 }
 734
 735 void
 736 bnad_cb_device_disabled(struct bnad *bnad, enum bna_cb_status status)
 737 {
 738         complete(&bnad->bnad_completions.ioc_comp);
 739         bnad->bnad_completions.ioc_comp_status = status;
 740 }
 741
 742 static void
 743 bnad_cb_port_disabled(void *arg, enum bna_cb_status status)
 744 {
 745         struct bnad *bnad = (struct bnad *)arg;
 746
 747         complete(&bnad->bnad_completions.port_comp);
 748
 749         netif_carrier_off(bnad->netdev);
 750 }
 751
 752 void
 753 bnad_cb_port_link_status(struct bnad *bnad,
 754                         enum bna_link_status link_status)
 755 {
 756         bool link_up = 0;
 757
 758         link_up = (link_status == BNA_LINK_UP) || (link_status == BNA_CEE_UP);
 759
 760         if (link_status == BNA_CEE_UP) {
 761                 set_bit(BNAD_RF_CEE_RUNNING, &bnad->run_flags);
 762                 BNAD_UPDATE_CTR(bnad, cee_up);
 763         } else
 764                 clear_bit(BNAD_RF_CEE_RUNNING, &bnad->run_flags);
 765
 766         if (link_up) {
 767                 if (!netif_carrier_ok(bnad->netdev)) {
 768                         struct bna_tcb *tcb = bnad->tx_info[0].tcb[0];
 769                         if (!tcb)
 770                                 return;
 771                         pr_warn("bna: %s link up\n",
 772                                 bnad->netdev->name);
 773                         netif_carrier_on(bnad->netdev);
 774                         BNAD_UPDATE_CTR(bnad, link_toggle);
 775                         if (test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)) {
 776                                 /* Force an immediate Transmit Schedule */
 777                                 pr_info("bna: %s TX_STARTED\n",
 778                                         bnad->netdev->name);
 779                                 netif_wake_queue(bnad->netdev);
 780                                 BNAD_UPDATE_CTR(bnad, netif_queue_wakeup);
 781                         } else {
 782                                 netif_stop_queue(bnad->netdev);
 783                                 BNAD_UPDATE_CTR(bnad, netif_queue_stop);
 784                         }
 785                 }
 786         } else {
 787                 if (netif_carrier_ok(bnad->netdev)) {
 788                         pr_warn("bna: %s link down\n",
 789                                 bnad->netdev->name);
 790                         netif_carrier_off(bnad->netdev);
 791                         BNAD_UPDATE_CTR(bnad, link_toggle);
 792                 }
 793         }
 794 }
 795
 796 static void
 797 bnad_cb_tx_disabled(void *arg, struct bna_tx *tx,
 798                         enum bna_cb_status status)
 799 {
 800         struct bnad *bnad = (struct bnad *)arg;
 801
 802         complete(&bnad->bnad_completions.tx_comp);
 803 }
 804
 805 static void
 806 bnad_cb_tcb_setup(struct bnad *bnad, struct bna_tcb *tcb)
 807 {
 808         struct bnad_tx_info *tx_info =
 809                         (struct bnad_tx_info *)tcb->txq->tx->priv;
 810         struct bnad_unmap_q *unmap_q = tcb->unmap_q;
 811
 812         tx_info->tcb[tcb->id] = tcb;
 813         unmap_q->producer_index = 0;
 814         unmap_q->consumer_index = 0;
 815         unmap_q->q_depth = BNAD_TX_UNMAPQ_DEPTH;
 816 }
 817
 818 static void
 819 bnad_cb_tcb_destroy(struct bnad *bnad, struct bna_tcb *tcb)
 820 {
 821         struct bnad_tx_info *tx_info =
 822                         (struct bnad_tx_info *)tcb->txq->tx->priv;
 823         struct bnad_unmap_q *unmap_q = tcb->unmap_q;
 824
 825         while (test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags))
 826                 cpu_relax();
 827
 828         bnad_free_all_txbufs(bnad, tcb);
 829
 830         unmap_q->producer_index = 0;
 831         unmap_q->consumer_index = 0;
 832
 833         smp_mb__before_clear_bit();
 834         clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
 835
 836         tx_info->tcb[tcb->id] = NULL;
 837 }
 838
 839 static void
 840 bnad_cb_rcb_setup(struct bnad *bnad, struct bna_rcb *rcb)
 841 {
 842         struct bnad_unmap_q *unmap_q = rcb->unmap_q;
 843
 844         unmap_q->producer_index = 0;
 845         unmap_q->consumer_index = 0;
 846         unmap_q->q_depth = BNAD_RX_UNMAPQ_DEPTH;
 847 }
 848
 849 static void
 850 bnad_cb_rcb_destroy(struct bnad *bnad, struct bna_rcb *rcb)
 851 {
 852         bnad_free_all_rxbufs(bnad, rcb);
 853 }
 854
 855 static void
 856 bnad_cb_ccb_setup(struct bnad *bnad, struct bna_ccb *ccb)
 857 {
 858         struct bnad_rx_info *rx_info =
 859                         (struct bnad_rx_info *)ccb->cq->rx->priv;
 860
 861         rx_info->rx_ctrl[ccb->id].ccb = ccb;
 862         ccb->ctrl = &rx_info->rx_ctrl[ccb->id];
 863 }
 864
 865 static void
 866 bnad_cb_ccb_destroy(struct bnad *bnad, struct bna_ccb *ccb)
 867 {
 868         struct bnad_rx_info *rx_info =
 869                         (struct bnad_rx_info *)ccb->cq->rx->priv;
 870
 871         rx_info->rx_ctrl[ccb->id].ccb = NULL;
 872 }
 873
 874 static void
 875 bnad_cb_tx_stall(struct bnad *bnad, struct bna_tcb *tcb)
 876 {
 877         struct bnad_tx_info *tx_info =
 878                         (struct bnad_tx_info *)tcb->txq->tx->priv;
 879
 880         if (tx_info != &bnad->tx_info[0])
 881                 return;
 882
 883         clear_bit(BNAD_TXQ_TX_STARTED, &tcb->flags);
 884         netif_stop_queue(bnad->netdev);
 885         pr_info("bna: %s TX_STOPPED\n", bnad->netdev->name);
 886 }
 887
 888 static void
 889 bnad_cb_tx_resume(struct bnad *bnad, struct bna_tcb *tcb)
 890 {
 891         struct bnad_unmap_q *unmap_q = tcb->unmap_q;
 892
 893         if (test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags))
 894                 return;
 895
 896         clear_bit(BNAD_RF_TX_SHUTDOWN_DELAYED, &bnad->run_flags);
 897
 898         while (test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags))
 899                 cpu_relax();
 900
 901         bnad_free_all_txbufs(bnad, tcb);
 902
 903         unmap_q->producer_index = 0;
 904         unmap_q->consumer_index = 0;
 905
 906         smp_mb__before_clear_bit();
 907         clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
 908
 909         /*
 910          * Workaround for first device enable failure & we
 911          * get a 0 MAC address. We try to get the MAC address
 912          * again here.
 913          */
 914         if (is_zero_ether_addr(&bnad->perm_addr.mac[0])) {
 915                 bna_port_mac_get(&bnad->bna.port, &bnad->perm_addr);
 916                 bnad_set_netdev_perm_addr(bnad);
 917         }
 918
 919         set_bit(BNAD_TXQ_TX_STARTED, &tcb->flags);
 920
 921         if (netif_carrier_ok(bnad->netdev)) {
 922                 pr_info("bna: %s TX_STARTED\n", bnad->netdev->name);
 923                 netif_wake_queue(bnad->netdev);
 924                 BNAD_UPDATE_CTR(bnad, netif_queue_wakeup);
 925         }
 926 }
 927
 928 static void
 929 bnad_cb_tx_cleanup(struct bnad *bnad, struct bna_tcb *tcb)
 930 {
 931         /* Delay only once for the whole Tx Path Shutdown */
 932         if (!test_and_set_bit(BNAD_RF_TX_SHUTDOWN_DELAYED, &bnad->run_flags))
 933                 mdelay(BNAD_TXRX_SYNC_MDELAY);
 934 }
 935
 936 static void
 937 bnad_cb_rx_cleanup(struct bnad *bnad,
 938                         struct bna_ccb *ccb)
 939 {
 940         clear_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags);
 941
 942         if (ccb->rcb[1])
 943                 clear_bit(BNAD_RXQ_STARTED, &ccb->rcb[1]->flags);
 944
 945         if (!test_and_set_bit(BNAD_RF_RX_SHUTDOWN_DELAYED, &bnad->run_flags))
 946                 mdelay(BNAD_TXRX_SYNC_MDELAY);
 947 }
 948
 949 static void
 950 bnad_cb_rx_post(struct bnad *bnad, struct bna_rcb *rcb)
 951 {
 952         struct bnad_unmap_q *unmap_q = rcb->unmap_q;
 953
 954         clear_bit(BNAD_RF_RX_SHUTDOWN_DELAYED, &bnad->run_flags);
 955
 956         if (rcb == rcb->cq->ccb->rcb[0])
 957                 bnad_cq_cmpl_init(bnad, rcb->cq->ccb);
 958
 959         bnad_free_all_rxbufs(bnad, rcb);
 960
 961         set_bit(BNAD_RXQ_STARTED, &rcb->flags);
 962
 963         /* Now allocate & post buffers for this RCB */
 964         /* !!Allocation in callback context */
 965         if (!test_and_set_bit(BNAD_RXQ_REFILL, &rcb->flags)) {
 966                 if (BNA_QE_FREE_CNT(unmap_q, unmap_q->q_depth)
 967                          >> BNAD_RXQ_REFILL_THRESHOLD_SHIFT)
 968                         bnad_alloc_n_post_rxbufs(bnad, rcb);
 969                 smp_mb__before_clear_bit();
 970                 clear_bit(BNAD_RXQ_REFILL, &rcb->flags);
 971         }
 972 }
 973
 974 static void
 975 bnad_cb_rx_disabled(void *arg, struct bna_rx *rx,
 976                         enum bna_cb_status status)
 977 {
 978         struct bnad *bnad = (struct bnad *)arg;
 979
 980         complete(&bnad->bnad_completions.rx_comp);
 981 }
 982
 983 static void
 984 bnad_cb_rx_mcast_add(struct bnad *bnad, struct bna_rx *rx,
 985                                 enum bna_cb_status status)
 986 {
 987         bnad->bnad_completions.mcast_comp_status = status;
 988         complete(&bnad->bnad_completions.mcast_comp);
 989 }
 990
 991 void
 992 bnad_cb_stats_get(struct bnad *bnad, enum bna_cb_status status,
 993                        struct bna_stats *stats)
 994 {
 995         if (status == BNA_CB_SUCCESS)
 996                 BNAD_UPDATE_CTR(bnad, hw_stats_updates);
 997
 998         if (!netif_running(bnad->netdev) ||
 999                 !test_bit(BNAD_RF_STATS_TIMER_RUNNING, &bnad->run_flags))
1000                 return;
1001
1002         mod_timer(&bnad->stats_timer,
1003                   jiffies + msecs_to_jiffies(BNAD_STATS_TIMER_FREQ));
1004 }
1005
1006 /* Resource allocation, free functions */
1007
1008 static void
1009 bnad_mem_free(struct bnad *bnad,
1010               struct bna_mem_info *mem_info)
1011 {
1012         int i;
1013         dma_addr_t dma_pa;
1014
1015         if (mem_info->mdl == NULL)
1016                 return;
1017
1018         for (i = 0; i < mem_info->num; i++) {
1019                 if (mem_info->mdl[i].kva != NULL) {
1020                         if (mem_info->mem_type == BNA_MEM_T_DMA) {
1021                                 BNA_GET_DMA_ADDR(&(mem_info->mdl[i].dma),
1022                                                 dma_pa);
1023                                 dma_free_coherent(&bnad->pcidev->dev,
1024                                                   mem_info->mdl[i].len,
1025                                                   mem_info->mdl[i].kva, dma_pa);
1026                         } else
1027                                 kfree(mem_info->mdl[i].kva);
1028                 }
1029         }
1030         kfree(mem_info->mdl);
1031         mem_info->mdl = NULL;
1032 }
1033
1034 static int
1035 bnad_mem_alloc(struct bnad *bnad,
1036                struct bna_mem_info *mem_info)
1037 {
1038         int i;
1039         dma_addr_t dma_pa;
1040
1041         if ((mem_info->num == 0) || (mem_info->len == 0)) {
1042                 mem_info->mdl = NULL;
1043                 return 0;
1044         }
1045
1046         mem_info->mdl = kcalloc(mem_info->num, sizeof(struct bna_mem_descr),
1047                                 GFP_KERNEL);
1048         if (mem_info->mdl == NULL)
1049                 return -ENOMEM;
1050
1051         if (mem_info->mem_type == BNA_MEM_T_DMA) {
1052                 for (i = 0; i < mem_info->num; i++) {
1053                         mem_info->mdl[i].len = mem_info->len;
1054                         mem_info->mdl[i].kva =
1055                                 dma_alloc_coherent(&bnad->pcidev->dev,
1056                                                 mem_info->len, &dma_pa,
1057                                                 GFP_KERNEL);
1058
1059                         if (mem_info->mdl[i].kva == NULL)
1060                                 goto err_return;
1061
1062                         BNA_SET_DMA_ADDR(dma_pa,
1063                                          &(mem_info->mdl[i].dma));
1064                 }
1065         } else {
1066                 for (i = 0; i < mem_info->num; i++) {
1067                         mem_info->mdl[i].len = mem_info->len;
1068                         mem_info->mdl[i].kva = kzalloc(mem_info->len,
1069                                                         GFP_KERNEL);
1070                         if (mem_info->mdl[i].kva == NULL)
1071                                 goto err_return;
1072                 }
1073         }
1074
1075         return 0;
1076
1077 err_return:
1078         bnad_mem_free(bnad, mem_info);
1079         return -ENOMEM;
1080 }
1081
1082 /* Free IRQ for Mailbox */
1083 static void
1084 bnad_mbox_irq_free(struct bnad *bnad,
1085                    struct bna_intr_info *intr_info)
1086 {
1087         int irq;
1088         unsigned long flags;
1089
1090         if (intr_info->idl == NULL)
1091                 return;
1092
1093         spin_lock_irqsave(&bnad->bna_lock, flags);
1094         bnad_disable_mbox_irq(bnad);
1095         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1096
1097         irq = BNAD_GET_MBOX_IRQ(bnad);
1098         free_irq(irq, bnad);
1099
1100         kfree(intr_info->idl);
1101 }
1102
1103 /*
1104  * Allocates IRQ for Mailbox, but keep it disabled
1105  * This will be enabled once we get the mbox enable callback
1106  * from bna
1107  */
1108 static int
1109 bnad_mbox_irq_alloc(struct bnad *bnad,
1110                     struct bna_intr_info *intr_info)
1111 {
1112         int             err = 0;
1113         unsigned long   flags;
1114         u32     irq;
1115         irq_handler_t   irq_handler;
1116
1117         /* Mbox should use only 1 vector */
1118
1119         intr_info->idl = kzalloc(sizeof(*(intr_info->idl)), GFP_KERNEL);
1120         if (!intr_info->idl)
1121                 return -ENOMEM;
1122
1123         spin_lock_irqsave(&bnad->bna_lock, flags);
1124         if (bnad->cfg_flags & BNAD_CF_MSIX) {
1125                 irq_handler = (irq_handler_t)bnad_msix_mbox_handler;
1126                 irq = bnad->msix_table[bnad->msix_num - 1].vector;
1127                 flags = 0;
1128                 intr_info->intr_type = BNA_INTR_T_MSIX;
1129                 intr_info->idl[0].vector = bnad->msix_num - 1;
1130         } else {
1131                 irq_handler = (irq_handler_t)bnad_isr;
1132                 irq = bnad->pcidev->irq;
1133                 flags = IRQF_SHARED;
1134                 intr_info->intr_type = BNA_INTR_T_INTX;
1135                 /* intr_info->idl.vector = 0 ? */
1136         }
1137         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1138
1139         sprintf(bnad->mbox_irq_name, "%s", BNAD_NAME);
1140
1141         /*
1142          * Set the Mbox IRQ disable flag, so that the IRQ handler
1143          * called from request_irq() for SHARED IRQs do not execute
1144          */
1145         set_bit(BNAD_RF_MBOX_IRQ_DISABLED, &bnad->run_flags);
1146
1147         BNAD_UPDATE_CTR(bnad, mbox_intr_disabled);
1148
1149         err = request_irq(irq, irq_handler, flags,
1150                           bnad->mbox_irq_name, bnad);
1151
1152         if (err) {
1153                 kfree(intr_info->idl);
1154                 intr_info->idl = NULL;
1155         }
1156
1157         return err;
1158 }
1159
1160 static void
1161 bnad_txrx_irq_free(struct bnad *bnad, struct bna_intr_info *intr_info)
1162 {
1163         kfree(intr_info->idl);
1164         intr_info->idl = NULL;
1165 }
1166
1167 /* Allocates Interrupt Descriptor List for MSIX/INT-X vectors */
1168 static int
1169 bnad_txrx_irq_alloc(struct bnad *bnad, enum bnad_intr_source src,
1170                     uint txrx_id, struct bna_intr_info *intr_info)
1171 {
1172         int i, vector_start = 0;
1173         u32 cfg_flags;
1174         unsigned long flags;
1175
1176         spin_lock_irqsave(&bnad->bna_lock, flags);
1177         cfg_flags = bnad->cfg_flags;
1178         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1179
1180         if (cfg_flags & BNAD_CF_MSIX) {
1181                 intr_info->intr_type = BNA_INTR_T_MSIX;
1182                 intr_info->idl = kcalloc(intr_info->num,
1183                                         sizeof(struct bna_intr_descr),
1184                                         GFP_KERNEL);
1185                 if (!intr_info->idl)
1186                         return -ENOMEM;
1187
1188                 switch (src) {
1189                 case BNAD_INTR_TX:
1190                         vector_start = txrx_id;
1191                         break;
1192
1193                 case BNAD_INTR_RX:
1194                         vector_start = bnad->num_tx * bnad->num_txq_per_tx +
1195                                         txrx_id;
1196                         break;
1197
1198                 default:
1199                         BUG();
1200                 }
1201
1202                 for (i = 0; i < intr_info->num; i++)
1203                         intr_info->idl[i].vector = vector_start + i;
1204         } else {
1205                 intr_info->intr_type = BNA_INTR_T_INTX;
1206                 intr_info->num = 1;
1207                 intr_info->idl = kcalloc(intr_info->num,
1208                                         sizeof(struct bna_intr_descr),
1209                                         GFP_KERNEL);
1210                 if (!intr_info->idl)
1211                         return -ENOMEM;
1212
1213                 switch (src) {
1214                 case BNAD_INTR_TX:
1215                         intr_info->idl[0].vector = 0x1; /* Bit mask : Tx IB */
1216                         break;
1217
1218                 case BNAD_INTR_RX:
1219                         intr_info->idl[0].vector = 0x2; /* Bit mask : Rx IB */
1220                         break;
1221                 }
1222         }
1223         return 0;
1224 }
1225
1226 /**
1227  * NOTE: Should be called for MSIX only
1228  * Unregisters Tx MSIX vector(s) from the kernel
1229  */
1230 static void
1231 bnad_tx_msix_unregister(struct bnad *bnad, struct bnad_tx_info *tx_info,
1232                         int num_txqs)
1233 {
1234         int i;
1235         int vector_num;
1236
1237         for (i = 0; i < num_txqs; i++) {
1238                 if (tx_info->tcb[i] == NULL)
1239                         continue;
1240
1241                 vector_num = tx_info->tcb[i]->intr_vector;
1242                 free_irq(bnad->msix_table[vector_num].vector, tx_info->tcb[i]);
1243         }
1244 }
1245
1246 /**
1247  * NOTE: Should be called for MSIX only
1248  * Registers Tx MSIX vector(s) and ISR(s), cookie with the kernel
1249  */
1250 static int
1251 bnad_tx_msix_register(struct bnad *bnad, struct bnad_tx_info *tx_info,
1252                         uint tx_id, int num_txqs)
1253 {
1254         int i;
1255         int err;
1256         int vector_num;
1257
1258         for (i = 0; i < num_txqs; i++) {
1259                 vector_num = tx_info->tcb[i]->intr_vector;
1260                 sprintf(tx_info->tcb[i]->name, "%s TXQ %d", bnad->netdev->name,
1261                                 tx_id + tx_info->tcb[i]->id);
1262                 err = request_irq(bnad->msix_table[vector_num].vector,
1263                                   (irq_handler_t)bnad_msix_tx, 0,
1264                                   tx_info->tcb[i]->name,
1265                                   tx_info->tcb[i]);
1266                 if (err)
1267                         goto err_return;
1268         }
1269
1270         return 0;
1271
1272 err_return:
1273         if (i > 0)
1274                 bnad_tx_msix_unregister(bnad, tx_info, (i - 1));
1275         return -1;
1276 }
1277
1278 /**
1279  * NOTE: Should be called for MSIX only
1280  * Unregisters Rx MSIX vector(s) from the kernel
1281  */
1282 static void
1283 bnad_rx_msix_unregister(struct bnad *bnad, struct bnad_rx_info *rx_info,
1284                         int num_rxps)
1285 {
1286         int i;
1287         int vector_num;
1288
1289         for (i = 0; i < num_rxps; i++) {
1290                 if (rx_info->rx_ctrl[i].ccb == NULL)
1291                         continue;
1292
1293                 vector_num = rx_info->rx_ctrl[i].ccb->intr_vector;
1294                 free_irq(bnad->msix_table[vector_num].vector,
1295                          rx_info->rx_ctrl[i].ccb);
1296         }
1297 }
1298
1299 /**
1300  * NOTE: Should be called for MSIX only
1301  * Registers Tx MSIX vector(s) and ISR(s), cookie with the kernel
1302  */
1303 static int
1304 bnad_rx_msix_register(struct bnad *bnad, struct bnad_rx_info *rx_info,
1305                         uint rx_id, int num_rxps)
1306 {
1307         int i;
1308         int err;
1309         int vector_num;
1310
1311         for (i = 0; i < num_rxps; i++) {
1312                 vector_num = rx_info->rx_ctrl[i].ccb->intr_vector;
1313                 sprintf(rx_info->rx_ctrl[i].ccb->name, "%s CQ %d",
1314                         bnad->netdev->name,
1315                         rx_id + rx_info->rx_ctrl[i].ccb->id);
1316                 err = request_irq(bnad->msix_table[vector_num].vector,
1317                                   (irq_handler_t)bnad_msix_rx, 0,
1318                                   rx_info->rx_ctrl[i].ccb->name,
1319                                   rx_info->rx_ctrl[i].ccb);
1320                 if (err)
1321                         goto err_return;
1322         }
1323
1324         return 0;
1325
1326 err_return:
1327         if (i > 0)
1328                 bnad_rx_msix_unregister(bnad, rx_info, (i - 1));
1329         return -1;
1330 }
1331
1332 /* Free Tx object Resources */
1333 static void
1334 bnad_tx_res_free(struct bnad *bnad, struct bna_res_info *res_info)
1335 {
1336         int i;
1337
1338         for (i = 0; i < BNA_TX_RES_T_MAX; i++) {
1339                 if (res_info[i].res_type == BNA_RES_T_MEM)
1340                         bnad_mem_free(bnad, &res_info[i].res_u.mem_info);
1341                 else if (res_info[i].res_type == BNA_RES_T_INTR)
1342                         bnad_txrx_irq_free(bnad, &res_info[i].res_u.intr_info);
1343         }
1344 }
1345
1346 /* Allocates memory and interrupt resources for Tx object */
1347 static int
1348 bnad_tx_res_alloc(struct bnad *bnad, struct bna_res_info *res_info,
1349                   uint tx_id)
1350 {
1351         int i, err = 0;
1352
1353         for (i = 0; i < BNA_TX_RES_T_MAX; i++) {
1354                 if (res_info[i].res_type == BNA_RES_T_MEM)
1355                         err = bnad_mem_alloc(bnad,
1356                                         &res_info[i].res_u.mem_info);
1357                 else if (res_info[i].res_type == BNA_RES_T_INTR)
1358                         err = bnad_txrx_irq_alloc(bnad, BNAD_INTR_TX, tx_id,
1359                                         &res_info[i].res_u.intr_info);
1360                 if (err)
1361                         goto err_return;
1362         }
1363         return 0;
1364
1365 err_return:
1366         bnad_tx_res_free(bnad, res_info);
1367         return err;
1368 }
1369
1370 /* Free Rx object Resources */
1371 static void
1372 bnad_rx_res_free(struct bnad *bnad, struct bna_res_info *res_info)
1373 {
1374         int i;
1375
1376         for (i = 0; i < BNA_RX_RES_T_MAX; i++) {
1377                 if (res_info[i].res_type == BNA_RES_T_MEM)
1378                         bnad_mem_free(bnad, &res_info[i].res_u.mem_info);
1379                 else if (res_info[i].res_type == BNA_RES_T_INTR)
1380                         bnad_txrx_irq_free(bnad, &res_info[i].res_u.intr_info);
1381         }
1382 }
1383
1384 /* Allocates memory and interrupt resources for Rx object */
1385 static int
1386 bnad_rx_res_alloc(struct bnad *bnad, struct bna_res_info *res_info,
1387                   uint rx_id)
1388 {
1389         int i, err = 0;
1390
1391         /* All memory needs to be allocated before setup_ccbs */
1392         for (i = 0; i < BNA_RX_RES_T_MAX; i++) {
1393                 if (res_info[i].res_type == BNA_RES_T_MEM)
1394                         err = bnad_mem_alloc(bnad,
1395                                         &res_info[i].res_u.mem_info);
1396                 else if (res_info[i].res_type == BNA_RES_T_INTR)
1397                         err = bnad_txrx_irq_alloc(bnad, BNAD_INTR_RX, rx_id,
1398                                         &res_info[i].res_u.intr_info);
1399                 if (err)
1400                         goto err_return;
1401         }
1402         return 0;
1403
1404 err_return:
1405         bnad_rx_res_free(bnad, res_info);
1406         return err;
1407 }
1408
1409 /* Timer callbacks */
1410 /* a) IOC timer */
1411 static void
1412 bnad_ioc_timeout(unsigned long data)
1413 {
1414         struct bnad *bnad = (struct bnad *)data;
1415         unsigned long flags;
1416
1417         spin_lock_irqsave(&bnad->bna_lock, flags);
1418         bfa_nw_ioc_timeout((void *) &bnad->bna.device.ioc);
1419         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1420 }
1421
1422 static void
1423 bnad_ioc_hb_check(unsigned long data)
1424 {
1425         struct bnad *bnad = (struct bnad *)data;
1426         unsigned long flags;
1427
1428         spin_lock_irqsave(&bnad->bna_lock, flags);
1429         bfa_nw_ioc_hb_check((void *) &bnad->bna.device.ioc);
1430         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1431 }
1432
1433 static void
1434 bnad_iocpf_timeout(unsigned long data)
1435 {
1436         struct bnad *bnad = (struct bnad *)data;
1437         unsigned long flags;
1438
1439         spin_lock_irqsave(&bnad->bna_lock, flags);
1440         bfa_nw_iocpf_timeout((void *) &bnad->bna.device.ioc);
1441         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1442 }
1443
1444 static void
1445 bnad_iocpf_sem_timeout(unsigned long data)
1446 {
1447         struct bnad *bnad = (struct bnad *)data;
1448         unsigned long flags;
1449
1450         spin_lock_irqsave(&bnad->bna_lock, flags);
1451         bfa_nw_iocpf_sem_timeout((void *) &bnad->bna.device.ioc);
1452         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1453 }
1454
1455 /*
1456  * All timer routines use bnad->bna_lock to protect against
1457  * the following race, which may occur in case of no locking:
1458  *      Time    CPU m           CPU n
1459  *      0       1 = test_bit
1460  *      1                       clear_bit
1461  *      2                       del_timer_sync
1462  *      3       mod_timer
1463  */
1464
1465 /* b) Dynamic Interrupt Moderation Timer */
1466 static void
1467 bnad_dim_timeout(unsigned long data)
1468 {
1469         struct bnad *bnad = (struct bnad *)data;
1470         struct bnad_rx_info *rx_info;
1471         struct bnad_rx_ctrl *rx_ctrl;
1472         int i, j;
1473         unsigned long flags;
1474
1475         if (!netif_carrier_ok(bnad->netdev))
1476                 return;
1477
1478         spin_lock_irqsave(&bnad->bna_lock, flags);
1479         for (i = 0; i < bnad->num_rx; i++) {
1480                 rx_info = &bnad->rx_info[i];
1481                 if (!rx_info->rx)
1482                         continue;
1483                 for (j = 0; j < bnad->num_rxp_per_rx; j++) {
1484                         rx_ctrl = &rx_info->rx_ctrl[j];
1485                         if (!rx_ctrl->ccb)
1486                                 continue;
1487                         bna_rx_dim_update(rx_ctrl->ccb);
1488                 }
1489         }
1490
1491         /* Check for BNAD_CF_DIM_ENABLED, does not eleminate a race */
1492         if (test_bit(BNAD_RF_DIM_TIMER_RUNNING, &bnad->run_flags))
1493                 mod_timer(&bnad->dim_timer,
1494                           jiffies + msecs_to_jiffies(BNAD_DIM_TIMER_FREQ));
1495         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1496 }
1497
1498 /* c)  Statistics Timer */
1499 static void
1500 bnad_stats_timeout(unsigned long data)
1501 {
1502         struct bnad *bnad = (struct bnad *)data;
1503         unsigned long flags;
1504
1505         if (!netif_running(bnad->netdev) ||
1506                 !test_bit(BNAD_RF_STATS_TIMER_RUNNING, &bnad->run_flags))
1507                 return;
1508
1509         spin_lock_irqsave(&bnad->bna_lock, flags);
1510         bna_stats_get(&bnad->bna);
1511         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1512 }
1513
1514 /*
1515  * Set up timer for DIM
1516  * Called with bnad->bna_lock held
1517  */
1518 void
1519 bnad_dim_timer_start(struct bnad *bnad)
1520 {
1521         if (bnad->cfg_flags & BNAD_CF_DIM_ENABLED &&
1522             !test_bit(BNAD_RF_DIM_TIMER_RUNNING, &bnad->run_flags)) {
1523                 setup_timer(&bnad->dim_timer, bnad_dim_timeout,
1524                             (unsigned long)bnad);
1525                 set_bit(BNAD_RF_DIM_TIMER_RUNNING, &bnad->run_flags);
1526                 mod_timer(&bnad->dim_timer,
1527                           jiffies + msecs_to_jiffies(BNAD_DIM_TIMER_FREQ));
1528         }
1529 }
1530
1531 /*
1532  * Set up timer for statistics
1533  * Called with mutex_lock(&bnad->conf_mutex) held
1534  */
1535 static void
1536 bnad_stats_timer_start(struct bnad *bnad)
1537 {
1538         unsigned long flags;
1539
1540         spin_lock_irqsave(&bnad->bna_lock, flags);
1541         if (!test_and_set_bit(BNAD_RF_STATS_TIMER_RUNNING, &bnad->run_flags)) {
1542                 setup_timer(&bnad->stats_timer, bnad_stats_timeout,
1543                             (unsigned long)bnad);
1544                 mod_timer(&bnad->stats_timer,
1545                           jiffies + msecs_to_jiffies(BNAD_STATS_TIMER_FREQ));
1546         }
1547         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1548 }
1549
1550 /*
1551  * Stops the stats timer
1552  * Called with mutex_lock(&bnad->conf_mutex) held
1553  */
1554 static void
1555 bnad_stats_timer_stop(struct bnad *bnad)
1556 {
1557         int to_del = 0;
1558         unsigned long flags;
1559
1560         spin_lock_irqsave(&bnad->bna_lock, flags);
1561         if (test_and_clear_bit(BNAD_RF_STATS_TIMER_RUNNING, &bnad->run_flags))
1562                 to_del = 1;
1563         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1564         if (to_del)
1565                 del_timer_sync(&bnad->stats_timer);
1566 }
1567
1568 /* Utilities */
1569
1570 static void
1571 bnad_netdev_mc_list_get(struct net_device *netdev, u8 *mc_list)
1572 {
1573         int i = 1; /* Index 0 has broadcast address */
1574         struct netdev_hw_addr *mc_addr;
1575
1576         netdev_for_each_mc_addr(mc_addr, netdev) {
1577                 memcpy(&mc_list[i * ETH_ALEN], &mc_addr->addr[0],
1578                                                         ETH_ALEN);
1579                 i++;
1580         }
1581 }
1582
1583 static int
1584 bnad_napi_poll_rx(struct napi_struct *napi, int budget)
1585 {
1586         struct bnad_rx_ctrl *rx_ctrl =
1587                 container_of(napi, struct bnad_rx_ctrl, napi);
1588         struct bna_ccb *ccb;
1589         struct bnad *bnad;
1590         int rcvd = 0;
1591
1592         ccb = rx_ctrl->ccb;
1593
1594         bnad = ccb->bnad;
1595
1596         if (!netif_carrier_ok(bnad->netdev))
1597                 goto poll_exit;
1598
1599         rcvd = bnad_poll_cq(bnad, ccb, budget);
1600         if (rcvd == budget)
1601                 return rcvd;
1602
1603 poll_exit:
1604         napi_complete((napi));
1605
1606         BNAD_UPDATE_CTR(bnad, netif_rx_complete);
1607
1608         bnad_enable_rx_irq(bnad, ccb);
1609         return rcvd;
1610 }
1611
1612 static void
1613 bnad_napi_enable(struct bnad *bnad, u32 rx_id)
1614 {
1615         struct bnad_rx_ctrl *rx_ctrl;
1616         int i;
1617
1618         /* Initialize & enable NAPI */
1619         for (i = 0; i < bnad->num_rxp_per_rx; i++) {
1620                 rx_ctrl = &bnad->rx_info[rx_id].rx_ctrl[i];
1621
1622                 netif_napi_add(bnad->netdev, &rx_ctrl->napi,
1623                                bnad_napi_poll_rx, 64);
1624
1625                 napi_enable(&rx_ctrl->napi);
1626         }
1627 }
1628
1629 static void
1630 bnad_napi_disable(struct bnad *bnad, u32 rx_id)
1631 {
1632         int i;
1633
1634         /* First disable and then clean up */
1635         for (i = 0; i < bnad->num_rxp_per_rx; i++) {
1636                 napi_disable(&bnad->rx_info[rx_id].rx_ctrl[i].napi);
1637                 netif_napi_del(&bnad->rx_info[rx_id].rx_ctrl[i].napi);
1638         }
1639 }
1640
1641 /* Should be held with conf_lock held */
1642 void
1643 bnad_cleanup_tx(struct bnad *bnad, uint tx_id)
1644 {
1645         struct bnad_tx_info *tx_info = &bnad->tx_info[tx_id];
1646         struct bna_res_info *res_info = &bnad->tx_res_info[tx_id].res_info[0];
1647         unsigned long flags;
1648
1649         if (!tx_info->tx)
1650                 return;
1651
1652         init_completion(&bnad->bnad_completions.tx_comp);
1653         spin_lock_irqsave(&bnad->bna_lock, flags);
1654         bna_tx_disable(tx_info->tx, BNA_HARD_CLEANUP, bnad_cb_tx_disabled);
1655         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1656         wait_for_completion(&bnad->bnad_completions.tx_comp);
1657
1658         if (tx_info->tcb[0]->intr_type == BNA_INTR_T_MSIX)
1659                 bnad_tx_msix_unregister(bnad, tx_info,
1660                         bnad->num_txq_per_tx);
1661
1662         spin_lock_irqsave(&bnad->bna_lock, flags);
1663         bna_tx_destroy(tx_info->tx);
1664         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1665
1666         tx_info->tx = NULL;
1667
1668         if (0 == tx_id)
1669                 tasklet_kill(&bnad->tx_free_tasklet);
1670
1671         bnad_tx_res_free(bnad, res_info);
1672 }
1673
1674 /* Should be held with conf_lock held */
1675 int
1676 bnad_setup_tx(struct bnad *bnad, uint tx_id)
1677 {
1678         int err;
1679         struct bnad_tx_info *tx_info = &bnad->tx_info[tx_id];
1680         struct bna_res_info *res_info = &bnad->tx_res_info[tx_id].res_info[0];
1681         struct bna_intr_info *intr_info =
1682                         &res_info[BNA_TX_RES_INTR_T_TXCMPL].res_u.intr_info;
1683         struct bna_tx_config *tx_config = &bnad->tx_config[tx_id];
1684         struct bna_tx_event_cbfn tx_cbfn;
1685         struct bna_tx *tx;
1686         unsigned long flags;
1687
1688         /* Initialize the Tx object configuration */
1689         tx_config->num_txq = bnad->num_txq_per_tx;
1690         tx_config->txq_depth = bnad->txq_depth;
1691         tx_config->tx_type = BNA_TX_T_REGULAR;
1692
1693         /* Initialize the tx event handlers */
1694         tx_cbfn.tcb_setup_cbfn = bnad_cb_tcb_setup;
1695         tx_cbfn.tcb_destroy_cbfn = bnad_cb_tcb_destroy;
1696         tx_cbfn.tx_stall_cbfn = bnad_cb_tx_stall;
1697         tx_cbfn.tx_resume_cbfn = bnad_cb_tx_resume;
1698         tx_cbfn.tx_cleanup_cbfn = bnad_cb_tx_cleanup;
1699
1700         /* Get BNA's resource requirement for one tx object */
1701         spin_lock_irqsave(&bnad->bna_lock, flags);
1702         bna_tx_res_req(bnad->num_txq_per_tx,
1703                 bnad->txq_depth, res_info);
1704         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1705
1706         /* Fill Unmap Q memory requirements */
1707         BNAD_FILL_UNMAPQ_MEM_REQ(
1708                         &res_info[BNA_TX_RES_MEM_T_UNMAPQ],
1709                         bnad->num_txq_per_tx,
1710                         BNAD_TX_UNMAPQ_DEPTH);
1711
1712         /* Allocate resources */
1713         err = bnad_tx_res_alloc(bnad, res_info, tx_id);
1714         if (err)
1715                 return err;
1716
1717         /* Ask BNA to create one Tx object, supplying required resources */
1718         spin_lock_irqsave(&bnad->bna_lock, flags);
1719         tx = bna_tx_create(&bnad->bna, bnad, tx_config, &tx_cbfn, res_info,
1720                         tx_info);
1721         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1722         if (!tx)
1723                 goto err_return;
1724         tx_info->tx = tx;
1725
1726         /* Register ISR for the Tx object */
1727         if (intr_info->intr_type == BNA_INTR_T_MSIX) {
1728                 err = bnad_tx_msix_register(bnad, tx_info,
1729                         tx_id, bnad->num_txq_per_tx);
1730                 if (err)
1731                         goto err_return;
1732         }
1733
1734         spin_lock_irqsave(&bnad->bna_lock, flags);
1735         bna_tx_enable(tx);
1736         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1737
1738         return 0;
1739
1740 err_return:
1741         bnad_tx_res_free(bnad, res_info);
1742         return err;
1743 }
1744
1745 /* Setup the rx config for bna_rx_create */
1746 /* bnad decides the configuration */
1747 static void
1748 bnad_init_rx_config(struct bnad *bnad, struct bna_rx_config *rx_config)
1749 {
1750         rx_config->rx_type = BNA_RX_T_REGULAR;
1751         rx_config->num_paths = bnad->num_rxp_per_rx;
1752
1753         if (bnad->num_rxp_per_rx > 1) {
1754                 rx_config->rss_status = BNA_STATUS_T_ENABLED;
1755                 rx_config->rss_config.hash_type =
1756                                 (BFI_RSS_T_V4_TCP |
1757                                  BFI_RSS_T_V6_TCP |
1758                                  BFI_RSS_T_V4_IP  |
1759                                  BFI_RSS_T_V6_IP);
1760                 rx_config->rss_config.hash_mask =
1761                                 bnad->num_rxp_per_rx - 1;
1762                 get_random_bytes(rx_config->rss_config.toeplitz_hash_key,
1763                         sizeof(rx_config->rss_config.toeplitz_hash_key));
1764         } else {
1765                 rx_config->rss_status = BNA_STATUS_T_DISABLED;
1766                 memset(&rx_config->rss_config, 0,
1767                        sizeof(rx_config->rss_config));
1768         }
1769         rx_config->rxp_type = BNA_RXP_SLR;
1770         rx_config->q_depth = bnad->rxq_depth;
1771
1772         rx_config->small_buff_size = BFI_SMALL_RXBUF_SIZE;
1773
1774         rx_config->vlan_strip_status = BNA_STATUS_T_ENABLED;
1775 }
1776
1777 /* Called with mutex_lock(&bnad->conf_mutex) held */
1778 void
1779 bnad_cleanup_rx(struct bnad *bnad, uint rx_id)
1780 {
1781         struct bnad_rx_info *rx_info = &bnad->rx_info[rx_id];
1782         struct bna_rx_config *rx_config = &bnad->rx_config[rx_id];
1783         struct bna_res_info *res_info = &bnad->rx_res_info[rx_id].res_info[0];
1784         unsigned long flags;
1785         int dim_timer_del = 0;
1786
1787         if (!rx_info->rx)
1788                 return;
1789
1790         if (0 == rx_id) {
1791                 spin_lock_irqsave(&bnad->bna_lock, flags);
1792                 dim_timer_del = bnad_dim_timer_running(bnad);
1793                 if (dim_timer_del)
1794                         clear_bit(BNAD_RF_DIM_TIMER_RUNNING, &bnad->run_flags);
1795                 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1796                 if (dim_timer_del)
1797                         del_timer_sync(&bnad->dim_timer);
1798         }
1799
1800         bnad_napi_disable(bnad, rx_id);
1801
1802         init_completion(&bnad->bnad_completions.rx_comp);
1803         spin_lock_irqsave(&bnad->bna_lock, flags);
1804         bna_rx_disable(rx_info->rx, BNA_HARD_CLEANUP, bnad_cb_rx_disabled);
1805         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1806         wait_for_completion(&bnad->bnad_completions.rx_comp);
1807
1808         if (rx_info->rx_ctrl[0].ccb->intr_type == BNA_INTR_T_MSIX)
1809                 bnad_rx_msix_unregister(bnad, rx_info, rx_config->num_paths);
1810
1811         spin_lock_irqsave(&bnad->bna_lock, flags);
1812         bna_rx_destroy(rx_info->rx);
1813         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1814
1815         rx_info->rx = NULL;
1816
1817         bnad_rx_res_free(bnad, res_info);
1818 }
1819
1820 /* Called with mutex_lock(&bnad->conf_mutex) held */
1821 int
1822 bnad_setup_rx(struct bnad *bnad, uint rx_id)
1823 {
1824         int err;
1825         struct bnad_rx_info *rx_info = &bnad->rx_info[rx_id];
1826         struct bna_res_info *res_info = &bnad->rx_res_info[rx_id].res_info[0];
1827         struct bna_intr_info *intr_info =
1828                         &res_info[BNA_RX_RES_T_INTR].res_u.intr_info;
1829         struct bna_rx_config *rx_config = &bnad->rx_config[rx_id];
1830         struct bna_rx_event_cbfn rx_cbfn;
1831         struct bna_rx *rx;
1832         unsigned long flags;
1833
1834         /* Initialize the Rx object configuration */
1835         bnad_init_rx_config(bnad, rx_config);
1836
1837         /* Initialize the Rx event handlers */
1838         rx_cbfn.rcb_setup_cbfn = bnad_cb_rcb_setup;
1839         rx_cbfn.rcb_destroy_cbfn = bnad_cb_rcb_destroy;
1840         rx_cbfn.rcb_destroy_cbfn = NULL;
1841         rx_cbfn.ccb_setup_cbfn = bnad_cb_ccb_setup;
1842         rx_cbfn.ccb_destroy_cbfn = bnad_cb_ccb_destroy;
1843         rx_cbfn.rx_cleanup_cbfn = bnad_cb_rx_cleanup;
1844         rx_cbfn.rx_post_cbfn = bnad_cb_rx_post;
1845
1846         /* Get BNA's resource requirement for one Rx object */
1847         spin_lock_irqsave(&bnad->bna_lock, flags);
1848         bna_rx_res_req(rx_config, res_info);
1849         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1850
1851         /* Fill Unmap Q memory requirements */
1852         BNAD_FILL_UNMAPQ_MEM_REQ(
1853                         &res_info[BNA_RX_RES_MEM_T_UNMAPQ],
1854                         rx_config->num_paths +
1855                         ((rx_config->rxp_type == BNA_RXP_SINGLE) ? 0 :
1856                                 rx_config->num_paths), BNAD_RX_UNMAPQ_DEPTH);
1857
1858         /* Allocate resource */
1859         err = bnad_rx_res_alloc(bnad, res_info, rx_id);
1860         if (err)
1861                 return err;
1862
1863         /* Ask BNA to create one Rx object, supplying required resources */
1864         spin_lock_irqsave(&bnad->bna_lock, flags);
1865         rx = bna_rx_create(&bnad->bna, bnad, rx_config, &rx_cbfn, res_info,
1866                         rx_info);
1867         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1868         if (!rx)
1869                 goto err_return;
1870         rx_info->rx = rx;
1871
1872         /* Register ISR for the Rx object */
1873         if (intr_info->intr_type == BNA_INTR_T_MSIX) {
1874                 err = bnad_rx_msix_register(bnad, rx_info, rx_id,
1875                                                 rx_config->num_paths);
1876                 if (err)
1877                         goto err_return;
1878         }
1879
1880         /* Enable NAPI */
1881         bnad_napi_enable(bnad, rx_id);
1882
1883         spin_lock_irqsave(&bnad->bna_lock, flags);
1884         if (0 == rx_id) {
1885                 /* Set up Dynamic Interrupt Moderation Vector */
1886                 if (bnad->cfg_flags & BNAD_CF_DIM_ENABLED)
1887                         bna_rx_dim_reconfig(&bnad->bna, bna_napi_dim_vector);
1888
1889                 /* Enable VLAN filtering only on the default Rx */
1890                 bna_rx_vlanfilter_enable(rx);
1891
1892                 /* Start the DIM timer */
1893                 bnad_dim_timer_start(bnad);
1894         }
1895
1896         bna_rx_enable(rx);
1897         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1898
1899         return 0;
1900
1901 err_return:
1902         bnad_cleanup_rx(bnad, rx_id);
1903         return err;
1904 }
1905
1906 /* Called with conf_lock & bnad->bna_lock held */
1907 void
1908 bnad_tx_coalescing_timeo_set(struct bnad *bnad)
1909 {
1910         struct bnad_tx_info *tx_info;
1911
1912         tx_info = &bnad->tx_info[0];
1913         if (!tx_info->tx)
1914                 return;
1915
1916         bna_tx_coalescing_timeo_set(tx_info->tx, bnad->tx_coalescing_timeo);
1917 }
1918
1919 /* Called with conf_lock & bnad->bna_lock held */
1920 void
1921 bnad_rx_coalescing_timeo_set(struct bnad *bnad)
1922 {
1923         struct bnad_rx_info *rx_info;
1924         int     i;
1925
1926         for (i = 0; i < bnad->num_rx; i++) {
1927                 rx_info = &bnad->rx_info[i];
1928                 if (!rx_info->rx)
1929                         continue;
1930                 bna_rx_coalescing_timeo_set(rx_info->rx,
1931                                 bnad->rx_coalescing_timeo);
1932         }
1933 }
1934
1935 /*
1936  * Called with bnad->bna_lock held
1937  */
1938 static int
1939 bnad_mac_addr_set_locked(struct bnad *bnad, u8 *mac_addr)
1940 {
1941         int ret;
1942
1943         if (!is_valid_ether_addr(mac_addr))
1944                 return -EADDRNOTAVAIL;
1945
1946         /* If datapath is down, pretend everything went through */
1947         if (!bnad->rx_info[0].rx)
1948                 return 0;
1949
1950         ret = bna_rx_ucast_set(bnad->rx_info[0].rx, mac_addr, NULL);
1951         if (ret != BNA_CB_SUCCESS)
1952                 return -EADDRNOTAVAIL;
1953
1954         return 0;
1955 }
1956
1957 /* Should be called with conf_lock held */
1958 static int
1959 bnad_enable_default_bcast(struct bnad *bnad)
1960 {
1961         struct bnad_rx_info *rx_info = &bnad->rx_info[0];
1962         int ret;
1963         unsigned long flags;
1964
1965         init_completion(&bnad->bnad_completions.mcast_comp);
1966
1967         spin_lock_irqsave(&bnad->bna_lock, flags);
1968         ret = bna_rx_mcast_add(rx_info->rx, (u8 *)bnad_bcast_addr,
1969                                 bnad_cb_rx_mcast_add);
1970         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1971
1972         if (ret == BNA_CB_SUCCESS)
1973                 wait_for_completion(&bnad->bnad_completions.mcast_comp);
1974         else
1975                 return -ENODEV;
1976
1977         if (bnad->bnad_completions.mcast_comp_status != BNA_CB_SUCCESS)
1978                 return -ENODEV;
1979
1980         return 0;
1981 }
1982
1983 /* Called with bnad_conf_lock() held */
1984 static void
1985 bnad_restore_vlans(struct bnad *bnad, u32 rx_id)
1986 {
1987         u16 vlan_id;
1988         unsigned long flags;
1989
1990         if (!bnad->vlan_grp)
1991                 return;
1992
1993         BUG_ON(!(VLAN_N_VID == (BFI_MAX_VLAN + 1)));
1994
1995         for (vlan_id = 0; vlan_id < VLAN_N_VID; vlan_id++) {
1996                 if (!vlan_group_get_device(bnad->vlan_grp, vlan_id))
1997                         continue;
1998                 spin_lock_irqsave(&bnad->bna_lock, flags);
1999                 bna_rx_vlan_add(bnad->rx_info[rx_id].rx, vlan_id);
2000                 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2001         }
2002 }
2003
2004 /* Statistics utilities */
2005 void
2006 bnad_netdev_qstats_fill(struct bnad *bnad, struct rtnl_link_stats64 *stats)
2007 {
2008         int i, j;
2009
2010         for (i = 0; i < bnad->num_rx; i++) {
2011                 for (j = 0; j < bnad->num_rxp_per_rx; j++) {
2012                         if (bnad->rx_info[i].rx_ctrl[j].ccb) {
2013                                 stats->rx_packets += bnad->rx_info[i].
2014                                 rx_ctrl[j].ccb->rcb[0]->rxq->rx_packets;
2015                                 stats->rx_bytes += bnad->rx_info[i].
2016                                         rx_ctrl[j].ccb->rcb[0]->rxq->rx_bytes;
2017                                 if (bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1] &&
2018                                         bnad->rx_info[i].rx_ctrl[j].ccb->
2019                                         rcb[1]->rxq) {
2020                                         stats->rx_packets +=
2021                                                 bnad->rx_info[i].rx_ctrl[j].
2022                                                 ccb->rcb[1]->rxq->rx_packets;
2023                                         stats->rx_bytes +=
2024                                                 bnad->rx_info[i].rx_ctrl[j].
2025                                                 ccb->rcb[1]->rxq->rx_bytes;
2026                                 }
2027                         }
2028                 }
2029         }
2030         for (i = 0; i < bnad->num_tx; i++) {
2031                 for (j = 0; j < bnad->num_txq_per_tx; j++) {
2032                         if (bnad->tx_info[i].tcb[j]) {
2033                                 stats->tx_packets +=
2034                                 bnad->tx_info[i].tcb[j]->txq->tx_packets;
2035                                 stats->tx_bytes +=
2036                                         bnad->tx_info[i].tcb[j]->txq->tx_bytes;
2037                         }
2038                 }
2039         }
2040 }
2041
2042 /*
2043  * Must be called with the bna_lock held.
2044  */
2045 void
2046 bnad_netdev_hwstats_fill(struct bnad *bnad, struct rtnl_link_stats64 *stats)
2047 {
2048         struct bfi_ll_stats_mac *mac_stats;
2049         u64 bmap;
2050         int i;
2051
2052         mac_stats = &bnad->stats.bna_stats->hw_stats->mac_stats;
2053         stats->rx_errors =
2054                 mac_stats->rx_fcs_error + mac_stats->rx_alignment_error +
2055                 mac_stats->rx_frame_length_error + mac_stats->rx_code_error +
2056                 mac_stats->rx_undersize;
2057         stats->tx_errors = mac_stats->tx_fcs_error +
2058                                         mac_stats->tx_undersize;
2059         stats->rx_dropped = mac_stats->rx_drop;
2060         stats->tx_dropped = mac_stats->tx_drop;
2061         stats->multicast = mac_stats->rx_multicast;
2062         stats->collisions = mac_stats->tx_total_collision;
2063
2064         stats->rx_length_errors = mac_stats->rx_frame_length_error;
2065
2066         /* receive ring buffer overflow  ?? */
2067
2068         stats->rx_crc_errors = mac_stats->rx_fcs_error;
2069         stats->rx_frame_errors = mac_stats->rx_alignment_error;
2070         /* recv'r fifo overrun */
2071         bmap = (u64)bnad->stats.bna_stats->rxf_bmap[0] |
2072                 ((u64)bnad->stats.bna_stats->rxf_bmap[1] << 32);
2073         for (i = 0; bmap && (i < BFI_LL_RXF_ID_MAX); i++) {
2074                 if (bmap & 1) {
2075                         stats->rx_fifo_errors +=
2076                                 bnad->stats.bna_stats->
2077                                         hw_stats->rxf_stats[i].frame_drops;
2078                         break;
2079                 }
2080                 bmap >>= 1;
2081         }
2082 }
2083
2084 static void
2085 bnad_mbox_irq_sync(struct bnad *bnad)
2086 {
2087         u32 irq;
2088         unsigned long flags;
2089
2090         spin_lock_irqsave(&bnad->bna_lock, flags);
2091         if (bnad->cfg_flags & BNAD_CF_MSIX)
2092                 irq = bnad->msix_table[bnad->msix_num - 1].vector;
2093         else
2094                 irq = bnad->pcidev->irq;
2095         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2096
2097         synchronize_irq(irq);
2098 }
2099
2100 /* Utility used by bnad_start_xmit, for doing TSO */
2101 static int
2102 bnad_tso_prepare(struct bnad *bnad, struct sk_buff *skb)
2103 {
2104         int err;
2105
2106         /* SKB_GSO_TCPV4 and SKB_GSO_TCPV6 is defined since 2.6.18. */
2107         BUG_ON(!(skb_shinfo(skb)->gso_type == SKB_GSO_TCPV4 ||
2108                    skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6));
2109         if (skb_header_cloned(skb)) {
2110                 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2111                 if (err) {
2112                         BNAD_UPDATE_CTR(bnad, tso_err);
2113                         return err;
2114                 }
2115         }
2116
2117         /*
2118          * For TSO, the TCP checksum field is seeded with pseudo-header sum
2119          * excluding the length field.
2120          */
2121         if (skb->protocol == htons(ETH_P_IP)) {
2122                 struct iphdr *iph = ip_hdr(skb);
2123
2124                 /* Do we really need these? */
2125                 iph->tot_len = 0;
2126                 iph->check = 0;
2127
2128                 tcp_hdr(skb)->check =
2129                         ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0,
2130                                            IPPROTO_TCP, 0);
2131                 BNAD_UPDATE_CTR(bnad, tso4);
2132         } else {
2133                 struct ipv6hdr *ipv6h = ipv6_hdr(skb);
2134
2135                 BUG_ON(!(skb->protocol == htons(ETH_P_IPV6)));
2136                 ipv6h->payload_len = 0;
2137                 tcp_hdr(skb)->check =
2138                         ~csum_ipv6_magic(&ipv6h->saddr, &ipv6h->daddr, 0,
2139                                          IPPROTO_TCP, 0);
2140                 BNAD_UPDATE_CTR(bnad, tso6);
2141         }
2142
2143         return 0;
2144 }
2145
2146 /*
2147  * Initialize Q numbers depending on Rx Paths
2148  * Called with bnad->bna_lock held, because of cfg_flags
2149  * access.
2150  */
2151 static void
2152 bnad_q_num_init(struct bnad *bnad)
2153 {
2154         int rxps;
2155
2156         rxps = min((uint)num_online_cpus(),
2157                         (uint)(BNAD_MAX_RXS * BNAD_MAX_RXPS_PER_RX));
2158
2159         if (!(bnad->cfg_flags & BNAD_CF_MSIX))
2160                 rxps = 1;       /* INTx */
2161
2162         bnad->num_rx = 1;
2163         bnad->num_tx = 1;
2164         bnad->num_rxp_per_rx = rxps;
2165         bnad->num_txq_per_tx = BNAD_TXQ_NUM;
2166 }
2167
2168 /*
2169  * Adjusts the Q numbers, given a number of msix vectors
2170  * Give preference to RSS as opposed to Tx priority Queues,
2171  * in such a case, just use 1 Tx Q
2172  * Called with bnad->bna_lock held b'cos of cfg_flags access
2173  */
2174 static void
2175 bnad_q_num_adjust(struct bnad *bnad, int msix_vectors)
2176 {
2177         bnad->num_txq_per_tx = 1;
2178         if ((msix_vectors >= (bnad->num_tx * bnad->num_txq_per_tx)  +
2179              bnad_rxqs_per_cq + BNAD_MAILBOX_MSIX_VECTORS) &&
2180             (bnad->cfg_flags & BNAD_CF_MSIX)) {
2181                 bnad->num_rxp_per_rx = msix_vectors -
2182                         (bnad->num_tx * bnad->num_txq_per_tx) -
2183                         BNAD_MAILBOX_MSIX_VECTORS;
2184         } else
2185                 bnad->num_rxp_per_rx = 1;
2186 }
2187
2188 /* Enable / disable device */
2189 static void
2190 bnad_device_disable(struct bnad *bnad)
2191 {
2192         unsigned long flags;
2193
2194         init_completion(&bnad->bnad_completions.ioc_comp);
2195
2196         spin_lock_irqsave(&bnad->bna_lock, flags);
2197         bna_device_disable(&bnad->bna.device, BNA_HARD_CLEANUP);
2198         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2199
2200         wait_for_completion(&bnad->bnad_completions.ioc_comp);
2201 }
2202
2203 static int
2204 bnad_device_enable(struct bnad *bnad)
2205 {
2206         int err = 0;
2207         unsigned long flags;
2208
2209         init_completion(&bnad->bnad_completions.ioc_comp);
2210
2211         spin_lock_irqsave(&bnad->bna_lock, flags);
2212         bna_device_enable(&bnad->bna.device);
2213         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2214
2215         wait_for_completion(&bnad->bnad_completions.ioc_comp);
2216
2217         if (bnad->bnad_completions.ioc_comp_status)
2218                 err = bnad->bnad_completions.ioc_comp_status;
2219
2220         return err;
2221 }
2222
2223 /* Free BNA resources */
2224 static void
2225 bnad_res_free(struct bnad *bnad)
2226 {
2227         int i;
2228         struct bna_res_info *res_info = &bnad->res_info[0];
2229
2230         for (i = 0; i < BNA_RES_T_MAX; i++) {
2231                 if (res_info[i].res_type == BNA_RES_T_MEM)
2232                         bnad_mem_free(bnad, &res_info[i].res_u.mem_info);
2233                 else
2234                         bnad_mbox_irq_free(bnad, &res_info[i].res_u.intr_info);
2235         }
2236 }
2237
2238 /* Allocates memory and interrupt resources for BNA */
2239 static int
2240 bnad_res_alloc(struct bnad *bnad)
2241 {
2242         int i, err;
2243         struct bna_res_info *res_info = &bnad->res_info[0];
2244
2245         for (i = 0; i < BNA_RES_T_MAX; i++) {
2246                 if (res_info[i].res_type == BNA_RES_T_MEM)
2247                         err = bnad_mem_alloc(bnad, &res_info[i].res_u.mem_info);
2248                 else
2249                         err = bnad_mbox_irq_alloc(bnad,
2250                                                   &res_info[i].res_u.intr_info);
2251                 if (err)
2252                         goto err_return;
2253         }
2254         return 0;
2255
2256 err_return:
2257         bnad_res_free(bnad);
2258         return err;
2259 }
2260
2261 /* Interrupt enable / disable */
2262 static void
2263 bnad_enable_msix(struct bnad *bnad)
2264 {
2265         int i, ret;
2266         unsigned long flags;
2267
2268         spin_lock_irqsave(&bnad->bna_lock, flags);
2269         if (!(bnad->cfg_flags & BNAD_CF_MSIX)) {
2270                 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2271                 return;
2272         }
2273         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2274
2275         if (bnad->msix_table)
2276                 return;
2277
2278         bnad->msix_table =
2279                 kcalloc(bnad->msix_num, sizeof(struct msix_entry), GFP_KERNEL);
2280
2281         if (!bnad->msix_table)
2282                 goto intx_mode;
2283
2284         for (i = 0; i < bnad->msix_num; i++)
2285                 bnad->msix_table[i].entry = i;
2286
2287         ret = pci_enable_msix(bnad->pcidev, bnad->msix_table, bnad->msix_num);
2288         if (ret > 0) {
2289                 /* Not enough MSI-X vectors. */
2290
2291                 spin_lock_irqsave(&bnad->bna_lock, flags);
2292                 /* ret = #of vectors that we got */
2293                 bnad_q_num_adjust(bnad, ret);
2294                 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2295
2296                 bnad->msix_num = (bnad->num_tx * bnad->num_txq_per_tx)
2297                         + (bnad->num_rx
2298                         * bnad->num_rxp_per_rx) +
2299                          BNAD_MAILBOX_MSIX_VECTORS;
2300
2301                 /* Try once more with adjusted numbers */
2302                 /* If this fails, fall back to INTx */
2303                 ret = pci_enable_msix(bnad->pcidev, bnad->msix_table,
2304                                       bnad->msix_num);
2305                 if (ret)
2306                         goto intx_mode;
2307
2308         } else if (ret < 0)
2309                 goto intx_mode;
2310         return;
2311
2312 intx_mode:
2313
2314         kfree(bnad->msix_table);
2315         bnad->msix_table = NULL;
2316         bnad->msix_num = 0;
2317         spin_lock_irqsave(&bnad->bna_lock, flags);
2318         bnad->cfg_flags &= ~BNAD_CF_MSIX;
2319         bnad_q_num_init(bnad);
2320         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2321 }
2322
2323 static void
2324 bnad_disable_msix(struct bnad *bnad)
2325 {
2326         u32 cfg_flags;
2327         unsigned long flags;
2328
2329         spin_lock_irqsave(&bnad->bna_lock, flags);
2330         cfg_flags = bnad->cfg_flags;
2331         if (bnad->cfg_flags & BNAD_CF_MSIX)
2332                 bnad->cfg_flags &= ~BNAD_CF_MSIX;
2333         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2334
2335         if (cfg_flags & BNAD_CF_MSIX) {
2336                 pci_disable_msix(bnad->pcidev);
2337                 kfree(bnad->msix_table);
2338                 bnad->msix_table = NULL;
2339         }
2340 }
2341
2342 /* Netdev entry points */
2343 static int
2344 bnad_open(struct net_device *netdev)
2345 {
2346         int err;
2347         struct bnad *bnad = netdev_priv(netdev);
2348         struct bna_pause_config pause_config;
2349         int mtu;
2350         unsigned long flags;
2351
2352         mutex_lock(&bnad->conf_mutex);
2353
2354         /* Tx */
2355         err = bnad_setup_tx(bnad, 0);
2356         if (err)
2357                 goto err_return;
2358
2359         /* Rx */
2360         err = bnad_setup_rx(bnad, 0);
2361         if (err)
2362                 goto cleanup_tx;
2363
2364         /* Port */
2365         pause_config.tx_pause = 0;
2366         pause_config.rx_pause = 0;
2367
2368         mtu = ETH_HLEN + bnad->netdev->mtu + ETH_FCS_LEN;
2369
2370         spin_lock_irqsave(&bnad->bna_lock, flags);
2371         bna_port_mtu_set(&bnad->bna.port, mtu, NULL);
2372         bna_port_pause_config(&bnad->bna.port, &pause_config, NULL);
2373         bna_port_enable(&bnad->bna.port);
2374         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2375
2376         /* Enable broadcast */
2377         bnad_enable_default_bcast(bnad);
2378
2379         /* Restore VLANs, if any */
2380         bnad_restore_vlans(bnad, 0);
2381
2382         /* Set the UCAST address */
2383         spin_lock_irqsave(&bnad->bna_lock, flags);
2384         bnad_mac_addr_set_locked(bnad, netdev->dev_addr);
2385         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2386
2387         /* Start the stats timer */
2388         bnad_stats_timer_start(bnad);
2389
2390         mutex_unlock(&bnad->conf_mutex);
2391
2392         return 0;
2393
2394 cleanup_tx:
2395         bnad_cleanup_tx(bnad, 0);
2396
2397 err_return:
2398         mutex_unlock(&bnad->conf_mutex);
2399         return err;
2400 }
2401
2402 static int
2403 bnad_stop(struct net_device *netdev)
2404 {
2405         struct bnad *bnad = netdev_priv(netdev);
2406         unsigned long flags;
2407
2408         mutex_lock(&bnad->conf_mutex);
2409
2410         /* Stop the stats timer */
2411         bnad_stats_timer_stop(bnad);
2412
2413         init_completion(&bnad->bnad_completions.port_comp);
2414
2415         spin_lock_irqsave(&bnad->bna_lock, flags);
2416         bna_port_disable(&bnad->bna.port, BNA_HARD_CLEANUP,
2417                         bnad_cb_port_disabled);
2418         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2419
2420         wait_for_completion(&bnad->bnad_completions.port_comp);
2421
2422         bnad_cleanup_tx(bnad, 0);
2423         bnad_cleanup_rx(bnad, 0);
2424
2425         /* Synchronize mailbox IRQ */
2426         bnad_mbox_irq_sync(bnad);
2427
2428         mutex_unlock(&bnad->conf_mutex);
2429
2430         return 0;
2431 }
2432
2433 /* TX */
2434 /*
2435  * bnad_start_xmit : Netdev entry point for Transmit
2436  *                   Called under lock held by net_device
2437  */
2438 static netdev_tx_t
2439 bnad_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2440 {
2441         struct bnad *bnad = netdev_priv(netdev);
2442
2443         u16             txq_prod, vlan_tag = 0;
2444         u32             unmap_prod, wis, wis_used, wi_range;
2445         u32             vectors, vect_id, i, acked;
2446         u32             tx_id;
2447         int                     err;
2448
2449         struct bnad_tx_info *tx_info;
2450         struct bna_tcb *tcb;
2451         struct bnad_unmap_q *unmap_q;
2452         dma_addr_t              dma_addr;
2453         struct bna_txq_entry *txqent;
2454         bna_txq_wi_ctrl_flag_t  flags;
2455
2456         if (unlikely
2457             (skb->len <= ETH_HLEN || skb->len > BFI_TX_MAX_DATA_PER_PKT)) {
2458                 dev_kfree_skb(skb);
2459                 return NETDEV_TX_OK;
2460         }
2461
2462         tx_id = 0;
2463
2464         tx_info = &bnad->tx_info[tx_id];
2465         tcb = tx_info->tcb[tx_id];
2466         unmap_q = tcb->unmap_q;
2467
2468         /*
2469          * Takes care of the Tx that is scheduled between clearing the flag
2470          * and the netif_stop_queue() call.
2471          */
2472         if (unlikely(!test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags))) {
2473                 dev_kfree_skb(skb);
2474                 return NETDEV_TX_OK;
2475         }
2476
2477         vectors = 1 + skb_shinfo(skb)->nr_frags;
2478         if (vectors > BFI_TX_MAX_VECTORS_PER_PKT) {
2479                 dev_kfree_skb(skb);
2480                 return NETDEV_TX_OK;
2481         }
2482         wis = BNA_TXQ_WI_NEEDED(vectors);       /* 4 vectors per work item */
2483         acked = 0;
2484         if (unlikely
2485             (wis > BNA_QE_FREE_CNT(tcb, tcb->q_depth) ||
2486              vectors > BNA_QE_FREE_CNT(unmap_q, unmap_q->q_depth))) {
2487                 if ((u16) (*tcb->hw_consumer_index) !=
2488                     tcb->consumer_index &&
2489                     !test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags)) {
2490                         acked = bnad_free_txbufs(bnad, tcb);
2491                         if (likely(test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)))
2492                                 bna_ib_ack(tcb->i_dbell, acked);
2493                         smp_mb__before_clear_bit();
2494                         clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
2495                 } else {
2496                         netif_stop_queue(netdev);
2497                         BNAD_UPDATE_CTR(bnad, netif_queue_stop);
2498                 }
2499
2500                 smp_mb();
2501                 /*
2502                  * Check again to deal with race condition between
2503                  * netif_stop_queue here, and netif_wake_queue in
2504                  * interrupt handler which is not inside netif tx lock.
2505                  */
2506                 if (likely
2507                     (wis > BNA_QE_FREE_CNT(tcb, tcb->q_depth) ||
2508                      vectors > BNA_QE_FREE_CNT(unmap_q, unmap_q->q_depth))) {
2509                         BNAD_UPDATE_CTR(bnad, netif_queue_stop);
2510                         return NETDEV_TX_BUSY;
2511                 } else {
2512                         netif_wake_queue(netdev);
2513                         BNAD_UPDATE_CTR(bnad, netif_queue_wakeup);
2514                 }
2515         }
2516
2517         unmap_prod = unmap_q->producer_index;
2518         wis_used = 1;
2519         vect_id = 0;
2520         flags = 0;
2521
2522         txq_prod = tcb->producer_index;
2523         BNA_TXQ_QPGE_PTR_GET(txq_prod, tcb->sw_qpt, txqent, wi_range);
2524         BUG_ON(!(wi_range <= tcb->q_depth));
2525         txqent->hdr.wi.reserved = 0;
2526         txqent->hdr.wi.num_vectors = vectors;
2527         txqent->hdr.wi.opcode =
2528                 htons((skb_is_gso(skb) ? BNA_TXQ_WI_SEND_LSO :
2529                        BNA_TXQ_WI_SEND));
2530
2531         if (vlan_tx_tag_present(skb)) {
2532                 vlan_tag = (u16) vlan_tx_tag_get(skb);
2533                 flags |= (BNA_TXQ_WI_CF_INS_PRIO | BNA_TXQ_WI_CF_INS_VLAN);
2534         }
2535         if (test_bit(BNAD_RF_CEE_RUNNING, &bnad->run_flags)) {
2536                 vlan_tag =
2537                         (tcb->priority & 0x7) << 13 | (vlan_tag & 0x1fff);
2538                 flags |= (BNA_TXQ_WI_CF_INS_PRIO | BNA_TXQ_WI_CF_INS_VLAN);
2539         }
2540
2541         txqent->hdr.wi.vlan_tag = htons(vlan_tag);
2542
2543         if (skb_is_gso(skb)) {
2544                 err = bnad_tso_prepare(bnad, skb);
2545                 if (err) {
2546                         dev_kfree_skb(skb);
2547                         return NETDEV_TX_OK;
2548                 }
2549                 txqent->hdr.wi.lso_mss = htons(skb_is_gso(skb));
2550                 flags |= (BNA_TXQ_WI_CF_IP_CKSUM | BNA_TXQ_WI_CF_TCP_CKSUM);
2551                 txqent->hdr.wi.l4_hdr_size_n_offset =
2552                         htons(BNA_TXQ_WI_L4_HDR_N_OFFSET
2553                               (tcp_hdrlen(skb) >> 2,
2554                                skb_transport_offset(skb)));
2555         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
2556                 u8 proto = 0;
2557
2558                 txqent->hdr.wi.lso_mss = 0;
2559
2560                 if (skb->protocol == htons(ETH_P_IP))
2561                         proto = ip_hdr(skb)->protocol;
2562                 else if (skb->protocol == htons(ETH_P_IPV6)) {
2563                         /* nexthdr may not be TCP immediately. */
2564                         proto = ipv6_hdr(skb)->nexthdr;
2565                 }
2566                 if (proto == IPPROTO_TCP) {
2567                         flags |= BNA_TXQ_WI_CF_TCP_CKSUM;
2568                         txqent->hdr.wi.l4_hdr_size_n_offset =
2569                                 htons(BNA_TXQ_WI_L4_HDR_N_OFFSET
2570                                       (0, skb_transport_offset(skb)));
2571
2572                         BNAD_UPDATE_CTR(bnad, tcpcsum_offload);
2573
2574                         BUG_ON(!(skb_headlen(skb) >=
2575                                 skb_transport_offset(skb) + tcp_hdrlen(skb)));
2576
2577                 } else if (proto == IPPROTO_UDP) {
2578                         flags |= BNA_TXQ_WI_CF_UDP_CKSUM;
2579                         txqent->hdr.wi.l4_hdr_size_n_offset =
2580                                 htons(BNA_TXQ_WI_L4_HDR_N_OFFSET
2581                                       (0, skb_transport_offset(skb)));
2582
2583                         BNAD_UPDATE_CTR(bnad, udpcsum_offload);
2584
2585                         BUG_ON(!(skb_headlen(skb) >=
2586                                    skb_transport_offset(skb) +
2587                                    sizeof(struct udphdr)));
2588                 } else {
2589                         err = skb_checksum_help(skb);
2590                         BNAD_UPDATE_CTR(bnad, csum_help);
2591                         if (err) {
2592                                 dev_kfree_skb(skb);
2593                                 BNAD_UPDATE_CTR(bnad, csum_help_err);
2594                                 return NETDEV_TX_OK;
2595                         }
2596                 }
2597         } else {
2598                 txqent->hdr.wi.lso_mss = 0;
2599                 txqent->hdr.wi.l4_hdr_size_n_offset = 0;
2600         }
2601
2602         txqent->hdr.wi.flags = htons(flags);
2603
2604         txqent->hdr.wi.frame_length = htonl(skb->len);
2605
2606         unmap_q->unmap_array[unmap_prod].skb = skb;
2607         BUG_ON(!(skb_headlen(skb) <= BFI_TX_MAX_DATA_PER_VECTOR));
2608         txqent->vector[vect_id].length = htons(skb_headlen(skb));
2609         dma_addr = dma_map_single(&bnad->pcidev->dev, skb->data,
2610                                   skb_headlen(skb), DMA_TO_DEVICE);
2611         dma_unmap_addr_set(&unmap_q->unmap_array[unmap_prod], dma_addr,
2612                            dma_addr);
2613
2614         BNA_SET_DMA_ADDR(dma_addr, &txqent->vector[vect_id].host_addr);
2615         BNA_QE_INDX_ADD(unmap_prod, 1, unmap_q->q_depth);
2616
2617         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2618                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
2619                 u32             size = frag->size;
2620
2621                 if (++vect_id == BFI_TX_MAX_VECTORS_PER_WI) {
2622                         vect_id = 0;
2623                         if (--wi_range)
2624                                 txqent++;
2625                         else {
2626                                 BNA_QE_INDX_ADD(txq_prod, wis_used,
2627                                                 tcb->q_depth);
2628                                 wis_used = 0;
2629                                 BNA_TXQ_QPGE_PTR_GET(txq_prod, tcb->sw_qpt,
2630                                                      txqent, wi_range);
2631                                 BUG_ON(!(wi_range <= tcb->q_depth));
2632                         }
2633                         wis_used++;
2634                         txqent->hdr.wi_ext.opcode = htons(BNA_TXQ_WI_EXTENSION);
2635                 }
2636
2637                 BUG_ON(!(size <= BFI_TX_MAX_DATA_PER_VECTOR));
2638                 txqent->vector[vect_id].length = htons(size);
2639                 dma_addr = dma_map_page(&bnad->pcidev->dev, frag->page,
2640                                         frag->page_offset, size, DMA_TO_DEVICE);
2641                 dma_unmap_addr_set(&unmap_q->unmap_array[unmap_prod], dma_addr,
2642                                    dma_addr);
2643                 BNA_SET_DMA_ADDR(dma_addr, &txqent->vector[vect_id].host_addr);
2644                 BNA_QE_INDX_ADD(unmap_prod, 1, unmap_q->q_depth);
2645         }
2646
2647         unmap_q->producer_index = unmap_prod;
2648         BNA_QE_INDX_ADD(txq_prod, wis_used, tcb->q_depth);
2649         tcb->producer_index = txq_prod;
2650
2651         smp_mb();
2652
2653         if (unlikely(!test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)))
2654                 return NETDEV_TX_OK;
2655
2656         bna_txq_prod_indx_doorbell(tcb);
2657
2658         if ((u16) (*tcb->hw_consumer_index) != tcb->consumer_index)
2659                 tasklet_schedule(&bnad->tx_free_tasklet);
2660
2661         return NETDEV_TX_OK;
2662 }
2663
2664 /*
2665  * Used spin_lock to synchronize reading of stats structures, which
2666  * is written by BNA under the same lock.
2667  */
2668 static struct rtnl_link_stats64 *
2669 bnad_get_stats64(struct net_device *netdev, struct rtnl_link_stats64 *stats)
2670 {
2671         struct bnad *bnad = netdev_priv(netdev);
2672         unsigned long flags;
2673
2674         spin_lock_irqsave(&bnad->bna_lock, flags);
2675
2676         bnad_netdev_qstats_fill(bnad, stats);
2677         bnad_netdev_hwstats_fill(bnad, stats);
2678
2679         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2680
2681         return stats;
2682 }
2683
2684 static void
2685 bnad_set_rx_mode(struct net_device *netdev)
2686 {
2687         struct bnad *bnad = netdev_priv(netdev);
2688         u32     new_mask, valid_mask;
2689         unsigned long flags;
2690
2691         spin_lock_irqsave(&bnad->bna_lock, flags);
2692
2693         new_mask = valid_mask = 0;
2694
2695         if (netdev->flags & IFF_PROMISC) {
2696                 if (!(bnad->cfg_flags & BNAD_CF_PROMISC)) {
2697                         new_mask = BNAD_RXMODE_PROMISC_DEFAULT;
2698                         valid_mask = BNAD_RXMODE_PROMISC_DEFAULT;
2699                         bnad->cfg_flags |= BNAD_CF_PROMISC;
2700                 }
2701         } else {
2702                 if (bnad->cfg_flags & BNAD_CF_PROMISC) {
2703                         new_mask = ~BNAD_RXMODE_PROMISC_DEFAULT;
2704                         valid_mask = BNAD_RXMODE_PROMISC_DEFAULT;
2705                         bnad->cfg_flags &= ~BNAD_CF_PROMISC;
2706                 }
2707         }
2708
2709         if (netdev->flags & IFF_ALLMULTI) {
2710                 if (!(bnad->cfg_flags & BNAD_CF_ALLMULTI)) {
2711                         new_mask |= BNA_RXMODE_ALLMULTI;
2712                         valid_mask |= BNA_RXMODE_ALLMULTI;
2713                         bnad->cfg_flags |= BNAD_CF_ALLMULTI;
2714                 }
2715         } else {
2716                 if (bnad->cfg_flags & BNAD_CF_ALLMULTI) {
2717                         new_mask &= ~BNA_RXMODE_ALLMULTI;
2718                         valid_mask |= BNA_RXMODE_ALLMULTI;
2719                         bnad->cfg_flags &= ~BNAD_CF_ALLMULTI;
2720                 }
2721         }
2722
2723         bna_rx_mode_set(bnad->rx_info[0].rx, new_mask, valid_mask, NULL);
2724
2725         if (!netdev_mc_empty(netdev)) {
2726                 u8 *mcaddr_list;
2727                 int mc_count = netdev_mc_count(netdev);
2728
2729                 /* Index 0 holds the broadcast address */
2730                 mcaddr_list =
2731                         kzalloc((mc_count + 1) * ETH_ALEN,
2732                                 GFP_ATOMIC);
2733                 if (!mcaddr_list)
2734                         goto unlock;
2735
2736                 memcpy(&mcaddr_list[0], &bnad_bcast_addr[0], ETH_ALEN);
2737
2738                 /* Copy rest of the MC addresses */
2739                 bnad_netdev_mc_list_get(netdev, mcaddr_list);
2740
2741                 bna_rx_mcast_listset(bnad->rx_info[0].rx, mc_count + 1,
2742                                         mcaddr_list, NULL);
2743
2744                 /* Should we enable BNAD_CF_ALLMULTI for err != 0 ? */
2745                 kfree(mcaddr_list);
2746         }
2747 unlock:
2748         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2749 }
2750
2751 /*
2752  * bna_lock is used to sync writes to netdev->addr
2753  * conf_lock cannot be used since this call may be made
2754  * in a non-blocking context.
2755  */
2756 static int
2757 bnad_set_mac_address(struct net_device *netdev, void *mac_addr)
2758 {
2759         int err;
2760         struct bnad *bnad = netdev_priv(netdev);
2761         struct sockaddr *sa = (struct sockaddr *)mac_addr;
2762         unsigned long flags;
2763
2764         spin_lock_irqsave(&bnad->bna_lock, flags);
2765
2766         err = bnad_mac_addr_set_locked(bnad, sa->sa_data);
2767
2768         if (!err)
2769                 memcpy(netdev->dev_addr, sa->sa_data, netdev->addr_len);
2770
2771         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2772
2773         return err;
2774 }
2775
2776 static int
2777 bnad_change_mtu(struct net_device *netdev, int new_mtu)
2778 {
2779         int mtu, err = 0;
2780         unsigned long flags;
2781
2782         struct bnad *bnad = netdev_priv(netdev);
2783
2784         if (new_mtu + ETH_HLEN < ETH_ZLEN || new_mtu > BNAD_JUMBO_MTU)
2785                 return -EINVAL;
2786
2787         mutex_lock(&bnad->conf_mutex);
2788
2789         netdev->mtu = new_mtu;
2790
2791         mtu = ETH_HLEN + new_mtu + ETH_FCS_LEN;
2792
2793         spin_lock_irqsave(&bnad->bna_lock, flags);
2794         bna_port_mtu_set(&bnad->bna.port, mtu, NULL);
2795         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2796
2797         mutex_unlock(&bnad->conf_mutex);
2798         return err;
2799 }
2800
2801 static void
2802 bnad_vlan_rx_register(struct net_device *netdev,
2803                                   struct vlan_group *vlan_grp)
2804 {
2805         struct bnad *bnad = netdev_priv(netdev);
2806
2807         mutex_lock(&bnad->conf_mutex);
2808         bnad->vlan_grp = vlan_grp;
2809         mutex_unlock(&bnad->conf_mutex);
2810 }
2811
2812 static void
2813 bnad_vlan_rx_add_vid(struct net_device *netdev,
2814                                  unsigned short vid)
2815 {
2816         struct bnad *bnad = netdev_priv(netdev);
2817         unsigned long flags;
2818
2819         if (!bnad->rx_info[0].rx)
2820                 return;
2821
2822         mutex_lock(&bnad->conf_mutex);
2823
2824         spin_lock_irqsave(&bnad->bna_lock, flags);
2825         bna_rx_vlan_add(bnad->rx_info[0].rx, vid);
2826         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2827
2828         mutex_unlock(&bnad->conf_mutex);
2829 }
2830
2831 static void
2832 bnad_vlan_rx_kill_vid(struct net_device *netdev,
2833                                   unsigned short vid)
2834 {
2835         struct bnad *bnad = netdev_priv(netdev);
2836         unsigned long flags;
2837
2838         if (!bnad->rx_info[0].rx)
2839                 return;
2840
2841         mutex_lock(&bnad->conf_mutex);
2842
2843         spin_lock_irqsave(&bnad->bna_lock, flags);
2844         bna_rx_vlan_del(bnad->rx_info[0].rx, vid);
2845         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2846
2847         mutex_unlock(&bnad->conf_mutex);
2848 }
2849
2850 #ifdef CONFIG_NET_POLL_CONTROLLER
2851 static void
2852 bnad_netpoll(struct net_device *netdev)
2853 {
2854         struct bnad *bnad = netdev_priv(netdev);
2855         struct bnad_rx_info *rx_info;
2856         struct bnad_rx_ctrl *rx_ctrl;
2857         u32 curr_mask;
2858         int i, j;
2859
2860         if (!(bnad->cfg_flags & BNAD_CF_MSIX)) {
2861                 bna_intx_disable(&bnad->bna, curr_mask);
2862                 bnad_isr(bnad->pcidev->irq, netdev);
2863                 bna_intx_enable(&bnad->bna, curr_mask);
2864         } else {
2865                 for (i = 0; i < bnad->num_rx; i++) {
2866                         rx_info = &bnad->rx_info[i];
2867                         if (!rx_info->rx)
2868                                 continue;
2869                         for (j = 0; j < bnad->num_rxp_per_rx; j++) {
2870                                 rx_ctrl = &rx_info->rx_ctrl[j];
2871                                 if (rx_ctrl->ccb) {
2872                                         bnad_disable_rx_irq(bnad,
2873                                                             rx_ctrl->ccb);
2874                                         bnad_netif_rx_schedule_poll(bnad,
2875                                                             rx_ctrl->ccb);
2876                                 }
2877                         }
2878                 }
2879         }
2880 }
2881 #endif
2882
2883 static const struct net_device_ops bnad_netdev_ops = {
2884         .ndo_open               = bnad_open,
2885         .ndo_stop               = bnad_stop,
2886         .ndo_start_xmit         = bnad_start_xmit,
2887         .ndo_get_stats64                = bnad_get_stats64,
2888         .ndo_set_rx_mode        = bnad_set_rx_mode,
2889         .ndo_set_multicast_list = bnad_set_rx_mode,
2890         .ndo_validate_addr      = eth_validate_addr,
2891         .ndo_set_mac_address    = bnad_set_mac_address,
2892         .ndo_change_mtu         = bnad_change_mtu,
2893         .ndo_vlan_rx_register   = bnad_vlan_rx_register,
2894         .ndo_vlan_rx_add_vid    = bnad_vlan_rx_add_vid,
2895         .ndo_vlan_rx_kill_vid   = bnad_vlan_rx_kill_vid,
2896 #ifdef CONFIG_NET_POLL_CONTROLLER
2897         .ndo_poll_controller    = bnad_netpoll
2898 #endif
2899 };
2900
2901 static void
2902 bnad_netdev_init(struct bnad *bnad, bool using_dac)
2903 {
2904         struct net_device *netdev = bnad->netdev;
2905
2906         netdev->features |= NETIF_F_IPV6_CSUM;
2907         netdev->features |= NETIF_F_TSO;
2908         netdev->features |= NETIF_F_TSO6;
2909
2910         netdev->features |= NETIF_F_GRO;
2911         pr_warn("bna: GRO enabled, using kernel stack GRO\n");
2912
2913         netdev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
2914
2915         if (using_dac)
2916                 netdev->features |= NETIF_F_HIGHDMA;
2917
2918         netdev->features |=
2919                 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
2920                 NETIF_F_HW_VLAN_FILTER;
2921
2922         netdev->vlan_features = netdev->features;
2923         netdev->mem_start = bnad->mmio_start;
2924         netdev->mem_end = bnad->mmio_start + bnad->mmio_len - 1;
2925
2926         netdev->netdev_ops = &bnad_netdev_ops;
2927         bnad_set_ethtool_ops(netdev);
2928 }
2929
2930 /*
2931  * 1. Initialize the bnad structure
2932  * 2. Setup netdev pointer in pci_dev
2933  * 3. Initialze Tx free tasklet
2934  * 4. Initialize no. of TxQ & CQs & MSIX vectors
2935  */
2936 static int
2937 bnad_init(struct bnad *bnad,
2938           struct pci_dev *pdev, struct net_device *netdev)
2939 {
2940         unsigned long flags;
2941
2942         SET_NETDEV_DEV(netdev, &pdev->dev);
2943         pci_set_drvdata(pdev, netdev);
2944
2945         bnad->netdev = netdev;
2946         bnad->pcidev = pdev;
2947         bnad->mmio_start = pci_resource_start(pdev, 0);
2948         bnad->mmio_len = pci_resource_len(pdev, 0);
2949         bnad->bar0 = ioremap_nocache(bnad->mmio_start, bnad->mmio_len);
2950         if (!bnad->bar0) {
2951                 dev_err(&pdev->dev, "ioremap for bar0 failed\n");
2952                 pci_set_drvdata(pdev, NULL);
2953                 return -ENOMEM;
2954         }
2955         pr_info("bar0 mapped to %p, len %llu\n", bnad->bar0,
2956                (unsigned long long) bnad->mmio_len);
2957
2958         spin_lock_irqsave(&bnad->bna_lock, flags);
2959         if (!bnad_msix_disable)
2960                 bnad->cfg_flags = BNAD_CF_MSIX;
2961
2962         bnad->cfg_flags |= BNAD_CF_DIM_ENABLED;
2963
2964         bnad_q_num_init(bnad);
2965         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2966
2967         bnad->msix_num = (bnad->num_tx * bnad->num_txq_per_tx) +
2968                 (bnad->num_rx * bnad->num_rxp_per_rx) +
2969                          BNAD_MAILBOX_MSIX_VECTORS;
2970
2971         bnad->txq_depth = BNAD_TXQ_DEPTH;
2972         bnad->rxq_depth = BNAD_RXQ_DEPTH;
2973         bnad->rx_csum = true;
2974
2975         bnad->tx_coalescing_timeo = BFI_TX_COALESCING_TIMEO;
2976         bnad->rx_coalescing_timeo = BFI_RX_COALESCING_TIMEO;
2977
2978         tasklet_init(&bnad->tx_free_tasklet, bnad_tx_free_tasklet,
2979                      (unsigned long)bnad);
2980
2981         return 0;
2982 }
2983
2984 /*
2985  * Must be called after bnad_pci_uninit()
2986  * so that iounmap() and pci_set_drvdata(NULL)
2987  * happens only after PCI uninitialization.
2988  */
2989 static void
2990 bnad_uninit(struct bnad *bnad)
2991 {
2992         if (bnad->bar0)
2993                 iounmap(bnad->bar0);
2994         pci_set_drvdata(bnad->pcidev, NULL);
2995 }
2996
2997 /*
2998  * Initialize locks
2999         a) Per device mutes used for serializing configuration
3000            changes from OS interface
3001         b) spin lock used to protect bna state machine
3002  */
3003 static void
3004 bnad_lock_init(struct bnad *bnad)
3005 {
3006         spin_lock_init(&bnad->bna_lock);
3007         mutex_init(&bnad->conf_mutex);
3008 }
3009
3010 static void
3011 bnad_lock_uninit(struct bnad *bnad)
3012 {
3013         mutex_destroy(&bnad->conf_mutex);
3014 }
3015
3016 /* PCI Initialization */
3017 static int
3018 bnad_pci_init(struct bnad *bnad,
3019               struct pci_dev *pdev, bool *using_dac)
3020 {
3021         int err;
3022
3023         err = pci_enable_device(pdev);
3024         if (err)
3025                 return err;
3026         err = pci_request_regions(pdev, BNAD_NAME);
3027         if (err)
3028                 goto disable_device;
3029         if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
3030             !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
3031                 *using_dac = 1;
3032         } else {
3033                 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
3034                 if (err) {
3035                         err = dma_set_coherent_mask(&pdev->dev,
3036                                                     DMA_BIT_MASK(32));
3037                         if (err)
3038                                 goto release_regions;
3039                 }
3040                 *using_dac = 0;
3041         }
3042         pci_set_master(pdev);
3043         return 0;
3044
3045 release_regions:
3046         pci_release_regions(pdev);
3047 disable_device:
3048         pci_disable_device(pdev);
3049
3050         return err;
3051 }
3052
3053 static void
3054 bnad_pci_uninit(struct pci_dev *pdev)
3055 {
3056         pci_release_regions(pdev);
3057         pci_disable_device(pdev);
3058 }
3059
3060 static int __devinit
3061 bnad_pci_probe(struct pci_dev *pdev,
3062                 const struct pci_device_id *pcidev_id)
3063 {
3064         bool    using_dac = false;
3065         int     err;
3066         struct bnad *bnad;
3067         struct bna *bna;
3068         struct net_device *netdev;
3069         struct bfa_pcidev pcidev_info;
3070         unsigned long flags;
3071
3072         pr_info("bnad_pci_probe : (0x%p, 0x%p) PCI Func : (%d)\n",
3073                pdev, pcidev_id, PCI_FUNC(pdev->devfn));
3074
3075         mutex_lock(&bnad_fwimg_mutex);
3076         if (!cna_get_firmware_buf(pdev)) {
3077                 mutex_unlock(&bnad_fwimg_mutex);
3078                 pr_warn("Failed to load Firmware Image!\n");
3079                 return -ENODEV;
3080         }
3081         mutex_unlock(&bnad_fwimg_mutex);
3082
3083         /*
3084          * Allocates sizeof(struct net_device + struct bnad)
3085          * bnad = netdev->priv
3086          */
3087         netdev = alloc_etherdev(sizeof(struct bnad));
3088         if (!netdev) {
3089                 dev_err(&pdev->dev, "alloc_etherdev failed\n");
3090                 err = -ENOMEM;
3091                 return err;
3092         }
3093         bnad = netdev_priv(netdev);
3094
3095         /*
3096          * PCI initialization
3097          *      Output : using_dac = 1 for 64 bit DMA
3098          *                         = 0 for 32 bit DMA
3099          */
3100         err = bnad_pci_init(bnad, pdev, &using_dac);
3101         if (err)
3102                 goto free_netdev;
3103
3104         bnad_lock_init(bnad);
3105         /*
3106          * Initialize bnad structure
3107          * Setup relation between pci_dev & netdev
3108          * Init Tx free tasklet
3109          */
3110         err = bnad_init(bnad, pdev, netdev);
3111         if (err)
3112                 goto pci_uninit;
3113         /* Initialize netdev structure, set up ethtool ops */
3114         bnad_netdev_init(bnad, using_dac);
3115
3116         /* Set link to down state */
3117         netif_carrier_off(netdev);
3118
3119         bnad_enable_msix(bnad);
3120
3121         /* Get resource requirement form bna */
3122         bna_res_req(&bnad->res_info[0]);
3123
3124         /* Allocate resources from bna */
3125         err = bnad_res_alloc(bnad);
3126         if (err)
3127                 goto free_netdev;
3128
3129         bna = &bnad->bna;
3130
3131         /* Setup pcidev_info for bna_init() */
3132         pcidev_info.pci_slot = PCI_SLOT(bnad->pcidev->devfn);
3133         pcidev_info.pci_func = PCI_FUNC(bnad->pcidev->devfn);
3134         pcidev_info.device_id = bnad->pcidev->device;
3135         pcidev_info.pci_bar_kva = bnad->bar0;
3136
3137         mutex_lock(&bnad->conf_mutex);
3138
3139         spin_lock_irqsave(&bnad->bna_lock, flags);
3140         bna_init(bna, bnad, &pcidev_info, &bnad->res_info[0]);
3141         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3142
3143         bnad->stats.bna_stats = &bna->stats;
3144
3145         /* Set up timers */
3146         setup_timer(&bnad->bna.device.ioc.ioc_timer, bnad_ioc_timeout,
3147                                 ((unsigned long)bnad));
3148         setup_timer(&bnad->bna.device.ioc.hb_timer, bnad_ioc_hb_check,
3149                                 ((unsigned long)bnad));
3150         setup_timer(&bnad->bna.device.ioc.iocpf_timer, bnad_iocpf_timeout,
3151                                 ((unsigned long)bnad));
3152         setup_timer(&bnad->bna.device.ioc.sem_timer, bnad_iocpf_sem_timeout,
3153                                 ((unsigned long)bnad));
3154
3155         /* Now start the timer before calling IOC */
3156         mod_timer(&bnad->bna.device.ioc.iocpf_timer,
3157                   jiffies + msecs_to_jiffies(BNA_IOC_TIMER_FREQ));
3158
3159         /*
3160          * Start the chip
3161          * Don't care even if err != 0, bna state machine will
3162          * deal with it
3163          */
3164         err = bnad_device_enable(bnad);
3165
3166         /* Get the burnt-in mac */
3167         spin_lock_irqsave(&bnad->bna_lock, flags);
3168         bna_port_mac_get(&bna->port, &bnad->perm_addr);
3169         bnad_set_netdev_perm_addr(bnad);
3170         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3171
3172         mutex_unlock(&bnad->conf_mutex);
3173
3174         /* Finally, reguister with net_device layer */
3175         err = register_netdev(netdev);
3176         if (err) {
3177                 pr_err("BNA : Registering with netdev failed\n");
3178                 goto disable_device;
3179         }
3180
3181         return 0;
3182
3183 disable_device:
3184         mutex_lock(&bnad->conf_mutex);
3185         bnad_device_disable(bnad);
3186         del_timer_sync(&bnad->bna.device.ioc.ioc_timer);
3187         del_timer_sync(&bnad->bna.device.ioc.sem_timer);
3188         del_timer_sync(&bnad->bna.device.ioc.hb_timer);
3189         spin_lock_irqsave(&bnad->bna_lock, flags);
3190         bna_uninit(bna);
3191         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3192         mutex_unlock(&bnad->conf_mutex);
3193
3194         bnad_res_free(bnad);
3195         bnad_disable_msix(bnad);
3196 pci_uninit:
3197         bnad_pci_uninit(pdev);
3198         bnad_lock_uninit(bnad);
3199         bnad_uninit(bnad);
3200 free_netdev:
3201         free_netdev(netdev);
3202         return err;
3203 }
3204
3205 static void __devexit
3206 bnad_pci_remove(struct pci_dev *pdev)
3207 {
3208         struct net_device *netdev = pci_get_drvdata(pdev);
3209         struct bnad *bnad;
3210         struct bna *bna;
3211         unsigned long flags;
3212
3213         if (!netdev)
3214                 return;
3215
3216         pr_info("%s bnad_pci_remove\n", netdev->name);
3217         bnad = netdev_priv(netdev);
3218         bna = &bnad->bna;
3219
3220         unregister_netdev(netdev);
3221
3222         mutex_lock(&bnad->conf_mutex);
3223         bnad_device_disable(bnad);
3224         del_timer_sync(&bnad->bna.device.ioc.ioc_timer);
3225         del_timer_sync(&bnad->bna.device.ioc.sem_timer);
3226         del_timer_sync(&bnad->bna.device.ioc.hb_timer);
3227         spin_lock_irqsave(&bnad->bna_lock, flags);
3228         bna_uninit(bna);
3229         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3230         mutex_unlock(&bnad->conf_mutex);
3231
3232         bnad_res_free(bnad);
3233         bnad_disable_msix(bnad);
3234         bnad_pci_uninit(pdev);
3235         bnad_lock_uninit(bnad);
3236         bnad_uninit(bnad);
3237         free_netdev(netdev);
3238 }
3239
3240 static const struct pci_device_id bnad_pci_id_table[] = {
3241         {
3242                 PCI_DEVICE(PCI_VENDOR_ID_BROCADE,
3243                         PCI_DEVICE_ID_BROCADE_CT),
3244                 .class = PCI_CLASS_NETWORK_ETHERNET << 8,
3245                 .class_mask =  0xffff00
3246         }, {0,  }
3247 };
3248
3249 MODULE_DEVICE_TABLE(pci, bnad_pci_id_table);
3250
3251 static struct pci_driver bnad_pci_driver = {
3252         .name = BNAD_NAME,
3253         .id_table = bnad_pci_id_table,
3254         .probe = bnad_pci_probe,
3255         .remove = __devexit_p(bnad_pci_remove),
3256 };
3257
3258 static int __init
3259 bnad_module_init(void)
3260 {
3261         int err;
3262
3263         pr_info("Brocade 10G Ethernet driver\n");
3264
3265         bfa_nw_ioc_auto_recover(bnad_ioc_auto_recover);
3266
3267         err = pci_register_driver(&bnad_pci_driver);
3268         if (err < 0) {
3269                 pr_err("bna : PCI registration failed in module init "
3270                        "(%d)\n", err);
3271                 return err;
3272         }
3273
3274         return 0;
3275 }
3276
3277 static void __exit
3278 bnad_module_exit(void)
3279 {
3280         pci_unregister_driver(&bnad_pci_driver);
3281
3282         if (bfi_fw)
3283                 release_firmware(bfi_fw);
3284 }
3285
3286 module_init(bnad_module_init);
3287 module_exit(bnad_module_exit);
3288
3289 MODULE_AUTHOR("Brocade");
3290 MODULE_LICENSE("GPL");
3291 MODULE_DESCRIPTION("Brocade 10G PCIe Ethernet driver");
3292 MODULE_VERSION(BNAD_VERSION);
3293 MODULE_FIRMWARE(CNA_FW_FILE_CT);