drivers/net/atlx/atl1.c

   1 /*
   2  * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
   3  * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
   4  * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
   5  *
   6  * Derived from Intel e1000 driver
   7  * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms of the GNU General Public License as published by the Free
  11  * Software Foundation; either version 2 of the License, or (at your option)
  12  * any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful, but WITHOUT
  15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  17  * more details.
  18  *
  19  * You should have received a copy of the GNU General Public License along with
  20  * this program; if not, write to the Free Software Foundation, Inc., 59
  21  * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  22  *
  23  * The full GNU General Public License is included in this distribution in the
  24  * file called COPYING.
  25  *
  26  * Contact Information:
  27  * Xiong Huang <xiong.huang@atheros.com>
  28  * Jie Yang <jie.yang@atheros.com>
  29  * Chris Snook <csnook@redhat.com>
  30  * Jay Cliburn <jcliburn@gmail.com>
  31  *
  32  * This version is adapted from the Attansic reference driver.
  33  *
  34  * TODO:
  35  * Add more ethtool functions.
  36  * Fix abstruse irq enable/disable condition described here:
  37  *      http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
  38  *
  39  * NEEDS TESTING:
  40  * VLAN
  41  * multicast
  42  * promiscuous mode
  43  * interrupt coalescing
  44  * SMP torture testing
  45  */
  46
  47 #include <asm/atomic.h>
  48 #include <asm/byteorder.h>
  49
  50 #include <linux/compiler.h>
  51 #include <linux/crc32.h>
  52 #include <linux/delay.h>
  53 #include <linux/dma-mapping.h>
  54 #include <linux/etherdevice.h>
  55 #include <linux/hardirq.h>
  56 #include <linux/if_ether.h>
  57 #include <linux/if_vlan.h>
  58 #include <linux/in.h>
  59 #include <linux/interrupt.h>
  60 #include <linux/ip.h>
  61 #include <linux/irqflags.h>
  62 #include <linux/irqreturn.h>
  63 #include <linux/jiffies.h>
  64 #include <linux/mii.h>
  65 #include <linux/module.h>
  66 #include <linux/moduleparam.h>
  67 #include <linux/net.h>
  68 #include <linux/netdevice.h>
  69 #include <linux/pci.h>
  70 #include <linux/pci_ids.h>
  71 #include <linux/pm.h>
  72 #include <linux/skbuff.h>
  73 #include <linux/slab.h>
  74 #include <linux/spinlock.h>
  75 #include <linux/string.h>
  76 #include <linux/tcp.h>
  77 #include <linux/timer.h>
  78 #include <linux/types.h>
  79 #include <linux/workqueue.h>
  80
  81 #include <net/checksum.h>
  82
  83 #include "atl1.h"
  84
  85 #define ATLX_DRIVER_VERSION "2.1.3"
  86 MODULE_AUTHOR("Xiong Huang <xiong.huang@atheros.com>, \
  87         Chris Snook <csnook@redhat.com>, Jay Cliburn <jcliburn@gmail.com>");
  88 MODULE_LICENSE("GPL");
  89 MODULE_VERSION(ATLX_DRIVER_VERSION);
  90
  91 /* Temporary hack for merging atl1 and atl2 */
  92 #include "atlx.c"
  93
  94 /*
  95  * This is the only thing that needs to be changed to adjust the
  96  * maximum number of ports that the driver can manage.
  97  */
  98 #define ATL1_MAX_NIC 4
  99
 100 #define OPTION_UNSET    -1
 101 #define OPTION_DISABLED 0
 102 #define OPTION_ENABLED  1
 103
 104 #define ATL1_PARAM_INIT { [0 ... ATL1_MAX_NIC] = OPTION_UNSET }
 105
 106 /*
 107  * Interrupt Moderate Timer in units of 2 us
 108  *
 109  * Valid Range: 10-65535
 110  *
 111  * Default Value: 100 (200us)
 112  */
 113 static int __devinitdata int_mod_timer[ATL1_MAX_NIC+1] = ATL1_PARAM_INIT;
 114 static unsigned int num_int_mod_timer;
 115 module_param_array_named(int_mod_timer, int_mod_timer, int,
 116         &num_int_mod_timer, 0);
 117 MODULE_PARM_DESC(int_mod_timer, "Interrupt moderator timer");
 118
 119 #define DEFAULT_INT_MOD_CNT     100     /* 200us */
 120 #define MAX_INT_MOD_CNT         65000
 121 #define MIN_INT_MOD_CNT         50
 122
 123 struct atl1_option {
 124         enum { enable_option, range_option, list_option } type;
 125         char *name;
 126         char *err;
 127         int def;
 128         union {
 129                 struct {        /* range_option info */
 130                         int min;
 131                         int max;
 132                 } r;
 133                 struct {        /* list_option info */
 134                         int nr;
 135                         struct atl1_opt_list {
 136                                 int i;
 137                                 char *str;
 138                         } *p;
 139                 } l;
 140         } arg;
 141 };
 142
 143 static int __devinit atl1_validate_option(int *value, struct atl1_option *opt,
 144         struct pci_dev *pdev)
 145 {
 146         if (*value == OPTION_UNSET) {
 147                 *value = opt->def;
 148                 return 0;
 149         }
 150
 151         switch (opt->type) {
 152         case enable_option:
 153                 switch (*value) {
 154                 case OPTION_ENABLED:
 155                         dev_info(&pdev->dev, "%s enabled\n", opt->name);
 156                         return 0;
 157                 case OPTION_DISABLED:
 158                         dev_info(&pdev->dev, "%s disabled\n", opt->name);
 159                         return 0;
 160                 }
 161                 break;
 162         case range_option:
 163                 if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
 164                         dev_info(&pdev->dev, "%s set to %i\n", opt->name,
 165                                 *value);
 166                         return 0;
 167                 }
 168                 break;
 169         case list_option:{
 170                         int i;
 171                         struct atl1_opt_list *ent;
 172
 173                         for (i = 0; i < opt->arg.l.nr; i++) {
 174                                 ent = &opt->arg.l.p[i];
 175                                 if (*value == ent->i) {
 176                                         if (ent->str[0] != '\0')
 177                                                 dev_info(&pdev->dev, "%s\n",
 178                                                         ent->str);
 179                                         return 0;
 180                                 }
 181                         }
 182                 }
 183                 break;
 184
 185         default:
 186                 break;
 187         }
 188
 189         dev_info(&pdev->dev, "invalid %s specified (%i) %s\n",
 190                 opt->name, *value, opt->err);
 191         *value = opt->def;
 192         return -1;
 193 }
 194
 195 /*
 196  * atl1_check_options - Range Checking for Command Line Parameters
 197  * @adapter: board private structure
 198  *
 199  * This routine checks all command line parameters for valid user
 200  * input.  If an invalid value is given, or if no user specified
 201  * value exists, a default value is used.  The final value is stored
 202  * in a variable in the adapter structure.
 203  */
 204 static void __devinit atl1_check_options(struct atl1_adapter *adapter)
 205 {
 206         struct pci_dev *pdev = adapter->pdev;
 207         int bd = adapter->bd_number;
 208         if (bd >= ATL1_MAX_NIC) {
 209                 dev_notice(&pdev->dev, "no configuration for board#%i\n", bd);
 210                 dev_notice(&pdev->dev, "using defaults for all values\n");
 211         }
 212         {                       /* Interrupt Moderate Timer */
 213                 struct atl1_option opt = {
 214                         .type = range_option,
 215                         .name = "Interrupt Moderator Timer",
 216                         .err = "using default of "
 217                                 __MODULE_STRING(DEFAULT_INT_MOD_CNT),
 218                         .def = DEFAULT_INT_MOD_CNT,
 219                         .arg = {.r = {.min = MIN_INT_MOD_CNT,
 220                                         .max = MAX_INT_MOD_CNT} }
 221                 };
 222                 int val;
 223                 if (num_int_mod_timer > bd) {
 224                         val = int_mod_timer[bd];
 225                         atl1_validate_option(&val, &opt, pdev);
 226                         adapter->imt = (u16) val;
 227                 } else
 228                         adapter->imt = (u16) (opt.def);
 229         }
 230 }
 231
 232 /*
 233  * atl1_pci_tbl - PCI Device ID Table
 234  */
 235 static const struct pci_device_id atl1_pci_tbl[] = {
 236         {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
 237         /* required last entry */
 238         {0,}
 239 };
 240 MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
 241
 242 static const u32 atl1_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
 243         NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
 244
 245 static int debug = -1;
 246 module_param(debug, int, 0);
 247 MODULE_PARM_DESC(debug, "Message level (0=none,...,16=all)");
 248
 249 /*
 250  * Reset the transmit and receive units; mask and clear all interrupts.
 251  * hw - Struct containing variables accessed by shared code
 252  * return : 0  or  idle status (if error)
 253  */
 254 static s32 atl1_reset_hw(struct atl1_hw *hw)
 255 {
 256         struct pci_dev *pdev = hw->back->pdev;
 257         struct atl1_adapter *adapter = hw->back;
 258         u32 icr;
 259         int i;
 260
 261         /*
 262          * Clear Interrupt mask to stop board from generating
 263          * interrupts & Clear any pending interrupt events
 264          */
 265         /*
 266          * iowrite32(0, hw->hw_addr + REG_IMR);
 267          * iowrite32(0xffffffff, hw->hw_addr + REG_ISR);
 268          */
 269
 270         /*
 271          * Issue Soft Reset to the MAC.  This will reset the chip's
 272          * transmit, receive, DMA.  It will not effect
 273          * the current PCI configuration.  The global reset bit is self-
 274          * clearing, and should clear within a microsecond.
 275          */
 276         iowrite32(MASTER_CTRL_SOFT_RST, hw->hw_addr + REG_MASTER_CTRL);
 277         ioread32(hw->hw_addr + REG_MASTER_CTRL);
 278
 279         iowrite16(1, hw->hw_addr + REG_PHY_ENABLE);
 280         ioread16(hw->hw_addr + REG_PHY_ENABLE);
 281
 282         /* delay about 1ms */
 283         msleep(1);
 284
 285         /* Wait at least 10ms for All module to be Idle */
 286         for (i = 0; i < 10; i++) {
 287                 icr = ioread32(hw->hw_addr + REG_IDLE_STATUS);
 288                 if (!icr)
 289                         break;
 290                 /* delay 1 ms */
 291                 msleep(1);
 292                 /* FIXME: still the right way to do this? */
 293                 cpu_relax();
 294         }
 295
 296         if (icr) {
 297                 if (netif_msg_hw(adapter))
 298                         dev_dbg(&pdev->dev, "ICR = 0x%x\n", icr);
 299                 return icr;
 300         }
 301
 302         return 0;
 303 }
 304
 305 /* function about EEPROM
 306  *
 307  * check_eeprom_exist
 308  * return 0 if eeprom exist
 309  */
 310 static int atl1_check_eeprom_exist(struct atl1_hw *hw)
 311 {
 312         u32 value;
 313         value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 314         if (value & SPI_FLASH_CTRL_EN_VPD) {
 315                 value &= ~SPI_FLASH_CTRL_EN_VPD;
 316                 iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 317         }
 318
 319         value = ioread16(hw->hw_addr + REG_PCIE_CAP_LIST);
 320         return ((value & 0xFF00) == 0x6C00) ? 0 : 1;
 321 }
 322
 323 static bool atl1_read_eeprom(struct atl1_hw *hw, u32 offset, u32 *p_value)
 324 {
 325         int i;
 326         u32 control;
 327
 328         if (offset & 3)
 329                 /* address do not align */
 330                 return false;
 331
 332         iowrite32(0, hw->hw_addr + REG_VPD_DATA);
 333         control = (offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT;
 334         iowrite32(control, hw->hw_addr + REG_VPD_CAP);
 335         ioread32(hw->hw_addr + REG_VPD_CAP);
 336
 337         for (i = 0; i < 10; i++) {
 338                 msleep(2);
 339                 control = ioread32(hw->hw_addr + REG_VPD_CAP);
 340                 if (control & VPD_CAP_VPD_FLAG)
 341                         break;
 342         }
 343         if (control & VPD_CAP_VPD_FLAG) {
 344                 *p_value = ioread32(hw->hw_addr + REG_VPD_DATA);
 345                 return true;
 346         }
 347         /* timeout */
 348         return false;
 349 }
 350
 351 /*
 352  * Reads the value from a PHY register
 353  * hw - Struct containing variables accessed by shared code
 354  * reg_addr - address of the PHY register to read
 355  */
 356 s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data)
 357 {
 358         u32 val;
 359         int i;
 360
 361         val = ((u32) (reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
 362                 MDIO_START | MDIO_SUP_PREAMBLE | MDIO_RW | MDIO_CLK_25_4 <<
 363                 MDIO_CLK_SEL_SHIFT;
 364         iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
 365         ioread32(hw->hw_addr + REG_MDIO_CTRL);
 366
 367         for (i = 0; i < MDIO_WAIT_TIMES; i++) {
 368                 udelay(2);
 369                 val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 370                 if (!(val & (MDIO_START | MDIO_BUSY)))
 371                         break;
 372         }
 373         if (!(val & (MDIO_START | MDIO_BUSY))) {
 374                 *phy_data = (u16) val;
 375                 return 0;
 376         }
 377         return ATLX_ERR_PHY;
 378 }
 379
 380 #define CUSTOM_SPI_CS_SETUP     2
 381 #define CUSTOM_SPI_CLK_HI       2
 382 #define CUSTOM_SPI_CLK_LO       2
 383 #define CUSTOM_SPI_CS_HOLD      2
 384 #define CUSTOM_SPI_CS_HI        3
 385
 386 static bool atl1_spi_read(struct atl1_hw *hw, u32 addr, u32 *buf)
 387 {
 388         int i;
 389         u32 value;
 390
 391         iowrite32(0, hw->hw_addr + REG_SPI_DATA);
 392         iowrite32(addr, hw->hw_addr + REG_SPI_ADDR);
 393
 394         value = SPI_FLASH_CTRL_WAIT_READY |
 395             (CUSTOM_SPI_CS_SETUP & SPI_FLASH_CTRL_CS_SETUP_MASK) <<
 396             SPI_FLASH_CTRL_CS_SETUP_SHIFT | (CUSTOM_SPI_CLK_HI &
 397                                              SPI_FLASH_CTRL_CLK_HI_MASK) <<
 398             SPI_FLASH_CTRL_CLK_HI_SHIFT | (CUSTOM_SPI_CLK_LO &
 399                                            SPI_FLASH_CTRL_CLK_LO_MASK) <<
 400             SPI_FLASH_CTRL_CLK_LO_SHIFT | (CUSTOM_SPI_CS_HOLD &
 401                                            SPI_FLASH_CTRL_CS_HOLD_MASK) <<
 402             SPI_FLASH_CTRL_CS_HOLD_SHIFT | (CUSTOM_SPI_CS_HI &
 403                                             SPI_FLASH_CTRL_CS_HI_MASK) <<
 404             SPI_FLASH_CTRL_CS_HI_SHIFT | (1 & SPI_FLASH_CTRL_INS_MASK) <<
 405             SPI_FLASH_CTRL_INS_SHIFT;
 406
 407         iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 408
 409         value |= SPI_FLASH_CTRL_START;
 410         iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 411         ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 412
 413         for (i = 0; i < 10; i++) {
 414                 msleep(1);
 415                 value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 416                 if (!(value & SPI_FLASH_CTRL_START))
 417                         break;
 418         }
 419
 420         if (value & SPI_FLASH_CTRL_START)
 421                 return false;
 422
 423         *buf = ioread32(hw->hw_addr + REG_SPI_DATA);
 424
 425         return true;
 426 }
 427
 428 /*
 429  * get_permanent_address
 430  * return 0 if get valid mac address,
 431  */
 432 static int atl1_get_permanent_address(struct atl1_hw *hw)
 433 {
 434         u32 addr[2];
 435         u32 i, control;
 436         u16 reg;
 437         u8 eth_addr[ETH_ALEN];
 438         bool key_valid;
 439
 440         if (is_valid_ether_addr(hw->perm_mac_addr))
 441                 return 0;
 442
 443         /* init */
 444         addr[0] = addr[1] = 0;
 445
 446         if (!atl1_check_eeprom_exist(hw)) {
 447                 reg = 0;
 448                 key_valid = false;
 449                 /* Read out all EEPROM content */
 450                 i = 0;
 451                 while (1) {
 452                         if (atl1_read_eeprom(hw, i + 0x100, &control)) {
 453                                 if (key_valid) {
 454                                         if (reg == REG_MAC_STA_ADDR)
 455                                                 addr[0] = control;
 456                                         else if (reg == (REG_MAC_STA_ADDR + 4))
 457                                                 addr[1] = control;
 458                                         key_valid = false;
 459                                 } else if ((control & 0xff) == 0x5A) {
 460                                         key_valid = true;
 461                                         reg = (u16) (control >> 16);
 462                                 } else
 463                                         break;
 464                         } else
 465                                 /* read error */
 466                                 break;
 467                         i += 4;
 468                 }
 469
 470                 *(u32 *) &eth_addr[2] = swab32(addr[0]);
 471                 *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 472                 if (is_valid_ether_addr(eth_addr)) {
 473                         memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 474                         return 0;
 475                 }
 476         }
 477
 478         /* see if SPI FLAGS exist ? */
 479         addr[0] = addr[1] = 0;
 480         reg = 0;
 481         key_valid = false;
 482         i = 0;
 483         while (1) {
 484                 if (atl1_spi_read(hw, i + 0x1f000, &control)) {
 485                         if (key_valid) {
 486                                 if (reg == REG_MAC_STA_ADDR)
 487                                         addr[0] = control;
 488                                 else if (reg == (REG_MAC_STA_ADDR + 4))
 489                                         addr[1] = control;
 490                                 key_valid = false;
 491                         } else if ((control & 0xff) == 0x5A) {
 492                                 key_valid = true;
 493                                 reg = (u16) (control >> 16);
 494                         } else
 495                                 /* data end */
 496                                 break;
 497                 } else
 498                         /* read error */
 499                         break;
 500                 i += 4;
 501         }
 502
 503         *(u32 *) &eth_addr[2] = swab32(addr[0]);
 504         *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 505         if (is_valid_ether_addr(eth_addr)) {
 506                 memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 507                 return 0;
 508         }
 509
 510         /*
 511          * On some motherboards, the MAC address is written by the
 512          * BIOS directly to the MAC register during POST, and is
 513          * not stored in eeprom.  If all else thus far has failed
 514          * to fetch the permanent MAC address, try reading it directly.
 515          */
 516         addr[0] = ioread32(hw->hw_addr + REG_MAC_STA_ADDR);
 517         addr[1] = ioread16(hw->hw_addr + (REG_MAC_STA_ADDR + 4));
 518         *(u32 *) &eth_addr[2] = swab32(addr[0]);
 519         *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 520         if (is_valid_ether_addr(eth_addr)) {
 521                 memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 522                 return 0;
 523         }
 524
 525         return 1;
 526 }
 527
 528 /*
 529  * Reads the adapter's MAC address from the EEPROM
 530  * hw - Struct containing variables accessed by shared code
 531  */
 532 static s32 atl1_read_mac_addr(struct atl1_hw *hw)
 533 {
 534         u16 i;
 535
 536         if (atl1_get_permanent_address(hw))
 537                 random_ether_addr(hw->perm_mac_addr);
 538
 539         for (i = 0; i < ETH_ALEN; i++)
 540                 hw->mac_addr[i] = hw->perm_mac_addr[i];
 541         return 0;
 542 }
 543
 544 /*
 545  * Hashes an address to determine its location in the multicast table
 546  * hw - Struct containing variables accessed by shared code
 547  * mc_addr - the multicast address to hash
 548  *
 549  * atl1_hash_mc_addr
 550  *  purpose
 551  *      set hash value for a multicast address
 552  *      hash calcu processing :
 553  *          1. calcu 32bit CRC for multicast address
 554  *          2. reverse crc with MSB to LSB
 555  */
 556 u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr)
 557 {
 558         u32 crc32, value = 0;
 559         int i;
 560
 561         crc32 = ether_crc_le(6, mc_addr);
 562         for (i = 0; i < 32; i++)
 563                 value |= (((crc32 >> i) & 1) << (31 - i));
 564
 565         return value;
 566 }
 567
 568 /*
 569  * Sets the bit in the multicast table corresponding to the hash value.
 570  * hw - Struct containing variables accessed by shared code
 571  * hash_value - Multicast address hash value
 572  */
 573 void atl1_hash_set(struct atl1_hw *hw, u32 hash_value)
 574 {
 575         u32 hash_bit, hash_reg;
 576         u32 mta;
 577
 578         /*
 579          * The HASH Table  is a register array of 2 32-bit registers.
 580          * It is treated like an array of 64 bits.  We want to set
 581          * bit BitArray[hash_value]. So we figure out what register
 582          * the bit is in, read it, OR in the new bit, then write
 583          * back the new value.  The register is determined by the
 584          * upper 7 bits of the hash value and the bit within that
 585          * register are determined by the lower 5 bits of the value.
 586          */
 587         hash_reg = (hash_value >> 31) & 0x1;
 588         hash_bit = (hash_value >> 26) & 0x1F;
 589         mta = ioread32((hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
 590         mta |= (1 << hash_bit);
 591         iowrite32(mta, (hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
 592 }
 593
 594 /*
 595  * Writes a value to a PHY register
 596  * hw - Struct containing variables accessed by shared code
 597  * reg_addr - address of the PHY register to write
 598  * data - data to write to the PHY
 599  */
 600 static s32 atl1_write_phy_reg(struct atl1_hw *hw, u32 reg_addr, u16 phy_data)
 601 {
 602         int i;
 603         u32 val;
 604
 605         val = ((u32) (phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT |
 606             (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
 607             MDIO_SUP_PREAMBLE |
 608             MDIO_START | MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
 609         iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
 610         ioread32(hw->hw_addr + REG_MDIO_CTRL);
 611
 612         for (i = 0; i < MDIO_WAIT_TIMES; i++) {
 613                 udelay(2);
 614                 val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 615                 if (!(val & (MDIO_START | MDIO_BUSY)))
 616                         break;
 617         }
 618
 619         if (!(val & (MDIO_START | MDIO_BUSY)))
 620                 return 0;
 621
 622         return ATLX_ERR_PHY;
 623 }
 624
 625 /*
 626  * Make L001's PHY out of Power Saving State (bug)
 627  * hw - Struct containing variables accessed by shared code
 628  * when power on, L001's PHY always on Power saving State
 629  * (Gigabit Link forbidden)
 630  */
 631 static s32 atl1_phy_leave_power_saving(struct atl1_hw *hw)
 632 {
 633         s32 ret;
 634         ret = atl1_write_phy_reg(hw, 29, 0x0029);
 635         if (ret)
 636                 return ret;
 637         return atl1_write_phy_reg(hw, 30, 0);
 638 }
 639
 640 /*
 641  * Resets the PHY and make all config validate
 642  * hw - Struct containing variables accessed by shared code
 643  *
 644  * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
 645  */
 646 static s32 atl1_phy_reset(struct atl1_hw *hw)
 647 {
 648         struct pci_dev *pdev = hw->back->pdev;
 649         struct atl1_adapter *adapter = hw->back;
 650         s32 ret_val;
 651         u16 phy_data;
 652
 653         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
 654             hw->media_type == MEDIA_TYPE_1000M_FULL)
 655                 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
 656         else {
 657                 switch (hw->media_type) {
 658                 case MEDIA_TYPE_100M_FULL:
 659                         phy_data =
 660                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
 661                             MII_CR_RESET;
 662                         break;
 663                 case MEDIA_TYPE_100M_HALF:
 664                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
 665                         break;
 666                 case MEDIA_TYPE_10M_FULL:
 667                         phy_data =
 668                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
 669                         break;
 670                 default:
 671                         /* MEDIA_TYPE_10M_HALF: */
 672                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
 673                         break;
 674                 }
 675         }
 676
 677         ret_val = atl1_write_phy_reg(hw, MII_BMCR, phy_data);
 678         if (ret_val) {
 679                 u32 val;
 680                 int i;
 681                 /* pcie serdes link may be down! */
 682                 if (netif_msg_hw(adapter))
 683                         dev_dbg(&pdev->dev, "pcie phy link down\n");
 684
 685                 for (i = 0; i < 25; i++) {
 686                         msleep(1);
 687                         val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 688                         if (!(val & (MDIO_START | MDIO_BUSY)))
 689                                 break;
 690                 }
 691
 692                 if ((val & (MDIO_START | MDIO_BUSY)) != 0) {
 693                         if (netif_msg_hw(adapter))
 694                                 dev_warn(&pdev->dev,
 695                                         "pcie link down at least 25ms\n");
 696                         return ret_val;
 697                 }
 698         }
 699         return 0;
 700 }
 701
 702 /*
 703  * Configures PHY autoneg and flow control advertisement settings
 704  * hw - Struct containing variables accessed by shared code
 705  */
 706 static s32 atl1_phy_setup_autoneg_adv(struct atl1_hw *hw)
 707 {
 708         s32 ret_val;
 709         s16 mii_autoneg_adv_reg;
 710         s16 mii_1000t_ctrl_reg;
 711
 712         /* Read the MII Auto-Neg Advertisement Register (Address 4). */
 713         mii_autoneg_adv_reg = MII_AR_DEFAULT_CAP_MASK;
 714
 715         /* Read the MII 1000Base-T Control Register (Address 9). */
 716         mii_1000t_ctrl_reg = MII_ATLX_CR_1000T_DEFAULT_CAP_MASK;
 717
 718         /*
 719          * First we clear all the 10/100 mb speed bits in the Auto-Neg
 720          * Advertisement Register (Address 4) and the 1000 mb speed bits in
 721          * the  1000Base-T Control Register (Address 9).
 722          */
 723         mii_autoneg_adv_reg &= ~MII_AR_SPEED_MASK;
 724         mii_1000t_ctrl_reg &= ~MII_ATLX_CR_1000T_SPEED_MASK;
 725
 726         /*
 727          * Need to parse media_type  and set up
 728          * the appropriate PHY registers.
 729          */
 730         switch (hw->media_type) {
 731         case MEDIA_TYPE_AUTO_SENSOR:
 732                 mii_autoneg_adv_reg |= (MII_AR_10T_HD_CAPS |
 733                                         MII_AR_10T_FD_CAPS |
 734                                         MII_AR_100TX_HD_CAPS |
 735                                         MII_AR_100TX_FD_CAPS);
 736                 mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
 737                 break;
 738
 739         case MEDIA_TYPE_1000M_FULL:
 740                 mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
 741                 break;
 742
 743         case MEDIA_TYPE_100M_FULL:
 744                 mii_autoneg_adv_reg |= MII_AR_100TX_FD_CAPS;
 745                 break;
 746
 747         case MEDIA_TYPE_100M_HALF:
 748                 mii_autoneg_adv_reg |= MII_AR_100TX_HD_CAPS;
 749                 break;
 750
 751         case MEDIA_TYPE_10M_FULL:
 752                 mii_autoneg_adv_reg |= MII_AR_10T_FD_CAPS;
 753                 break;
 754
 755         default:
 756                 mii_autoneg_adv_reg |= MII_AR_10T_HD_CAPS;
 757                 break;
 758         }
 759
 760         /* flow control fixed to enable all */
 761         mii_autoneg_adv_reg |= (MII_AR_ASM_DIR | MII_AR_PAUSE);
 762
 763         hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg;
 764         hw->mii_1000t_ctrl_reg = mii_1000t_ctrl_reg;
 765
 766         ret_val = atl1_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
 767         if (ret_val)
 768                 return ret_val;
 769
 770         ret_val = atl1_write_phy_reg(hw, MII_ATLX_CR, mii_1000t_ctrl_reg);
 771         if (ret_val)
 772                 return ret_val;
 773
 774         return 0;
 775 }
 776
 777 /*
 778  * Configures link settings.
 779  * hw - Struct containing variables accessed by shared code
 780  * Assumes the hardware has previously been reset and the
 781  * transmitter and receiver are not enabled.
 782  */
 783 static s32 atl1_setup_link(struct atl1_hw *hw)
 784 {
 785         struct pci_dev *pdev = hw->back->pdev;
 786         struct atl1_adapter *adapter = hw->back;
 787         s32 ret_val;
 788
 789         /*
 790          * Options:
 791          *  PHY will advertise value(s) parsed from
 792          *  autoneg_advertised and fc
 793          *  no matter what autoneg is , We will not wait link result.
 794          */
 795         ret_val = atl1_phy_setup_autoneg_adv(hw);
 796         if (ret_val) {
 797                 if (netif_msg_link(adapter))
 798                         dev_dbg(&pdev->dev,
 799                                 "error setting up autonegotiation\n");
 800                 return ret_val;
 801         }
 802         /* SW.Reset , En-Auto-Neg if needed */
 803         ret_val = atl1_phy_reset(hw);
 804         if (ret_val) {
 805                 if (netif_msg_link(adapter))
 806                         dev_dbg(&pdev->dev, "error resetting phy\n");
 807                 return ret_val;
 808         }
 809         hw->phy_configured = true;
 810         return ret_val;
 811 }
 812
 813 static void atl1_init_flash_opcode(struct atl1_hw *hw)
 814 {
 815         if (hw->flash_vendor >= ARRAY_SIZE(flash_table))
 816                 /* Atmel */
 817                 hw->flash_vendor = 0;
 818
 819         /* Init OP table */
 820         iowrite8(flash_table[hw->flash_vendor].cmd_program,
 821                 hw->hw_addr + REG_SPI_FLASH_OP_PROGRAM);
 822         iowrite8(flash_table[hw->flash_vendor].cmd_sector_erase,
 823                 hw->hw_addr + REG_SPI_FLASH_OP_SC_ERASE);
 824         iowrite8(flash_table[hw->flash_vendor].cmd_chip_erase,
 825                 hw->hw_addr + REG_SPI_FLASH_OP_CHIP_ERASE);
 826         iowrite8(flash_table[hw->flash_vendor].cmd_rdid,
 827                 hw->hw_addr + REG_SPI_FLASH_OP_RDID);
 828         iowrite8(flash_table[hw->flash_vendor].cmd_wren,
 829                 hw->hw_addr + REG_SPI_FLASH_OP_WREN);
 830         iowrite8(flash_table[hw->flash_vendor].cmd_rdsr,
 831                 hw->hw_addr + REG_SPI_FLASH_OP_RDSR);
 832         iowrite8(flash_table[hw->flash_vendor].cmd_wrsr,
 833                 hw->hw_addr + REG_SPI_FLASH_OP_WRSR);
 834         iowrite8(flash_table[hw->flash_vendor].cmd_read,
 835                 hw->hw_addr + REG_SPI_FLASH_OP_READ);
 836 }
 837
 838 /*
 839  * Performs basic configuration of the adapter.
 840  * hw - Struct containing variables accessed by shared code
 841  * Assumes that the controller has previously been reset and is in a
 842  * post-reset uninitialized state. Initializes multicast table,
 843  * and  Calls routines to setup link
 844  * Leaves the transmit and receive units disabled and uninitialized.
 845  */
 846 static s32 atl1_init_hw(struct atl1_hw *hw)
 847 {
 848         u32 ret_val = 0;
 849
 850         /* Zero out the Multicast HASH table */
 851         iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
 852         /* clear the old settings from the multicast hash table */
 853         iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
 854
 855         atl1_init_flash_opcode(hw);
 856
 857         if (!hw->phy_configured) {
 858                 /* enable GPHY LinkChange Interrrupt */
 859                 ret_val = atl1_write_phy_reg(hw, 18, 0xC00);
 860                 if (ret_val)
 861                         return ret_val;
 862                 /* make PHY out of power-saving state */
 863                 ret_val = atl1_phy_leave_power_saving(hw);
 864                 if (ret_val)
 865                         return ret_val;
 866                 /* Call a subroutine to configure the link */
 867                 ret_val = atl1_setup_link(hw);
 868         }
 869         return ret_val;
 870 }
 871
 872 /*
 873  * Detects the current speed and duplex settings of the hardware.
 874  * hw - Struct containing variables accessed by shared code
 875  * speed - Speed of the connection
 876  * duplex - Duplex setting of the connection
 877  */
 878 static s32 atl1_get_speed_and_duplex(struct atl1_hw *hw, u16 *speed, u16 *duplex)
 879 {
 880         struct pci_dev *pdev = hw->back->pdev;
 881         struct atl1_adapter *adapter = hw->back;
 882         s32 ret_val;
 883         u16 phy_data;
 884
 885         /* ; --- Read   PHY Specific Status Register (17) */
 886         ret_val = atl1_read_phy_reg(hw, MII_ATLX_PSSR, &phy_data);
 887         if (ret_val)
 888                 return ret_val;
 889
 890         if (!(phy_data & MII_ATLX_PSSR_SPD_DPLX_RESOLVED))
 891                 return ATLX_ERR_PHY_RES;
 892
 893         switch (phy_data & MII_ATLX_PSSR_SPEED) {
 894         case MII_ATLX_PSSR_1000MBS:
 895                 *speed = SPEED_1000;
 896                 break;
 897         case MII_ATLX_PSSR_100MBS:
 898                 *speed = SPEED_100;
 899                 break;
 900         case MII_ATLX_PSSR_10MBS:
 901                 *speed = SPEED_10;
 902                 break;
 903         default:
 904                 if (netif_msg_hw(adapter))
 905                         dev_dbg(&pdev->dev, "error getting speed\n");
 906                 return ATLX_ERR_PHY_SPEED;
 907                 break;
 908         }
 909         if (phy_data & MII_ATLX_PSSR_DPLX)
 910                 *duplex = FULL_DUPLEX;
 911         else
 912                 *duplex = HALF_DUPLEX;
 913
 914         return 0;
 915 }
 916
 917 void atl1_set_mac_addr(struct atl1_hw *hw)
 918 {
 919         u32 value;
 920         /*
 921          * 00-0B-6A-F6-00-DC
 922          * 0:  6AF600DC   1: 000B
 923          * low dword
 924          */
 925         value = (((u32) hw->mac_addr[2]) << 24) |
 926             (((u32) hw->mac_addr[3]) << 16) |
 927             (((u32) hw->mac_addr[4]) << 8) | (((u32) hw->mac_addr[5]));
 928         iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
 929         /* high dword */
 930         value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
 931         iowrite32(value, (hw->hw_addr + REG_MAC_STA_ADDR) + (1 << 2));
 932 }
 933
 934 /*
 935  * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
 936  * @adapter: board private structure to initialize
 937  *
 938  * atl1_sw_init initializes the Adapter private data structure.
 939  * Fields are initialized based on PCI device information and
 940  * OS network device settings (MTU size).
 941  */
 942 static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
 943 {
 944         struct atl1_hw *hw = &adapter->hw;
 945         struct net_device *netdev = adapter->netdev;
 946
 947         hw->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
 948         hw->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
 949
 950         adapter->wol = 0;
 951         adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
 952         adapter->ict = 50000;           /* 100ms */
 953         adapter->link_speed = SPEED_0;  /* hardware init */
 954         adapter->link_duplex = FULL_DUPLEX;
 955
 956         hw->phy_configured = false;
 957         hw->preamble_len = 7;
 958         hw->ipgt = 0x60;
 959         hw->min_ifg = 0x50;
 960         hw->ipgr1 = 0x40;
 961         hw->ipgr2 = 0x60;
 962         hw->max_retry = 0xf;
 963         hw->lcol = 0x37;
 964         hw->jam_ipg = 7;
 965         hw->rfd_burst = 8;
 966         hw->rrd_burst = 8;
 967         hw->rfd_fetch_gap = 1;
 968         hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
 969         hw->rx_jumbo_lkah = 1;
 970         hw->rrd_ret_timer = 16;
 971         hw->tpd_burst = 4;
 972         hw->tpd_fetch_th = 16;
 973         hw->txf_burst = 0x100;
 974         hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
 975         hw->tpd_fetch_gap = 1;
 976         hw->rcb_value = atl1_rcb_64;
 977         hw->dma_ord = atl1_dma_ord_enh;
 978         hw->dmar_block = atl1_dma_req_256;
 979         hw->dmaw_block = atl1_dma_req_256;
 980         hw->cmb_rrd = 4;
 981         hw->cmb_tpd = 4;
 982         hw->cmb_rx_timer = 1;   /* about 2us */
 983         hw->cmb_tx_timer = 1;   /* about 2us */
 984         hw->smb_timer = 100000; /* about 200ms */
 985
 986         spin_lock_init(&adapter->lock);
 987         spin_lock_init(&adapter->mb_lock);
 988
 989         return 0;
 990 }
 991
 992 static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
 993 {
 994         struct atl1_adapter *adapter = netdev_priv(netdev);
 995         u16 result;
 996
 997         atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
 998
 999         return result;
1000 }
1001
1002 static void mdio_write(struct net_device *netdev, int phy_id, int reg_num,
1003         int val)
1004 {
1005         struct atl1_adapter *adapter = netdev_priv(netdev);
1006
1007         atl1_write_phy_reg(&adapter->hw, reg_num, val);
1008 }
1009
1010 /*
1011  * atl1_mii_ioctl -
1012  * @netdev:
1013  * @ifreq:
1014  * @cmd:
1015  */
1016 static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1017 {
1018         struct atl1_adapter *adapter = netdev_priv(netdev);
1019         unsigned long flags;
1020         int retval;
1021
1022         if (!netif_running(netdev))
1023                 return -EINVAL;
1024
1025         spin_lock_irqsave(&adapter->lock, flags);
1026         retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
1027         spin_unlock_irqrestore(&adapter->lock, flags);
1028
1029         return retval;
1030 }
1031
1032 /*
1033  * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
1034  * @adapter: board private structure
1035  *
1036  * Return 0 on success, negative on failure
1037  */
1038 static s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
1039 {
1040         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1041         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1042         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1043         struct atl1_ring_header *ring_header = &adapter->ring_header;
1044         struct pci_dev *pdev = adapter->pdev;
1045         int size;
1046         u8 offset = 0;
1047
1048         size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
1049         tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
1050         if (unlikely(!tpd_ring->buffer_info)) {
1051                 if (netif_msg_drv(adapter))
1052                         dev_err(&pdev->dev, "kzalloc failed , size = D%d\n",
1053                                 size);
1054                 goto err_nomem;
1055         }
1056         rfd_ring->buffer_info =
1057                 (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
1058
1059         /*
1060          * real ring DMA buffer
1061          * each ring/block may need up to 8 bytes for alignment, hence the
1062          * additional 40 bytes tacked onto the end.
1063          */
1064         ring_header->size = size =
1065                 sizeof(struct tx_packet_desc) * tpd_ring->count
1066                 + sizeof(struct rx_free_desc) * rfd_ring->count
1067                 + sizeof(struct rx_return_desc) * rrd_ring->count
1068                 + sizeof(struct coals_msg_block)
1069                 + sizeof(struct stats_msg_block)
1070                 + 40;
1071
1072         ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
1073                 &ring_header->dma);
1074         if (unlikely(!ring_header->desc)) {
1075                 if (netif_msg_drv(adapter))
1076                         dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
1077                 goto err_nomem;
1078         }
1079
1080         memset(ring_header->desc, 0, ring_header->size);
1081
1082         /* init TPD ring */
1083         tpd_ring->dma = ring_header->dma;
1084         offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
1085         tpd_ring->dma += offset;
1086         tpd_ring->desc = (u8 *) ring_header->desc + offset;
1087         tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
1088
1089         /* init RFD ring */
1090         rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
1091         offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
1092         rfd_ring->dma += offset;
1093         rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
1094         rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
1095
1096
1097         /* init RRD ring */
1098         rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
1099         offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
1100         rrd_ring->dma += offset;
1101         rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
1102         rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
1103
1104
1105         /* init CMB */
1106         adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
1107         offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
1108         adapter->cmb.dma += offset;
1109         adapter->cmb.cmb = (struct coals_msg_block *)
1110                 ((u8 *) rrd_ring->desc + (rrd_ring->size + offset));
1111
1112         /* init SMB */
1113         adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
1114         offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
1115         adapter->smb.dma += offset;
1116         adapter->smb.smb = (struct stats_msg_block *)
1117                 ((u8 *) adapter->cmb.cmb +
1118                 (sizeof(struct coals_msg_block) + offset));
1119
1120         return 0;
1121
1122 err_nomem:
1123         kfree(tpd_ring->buffer_info);
1124         return -ENOMEM;
1125 }
1126
1127 static void atl1_init_ring_ptrs(struct atl1_adapter *adapter)
1128 {
1129         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1130         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1131         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1132
1133         atomic_set(&tpd_ring->next_to_use, 0);
1134         atomic_set(&tpd_ring->next_to_clean, 0);
1135
1136         rfd_ring->next_to_clean = 0;
1137         atomic_set(&rfd_ring->next_to_use, 0);
1138
1139         rrd_ring->next_to_use = 0;
1140         atomic_set(&rrd_ring->next_to_clean, 0);
1141 }
1142
1143 /*
1144  * atl1_clean_rx_ring - Free RFD Buffers
1145  * @adapter: board private structure
1146  */
1147 static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
1148 {
1149         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1150         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1151         struct atl1_buffer *buffer_info;
1152         struct pci_dev *pdev = adapter->pdev;
1153         unsigned long size;
1154         unsigned int i;
1155
1156         /* Free all the Rx ring sk_buffs */
1157         for (i = 0; i < rfd_ring->count; i++) {
1158                 buffer_info = &rfd_ring->buffer_info[i];
1159                 if (buffer_info->dma) {
1160                         pci_unmap_page(pdev, buffer_info->dma,
1161                                 buffer_info->length, PCI_DMA_FROMDEVICE);
1162                         buffer_info->dma = 0;
1163                 }
1164                 if (buffer_info->skb) {
1165                         dev_kfree_skb(buffer_info->skb);
1166                         buffer_info->skb = NULL;
1167                 }
1168         }
1169
1170         size = sizeof(struct atl1_buffer) * rfd_ring->count;
1171         memset(rfd_ring->buffer_info, 0, size);
1172
1173         /* Zero out the descriptor ring */
1174         memset(rfd_ring->desc, 0, rfd_ring->size);
1175
1176         rfd_ring->next_to_clean = 0;
1177         atomic_set(&rfd_ring->next_to_use, 0);
1178
1179         rrd_ring->next_to_use = 0;
1180         atomic_set(&rrd_ring->next_to_clean, 0);
1181 }
1182
1183 /*
1184  * atl1_clean_tx_ring - Free Tx Buffers
1185  * @adapter: board private structure
1186  */
1187 static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
1188 {
1189         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1190         struct atl1_buffer *buffer_info;
1191         struct pci_dev *pdev = adapter->pdev;
1192         unsigned long size;
1193         unsigned int i;
1194
1195         /* Free all the Tx ring sk_buffs */
1196         for (i = 0; i < tpd_ring->count; i++) {
1197                 buffer_info = &tpd_ring->buffer_info[i];
1198                 if (buffer_info->dma) {
1199                         pci_unmap_page(pdev, buffer_info->dma,
1200                                 buffer_info->length, PCI_DMA_TODEVICE);
1201                         buffer_info->dma = 0;
1202                 }
1203         }
1204
1205         for (i = 0; i < tpd_ring->count; i++) {
1206                 buffer_info = &tpd_ring->buffer_info[i];
1207                 if (buffer_info->skb) {
1208                         dev_kfree_skb_any(buffer_info->skb);
1209                         buffer_info->skb = NULL;
1210                 }
1211         }
1212
1213         size = sizeof(struct atl1_buffer) * tpd_ring->count;
1214         memset(tpd_ring->buffer_info, 0, size);
1215
1216         /* Zero out the descriptor ring */
1217         memset(tpd_ring->desc, 0, tpd_ring->size);
1218
1219         atomic_set(&tpd_ring->next_to_use, 0);
1220         atomic_set(&tpd_ring->next_to_clean, 0);
1221 }
1222
1223 /*
1224  * atl1_free_ring_resources - Free Tx / RX descriptor Resources
1225  * @adapter: board private structure
1226  *
1227  * Free all transmit software resources
1228  */
1229 static void atl1_free_ring_resources(struct atl1_adapter *adapter)
1230 {
1231         struct pci_dev *pdev = adapter->pdev;
1232         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1233         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1234         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1235         struct atl1_ring_header *ring_header = &adapter->ring_header;
1236
1237         atl1_clean_tx_ring(adapter);
1238         atl1_clean_rx_ring(adapter);
1239
1240         kfree(tpd_ring->buffer_info);
1241         pci_free_consistent(pdev, ring_header->size, ring_header->desc,
1242                 ring_header->dma);
1243
1244         tpd_ring->buffer_info = NULL;
1245         tpd_ring->desc = NULL;
1246         tpd_ring->dma = 0;
1247
1248         rfd_ring->buffer_info = NULL;
1249         rfd_ring->desc = NULL;
1250         rfd_ring->dma = 0;
1251
1252         rrd_ring->desc = NULL;
1253         rrd_ring->dma = 0;
1254 }
1255
1256 static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
1257 {
1258         u32 value;
1259         struct atl1_hw *hw = &adapter->hw;
1260         struct net_device *netdev = adapter->netdev;
1261         /* Config MAC CTRL Register */
1262         value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1263         /* duplex */
1264         if (FULL_DUPLEX == adapter->link_duplex)
1265                 value |= MAC_CTRL_DUPLX;
1266         /* speed */
1267         value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
1268                          MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1269                   MAC_CTRL_SPEED_SHIFT);
1270         /* flow control */
1271         value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1272         /* PAD & CRC */
1273         value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1274         /* preamble length */
1275         value |= (((u32) adapter->hw.preamble_len
1276                    & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1277         /* vlan */
1278         if (adapter->vlgrp)
1279                 value |= MAC_CTRL_RMV_VLAN;
1280         /* rx checksum
1281            if (adapter->rx_csum)
1282            value |= MAC_CTRL_RX_CHKSUM_EN;
1283          */
1284         /* filter mode */
1285         value |= MAC_CTRL_BC_EN;
1286         if (netdev->flags & IFF_PROMISC)
1287                 value |= MAC_CTRL_PROMIS_EN;
1288         else if (netdev->flags & IFF_ALLMULTI)
1289                 value |= MAC_CTRL_MC_ALL_EN;
1290         /* value |= MAC_CTRL_LOOPBACK; */
1291         iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
1292 }
1293
1294 static u32 atl1_check_link(struct atl1_adapter *adapter)
1295 {
1296         struct atl1_hw *hw = &adapter->hw;
1297         struct net_device *netdev = adapter->netdev;
1298         u32 ret_val;
1299         u16 speed, duplex, phy_data;
1300         int reconfig = 0;
1301
1302         /* MII_BMSR must read twice */
1303         atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
1304         atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
1305         if (!(phy_data & BMSR_LSTATUS)) {
1306                 /* link down */
1307                 if (netif_carrier_ok(netdev)) {
1308                         /* old link state: Up */
1309                         if (netif_msg_link(adapter))
1310                                 dev_info(&adapter->pdev->dev, "link is down\n");
1311                         adapter->link_speed = SPEED_0;
1312                         netif_carrier_off(netdev);
1313                 }
1314                 return 0;
1315         }
1316
1317         /* Link Up */
1318         ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
1319         if (ret_val)
1320                 return ret_val;
1321
1322         switch (hw->media_type) {
1323         case MEDIA_TYPE_1000M_FULL:
1324                 if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
1325                         reconfig = 1;
1326                 break;
1327         case MEDIA_TYPE_100M_FULL:
1328                 if (speed != SPEED_100 || duplex != FULL_DUPLEX)
1329                         reconfig = 1;
1330                 break;
1331         case MEDIA_TYPE_100M_HALF:
1332                 if (speed != SPEED_100 || duplex != HALF_DUPLEX)
1333                         reconfig = 1;
1334                 break;
1335         case MEDIA_TYPE_10M_FULL:
1336                 if (speed != SPEED_10 || duplex != FULL_DUPLEX)
1337                         reconfig = 1;
1338                 break;
1339         case MEDIA_TYPE_10M_HALF:
1340                 if (speed != SPEED_10 || duplex != HALF_DUPLEX)
1341                         reconfig = 1;
1342                 break;
1343         }
1344
1345         /* link result is our setting */
1346         if (!reconfig) {
1347                 if (adapter->link_speed != speed
1348                     || adapter->link_duplex != duplex) {
1349                         adapter->link_speed = speed;
1350                         adapter->link_duplex = duplex;
1351                         atl1_setup_mac_ctrl(adapter);
1352                         if (netif_msg_link(adapter))
1353                                 dev_info(&adapter->pdev->dev,
1354                                         "%s link is up %d Mbps %s\n",
1355                                         netdev->name, adapter->link_speed,
1356                                         adapter->link_duplex == FULL_DUPLEX ?
1357                                         "full duplex" : "half duplex");
1358                 }
1359                 if (!netif_carrier_ok(netdev)) {
1360                         /* Link down -> Up */
1361                         netif_carrier_on(netdev);
1362                 }
1363                 return 0;
1364         }
1365
1366         /* change original link status */
1367         if (netif_carrier_ok(netdev)) {
1368                 adapter->link_speed = SPEED_0;
1369                 netif_carrier_off(netdev);
1370                 netif_stop_queue(netdev);
1371         }
1372
1373         if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
1374             hw->media_type != MEDIA_TYPE_1000M_FULL) {
1375                 switch (hw->media_type) {
1376                 case MEDIA_TYPE_100M_FULL:
1377                         phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
1378                                    MII_CR_RESET;
1379                         break;
1380                 case MEDIA_TYPE_100M_HALF:
1381                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
1382                         break;
1383                 case MEDIA_TYPE_10M_FULL:
1384                         phy_data =
1385                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
1386                         break;
1387                 default:
1388                         /* MEDIA_TYPE_10M_HALF: */
1389                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
1390                         break;
1391                 }
1392                 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
1393                 return 0;
1394         }
1395
1396         /* auto-neg, insert timer to re-config phy */
1397         if (!adapter->phy_timer_pending) {
1398                 adapter->phy_timer_pending = true;
1399                 mod_timer(&adapter->phy_config_timer,
1400                           round_jiffies(jiffies + 3 * HZ));
1401         }
1402
1403         return 0;
1404 }
1405
1406 static void set_flow_ctrl_old(struct atl1_adapter *adapter)
1407 {
1408         u32 hi, lo, value;
1409
1410         /* RFD Flow Control */
1411         value = adapter->rfd_ring.count;
1412         hi = value / 16;
1413         if (hi < 2)
1414                 hi = 2;
1415         lo = value * 7 / 8;
1416
1417         value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1418                 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1419         iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1420
1421         /* RRD Flow Control */
1422         value = adapter->rrd_ring.count;
1423         lo = value / 16;
1424         hi = value * 7 / 8;
1425         if (lo < 2)
1426                 lo = 2;
1427         value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1428                 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1429         iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1430 }
1431
1432 static void set_flow_ctrl_new(struct atl1_hw *hw)
1433 {
1434         u32 hi, lo, value;
1435
1436         /* RXF Flow Control */
1437         value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
1438         lo = value / 16;
1439         if (lo < 192)
1440                 lo = 192;
1441         hi = value * 7 / 8;
1442         if (hi < lo)
1443                 hi = lo + 16;
1444         value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1445                 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1446         iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1447
1448         /* RRD Flow Control */
1449         value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
1450         lo = value / 8;
1451         hi = value * 7 / 8;
1452         if (lo < 2)
1453                 lo = 2;
1454         if (hi < lo)
1455                 hi = lo + 3;
1456         value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1457                 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1458         iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1459 }
1460
1461 /*
1462  * atl1_configure - Configure Transmit&Receive Unit after Reset
1463  * @adapter: board private structure
1464  *
1465  * Configure the Tx /Rx unit of the MAC after a reset.
1466  */
1467 static u32 atl1_configure(struct atl1_adapter *adapter)
1468 {
1469         struct atl1_hw *hw = &adapter->hw;
1470         u32 value;
1471
1472         /* clear interrupt status */
1473         iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
1474
1475         /* set MAC Address */
1476         value = (((u32) hw->mac_addr[2]) << 24) |
1477                 (((u32) hw->mac_addr[3]) << 16) |
1478                 (((u32) hw->mac_addr[4]) << 8) |
1479                 (((u32) hw->mac_addr[5]));
1480         iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
1481         value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
1482         iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
1483
1484         /* tx / rx ring */
1485
1486         /* HI base address */
1487         iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
1488                 hw->hw_addr + REG_DESC_BASE_ADDR_HI);
1489         /* LO base address */
1490         iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
1491                 hw->hw_addr + REG_DESC_RFD_ADDR_LO);
1492         iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
1493                 hw->hw_addr + REG_DESC_RRD_ADDR_LO);
1494         iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
1495                 hw->hw_addr + REG_DESC_TPD_ADDR_LO);
1496         iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
1497                 hw->hw_addr + REG_DESC_CMB_ADDR_LO);
1498         iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
1499                 hw->hw_addr + REG_DESC_SMB_ADDR_LO);
1500
1501         /* element count */
1502         value = adapter->rrd_ring.count;
1503         value <<= 16;
1504         value += adapter->rfd_ring.count;
1505         iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
1506         iowrite32(adapter->tpd_ring.count, hw->hw_addr +
1507                 REG_DESC_TPD_RING_SIZE);
1508
1509         /* Load Ptr */
1510         iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
1511
1512         /* config Mailbox */
1513         value = ((atomic_read(&adapter->tpd_ring.next_to_use)
1514                   & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
1515                 ((atomic_read(&adapter->rrd_ring.next_to_clean)
1516                 & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
1517                 ((atomic_read(&adapter->rfd_ring.next_to_use)
1518                 & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
1519         iowrite32(value, hw->hw_addr + REG_MAILBOX);
1520
1521         /* config IPG/IFG */
1522         value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
1523                  << MAC_IPG_IFG_IPGT_SHIFT) |
1524                 (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
1525                 << MAC_IPG_IFG_MIFG_SHIFT) |
1526                 (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
1527                 << MAC_IPG_IFG_IPGR1_SHIFT) |
1528                 (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
1529                 << MAC_IPG_IFG_IPGR2_SHIFT);
1530         iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
1531
1532         /* config  Half-Duplex Control */
1533         value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
1534                 (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
1535                 << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
1536                 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
1537                 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
1538                 (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
1539                 << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
1540         iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
1541
1542         /* set Interrupt Moderator Timer */
1543         iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
1544         iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
1545
1546         /* set Interrupt Clear Timer */
1547         iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
1548
1549         /* set max frame size hw will accept */
1550         iowrite32(hw->max_frame_size, hw->hw_addr + REG_MTU);
1551
1552         /* jumbo size & rrd retirement timer */
1553         value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
1554                  << RXQ_JMBOSZ_TH_SHIFT) |
1555                 (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
1556                 << RXQ_JMBO_LKAH_SHIFT) |
1557                 (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
1558                 << RXQ_RRD_TIMER_SHIFT);
1559         iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
1560
1561         /* Flow Control */
1562         switch (hw->dev_rev) {
1563         case 0x8001:
1564         case 0x9001:
1565         case 0x9002:
1566         case 0x9003:
1567                 set_flow_ctrl_old(adapter);
1568                 break;
1569         default:
1570                 set_flow_ctrl_new(hw);
1571                 break;
1572         }
1573
1574         /* config TXQ */
1575         value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
1576                  << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
1577                 (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
1578                 << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
1579                 (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
1580                 << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE |
1581                 TXQ_CTRL_EN;
1582         iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
1583
1584         /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
1585         value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
1586                 << TX_JUMBO_TASK_TH_SHIFT) |
1587                 (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
1588                 << TX_TPD_MIN_IPG_SHIFT);
1589         iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
1590
1591         /* config RXQ */
1592         value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
1593                 << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
1594                 (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
1595                 << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
1596                 (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
1597                 << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) | RXQ_CTRL_CUT_THRU_EN |
1598                 RXQ_CTRL_EN;
1599         iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
1600
1601         /* config DMA Engine */
1602         value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1603                 << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
1604                 ((((u32) hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1605                 << DMA_CTRL_DMAW_BURST_LEN_SHIFT) | DMA_CTRL_DMAR_EN |
1606                 DMA_CTRL_DMAW_EN;
1607         value |= (u32) hw->dma_ord;
1608         if (atl1_rcb_128 == hw->rcb_value)
1609                 value |= DMA_CTRL_RCB_VALUE;
1610         iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
1611
1612         /* config CMB / SMB */
1613         value = (hw->cmb_tpd > adapter->tpd_ring.count) ?
1614                 hw->cmb_tpd : adapter->tpd_ring.count;
1615         value <<= 16;
1616         value |= hw->cmb_rrd;
1617         iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
1618         value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
1619         iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
1620         iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
1621
1622         /* --- enable CMB / SMB */
1623         value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
1624         iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
1625
1626         value = ioread32(adapter->hw.hw_addr + REG_ISR);
1627         if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
1628                 value = 1;      /* config failed */
1629         else
1630                 value = 0;
1631
1632         /* clear all interrupt status */
1633         iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
1634         iowrite32(0, adapter->hw.hw_addr + REG_ISR);
1635         return value;
1636 }
1637
1638 /*
1639  * atl1_pcie_patch - Patch for PCIE module
1640  */
1641 static void atl1_pcie_patch(struct atl1_adapter *adapter)
1642 {
1643         u32 value;
1644
1645         /* much vendor magic here */
1646         value = 0x6500;
1647         iowrite32(value, adapter->hw.hw_addr + 0x12FC);
1648         /* pcie flow control mode change */
1649         value = ioread32(adapter->hw.hw_addr + 0x1008);
1650         value |= 0x8000;
1651         iowrite32(value, adapter->hw.hw_addr + 0x1008);
1652 }
1653
1654 /*
1655  * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
1656  * on PCI Command register is disable.
1657  * The function enable this bit.
1658  * Brackett, 2006/03/15
1659  */
1660 static void atl1_via_workaround(struct atl1_adapter *adapter)
1661 {
1662         unsigned long value;
1663
1664         value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
1665         if (value & PCI_COMMAND_INTX_DISABLE)
1666                 value &= ~PCI_COMMAND_INTX_DISABLE;
1667         iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
1668 }
1669
1670 static void atl1_inc_smb(struct atl1_adapter *adapter)
1671 {
1672         struct net_device *netdev = adapter->netdev;
1673         struct stats_msg_block *smb = adapter->smb.smb;
1674
1675         /* Fill out the OS statistics structure */
1676         adapter->soft_stats.rx_packets += smb->rx_ok;
1677         adapter->soft_stats.tx_packets += smb->tx_ok;
1678         adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
1679         adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
1680         adapter->soft_stats.multicast += smb->rx_mcast;
1681         adapter->soft_stats.collisions += (smb->tx_1_col + smb->tx_2_col * 2 +
1682                 smb->tx_late_col + smb->tx_abort_col * adapter->hw.max_retry);
1683
1684         /* Rx Errors */
1685         adapter->soft_stats.rx_errors += (smb->rx_frag + smb->rx_fcs_err +
1686                 smb->rx_len_err + smb->rx_sz_ov + smb->rx_rxf_ov +
1687                 smb->rx_rrd_ov + smb->rx_align_err);
1688         adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
1689         adapter->soft_stats.rx_length_errors += smb->rx_len_err;
1690         adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
1691         adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
1692         adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
1693                 smb->rx_rxf_ov);
1694
1695         adapter->soft_stats.rx_pause += smb->rx_pause;
1696         adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
1697         adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
1698
1699         /* Tx Errors */
1700         adapter->soft_stats.tx_errors += (smb->tx_late_col +
1701                 smb->tx_abort_col + smb->tx_underrun + smb->tx_trunc);
1702         adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
1703         adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
1704         adapter->soft_stats.tx_window_errors += smb->tx_late_col;
1705
1706         adapter->soft_stats.excecol += smb->tx_abort_col;
1707         adapter->soft_stats.deffer += smb->tx_defer;
1708         adapter->soft_stats.scc += smb->tx_1_col;
1709         adapter->soft_stats.mcc += smb->tx_2_col;
1710         adapter->soft_stats.latecol += smb->tx_late_col;
1711         adapter->soft_stats.tx_underun += smb->tx_underrun;
1712         adapter->soft_stats.tx_trunc += smb->tx_trunc;
1713         adapter->soft_stats.tx_pause += smb->tx_pause;
1714
1715         netdev->stats.rx_packets = adapter->soft_stats.rx_packets;
1716         netdev->stats.tx_packets = adapter->soft_stats.tx_packets;
1717         netdev->stats.rx_bytes = adapter->soft_stats.rx_bytes;
1718         netdev->stats.tx_bytes = adapter->soft_stats.tx_bytes;
1719         netdev->stats.multicast = adapter->soft_stats.multicast;
1720         netdev->stats.collisions = adapter->soft_stats.collisions;
1721         netdev->stats.rx_errors = adapter->soft_stats.rx_errors;
1722         netdev->stats.rx_over_errors =
1723                 adapter->soft_stats.rx_missed_errors;
1724         netdev->stats.rx_length_errors =
1725                 adapter->soft_stats.rx_length_errors;
1726         netdev->stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
1727         netdev->stats.rx_frame_errors =
1728                 adapter->soft_stats.rx_frame_errors;
1729         netdev->stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
1730         netdev->stats.rx_missed_errors =
1731                 adapter->soft_stats.rx_missed_errors;
1732         netdev->stats.tx_errors = adapter->soft_stats.tx_errors;
1733         netdev->stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
1734         netdev->stats.tx_aborted_errors =
1735                 adapter->soft_stats.tx_aborted_errors;
1736         netdev->stats.tx_window_errors =
1737                 adapter->soft_stats.tx_window_errors;
1738         netdev->stats.tx_carrier_errors =
1739                 adapter->soft_stats.tx_carrier_errors;
1740 }
1741
1742 static void atl1_update_mailbox(struct atl1_adapter *adapter)
1743 {
1744         unsigned long flags;
1745         u32 tpd_next_to_use;
1746         u32 rfd_next_to_use;
1747         u32 rrd_next_to_clean;
1748         u32 value;
1749
1750         spin_lock_irqsave(&adapter->mb_lock, flags);
1751
1752         tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1753         rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
1754         rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
1755
1756         value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1757                 MB_RFD_PROD_INDX_SHIFT) |
1758                 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1759                 MB_RRD_CONS_INDX_SHIFT) |
1760                 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1761                 MB_TPD_PROD_INDX_SHIFT);
1762         iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
1763
1764         spin_unlock_irqrestore(&adapter->mb_lock, flags);
1765 }
1766
1767 static void atl1_clean_alloc_flag(struct atl1_adapter *adapter,
1768         struct rx_return_desc *rrd, u16 offset)
1769 {
1770         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1771
1772         while (rfd_ring->next_to_clean != (rrd->buf_indx + offset)) {
1773                 rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced = 0;
1774                 if (++rfd_ring->next_to_clean == rfd_ring->count) {
1775                         rfd_ring->next_to_clean = 0;
1776                 }
1777         }
1778 }
1779
1780 static void atl1_update_rfd_index(struct atl1_adapter *adapter,
1781         struct rx_return_desc *rrd)
1782 {
1783         u16 num_buf;
1784
1785         num_buf = (rrd->xsz.xsum_sz.pkt_size + adapter->rx_buffer_len - 1) /
1786                 adapter->rx_buffer_len;
1787         if (rrd->num_buf == num_buf)
1788                 /* clean alloc flag for bad rrd */
1789                 atl1_clean_alloc_flag(adapter, rrd, num_buf);
1790 }
1791
1792 static void atl1_rx_checksum(struct atl1_adapter *adapter,
1793         struct rx_return_desc *rrd, struct sk_buff *skb)
1794 {
1795         struct pci_dev *pdev = adapter->pdev;
1796
1797         /*
1798          * The L1 hardware contains a bug that erroneously sets the
1799          * PACKET_FLAG_ERR and ERR_FLAG_L4_CHKSUM bits whenever a
1800          * fragmented IP packet is received, even though the packet
1801          * is perfectly valid and its checksum is correct. There's
1802          * no way to distinguish between one of these good packets
1803          * and a packet that actually contains a TCP/UDP checksum
1804          * error, so all we can do is allow it to be handed up to
1805          * the higher layers and let it be sorted out there.
1806          */
1807
1808         skb->ip_summed = CHECKSUM_NONE;
1809
1810         if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
1811                 if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
1812                                         ERR_FLAG_CODE | ERR_FLAG_OV)) {
1813                         adapter->hw_csum_err++;
1814                         if (netif_msg_rx_err(adapter))
1815                                 dev_printk(KERN_DEBUG, &pdev->dev,
1816                                         "rx checksum error\n");
1817                         return;
1818                 }
1819         }
1820
1821         /* not IPv4 */
1822         if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
1823                 /* checksum is invalid, but it's not an IPv4 pkt, so ok */
1824                 return;
1825
1826         /* IPv4 packet */
1827         if (likely(!(rrd->err_flg &
1828                 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
1829                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1830                 adapter->hw_csum_good++;
1831                 return;
1832         }
1833
1834         return;
1835 }
1836
1837 /*
1838  * atl1_alloc_rx_buffers - Replace used receive buffers
1839  * @adapter: address of board private structure
1840  */
1841 static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
1842 {
1843         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1844         struct pci_dev *pdev = adapter->pdev;
1845         struct page *page;
1846         unsigned long offset;
1847         struct atl1_buffer *buffer_info, *next_info;
1848         struct sk_buff *skb;
1849         u16 num_alloc = 0;
1850         u16 rfd_next_to_use, next_next;
1851         struct rx_free_desc *rfd_desc;
1852
1853         next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
1854         if (++next_next == rfd_ring->count)
1855                 next_next = 0;
1856         buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1857         next_info = &rfd_ring->buffer_info[next_next];
1858
1859         while (!buffer_info->alloced && !next_info->alloced) {
1860                 if (buffer_info->skb) {
1861                         buffer_info->alloced = 1;
1862                         goto next;
1863                 }
1864
1865                 rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
1866
1867                 skb = netdev_alloc_skb(adapter->netdev,
1868                                        adapter->rx_buffer_len + NET_IP_ALIGN);
1869                 if (unlikely(!skb)) {
1870                         /* Better luck next round */
1871                         adapter->netdev->stats.rx_dropped++;
1872                         break;
1873                 }
1874
1875                 /*
1876                  * Make buffer alignment 2 beyond a 16 byte boundary
1877                  * this will result in a 16 byte aligned IP header after
1878                  * the 14 byte MAC header is removed
1879                  */
1880                 skb_reserve(skb, NET_IP_ALIGN);
1881
1882                 buffer_info->alloced = 1;
1883                 buffer_info->skb = skb;
1884                 buffer_info->length = (u16) adapter->rx_buffer_len;
1885                 page = virt_to_page(skb->data);
1886                 offset = (unsigned long)skb->data & ~PAGE_MASK;
1887                 buffer_info->dma = pci_map_page(pdev, page, offset,
1888                                                 adapter->rx_buffer_len,
1889                                                 PCI_DMA_FROMDEVICE);
1890                 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1891                 rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
1892                 rfd_desc->coalese = 0;
1893
1894 next:
1895                 rfd_next_to_use = next_next;
1896                 if (unlikely(++next_next == rfd_ring->count))
1897                         next_next = 0;
1898
1899                 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1900                 next_info = &rfd_ring->buffer_info[next_next];
1901                 num_alloc++;
1902         }
1903
1904         if (num_alloc) {
1905                 /*
1906                  * Force memory writes to complete before letting h/w
1907                  * know there are new descriptors to fetch.  (Only
1908                  * applicable for weak-ordered memory model archs,
1909                  * such as IA-64).
1910                  */
1911                 wmb();
1912                 atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
1913         }
1914         return num_alloc;
1915 }
1916
1917 static void atl1_intr_rx(struct atl1_adapter *adapter)
1918 {
1919         int i, count;
1920         u16 length;
1921         u16 rrd_next_to_clean;
1922         u32 value;
1923         struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1924         struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1925         struct atl1_buffer *buffer_info;
1926         struct rx_return_desc *rrd;
1927         struct sk_buff *skb;
1928
1929         count = 0;
1930
1931         rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
1932
1933         while (1) {
1934                 rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
1935                 i = 1;
1936                 if (likely(rrd->xsz.valid)) {   /* packet valid */
1937 chk_rrd:
1938                         /* check rrd status */
1939                         if (likely(rrd->num_buf == 1))
1940                                 goto rrd_ok;
1941                         else if (netif_msg_rx_err(adapter)) {
1942                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1943                                         "unexpected RRD buffer count\n");
1944                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1945                                         "rx_buf_len = %d\n",
1946                                         adapter->rx_buffer_len);
1947                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1948                                         "RRD num_buf = %d\n",
1949                                         rrd->num_buf);
1950                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1951                                         "RRD pkt_len = %d\n",
1952                                         rrd->xsz.xsum_sz.pkt_size);
1953                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1954                                         "RRD pkt_flg = 0x%08X\n",
1955                                         rrd->pkt_flg);
1956                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1957                                         "RRD err_flg = 0x%08X\n",
1958                                         rrd->err_flg);
1959                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1960                                         "RRD vlan_tag = 0x%08X\n",
1961                                         rrd->vlan_tag);
1962                         }
1963
1964                         /* rrd seems to be bad */
1965                         if (unlikely(i-- > 0)) {
1966                                 /* rrd may not be DMAed completely */
1967                                 udelay(1);
1968                                 goto chk_rrd;
1969                         }
1970                         /* bad rrd */
1971                         if (netif_msg_rx_err(adapter))
1972                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1973                                         "bad RRD\n");
1974                         /* see if update RFD index */
1975                         if (rrd->num_buf > 1)
1976                                 atl1_update_rfd_index(adapter, rrd);
1977
1978                         /* update rrd */
1979                         rrd->xsz.valid = 0;
1980                         if (++rrd_next_to_clean == rrd_ring->count)
1981                                 rrd_next_to_clean = 0;
1982                         count++;
1983                         continue;
1984                 } else {        /* current rrd still not be updated */
1985
1986                         break;
1987                 }
1988 rrd_ok:
1989                 /* clean alloc flag for bad rrd */
1990                 atl1_clean_alloc_flag(adapter, rrd, 0);
1991
1992                 buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
1993                 if (++rfd_ring->next_to_clean == rfd_ring->count)
1994                         rfd_ring->next_to_clean = 0;
1995
1996                 /* update rrd next to clean */
1997                 if (++rrd_next_to_clean == rrd_ring->count)
1998                         rrd_next_to_clean = 0;
1999                 count++;
2000
2001                 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
2002                         if (!(rrd->err_flg &
2003                                 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
2004                                 | ERR_FLAG_LEN))) {
2005                                 /* packet error, don't need upstream */
2006                                 buffer_info->alloced = 0;
2007                                 rrd->xsz.valid = 0;
2008                                 continue;
2009                         }
2010                 }
2011
2012                 /* Good Receive */
2013                 pci_unmap_page(adapter->pdev, buffer_info->dma,
2014                                buffer_info->length, PCI_DMA_FROMDEVICE);
2015                 buffer_info->dma = 0;
2016                 skb = buffer_info->skb;
2017                 length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
2018
2019                 skb_put(skb, length - ETH_FCS_LEN);
2020
2021                 /* Receive Checksum Offload */
2022                 atl1_rx_checksum(adapter, rrd, skb);
2023                 skb->protocol = eth_type_trans(skb, adapter->netdev);
2024
2025                 if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
2026                         u16 vlan_tag = (rrd->vlan_tag >> 4) |
2027                                         ((rrd->vlan_tag & 7) << 13) |
2028                                         ((rrd->vlan_tag & 8) << 9);
2029                         vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
2030                 } else
2031                         netif_rx(skb);
2032
2033                 /* let protocol layer free skb */
2034                 buffer_info->skb = NULL;
2035                 buffer_info->alloced = 0;
2036                 rrd->xsz.valid = 0;
2037         }
2038
2039         atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
2040
2041         atl1_alloc_rx_buffers(adapter);
2042
2043         /* update mailbox ? */
2044         if (count) {
2045                 u32 tpd_next_to_use;
2046                 u32 rfd_next_to_use;
2047
2048                 spin_lock(&adapter->mb_lock);
2049
2050                 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
2051                 rfd_next_to_use =
2052                     atomic_read(&adapter->rfd_ring.next_to_use);
2053                 rrd_next_to_clean =
2054                     atomic_read(&adapter->rrd_ring.next_to_clean);
2055                 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
2056                         MB_RFD_PROD_INDX_SHIFT) |
2057                         ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
2058                         MB_RRD_CONS_INDX_SHIFT) |
2059                         ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
2060                         MB_TPD_PROD_INDX_SHIFT);
2061                 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
2062                 spin_unlock(&adapter->mb_lock);
2063         }
2064 }
2065
2066 static void atl1_intr_tx(struct atl1_adapter *adapter)
2067 {
2068         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2069         struct atl1_buffer *buffer_info;
2070         u16 sw_tpd_next_to_clean;
2071         u16 cmb_tpd_next_to_clean;
2072
2073         sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
2074         cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
2075
2076         while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
2077                 struct tx_packet_desc *tpd;
2078
2079                 tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
2080                 buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
2081                 if (buffer_info->dma) {
2082                         pci_unmap_page(adapter->pdev, buffer_info->dma,
2083                                        buffer_info->length, PCI_DMA_TODEVICE);
2084                         buffer_info->dma = 0;
2085                 }
2086
2087                 if (buffer_info->skb) {
2088                         dev_kfree_skb_irq(buffer_info->skb);
2089                         buffer_info->skb = NULL;
2090                 }
2091
2092                 if (++sw_tpd_next_to_clean == tpd_ring->count)
2093                         sw_tpd_next_to_clean = 0;
2094         }
2095         atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
2096
2097         if (netif_queue_stopped(adapter->netdev)
2098             && netif_carrier_ok(adapter->netdev))
2099                 netif_wake_queue(adapter->netdev);
2100 }
2101
2102 static u16 atl1_tpd_avail(struct atl1_tpd_ring *tpd_ring)
2103 {
2104         u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
2105         u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
2106         return ((next_to_clean > next_to_use) ?
2107                 next_to_clean - next_to_use - 1 :
2108                 tpd_ring->count + next_to_clean - next_to_use - 1);
2109 }
2110
2111 static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
2112         struct tx_packet_desc *ptpd)
2113 {
2114         u8 hdr_len, ip_off;
2115         u32 real_len;
2116         int err;
2117
2118         if (skb_shinfo(skb)->gso_size) {
2119                 if (skb_header_cloned(skb)) {
2120                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2121                         if (unlikely(err))
2122                                 return -1;
2123                 }
2124
2125                 if (skb->protocol == htons(ETH_P_IP)) {
2126                         struct iphdr *iph = ip_hdr(skb);
2127
2128                         real_len = (((unsigned char *)iph - skb->data) +
2129                                 ntohs(iph->tot_len));
2130                         if (real_len < skb->len)
2131                                 pskb_trim(skb, real_len);
2132                         hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2133                         if (skb->len == hdr_len) {
2134                                 iph->check = 0;
2135                                 tcp_hdr(skb)->check =
2136                                         ~csum_tcpudp_magic(iph->saddr,
2137                                         iph->daddr, tcp_hdrlen(skb),
2138                                         IPPROTO_TCP, 0);
2139                                 ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
2140                                         TPD_IPHL_SHIFT;
2141                                 ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
2142                                         TPD_TCPHDRLEN_MASK) <<
2143                                         TPD_TCPHDRLEN_SHIFT;
2144                                 ptpd->word3 |= 1 << TPD_IP_CSUM_SHIFT;
2145                                 ptpd->word3 |= 1 << TPD_TCP_CSUM_SHIFT;
2146                                 return 1;
2147                         }
2148
2149                         iph->check = 0;
2150                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2151                                         iph->daddr, 0, IPPROTO_TCP, 0);
2152                         ip_off = (unsigned char *)iph -
2153                                 (unsigned char *) skb_network_header(skb);
2154                         if (ip_off == 8) /* 802.3-SNAP frame */
2155                                 ptpd->word3 |= 1 << TPD_ETHTYPE_SHIFT;
2156                         else if (ip_off != 0)
2157                                 return -2;
2158
2159                         ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
2160                                 TPD_IPHL_SHIFT;
2161                         ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
2162                                 TPD_TCPHDRLEN_MASK) << TPD_TCPHDRLEN_SHIFT;
2163                         ptpd->word3 |= (skb_shinfo(skb)->gso_size &
2164                                 TPD_MSS_MASK) << TPD_MSS_SHIFT;
2165                         ptpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
2166                         return 3;
2167                 }
2168         }
2169         return false;
2170 }
2171
2172 static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
2173         struct tx_packet_desc *ptpd)
2174 {
2175         u8 css, cso;
2176
2177         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2178                 css = (u8) (skb->csum_start - skb_headroom(skb));
2179                 cso = css + (u8) skb->csum_offset;
2180                 if (unlikely(css & 0x1)) {
2181                         /* L1 hardware requires an even number here */
2182                         if (netif_msg_tx_err(adapter))
2183                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2184                                         "payload offset not an even number\n");
2185                         return -1;
2186                 }
2187                 ptpd->word3 |= (css & TPD_PLOADOFFSET_MASK) <<
2188                         TPD_PLOADOFFSET_SHIFT;
2189                 ptpd->word3 |= (cso & TPD_CCSUMOFFSET_MASK) <<
2190                         TPD_CCSUMOFFSET_SHIFT;
2191                 ptpd->word3 |= 1 << TPD_CUST_CSUM_EN_SHIFT;
2192                 return true;
2193         }
2194         return 0;
2195 }
2196
2197 static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
2198         struct tx_packet_desc *ptpd)
2199 {
2200         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2201         struct atl1_buffer *buffer_info;
2202         u16 buf_len = skb->len;
2203         struct page *page;
2204         unsigned long offset;
2205         unsigned int nr_frags;
2206         unsigned int f;
2207         int retval;
2208         u16 next_to_use;
2209         u16 data_len;
2210         u8 hdr_len;
2211
2212         buf_len -= skb->data_len;
2213         nr_frags = skb_shinfo(skb)->nr_frags;
2214         next_to_use = atomic_read(&tpd_ring->next_to_use);
2215         buffer_info = &tpd_ring->buffer_info[next_to_use];
2216         BUG_ON(buffer_info->skb);
2217         /* put skb in last TPD */
2218         buffer_info->skb = NULL;
2219
2220         retval = (ptpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
2221         if (retval) {
2222                 /* TSO */
2223                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2224                 buffer_info->length = hdr_len;
2225                 page = virt_to_page(skb->data);
2226                 offset = (unsigned long)skb->data & ~PAGE_MASK;
2227                 buffer_info->dma = pci_map_page(adapter->pdev, page,
2228                                                 offset, hdr_len,
2229                                                 PCI_DMA_TODEVICE);
2230
2231                 if (++next_to_use == tpd_ring->count)
2232                         next_to_use = 0;
2233
2234                 if (buf_len > hdr_len) {
2235                         int i, nseg;
2236
2237                         data_len = buf_len - hdr_len;
2238                         nseg = (data_len + ATL1_MAX_TX_BUF_LEN - 1) /
2239                                 ATL1_MAX_TX_BUF_LEN;
2240                         for (i = 0; i < nseg; i++) {
2241                                 buffer_info =
2242                                     &tpd_ring->buffer_info[next_to_use];
2243                                 buffer_info->skb = NULL;
2244                                 buffer_info->length =
2245                                     (ATL1_MAX_TX_BUF_LEN >=
2246                                      data_len) ? ATL1_MAX_TX_BUF_LEN : data_len;
2247                                 data_len -= buffer_info->length;
2248                                 page = virt_to_page(skb->data +
2249                                         (hdr_len + i * ATL1_MAX_TX_BUF_LEN));
2250                                 offset = (unsigned long)(skb->data +
2251                                         (hdr_len + i * ATL1_MAX_TX_BUF_LEN)) &
2252                                         ~PAGE_MASK;
2253                                 buffer_info->dma = pci_map_page(adapter->pdev,
2254                                         page, offset, buffer_info->length,
2255                                         PCI_DMA_TODEVICE);
2256                                 if (++next_to_use == tpd_ring->count)
2257                                         next_to_use = 0;
2258                         }
2259                 }
2260         } else {
2261                 /* not TSO */
2262                 buffer_info->length = buf_len;
2263                 page = virt_to_page(skb->data);
2264                 offset = (unsigned long)skb->data & ~PAGE_MASK;
2265                 buffer_info->dma = pci_map_page(adapter->pdev, page,
2266                         offset, buf_len, PCI_DMA_TODEVICE);
2267                 if (++next_to_use == tpd_ring->count)
2268                         next_to_use = 0;
2269         }
2270
2271         for (f = 0; f < nr_frags; f++) {
2272                 struct skb_frag_struct *frag;
2273                 u16 i, nseg;
2274
2275                 frag = &skb_shinfo(skb)->frags[f];
2276                 buf_len = frag->size;
2277
2278                 nseg = (buf_len + ATL1_MAX_TX_BUF_LEN - 1) /
2279                         ATL1_MAX_TX_BUF_LEN;
2280                 for (i = 0; i < nseg; i++) {
2281                         buffer_info = &tpd_ring->buffer_info[next_to_use];
2282                         BUG_ON(buffer_info->skb);
2283
2284                         buffer_info->skb = NULL;
2285                         buffer_info->length = (buf_len > ATL1_MAX_TX_BUF_LEN) ?
2286                                 ATL1_MAX_TX_BUF_LEN : buf_len;
2287                         buf_len -= buffer_info->length;
2288                         buffer_info->dma = pci_map_page(adapter->pdev,
2289                                 frag->page,
2290                                 frag->page_offset + (i * ATL1_MAX_TX_BUF_LEN),
2291                                 buffer_info->length, PCI_DMA_TODEVICE);
2292
2293                         if (++next_to_use == tpd_ring->count)
2294                                 next_to_use = 0;
2295                 }
2296         }
2297
2298         /* last tpd's buffer-info */
2299         buffer_info->skb = skb;
2300 }
2301
2302 static void atl1_tx_queue(struct atl1_adapter *adapter, u16 count,
2303        struct tx_packet_desc *ptpd)
2304 {
2305         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2306         struct atl1_buffer *buffer_info;
2307         struct tx_packet_desc *tpd;
2308         u16 j;
2309         u32 val;
2310         u16 next_to_use = (u16) atomic_read(&tpd_ring->next_to_use);
2311
2312         for (j = 0; j < count; j++) {
2313                 buffer_info = &tpd_ring->buffer_info[next_to_use];
2314                 tpd = ATL1_TPD_DESC(&adapter->tpd_ring, next_to_use);
2315                 if (tpd != ptpd)
2316                         memcpy(tpd, ptpd, sizeof(struct tx_packet_desc));
2317                 tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2318                 tpd->word2 &= ~(TPD_BUFLEN_MASK << TPD_BUFLEN_SHIFT);
2319                 tpd->word2 |= (cpu_to_le16(buffer_info->length) &
2320                         TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT;
2321
2322                 /*
2323                  * if this is the first packet in a TSO chain, set
2324                  * TPD_HDRFLAG, otherwise, clear it.
2325                  */
2326                 val = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) &
2327                         TPD_SEGMENT_EN_MASK;
2328                 if (val) {
2329                         if (!j)
2330                                 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
2331                         else
2332                                 tpd->word3 &= ~(1 << TPD_HDRFLAG_SHIFT);
2333                 }
2334
2335                 if (j == (count - 1))
2336                         tpd->word3 |= 1 << TPD_EOP_SHIFT;
2337
2338                 if (++next_to_use == tpd_ring->count)
2339                         next_to_use = 0;
2340         }
2341         /*
2342          * Force memory writes to complete before letting h/w
2343          * know there are new descriptors to fetch.  (Only
2344          * applicable for weak-ordered memory model archs,
2345          * such as IA-64).
2346          */
2347         wmb();
2348
2349         atomic_set(&tpd_ring->next_to_use, next_to_use);
2350 }
2351
2352 static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2353 {
2354         struct atl1_adapter *adapter = netdev_priv(netdev);
2355         struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2356         int len = skb->len;
2357         int tso;
2358         int count = 1;
2359         int ret_val;
2360         struct tx_packet_desc *ptpd;
2361         u16 frag_size;
2362         u16 vlan_tag;
2363         unsigned int nr_frags = 0;
2364         unsigned int mss = 0;
2365         unsigned int f;
2366         unsigned int proto_hdr_len;
2367
2368         len -= skb->data_len;
2369
2370         if (unlikely(skb->len <= 0)) {
2371                 dev_kfree_skb_any(skb);
2372                 return NETDEV_TX_OK;
2373         }
2374
2375         nr_frags = skb_shinfo(skb)->nr_frags;
2376         for (f = 0; f < nr_frags; f++) {
2377                 frag_size = skb_shinfo(skb)->frags[f].size;
2378                 if (frag_size)
2379                         count += (frag_size + ATL1_MAX_TX_BUF_LEN - 1) /
2380                                 ATL1_MAX_TX_BUF_LEN;
2381         }
2382
2383         mss = skb_shinfo(skb)->gso_size;
2384         if (mss) {
2385                 if (skb->protocol == htons(ETH_P_IP)) {
2386                         proto_hdr_len = (skb_transport_offset(skb) +
2387                                          tcp_hdrlen(skb));
2388                         if (unlikely(proto_hdr_len > len)) {
2389                                 dev_kfree_skb_any(skb);
2390                                 return NETDEV_TX_OK;
2391                         }
2392                         /* need additional TPD ? */
2393                         if (proto_hdr_len != len)
2394                                 count += (len - proto_hdr_len +
2395                                         ATL1_MAX_TX_BUF_LEN - 1) /
2396                                         ATL1_MAX_TX_BUF_LEN;
2397                 }
2398         }
2399
2400         if (atl1_tpd_avail(&adapter->tpd_ring) < count) {
2401                 /* not enough descriptors */
2402                 netif_stop_queue(netdev);
2403                 if (netif_msg_tx_queued(adapter))
2404                         dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2405                                 "tx busy\n");
2406                 return NETDEV_TX_BUSY;
2407         }
2408
2409         ptpd = ATL1_TPD_DESC(tpd_ring,
2410                 (u16) atomic_read(&tpd_ring->next_to_use));
2411         memset(ptpd, 0, sizeof(struct tx_packet_desc));
2412
2413         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2414                 vlan_tag = vlan_tx_tag_get(skb);
2415                 vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
2416                         ((vlan_tag >> 9) & 0x8);
2417                 ptpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
2418                 ptpd->word2 |= (vlan_tag & TPD_VLANTAG_MASK) <<
2419                         TPD_VLANTAG_SHIFT;
2420         }
2421
2422         tso = atl1_tso(adapter, skb, ptpd);
2423         if (tso < 0) {
2424                 dev_kfree_skb_any(skb);
2425                 return NETDEV_TX_OK;
2426         }
2427
2428         if (!tso) {
2429                 ret_val = atl1_tx_csum(adapter, skb, ptpd);
2430                 if (ret_val < 0) {
2431                         dev_kfree_skb_any(skb);
2432                         return NETDEV_TX_OK;
2433                 }
2434         }
2435
2436         atl1_tx_map(adapter, skb, ptpd);
2437         atl1_tx_queue(adapter, count, ptpd);
2438         atl1_update_mailbox(adapter);
2439         mmiowb();
2440         return NETDEV_TX_OK;
2441 }
2442
2443 /*
2444  * atl1_intr - Interrupt Handler
2445  * @irq: interrupt number
2446  * @data: pointer to a network interface device structure
2447  * @pt_regs: CPU registers structure
2448  */
2449 static irqreturn_t atl1_intr(int irq, void *data)
2450 {
2451         struct atl1_adapter *adapter = netdev_priv(data);
2452         u32 status;
2453         int max_ints = 10;
2454
2455         status = adapter->cmb.cmb->int_stats;
2456         if (!status)
2457                 return IRQ_NONE;
2458
2459         do {
2460                 /* clear CMB interrupt status at once */
2461                 adapter->cmb.cmb->int_stats = 0;
2462
2463                 if (status & ISR_GPHY)  /* clear phy status */
2464                         atlx_clear_phy_int(adapter);
2465
2466                 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
2467                 iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
2468
2469                 /* check if SMB intr */
2470                 if (status & ISR_SMB)
2471                         atl1_inc_smb(adapter);
2472
2473                 /* check if PCIE PHY Link down */
2474                 if (status & ISR_PHY_LINKDOWN) {
2475                         if (netif_msg_intr(adapter))
2476                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2477                                         "pcie phy link down %x\n", status);
2478                         if (netif_running(adapter->netdev)) {   /* reset MAC */
2479                                 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
2480                                 schedule_work(&adapter->pcie_dma_to_rst_task);
2481                                 return IRQ_HANDLED;
2482                         }
2483                 }
2484
2485                 /* check if DMA read/write error ? */
2486                 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
2487                         if (netif_msg_intr(adapter))
2488                                 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2489                                         "pcie DMA r/w error (status = 0x%x)\n",
2490                                         status);
2491                         iowrite32(0, adapter->hw.hw_addr + REG_IMR);
2492                         schedule_work(&adapter->pcie_dma_to_rst_task);
2493                         return IRQ_HANDLED;
2494                 }
2495
2496                 /* link event */
2497                 if (status & ISR_GPHY) {
2498                         adapter->soft_stats.tx_carrier_errors++;
2499                         atl1_check_for_link(adapter);
2500                 }
2501
2502                 /* transmit event */
2503                 if (status & ISR_CMB_TX)
2504                         atl1_intr_tx(adapter);
2505
2506                 /* rx exception */
2507                 if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
2508                         ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
2509                         ISR_HOST_RRD_OV | ISR_CMB_RX))) {
2510                         if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
2511                                 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
2512                                 ISR_HOST_RRD_OV))
2513                                 if (netif_msg_intr(adapter))
2514                                         dev_printk(KERN_DEBUG,
2515                                                 &adapter->pdev->dev,
2516                                                 "rx exception, ISR = 0x%x\n",
2517                                                 status);
2518                         atl1_intr_rx(adapter);
2519                 }
2520
2521                 if (--max_ints < 0)
2522                         break;
2523
2524         } while ((status = adapter->cmb.cmb->int_stats));
2525
2526         /* re-enable Interrupt */
2527         iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
2528         return IRQ_HANDLED;
2529 }
2530
2531
2532 /*
2533  * atl1_phy_config - Timer Call-back
2534  * @data: pointer to netdev cast into an unsigned long
2535  */
2536 static void atl1_phy_config(unsigned long data)
2537 {
2538         struct atl1_adapter *adapter = (struct atl1_adapter *)data;
2539         struct atl1_hw *hw = &adapter->hw;
2540         unsigned long flags;
2541
2542         spin_lock_irqsave(&adapter->lock, flags);
2543         adapter->phy_timer_pending = false;
2544         atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
2545         atl1_write_phy_reg(hw, MII_ATLX_CR, hw->mii_1000t_ctrl_reg);
2546         atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
2547         spin_unlock_irqrestore(&adapter->lock, flags);
2548 }
2549
2550 /*
2551  * Orphaned vendor comment left intact here:
2552  * <vendor comment>
2553  * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
2554  * will assert. We do soft reset <0x1400=1> according
2555  * with the SPEC. BUT, it seemes that PCIE or DMA
2556  * state-machine will not be reset. DMAR_TO_INT will
2557  * assert again and again.
2558  * </vendor comment>
2559  */
2560
2561 static int atl1_reset(struct atl1_adapter *adapter)
2562 {
2563         int ret;
2564         ret = atl1_reset_hw(&adapter->hw);
2565         if (ret)
2566                 return ret;
2567         return atl1_init_hw(&adapter->hw);
2568 }
2569
2570 static s32 atl1_up(struct atl1_adapter *adapter)
2571 {
2572         struct net_device *netdev = adapter->netdev;
2573         int err;
2574         int irq_flags = IRQF_SAMPLE_RANDOM;
2575
2576         /* hardware has been reset, we need to reload some things */
2577         atlx_set_multi(netdev);
2578         atl1_init_ring_ptrs(adapter);
2579         atlx_restore_vlan(adapter);
2580         err = atl1_alloc_rx_buffers(adapter);
2581         if (unlikely(!err))
2582                 /* no RX BUFFER allocated */
2583                 return -ENOMEM;
2584
2585         if (unlikely(atl1_configure(adapter))) {
2586                 err = -EIO;
2587                 goto err_up;
2588         }
2589
2590         err = pci_enable_msi(adapter->pdev);
2591         if (err) {
2592                 if (netif_msg_ifup(adapter))
2593                         dev_info(&adapter->pdev->dev,
2594                                 "Unable to enable MSI: %d\n", err);
2595                 irq_flags |= IRQF_SHARED;
2596         }
2597
2598         err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
2599                         netdev->name, netdev);
2600         if (unlikely(err))
2601                 goto err_up;
2602
2603         atlx_irq_enable(adapter);
2604         atl1_check_link(adapter);
2605         netif_start_queue(netdev);
2606         return 0;
2607
2608 err_up:
2609         pci_disable_msi(adapter->pdev);
2610         /* free rx_buffers */
2611         atl1_clean_rx_ring(adapter);
2612         return err;
2613 }
2614
2615 static void atl1_down(struct atl1_adapter *adapter)
2616 {
2617         struct net_device *netdev = adapter->netdev;
2618
2619         netif_stop_queue(netdev);
2620         del_timer_sync(&adapter->phy_config_timer);
2621         adapter->phy_timer_pending = false;
2622
2623         atlx_irq_disable(adapter);
2624         free_irq(adapter->pdev->irq, netdev);
2625         pci_disable_msi(adapter->pdev);
2626         atl1_reset_hw(&adapter->hw);
2627         adapter->cmb.cmb->int_stats = 0;
2628
2629         adapter->link_speed = SPEED_0;
2630         adapter->link_duplex = -1;
2631         netif_carrier_off(netdev);
2632
2633         atl1_clean_tx_ring(adapter);
2634         atl1_clean_rx_ring(adapter);
2635 }
2636
2637 static void atl1_tx_timeout_task(struct work_struct *work)
2638 {
2639         struct atl1_adapter *adapter =
2640                 container_of(work, struct atl1_adapter, tx_timeout_task);
2641         struct net_device *netdev = adapter->netdev;
2642
2643         netif_device_detach(netdev);
2644         atl1_down(adapter);
2645         atl1_up(adapter);
2646         netif_device_attach(netdev);
2647 }
2648
2649 /*
2650  * atl1_change_mtu - Change the Maximum Transfer Unit
2651  * @netdev: network interface device structure
2652  * @new_mtu: new value for maximum frame size
2653  *
2654  * Returns 0 on success, negative on failure
2655  */
2656 static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
2657 {
2658         struct atl1_adapter *adapter = netdev_priv(netdev);
2659         int old_mtu = netdev->mtu;
2660         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2661
2662         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
2663             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2664                 if (netif_msg_link(adapter))
2665                         dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
2666                 return -EINVAL;
2667         }
2668
2669         adapter->hw.max_frame_size = max_frame;
2670         adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
2671         adapter->rx_buffer_len = (max_frame + 7) & ~7;
2672         adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
2673
2674         netdev->mtu = new_mtu;
2675         if ((old_mtu != new_mtu) && netif_running(netdev)) {
2676                 atl1_down(adapter);
2677                 atl1_up(adapter);
2678         }
2679
2680         return 0;
2681 }
2682
2683 /*
2684  * atl1_open - Called when a network interface is made active
2685  * @netdev: network interface device structure
2686  *
2687  * Returns 0 on success, negative value on failure
2688  *
2689  * The open entry point is called when a network interface is made
2690  * active by the system (IFF_UP).  At this point all resources needed
2691  * for transmit and receive operations are allocated, the interrupt
2692  * handler is registered with the OS, the watchdog timer is started,
2693  * and the stack is notified that the interface is ready.
2694  */
2695 static int atl1_open(struct net_device *netdev)
2696 {
2697         struct atl1_adapter *adapter = netdev_priv(netdev);
2698         int err;
2699
2700         netif_carrier_off(netdev);
2701
2702         /* allocate transmit descriptors */
2703         err = atl1_setup_ring_resources(adapter);
2704         if (err)
2705                 return err;
2706
2707         err = atl1_up(adapter);
2708         if (err)
2709                 goto err_up;
2710
2711         return 0;
2712
2713 err_up:
2714         atl1_reset(adapter);
2715         return err;
2716 }
2717
2718 /*
2719  * atl1_close - Disables a network interface
2720  * @netdev: network interface device structure
2721  *
2722  * Returns 0, this is not allowed to fail
2723  *
2724  * The close entry point is called when an interface is de-activated
2725  * by the OS.  The hardware is still under the drivers control, but
2726  * needs to be disabled.  A global MAC reset is issued to stop the
2727  * hardware, and all transmit and receive resources are freed.
2728  */
2729 static int atl1_close(struct net_device *netdev)
2730 {
2731         struct atl1_adapter *adapter = netdev_priv(netdev);
2732         atl1_down(adapter);
2733         atl1_free_ring_resources(adapter);
2734         return 0;
2735 }
2736
2737 #ifdef CONFIG_PM
2738 static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
2739 {
2740         struct net_device *netdev = pci_get_drvdata(pdev);
2741         struct atl1_adapter *adapter = netdev_priv(netdev);
2742         struct atl1_hw *hw = &adapter->hw;
2743         u32 ctrl = 0;
2744         u32 wufc = adapter->wol;
2745         u32 val;
2746         int retval;
2747         u16 speed;
2748         u16 duplex;
2749
2750         netif_device_detach(netdev);
2751         if (netif_running(netdev))
2752                 atl1_down(adapter);
2753
2754         retval = pci_save_state(pdev);
2755         if (retval)
2756                 return retval;
2757
2758         atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2759         atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2760         val = ctrl & BMSR_LSTATUS;
2761         if (val)
2762                 wufc &= ~ATLX_WUFC_LNKC;
2763
2764         if (val && wufc) {
2765                 val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
2766                 if (val) {
2767                         if (netif_msg_ifdown(adapter))
2768                                 dev_printk(KERN_DEBUG, &pdev->dev,
2769                                         "error getting speed/duplex\n");
2770                         goto disable_wol;
2771                 }
2772
2773                 ctrl = 0;
2774
2775                 /* enable magic packet WOL */
2776                 if (wufc & ATLX_WUFC_MAG)
2777                         ctrl |= (WOL_MAGIC_EN | WOL_MAGIC_PME_EN);
2778                 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2779                 ioread32(hw->hw_addr + REG_WOL_CTRL);
2780
2781                 /* configure the mac */
2782                 ctrl = MAC_CTRL_RX_EN;
2783                 ctrl |= ((u32)((speed == SPEED_1000) ? MAC_CTRL_SPEED_1000 :
2784                         MAC_CTRL_SPEED_10_100) << MAC_CTRL_SPEED_SHIFT);
2785                 if (duplex == FULL_DUPLEX)
2786                         ctrl |= MAC_CTRL_DUPLX;
2787                 ctrl |= (((u32)adapter->hw.preamble_len &
2788                         MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
2789                 if (adapter->vlgrp)
2790                         ctrl |= MAC_CTRL_RMV_VLAN;
2791                 if (wufc & ATLX_WUFC_MAG)
2792                         ctrl |= MAC_CTRL_BC_EN;
2793                 iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
2794                 ioread32(hw->hw_addr + REG_MAC_CTRL);
2795
2796                 /* poke the PHY */
2797                 ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2798                 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2799                 iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);
2800                 ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2801
2802                 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2803                 goto exit;
2804         }
2805
2806         if (!val && wufc) {
2807                 ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
2808                 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2809                 ioread32(hw->hw_addr + REG_WOL_CTRL);
2810                 iowrite32(0, hw->hw_addr + REG_MAC_CTRL);
2811                 ioread32(hw->hw_addr + REG_MAC_CTRL);
2812                 hw->phy_configured = false;
2813                 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2814                 goto exit;
2815         }
2816
2817 disable_wol:
2818         iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
2819         ioread32(hw->hw_addr + REG_WOL_CTRL);
2820         ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2821         ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2822         iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);
2823         ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2824         hw->phy_configured = false;
2825         pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2826 exit:
2827         if (netif_running(netdev))
2828                 pci_disable_msi(adapter->pdev);
2829         pci_disable_device(pdev);
2830         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2831
2832         return 0;
2833 }
2834
2835 static int atl1_resume(struct pci_dev *pdev)
2836 {
2837         struct net_device *netdev = pci_get_drvdata(pdev);
2838         struct atl1_adapter *adapter = netdev_priv(netdev);
2839         u32 err;
2840
2841         pci_set_power_state(pdev, PCI_D0);
2842         pci_restore_state(pdev);
2843
2844         err = pci_enable_device(pdev);
2845         if (err) {
2846                 if (netif_msg_ifup(adapter))
2847                         dev_printk(KERN_DEBUG, &pdev->dev,
2848                                 "error enabling pci device\n");
2849                 return err;
2850         }
2851
2852         pci_set_master(pdev);
2853         iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
2854         pci_enable_wake(pdev, PCI_D3hot, 0);
2855         pci_enable_wake(pdev, PCI_D3cold, 0);
2856
2857         atl1_reset_hw(&adapter->hw);
2858         adapter->cmb.cmb->int_stats = 0;
2859
2860         if (netif_running(netdev))
2861                 atl1_up(adapter);
2862         netif_device_attach(netdev);
2863
2864         return 0;
2865 }
2866 #else
2867 #define atl1_suspend NULL
2868 #define atl1_resume NULL
2869 #endif
2870
2871 static void atl1_shutdown(struct pci_dev *pdev)
2872 {
2873 #ifdef CONFIG_PM
2874         atl1_suspend(pdev, PMSG_SUSPEND);
2875 #endif
2876 }
2877
2878 #ifdef CONFIG_NET_POLL_CONTROLLER
2879 static void atl1_poll_controller(struct net_device *netdev)
2880 {
2881         disable_irq(netdev->irq);
2882         atl1_intr(netdev->irq, netdev);
2883         enable_irq(netdev->irq);
2884 }
2885 #endif
2886
2887 static const struct net_device_ops atl1_netdev_ops = {
2888         .ndo_open               = atl1_open,
2889         .ndo_stop               = atl1_close,
2890         .ndo_start_xmit         = atl1_xmit_frame,
2891         .ndo_set_multicast_list = atlx_set_multi,
2892         .ndo_validate_addr      = eth_validate_addr,
2893         .ndo_set_mac_address    = atl1_set_mac,
2894         .ndo_change_mtu         = atl1_change_mtu,
2895         .ndo_do_ioctl           = atlx_ioctl,
2896         .ndo_tx_timeout         = atlx_tx_timeout,
2897         .ndo_vlan_rx_register   = atlx_vlan_rx_register,
2898 #ifdef CONFIG_NET_POLL_CONTROLLER
2899         .ndo_poll_controller    = atl1_poll_controller,
2900 #endif
2901 };
2902
2903 /*
2904  * atl1_probe - Device Initialization Routine
2905  * @pdev: PCI device information struct
2906  * @ent: entry in atl1_pci_tbl
2907  *
2908  * Returns 0 on success, negative on failure
2909  *
2910  * atl1_probe initializes an adapter identified by a pci_dev structure.
2911  * The OS initialization, configuring of the adapter private structure,
2912  * and a hardware reset occur.
2913  */
2914 static int __devinit atl1_probe(struct pci_dev *pdev,
2915         const struct pci_device_id *ent)
2916 {
2917         struct net_device *netdev;
2918         struct atl1_adapter *adapter;
2919         static int cards_found = 0;
2920         int err;
2921
2922         err = pci_enable_device(pdev);
2923         if (err)
2924                 return err;
2925
2926         /*
2927          * The atl1 chip can DMA to 64-bit addresses, but it uses a single
2928          * shared register for the high 32 bits, so only a single, aligned,
2929          * 4 GB physical address range can be used at a time.
2930          *
2931          * Supporting 64-bit DMA on this hardware is more trouble than it's
2932          * worth.  It is far easier to limit to 32-bit DMA than update
2933          * various kernel subsystems to support the mechanics required by a
2934          * fixed-high-32-bit system.
2935          */
2936         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2937         if (err) {
2938                 dev_err(&pdev->dev, "no usable DMA configuration\n");
2939                 goto err_dma;
2940         }
2941         /*
2942          * Mark all PCI regions associated with PCI device
2943          * pdev as being reserved by owner atl1_driver_name
2944          */
2945         err = pci_request_regions(pdev, ATLX_DRIVER_NAME);
2946         if (err)
2947                 goto err_request_regions;
2948
2949         /*
2950          * Enables bus-mastering on the device and calls
2951          * pcibios_set_master to do the needed arch specific settings
2952          */
2953         pci_set_master(pdev);
2954
2955         netdev = alloc_etherdev(sizeof(struct atl1_adapter));
2956         if (!netdev) {
2957                 err = -ENOMEM;
2958                 goto err_alloc_etherdev;
2959         }
2960         SET_NETDEV_DEV(netdev, &pdev->dev);
2961
2962         pci_set_drvdata(pdev, netdev);
2963         adapter = netdev_priv(netdev);
2964         adapter->netdev = netdev;
2965         adapter->pdev = pdev;
2966         adapter->hw.back = adapter;
2967         adapter->msg_enable = netif_msg_init(debug, atl1_default_msg);
2968
2969         adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
2970         if (!adapter->hw.hw_addr) {
2971                 err = -EIO;
2972                 goto err_pci_iomap;
2973         }
2974         /* get device revision number */
2975         adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
2976                 (REG_MASTER_CTRL + 2));
2977         if (netif_msg_probe(adapter))
2978                 dev_info(&pdev->dev, "version %s\n", ATLX_DRIVER_VERSION);
2979
2980         /* set default ring resource counts */
2981         adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
2982         adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
2983
2984         adapter->mii.dev = netdev;
2985         adapter->mii.mdio_read = mdio_read;
2986         adapter->mii.mdio_write = mdio_write;
2987         adapter->mii.phy_id_mask = 0x1f;
2988         adapter->mii.reg_num_mask = 0x1f;
2989
2990         netdev->netdev_ops = &atl1_netdev_ops;
2991         netdev->watchdog_timeo = 5 * HZ;
2992
2993         netdev->ethtool_ops = &atl1_ethtool_ops;
2994         adapter->bd_number = cards_found;
2995
2996         /* setup the private structure */
2997         err = atl1_sw_init(adapter);
2998         if (err)
2999                 goto err_common;
3000
3001         netdev->features = NETIF_F_HW_CSUM;
3002         netdev->features |= NETIF_F_SG;
3003         netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
3004
3005         /*
3006          * patch for some L1 of old version,
3007          * the final version of L1 may not need these
3008          * patches
3009          */
3010         /* atl1_pcie_patch(adapter); */
3011
3012         /* really reset GPHY core */
3013         iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);
3014
3015         /*
3016          * reset the controller to
3017          * put the device in a known good starting state
3018          */
3019         if (atl1_reset_hw(&adapter->hw)) {
3020                 err = -EIO;
3021                 goto err_common;
3022         }
3023
3024         /* copy the MAC address out of the EEPROM */
3025         atl1_read_mac_addr(&adapter->hw);
3026         memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
3027
3028         if (!is_valid_ether_addr(netdev->dev_addr)) {
3029                 err = -EIO;
3030                 goto err_common;
3031         }
3032
3033         atl1_check_options(adapter);
3034
3035         /* pre-init the MAC, and setup link */
3036         err = atl1_init_hw(&adapter->hw);
3037         if (err) {
3038                 err = -EIO;
3039                 goto err_common;
3040         }
3041
3042         atl1_pcie_patch(adapter);
3043         /* assume we have no link for now */
3044         netif_carrier_off(netdev);
3045         netif_stop_queue(netdev);
3046
3047         setup_timer(&adapter->phy_config_timer, &atl1_phy_config,
3048                     (unsigned long)adapter);
3049         adapter->phy_timer_pending = false;
3050
3051         INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
3052
3053         INIT_WORK(&adapter->link_chg_task, atlx_link_chg_task);
3054
3055         INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
3056
3057         err = register_netdev(netdev);
3058         if (err)
3059                 goto err_common;
3060
3061         cards_found++;
3062         atl1_via_workaround(adapter);
3063         return 0;
3064
3065 err_common:
3066         pci_iounmap(pdev, adapter->hw.hw_addr);
3067 err_pci_iomap:
3068         free_netdev(netdev);
3069 err_alloc_etherdev:
3070         pci_release_regions(pdev);
3071 err_dma:
3072 err_request_regions:
3073         pci_disable_device(pdev);
3074         return err;
3075 }
3076
3077 /*
3078  * atl1_remove - Device Removal Routine
3079  * @pdev: PCI device information struct
3080  *
3081  * atl1_remove is called by the PCI subsystem to alert the driver
3082  * that it should release a PCI device.  The could be caused by a
3083  * Hot-Plug event, or because the driver is going to be removed from
3084  * memory.
3085  */
3086 static void __devexit atl1_remove(struct pci_dev *pdev)
3087 {
3088         struct net_device *netdev = pci_get_drvdata(pdev);
3089         struct atl1_adapter *adapter;
3090         /* Device not available. Return. */
3091         if (!netdev)
3092                 return;
3093
3094         adapter = netdev_priv(netdev);
3095
3096         /*
3097          * Some atl1 boards lack persistent storage for their MAC, and get it
3098          * from the BIOS during POST.  If we've been messing with the MAC
3099          * address, we need to save the permanent one.
3100          */
3101         if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
3102                 memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr,
3103                         ETH_ALEN);
3104                 atl1_set_mac_addr(&adapter->hw);
3105         }
3106
3107         iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);
3108         unregister_netdev(netdev);
3109         pci_iounmap(pdev, adapter->hw.hw_addr);
3110         pci_release_regions(pdev);
3111         free_netdev(netdev);
3112         pci_disable_device(pdev);
3113 }
3114
3115 static struct pci_driver atl1_driver = {
3116         .name = ATLX_DRIVER_NAME,
3117         .id_table = atl1_pci_tbl,
3118         .probe = atl1_probe,
3119         .remove = __devexit_p(atl1_remove),
3120         .suspend = atl1_suspend,
3121         .resume = atl1_resume,
3122         .shutdown = atl1_shutdown
3123 };
3124
3125 /*
3126  * atl1_exit_module - Driver Exit Cleanup Routine
3127  *
3128  * atl1_exit_module is called just before the driver is removed
3129  * from memory.
3130  */
3131 static void __exit atl1_exit_module(void)
3132 {
3133         pci_unregister_driver(&atl1_driver);
3134 }
3135
3136 /*
3137  * atl1_init_module - Driver Registration Routine
3138  *
3139  * atl1_init_module is the first routine called when the driver is
3140  * loaded. All it does is register with the PCI subsystem.
3141  */
3142 static int __init atl1_init_module(void)
3143 {
3144         return pci_register_driver(&atl1_driver);
3145 }
3146
3147 module_init(atl1_init_module);
3148 module_exit(atl1_exit_module);
3149
3150 struct atl1_stats {
3151         char stat_string[ETH_GSTRING_LEN];
3152         int sizeof_stat;
3153         int stat_offset;
3154 };
3155
3156 #define ATL1_STAT(m) \
3157         sizeof(((struct atl1_adapter *)0)->m), offsetof(struct atl1_adapter, m)
3158
3159 static struct atl1_stats atl1_gstrings_stats[] = {
3160         {"rx_packets", ATL1_STAT(soft_stats.rx_packets)},
3161         {"tx_packets", ATL1_STAT(soft_stats.tx_packets)},
3162         {"rx_bytes", ATL1_STAT(soft_stats.rx_bytes)},
3163         {"tx_bytes", ATL1_STAT(soft_stats.tx_bytes)},
3164         {"rx_errors", ATL1_STAT(soft_stats.rx_errors)},
3165         {"tx_errors", ATL1_STAT(soft_stats.tx_errors)},
3166         {"multicast", ATL1_STAT(soft_stats.multicast)},
3167         {"collisions", ATL1_STAT(soft_stats.collisions)},
3168         {"rx_length_errors", ATL1_STAT(soft_stats.rx_length_errors)},
3169         {"rx_over_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
3170         {"rx_crc_errors", ATL1_STAT(soft_stats.rx_crc_errors)},
3171         {"rx_frame_errors", ATL1_STAT(soft_stats.rx_frame_errors)},
3172         {"rx_fifo_errors", ATL1_STAT(soft_stats.rx_fifo_errors)},
3173         {"rx_missed_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
3174         {"tx_aborted_errors", ATL1_STAT(soft_stats.tx_aborted_errors)},
3175         {"tx_carrier_errors", ATL1_STAT(soft_stats.tx_carrier_errors)},
3176         {"tx_fifo_errors", ATL1_STAT(soft_stats.tx_fifo_errors)},
3177         {"tx_window_errors", ATL1_STAT(soft_stats.tx_window_errors)},
3178         {"tx_abort_exce_coll", ATL1_STAT(soft_stats.excecol)},
3179         {"tx_abort_late_coll", ATL1_STAT(soft_stats.latecol)},
3180         {"tx_deferred_ok", ATL1_STAT(soft_stats.deffer)},
3181         {"tx_single_coll_ok", ATL1_STAT(soft_stats.scc)},
3182         {"tx_multi_coll_ok", ATL1_STAT(soft_stats.mcc)},
3183         {"tx_underun", ATL1_STAT(soft_stats.tx_underun)},
3184         {"tx_trunc", ATL1_STAT(soft_stats.tx_trunc)},
3185         {"tx_pause", ATL1_STAT(soft_stats.tx_pause)},
3186         {"rx_pause", ATL1_STAT(soft_stats.rx_pause)},
3187         {"rx_rrd_ov", ATL1_STAT(soft_stats.rx_rrd_ov)},
3188         {"rx_trunc", ATL1_STAT(soft_stats.rx_trunc)}
3189 };
3190
3191 static void atl1_get_ethtool_stats(struct net_device *netdev,
3192         struct ethtool_stats *stats, u64 *data)
3193 {
3194         struct atl1_adapter *adapter = netdev_priv(netdev);
3195         int i;
3196         char *p;
3197
3198         for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
3199                 p = (char *)adapter+atl1_gstrings_stats[i].stat_offset;
3200                 data[i] = (atl1_gstrings_stats[i].sizeof_stat ==
3201                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
3202         }
3203
3204 }
3205
3206 static int atl1_get_sset_count(struct net_device *netdev, int sset)
3207 {
3208         switch (sset) {
3209         case ETH_SS_STATS:
3210                 return ARRAY_SIZE(atl1_gstrings_stats);
3211         default:
3212                 return -EOPNOTSUPP;
3213         }
3214 }
3215
3216 static int atl1_get_settings(struct net_device *netdev,
3217         struct ethtool_cmd *ecmd)
3218 {
3219         struct atl1_adapter *adapter = netdev_priv(netdev);
3220         struct atl1_hw *hw = &adapter->hw;
3221
3222         ecmd->supported = (SUPPORTED_10baseT_Half |
3223                            SUPPORTED_10baseT_Full |
3224                            SUPPORTED_100baseT_Half |
3225                            SUPPORTED_100baseT_Full |
3226                            SUPPORTED_1000baseT_Full |
3227                            SUPPORTED_Autoneg | SUPPORTED_TP);
3228         ecmd->advertising = ADVERTISED_TP;
3229         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3230             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3231                 ecmd->advertising |= ADVERTISED_Autoneg;
3232                 if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR) {
3233                         ecmd->advertising |= ADVERTISED_Autoneg;
3234                         ecmd->advertising |=
3235                             (ADVERTISED_10baseT_Half |
3236                              ADVERTISED_10baseT_Full |
3237                              ADVERTISED_100baseT_Half |
3238                              ADVERTISED_100baseT_Full |
3239                              ADVERTISED_1000baseT_Full);
3240                 } else
3241                         ecmd->advertising |= (ADVERTISED_1000baseT_Full);
3242         }
3243         ecmd->port = PORT_TP;
3244         ecmd->phy_address = 0;
3245         ecmd->transceiver = XCVR_INTERNAL;
3246
3247         if (netif_carrier_ok(adapter->netdev)) {
3248                 u16 link_speed, link_duplex;
3249                 atl1_get_speed_and_duplex(hw, &link_speed, &link_duplex);
3250                 ecmd->speed = link_speed;
3251                 if (link_duplex == FULL_DUPLEX)
3252                         ecmd->duplex = DUPLEX_FULL;
3253                 else
3254                         ecmd->duplex = DUPLEX_HALF;
3255         } else {
3256                 ecmd->speed = -1;
3257                 ecmd->duplex = -1;
3258         }
3259         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3260             hw->media_type == MEDIA_TYPE_1000M_FULL)
3261                 ecmd->autoneg = AUTONEG_ENABLE;
3262         else
3263                 ecmd->autoneg = AUTONEG_DISABLE;
3264
3265         return 0;
3266 }
3267
3268 static int atl1_set_settings(struct net_device *netdev,
3269         struct ethtool_cmd *ecmd)
3270 {
3271         struct atl1_adapter *adapter = netdev_priv(netdev);
3272         struct atl1_hw *hw = &adapter->hw;
3273         u16 phy_data;
3274         int ret_val = 0;
3275         u16 old_media_type = hw->media_type;
3276
3277         if (netif_running(adapter->netdev)) {
3278                 if (netif_msg_link(adapter))
3279                         dev_dbg(&adapter->pdev->dev,
3280                                 "ethtool shutting down adapter\n");
3281                 atl1_down(adapter);
3282         }
3283
3284         if (ecmd->autoneg == AUTONEG_ENABLE)
3285                 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
3286         else {
3287                 if (ecmd->speed == SPEED_1000) {
3288                         if (ecmd->duplex != DUPLEX_FULL) {
3289                                 if (netif_msg_link(adapter))
3290                                         dev_warn(&adapter->pdev->dev,
3291                                                 "1000M half is invalid\n");
3292                                 ret_val = -EINVAL;
3293                                 goto exit_sset;
3294                         }
3295                         hw->media_type = MEDIA_TYPE_1000M_FULL;
3296                 } else if (ecmd->speed == SPEED_100) {
3297                         if (ecmd->duplex == DUPLEX_FULL)
3298                                 hw->media_type = MEDIA_TYPE_100M_FULL;
3299                         else
3300                                 hw->media_type = MEDIA_TYPE_100M_HALF;
3301                 } else {
3302                         if (ecmd->duplex == DUPLEX_FULL)
3303                                 hw->media_type = MEDIA_TYPE_10M_FULL;
3304                         else
3305                                 hw->media_type = MEDIA_TYPE_10M_HALF;
3306                 }
3307         }
3308         switch (hw->media_type) {
3309         case MEDIA_TYPE_AUTO_SENSOR:
3310                 ecmd->advertising =
3311                     ADVERTISED_10baseT_Half |
3312                     ADVERTISED_10baseT_Full |
3313                     ADVERTISED_100baseT_Half |
3314                     ADVERTISED_100baseT_Full |
3315                     ADVERTISED_1000baseT_Full |
3316                     ADVERTISED_Autoneg | ADVERTISED_TP;
3317                 break;
3318         case MEDIA_TYPE_1000M_FULL:
3319                 ecmd->advertising =
3320                     ADVERTISED_1000baseT_Full |
3321                     ADVERTISED_Autoneg | ADVERTISED_TP;
3322                 break;
3323         default:
3324                 ecmd->advertising = 0;
3325                 break;
3326         }
3327         if (atl1_phy_setup_autoneg_adv(hw)) {
3328                 ret_val = -EINVAL;
3329                 if (netif_msg_link(adapter))
3330                         dev_warn(&adapter->pdev->dev,
3331                                 "invalid ethtool speed/duplex setting\n");
3332                 goto exit_sset;
3333         }
3334         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3335             hw->media_type == MEDIA_TYPE_1000M_FULL)
3336                 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
3337         else {
3338                 switch (hw->media_type) {
3339                 case MEDIA_TYPE_100M_FULL:
3340                         phy_data =
3341                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
3342                             MII_CR_RESET;
3343                         break;
3344                 case MEDIA_TYPE_100M_HALF:
3345                         phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
3346                         break;
3347                 case MEDIA_TYPE_10M_FULL:
3348                         phy_data =
3349                             MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
3350                         break;
3351                 default:
3352                         /* MEDIA_TYPE_10M_HALF: */
3353                         phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
3354                         break;
3355                 }
3356         }
3357         atl1_write_phy_reg(hw, MII_BMCR, phy_data);
3358 exit_sset:
3359         if (ret_val)
3360                 hw->media_type = old_media_type;
3361
3362         if (netif_running(adapter->netdev)) {
3363                 if (netif_msg_link(adapter))
3364                         dev_dbg(&adapter->pdev->dev,
3365                                 "ethtool starting adapter\n");
3366                 atl1_up(adapter);
3367         } else if (!ret_val) {
3368                 if (netif_msg_link(adapter))
3369                         dev_dbg(&adapter->pdev->dev,
3370                                 "ethtool resetting adapter\n");
3371                 atl1_reset(adapter);
3372         }
3373         return ret_val;
3374 }
3375
3376 static void atl1_get_drvinfo(struct net_device *netdev,
3377         struct ethtool_drvinfo *drvinfo)
3378 {
3379         struct atl1_adapter *adapter = netdev_priv(netdev);
3380
3381         strlcpy(drvinfo->driver, ATLX_DRIVER_NAME, sizeof(drvinfo->driver));
3382         strlcpy(drvinfo->version, ATLX_DRIVER_VERSION,
3383                 sizeof(drvinfo->version));
3384         strlcpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version));
3385         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
3386                 sizeof(drvinfo->bus_info));
3387         drvinfo->eedump_len = ATL1_EEDUMP_LEN;
3388 }
3389
3390 static void atl1_get_wol(struct net_device *netdev,
3391         struct ethtool_wolinfo *wol)
3392 {
3393         struct atl1_adapter *adapter = netdev_priv(netdev);
3394
3395         wol->supported = WAKE_MAGIC;
3396         wol->wolopts = 0;
3397         if (adapter->wol & ATLX_WUFC_MAG)
3398                 wol->wolopts |= WAKE_MAGIC;
3399         return;
3400 }
3401
3402 static int atl1_set_wol(struct net_device *netdev,
3403         struct ethtool_wolinfo *wol)
3404 {
3405         struct atl1_adapter *adapter = netdev_priv(netdev);
3406
3407         if (wol->wolopts & (WAKE_PHY | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST |
3408                 WAKE_ARP | WAKE_MAGICSECURE))
3409                 return -EOPNOTSUPP;
3410         adapter->wol = 0;
3411         if (wol->wolopts & WAKE_MAGIC)
3412                 adapter->wol |= ATLX_WUFC_MAG;
3413         return 0;
3414 }
3415
3416 static u32 atl1_get_msglevel(struct net_device *netdev)
3417 {
3418         struct atl1_adapter *adapter = netdev_priv(netdev);
3419         return adapter->msg_enable;
3420 }
3421
3422 static void atl1_set_msglevel(struct net_device *netdev, u32 value)
3423 {
3424         struct atl1_adapter *adapter = netdev_priv(netdev);
3425         adapter->msg_enable = value;
3426 }
3427
3428 static int atl1_get_regs_len(struct net_device *netdev)
3429 {
3430         return ATL1_REG_COUNT * sizeof(u32);
3431 }
3432
3433 static void atl1_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
3434         void *p)
3435 {
3436         struct atl1_adapter *adapter = netdev_priv(netdev);
3437         struct atl1_hw *hw = &adapter->hw;
3438         unsigned int i;
3439         u32 *regbuf = p;
3440
3441         for (i = 0; i < ATL1_REG_COUNT; i++) {
3442                 /*
3443                  * This switch statement avoids reserved regions
3444                  * of register space.
3445                  */
3446                 switch (i) {
3447                 case 6 ... 9:
3448                 case 14:
3449                 case 29 ... 31:
3450                 case 34 ... 63:
3451                 case 75 ... 127:
3452                 case 136 ... 1023:
3453                 case 1027 ... 1087:
3454                 case 1091 ... 1151:
3455                 case 1194 ... 1195:
3456                 case 1200 ... 1201:
3457                 case 1206 ... 1213:
3458                 case 1216 ... 1279:
3459                 case 1290 ... 1311:
3460                 case 1323 ... 1343:
3461                 case 1358 ... 1359:
3462                 case 1368 ... 1375:
3463                 case 1378 ... 1383:
3464                 case 1388 ... 1391:
3465                 case 1393 ... 1395:
3466                 case 1402 ... 1403:
3467                 case 1410 ... 1471:
3468                 case 1522 ... 1535:
3469                         /* reserved region; don't read it */
3470                         regbuf[i] = 0;
3471                         break;
3472                 default:
3473                         /* unreserved region */
3474                         regbuf[i] = ioread32(hw->hw_addr + (i * sizeof(u32)));
3475                 }
3476         }
3477 }
3478
3479 static void atl1_get_ringparam(struct net_device *netdev,
3480         struct ethtool_ringparam *ring)
3481 {
3482         struct atl1_adapter *adapter = netdev_priv(netdev);
3483         struct atl1_tpd_ring *txdr = &adapter->tpd_ring;
3484         struct atl1_rfd_ring *rxdr = &adapter->rfd_ring;
3485
3486         ring->rx_max_pending = ATL1_MAX_RFD;
3487         ring->tx_max_pending = ATL1_MAX_TPD;
3488         ring->rx_mini_max_pending = 0;
3489         ring->rx_jumbo_max_pending = 0;
3490         ring->rx_pending = rxdr->count;
3491         ring->tx_pending = txdr->count;
3492         ring->rx_mini_pending = 0;
3493         ring->rx_jumbo_pending = 0;
3494 }
3495
3496 static int atl1_set_ringparam(struct net_device *netdev,
3497         struct ethtool_ringparam *ring)
3498 {
3499         struct atl1_adapter *adapter = netdev_priv(netdev);
3500         struct atl1_tpd_ring *tpdr = &adapter->tpd_ring;
3501         struct atl1_rrd_ring *rrdr = &adapter->rrd_ring;
3502         struct atl1_rfd_ring *rfdr = &adapter->rfd_ring;
3503
3504         struct atl1_tpd_ring tpd_old, tpd_new;
3505         struct atl1_rfd_ring rfd_old, rfd_new;
3506         struct atl1_rrd_ring rrd_old, rrd_new;
3507         struct atl1_ring_header rhdr_old, rhdr_new;
3508         int err;
3509
3510         tpd_old = adapter->tpd_ring;
3511         rfd_old = adapter->rfd_ring;
3512         rrd_old = adapter->rrd_ring;
3513         rhdr_old = adapter->ring_header;
3514
3515         if (netif_running(adapter->netdev))
3516                 atl1_down(adapter);
3517
3518         rfdr->count = (u16) max(ring->rx_pending, (u32) ATL1_MIN_RFD);
3519         rfdr->count = rfdr->count > ATL1_MAX_RFD ? ATL1_MAX_RFD :
3520                         rfdr->count;
3521         rfdr->count = (rfdr->count + 3) & ~3;
3522         rrdr->count = rfdr->count;
3523
3524         tpdr->count = (u16) max(ring->tx_pending, (u32) ATL1_MIN_TPD);
3525         tpdr->count = tpdr->count > ATL1_MAX_TPD ? ATL1_MAX_TPD :
3526                         tpdr->count;
3527         tpdr->count = (tpdr->count + 3) & ~3;
3528
3529         if (netif_running(adapter->netdev)) {
3530                 /* try to get new resources before deleting old */
3531                 err = atl1_setup_ring_resources(adapter);
3532                 if (err)
3533                         goto err_setup_ring;
3534
3535                 /*
3536                  * save the new, restore the old in order to free it,
3537                  * then restore the new back again
3538                  */
3539
3540                 rfd_new = adapter->rfd_ring;
3541                 rrd_new = adapter->rrd_ring;
3542                 tpd_new = adapter->tpd_ring;
3543                 rhdr_new = adapter->ring_header;
3544                 adapter->rfd_ring = rfd_old;
3545                 adapter->rrd_ring = rrd_old;
3546                 adapter->tpd_ring = tpd_old;
3547                 adapter->ring_header = rhdr_old;
3548                 atl1_free_ring_resources(adapter);
3549                 adapter->rfd_ring = rfd_new;
3550                 adapter->rrd_ring = rrd_new;
3551                 adapter->tpd_ring = tpd_new;
3552                 adapter->ring_header = rhdr_new;
3553
3554                 err = atl1_up(adapter);
3555                 if (err)
3556                         return err;
3557         }
3558         return 0;
3559
3560 err_setup_ring:
3561         adapter->rfd_ring = rfd_old;
3562         adapter->rrd_ring = rrd_old;
3563         adapter->tpd_ring = tpd_old;
3564         adapter->ring_header = rhdr_old;
3565         atl1_up(adapter);
3566         return err;
3567 }
3568
3569 static void atl1_get_pauseparam(struct net_device *netdev,
3570         struct ethtool_pauseparam *epause)
3571 {
3572         struct atl1_adapter *adapter = netdev_priv(netdev);
3573         struct atl1_hw *hw = &adapter->hw;
3574
3575         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3576             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3577                 epause->autoneg = AUTONEG_ENABLE;
3578         } else {
3579                 epause->autoneg = AUTONEG_DISABLE;
3580         }
3581         epause->rx_pause = 1;
3582         epause->tx_pause = 1;
3583 }
3584
3585 static int atl1_set_pauseparam(struct net_device *netdev,
3586         struct ethtool_pauseparam *epause)
3587 {
3588         struct atl1_adapter *adapter = netdev_priv(netdev);
3589         struct atl1_hw *hw = &adapter->hw;
3590
3591         if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3592             hw->media_type == MEDIA_TYPE_1000M_FULL) {
3593                 epause->autoneg = AUTONEG_ENABLE;
3594         } else {
3595                 epause->autoneg = AUTONEG_DISABLE;
3596         }
3597
3598         epause->rx_pause = 1;
3599         epause->tx_pause = 1;
3600
3601         return 0;
3602 }
3603
3604 /* FIXME: is this right? -- CHS */
3605 static u32 atl1_get_rx_csum(struct net_device *netdev)
3606 {
3607         return 1;
3608 }
3609
3610 static void atl1_get_strings(struct net_device *netdev, u32 stringset,
3611         u8 *data)
3612 {
3613         u8 *p = data;
3614         int i;
3615
3616         switch (stringset) {
3617         case ETH_SS_STATS:
3618                 for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
3619                         memcpy(p, atl1_gstrings_stats[i].stat_string,
3620                                 ETH_GSTRING_LEN);
3621                         p += ETH_GSTRING_LEN;
3622                 }
3623                 break;
3624         }
3625 }
3626
3627 static int atl1_nway_reset(struct net_device *netdev)
3628 {
3629         struct atl1_adapter *adapter = netdev_priv(netdev);
3630         struct atl1_hw *hw = &adapter->hw;
3631
3632         if (netif_running(netdev)) {
3633                 u16 phy_data;
3634                 atl1_down(adapter);
3635
3636                 if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3637                         hw->media_type == MEDIA_TYPE_1000M_FULL) {
3638                         phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
3639                 } else {
3640                         switch (hw->media_type) {
3641                         case MEDIA_TYPE_100M_FULL:
3642                                 phy_data = MII_CR_FULL_DUPLEX |
3643                                         MII_CR_SPEED_100 | MII_CR_RESET;
3644                                 break;
3645                         case MEDIA_TYPE_100M_HALF:
3646                                 phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
3647                                 break;
3648                         case MEDIA_TYPE_10M_FULL:
3649                                 phy_data = MII_CR_FULL_DUPLEX |
3650                                         MII_CR_SPEED_10 | MII_CR_RESET;
3651                                 break;
3652                         default:
3653                                 /* MEDIA_TYPE_10M_HALF */
3654                                 phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
3655                         }
3656                 }
3657                 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
3658                 atl1_up(adapter);
3659         }
3660         return 0;
3661 }
3662
3663 const struct ethtool_ops atl1_ethtool_ops = {
3664         .get_settings           = atl1_get_settings,
3665         .set_settings           = atl1_set_settings,
3666         .get_drvinfo            = atl1_get_drvinfo,
3667         .get_wol                = atl1_get_wol,
3668         .set_wol                = atl1_set_wol,
3669         .get_msglevel           = atl1_get_msglevel,
3670         .set_msglevel           = atl1_set_msglevel,
3671         .get_regs_len           = atl1_get_regs_len,
3672         .get_regs               = atl1_get_regs,
3673         .get_ringparam          = atl1_get_ringparam,
3674         .set_ringparam          = atl1_set_ringparam,
3675         .get_pauseparam         = atl1_get_pauseparam,
3676         .set_pauseparam         = atl1_set_pauseparam,
3677         .get_rx_csum            = atl1_get_rx_csum,
3678         .set_tx_csum            = ethtool_op_set_tx_hw_csum,
3679         .get_link               = ethtool_op_get_link,
3680         .set_sg                 = ethtool_op_set_sg,
3681         .get_strings            = atl1_get_strings,
3682         .nway_reset             = atl1_nway_reset,
3683         .get_ethtool_stats      = atl1_get_ethtool_stats,
3684         .get_sset_count         = atl1_get_sset_count,
3685         .set_tso                = ethtool_op_set_tso,
3686 };