drivers/net/arm/ixp4xx_eth.c

   1 /*
   2  * Intel IXP4xx Ethernet driver for Linux
   3  *
   4  * Copyright (C) 2007 Krzysztof Halasa <khc@pm.waw.pl>
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of version 2 of the GNU General Public License
   8  * as published by the Free Software Foundation.
   9  *
  10  * Ethernet port config (0x00 is not present on IXP42X):
  11  *
  12  * logical port         0x00            0x10            0x20
  13  * NPE                  0 (NPE-A)       1 (NPE-B)       2 (NPE-C)
  14  * physical PortId      2               0               1
  15  * TX queue             23              24              25
  16  * RX-free queue        26              27              28
  17  * TX-done queue is always 31, per-port RX and TX-ready queues are configurable
  18  *
  19  *
  20  * Queue entries:
  21  * bits 0 -> 1  - NPE ID (RX and TX-done)
  22  * bits 0 -> 2  - priority (TX, per 802.1D)
  23  * bits 3 -> 4  - port ID (user-set?)
  24  * bits 5 -> 31 - physical descriptor address
  25  */
  26
  27 #include <linux/delay.h>
  28 #include <linux/dma-mapping.h>
  29 #include <linux/dmapool.h>
  30 #include <linux/etherdevice.h>
  31 #include <linux/io.h>
  32 #include <linux/kernel.h>
  33 #include <linux/phy.h>
  34 #include <linux/platform_device.h>
  35 #include <linux/slab.h>
  36 #include <mach/npe.h>
  37 #include <mach/qmgr.h>
  38
  39 #define DEBUG_DESC              0
  40 #define DEBUG_RX                0
  41 #define DEBUG_TX                0
  42 #define DEBUG_PKT_BYTES         0
  43 #define DEBUG_MDIO              0
  44 #define DEBUG_CLOSE             0
  45
  46 #define DRV_NAME                "ixp4xx_eth"
  47
  48 #define MAX_NPES                3
  49
  50 #define RX_DESCS                64 /* also length of all RX queues */
  51 #define TX_DESCS                16 /* also length of all TX queues */
  52 #define TXDONE_QUEUE_LEN        64 /* dwords */
  53
  54 #define POOL_ALLOC_SIZE         (sizeof(struct desc) * (RX_DESCS + TX_DESCS))
  55 #define REGS_SIZE               0x1000
  56 #define MAX_MRU                 1536 /* 0x600 */
  57 #define RX_BUFF_SIZE            ALIGN((NET_IP_ALIGN) + MAX_MRU, 4)
  58
  59 #define NAPI_WEIGHT             16
  60 #define MDIO_INTERVAL           (3 * HZ)
  61 #define MAX_MDIO_RETRIES        100 /* microseconds, typically 30 cycles */
  62 #define MAX_CLOSE_WAIT          1000 /* microseconds, typically 2-3 cycles */
  63
  64 #define NPE_ID(port_id)         ((port_id) >> 4)
  65 #define PHYSICAL_ID(port_id)    ((NPE_ID(port_id) + 2) % 3)
  66 #define TX_QUEUE(port_id)       (NPE_ID(port_id) + 23)
  67 #define RXFREE_QUEUE(port_id)   (NPE_ID(port_id) + 26)
  68 #define TXDONE_QUEUE            31
  69
  70 /* TX Control Registers */
  71 #define TX_CNTRL0_TX_EN         0x01
  72 #define TX_CNTRL0_HALFDUPLEX    0x02
  73 #define TX_CNTRL0_RETRY         0x04
  74 #define TX_CNTRL0_PAD_EN        0x08
  75 #define TX_CNTRL0_APPEND_FCS    0x10
  76 #define TX_CNTRL0_2DEFER        0x20
  77 #define TX_CNTRL0_RMII          0x40 /* reduced MII */
  78 #define TX_CNTRL1_RETRIES       0x0F /* 4 bits */
  79
  80 /* RX Control Registers */
  81 #define RX_CNTRL0_RX_EN         0x01
  82 #define RX_CNTRL0_PADSTRIP_EN   0x02
  83 #define RX_CNTRL0_SEND_FCS      0x04
  84 #define RX_CNTRL0_PAUSE_EN      0x08
  85 #define RX_CNTRL0_LOOP_EN       0x10
  86 #define RX_CNTRL0_ADDR_FLTR_EN  0x20
  87 #define RX_CNTRL0_RX_RUNT_EN    0x40
  88 #define RX_CNTRL0_BCAST_DIS     0x80
  89 #define RX_CNTRL1_DEFER_EN      0x01
  90
  91 /* Core Control Register */
  92 #define CORE_RESET              0x01
  93 #define CORE_RX_FIFO_FLUSH      0x02
  94 #define CORE_TX_FIFO_FLUSH      0x04
  95 #define CORE_SEND_JAM           0x08
  96 #define CORE_MDC_EN             0x10 /* MDIO using NPE-B ETH-0 only */
  97
  98 #define DEFAULT_TX_CNTRL0       (TX_CNTRL0_TX_EN | TX_CNTRL0_RETRY |    \
  99                                  TX_CNTRL0_PAD_EN | TX_CNTRL0_APPEND_FCS | \
 100                                  TX_CNTRL0_2DEFER)
 101 #define DEFAULT_RX_CNTRL0       RX_CNTRL0_RX_EN
 102 #define DEFAULT_CORE_CNTRL      CORE_MDC_EN
 103
 104
 105 /* NPE message codes */
 106 #define NPE_GETSTATUS                   0x00
 107 #define NPE_EDB_SETPORTADDRESS          0x01
 108 #define NPE_EDB_GETMACADDRESSDATABASE   0x02
 109 #define NPE_EDB_SETMACADDRESSSDATABASE  0x03
 110 #define NPE_GETSTATS                    0x04
 111 #define NPE_RESETSTATS                  0x05
 112 #define NPE_SETMAXFRAMELENGTHS          0x06
 113 #define NPE_VLAN_SETRXTAGMODE           0x07
 114 #define NPE_VLAN_SETDEFAULTRXVID        0x08
 115 #define NPE_VLAN_SETPORTVLANTABLEENTRY  0x09
 116 #define NPE_VLAN_SETPORTVLANTABLERANGE  0x0A
 117 #define NPE_VLAN_SETRXQOSENTRY          0x0B
 118 #define NPE_VLAN_SETPORTIDEXTRACTIONMODE 0x0C
 119 #define NPE_STP_SETBLOCKINGSTATE        0x0D
 120 #define NPE_FW_SETFIREWALLMODE          0x0E
 121 #define NPE_PC_SETFRAMECONTROLDURATIONID 0x0F
 122 #define NPE_PC_SETAPMACTABLE            0x11
 123 #define NPE_SETLOOPBACK_MODE            0x12
 124 #define NPE_PC_SETBSSIDTABLE            0x13
 125 #define NPE_ADDRESS_FILTER_CONFIG       0x14
 126 #define NPE_APPENDFCSCONFIG             0x15
 127 #define NPE_NOTIFY_MAC_RECOVERY_DONE    0x16
 128 #define NPE_MAC_RECOVERY_START          0x17
 129
 130
 131 #ifdef __ARMEB__
 132 typedef struct sk_buff buffer_t;
 133 #define free_buffer dev_kfree_skb
 134 #define free_buffer_irq dev_kfree_skb_irq
 135 #else
 136 typedef void buffer_t;
 137 #define free_buffer kfree
 138 #define free_buffer_irq kfree
 139 #endif
 140
 141 struct eth_regs {
 142         u32 tx_control[2], __res1[2];           /* 000 */
 143         u32 rx_control[2], __res2[2];           /* 010 */
 144         u32 random_seed, __res3[3];             /* 020 */
 145         u32 partial_empty_threshold, __res4;    /* 030 */
 146         u32 partial_full_threshold, __res5;     /* 038 */
 147         u32 tx_start_bytes, __res6[3];          /* 040 */
 148         u32 tx_deferral, rx_deferral, __res7[2];/* 050 */
 149         u32 tx_2part_deferral[2], __res8[2];    /* 060 */
 150         u32 slot_time, __res9[3];               /* 070 */
 151         u32 mdio_command[4];                    /* 080 */
 152         u32 mdio_status[4];                     /* 090 */
 153         u32 mcast_mask[6], __res10[2];          /* 0A0 */
 154         u32 mcast_addr[6], __res11[2];          /* 0C0 */
 155         u32 int_clock_threshold, __res12[3];    /* 0E0 */
 156         u32 hw_addr[6], __res13[61];            /* 0F0 */
 157         u32 core_control;                       /* 1FC */
 158 };
 159
 160 struct port {
 161         struct resource *mem_res;
 162         struct eth_regs __iomem *regs;
 163         struct npe *npe;
 164         struct net_device *netdev;
 165         struct napi_struct napi;
 166         struct phy_device *phydev;
 167         struct eth_plat_info *plat;
 168         buffer_t *rx_buff_tab[RX_DESCS], *tx_buff_tab[TX_DESCS];
 169         struct desc *desc_tab;  /* coherent */
 170         u32 desc_tab_phys;
 171         int id;                 /* logical port ID */
 172         int speed, duplex;
 173         u8 firmware[4];
 174 };
 175
 176 /* NPE message structure */
 177 struct msg {
 178 #ifdef __ARMEB__
 179         u8 cmd, eth_id, byte2, byte3;
 180         u8 byte4, byte5, byte6, byte7;
 181 #else
 182         u8 byte3, byte2, eth_id, cmd;
 183         u8 byte7, byte6, byte5, byte4;
 184 #endif
 185 };
 186
 187 /* Ethernet packet descriptor */
 188 struct desc {
 189         u32 next;               /* pointer to next buffer, unused */
 190
 191 #ifdef __ARMEB__
 192         u16 buf_len;            /* buffer length */
 193         u16 pkt_len;            /* packet length */
 194         u32 data;               /* pointer to data buffer in RAM */
 195         u8 dest_id;
 196         u8 src_id;
 197         u16 flags;
 198         u8 qos;
 199         u8 padlen;
 200         u16 vlan_tci;
 201 #else
 202         u16 pkt_len;            /* packet length */
 203         u16 buf_len;            /* buffer length */
 204         u32 data;               /* pointer to data buffer in RAM */
 205         u16 flags;
 206         u8 src_id;
 207         u8 dest_id;
 208         u16 vlan_tci;
 209         u8 padlen;
 210         u8 qos;
 211 #endif
 212
 213 #ifdef __ARMEB__
 214         u8 dst_mac_0, dst_mac_1, dst_mac_2, dst_mac_3;
 215         u8 dst_mac_4, dst_mac_5, src_mac_0, src_mac_1;
 216         u8 src_mac_2, src_mac_3, src_mac_4, src_mac_5;
 217 #else
 218         u8 dst_mac_3, dst_mac_2, dst_mac_1, dst_mac_0;
 219         u8 src_mac_1, src_mac_0, dst_mac_5, dst_mac_4;
 220         u8 src_mac_5, src_mac_4, src_mac_3, src_mac_2;
 221 #endif
 222 };
 223
 224
 225 #define rx_desc_phys(port, n)   ((port)->desc_tab_phys +                \
 226                                  (n) * sizeof(struct desc))
 227 #define rx_desc_ptr(port, n)    (&(port)->desc_tab[n])
 228
 229 #define tx_desc_phys(port, n)   ((port)->desc_tab_phys +                \
 230                                  ((n) + RX_DESCS) * sizeof(struct desc))
 231 #define tx_desc_ptr(port, n)    (&(port)->desc_tab[(n) + RX_DESCS])
 232
 233 #ifndef __ARMEB__
 234 static inline void memcpy_swab32(u32 *dest, u32 *src, int cnt)
 235 {
 236         int i;
 237         for (i = 0; i < cnt; i++)
 238                 dest[i] = swab32(src[i]);
 239 }
 240 #endif
 241
 242 static spinlock_t mdio_lock;
 243 static struct eth_regs __iomem *mdio_regs; /* mdio command and status only */
 244 static struct mii_bus *mdio_bus;
 245 static int ports_open;
 246 static struct port *npe_port_tab[MAX_NPES];
 247 static struct dma_pool *dma_pool;
 248
 249
 250 static int ixp4xx_mdio_cmd(struct mii_bus *bus, int phy_id, int location,
 251                            int write, u16 cmd)
 252 {
 253         int cycles = 0;
 254
 255         if (__raw_readl(&mdio_regs->mdio_command[3]) & 0x80) {
 256                 printk(KERN_ERR "%s: MII not ready to transmit\n", bus->name);
 257                 return -1;
 258         }
 259
 260         if (write) {
 261                 __raw_writel(cmd & 0xFF, &mdio_regs->mdio_command[0]);
 262                 __raw_writel(cmd >> 8, &mdio_regs->mdio_command[1]);
 263         }
 264         __raw_writel(((phy_id << 5) | location) & 0xFF,
 265                      &mdio_regs->mdio_command[2]);
 266         __raw_writel((phy_id >> 3) | (write << 2) | 0x80 /* GO */,
 267                      &mdio_regs->mdio_command[3]);
 268
 269         while ((cycles < MAX_MDIO_RETRIES) &&
 270                (__raw_readl(&mdio_regs->mdio_command[3]) & 0x80)) {
 271                 udelay(1);
 272                 cycles++;
 273         }
 274
 275         if (cycles == MAX_MDIO_RETRIES) {
 276                 printk(KERN_ERR "%s #%i: MII write failed\n", bus->name,
 277                        phy_id);
 278                 return -1;
 279         }
 280
 281 #if DEBUG_MDIO
 282         printk(KERN_DEBUG "%s #%i: mdio_%s() took %i cycles\n", bus->name,
 283                phy_id, write ? "write" : "read", cycles);
 284 #endif
 285
 286         if (write)
 287                 return 0;
 288
 289         if (__raw_readl(&mdio_regs->mdio_status[3]) & 0x80) {
 290 #if DEBUG_MDIO
 291                 printk(KERN_DEBUG "%s #%i: MII read failed\n", bus->name,
 292                        phy_id);
 293 #endif
 294                 return 0xFFFF; /* don't return error */
 295         }
 296
 297         return (__raw_readl(&mdio_regs->mdio_status[0]) & 0xFF) |
 298                 ((__raw_readl(&mdio_regs->mdio_status[1]) & 0xFF) << 8);
 299 }
 300
 301 static int ixp4xx_mdio_read(struct mii_bus *bus, int phy_id, int location)
 302 {
 303         unsigned long flags;
 304         int ret;
 305
 306         spin_lock_irqsave(&mdio_lock, flags);
 307         ret = ixp4xx_mdio_cmd(bus, phy_id, location, 0, 0);
 308         spin_unlock_irqrestore(&mdio_lock, flags);
 309 #if DEBUG_MDIO
 310         printk(KERN_DEBUG "%s #%i: MII read [%i] -> 0x%X\n", bus->name,
 311                phy_id, location, ret);
 312 #endif
 313         return ret;
 314 }
 315
 316 static int ixp4xx_mdio_write(struct mii_bus *bus, int phy_id, int location,
 317                              u16 val)
 318 {
 319         unsigned long flags;
 320         int ret;
 321
 322         spin_lock_irqsave(&mdio_lock, flags);
 323         ret = ixp4xx_mdio_cmd(bus, phy_id, location, 1, val);
 324         spin_unlock_irqrestore(&mdio_lock, flags);
 325 #if DEBUG_MDIO
 326         printk(KERN_DEBUG "%s #%i: MII write [%i] <- 0x%X, err = %i\n",
 327                bus->name, phy_id, location, val, ret);
 328 #endif
 329         return ret;
 330 }
 331
 332 static int ixp4xx_mdio_register(void)
 333 {
 334         int err;
 335
 336         if (!(mdio_bus = mdiobus_alloc()))
 337                 return -ENOMEM;
 338
 339         if (cpu_is_ixp43x()) {
 340                 /* IXP43x lacks NPE-B and uses NPE-C for MII PHY access */
 341                 if (!(ixp4xx_read_feature_bits() & IXP4XX_FEATURE_NPEC_ETH))
 342                         return -ENODEV;
 343                 mdio_regs = (struct eth_regs __iomem *)IXP4XX_EthC_BASE_VIRT;
 344         } else {
 345                 /* All MII PHY accesses use NPE-B Ethernet registers */
 346                 if (!(ixp4xx_read_feature_bits() & IXP4XX_FEATURE_NPEB_ETH0))
 347                         return -ENODEV;
 348                 mdio_regs = (struct eth_regs __iomem *)IXP4XX_EthB_BASE_VIRT;
 349         }
 350
 351         __raw_writel(DEFAULT_CORE_CNTRL, &mdio_regs->core_control);
 352         spin_lock_init(&mdio_lock);
 353         mdio_bus->name = "IXP4xx MII Bus";
 354         mdio_bus->read = &ixp4xx_mdio_read;
 355         mdio_bus->write = &ixp4xx_mdio_write;
 356         strcpy(mdio_bus->id, "0");
 357
 358         if ((err = mdiobus_register(mdio_bus)))
 359                 mdiobus_free(mdio_bus);
 360         return err;
 361 }
 362
 363 static void ixp4xx_mdio_remove(void)
 364 {
 365         mdiobus_unregister(mdio_bus);
 366         mdiobus_free(mdio_bus);
 367 }
 368
 369
 370 static void ixp4xx_adjust_link(struct net_device *dev)
 371 {
 372         struct port *port = netdev_priv(dev);
 373         struct phy_device *phydev = port->phydev;
 374
 375         if (!phydev->link) {
 376                 if (port->speed) {
 377                         port->speed = 0;
 378                         printk(KERN_INFO "%s: link down\n", dev->name);
 379                 }
 380                 return;
 381         }
 382
 383         if (port->speed == phydev->speed && port->duplex == phydev->duplex)
 384                 return;
 385
 386         port->speed = phydev->speed;
 387         port->duplex = phydev->duplex;
 388
 389         if (port->duplex)
 390                 __raw_writel(DEFAULT_TX_CNTRL0 & ~TX_CNTRL0_HALFDUPLEX,
 391                              &port->regs->tx_control[0]);
 392         else
 393                 __raw_writel(DEFAULT_TX_CNTRL0 | TX_CNTRL0_HALFDUPLEX,
 394                              &port->regs->tx_control[0]);
 395
 396         printk(KERN_INFO "%s: link up, speed %u Mb/s, %s duplex\n",
 397                dev->name, port->speed, port->duplex ? "full" : "half");
 398 }
 399
 400
 401 static inline void debug_pkt(struct net_device *dev, const char *func,
 402                              u8 *data, int len)
 403 {
 404 #if DEBUG_PKT_BYTES
 405         int i;
 406
 407         printk(KERN_DEBUG "%s: %s(%i) ", dev->name, func, len);
 408         for (i = 0; i < len; i++) {
 409                 if (i >= DEBUG_PKT_BYTES)
 410                         break;
 411                 printk("%s%02X",
 412                        ((i == 6) || (i == 12) || (i >= 14)) ? " " : "",
 413                        data[i]);
 414         }
 415         printk("\n");
 416 #endif
 417 }
 418
 419
 420 static inline void debug_desc(u32 phys, struct desc *desc)
 421 {
 422 #if DEBUG_DESC
 423         printk(KERN_DEBUG "%X: %X %3X %3X %08X %2X < %2X %4X %X"
 424                " %X %X %02X%02X%02X%02X%02X%02X < %02X%02X%02X%02X%02X%02X\n",
 425                phys, desc->next, desc->buf_len, desc->pkt_len,
 426                desc->data, desc->dest_id, desc->src_id, desc->flags,
 427                desc->qos, desc->padlen, desc->vlan_tci,
 428                desc->dst_mac_0, desc->dst_mac_1, desc->dst_mac_2,
 429                desc->dst_mac_3, desc->dst_mac_4, desc->dst_mac_5,
 430                desc->src_mac_0, desc->src_mac_1, desc->src_mac_2,
 431                desc->src_mac_3, desc->src_mac_4, desc->src_mac_5);
 432 #endif
 433 }
 434
 435 static inline int queue_get_desc(unsigned int queue, struct port *port,
 436                                  int is_tx)
 437 {
 438         u32 phys, tab_phys, n_desc;
 439         struct desc *tab;
 440
 441         if (!(phys = qmgr_get_entry(queue)))
 442                 return -1;
 443
 444         phys &= ~0x1F; /* mask out non-address bits */
 445         tab_phys = is_tx ? tx_desc_phys(port, 0) : rx_desc_phys(port, 0);
 446         tab = is_tx ? tx_desc_ptr(port, 0) : rx_desc_ptr(port, 0);
 447         n_desc = (phys - tab_phys) / sizeof(struct desc);
 448         BUG_ON(n_desc >= (is_tx ? TX_DESCS : RX_DESCS));
 449         debug_desc(phys, &tab[n_desc]);
 450         BUG_ON(tab[n_desc].next);
 451         return n_desc;
 452 }
 453
 454 static inline void queue_put_desc(unsigned int queue, u32 phys,
 455                                   struct desc *desc)
 456 {
 457         debug_desc(phys, desc);
 458         BUG_ON(phys & 0x1F);
 459         qmgr_put_entry(queue, phys);
 460         /* Don't check for queue overflow here, we've allocated sufficient
 461            length and queues >= 32 don't support this check anyway. */
 462 }
 463
 464
 465 static inline void dma_unmap_tx(struct port *port, struct desc *desc)
 466 {
 467 #ifdef __ARMEB__
 468         dma_unmap_single(&port->netdev->dev, desc->data,
 469                          desc->buf_len, DMA_TO_DEVICE);
 470 #else
 471         dma_unmap_single(&port->netdev->dev, desc->data & ~3,
 472                          ALIGN((desc->data & 3) + desc->buf_len, 4),
 473                          DMA_TO_DEVICE);
 474 #endif
 475 }
 476
 477
 478 static void eth_rx_irq(void *pdev)
 479 {
 480         struct net_device *dev = pdev;
 481         struct port *port = netdev_priv(dev);
 482
 483 #if DEBUG_RX
 484         printk(KERN_DEBUG "%s: eth_rx_irq\n", dev->name);
 485 #endif
 486         qmgr_disable_irq(port->plat->rxq);
 487         napi_schedule(&port->napi);
 488 }
 489
 490 static int eth_poll(struct napi_struct *napi, int budget)
 491 {
 492         struct port *port = container_of(napi, struct port, napi);
 493         struct net_device *dev = port->netdev;
 494         unsigned int rxq = port->plat->rxq, rxfreeq = RXFREE_QUEUE(port->id);
 495         int received = 0;
 496
 497 #if DEBUG_RX
 498         printk(KERN_DEBUG "%s: eth_poll\n", dev->name);
 499 #endif
 500
 501         while (received < budget) {
 502                 struct sk_buff *skb;
 503                 struct desc *desc;
 504                 int n;
 505 #ifdef __ARMEB__
 506                 struct sk_buff *temp;
 507                 u32 phys;
 508 #endif
 509
 510                 if ((n = queue_get_desc(rxq, port, 0)) < 0) {
 511 #if DEBUG_RX
 512                         printk(KERN_DEBUG "%s: eth_poll napi_complete\n",
 513                                dev->name);
 514 #endif
 515                         napi_complete(napi);
 516                         qmgr_enable_irq(rxq);
 517                         if (!qmgr_stat_below_low_watermark(rxq) &&
 518                             napi_reschedule(napi)) { /* not empty again */
 519 #if DEBUG_RX
 520                                 printk(KERN_DEBUG "%s: eth_poll"
 521                                        " napi_reschedule successed\n",
 522                                        dev->name);
 523 #endif
 524                                 qmgr_disable_irq(rxq);
 525                                 continue;
 526                         }
 527 #if DEBUG_RX
 528                         printk(KERN_DEBUG "%s: eth_poll all done\n",
 529                                dev->name);
 530 #endif
 531                         return received; /* all work done */
 532                 }
 533
 534                 desc = rx_desc_ptr(port, n);
 535
 536 #ifdef __ARMEB__
 537                 if ((skb = netdev_alloc_skb(dev, RX_BUFF_SIZE))) {
 538                         phys = dma_map_single(&dev->dev, skb->data,
 539                                               RX_BUFF_SIZE, DMA_FROM_DEVICE);
 540                         if (dma_mapping_error(&dev->dev, phys)) {
 541                                 dev_kfree_skb(skb);
 542                                 skb = NULL;
 543                         }
 544                 }
 545 #else
 546                 skb = netdev_alloc_skb(dev,
 547                                        ALIGN(NET_IP_ALIGN + desc->pkt_len, 4));
 548 #endif
 549
 550                 if (!skb) {
 551                         dev->stats.rx_dropped++;
 552                         /* put the desc back on RX-ready queue */
 553                         desc->buf_len = MAX_MRU;
 554                         desc->pkt_len = 0;
 555                         queue_put_desc(rxfreeq, rx_desc_phys(port, n), desc);
 556                         continue;
 557                 }
 558
 559                 /* process received frame */
 560 #ifdef __ARMEB__
 561                 temp = skb;
 562                 skb = port->rx_buff_tab[n];
 563                 dma_unmap_single(&dev->dev, desc->data - NET_IP_ALIGN,
 564                                  RX_BUFF_SIZE, DMA_FROM_DEVICE);
 565 #else
 566                 dma_sync_single_for_cpu(&dev->dev, desc->data - NET_IP_ALIGN,
 567                                         RX_BUFF_SIZE, DMA_FROM_DEVICE);
 568                 memcpy_swab32((u32 *)skb->data, (u32 *)port->rx_buff_tab[n],
 569                               ALIGN(NET_IP_ALIGN + desc->pkt_len, 4) / 4);
 570 #endif
 571                 skb_reserve(skb, NET_IP_ALIGN);
 572                 skb_put(skb, desc->pkt_len);
 573
 574                 debug_pkt(dev, "eth_poll", skb->data, skb->len);
 575
 576                 skb->protocol = eth_type_trans(skb, dev);
 577                 dev->stats.rx_packets++;
 578                 dev->stats.rx_bytes += skb->len;
 579                 netif_receive_skb(skb);
 580
 581                 /* put the new buffer on RX-free queue */
 582 #ifdef __ARMEB__
 583                 port->rx_buff_tab[n] = temp;
 584                 desc->data = phys + NET_IP_ALIGN;
 585 #endif
 586                 desc->buf_len = MAX_MRU;
 587                 desc->pkt_len = 0;
 588                 queue_put_desc(rxfreeq, rx_desc_phys(port, n), desc);
 589                 received++;
 590         }
 591
 592 #if DEBUG_RX
 593         printk(KERN_DEBUG "eth_poll(): end, not all work done\n");
 594 #endif
 595         return received;                /* not all work done */
 596 }
 597
 598
 599 static void eth_txdone_irq(void *unused)
 600 {
 601         u32 phys;
 602
 603 #if DEBUG_TX
 604         printk(KERN_DEBUG DRV_NAME ": eth_txdone_irq\n");
 605 #endif
 606         while ((phys = qmgr_get_entry(TXDONE_QUEUE)) != 0) {
 607                 u32 npe_id, n_desc;
 608                 struct port *port;
 609                 struct desc *desc;
 610                 int start;
 611
 612                 npe_id = phys & 3;
 613                 BUG_ON(npe_id >= MAX_NPES);
 614                 port = npe_port_tab[npe_id];
 615                 BUG_ON(!port);
 616                 phys &= ~0x1F; /* mask out non-address bits */
 617                 n_desc = (phys - tx_desc_phys(port, 0)) / sizeof(struct desc);
 618                 BUG_ON(n_desc >= TX_DESCS);
 619                 desc = tx_desc_ptr(port, n_desc);
 620                 debug_desc(phys, desc);
 621
 622                 if (port->tx_buff_tab[n_desc]) { /* not the draining packet */
 623                         port->netdev->stats.tx_packets++;
 624                         port->netdev->stats.tx_bytes += desc->pkt_len;
 625
 626                         dma_unmap_tx(port, desc);
 627 #if DEBUG_TX
 628                         printk(KERN_DEBUG "%s: eth_txdone_irq free %p\n",
 629                                port->netdev->name, port->tx_buff_tab[n_desc]);
 630 #endif
 631                         free_buffer_irq(port->tx_buff_tab[n_desc]);
 632                         port->tx_buff_tab[n_desc] = NULL;
 633                 }
 634
 635                 start = qmgr_stat_below_low_watermark(port->plat->txreadyq);
 636                 queue_put_desc(port->plat->txreadyq, phys, desc);
 637                 if (start) { /* TX-ready queue was empty */
 638 #if DEBUG_TX
 639                         printk(KERN_DEBUG "%s: eth_txdone_irq xmit ready\n",
 640                                port->netdev->name);
 641 #endif
 642                         netif_wake_queue(port->netdev);
 643                 }
 644         }
 645 }
 646
 647 static int eth_xmit(struct sk_buff *skb, struct net_device *dev)
 648 {
 649         struct port *port = netdev_priv(dev);
 650         unsigned int txreadyq = port->plat->txreadyq;
 651         int len, offset, bytes, n;
 652         void *mem;
 653         u32 phys;
 654         struct desc *desc;
 655
 656 #if DEBUG_TX
 657         printk(KERN_DEBUG "%s: eth_xmit\n", dev->name);
 658 #endif
 659
 660         if (unlikely(skb->len > MAX_MRU)) {
 661                 dev_kfree_skb(skb);
 662                 dev->stats.tx_errors++;
 663                 return NETDEV_TX_OK;
 664         }
 665
 666         debug_pkt(dev, "eth_xmit", skb->data, skb->len);
 667
 668         len = skb->len;
 669 #ifdef __ARMEB__
 670         offset = 0; /* no need to keep alignment */
 671         bytes = len;
 672         mem = skb->data;
 673 #else
 674         offset = (int)skb->data & 3; /* keep 32-bit alignment */
 675         bytes = ALIGN(offset + len, 4);
 676         if (!(mem = kmalloc(bytes, GFP_ATOMIC))) {
 677                 dev_kfree_skb(skb);
 678                 dev->stats.tx_dropped++;
 679                 return NETDEV_TX_OK;
 680         }
 681         memcpy_swab32(mem, (u32 *)((int)skb->data & ~3), bytes / 4);
 682         dev_kfree_skb(skb);
 683 #endif
 684
 685         phys = dma_map_single(&dev->dev, mem, bytes, DMA_TO_DEVICE);
 686         if (dma_mapping_error(&dev->dev, phys)) {
 687 #ifdef __ARMEB__
 688                 dev_kfree_skb(skb);
 689 #else
 690                 kfree(mem);
 691 #endif
 692                 dev->stats.tx_dropped++;
 693                 return NETDEV_TX_OK;
 694         }
 695
 696         n = queue_get_desc(txreadyq, port, 1);
 697         BUG_ON(n < 0);
 698         desc = tx_desc_ptr(port, n);
 699
 700 #ifdef __ARMEB__
 701         port->tx_buff_tab[n] = skb;
 702 #else
 703         port->tx_buff_tab[n] = mem;
 704 #endif
 705         desc->data = phys + offset;
 706         desc->buf_len = desc->pkt_len = len;
 707
 708         /* NPE firmware pads short frames with zeros internally */
 709         wmb();
 710         queue_put_desc(TX_QUEUE(port->id), tx_desc_phys(port, n), desc);
 711
 712         if (qmgr_stat_below_low_watermark(txreadyq)) { /* empty */
 713 #if DEBUG_TX
 714                 printk(KERN_DEBUG "%s: eth_xmit queue full\n", dev->name);
 715 #endif
 716                 netif_stop_queue(dev);
 717                 /* we could miss TX ready interrupt */
 718                 /* really empty in fact */
 719                 if (!qmgr_stat_below_low_watermark(txreadyq)) {
 720 #if DEBUG_TX
 721                         printk(KERN_DEBUG "%s: eth_xmit ready again\n",
 722                                dev->name);
 723 #endif
 724                         netif_wake_queue(dev);
 725                 }
 726         }
 727
 728 #if DEBUG_TX
 729         printk(KERN_DEBUG "%s: eth_xmit end\n", dev->name);
 730 #endif
 731         return NETDEV_TX_OK;
 732 }
 733
 734
 735 static void eth_set_mcast_list(struct net_device *dev)
 736 {
 737         struct port *port = netdev_priv(dev);
 738         struct netdev_hw_addr *ha;
 739         u8 diffs[ETH_ALEN], *addr;
 740         int i;
 741         static const u8 allmulti[] = { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00 };
 742
 743         if (dev->flags & IFF_ALLMULTI) {
 744                 for (i = 0; i < ETH_ALEN; i++) {
 745                         __raw_writel(allmulti[i], &port->regs->mcast_addr[i]);
 746                         __raw_writel(allmulti[i], &port->regs->mcast_mask[i]);
 747                 }
 748                 __raw_writel(DEFAULT_RX_CNTRL0 | RX_CNTRL0_ADDR_FLTR_EN,
 749                         &port->regs->rx_control[0]);
 750                 return;
 751         }
 752
 753         if ((dev->flags & IFF_PROMISC) || netdev_mc_empty(dev)) {
 754                 __raw_writel(DEFAULT_RX_CNTRL0 & ~RX_CNTRL0_ADDR_FLTR_EN,
 755                              &port->regs->rx_control[0]);
 756                 return;
 757         }
 758
 759         memset(diffs, 0, ETH_ALEN);
 760
 761         addr = NULL;
 762         netdev_for_each_mc_addr(ha, dev) {
 763                 if (!addr)
 764                         addr = ha->addr; /* first MAC address */
 765                 for (i = 0; i < ETH_ALEN; i++)
 766                         diffs[i] |= addr[i] ^ ha->addr[i];
 767         }
 768
 769         for (i = 0; i < ETH_ALEN; i++) {
 770                 __raw_writel(addr[i], &port->regs->mcast_addr[i]);
 771                 __raw_writel(~diffs[i], &port->regs->mcast_mask[i]);
 772         }
 773
 774         __raw_writel(DEFAULT_RX_CNTRL0 | RX_CNTRL0_ADDR_FLTR_EN,
 775                      &port->regs->rx_control[0]);
 776 }
 777
 778
 779 static int eth_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
 780 {
 781         struct port *port = netdev_priv(dev);
 782
 783         if (!netif_running(dev))
 784                 return -EINVAL;
 785
 786         return phy_mii_ioctl(port->phydev, req, cmd);
 787 }
 788
 789 /* ethtool support */
 790
 791 static void ixp4xx_get_drvinfo(struct net_device *dev,
 792                                struct ethtool_drvinfo *info)
 793 {
 794         struct port *port = netdev_priv(dev);
 795         strcpy(info->driver, DRV_NAME);
 796         snprintf(info->fw_version, sizeof(info->fw_version), "%u:%u:%u:%u",
 797                  port->firmware[0], port->firmware[1],
 798                  port->firmware[2], port->firmware[3]);
 799         strcpy(info->bus_info, "internal");
 800 }
 801
 802 static int ixp4xx_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 803 {
 804         struct port *port = netdev_priv(dev);
 805         return phy_ethtool_gset(port->phydev, cmd);
 806 }
 807
 808 static int ixp4xx_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 809 {
 810         struct port *port = netdev_priv(dev);
 811         return phy_ethtool_sset(port->phydev, cmd);
 812 }
 813
 814 static int ixp4xx_nway_reset(struct net_device *dev)
 815 {
 816         struct port *port = netdev_priv(dev);
 817         return phy_start_aneg(port->phydev);
 818 }
 819
 820 static const struct ethtool_ops ixp4xx_ethtool_ops = {
 821         .get_drvinfo = ixp4xx_get_drvinfo,
 822         .get_settings = ixp4xx_get_settings,
 823         .set_settings = ixp4xx_set_settings,
 824         .nway_reset = ixp4xx_nway_reset,
 825         .get_link = ethtool_op_get_link,
 826 };
 827
 828
 829 static int request_queues(struct port *port)
 830 {
 831         int err;
 832
 833         err = qmgr_request_queue(RXFREE_QUEUE(port->id), RX_DESCS, 0, 0,
 834                                  "%s:RX-free", port->netdev->name);
 835         if (err)
 836                 return err;
 837
 838         err = qmgr_request_queue(port->plat->rxq, RX_DESCS, 0, 0,
 839                                  "%s:RX", port->netdev->name);
 840         if (err)
 841                 goto rel_rxfree;
 842
 843         err = qmgr_request_queue(TX_QUEUE(port->id), TX_DESCS, 0, 0,
 844                                  "%s:TX", port->netdev->name);
 845         if (err)
 846                 goto rel_rx;
 847
 848         err = qmgr_request_queue(port->plat->txreadyq, TX_DESCS, 0, 0,
 849                                  "%s:TX-ready", port->netdev->name);
 850         if (err)
 851                 goto rel_tx;
 852
 853         /* TX-done queue handles skbs sent out by the NPEs */
 854         if (!ports_open) {
 855                 err = qmgr_request_queue(TXDONE_QUEUE, TXDONE_QUEUE_LEN, 0, 0,
 856                                          "%s:TX-done", DRV_NAME);
 857                 if (err)
 858                         goto rel_txready;
 859         }
 860         return 0;
 861
 862 rel_txready:
 863         qmgr_release_queue(port->plat->txreadyq);
 864 rel_tx:
 865         qmgr_release_queue(TX_QUEUE(port->id));
 866 rel_rx:
 867         qmgr_release_queue(port->plat->rxq);
 868 rel_rxfree:
 869         qmgr_release_queue(RXFREE_QUEUE(port->id));
 870         printk(KERN_DEBUG "%s: unable to request hardware queues\n",
 871                port->netdev->name);
 872         return err;
 873 }
 874
 875 static void release_queues(struct port *port)
 876 {
 877         qmgr_release_queue(RXFREE_QUEUE(port->id));
 878         qmgr_release_queue(port->plat->rxq);
 879         qmgr_release_queue(TX_QUEUE(port->id));
 880         qmgr_release_queue(port->plat->txreadyq);
 881
 882         if (!ports_open)
 883                 qmgr_release_queue(TXDONE_QUEUE);
 884 }
 885
 886 static int init_queues(struct port *port)
 887 {
 888         int i;
 889
 890         if (!ports_open)
 891                 if (!(dma_pool = dma_pool_create(DRV_NAME, NULL,
 892                                                  POOL_ALLOC_SIZE, 32, 0)))
 893                         return -ENOMEM;
 894
 895         if (!(port->desc_tab = dma_pool_alloc(dma_pool, GFP_KERNEL,
 896                                               &port->desc_tab_phys)))
 897                 return -ENOMEM;
 898         memset(port->desc_tab, 0, POOL_ALLOC_SIZE);
 899         memset(port->rx_buff_tab, 0, sizeof(port->rx_buff_tab)); /* tables */
 900         memset(port->tx_buff_tab, 0, sizeof(port->tx_buff_tab));
 901
 902         /* Setup RX buffers */
 903         for (i = 0; i < RX_DESCS; i++) {
 904                 struct desc *desc = rx_desc_ptr(port, i);
 905                 buffer_t *buff; /* skb or kmalloc()ated memory */
 906                 void *data;
 907 #ifdef __ARMEB__
 908                 if (!(buff = netdev_alloc_skb(port->netdev, RX_BUFF_SIZE)))
 909                         return -ENOMEM;
 910                 data = buff->data;
 911 #else
 912                 if (!(buff = kmalloc(RX_BUFF_SIZE, GFP_KERNEL)))
 913                         return -ENOMEM;
 914                 data = buff;
 915 #endif
 916                 desc->buf_len = MAX_MRU;
 917                 desc->data = dma_map_single(&port->netdev->dev, data,
 918                                             RX_BUFF_SIZE, DMA_FROM_DEVICE);
 919                 if (dma_mapping_error(&port->netdev->dev, desc->data)) {
 920                         free_buffer(buff);
 921                         return -EIO;
 922                 }
 923                 desc->data += NET_IP_ALIGN;
 924                 port->rx_buff_tab[i] = buff;
 925         }
 926
 927         return 0;
 928 }
 929
 930 static void destroy_queues(struct port *port)
 931 {
 932         int i;
 933
 934         if (port->desc_tab) {
 935                 for (i = 0; i < RX_DESCS; i++) {
 936                         struct desc *desc = rx_desc_ptr(port, i);
 937                         buffer_t *buff = port->rx_buff_tab[i];
 938                         if (buff) {
 939                                 dma_unmap_single(&port->netdev->dev,
 940                                                  desc->data - NET_IP_ALIGN,
 941                                                  RX_BUFF_SIZE, DMA_FROM_DEVICE);
 942                                 free_buffer(buff);
 943                         }
 944                 }
 945                 for (i = 0; i < TX_DESCS; i++) {
 946                         struct desc *desc = tx_desc_ptr(port, i);
 947                         buffer_t *buff = port->tx_buff_tab[i];
 948                         if (buff) {
 949                                 dma_unmap_tx(port, desc);
 950                                 free_buffer(buff);
 951                         }
 952                 }
 953                 dma_pool_free(dma_pool, port->desc_tab, port->desc_tab_phys);
 954                 port->desc_tab = NULL;
 955         }
 956
 957         if (!ports_open && dma_pool) {
 958                 dma_pool_destroy(dma_pool);
 959                 dma_pool = NULL;
 960         }
 961 }
 962
 963 static int eth_open(struct net_device *dev)
 964 {
 965         struct port *port = netdev_priv(dev);
 966         struct npe *npe = port->npe;
 967         struct msg msg;
 968         int i, err;
 969
 970         if (!npe_running(npe)) {
 971                 err = npe_load_firmware(npe, npe_name(npe), &dev->dev);
 972                 if (err)
 973                         return err;
 974
 975                 if (npe_recv_message(npe, &msg, "ETH_GET_STATUS")) {
 976                         printk(KERN_ERR "%s: %s not responding\n", dev->name,
 977                                npe_name(npe));
 978                         return -EIO;
 979                 }
 980                 port->firmware[0] = msg.byte4;
 981                 port->firmware[1] = msg.byte5;
 982                 port->firmware[2] = msg.byte6;
 983                 port->firmware[3] = msg.byte7;
 984         }
 985
 986         memset(&msg, 0, sizeof(msg));
 987         msg.cmd = NPE_VLAN_SETRXQOSENTRY;
 988         msg.eth_id = port->id;
 989         msg.byte5 = port->plat->rxq | 0x80;
 990         msg.byte7 = port->plat->rxq << 4;
 991         for (i = 0; i < 8; i++) {
 992                 msg.byte3 = i;
 993                 if (npe_send_recv_message(port->npe, &msg, "ETH_SET_RXQ"))
 994                         return -EIO;
 995         }
 996
 997         msg.cmd = NPE_EDB_SETPORTADDRESS;
 998         msg.eth_id = PHYSICAL_ID(port->id);
 999         msg.byte2 = dev->dev_addr[0];
1000         msg.byte3 = dev->dev_addr[1];
1001         msg.byte4 = dev->dev_addr[2];
1002         msg.byte5 = dev->dev_addr[3];
1003         msg.byte6 = dev->dev_addr[4];
1004         msg.byte7 = dev->dev_addr[5];
1005         if (npe_send_recv_message(port->npe, &msg, "ETH_SET_MAC"))
1006                 return -EIO;
1007
1008         memset(&msg, 0, sizeof(msg));
1009         msg.cmd = NPE_FW_SETFIREWALLMODE;
1010         msg.eth_id = port->id;
1011         if (npe_send_recv_message(port->npe, &msg, "ETH_SET_FIREWALL_MODE"))
1012                 return -EIO;
1013
1014         if ((err = request_queues(port)) != 0)
1015                 return err;
1016
1017         if ((err = init_queues(port)) != 0) {
1018                 destroy_queues(port);
1019                 release_queues(port);
1020                 return err;
1021         }
1022
1023         port->speed = 0;        /* force "link up" message */
1024         phy_start(port->phydev);
1025
1026         for (i = 0; i < ETH_ALEN; i++)
1027                 __raw_writel(dev->dev_addr[i], &port->regs->hw_addr[i]);
1028         __raw_writel(0x08, &port->regs->random_seed);
1029         __raw_writel(0x12, &port->regs->partial_empty_threshold);
1030         __raw_writel(0x30, &port->regs->partial_full_threshold);
1031         __raw_writel(0x08, &port->regs->tx_start_bytes);
1032         __raw_writel(0x15, &port->regs->tx_deferral);
1033         __raw_writel(0x08, &port->regs->tx_2part_deferral[0]);
1034         __raw_writel(0x07, &port->regs->tx_2part_deferral[1]);
1035         __raw_writel(0x80, &port->regs->slot_time);
1036         __raw_writel(0x01, &port->regs->int_clock_threshold);
1037
1038         /* Populate queues with buffers, no failure after this point */
1039         for (i = 0; i < TX_DESCS; i++)
1040                 queue_put_desc(port->plat->txreadyq,
1041                                tx_desc_phys(port, i), tx_desc_ptr(port, i));
1042
1043         for (i = 0; i < RX_DESCS; i++)
1044                 queue_put_desc(RXFREE_QUEUE(port->id),
1045                                rx_desc_phys(port, i), rx_desc_ptr(port, i));
1046
1047         __raw_writel(TX_CNTRL1_RETRIES, &port->regs->tx_control[1]);
1048         __raw_writel(DEFAULT_TX_CNTRL0, &port->regs->tx_control[0]);
1049         __raw_writel(0, &port->regs->rx_control[1]);
1050         __raw_writel(DEFAULT_RX_CNTRL0, &port->regs->rx_control[0]);
1051
1052         napi_enable(&port->napi);
1053         eth_set_mcast_list(dev);
1054         netif_start_queue(dev);
1055
1056         qmgr_set_irq(port->plat->rxq, QUEUE_IRQ_SRC_NOT_EMPTY,
1057                      eth_rx_irq, dev);
1058         if (!ports_open) {
1059                 qmgr_set_irq(TXDONE_QUEUE, QUEUE_IRQ_SRC_NOT_EMPTY,
1060                              eth_txdone_irq, NULL);
1061                 qmgr_enable_irq(TXDONE_QUEUE);
1062         }
1063         ports_open++;
1064         /* we may already have RX data, enables IRQ */
1065         napi_schedule(&port->napi);
1066         return 0;
1067 }
1068
1069 static int eth_close(struct net_device *dev)
1070 {
1071         struct port *port = netdev_priv(dev);
1072         struct msg msg;
1073         int buffs = RX_DESCS; /* allocated RX buffers */
1074         int i;
1075
1076         ports_open--;
1077         qmgr_disable_irq(port->plat->rxq);
1078         napi_disable(&port->napi);
1079         netif_stop_queue(dev);
1080
1081         while (queue_get_desc(RXFREE_QUEUE(port->id), port, 0) >= 0)
1082                 buffs--;
1083
1084         memset(&msg, 0, sizeof(msg));
1085         msg.cmd = NPE_SETLOOPBACK_MODE;
1086         msg.eth_id = port->id;
1087         msg.byte3 = 1;
1088         if (npe_send_recv_message(port->npe, &msg, "ETH_ENABLE_LOOPBACK"))
1089                 printk(KERN_CRIT "%s: unable to enable loopback\n", dev->name);
1090
1091         i = 0;
1092         do {                    /* drain RX buffers */
1093                 while (queue_get_desc(port->plat->rxq, port, 0) >= 0)
1094                         buffs--;
1095                 if (!buffs)
1096                         break;
1097                 if (qmgr_stat_empty(TX_QUEUE(port->id))) {
1098                         /* we have to inject some packet */
1099                         struct desc *desc;
1100                         u32 phys;
1101                         int n = queue_get_desc(port->plat->txreadyq, port, 1);
1102                         BUG_ON(n < 0);
1103                         desc = tx_desc_ptr(port, n);
1104                         phys = tx_desc_phys(port, n);
1105                         desc->buf_len = desc->pkt_len = 1;
1106                         wmb();
1107                         queue_put_desc(TX_QUEUE(port->id), phys, desc);
1108                 }
1109                 udelay(1);
1110         } while (++i < MAX_CLOSE_WAIT);
1111
1112         if (buffs)
1113                 printk(KERN_CRIT "%s: unable to drain RX queue, %i buffer(s)"
1114                        " left in NPE\n", dev->name, buffs);
1115 #if DEBUG_CLOSE
1116         if (!buffs)
1117                 printk(KERN_DEBUG "Draining RX queue took %i cycles\n", i);
1118 #endif
1119
1120         buffs = TX_DESCS;
1121         while (queue_get_desc(TX_QUEUE(port->id), port, 1) >= 0)
1122                 buffs--; /* cancel TX */
1123
1124         i = 0;
1125         do {
1126                 while (queue_get_desc(port->plat->txreadyq, port, 1) >= 0)
1127                         buffs--;
1128                 if (!buffs)
1129                         break;
1130         } while (++i < MAX_CLOSE_WAIT);
1131
1132         if (buffs)
1133                 printk(KERN_CRIT "%s: unable to drain TX queue, %i buffer(s) "
1134                        "left in NPE\n", dev->name, buffs);
1135 #if DEBUG_CLOSE
1136         if (!buffs)
1137                 printk(KERN_DEBUG "Draining TX queues took %i cycles\n", i);
1138 #endif
1139
1140         msg.byte3 = 0;
1141         if (npe_send_recv_message(port->npe, &msg, "ETH_DISABLE_LOOPBACK"))
1142                 printk(KERN_CRIT "%s: unable to disable loopback\n",
1143                        dev->name);
1144
1145         phy_stop(port->phydev);
1146
1147         if (!ports_open)
1148                 qmgr_disable_irq(TXDONE_QUEUE);
1149         destroy_queues(port);
1150         release_queues(port);
1151         return 0;
1152 }
1153
1154 static const struct net_device_ops ixp4xx_netdev_ops = {
1155         .ndo_open = eth_open,
1156         .ndo_stop = eth_close,
1157         .ndo_start_xmit = eth_xmit,
1158         .ndo_set_multicast_list = eth_set_mcast_list,
1159         .ndo_do_ioctl = eth_ioctl,
1160         .ndo_change_mtu = eth_change_mtu,
1161         .ndo_set_mac_address = eth_mac_addr,
1162         .ndo_validate_addr = eth_validate_addr,
1163 };
1164
1165 static int __devinit eth_init_one(struct platform_device *pdev)
1166 {
1167         struct port *port;
1168         struct net_device *dev;
1169         struct eth_plat_info *plat = pdev->dev.platform_data;
1170         u32 regs_phys;
1171         char phy_id[MII_BUS_ID_SIZE + 3];
1172         int err;
1173
1174         if (!(dev = alloc_etherdev(sizeof(struct port))))
1175                 return -ENOMEM;
1176
1177         SET_NETDEV_DEV(dev, &pdev->dev);
1178         port = netdev_priv(dev);
1179         port->netdev = dev;
1180         port->id = pdev->id;
1181
1182         switch (port->id) {
1183         case IXP4XX_ETH_NPEA:
1184                 port->regs = (struct eth_regs __iomem *)IXP4XX_EthA_BASE_VIRT;
1185                 regs_phys  = IXP4XX_EthA_BASE_PHYS;
1186                 break;
1187         case IXP4XX_ETH_NPEB:
1188                 port->regs = (struct eth_regs __iomem *)IXP4XX_EthB_BASE_VIRT;
1189                 regs_phys  = IXP4XX_EthB_BASE_PHYS;
1190                 break;
1191         case IXP4XX_ETH_NPEC:
1192                 port->regs = (struct eth_regs __iomem *)IXP4XX_EthC_BASE_VIRT;
1193                 regs_phys  = IXP4XX_EthC_BASE_PHYS;
1194                 break;
1195         default:
1196                 err = -ENODEV;
1197                 goto err_free;
1198         }
1199
1200         dev->netdev_ops = &ixp4xx_netdev_ops;
1201         dev->ethtool_ops = &ixp4xx_ethtool_ops;
1202         dev->tx_queue_len = 100;
1203
1204         netif_napi_add(dev, &port->napi, eth_poll, NAPI_WEIGHT);
1205
1206         if (!(port->npe = npe_request(NPE_ID(port->id)))) {
1207                 err = -EIO;
1208                 goto err_free;
1209         }
1210
1211         port->mem_res = request_mem_region(regs_phys, REGS_SIZE, dev->name);
1212         if (!port->mem_res) {
1213                 err = -EBUSY;
1214                 goto err_npe_rel;
1215         }
1216
1217         port->plat = plat;
1218         npe_port_tab[NPE_ID(port->id)] = port;
1219         memcpy(dev->dev_addr, plat->hwaddr, ETH_ALEN);
1220
1221         platform_set_drvdata(pdev, dev);
1222
1223         __raw_writel(DEFAULT_CORE_CNTRL | CORE_RESET,
1224                      &port->regs->core_control);
1225         udelay(50);
1226         __raw_writel(DEFAULT_CORE_CNTRL, &port->regs->core_control);
1227         udelay(50);
1228
1229         snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, "0", plat->phy);
1230         port->phydev = phy_connect(dev, phy_id, &ixp4xx_adjust_link, 0,
1231                                    PHY_INTERFACE_MODE_MII);
1232         if ((err = IS_ERR(port->phydev)))
1233                 goto err_free_mem;
1234
1235         port->phydev->irq = PHY_POLL;
1236
1237         if ((err = register_netdev(dev)))
1238                 goto err_phy_dis;
1239
1240         printk(KERN_INFO "%s: MII PHY %i on %s\n", dev->name, plat->phy,
1241                npe_name(port->npe));
1242
1243         return 0;
1244
1245 err_phy_dis:
1246         phy_disconnect(port->phydev);
1247 err_free_mem:
1248         npe_port_tab[NPE_ID(port->id)] = NULL;
1249         platform_set_drvdata(pdev, NULL);
1250         release_resource(port->mem_res);
1251 err_npe_rel:
1252         npe_release(port->npe);
1253 err_free:
1254         free_netdev(dev);
1255         return err;
1256 }
1257
1258 static int __devexit eth_remove_one(struct platform_device *pdev)
1259 {
1260         struct net_device *dev = platform_get_drvdata(pdev);
1261         struct port *port = netdev_priv(dev);
1262
1263         unregister_netdev(dev);
1264         phy_disconnect(port->phydev);
1265         npe_port_tab[NPE_ID(port->id)] = NULL;
1266         platform_set_drvdata(pdev, NULL);
1267         npe_release(port->npe);
1268         release_resource(port->mem_res);
1269         free_netdev(dev);
1270         return 0;
1271 }
1272
1273 static struct platform_driver ixp4xx_eth_driver = {
1274         .driver.name    = DRV_NAME,
1275         .probe          = eth_init_one,
1276         .remove         = eth_remove_one,
1277 };
1278
1279 static int __init eth_init_module(void)
1280 {
1281         int err;
1282         if ((err = ixp4xx_mdio_register()))
1283                 return err;
1284         return platform_driver_register(&ixp4xx_eth_driver);
1285 }
1286
1287 static void __exit eth_cleanup_module(void)
1288 {
1289         platform_driver_unregister(&ixp4xx_eth_driver);
1290         ixp4xx_mdio_remove();
1291 }
1292
1293 MODULE_AUTHOR("Krzysztof Halasa");
1294 MODULE_DESCRIPTION("Intel IXP4xx Ethernet driver");
1295 MODULE_LICENSE("GPL v2");
1296 MODULE_ALIAS("platform:ixp4xx_eth");
1297 module_init(eth_init_module);
1298 module_exit(eth_cleanup_module);