Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/agpgart
[pandora-kernel.git] / drivers / mtd / onenand / onenand_base.c
1 /*
2  *  linux/drivers/mtd/onenand/onenand_base.c
3  *
4  *  Copyright (C) 2005 Samsung Electronics
5  *  Kyungmin Park <kyungmin.park@samsung.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/sched.h>
16 #include <linux/jiffies.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/onenand.h>
19 #include <linux/mtd/partitions.h>
20
21 #include <asm/io.h>
22
23 /**
24  * onenand_oob_64 - oob info for large (2KB) page
25  */
26 static struct nand_ecclayout onenand_oob_64 = {
27         .eccbytes       = 20,
28         .eccpos         = {
29                 8, 9, 10, 11, 12,
30                 24, 25, 26, 27, 28,
31                 40, 41, 42, 43, 44,
32                 56, 57, 58, 59, 60,
33                 },
34         .oobfree        = {
35                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
36                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
37         }
38 };
39
40 /**
41  * onenand_oob_32 - oob info for middle (1KB) page
42  */
43 static struct nand_ecclayout onenand_oob_32 = {
44         .eccbytes       = 10,
45         .eccpos         = {
46                 8, 9, 10, 11, 12,
47                 24, 25, 26, 27, 28,
48                 },
49         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
50 };
51
52 static const unsigned char ffchars[] = {
53         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
54         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
55         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
56         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
57         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
58         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
61 };
62
63 /**
64  * onenand_readw - [OneNAND Interface] Read OneNAND register
65  * @param addr          address to read
66  *
67  * Read OneNAND register
68  */
69 static unsigned short onenand_readw(void __iomem *addr)
70 {
71         return readw(addr);
72 }
73
74 /**
75  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
76  * @param value         value to write
77  * @param addr          address to write
78  *
79  * Write OneNAND register with value
80  */
81 static void onenand_writew(unsigned short value, void __iomem *addr)
82 {
83         writew(value, addr);
84 }
85
86 /**
87  * onenand_block_address - [DEFAULT] Get block address
88  * @param this          onenand chip data structure
89  * @param block         the block
90  * @return              translated block address if DDP, otherwise same
91  *
92  * Setup Start Address 1 Register (F100h)
93  */
94 static int onenand_block_address(struct onenand_chip *this, int block)
95 {
96         if (this->device_id & ONENAND_DEVICE_IS_DDP) {
97                 /* Device Flash Core select, NAND Flash Block Address */
98                 int dfs = 0;
99
100                 if (block & this->density_mask)
101                         dfs = 1;
102
103                 return (dfs << ONENAND_DDP_SHIFT) |
104                         (block & (this->density_mask - 1));
105         }
106
107         return block;
108 }
109
110 /**
111  * onenand_bufferram_address - [DEFAULT] Get bufferram address
112  * @param this          onenand chip data structure
113  * @param block         the block
114  * @return              set DBS value if DDP, otherwise 0
115  *
116  * Setup Start Address 2 Register (F101h) for DDP
117  */
118 static int onenand_bufferram_address(struct onenand_chip *this, int block)
119 {
120         if (this->device_id & ONENAND_DEVICE_IS_DDP) {
121                 /* Device BufferRAM Select */
122                 int dbs = 0;
123
124                 if (block & this->density_mask)
125                         dbs = 1;
126
127                 return (dbs << ONENAND_DDP_SHIFT);
128         }
129
130         return 0;
131 }
132
133 /**
134  * onenand_page_address - [DEFAULT] Get page address
135  * @param page          the page address
136  * @param sector        the sector address
137  * @return              combined page and sector address
138  *
139  * Setup Start Address 8 Register (F107h)
140  */
141 static int onenand_page_address(int page, int sector)
142 {
143         /* Flash Page Address, Flash Sector Address */
144         int fpa, fsa;
145
146         fpa = page & ONENAND_FPA_MASK;
147         fsa = sector & ONENAND_FSA_MASK;
148
149         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
150 }
151
152 /**
153  * onenand_buffer_address - [DEFAULT] Get buffer address
154  * @param dataram1      DataRAM index
155  * @param sectors       the sector address
156  * @param count         the number of sectors
157  * @return              the start buffer value
158  *
159  * Setup Start Buffer Register (F200h)
160  */
161 static int onenand_buffer_address(int dataram1, int sectors, int count)
162 {
163         int bsa, bsc;
164
165         /* BufferRAM Sector Address */
166         bsa = sectors & ONENAND_BSA_MASK;
167
168         if (dataram1)
169                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
170         else
171                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
172
173         /* BufferRAM Sector Count */
174         bsc = count & ONENAND_BSC_MASK;
175
176         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
177 }
178
179 /**
180  * onenand_command - [DEFAULT] Send command to OneNAND device
181  * @param mtd           MTD device structure
182  * @param cmd           the command to be sent
183  * @param addr          offset to read from or write to
184  * @param len           number of bytes to read or write
185  *
186  * Send command to OneNAND device. This function is used for middle/large page
187  * devices (1KB/2KB Bytes per page)
188  */
189 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
190 {
191         struct onenand_chip *this = mtd->priv;
192         int value, readcmd = 0, block_cmd = 0;
193         int block, page;
194         /* Now we use page size operation */
195         int sectors = 4, count = 4;
196
197         /* Address translation */
198         switch (cmd) {
199         case ONENAND_CMD_UNLOCK:
200         case ONENAND_CMD_LOCK:
201         case ONENAND_CMD_LOCK_TIGHT:
202                 block = -1;
203                 page = -1;
204                 break;
205
206         case ONENAND_CMD_ERASE:
207         case ONENAND_CMD_BUFFERRAM:
208         case ONENAND_CMD_OTP_ACCESS:
209                 block_cmd = 1;
210                 block = (int) (addr >> this->erase_shift);
211                 page = -1;
212                 break;
213
214         default:
215                 block = (int) (addr >> this->erase_shift);
216                 page = (int) (addr >> this->page_shift);
217                 page &= this->page_mask;
218                 break;
219         }
220
221         /* NOTE: The setting order of the registers is very important! */
222         if (cmd == ONENAND_CMD_BUFFERRAM) {
223                 /* Select DataRAM for DDP */
224                 value = onenand_bufferram_address(this, block);
225                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
226
227                 /* Switch to the next data buffer */
228                 ONENAND_SET_NEXT_BUFFERRAM(this);
229
230                 return 0;
231         }
232
233         if (block != -1) {
234                 /* Write 'DFS, FBA' of Flash */
235                 value = onenand_block_address(this, block);
236                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
237
238                 if (block_cmd) {
239                         /* Select DataRAM for DDP */
240                         value = onenand_bufferram_address(this, block);
241                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
242                 }
243         }
244
245         if (page != -1) {
246                 int dataram;
247
248                 switch (cmd) {
249                 case ONENAND_CMD_READ:
250                 case ONENAND_CMD_READOOB:
251                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
252                         readcmd = 1;
253                         break;
254
255                 default:
256                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
257                         break;
258                 }
259
260                 /* Write 'FPA, FSA' of Flash */
261                 value = onenand_page_address(page, sectors);
262                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
263
264                 /* Write 'BSA, BSC' of DataRAM */
265                 value = onenand_buffer_address(dataram, sectors, count);
266                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
267
268                 if (readcmd) {
269                         /* Select DataRAM for DDP */
270                         value = onenand_bufferram_address(this, block);
271                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
272                 }
273         }
274
275         /* Interrupt clear */
276         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
277
278         /* Write command */
279         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
280
281         return 0;
282 }
283
284 /**
285  * onenand_wait - [DEFAULT] wait until the command is done
286  * @param mtd           MTD device structure
287  * @param state         state to select the max. timeout value
288  *
289  * Wait for command done. This applies to all OneNAND command
290  * Read can take up to 30us, erase up to 2ms and program up to 350us
291  * according to general OneNAND specs
292  */
293 static int onenand_wait(struct mtd_info *mtd, int state)
294 {
295         struct onenand_chip * this = mtd->priv;
296         unsigned long timeout;
297         unsigned int flags = ONENAND_INT_MASTER;
298         unsigned int interrupt = 0;
299         unsigned int ctrl, ecc;
300
301         /* The 20 msec is enough */
302         timeout = jiffies + msecs_to_jiffies(20);
303         while (time_before(jiffies, timeout)) {
304                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
305
306                 if (interrupt & flags)
307                         break;
308
309                 if (state != FL_READING)
310                         cond_resched();
311                 touch_softlockup_watchdog();
312         }
313         /* To get correct interrupt status in timeout case */
314         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
315
316         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
317
318         if (ctrl & ONENAND_CTRL_ERROR) {
319                 /* It maybe occur at initial bad block */
320                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
321                 /* Clear other interrupt bits for preventing ECC error */
322                 interrupt &= ONENAND_INT_MASTER;
323         }
324
325         if (ctrl & ONENAND_CTRL_LOCK) {
326                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error = 0x%04x\n", ctrl);
327                 return -EACCES;
328         }
329
330         if (interrupt & ONENAND_INT_READ) {
331                 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
332                 if (ecc & ONENAND_ECC_2BIT_ALL) {
333                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
334                         return -EBADMSG;
335                 }
336         }
337
338         return 0;
339 }
340
341 /**
342  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
343  * @param mtd           MTD data structure
344  * @param area          BufferRAM area
345  * @return              offset given area
346  *
347  * Return BufferRAM offset given area
348  */
349 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
350 {
351         struct onenand_chip *this = mtd->priv;
352
353         if (ONENAND_CURRENT_BUFFERRAM(this)) {
354                 if (area == ONENAND_DATARAM)
355                         return mtd->writesize;
356                 if (area == ONENAND_SPARERAM)
357                         return mtd->oobsize;
358         }
359
360         return 0;
361 }
362
363 /**
364  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
365  * @param mtd           MTD data structure
366  * @param area          BufferRAM area
367  * @param buffer        the databuffer to put/get data
368  * @param offset        offset to read from or write to
369  * @param count         number of bytes to read/write
370  *
371  * Read the BufferRAM area
372  */
373 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
374                 unsigned char *buffer, int offset, size_t count)
375 {
376         struct onenand_chip *this = mtd->priv;
377         void __iomem *bufferram;
378
379         bufferram = this->base + area;
380
381         bufferram += onenand_bufferram_offset(mtd, area);
382
383         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
384                 unsigned short word;
385
386                 /* Align with word(16-bit) size */
387                 count--;
388
389                 /* Read word and save byte */
390                 word = this->read_word(bufferram + offset + count);
391                 buffer[count] = (word & 0xff);
392         }
393
394         memcpy(buffer, bufferram + offset, count);
395
396         return 0;
397 }
398
399 /**
400  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
401  * @param mtd           MTD data structure
402  * @param area          BufferRAM area
403  * @param buffer        the databuffer to put/get data
404  * @param offset        offset to read from or write to
405  * @param count         number of bytes to read/write
406  *
407  * Read the BufferRAM area with Sync. Burst Mode
408  */
409 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
410                 unsigned char *buffer, int offset, size_t count)
411 {
412         struct onenand_chip *this = mtd->priv;
413         void __iomem *bufferram;
414
415         bufferram = this->base + area;
416
417         bufferram += onenand_bufferram_offset(mtd, area);
418
419         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
420
421         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
422                 unsigned short word;
423
424                 /* Align with word(16-bit) size */
425                 count--;
426
427                 /* Read word and save byte */
428                 word = this->read_word(bufferram + offset + count);
429                 buffer[count] = (word & 0xff);
430         }
431
432         memcpy(buffer, bufferram + offset, count);
433
434         this->mmcontrol(mtd, 0);
435
436         return 0;
437 }
438
439 /**
440  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
441  * @param mtd           MTD data structure
442  * @param area          BufferRAM area
443  * @param buffer        the databuffer to put/get data
444  * @param offset        offset to read from or write to
445  * @param count         number of bytes to read/write
446  *
447  * Write the BufferRAM area
448  */
449 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
450                 const unsigned char *buffer, int offset, size_t count)
451 {
452         struct onenand_chip *this = mtd->priv;
453         void __iomem *bufferram;
454
455         bufferram = this->base + area;
456
457         bufferram += onenand_bufferram_offset(mtd, area);
458
459         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
460                 unsigned short word;
461                 int byte_offset;
462
463                 /* Align with word(16-bit) size */
464                 count--;
465
466                 /* Calculate byte access offset */
467                 byte_offset = offset + count;
468
469                 /* Read word and save byte */
470                 word = this->read_word(bufferram + byte_offset);
471                 word = (word & ~0xff) | buffer[count];
472                 this->write_word(word, bufferram + byte_offset);
473         }
474
475         memcpy(bufferram + offset, buffer, count);
476
477         return 0;
478 }
479
480 /**
481  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
482  * @param mtd           MTD data structure
483  * @param addr          address to check
484  * @return              1 if there are valid data, otherwise 0
485  *
486  * Check bufferram if there is data we required
487  */
488 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
489 {
490         struct onenand_chip *this = mtd->priv;
491         int block, page;
492         int i;
493
494         block = (int) (addr >> this->erase_shift);
495         page = (int) (addr >> this->page_shift);
496         page &= this->page_mask;
497
498         i = ONENAND_CURRENT_BUFFERRAM(this);
499
500         /* Is there valid data? */
501         if (this->bufferram[i].block == block &&
502             this->bufferram[i].page == page &&
503             this->bufferram[i].valid)
504                 return 1;
505
506         return 0;
507 }
508
509 /**
510  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
511  * @param mtd           MTD data structure
512  * @param addr          address to update
513  * @param valid         valid flag
514  *
515  * Update BufferRAM information
516  */
517 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
518                 int valid)
519 {
520         struct onenand_chip *this = mtd->priv;
521         int block, page;
522         int i;
523
524         block = (int) (addr >> this->erase_shift);
525         page = (int) (addr >> this->page_shift);
526         page &= this->page_mask;
527
528         /* Invalidate BufferRAM */
529         for (i = 0; i < MAX_BUFFERRAM; i++) {
530                 if (this->bufferram[i].block == block &&
531                     this->bufferram[i].page == page)
532                         this->bufferram[i].valid = 0;
533         }
534
535         /* Update BufferRAM */
536         i = ONENAND_CURRENT_BUFFERRAM(this);
537         this->bufferram[i].block = block;
538         this->bufferram[i].page = page;
539         this->bufferram[i].valid = valid;
540
541         return 0;
542 }
543
544 /**
545  * onenand_get_device - [GENERIC] Get chip for selected access
546  * @param mtd           MTD device structure
547  * @param new_state     the state which is requested
548  *
549  * Get the device and lock it for exclusive access
550  */
551 static int onenand_get_device(struct mtd_info *mtd, int new_state)
552 {
553         struct onenand_chip *this = mtd->priv;
554         DECLARE_WAITQUEUE(wait, current);
555
556         /*
557          * Grab the lock and see if the device is available
558          */
559         while (1) {
560                 spin_lock(&this->chip_lock);
561                 if (this->state == FL_READY) {
562                         this->state = new_state;
563                         spin_unlock(&this->chip_lock);
564                         break;
565                 }
566                 if (new_state == FL_PM_SUSPENDED) {
567                         spin_unlock(&this->chip_lock);
568                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
569                 }
570                 set_current_state(TASK_UNINTERRUPTIBLE);
571                 add_wait_queue(&this->wq, &wait);
572                 spin_unlock(&this->chip_lock);
573                 schedule();
574                 remove_wait_queue(&this->wq, &wait);
575         }
576
577         return 0;
578 }
579
580 /**
581  * onenand_release_device - [GENERIC] release chip
582  * @param mtd           MTD device structure
583  *
584  * Deselect, release chip lock and wake up anyone waiting on the device
585  */
586 static void onenand_release_device(struct mtd_info *mtd)
587 {
588         struct onenand_chip *this = mtd->priv;
589
590         /* Release the chip */
591         spin_lock(&this->chip_lock);
592         this->state = FL_READY;
593         wake_up(&this->wq);
594         spin_unlock(&this->chip_lock);
595 }
596
597 /**
598  * onenand_read - [MTD Interface] Read data from flash
599  * @param mtd           MTD device structure
600  * @param from          offset to read from
601  * @param len           number of bytes to read
602  * @param retlen        pointer to variable to store the number of read bytes
603  * @param buf           the databuffer to put data
604  *
605  * Read with ecc
606 */
607 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
608         size_t *retlen, u_char *buf)
609 {
610         struct onenand_chip *this = mtd->priv;
611         int read = 0, column;
612         int thislen;
613         int ret = 0;
614
615         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
616
617         /* Do not allow reads past end of device */
618         if ((from + len) > mtd->size) {
619                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
620                 *retlen = 0;
621                 return -EINVAL;
622         }
623
624         /* Grab the lock and see if the device is available */
625         onenand_get_device(mtd, FL_READING);
626
627         /* TODO handling oob */
628
629         while (read < len) {
630                 thislen = min_t(int, mtd->writesize, len - read);
631
632                 column = from & (mtd->writesize - 1);
633                 if (column + thislen > mtd->writesize)
634                         thislen = mtd->writesize - column;
635
636                 if (!onenand_check_bufferram(mtd, from)) {
637                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
638
639                         ret = this->wait(mtd, FL_READING);
640                         /* First copy data and check return value for ECC handling */
641                         onenand_update_bufferram(mtd, from, 1);
642                 }
643
644                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
645
646                 read += thislen;
647
648                 if (read == len)
649                         break;
650
651                 if (ret) {
652                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: read failed = %d\n", ret);
653                         goto out;
654                 }
655
656                 from += thislen;
657                 buf += thislen;
658         }
659
660 out:
661         /* Deselect and wake up anyone waiting on the device */
662         onenand_release_device(mtd);
663
664         /*
665          * Return success, if no ECC failures, else -EBADMSG
666          * fs driver will take care of that, because
667          * retlen == desired len and result == -EBADMSG
668          */
669         *retlen = read;
670         return ret;
671 }
672
673 /**
674  * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
675  * @param mtd           MTD device structure
676  * @param from          offset to read from
677  * @param len           number of bytes to read
678  * @param retlen        pointer to variable to store the number of read bytes
679  * @param buf           the databuffer to put data
680  *
681  * OneNAND read out-of-band data from the spare area
682  */
683 int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
684                         size_t *retlen, u_char *buf)
685 {
686         struct onenand_chip *this = mtd->priv;
687         int read = 0, thislen, column;
688         int ret = 0;
689
690         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
691
692         /* Initialize return length value */
693         *retlen = 0;
694
695         /* Do not allow reads past end of device */
696         if (unlikely((from + len) > mtd->size)) {
697                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
698                 return -EINVAL;
699         }
700
701         /* Grab the lock and see if the device is available */
702         onenand_get_device(mtd, FL_READING);
703
704         column = from & (mtd->oobsize - 1);
705
706         while (read < len) {
707                 thislen = mtd->oobsize - column;
708                 thislen = min_t(int, thislen, len);
709
710                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
711
712                 onenand_update_bufferram(mtd, from, 0);
713
714                 ret = this->wait(mtd, FL_READING);
715                 /* First copy data and check return value for ECC handling */
716
717                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
718
719                 read += thislen;
720
721                 if (read == len)
722                         break;
723
724                 if (ret) {
725                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = %d\n", ret);
726                         goto out;
727                 }
728
729                 buf += thislen;
730
731                 /* Read more? */
732                 if (read < len) {
733                         /* Page size */
734                         from += mtd->writesize;
735                         column = 0;
736                 }
737         }
738
739 out:
740         /* Deselect and wake up anyone waiting on the device */
741         onenand_release_device(mtd);
742
743         *retlen = read;
744         return ret;
745 }
746
747 /**
748  * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
749  * @mtd:        MTD device structure
750  * @from:       offset to read from
751  * @ops:        oob operation description structure
752  */
753 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
754                             struct mtd_oob_ops *ops)
755 {
756         BUG_ON(ops->mode != MTD_OOB_PLACE);
757
758         return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->len,
759                                    &ops->retlen, ops->oobbuf);
760 }
761
762 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
763 /**
764  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
765  * @param mtd           MTD device structure
766  * @param buf           the databuffer to verify
767  * @param to            offset to read from
768  * @param len           number of bytes to read and compare
769  *
770  */
771 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len)
772 {
773         struct onenand_chip *this = mtd->priv;
774         char *readp = this->page_buf;
775         int column = to & (mtd->oobsize - 1);
776         int status, i;
777
778         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
779         onenand_update_bufferram(mtd, to, 0);
780         status = this->wait(mtd, FL_READING);
781         if (status)
782                 return status;
783
784         this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len);
785
786         for(i = 0; i < len; i++)
787                 if (buf[i] != 0xFF && buf[i] != readp[i])
788                         return -EBADMSG;
789
790         return 0;
791 }
792
793 /**
794  * onenand_verify_page - [GENERIC] verify the chip contents after a write
795  * @param mtd           MTD device structure
796  * @param buf           the databuffer to verify
797  *
798  * Check DataRAM area directly
799  */
800 static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
801 {
802         struct onenand_chip *this = mtd->priv;
803         void __iomem *dataram0, *dataram1;
804         int ret = 0;
805
806         this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
807
808         ret = this->wait(mtd, FL_READING);
809         if (ret)
810                 return ret;
811
812         onenand_update_bufferram(mtd, addr, 1);
813
814         /* Check, if the two dataram areas are same */
815         dataram0 = this->base + ONENAND_DATARAM;
816         dataram1 = dataram0 + mtd->writesize;
817
818         if (memcmp(dataram0, dataram1, mtd->writesize))
819                 return -EBADMSG;
820
821         return 0;
822 }
823 #else
824 #define onenand_verify_page(...)        (0)
825 #define onenand_verify_oob(...)         (0)
826 #endif
827
828 #define NOTALIGNED(x)   ((x & (mtd->writesize - 1)) != 0)
829
830 /**
831  * onenand_write - [MTD Interface] write buffer to FLASH
832  * @param mtd           MTD device structure
833  * @param to            offset to write to
834  * @param len           number of bytes to write
835  * @param retlen        pointer to variable to store the number of written bytes
836  * @param buf           the data to write
837  *
838  * Write with ECC
839  */
840 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
841         size_t *retlen, const u_char *buf)
842 {
843         struct onenand_chip *this = mtd->priv;
844         int written = 0;
845         int ret = 0;
846
847         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
848
849         /* Initialize retlen, in case of early exit */
850         *retlen = 0;
851
852         /* Do not allow writes past end of device */
853         if (unlikely((to + len) > mtd->size)) {
854                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
855                 return -EINVAL;
856         }
857
858         /* Reject writes, which are not page aligned */
859         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
860                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
861                 return -EINVAL;
862         }
863
864         /* Grab the lock and see if the device is available */
865         onenand_get_device(mtd, FL_WRITING);
866
867         /* Loop until all data write */
868         while (written < len) {
869                 int thislen = min_t(int, mtd->writesize, len - written);
870
871                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->writesize);
872
873                 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
874                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
875
876                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
877
878                 onenand_update_bufferram(mtd, to, 1);
879
880                 ret = this->wait(mtd, FL_WRITING);
881                 if (ret) {
882                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
883                         goto out;
884                 }
885
886                 written += thislen;
887
888                 /* Only check verify write turn on */
889                 ret = onenand_verify_page(mtd, (u_char *) buf, to);
890                 if (ret) {
891                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
892                         goto out;
893                 }
894
895                 if (written == len)
896                         break;
897
898                 to += thislen;
899                 buf += thislen;
900         }
901
902 out:
903         /* Deselect and wake up anyone waiting on the device */
904         onenand_release_device(mtd);
905
906         *retlen = written;
907
908         return ret;
909 }
910
911 /**
912  * onenand_do_write_oob - [Internal] OneNAND write out-of-band
913  * @param mtd           MTD device structure
914  * @param to            offset to write to
915  * @param len           number of bytes to write
916  * @param retlen        pointer to variable to store the number of written bytes
917  * @param buf           the data to write
918  *
919  * OneNAND write out-of-band
920  */
921 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
922                                 size_t *retlen, const u_char *buf)
923 {
924         struct onenand_chip *this = mtd->priv;
925         int column, ret = 0;
926         int written = 0;
927
928         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
929
930         /* Initialize retlen, in case of early exit */
931         *retlen = 0;
932
933         /* Do not allow writes past end of device */
934         if (unlikely((to + len) > mtd->size)) {
935                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
936                 return -EINVAL;
937         }
938
939         /* Grab the lock and see if the device is available */
940         onenand_get_device(mtd, FL_WRITING);
941
942         /* Loop until all data write */
943         while (written < len) {
944                 int thislen = min_t(int, mtd->oobsize, len - written);
945
946                 column = to & (mtd->oobsize - 1);
947
948                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
949
950                 /* We send data to spare ram with oobsize
951                  * to prevent byte access */
952                 memset(this->page_buf, 0xff, mtd->oobsize);
953                 memcpy(this->page_buf + column, buf, thislen);
954                 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
955
956                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
957
958                 onenand_update_bufferram(mtd, to, 0);
959
960                 ret = this->wait(mtd, FL_WRITING);
961                 if (ret) {
962                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret);
963                         goto out;
964                 }
965
966                 ret = onenand_verify_oob(mtd, buf, to, thislen);
967                 if (ret) {
968                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
969                         goto out;
970                 }
971
972                 written += thislen;
973
974                 if (written == len)
975                         break;
976
977                 to += thislen;
978                 buf += thislen;
979         }
980
981 out:
982         /* Deselect and wake up anyone waiting on the device */
983         onenand_release_device(mtd);
984
985         *retlen = written;
986
987         return ret;
988 }
989
990 /**
991  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
992  * @mtd:        MTD device structure
993  * @from:       offset to read from
994  * @ops:        oob operation description structure
995  */
996 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
997                              struct mtd_oob_ops *ops)
998 {
999         BUG_ON(ops->mode != MTD_OOB_PLACE);
1000
1001         return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->len,
1002                                     &ops->retlen, ops->oobbuf);
1003 }
1004
1005 /**
1006  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1007  * @param mtd           MTD device structure
1008  * @param ofs           offset from device start
1009  * @param getchip       0, if the chip is already selected
1010  * @param allowbbt      1, if its allowed to access the bbt area
1011  *
1012  * Check, if the block is bad. Either by reading the bad block table or
1013  * calling of the scan function.
1014  */
1015 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1016 {
1017         struct onenand_chip *this = mtd->priv;
1018         struct bbm_info *bbm = this->bbm;
1019
1020         /* Return info from the table */
1021         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1022 }
1023
1024 /**
1025  * onenand_erase - [MTD Interface] erase block(s)
1026  * @param mtd           MTD device structure
1027  * @param instr         erase instruction
1028  *
1029  * Erase one ore more blocks
1030  */
1031 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1032 {
1033         struct onenand_chip *this = mtd->priv;
1034         unsigned int block_size;
1035         loff_t addr;
1036         int len;
1037         int ret = 0;
1038
1039         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1040
1041         block_size = (1 << this->erase_shift);
1042
1043         /* Start address must align on block boundary */
1044         if (unlikely(instr->addr & (block_size - 1))) {
1045                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1046                 return -EINVAL;
1047         }
1048
1049         /* Length must align on block boundary */
1050         if (unlikely(instr->len & (block_size - 1))) {
1051                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1052                 return -EINVAL;
1053         }
1054
1055         /* Do not allow erase past end of device */
1056         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1057                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1058                 return -EINVAL;
1059         }
1060
1061         instr->fail_addr = 0xffffffff;
1062
1063         /* Grab the lock and see if the device is available */
1064         onenand_get_device(mtd, FL_ERASING);
1065
1066         /* Loop throught the pages */
1067         len = instr->len;
1068         addr = instr->addr;
1069
1070         instr->state = MTD_ERASING;
1071
1072         while (len) {
1073
1074                 /* Check if we have a bad block, we do not erase bad blocks */
1075                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1076                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1077                         instr->state = MTD_ERASE_FAILED;
1078                         goto erase_exit;
1079                 }
1080
1081                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1082
1083                 ret = this->wait(mtd, FL_ERASING);
1084                 /* Check, if it is write protected */
1085                 if (ret) {
1086                         if (ret == -EPERM)
1087                                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Device is write protected!!!\n");
1088                         else
1089                                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1090                         instr->state = MTD_ERASE_FAILED;
1091                         instr->fail_addr = addr;
1092                         goto erase_exit;
1093                 }
1094
1095                 len -= block_size;
1096                 addr += block_size;
1097         }
1098
1099         instr->state = MTD_ERASE_DONE;
1100
1101 erase_exit:
1102
1103         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1104         /* Do call back function */
1105         if (!ret)
1106                 mtd_erase_callback(instr);
1107
1108         /* Deselect and wake up anyone waiting on the device */
1109         onenand_release_device(mtd);
1110
1111         return ret;
1112 }
1113
1114 /**
1115  * onenand_sync - [MTD Interface] sync
1116  * @param mtd           MTD device structure
1117  *
1118  * Sync is actually a wait for chip ready function
1119  */
1120 static void onenand_sync(struct mtd_info *mtd)
1121 {
1122         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1123
1124         /* Grab the lock and see if the device is available */
1125         onenand_get_device(mtd, FL_SYNCING);
1126
1127         /* Release it and go back */
1128         onenand_release_device(mtd);
1129 }
1130
1131
1132 /**
1133  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1134  * @param mtd           MTD device structure
1135  * @param ofs           offset relative to mtd start
1136  *
1137  * Check whether the block is bad
1138  */
1139 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1140 {
1141         /* Check for invalid offset */
1142         if (ofs > mtd->size)
1143                 return -EINVAL;
1144
1145         return onenand_block_checkbad(mtd, ofs, 1, 0);
1146 }
1147
1148 /**
1149  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1150  * @param mtd           MTD device structure
1151  * @param ofs           offset from device start
1152  *
1153  * This is the default implementation, which can be overridden by
1154  * a hardware specific driver.
1155  */
1156 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1157 {
1158         struct onenand_chip *this = mtd->priv;
1159         struct bbm_info *bbm = this->bbm;
1160         u_char buf[2] = {0, 0};
1161         size_t retlen;
1162         int block;
1163
1164         /* Get block number */
1165         block = ((int) ofs) >> bbm->bbt_erase_shift;
1166         if (bbm->bbt)
1167                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1168
1169         /* We write two bytes, so we dont have to mess with 16 bit access */
1170         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1171         return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf);
1172 }
1173
1174 /**
1175  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1176  * @param mtd           MTD device structure
1177  * @param ofs           offset relative to mtd start
1178  *
1179  * Mark the block as bad
1180  */
1181 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1182 {
1183         struct onenand_chip *this = mtd->priv;
1184         int ret;
1185
1186         ret = onenand_block_isbad(mtd, ofs);
1187         if (ret) {
1188                 /* If it was bad already, return success and do nothing */
1189                 if (ret > 0)
1190                         return 0;
1191                 return ret;
1192         }
1193
1194         return this->block_markbad(mtd, ofs);
1195 }
1196
1197 /**
1198  * onenand_unlock - [MTD Interface] Unlock block(s)
1199  * @param mtd           MTD device structure
1200  * @param ofs           offset relative to mtd start
1201  * @param len           number of bytes to unlock
1202  *
1203  * Unlock one or more blocks
1204  */
1205 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1206 {
1207         struct onenand_chip *this = mtd->priv;
1208         int start, end, block, value, status;
1209
1210         start = ofs >> this->erase_shift;
1211         end = len >> this->erase_shift;
1212
1213         /* Continuous lock scheme */
1214         if (this->options & ONENAND_CONT_LOCK) {
1215                 /* Set start block address */
1216                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1217                 /* Set end block address */
1218                 this->write_word(end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1219                 /* Write unlock command */
1220                 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1221
1222                 /* There's no return value */
1223                 this->wait(mtd, FL_UNLOCKING);
1224
1225                 /* Sanity check */
1226                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1227                     & ONENAND_CTRL_ONGO)
1228                         continue;
1229
1230                 /* Check lock status */
1231                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1232                 if (!(status & ONENAND_WP_US))
1233                         printk(KERN_ERR "wp status = 0x%x\n", status);
1234
1235                 return 0;
1236         }
1237
1238         /* Block lock scheme */
1239         for (block = start; block < end; block++) {
1240                 /* Set block address */
1241                 value = onenand_block_address(this, block);
1242                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1243                 /* Select DataRAM for DDP */
1244                 value = onenand_bufferram_address(this, block);
1245                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1246                 /* Set start block address */
1247                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1248                 /* Write unlock command */
1249                 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1250
1251                 /* There's no return value */
1252                 this->wait(mtd, FL_UNLOCKING);
1253
1254                 /* Sanity check */
1255                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1256                     & ONENAND_CTRL_ONGO)
1257                         continue;
1258
1259                 /* Check lock status */
1260                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1261                 if (!(status & ONENAND_WP_US))
1262                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1263         }
1264
1265         return 0;
1266 }
1267
1268 #ifdef CONFIG_MTD_ONENAND_OTP
1269
1270 /* Interal OTP operation */
1271 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1272                 size_t *retlen, u_char *buf);
1273
1274 /**
1275  * do_otp_read - [DEFAULT] Read OTP block area
1276  * @param mtd           MTD device structure
1277  * @param from          The offset to read
1278  * @param len           number of bytes to read
1279  * @param retlen        pointer to variable to store the number of readbytes
1280  * @param buf           the databuffer to put/get data
1281  *
1282  * Read OTP block area.
1283  */
1284 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1285                 size_t *retlen, u_char *buf)
1286 {
1287         struct onenand_chip *this = mtd->priv;
1288         int ret;
1289
1290         /* Enter OTP access mode */
1291         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1292         this->wait(mtd, FL_OTPING);
1293
1294         ret = mtd->read(mtd, from, len, retlen, buf);
1295
1296         /* Exit OTP access mode */
1297         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1298         this->wait(mtd, FL_RESETING);
1299
1300         return ret;
1301 }
1302
1303 /**
1304  * do_otp_write - [DEFAULT] Write OTP block area
1305  * @param mtd           MTD device structure
1306  * @param from          The offset to write
1307  * @param len           number of bytes to write
1308  * @param retlen        pointer to variable to store the number of write bytes
1309  * @param buf           the databuffer to put/get data
1310  *
1311  * Write OTP block area.
1312  */
1313 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1314                 size_t *retlen, u_char *buf)
1315 {
1316         struct onenand_chip *this = mtd->priv;
1317         unsigned char *pbuf = buf;
1318         int ret;
1319
1320         /* Force buffer page aligned */
1321         if (len < mtd->writesize) {
1322                 memcpy(this->page_buf, buf, len);
1323                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1324                 pbuf = this->page_buf;
1325                 len = mtd->writesize;
1326         }
1327
1328         /* Enter OTP access mode */
1329         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1330         this->wait(mtd, FL_OTPING);
1331
1332         ret = mtd->write(mtd, from, len, retlen, pbuf);
1333
1334         /* Exit OTP access mode */
1335         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1336         this->wait(mtd, FL_RESETING);
1337
1338         return ret;
1339 }
1340
1341 /**
1342  * do_otp_lock - [DEFAULT] Lock OTP block area
1343  * @param mtd           MTD device structure
1344  * @param from          The offset to lock
1345  * @param len           number of bytes to lock
1346  * @param retlen        pointer to variable to store the number of lock bytes
1347  * @param buf           the databuffer to put/get data
1348  *
1349  * Lock OTP block area.
1350  */
1351 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1352                 size_t *retlen, u_char *buf)
1353 {
1354         struct onenand_chip *this = mtd->priv;
1355         int ret;
1356
1357         /* Enter OTP access mode */
1358         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1359         this->wait(mtd, FL_OTPING);
1360
1361         ret = onenand_do_write_oob(mtd, from, len, retlen, buf);
1362
1363         /* Exit OTP access mode */
1364         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1365         this->wait(mtd, FL_RESETING);
1366
1367         return ret;
1368 }
1369
1370 /**
1371  * onenand_otp_walk - [DEFAULT] Handle OTP operation
1372  * @param mtd           MTD device structure
1373  * @param from          The offset to read/write
1374  * @param len           number of bytes to read/write
1375  * @param retlen        pointer to variable to store the number of read bytes
1376  * @param buf           the databuffer to put/get data
1377  * @param action        do given action
1378  * @param mode          specify user and factory
1379  *
1380  * Handle OTP operation.
1381  */
1382 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1383                         size_t *retlen, u_char *buf,
1384                         otp_op_t action, int mode)
1385 {
1386         struct onenand_chip *this = mtd->priv;
1387         int otp_pages;
1388         int density;
1389         int ret = 0;
1390
1391         *retlen = 0;
1392
1393         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1394         if (density < ONENAND_DEVICE_DENSITY_512Mb)
1395                 otp_pages = 20;
1396         else
1397                 otp_pages = 10;
1398
1399         if (mode == MTD_OTP_FACTORY) {
1400                 from += mtd->writesize * otp_pages;
1401                 otp_pages = 64 - otp_pages;
1402         }
1403
1404         /* Check User/Factory boundary */
1405         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1406                 return 0;
1407
1408         while (len > 0 && otp_pages > 0) {
1409                 if (!action) {  /* OTP Info functions */
1410                         struct otp_info *otpinfo;
1411
1412                         len -= sizeof(struct otp_info);
1413                         if (len <= 0)
1414                                 return -ENOSPC;
1415
1416                         otpinfo = (struct otp_info *) buf;
1417                         otpinfo->start = from;
1418                         otpinfo->length = mtd->writesize;
1419                         otpinfo->locked = 0;
1420
1421                         from += mtd->writesize;
1422                         buf += sizeof(struct otp_info);
1423                         *retlen += sizeof(struct otp_info);
1424                 } else {
1425                         size_t tmp_retlen;
1426                         int size = len;
1427
1428                         ret = action(mtd, from, len, &tmp_retlen, buf);
1429
1430                         buf += size;
1431                         len -= size;
1432                         *retlen += size;
1433
1434                         if (ret < 0)
1435                                 return ret;
1436                 }
1437                 otp_pages--;
1438         }
1439
1440         return 0;
1441 }
1442
1443 /**
1444  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1445  * @param mtd           MTD device structure
1446  * @param buf           the databuffer to put/get data
1447  * @param len           number of bytes to read
1448  *
1449  * Read factory OTP info.
1450  */
1451 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1452                         struct otp_info *buf, size_t len)
1453 {
1454         size_t retlen;
1455         int ret;
1456
1457         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1458
1459         return ret ? : retlen;
1460 }
1461
1462 /**
1463  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1464  * @param mtd           MTD device structure
1465  * @param from          The offset to read
1466  * @param len           number of bytes to read
1467  * @param retlen        pointer to variable to store the number of read bytes
1468  * @param buf           the databuffer to put/get data
1469  *
1470  * Read factory OTP area.
1471  */
1472 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1473                         size_t len, size_t *retlen, u_char *buf)
1474 {
1475         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1476 }
1477
1478 /**
1479  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1480  * @param mtd           MTD device structure
1481  * @param buf           the databuffer to put/get data
1482  * @param len           number of bytes to read
1483  *
1484  * Read user OTP info.
1485  */
1486 static int onenand_get_user_prot_info(struct mtd_info *mtd,
1487                         struct otp_info *buf, size_t len)
1488 {
1489         size_t retlen;
1490         int ret;
1491
1492         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1493
1494         return ret ? : retlen;
1495 }
1496
1497 /**
1498  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1499  * @param mtd           MTD device structure
1500  * @param from          The offset to read
1501  * @param len           number of bytes to read
1502  * @param retlen        pointer to variable to store the number of read bytes
1503  * @param buf           the databuffer to put/get data
1504  *
1505  * Read user OTP area.
1506  */
1507 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1508                         size_t len, size_t *retlen, u_char *buf)
1509 {
1510         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1511 }
1512
1513 /**
1514  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
1515  * @param mtd           MTD device structure
1516  * @param from          The offset to write
1517  * @param len           number of bytes to write
1518  * @param retlen        pointer to variable to store the number of write bytes
1519  * @param buf           the databuffer to put/get data
1520  *
1521  * Write user OTP area.
1522  */
1523 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
1524                         size_t len, size_t *retlen, u_char *buf)
1525 {
1526         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
1527 }
1528
1529 /**
1530  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
1531  * @param mtd           MTD device structure
1532  * @param from          The offset to lock
1533  * @param len           number of bytes to unlock
1534  *
1535  * Write lock mark on spare area in page 0 in OTP block
1536  */
1537 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
1538                         size_t len)
1539 {
1540         unsigned char oob_buf[64];
1541         size_t retlen;
1542         int ret;
1543
1544         memset(oob_buf, 0xff, mtd->oobsize);
1545         /*
1546          * Note: OTP lock operation
1547          *       OTP block : 0xXXFC
1548          *       1st block : 0xXXF3 (If chip support)
1549          *       Both      : 0xXXF0 (If chip support)
1550          */
1551         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
1552
1553         /*
1554          * Write lock mark to 8th word of sector0 of page0 of the spare0.
1555          * We write 16 bytes spare area instead of 2 bytes.
1556          */
1557         from = 0;
1558         len = 16;
1559
1560         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
1561
1562         return ret ? : retlen;
1563 }
1564 #endif  /* CONFIG_MTD_ONENAND_OTP */
1565
1566 /**
1567  * onenand_print_device_info - Print device ID
1568  * @param device        device ID
1569  *
1570  * Print device ID
1571  */
1572 static void onenand_print_device_info(int device)
1573 {
1574         int vcc, demuxed, ddp, density;
1575
1576         vcc = device & ONENAND_DEVICE_VCC_MASK;
1577         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1578         ddp = device & ONENAND_DEVICE_IS_DDP;
1579         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1580         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1581                 demuxed ? "" : "Muxed ",
1582                 ddp ? "(DDP)" : "",
1583                 (16 << density),
1584                 vcc ? "2.65/3.3" : "1.8",
1585                 device);
1586 }
1587
1588 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1589         {ONENAND_MFR_SAMSUNG, "Samsung"},
1590 };
1591
1592 /**
1593  * onenand_check_maf - Check manufacturer ID
1594  * @param manuf         manufacturer ID
1595  *
1596  * Check manufacturer ID
1597  */
1598 static int onenand_check_maf(int manuf)
1599 {
1600         int size = ARRAY_SIZE(onenand_manuf_ids);
1601         char *name;
1602         int i;
1603
1604         for (i = 0; i < size; i++)
1605                 if (manuf == onenand_manuf_ids[i].id)
1606                         break;
1607
1608         if (i < size)
1609                 name = onenand_manuf_ids[i].name;
1610         else
1611                 name = "Unknown";
1612
1613         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1614
1615         return (i == size);
1616 }
1617
1618 /**
1619  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1620  * @param mtd           MTD device structure
1621  *
1622  * OneNAND detection method:
1623  *   Compare the the values from command with ones from register
1624  */
1625 static int onenand_probe(struct mtd_info *mtd)
1626 {
1627         struct onenand_chip *this = mtd->priv;
1628         int bram_maf_id, bram_dev_id, maf_id, dev_id;
1629         int version_id;
1630         int density;
1631
1632         /* Send the command for reading device ID from BootRAM */
1633         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1634
1635         /* Read manufacturer and device IDs from BootRAM */
1636         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1637         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1638
1639         /* Check manufacturer ID */
1640         if (onenand_check_maf(bram_maf_id))
1641                 return -ENXIO;
1642
1643         /* Reset OneNAND to read default register values */
1644         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1645
1646         /* Read manufacturer and device IDs from Register */
1647         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1648         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1649
1650         /* Check OneNAND device */
1651         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1652                 return -ENXIO;
1653
1654         /* Flash device information */
1655         onenand_print_device_info(dev_id);
1656         this->device_id = dev_id;
1657
1658         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1659         this->chipsize = (16 << density) << 20;
1660         /* Set density mask. it is used for DDP */
1661         this->density_mask = (1 << (density + 6));
1662
1663         /* OneNAND page size & block size */
1664         /* The data buffer size is equal to page size */
1665         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1666         mtd->oobsize = mtd->writesize >> 5;
1667         /* Pagers per block is always 64 in OneNAND */
1668         mtd->erasesize = mtd->writesize << 6;
1669
1670         this->erase_shift = ffs(mtd->erasesize) - 1;
1671         this->page_shift = ffs(mtd->writesize) - 1;
1672         this->ppb_shift = (this->erase_shift - this->page_shift);
1673         this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
1674
1675         /* REVIST: Multichip handling */
1676
1677         mtd->size = this->chipsize;
1678
1679         /* Version ID */
1680         version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1681         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id);
1682
1683         /* Lock scheme */
1684         if (density <= ONENAND_DEVICE_DENSITY_512Mb &&
1685             !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) {
1686                 printk(KERN_INFO "Lock scheme is Continues Lock\n");
1687                 this->options |= ONENAND_CONT_LOCK;
1688         }
1689
1690         return 0;
1691 }
1692
1693 /**
1694  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1695  * @param mtd           MTD device structure
1696  */
1697 static int onenand_suspend(struct mtd_info *mtd)
1698 {
1699         return onenand_get_device(mtd, FL_PM_SUSPENDED);
1700 }
1701
1702 /**
1703  * onenand_resume - [MTD Interface] Resume the OneNAND flash
1704  * @param mtd           MTD device structure
1705  */
1706 static void onenand_resume(struct mtd_info *mtd)
1707 {
1708         struct onenand_chip *this = mtd->priv;
1709
1710         if (this->state == FL_PM_SUSPENDED)
1711                 onenand_release_device(mtd);
1712         else
1713                 printk(KERN_ERR "resume() called for the chip which is not"
1714                                 "in suspended state\n");
1715 }
1716
1717 /**
1718  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1719  * @param mtd           MTD device structure
1720  * @param maxchips      Number of chips to scan for
1721  *
1722  * This fills out all the not initialized function pointers
1723  * with the defaults.
1724  * The flash ID is read and the mtd/chip structures are
1725  * filled with the appropriate values.
1726  */
1727 int onenand_scan(struct mtd_info *mtd, int maxchips)
1728 {
1729         struct onenand_chip *this = mtd->priv;
1730
1731         if (!this->read_word)
1732                 this->read_word = onenand_readw;
1733         if (!this->write_word)
1734                 this->write_word = onenand_writew;
1735
1736         if (!this->command)
1737                 this->command = onenand_command;
1738         if (!this->wait)
1739                 this->wait = onenand_wait;
1740
1741         if (!this->read_bufferram)
1742                 this->read_bufferram = onenand_read_bufferram;
1743         if (!this->write_bufferram)
1744                 this->write_bufferram = onenand_write_bufferram;
1745
1746         if (!this->block_markbad)
1747                 this->block_markbad = onenand_default_block_markbad;
1748         if (!this->scan_bbt)
1749                 this->scan_bbt = onenand_default_bbt;
1750
1751         if (onenand_probe(mtd))
1752                 return -ENXIO;
1753
1754         /* Set Sync. Burst Read after probing */
1755         if (this->mmcontrol) {
1756                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
1757                 this->read_bufferram = onenand_sync_read_bufferram;
1758         }
1759
1760         /* Allocate buffers, if necessary */
1761         if (!this->page_buf) {
1762                 size_t len;
1763                 len = mtd->writesize + mtd->oobsize;
1764                 this->page_buf = kmalloc(len, GFP_KERNEL);
1765                 if (!this->page_buf) {
1766                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
1767                         return -ENOMEM;
1768                 }
1769                 this->options |= ONENAND_PAGEBUF_ALLOC;
1770         }
1771
1772         this->state = FL_READY;
1773         init_waitqueue_head(&this->wq);
1774         spin_lock_init(&this->chip_lock);
1775
1776         switch (mtd->oobsize) {
1777         case 64:
1778                 this->ecclayout = &onenand_oob_64;
1779                 break;
1780
1781         case 32:
1782                 this->ecclayout = &onenand_oob_32;
1783                 break;
1784
1785         default:
1786                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
1787                         mtd->oobsize);
1788                 /* To prevent kernel oops */
1789                 this->ecclayout = &onenand_oob_32;
1790                 break;
1791         }
1792
1793         mtd->ecclayout = this->ecclayout;
1794
1795         /* Fill in remaining MTD driver data */
1796         mtd->type = MTD_NANDFLASH;
1797         mtd->flags = MTD_CAP_NANDFLASH;
1798         mtd->ecctype = MTD_ECC_SW;
1799         mtd->erase = onenand_erase;
1800         mtd->point = NULL;
1801         mtd->unpoint = NULL;
1802         mtd->read = onenand_read;
1803         mtd->write = onenand_write;
1804         mtd->read_oob = onenand_read_oob;
1805         mtd->write_oob = onenand_write_oob;
1806 #ifdef CONFIG_MTD_ONENAND_OTP
1807         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
1808         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
1809         mtd->get_user_prot_info = onenand_get_user_prot_info;
1810         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
1811         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
1812         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
1813 #endif
1814         mtd->sync = onenand_sync;
1815         mtd->lock = NULL;
1816         mtd->unlock = onenand_unlock;
1817         mtd->suspend = onenand_suspend;
1818         mtd->resume = onenand_resume;
1819         mtd->block_isbad = onenand_block_isbad;
1820         mtd->block_markbad = onenand_block_markbad;
1821         mtd->owner = THIS_MODULE;
1822
1823         /* Unlock whole block */
1824         mtd->unlock(mtd, 0x0, this->chipsize);
1825
1826         return this->scan_bbt(mtd);
1827 }
1828
1829 /**
1830  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
1831  * @param mtd           MTD device structure
1832  */
1833 void onenand_release(struct mtd_info *mtd)
1834 {
1835         struct onenand_chip *this = mtd->priv;
1836
1837 #ifdef CONFIG_MTD_PARTITIONS
1838         /* Deregister partitions */
1839         del_mtd_partitions (mtd);
1840 #endif
1841         /* Deregister the device */
1842         del_mtd_device (mtd);
1843
1844         /* Free bad block table memory, if allocated */
1845         if (this->bbm)
1846                 kfree(this->bbm);
1847         /* Buffer allocated by onenand_scan */
1848         if (this->options & ONENAND_PAGEBUF_ALLOC)
1849                 kfree(this->page_buf);
1850 }
1851
1852 EXPORT_SYMBOL_GPL(onenand_scan);
1853 EXPORT_SYMBOL_GPL(onenand_release);
1854
1855 MODULE_LICENSE("GPL");
1856 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
1857 MODULE_DESCRIPTION("Generic OneNAND flash driver code");