drivers/mtd/onenand/onenand_base.c

   1 /*
   2  *  linux/drivers/mtd/onenand/onenand_base.c
   3  *
   4  *  Copyright (C) 2005-2006 Samsung Electronics
   5  *  Kyungmin Park <kyungmin.park@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/sched.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/jiffies.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/onenand.h>
  20 #include <linux/mtd/partitions.h>
  21
  22 #include <asm/io.h>
  23
  24 /**
  25  * onenand_oob_64 - oob info for large (2KB) page
  26  */
  27 static struct nand_ecclayout onenand_oob_64 = {
  28         .eccbytes       = 20,
  29         .eccpos         = {
  30                 8, 9, 10, 11, 12,
  31                 24, 25, 26, 27, 28,
  32                 40, 41, 42, 43, 44,
  33                 56, 57, 58, 59, 60,
  34                 },
  35         .oobfree        = {
  36                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
  37                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
  38         }
  39 };
  40
  41 /**
  42  * onenand_oob_32 - oob info for middle (1KB) page
  43  */
  44 static struct nand_ecclayout onenand_oob_32 = {
  45         .eccbytes       = 10,
  46         .eccpos         = {
  47                 8, 9, 10, 11, 12,
  48                 24, 25, 26, 27, 28,
  49                 },
  50         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  51 };
  52
  53 static const unsigned char ffchars[] = {
  54         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  55         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  56         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  57         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  58         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  62 };
  63
  64 /**
  65  * onenand_readw - [OneNAND Interface] Read OneNAND register
  66  * @param addr          address to read
  67  *
  68  * Read OneNAND register
  69  */
  70 static unsigned short onenand_readw(void __iomem *addr)
  71 {
  72         return readw(addr);
  73 }
  74
  75 /**
  76  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  77  * @param value         value to write
  78  * @param addr          address to write
  79  *
  80  * Write OneNAND register with value
  81  */
  82 static void onenand_writew(unsigned short value, void __iomem *addr)
  83 {
  84         writew(value, addr);
  85 }
  86
  87 /**
  88  * onenand_block_address - [DEFAULT] Get block address
  89  * @param this          onenand chip data structure
  90  * @param block         the block
  91  * @return              translated block address if DDP, otherwise same
  92  *
  93  * Setup Start Address 1 Register (F100h)
  94  */
  95 static int onenand_block_address(struct onenand_chip *this, int block)
  96 {
  97         if (this->device_id & ONENAND_DEVICE_IS_DDP) {
  98                 /* Device Flash Core select, NAND Flash Block Address */
  99                 int dfs = 0;
 100
 101                 if (block & this->density_mask)
 102                         dfs = 1;
 103
 104                 return (dfs << ONENAND_DDP_SHIFT) |
 105                         (block & (this->density_mask - 1));
 106         }
 107
 108         return block;
 109 }
 110
 111 /**
 112  * onenand_bufferram_address - [DEFAULT] Get bufferram address
 113  * @param this          onenand chip data structure
 114  * @param block         the block
 115  * @return              set DBS value if DDP, otherwise 0
 116  *
 117  * Setup Start Address 2 Register (F101h) for DDP
 118  */
 119 static int onenand_bufferram_address(struct onenand_chip *this, int block)
 120 {
 121         if (this->device_id & ONENAND_DEVICE_IS_DDP) {
 122                 /* Device BufferRAM Select */
 123                 int dbs = 0;
 124
 125                 if (block & this->density_mask)
 126                         dbs = 1;
 127
 128                 return (dbs << ONENAND_DDP_SHIFT);
 129         }
 130
 131         return 0;
 132 }
 133
 134 /**
 135  * onenand_page_address - [DEFAULT] Get page address
 136  * @param page          the page address
 137  * @param sector        the sector address
 138  * @return              combined page and sector address
 139  *
 140  * Setup Start Address 8 Register (F107h)
 141  */
 142 static int onenand_page_address(int page, int sector)
 143 {
 144         /* Flash Page Address, Flash Sector Address */
 145         int fpa, fsa;
 146
 147         fpa = page & ONENAND_FPA_MASK;
 148         fsa = sector & ONENAND_FSA_MASK;
 149
 150         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
 151 }
 152
 153 /**
 154  * onenand_buffer_address - [DEFAULT] Get buffer address
 155  * @param dataram1      DataRAM index
 156  * @param sectors       the sector address
 157  * @param count         the number of sectors
 158  * @return              the start buffer value
 159  *
 160  * Setup Start Buffer Register (F200h)
 161  */
 162 static int onenand_buffer_address(int dataram1, int sectors, int count)
 163 {
 164         int bsa, bsc;
 165
 166         /* BufferRAM Sector Address */
 167         bsa = sectors & ONENAND_BSA_MASK;
 168
 169         if (dataram1)
 170                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
 171         else
 172                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
 173
 174         /* BufferRAM Sector Count */
 175         bsc = count & ONENAND_BSC_MASK;
 176
 177         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
 178 }
 179
 180 /**
 181  * onenand_command - [DEFAULT] Send command to OneNAND device
 182  * @param mtd           MTD device structure
 183  * @param cmd           the command to be sent
 184  * @param addr          offset to read from or write to
 185  * @param len           number of bytes to read or write
 186  *
 187  * Send command to OneNAND device. This function is used for middle/large page
 188  * devices (1KB/2KB Bytes per page)
 189  */
 190 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
 191 {
 192         struct onenand_chip *this = mtd->priv;
 193         int value, readcmd = 0, block_cmd = 0;
 194         int block, page;
 195
 196         /* Address translation */
 197         switch (cmd) {
 198         case ONENAND_CMD_UNLOCK:
 199         case ONENAND_CMD_LOCK:
 200         case ONENAND_CMD_LOCK_TIGHT:
 201         case ONENAND_CMD_UNLOCK_ALL:
 202                 block = -1;
 203                 page = -1;
 204                 break;
 205
 206         case ONENAND_CMD_ERASE:
 207         case ONENAND_CMD_BUFFERRAM:
 208         case ONENAND_CMD_OTP_ACCESS:
 209                 block_cmd = 1;
 210                 block = (int) (addr >> this->erase_shift);
 211                 page = -1;
 212                 break;
 213
 214         default:
 215                 block = (int) (addr >> this->erase_shift);
 216                 page = (int) (addr >> this->page_shift);
 217                 page &= this->page_mask;
 218                 break;
 219         }
 220
 221         /* NOTE: The setting order of the registers is very important! */
 222         if (cmd == ONENAND_CMD_BUFFERRAM) {
 223                 /* Select DataRAM for DDP */
 224                 value = onenand_bufferram_address(this, block);
 225                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 226
 227                 /* Switch to the next data buffer */
 228                 ONENAND_SET_NEXT_BUFFERRAM(this);
 229
 230                 return 0;
 231         }
 232
 233         if (block != -1) {
 234                 /* Write 'DFS, FBA' of Flash */
 235                 value = onenand_block_address(this, block);
 236                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
 237
 238                 if (block_cmd) {
 239                         /* Select DataRAM for DDP */
 240                         value = onenand_bufferram_address(this, block);
 241                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 242                 }
 243         }
 244
 245         if (page != -1) {
 246                 /* Now we use page size operation */
 247                 int sectors = 4, count = 4;
 248                 int dataram;
 249
 250                 switch (cmd) {
 251                 case ONENAND_CMD_READ:
 252                 case ONENAND_CMD_READOOB:
 253                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
 254                         readcmd = 1;
 255                         break;
 256
 257                 default:
 258                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
 259                         break;
 260                 }
 261
 262                 /* Write 'FPA, FSA' of Flash */
 263                 value = onenand_page_address(page, sectors);
 264                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
 265
 266                 /* Write 'BSA, BSC' of DataRAM */
 267                 value = onenand_buffer_address(dataram, sectors, count);
 268                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
 269
 270                 if (readcmd) {
 271                         /* Select DataRAM for DDP */
 272                         value = onenand_bufferram_address(this, block);
 273                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 274                 }
 275         }
 276
 277         /* Interrupt clear */
 278         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
 279
 280         /* Write command */
 281         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
 282
 283         return 0;
 284 }
 285
 286 /**
 287  * onenand_wait - [DEFAULT] wait until the command is done
 288  * @param mtd           MTD device structure
 289  * @param state         state to select the max. timeout value
 290  *
 291  * Wait for command done. This applies to all OneNAND command
 292  * Read can take up to 30us, erase up to 2ms and program up to 350us
 293  * according to general OneNAND specs
 294  */
 295 static int onenand_wait(struct mtd_info *mtd, int state)
 296 {
 297         struct onenand_chip * this = mtd->priv;
 298         unsigned long timeout;
 299         unsigned int flags = ONENAND_INT_MASTER;
 300         unsigned int interrupt = 0;
 301         unsigned int ctrl;
 302
 303         /* The 20 msec is enough */
 304         timeout = jiffies + msecs_to_jiffies(20);
 305         while (time_before(jiffies, timeout)) {
 306                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 307
 308                 if (interrupt & flags)
 309                         break;
 310
 311                 if (state != FL_READING)
 312                         cond_resched();
 313         }
 314         /* To get correct interrupt status in timeout case */
 315         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 316
 317         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 318
 319         if (ctrl & ONENAND_CTRL_ERROR) {
 320                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
 321                 if (ctrl & ONENAND_CTRL_LOCK)
 322                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error.\n");
 323                 return ctrl;
 324         }
 325
 326         if (interrupt & ONENAND_INT_READ) {
 327                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 328                 if (ecc) {
 329                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
 330                         if (ecc & ONENAND_ECC_2BIT_ALL) {
 331                                 mtd->ecc_stats.failed++;
 332                                 return ecc;
 333                         } else if (ecc & ONENAND_ECC_1BIT_ALL)
 334                                 mtd->ecc_stats.corrected++;
 335                 }
 336         }
 337
 338         return 0;
 339 }
 340
 341 /*
 342  * onenand_interrupt - [DEFAULT] onenand interrupt handler
 343  * @param irq           onenand interrupt number
 344  * @param dev_id        interrupt data
 345  *
 346  * complete the work
 347  */
 348 static irqreturn_t onenand_interrupt(int irq, void *data)
 349 {
 350         struct onenand_chip *this = (struct onenand_chip *) data;
 351
 352         /* To handle shared interrupt */
 353         if (!this->complete.done)
 354                 complete(&this->complete);
 355
 356         return IRQ_HANDLED;
 357 }
 358
 359 /*
 360  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
 361  * @param mtd           MTD device structure
 362  * @param state         state to select the max. timeout value
 363  *
 364  * Wait for command done.
 365  */
 366 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
 367 {
 368         struct onenand_chip *this = mtd->priv;
 369
 370         wait_for_completion(&this->complete);
 371
 372         return onenand_wait(mtd, state);
 373 }
 374
 375 /*
 376  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
 377  * @param mtd           MTD device structure
 378  * @param state         state to select the max. timeout value
 379  *
 380  * Try interrupt based wait (It is used one-time)
 381  */
 382 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
 383 {
 384         struct onenand_chip *this = mtd->priv;
 385         unsigned long remain, timeout;
 386
 387         /* We use interrupt wait first */
 388         this->wait = onenand_interrupt_wait;
 389
 390         timeout = msecs_to_jiffies(100);
 391         remain = wait_for_completion_timeout(&this->complete, timeout);
 392         if (!remain) {
 393                 printk(KERN_INFO "OneNAND: There's no interrupt. "
 394                                 "We use the normal wait\n");
 395
 396                 /* Release the irq */
 397                 free_irq(this->irq, this);
 398
 399                 this->wait = onenand_wait;
 400         }
 401
 402         return onenand_wait(mtd, state);
 403 }
 404
 405 /*
 406  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
 407  * @param mtd           MTD device structure
 408  *
 409  * There's two method to wait onenand work
 410  * 1. polling - read interrupt status register
 411  * 2. interrupt - use the kernel interrupt method
 412  */
 413 static void onenand_setup_wait(struct mtd_info *mtd)
 414 {
 415         struct onenand_chip *this = mtd->priv;
 416         int syscfg;
 417
 418         init_completion(&this->complete);
 419
 420         if (this->irq <= 0) {
 421                 this->wait = onenand_wait;
 422                 return;
 423         }
 424
 425         if (request_irq(this->irq, &onenand_interrupt,
 426                                 IRQF_SHARED, "onenand", this)) {
 427                 /* If we can't get irq, use the normal wait */
 428                 this->wait = onenand_wait;
 429                 return;
 430         }
 431
 432         /* Enable interrupt */
 433         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
 434         syscfg |= ONENAND_SYS_CFG1_IOBE;
 435         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
 436
 437         this->wait = onenand_try_interrupt_wait;
 438 }
 439
 440 /**
 441  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
 442  * @param mtd           MTD data structure
 443  * @param area          BufferRAM area
 444  * @return              offset given area
 445  *
 446  * Return BufferRAM offset given area
 447  */
 448 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
 449 {
 450         struct onenand_chip *this = mtd->priv;
 451
 452         if (ONENAND_CURRENT_BUFFERRAM(this)) {
 453                 if (area == ONENAND_DATARAM)
 454                         return mtd->writesize;
 455                 if (area == ONENAND_SPARERAM)
 456                         return mtd->oobsize;
 457         }
 458
 459         return 0;
 460 }
 461
 462 /**
 463  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
 464  * @param mtd           MTD data structure
 465  * @param area          BufferRAM area
 466  * @param buffer        the databuffer to put/get data
 467  * @param offset        offset to read from or write to
 468  * @param count         number of bytes to read/write
 469  *
 470  * Read the BufferRAM area
 471  */
 472 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 473                 unsigned char *buffer, int offset, size_t count)
 474 {
 475         struct onenand_chip *this = mtd->priv;
 476         void __iomem *bufferram;
 477
 478         bufferram = this->base + area;
 479
 480         bufferram += onenand_bufferram_offset(mtd, area);
 481
 482         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 483                 unsigned short word;
 484
 485                 /* Align with word(16-bit) size */
 486                 count--;
 487
 488                 /* Read word and save byte */
 489                 word = this->read_word(bufferram + offset + count);
 490                 buffer[count] = (word & 0xff);
 491         }
 492
 493         memcpy(buffer, bufferram + offset, count);
 494
 495         return 0;
 496 }
 497
 498 /**
 499  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
 500  * @param mtd           MTD data structure
 501  * @param area          BufferRAM area
 502  * @param buffer        the databuffer to put/get data
 503  * @param offset        offset to read from or write to
 504  * @param count         number of bytes to read/write
 505  *
 506  * Read the BufferRAM area with Sync. Burst Mode
 507  */
 508 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 509                 unsigned char *buffer, int offset, size_t count)
 510 {
 511         struct onenand_chip *this = mtd->priv;
 512         void __iomem *bufferram;
 513
 514         bufferram = this->base + area;
 515
 516         bufferram += onenand_bufferram_offset(mtd, area);
 517
 518         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 519
 520         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 521                 unsigned short word;
 522
 523                 /* Align with word(16-bit) size */
 524                 count--;
 525
 526                 /* Read word and save byte */
 527                 word = this->read_word(bufferram + offset + count);
 528                 buffer[count] = (word & 0xff);
 529         }
 530
 531         memcpy(buffer, bufferram + offset, count);
 532
 533         this->mmcontrol(mtd, 0);
 534
 535         return 0;
 536 }
 537
 538 /**
 539  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
 540  * @param mtd           MTD data structure
 541  * @param area          BufferRAM area
 542  * @param buffer        the databuffer to put/get data
 543  * @param offset        offset to read from or write to
 544  * @param count         number of bytes to read/write
 545  *
 546  * Write the BufferRAM area
 547  */
 548 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 549                 const unsigned char *buffer, int offset, size_t count)
 550 {
 551         struct onenand_chip *this = mtd->priv;
 552         void __iomem *bufferram;
 553
 554         bufferram = this->base + area;
 555
 556         bufferram += onenand_bufferram_offset(mtd, area);
 557
 558         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 559                 unsigned short word;
 560                 int byte_offset;
 561
 562                 /* Align with word(16-bit) size */
 563                 count--;
 564
 565                 /* Calculate byte access offset */
 566                 byte_offset = offset + count;
 567
 568                 /* Read word and save byte */
 569                 word = this->read_word(bufferram + byte_offset);
 570                 word = (word & ~0xff) | buffer[count];
 571                 this->write_word(word, bufferram + byte_offset);
 572         }
 573
 574         memcpy(bufferram + offset, buffer, count);
 575
 576         return 0;
 577 }
 578
 579 /**
 580  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
 581  * @param mtd           MTD data structure
 582  * @param addr          address to check
 583  * @return              1 if there are valid data, otherwise 0
 584  *
 585  * Check bufferram if there is data we required
 586  */
 587 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 588 {
 589         struct onenand_chip *this = mtd->priv;
 590         int block, page;
 591         int i;
 592
 593         block = (int) (addr >> this->erase_shift);
 594         page = (int) (addr >> this->page_shift);
 595         page &= this->page_mask;
 596
 597         i = ONENAND_CURRENT_BUFFERRAM(this);
 598
 599         /* Is there valid data? */
 600         if (this->bufferram[i].block == block &&
 601             this->bufferram[i].page == page &&
 602             this->bufferram[i].valid)
 603                 return 1;
 604
 605         return 0;
 606 }
 607
 608 /**
 609  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
 610  * @param mtd           MTD data structure
 611  * @param addr          address to update
 612  * @param valid         valid flag
 613  *
 614  * Update BufferRAM information
 615  */
 616 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
 617                 int valid)
 618 {
 619         struct onenand_chip *this = mtd->priv;
 620         int block, page;
 621         int i;
 622
 623         block = (int) (addr >> this->erase_shift);
 624         page = (int) (addr >> this->page_shift);
 625         page &= this->page_mask;
 626
 627         /* Invalidate BufferRAM */
 628         for (i = 0; i < MAX_BUFFERRAM; i++) {
 629                 if (this->bufferram[i].block == block &&
 630                     this->bufferram[i].page == page)
 631                         this->bufferram[i].valid = 0;
 632         }
 633
 634         /* Update BufferRAM */
 635         i = ONENAND_CURRENT_BUFFERRAM(this);
 636         this->bufferram[i].block = block;
 637         this->bufferram[i].page = page;
 638         this->bufferram[i].valid = valid;
 639
 640         return 0;
 641 }
 642
 643 /**
 644  * onenand_get_device - [GENERIC] Get chip for selected access
 645  * @param mtd           MTD device structure
 646  * @param new_state     the state which is requested
 647  *
 648  * Get the device and lock it for exclusive access
 649  */
 650 static int onenand_get_device(struct mtd_info *mtd, int new_state)
 651 {
 652         struct onenand_chip *this = mtd->priv;
 653         DECLARE_WAITQUEUE(wait, current);
 654
 655         /*
 656          * Grab the lock and see if the device is available
 657          */
 658         while (1) {
 659                 spin_lock(&this->chip_lock);
 660                 if (this->state == FL_READY) {
 661                         this->state = new_state;
 662                         spin_unlock(&this->chip_lock);
 663                         break;
 664                 }
 665                 if (new_state == FL_PM_SUSPENDED) {
 666                         spin_unlock(&this->chip_lock);
 667                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
 668                 }
 669                 set_current_state(TASK_UNINTERRUPTIBLE);
 670                 add_wait_queue(&this->wq, &wait);
 671                 spin_unlock(&this->chip_lock);
 672                 schedule();
 673                 remove_wait_queue(&this->wq, &wait);
 674         }
 675
 676         return 0;
 677 }
 678
 679 /**
 680  * onenand_release_device - [GENERIC] release chip
 681  * @param mtd           MTD device structure
 682  *
 683  * Deselect, release chip lock and wake up anyone waiting on the device
 684  */
 685 static void onenand_release_device(struct mtd_info *mtd)
 686 {
 687         struct onenand_chip *this = mtd->priv;
 688
 689         /* Release the chip */
 690         spin_lock(&this->chip_lock);
 691         this->state = FL_READY;
 692         wake_up(&this->wq);
 693         spin_unlock(&this->chip_lock);
 694 }
 695
 696 /**
 697  * onenand_read - [MTD Interface] Read data from flash
 698  * @param mtd           MTD device structure
 699  * @param from          offset to read from
 700  * @param len           number of bytes to read
 701  * @param retlen        pointer to variable to store the number of read bytes
 702  * @param buf           the databuffer to put data
 703  *
 704  * Read with ecc
 705 */
 706 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
 707         size_t *retlen, u_char *buf)
 708 {
 709         struct onenand_chip *this = mtd->priv;
 710         struct mtd_ecc_stats stats;
 711         int read = 0, column;
 712         int thislen;
 713         int ret = 0, boundary = 0;
 714
 715         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 716
 717         /* Do not allow reads past end of device */
 718         if ((from + len) > mtd->size) {
 719                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
 720                 *retlen = 0;
 721                 return -EINVAL;
 722         }
 723
 724         /* Grab the lock and see if the device is available */
 725         onenand_get_device(mtd, FL_READING);
 726
 727         /* TODO handling oob */
 728
 729         stats = mtd->ecc_stats;
 730
 731         /* Read-while-load method */
 732
 733         /* Do first load to bufferRAM */
 734         if (read < len) {
 735                 if (!onenand_check_bufferram(mtd, from)) {
 736                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
 737                         ret = this->wait(mtd, FL_READING);
 738                         onenand_update_bufferram(mtd, from, !ret);
 739                 }
 740         }
 741
 742         thislen = min_t(int, mtd->writesize, len - read);
 743         column = from & (mtd->writesize - 1);
 744         if (column + thislen > mtd->writesize)
 745                 thislen = mtd->writesize - column;
 746
 747         while (!ret) {
 748                 /* If there is more to load then start next load */
 749                 from += thislen;
 750                 if (read + thislen < len) {
 751                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
 752                         /*
 753                          * Chip boundary handling in DDP
 754                          * Now we issued chip 1 read and pointed chip 1
 755                          * bufferam so we have to point chip 0 bufferam.
 756                          */
 757                         if (this->device_id & ONENAND_DEVICE_IS_DDP &&
 758                                         unlikely(from == (this->chipsize >> 1))) {
 759                                 this->write_word(0, this->base + ONENAND_REG_START_ADDRESS2);
 760                                 boundary = 1;
 761                         } else
 762                                 boundary = 0;
 763                         ONENAND_SET_PREV_BUFFERRAM(this);
 764                 }
 765                 /* While load is going, read from last bufferRAM */
 766                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
 767                 /* See if we are done */
 768                 read += thislen;
 769                 if (read == len)
 770                         break;
 771                 /* Set up for next read from bufferRAM */
 772                 if (unlikely(boundary))
 773                         this->write_word(0x8000, this->base + ONENAND_REG_START_ADDRESS2);
 774                 ONENAND_SET_NEXT_BUFFERRAM(this);
 775                 buf += thislen;
 776                 thislen = min_t(int, mtd->writesize, len - read);
 777                 column = 0;
 778                 cond_resched();
 779                 /* Now wait for load */
 780                 ret = this->wait(mtd, FL_READING);
 781                 onenand_update_bufferram(mtd, from, !ret);
 782         }
 783
 784         /* Deselect and wake up anyone waiting on the device */
 785         onenand_release_device(mtd);
 786
 787         /*
 788          * Return success, if no ECC failures, else -EBADMSG
 789          * fs driver will take care of that, because
 790          * retlen == desired len and result == -EBADMSG
 791          */
 792         *retlen = read;
 793
 794         if (mtd->ecc_stats.failed - stats.failed)
 795                 return -EBADMSG;
 796
 797         if (ret)
 798                 return ret;
 799
 800         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
 801 }
 802
 803 /**
 804  * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
 805  * @param mtd           MTD device structure
 806  * @param from          offset to read from
 807  * @param len           number of bytes to read
 808  * @param retlen        pointer to variable to store the number of read bytes
 809  * @param buf           the databuffer to put data
 810  *
 811  * OneNAND read out-of-band data from the spare area
 812  */
 813 int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
 814                         size_t *retlen, u_char *buf)
 815 {
 816         struct onenand_chip *this = mtd->priv;
 817         int read = 0, thislen, column;
 818         int ret = 0;
 819
 820         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 821
 822         /* Initialize return length value */
 823         *retlen = 0;
 824
 825         /* Do not allow reads past end of device */
 826         if (unlikely((from + len) > mtd->size)) {
 827                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
 828                 return -EINVAL;
 829         }
 830
 831         /* Grab the lock and see if the device is available */
 832         onenand_get_device(mtd, FL_READING);
 833
 834         column = from & (mtd->oobsize - 1);
 835
 836         while (read < len) {
 837                 cond_resched();
 838
 839                 thislen = mtd->oobsize - column;
 840                 thislen = min_t(int, thislen, len);
 841
 842                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
 843
 844                 onenand_update_bufferram(mtd, from, 0);
 845
 846                 ret = this->wait(mtd, FL_READING);
 847                 /* First copy data and check return value for ECC handling */
 848
 849                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
 850
 851                 if (ret) {
 852                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = 0x%x\n", ret);
 853                         goto out;
 854                 }
 855
 856                 read += thislen;
 857
 858                 if (read == len)
 859                         break;
 860
 861                 buf += thislen;
 862
 863                 /* Read more? */
 864                 if (read < len) {
 865                         /* Page size */
 866                         from += mtd->writesize;
 867                         column = 0;
 868                 }
 869         }
 870
 871 out:
 872         /* Deselect and wake up anyone waiting on the device */
 873         onenand_release_device(mtd);
 874
 875         *retlen = read;
 876         return ret;
 877 }
 878
 879 /**
 880  * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
 881  * @mtd:        MTD device structure
 882  * @from:       offset to read from
 883  * @ops:        oob operation description structure
 884  */
 885 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
 886                             struct mtd_oob_ops *ops)
 887 {
 888         BUG_ON(ops->mode != MTD_OOB_PLACE);
 889
 890         return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
 891                                    &ops->oobretlen, ops->oobbuf);
 892 }
 893
 894 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
 895 /**
 896  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
 897  * @param mtd           MTD device structure
 898  * @param buf           the databuffer to verify
 899  * @param to            offset to read from
 900  * @param len           number of bytes to read and compare
 901  *
 902  */
 903 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len)
 904 {
 905         struct onenand_chip *this = mtd->priv;
 906         char *readp = this->page_buf;
 907         int column = to & (mtd->oobsize - 1);
 908         int status, i;
 909
 910         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
 911         onenand_update_bufferram(mtd, to, 0);
 912         status = this->wait(mtd, FL_READING);
 913         if (status)
 914                 return status;
 915
 916         this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len);
 917
 918         for(i = 0; i < len; i++)
 919                 if (buf[i] != 0xFF && buf[i] != readp[i])
 920                         return -EBADMSG;
 921
 922         return 0;
 923 }
 924
 925 /**
 926  * onenand_verify_page - [GENERIC] verify the chip contents after a write
 927  * @param mtd           MTD device structure
 928  * @param buf           the databuffer to verify
 929  *
 930  * Check DataRAM area directly
 931  */
 932 static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
 933 {
 934         struct onenand_chip *this = mtd->priv;
 935         void __iomem *dataram0, *dataram1;
 936         int ret = 0;
 937
 938         /* In partial page write, just skip it */
 939         if ((addr & (mtd->writesize - 1)) != 0)
 940                 return 0;
 941
 942         this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
 943
 944         ret = this->wait(mtd, FL_READING);
 945         if (ret)
 946                 return ret;
 947
 948         onenand_update_bufferram(mtd, addr, 1);
 949
 950         /* Check, if the two dataram areas are same */
 951         dataram0 = this->base + ONENAND_DATARAM;
 952         dataram1 = dataram0 + mtd->writesize;
 953
 954         if (memcmp(dataram0, dataram1, mtd->writesize))
 955                 return -EBADMSG;
 956
 957         return 0;
 958 }
 959 #else
 960 #define onenand_verify_page(...)        (0)
 961 #define onenand_verify_oob(...)         (0)
 962 #endif
 963
 964 #define NOTALIGNED(x)   ((x & (this->subpagesize - 1)) != 0)
 965
 966 /**
 967  * onenand_write - [MTD Interface] write buffer to FLASH
 968  * @param mtd           MTD device structure
 969  * @param to            offset to write to
 970  * @param len           number of bytes to write
 971  * @param retlen        pointer to variable to store the number of written bytes
 972  * @param buf           the data to write
 973  *
 974  * Write with ECC
 975  */
 976 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
 977         size_t *retlen, const u_char *buf)
 978 {
 979         struct onenand_chip *this = mtd->priv;
 980         int written = 0;
 981         int ret = 0;
 982         int column, subpage;
 983
 984         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
 985
 986         /* Initialize retlen, in case of early exit */
 987         *retlen = 0;
 988
 989         /* Do not allow writes past end of device */
 990         if (unlikely((to + len) > mtd->size)) {
 991                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
 992                 return -EINVAL;
 993         }
 994
 995         /* Reject writes, which are not page aligned */
 996         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
 997                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
 998                 return -EINVAL;
 999         }
1000
1001         column = to & (mtd->writesize - 1);
1002         subpage = column || (len & (mtd->writesize - 1));
1003
1004         /* Grab the lock and see if the device is available */
1005         onenand_get_device(mtd, FL_WRITING);
1006
1007         /* Loop until all data write */
1008         while (written < len) {
1009                 int bytes = mtd->writesize;
1010                 int thislen = min_t(int, bytes, len - written);
1011                 u_char *wbuf = (u_char *) buf;
1012
1013                 cond_resched();
1014
1015                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, bytes);
1016
1017                 /* Partial page write */
1018                 if (subpage) {
1019                         bytes = min_t(int, bytes - column, (int) len);
1020                         memset(this->page_buf, 0xff, mtd->writesize);
1021                         memcpy(this->page_buf + column, buf, bytes);
1022                         wbuf = this->page_buf;
1023                         /* Even though partial write, we need page size */
1024                         thislen = mtd->writesize;
1025                 }
1026
1027                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, thislen);
1028                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1029
1030                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1031
1032                 /* In partial page write we don't update bufferram */
1033                 onenand_update_bufferram(mtd, to, !subpage);
1034
1035                 ret = this->wait(mtd, FL_WRITING);
1036                 if (ret) {
1037                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
1038                         break;
1039                 }
1040
1041                 /* Only check verify write turn on */
1042                 ret = onenand_verify_page(mtd, (u_char *) wbuf, to);
1043                 if (ret) {
1044                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
1045                         break;
1046                 }
1047
1048                 written += thislen;
1049
1050                 if (written == len)
1051                         break;
1052
1053                 column = 0;
1054                 to += thislen;
1055                 buf += thislen;
1056         }
1057
1058         /* Deselect and wake up anyone waiting on the device */
1059         onenand_release_device(mtd);
1060
1061         *retlen = written;
1062
1063         return ret;
1064 }
1065
1066 /**
1067  * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1068  * @param mtd           MTD device structure
1069  * @param to            offset to write to
1070  * @param len           number of bytes to write
1071  * @param retlen        pointer to variable to store the number of written bytes
1072  * @param buf           the data to write
1073  *
1074  * OneNAND write out-of-band
1075  */
1076 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1077                                 size_t *retlen, const u_char *buf)
1078 {
1079         struct onenand_chip *this = mtd->priv;
1080         int column, ret = 0;
1081         int written = 0;
1082
1083         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1084
1085         /* Initialize retlen, in case of early exit */
1086         *retlen = 0;
1087
1088         /* Do not allow writes past end of device */
1089         if (unlikely((to + len) > mtd->size)) {
1090                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
1091                 return -EINVAL;
1092         }
1093
1094         /* Grab the lock and see if the device is available */
1095         onenand_get_device(mtd, FL_WRITING);
1096
1097         /* Loop until all data write */
1098         while (written < len) {
1099                 int thislen = min_t(int, mtd->oobsize, len - written);
1100
1101                 cond_resched();
1102
1103                 column = to & (mtd->oobsize - 1);
1104
1105                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1106
1107                 /* We send data to spare ram with oobsize
1108                  * to prevent byte access */
1109                 memset(this->page_buf, 0xff, mtd->oobsize);
1110                 memcpy(this->page_buf + column, buf, thislen);
1111                 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
1112
1113                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1114
1115                 onenand_update_bufferram(mtd, to, 0);
1116
1117                 ret = this->wait(mtd, FL_WRITING);
1118                 if (ret) {
1119                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret);
1120                         goto out;
1121                 }
1122
1123                 ret = onenand_verify_oob(mtd, buf, to, thislen);
1124                 if (ret) {
1125                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
1126                         goto out;
1127                 }
1128
1129                 written += thislen;
1130
1131                 if (written == len)
1132                         break;
1133
1134                 to += thislen;
1135                 buf += thislen;
1136         }
1137
1138 out:
1139         /* Deselect and wake up anyone waiting on the device */
1140         onenand_release_device(mtd);
1141
1142         *retlen = written;
1143
1144         return ret;
1145 }
1146
1147 /**
1148  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1149  * @mtd:        MTD device structure
1150  * @from:       offset to read from
1151  * @ops:        oob operation description structure
1152  */
1153 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1154                              struct mtd_oob_ops *ops)
1155 {
1156         BUG_ON(ops->mode != MTD_OOB_PLACE);
1157
1158         return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
1159                                     &ops->oobretlen, ops->oobbuf);
1160 }
1161
1162 /**
1163  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1164  * @param mtd           MTD device structure
1165  * @param ofs           offset from device start
1166  * @param getchip       0, if the chip is already selected
1167  * @param allowbbt      1, if its allowed to access the bbt area
1168  *
1169  * Check, if the block is bad. Either by reading the bad block table or
1170  * calling of the scan function.
1171  */
1172 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1173 {
1174         struct onenand_chip *this = mtd->priv;
1175         struct bbm_info *bbm = this->bbm;
1176
1177         /* Return info from the table */
1178         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1179 }
1180
1181 /**
1182  * onenand_erase - [MTD Interface] erase block(s)
1183  * @param mtd           MTD device structure
1184  * @param instr         erase instruction
1185  *
1186  * Erase one ore more blocks
1187  */
1188 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1189 {
1190         struct onenand_chip *this = mtd->priv;
1191         unsigned int block_size;
1192         loff_t addr;
1193         int len;
1194         int ret = 0;
1195
1196         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1197
1198         block_size = (1 << this->erase_shift);
1199
1200         /* Start address must align on block boundary */
1201         if (unlikely(instr->addr & (block_size - 1))) {
1202                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1203                 return -EINVAL;
1204         }
1205
1206         /* Length must align on block boundary */
1207         if (unlikely(instr->len & (block_size - 1))) {
1208                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1209                 return -EINVAL;
1210         }
1211
1212         /* Do not allow erase past end of device */
1213         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1214                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1215                 return -EINVAL;
1216         }
1217
1218         instr->fail_addr = 0xffffffff;
1219
1220         /* Grab the lock and see if the device is available */
1221         onenand_get_device(mtd, FL_ERASING);
1222
1223         /* Loop throught the pages */
1224         len = instr->len;
1225         addr = instr->addr;
1226
1227         instr->state = MTD_ERASING;
1228
1229         while (len) {
1230                 cond_resched();
1231
1232                 /* Check if we have a bad block, we do not erase bad blocks */
1233                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1234                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1235                         instr->state = MTD_ERASE_FAILED;
1236                         goto erase_exit;
1237                 }
1238
1239                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1240
1241                 ret = this->wait(mtd, FL_ERASING);
1242                 /* Check, if it is write protected */
1243                 if (ret) {
1244                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1245                         instr->state = MTD_ERASE_FAILED;
1246                         instr->fail_addr = addr;
1247                         goto erase_exit;
1248                 }
1249
1250                 len -= block_size;
1251                 addr += block_size;
1252         }
1253
1254         instr->state = MTD_ERASE_DONE;
1255
1256 erase_exit:
1257
1258         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1259         /* Do call back function */
1260         if (!ret)
1261                 mtd_erase_callback(instr);
1262
1263         /* Deselect and wake up anyone waiting on the device */
1264         onenand_release_device(mtd);
1265
1266         return ret;
1267 }
1268
1269 /**
1270  * onenand_sync - [MTD Interface] sync
1271  * @param mtd           MTD device structure
1272  *
1273  * Sync is actually a wait for chip ready function
1274  */
1275 static void onenand_sync(struct mtd_info *mtd)
1276 {
1277         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1278
1279         /* Grab the lock and see if the device is available */
1280         onenand_get_device(mtd, FL_SYNCING);
1281
1282         /* Release it and go back */
1283         onenand_release_device(mtd);
1284 }
1285
1286 /**
1287  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1288  * @param mtd           MTD device structure
1289  * @param ofs           offset relative to mtd start
1290  *
1291  * Check whether the block is bad
1292  */
1293 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1294 {
1295         /* Check for invalid offset */
1296         if (ofs > mtd->size)
1297                 return -EINVAL;
1298
1299         return onenand_block_checkbad(mtd, ofs, 1, 0);
1300 }
1301
1302 /**
1303  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1304  * @param mtd           MTD device structure
1305  * @param ofs           offset from device start
1306  *
1307  * This is the default implementation, which can be overridden by
1308  * a hardware specific driver.
1309  */
1310 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1311 {
1312         struct onenand_chip *this = mtd->priv;
1313         struct bbm_info *bbm = this->bbm;
1314         u_char buf[2] = {0, 0};
1315         size_t retlen;
1316         int block;
1317
1318         /* Get block number */
1319         block = ((int) ofs) >> bbm->bbt_erase_shift;
1320         if (bbm->bbt)
1321                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1322
1323         /* We write two bytes, so we dont have to mess with 16 bit access */
1324         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1325         return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf);
1326 }
1327
1328 /**
1329  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1330  * @param mtd           MTD device structure
1331  * @param ofs           offset relative to mtd start
1332  *
1333  * Mark the block as bad
1334  */
1335 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1336 {
1337         struct onenand_chip *this = mtd->priv;
1338         int ret;
1339
1340         ret = onenand_block_isbad(mtd, ofs);
1341         if (ret) {
1342                 /* If it was bad already, return success and do nothing */
1343                 if (ret > 0)
1344                         return 0;
1345                 return ret;
1346         }
1347
1348         return this->block_markbad(mtd, ofs);
1349 }
1350
1351 /**
1352  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1353  * @param mtd           MTD device structure
1354  * @param ofs           offset relative to mtd start
1355  * @param len           number of bytes to lock or unlock
1356  *
1357  * Lock or unlock one or more blocks
1358  */
1359 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1360 {
1361         struct onenand_chip *this = mtd->priv;
1362         int start, end, block, value, status;
1363         int wp_status_mask;
1364
1365         start = ofs >> this->erase_shift;
1366         end = len >> this->erase_shift;
1367
1368         if (cmd == ONENAND_CMD_LOCK)
1369                 wp_status_mask = ONENAND_WP_LS;
1370         else
1371                 wp_status_mask = ONENAND_WP_US;
1372
1373         /* Continuous lock scheme */
1374         if (this->options & ONENAND_HAS_CONT_LOCK) {
1375                 /* Set start block address */
1376                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1377                 /* Set end block address */
1378                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1379                 /* Write lock command */
1380                 this->command(mtd, cmd, 0, 0);
1381
1382                 /* There's no return value */
1383                 this->wait(mtd, FL_LOCKING);
1384
1385                 /* Sanity check */
1386                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1387                     & ONENAND_CTRL_ONGO)
1388                         continue;
1389
1390                 /* Check lock status */
1391                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1392                 if (!(status & wp_status_mask))
1393                         printk(KERN_ERR "wp status = 0x%x\n", status);
1394
1395                 return 0;
1396         }
1397
1398         /* Block lock scheme */
1399         for (block = start; block < start + end; block++) {
1400                 /* Set block address */
1401                 value = onenand_block_address(this, block);
1402                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1403                 /* Select DataRAM for DDP */
1404                 value = onenand_bufferram_address(this, block);
1405                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1406                 /* Set start block address */
1407                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1408                 /* Write lock command */
1409                 this->command(mtd, cmd, 0, 0);
1410
1411                 /* There's no return value */
1412                 this->wait(mtd, FL_LOCKING);
1413
1414                 /* Sanity check */
1415                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1416                     & ONENAND_CTRL_ONGO)
1417                         continue;
1418
1419                 /* Check lock status */
1420                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1421                 if (!(status & wp_status_mask))
1422                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1423         }
1424
1425         return 0;
1426 }
1427
1428 /**
1429  * onenand_lock - [MTD Interface] Lock block(s)
1430  * @param mtd           MTD device structure
1431  * @param ofs           offset relative to mtd start
1432  * @param len           number of bytes to unlock
1433  *
1434  * Lock one or more blocks
1435  */
1436 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1437 {
1438         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1439 }
1440
1441 /**
1442  * onenand_unlock - [MTD Interface] Unlock block(s)
1443  * @param mtd           MTD device structure
1444  * @param ofs           offset relative to mtd start
1445  * @param len           number of bytes to unlock
1446  *
1447  * Unlock one or more blocks
1448  */
1449 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1450 {
1451         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1452 }
1453
1454 /**
1455  * onenand_check_lock_status - [OneNAND Interface] Check lock status
1456  * @param this          onenand chip data structure
1457  *
1458  * Check lock status
1459  */
1460 static void onenand_check_lock_status(struct onenand_chip *this)
1461 {
1462         unsigned int value, block, status;
1463         unsigned int end;
1464
1465         end = this->chipsize >> this->erase_shift;
1466         for (block = 0; block < end; block++) {
1467                 /* Set block address */
1468                 value = onenand_block_address(this, block);
1469                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1470                 /* Select DataRAM for DDP */
1471                 value = onenand_bufferram_address(this, block);
1472                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1473                 /* Set start block address */
1474                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1475
1476                 /* Check lock status */
1477                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1478                 if (!(status & ONENAND_WP_US))
1479                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1480         }
1481 }
1482
1483 /**
1484  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1485  * @param mtd           MTD device structure
1486  *
1487  * Unlock all blocks
1488  */
1489 static int onenand_unlock_all(struct mtd_info *mtd)
1490 {
1491         struct onenand_chip *this = mtd->priv;
1492
1493         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1494                 /* Write unlock command */
1495                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1496
1497                 /* There's no return value */
1498                 this->wait(mtd, FL_LOCKING);
1499
1500                 /* Sanity check */
1501                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1502                     & ONENAND_CTRL_ONGO)
1503                         continue;
1504
1505                 /* Workaround for all block unlock in DDP */
1506                 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
1507                         loff_t ofs;
1508                         size_t len;
1509
1510                         /* 1st block on another chip */
1511                         ofs = this->chipsize >> 1;
1512                         len = 1 << this->erase_shift;
1513
1514                         onenand_unlock(mtd, ofs, len);
1515                 }
1516
1517                 onenand_check_lock_status(this);
1518
1519                 return 0;
1520         }
1521
1522         onenand_unlock(mtd, 0x0, this->chipsize);
1523
1524         return 0;
1525 }
1526
1527 #ifdef CONFIG_MTD_ONENAND_OTP
1528
1529 /* Interal OTP operation */
1530 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1531                 size_t *retlen, u_char *buf);
1532
1533 /**
1534  * do_otp_read - [DEFAULT] Read OTP block area
1535  * @param mtd           MTD device structure
1536  * @param from          The offset to read
1537  * @param len           number of bytes to read
1538  * @param retlen        pointer to variable to store the number of readbytes
1539  * @param buf           the databuffer to put/get data
1540  *
1541  * Read OTP block area.
1542  */
1543 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1544                 size_t *retlen, u_char *buf)
1545 {
1546         struct onenand_chip *this = mtd->priv;
1547         int ret;
1548
1549         /* Enter OTP access mode */
1550         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1551         this->wait(mtd, FL_OTPING);
1552
1553         ret = mtd->read(mtd, from, len, retlen, buf);
1554
1555         /* Exit OTP access mode */
1556         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1557         this->wait(mtd, FL_RESETING);
1558
1559         return ret;
1560 }
1561
1562 /**
1563  * do_otp_write - [DEFAULT] Write OTP block area
1564  * @param mtd           MTD device structure
1565  * @param from          The offset to write
1566  * @param len           number of bytes to write
1567  * @param retlen        pointer to variable to store the number of write bytes
1568  * @param buf           the databuffer to put/get data
1569  *
1570  * Write OTP block area.
1571  */
1572 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1573                 size_t *retlen, u_char *buf)
1574 {
1575         struct onenand_chip *this = mtd->priv;
1576         unsigned char *pbuf = buf;
1577         int ret;
1578
1579         /* Force buffer page aligned */
1580         if (len < mtd->writesize) {
1581                 memcpy(this->page_buf, buf, len);
1582                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1583                 pbuf = this->page_buf;
1584                 len = mtd->writesize;
1585         }
1586
1587         /* Enter OTP access mode */
1588         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1589         this->wait(mtd, FL_OTPING);
1590
1591         ret = mtd->write(mtd, from, len, retlen, pbuf);
1592
1593         /* Exit OTP access mode */
1594         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1595         this->wait(mtd, FL_RESETING);
1596
1597         return ret;
1598 }
1599
1600 /**
1601  * do_otp_lock - [DEFAULT] Lock OTP block area
1602  * @param mtd           MTD device structure
1603  * @param from          The offset to lock
1604  * @param len           number of bytes to lock
1605  * @param retlen        pointer to variable to store the number of lock bytes
1606  * @param buf           the databuffer to put/get data
1607  *
1608  * Lock OTP block area.
1609  */
1610 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1611                 size_t *retlen, u_char *buf)
1612 {
1613         struct onenand_chip *this = mtd->priv;
1614         int ret;
1615
1616         /* Enter OTP access mode */
1617         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1618         this->wait(mtd, FL_OTPING);
1619
1620         ret = onenand_do_write_oob(mtd, from, len, retlen, buf);
1621
1622         /* Exit OTP access mode */
1623         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1624         this->wait(mtd, FL_RESETING);
1625
1626         return ret;
1627 }
1628
1629 /**
1630  * onenand_otp_walk - [DEFAULT] Handle OTP operation
1631  * @param mtd           MTD device structure
1632  * @param from          The offset to read/write
1633  * @param len           number of bytes to read/write
1634  * @param retlen        pointer to variable to store the number of read bytes
1635  * @param buf           the databuffer to put/get data
1636  * @param action        do given action
1637  * @param mode          specify user and factory
1638  *
1639  * Handle OTP operation.
1640  */
1641 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1642                         size_t *retlen, u_char *buf,
1643                         otp_op_t action, int mode)
1644 {
1645         struct onenand_chip *this = mtd->priv;
1646         int otp_pages;
1647         int density;
1648         int ret = 0;
1649
1650         *retlen = 0;
1651
1652         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1653         if (density < ONENAND_DEVICE_DENSITY_512Mb)
1654                 otp_pages = 20;
1655         else
1656                 otp_pages = 10;
1657
1658         if (mode == MTD_OTP_FACTORY) {
1659                 from += mtd->writesize * otp_pages;
1660                 otp_pages = 64 - otp_pages;
1661         }
1662
1663         /* Check User/Factory boundary */
1664         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1665                 return 0;
1666
1667         while (len > 0 && otp_pages > 0) {
1668                 if (!action) {  /* OTP Info functions */
1669                         struct otp_info *otpinfo;
1670
1671                         len -= sizeof(struct otp_info);
1672                         if (len <= 0)
1673                                 return -ENOSPC;
1674
1675                         otpinfo = (struct otp_info *) buf;
1676                         otpinfo->start = from;
1677                         otpinfo->length = mtd->writesize;
1678                         otpinfo->locked = 0;
1679
1680                         from += mtd->writesize;
1681                         buf += sizeof(struct otp_info);
1682                         *retlen += sizeof(struct otp_info);
1683                 } else {
1684                         size_t tmp_retlen;
1685                         int size = len;
1686
1687                         ret = action(mtd, from, len, &tmp_retlen, buf);
1688
1689                         buf += size;
1690                         len -= size;
1691                         *retlen += size;
1692
1693                         if (ret < 0)
1694                                 return ret;
1695                 }
1696                 otp_pages--;
1697         }
1698
1699         return 0;
1700 }
1701
1702 /**
1703  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1704  * @param mtd           MTD device structure
1705  * @param buf           the databuffer to put/get data
1706  * @param len           number of bytes to read
1707  *
1708  * Read factory OTP info.
1709  */
1710 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1711                         struct otp_info *buf, size_t len)
1712 {
1713         size_t retlen;
1714         int ret;
1715
1716         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1717
1718         return ret ? : retlen;
1719 }
1720
1721 /**
1722  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1723  * @param mtd           MTD device structure
1724  * @param from          The offset to read
1725  * @param len           number of bytes to read
1726  * @param retlen        pointer to variable to store the number of read bytes
1727  * @param buf           the databuffer to put/get data
1728  *
1729  * Read factory OTP area.
1730  */
1731 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1732                         size_t len, size_t *retlen, u_char *buf)
1733 {
1734         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1735 }
1736
1737 /**
1738  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1739  * @param mtd           MTD device structure
1740  * @param buf           the databuffer to put/get data
1741  * @param len           number of bytes to read
1742  *
1743  * Read user OTP info.
1744  */
1745 static int onenand_get_user_prot_info(struct mtd_info *mtd,
1746                         struct otp_info *buf, size_t len)
1747 {
1748         size_t retlen;
1749         int ret;
1750
1751         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1752
1753         return ret ? : retlen;
1754 }
1755
1756 /**
1757  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1758  * @param mtd           MTD device structure
1759  * @param from          The offset to read
1760  * @param len           number of bytes to read
1761  * @param retlen        pointer to variable to store the number of read bytes
1762  * @param buf           the databuffer to put/get data
1763  *
1764  * Read user OTP area.
1765  */
1766 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1767                         size_t len, size_t *retlen, u_char *buf)
1768 {
1769         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1770 }
1771
1772 /**
1773  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
1774  * @param mtd           MTD device structure
1775  * @param from          The offset to write
1776  * @param len           number of bytes to write
1777  * @param retlen        pointer to variable to store the number of write bytes
1778  * @param buf           the databuffer to put/get data
1779  *
1780  * Write user OTP area.
1781  */
1782 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
1783                         size_t len, size_t *retlen, u_char *buf)
1784 {
1785         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
1786 }
1787
1788 /**
1789  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
1790  * @param mtd           MTD device structure
1791  * @param from          The offset to lock
1792  * @param len           number of bytes to unlock
1793  *
1794  * Write lock mark on spare area in page 0 in OTP block
1795  */
1796 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
1797                         size_t len)
1798 {
1799         unsigned char oob_buf[64];
1800         size_t retlen;
1801         int ret;
1802
1803         memset(oob_buf, 0xff, mtd->oobsize);
1804         /*
1805          * Note: OTP lock operation
1806          *       OTP block : 0xXXFC
1807          *       1st block : 0xXXF3 (If chip support)
1808          *       Both      : 0xXXF0 (If chip support)
1809          */
1810         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
1811
1812         /*
1813          * Write lock mark to 8th word of sector0 of page0 of the spare0.
1814          * We write 16 bytes spare area instead of 2 bytes.
1815          */
1816         from = 0;
1817         len = 16;
1818
1819         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
1820
1821         return ret ? : retlen;
1822 }
1823 #endif  /* CONFIG_MTD_ONENAND_OTP */
1824
1825 /**
1826  * onenand_lock_scheme - Check and set OneNAND lock scheme
1827  * @param mtd           MTD data structure
1828  *
1829  * Check and set OneNAND lock scheme
1830  */
1831 static void onenand_lock_scheme(struct mtd_info *mtd)
1832 {
1833         struct onenand_chip *this = mtd->priv;
1834         unsigned int density, process;
1835
1836         /* Lock scheme depends on density and process */
1837         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1838         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
1839
1840         /* Lock scheme */
1841         if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
1842                 /* A-Die has all block unlock */
1843                 if (process) {
1844                         printk(KERN_DEBUG "Chip support all block unlock\n");
1845                         this->options |= ONENAND_HAS_UNLOCK_ALL;
1846                 }
1847         } else {
1848                 /* Some OneNAND has continues lock scheme */
1849                 if (!process) {
1850                         printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
1851                         this->options |= ONENAND_HAS_CONT_LOCK;
1852                 }
1853         }
1854 }
1855
1856 /**
1857  * onenand_print_device_info - Print device ID
1858  * @param device        device ID
1859  *
1860  * Print device ID
1861  */
1862 static void onenand_print_device_info(int device, int version)
1863 {
1864         int vcc, demuxed, ddp, density;
1865
1866         vcc = device & ONENAND_DEVICE_VCC_MASK;
1867         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1868         ddp = device & ONENAND_DEVICE_IS_DDP;
1869         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1870         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1871                 demuxed ? "" : "Muxed ",
1872                 ddp ? "(DDP)" : "",
1873                 (16 << density),
1874                 vcc ? "2.65/3.3" : "1.8",
1875                 device);
1876         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
1877 }
1878
1879 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1880         {ONENAND_MFR_SAMSUNG, "Samsung"},
1881 };
1882
1883 /**
1884  * onenand_check_maf - Check manufacturer ID
1885  * @param manuf         manufacturer ID
1886  *
1887  * Check manufacturer ID
1888  */
1889 static int onenand_check_maf(int manuf)
1890 {
1891         int size = ARRAY_SIZE(onenand_manuf_ids);
1892         char *name;
1893         int i;
1894
1895         for (i = 0; i < size; i++)
1896                 if (manuf == onenand_manuf_ids[i].id)
1897                         break;
1898
1899         if (i < size)
1900                 name = onenand_manuf_ids[i].name;
1901         else
1902                 name = "Unknown";
1903
1904         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1905
1906         return (i == size);
1907 }
1908
1909 /**
1910  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1911  * @param mtd           MTD device structure
1912  *
1913  * OneNAND detection method:
1914  *   Compare the the values from command with ones from register
1915  */
1916 static int onenand_probe(struct mtd_info *mtd)
1917 {
1918         struct onenand_chip *this = mtd->priv;
1919         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
1920         int density;
1921         int syscfg;
1922
1923         /* Save system configuration 1 */
1924         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
1925         /* Clear Sync. Burst Read mode to read BootRAM */
1926         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
1927
1928         /* Send the command for reading device ID from BootRAM */
1929         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1930
1931         /* Read manufacturer and device IDs from BootRAM */
1932         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1933         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1934
1935         /* Reset OneNAND to read default register values */
1936         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1937         /* Wait reset */
1938         this->wait(mtd, FL_RESETING);
1939
1940         /* Restore system configuration 1 */
1941         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
1942
1943         /* Check manufacturer ID */
1944         if (onenand_check_maf(bram_maf_id))
1945                 return -ENXIO;
1946
1947         /* Read manufacturer and device IDs from Register */
1948         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1949         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1950         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1951
1952         /* Check OneNAND device */
1953         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1954                 return -ENXIO;
1955
1956         /* Flash device information */
1957         onenand_print_device_info(dev_id, ver_id);
1958         this->device_id = dev_id;
1959         this->version_id = ver_id;
1960
1961         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1962         this->chipsize = (16 << density) << 20;
1963         /* Set density mask. it is used for DDP */
1964         this->density_mask = (1 << (density + 6));
1965
1966         /* OneNAND page size & block size */
1967         /* The data buffer size is equal to page size */
1968         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1969         mtd->oobsize = mtd->writesize >> 5;
1970         /* Pagers per block is always 64 in OneNAND */
1971         mtd->erasesize = mtd->writesize << 6;
1972
1973         this->erase_shift = ffs(mtd->erasesize) - 1;
1974         this->page_shift = ffs(mtd->writesize) - 1;
1975         this->ppb_shift = (this->erase_shift - this->page_shift);
1976         this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
1977
1978         /* REVIST: Multichip handling */
1979
1980         mtd->size = this->chipsize;
1981
1982         /* Check OneNAND lock scheme */
1983         onenand_lock_scheme(mtd);
1984
1985         return 0;
1986 }
1987
1988 /**
1989  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1990  * @param mtd           MTD device structure
1991  */
1992 static int onenand_suspend(struct mtd_info *mtd)
1993 {
1994         return onenand_get_device(mtd, FL_PM_SUSPENDED);
1995 }
1996
1997 /**
1998  * onenand_resume - [MTD Interface] Resume the OneNAND flash
1999  * @param mtd           MTD device structure
2000  */
2001 static void onenand_resume(struct mtd_info *mtd)
2002 {
2003         struct onenand_chip *this = mtd->priv;
2004
2005         if (this->state == FL_PM_SUSPENDED)
2006                 onenand_release_device(mtd);
2007         else
2008                 printk(KERN_ERR "resume() called for the chip which is not"
2009                                 "in suspended state\n");
2010 }
2011
2012 /**
2013  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2014  * @param mtd           MTD device structure
2015  * @param maxchips      Number of chips to scan for
2016  *
2017  * This fills out all the not initialized function pointers
2018  * with the defaults.
2019  * The flash ID is read and the mtd/chip structures are
2020  * filled with the appropriate values.
2021  */
2022 int onenand_scan(struct mtd_info *mtd, int maxchips)
2023 {
2024         struct onenand_chip *this = mtd->priv;
2025
2026         if (!this->read_word)
2027                 this->read_word = onenand_readw;
2028         if (!this->write_word)
2029                 this->write_word = onenand_writew;
2030
2031         if (!this->command)
2032                 this->command = onenand_command;
2033         if (!this->wait)
2034                 onenand_setup_wait(mtd);
2035
2036         if (!this->read_bufferram)
2037                 this->read_bufferram = onenand_read_bufferram;
2038         if (!this->write_bufferram)
2039                 this->write_bufferram = onenand_write_bufferram;
2040
2041         if (!this->block_markbad)
2042                 this->block_markbad = onenand_default_block_markbad;
2043         if (!this->scan_bbt)
2044                 this->scan_bbt = onenand_default_bbt;
2045
2046         if (onenand_probe(mtd))
2047                 return -ENXIO;
2048
2049         /* Set Sync. Burst Read after probing */
2050         if (this->mmcontrol) {
2051                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2052                 this->read_bufferram = onenand_sync_read_bufferram;
2053         }
2054
2055         /* Allocate buffers, if necessary */
2056         if (!this->page_buf) {
2057                 size_t len;
2058                 len = mtd->writesize + mtd->oobsize;
2059                 this->page_buf = kmalloc(len, GFP_KERNEL);
2060                 if (!this->page_buf) {
2061                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2062                         return -ENOMEM;
2063                 }
2064                 this->options |= ONENAND_PAGEBUF_ALLOC;
2065         }
2066
2067         this->state = FL_READY;
2068         init_waitqueue_head(&this->wq);
2069         spin_lock_init(&this->chip_lock);
2070
2071         /*
2072          * Allow subpage writes up to oobsize.
2073          */
2074         switch (mtd->oobsize) {
2075         case 64:
2076                 this->ecclayout = &onenand_oob_64;
2077                 mtd->subpage_sft = 2;
2078                 break;
2079
2080         case 32:
2081                 this->ecclayout = &onenand_oob_32;
2082                 mtd->subpage_sft = 1;
2083                 break;
2084
2085         default:
2086                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2087                         mtd->oobsize);
2088                 mtd->subpage_sft = 0;
2089                 /* To prevent kernel oops */
2090                 this->ecclayout = &onenand_oob_32;
2091                 break;
2092         }
2093
2094         this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2095         mtd->ecclayout = this->ecclayout;
2096
2097         /* Fill in remaining MTD driver data */
2098         mtd->type = MTD_NANDFLASH;
2099         mtd->flags = MTD_CAP_NANDFLASH;
2100         mtd->ecctype = MTD_ECC_SW;
2101         mtd->erase = onenand_erase;
2102         mtd->point = NULL;
2103         mtd->unpoint = NULL;
2104         mtd->read = onenand_read;
2105         mtd->write = onenand_write;
2106         mtd->read_oob = onenand_read_oob;
2107         mtd->write_oob = onenand_write_oob;
2108 #ifdef CONFIG_MTD_ONENAND_OTP
2109         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2110         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2111         mtd->get_user_prot_info = onenand_get_user_prot_info;
2112         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2113         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2114         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2115 #endif
2116         mtd->sync = onenand_sync;
2117         mtd->lock = onenand_lock;
2118         mtd->unlock = onenand_unlock;
2119         mtd->suspend = onenand_suspend;
2120         mtd->resume = onenand_resume;
2121         mtd->block_isbad = onenand_block_isbad;
2122         mtd->block_markbad = onenand_block_markbad;
2123         mtd->owner = THIS_MODULE;
2124
2125         /* Unlock whole block */
2126         onenand_unlock_all(mtd);
2127
2128         return this->scan_bbt(mtd);
2129 }
2130
2131 /**
2132  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2133  * @param mtd           MTD device structure
2134  */
2135 void onenand_release(struct mtd_info *mtd)
2136 {
2137         struct onenand_chip *this = mtd->priv;
2138
2139 #ifdef CONFIG_MTD_PARTITIONS
2140         /* Deregister partitions */
2141         del_mtd_partitions (mtd);
2142 #endif
2143         /* Deregister the device */
2144         del_mtd_device (mtd);
2145
2146         /* Free bad block table memory, if allocated */
2147         if (this->bbm)
2148                 kfree(this->bbm);
2149         /* Buffer allocated by onenand_scan */
2150         if (this->options & ONENAND_PAGEBUF_ALLOC)
2151                 kfree(this->page_buf);
2152 }
2153
2154 EXPORT_SYMBOL_GPL(onenand_scan);
2155 EXPORT_SYMBOL_GPL(onenand_release);
2156
2157 MODULE_LICENSE("GPL");
2158 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2159 MODULE_DESCRIPTION("Generic OneNAND flash driver code");