mtd: nand: davinci: Reinitialize the HW ECC engine in 4bit hwctl
[pandora-kernel.git] / drivers / mtd / nand / nandsim.c
1 /*
2  * NAND flash simulator.
3  *
4  * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
5  *
6  * Copyright (C) 2004 Nokia Corporation
7  *
8  * Note: NS means "NAND Simulator".
9  * Note: Input means input TO flash chip, output means output FROM chip.
10  *
11  * This program is free software; you can redistribute it and/or modify it
12  * under the terms of the GNU General Public License as published by the
13  * Free Software Foundation; either version 2, or (at your option) any later
14  * version.
15  *
16  * This program is distributed in the hope that it will be useful, but
17  * WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
19  * Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
24  */
25
26 #include <linux/init.h>
27 #include <linux/types.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/vmalloc.h>
31 #include <linux/math64.h>
32 #include <linux/slab.h>
33 #include <linux/errno.h>
34 #include <linux/string.h>
35 #include <linux/mtd/mtd.h>
36 #include <linux/mtd/nand.h>
37 #include <linux/mtd/nand_bch.h>
38 #include <linux/mtd/partitions.h>
39 #include <linux/delay.h>
40 #include <linux/list.h>
41 #include <linux/random.h>
42 #include <linux/sched.h>
43 #include <linux/fs.h>
44 #include <linux/pagemap.h>
45
46 /* Default simulator parameters values */
47 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE)  || \
48     !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
49     !defined(CONFIG_NANDSIM_THIRD_ID_BYTE)  || \
50     !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
51 #define CONFIG_NANDSIM_FIRST_ID_BYTE  0x98
52 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
53 #define CONFIG_NANDSIM_THIRD_ID_BYTE  0xFF /* No byte */
54 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
55 #endif
56
57 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
58 #define CONFIG_NANDSIM_ACCESS_DELAY 25
59 #endif
60 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
61 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
62 #endif
63 #ifndef CONFIG_NANDSIM_ERASE_DELAY
64 #define CONFIG_NANDSIM_ERASE_DELAY 2
65 #endif
66 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
67 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
68 #endif
69 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
70 #define CONFIG_NANDSIM_INPUT_CYCLE  50
71 #endif
72 #ifndef CONFIG_NANDSIM_BUS_WIDTH
73 #define CONFIG_NANDSIM_BUS_WIDTH  8
74 #endif
75 #ifndef CONFIG_NANDSIM_DO_DELAYS
76 #define CONFIG_NANDSIM_DO_DELAYS  0
77 #endif
78 #ifndef CONFIG_NANDSIM_LOG
79 #define CONFIG_NANDSIM_LOG        0
80 #endif
81 #ifndef CONFIG_NANDSIM_DBG
82 #define CONFIG_NANDSIM_DBG        0
83 #endif
84 #ifndef CONFIG_NANDSIM_MAX_PARTS
85 #define CONFIG_NANDSIM_MAX_PARTS  32
86 #endif
87
88 static uint first_id_byte  = CONFIG_NANDSIM_FIRST_ID_BYTE;
89 static uint second_id_byte = CONFIG_NANDSIM_SECOND_ID_BYTE;
90 static uint third_id_byte  = CONFIG_NANDSIM_THIRD_ID_BYTE;
91 static uint fourth_id_byte = CONFIG_NANDSIM_FOURTH_ID_BYTE;
92 static uint access_delay   = CONFIG_NANDSIM_ACCESS_DELAY;
93 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
94 static uint erase_delay    = CONFIG_NANDSIM_ERASE_DELAY;
95 static uint output_cycle   = CONFIG_NANDSIM_OUTPUT_CYCLE;
96 static uint input_cycle    = CONFIG_NANDSIM_INPUT_CYCLE;
97 static uint bus_width      = CONFIG_NANDSIM_BUS_WIDTH;
98 static uint do_delays      = CONFIG_NANDSIM_DO_DELAYS;
99 static uint log            = CONFIG_NANDSIM_LOG;
100 static uint dbg            = CONFIG_NANDSIM_DBG;
101 static unsigned long parts[CONFIG_NANDSIM_MAX_PARTS];
102 static unsigned int parts_num;
103 static char *badblocks = NULL;
104 static char *weakblocks = NULL;
105 static char *weakpages = NULL;
106 static unsigned int bitflips = 0;
107 static char *gravepages = NULL;
108 static unsigned int rptwear = 0;
109 static unsigned int overridesize = 0;
110 static char *cache_file = NULL;
111 static unsigned int bbt;
112 static unsigned int bch;
113
114 module_param(first_id_byte,  uint, 0400);
115 module_param(second_id_byte, uint, 0400);
116 module_param(third_id_byte,  uint, 0400);
117 module_param(fourth_id_byte, uint, 0400);
118 module_param(access_delay,   uint, 0400);
119 module_param(programm_delay, uint, 0400);
120 module_param(erase_delay,    uint, 0400);
121 module_param(output_cycle,   uint, 0400);
122 module_param(input_cycle,    uint, 0400);
123 module_param(bus_width,      uint, 0400);
124 module_param(do_delays,      uint, 0400);
125 module_param(log,            uint, 0400);
126 module_param(dbg,            uint, 0400);
127 module_param_array(parts, ulong, &parts_num, 0400);
128 module_param(badblocks,      charp, 0400);
129 module_param(weakblocks,     charp, 0400);
130 module_param(weakpages,      charp, 0400);
131 module_param(bitflips,       uint, 0400);
132 module_param(gravepages,     charp, 0400);
133 module_param(rptwear,        uint, 0400);
134 module_param(overridesize,   uint, 0400);
135 module_param(cache_file,     charp, 0400);
136 module_param(bbt,            uint, 0400);
137 module_param(bch,            uint, 0400);
138
139 MODULE_PARM_DESC(first_id_byte,  "The first byte returned by NAND Flash 'read ID' command (manufacturer ID)");
140 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID)");
141 MODULE_PARM_DESC(third_id_byte,  "The third byte returned by NAND Flash 'read ID' command");
142 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command");
143 MODULE_PARM_DESC(access_delay,   "Initial page access delay (microseconds)");
144 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
145 MODULE_PARM_DESC(erase_delay,    "Sector erase delay (milliseconds)");
146 MODULE_PARM_DESC(output_cycle,   "Word output (from flash) time (nanoseconds)");
147 MODULE_PARM_DESC(input_cycle,    "Word input (to flash) time (nanoseconds)");
148 MODULE_PARM_DESC(bus_width,      "Chip's bus width (8- or 16-bit)");
149 MODULE_PARM_DESC(do_delays,      "Simulate NAND delays using busy-waits if not zero");
150 MODULE_PARM_DESC(log,            "Perform logging if not zero");
151 MODULE_PARM_DESC(dbg,            "Output debug information if not zero");
152 MODULE_PARM_DESC(parts,          "Partition sizes (in erase blocks) separated by commas");
153 /* Page and erase block positions for the following parameters are independent of any partitions */
154 MODULE_PARM_DESC(badblocks,      "Erase blocks that are initially marked bad, separated by commas");
155 MODULE_PARM_DESC(weakblocks,     "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
156                                  " separated by commas e.g. 113:2 means eb 113"
157                                  " can be erased only twice before failing");
158 MODULE_PARM_DESC(weakpages,      "Weak pages [: maximum writes (defaults to 3)]"
159                                  " separated by commas e.g. 1401:2 means page 1401"
160                                  " can be written only twice before failing");
161 MODULE_PARM_DESC(bitflips,       "Maximum number of random bit flips per page (zero by default)");
162 MODULE_PARM_DESC(gravepages,     "Pages that lose data [: maximum reads (defaults to 3)]"
163                                  " separated by commas e.g. 1401:2 means page 1401"
164                                  " can be read only twice before failing");
165 MODULE_PARM_DESC(rptwear,        "Number of erases between reporting wear, if not zero");
166 MODULE_PARM_DESC(overridesize,   "Specifies the NAND Flash size overriding the ID bytes. "
167                                  "The size is specified in erase blocks and as the exponent of a power of two"
168                                  " e.g. 5 means a size of 32 erase blocks");
169 MODULE_PARM_DESC(cache_file,     "File to use to cache nand pages instead of memory");
170 MODULE_PARM_DESC(bbt,            "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data area");
171 MODULE_PARM_DESC(bch,            "Enable BCH ecc and set how many bits should "
172                                  "be correctable in 512-byte blocks");
173
174 /* The largest possible page size */
175 #define NS_LARGEST_PAGE_SIZE    4096
176
177 /* The prefix for simulator output */
178 #define NS_OUTPUT_PREFIX "[nandsim]"
179
180 /* Simulator's output macros (logging, debugging, warning, error) */
181 #define NS_LOG(args...) \
182         do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
183 #define NS_DBG(args...) \
184         do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
185 #define NS_WARN(args...) \
186         do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
187 #define NS_ERR(args...) \
188         do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
189 #define NS_INFO(args...) \
190         do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0)
191
192 /* Busy-wait delay macros (microseconds, milliseconds) */
193 #define NS_UDELAY(us) \
194         do { if (do_delays) udelay(us); } while(0)
195 #define NS_MDELAY(us) \
196         do { if (do_delays) mdelay(us); } while(0)
197
198 /* Is the nandsim structure initialized ? */
199 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
200
201 /* Good operation completion status */
202 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
203
204 /* Operation failed completion status */
205 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
206
207 /* Calculate the page offset in flash RAM image by (row, column) address */
208 #define NS_RAW_OFFSET(ns) \
209         (((ns)->regs.row << (ns)->geom.pgshift) + ((ns)->regs.row * (ns)->geom.oobsz) + (ns)->regs.column)
210
211 /* Calculate the OOB offset in flash RAM image by (row, column) address */
212 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
213
214 /* After a command is input, the simulator goes to one of the following states */
215 #define STATE_CMD_READ0        0x00000001 /* read data from the beginning of page */
216 #define STATE_CMD_READ1        0x00000002 /* read data from the second half of page */
217 #define STATE_CMD_READSTART    0x00000003 /* read data second command (large page devices) */
218 #define STATE_CMD_PAGEPROG     0x00000004 /* start page program */
219 #define STATE_CMD_READOOB      0x00000005 /* read OOB area */
220 #define STATE_CMD_ERASE1       0x00000006 /* sector erase first command */
221 #define STATE_CMD_STATUS       0x00000007 /* read status */
222 #define STATE_CMD_STATUS_M     0x00000008 /* read multi-plane status (isn't implemented) */
223 #define STATE_CMD_SEQIN        0x00000009 /* sequential data input */
224 #define STATE_CMD_READID       0x0000000A /* read ID */
225 #define STATE_CMD_ERASE2       0x0000000B /* sector erase second command */
226 #define STATE_CMD_RESET        0x0000000C /* reset */
227 #define STATE_CMD_RNDOUT       0x0000000D /* random output command */
228 #define STATE_CMD_RNDOUTSTART  0x0000000E /* random output start command */
229 #define STATE_CMD_MASK         0x0000000F /* command states mask */
230
231 /* After an address is input, the simulator goes to one of these states */
232 #define STATE_ADDR_PAGE        0x00000010 /* full (row, column) address is accepted */
233 #define STATE_ADDR_SEC         0x00000020 /* sector address was accepted */
234 #define STATE_ADDR_COLUMN      0x00000030 /* column address was accepted */
235 #define STATE_ADDR_ZERO        0x00000040 /* one byte zero address was accepted */
236 #define STATE_ADDR_MASK        0x00000070 /* address states mask */
237
238 /* During data input/output the simulator is in these states */
239 #define STATE_DATAIN           0x00000100 /* waiting for data input */
240 #define STATE_DATAIN_MASK      0x00000100 /* data input states mask */
241
242 #define STATE_DATAOUT          0x00001000 /* waiting for page data output */
243 #define STATE_DATAOUT_ID       0x00002000 /* waiting for ID bytes output */
244 #define STATE_DATAOUT_STATUS   0x00003000 /* waiting for status output */
245 #define STATE_DATAOUT_STATUS_M 0x00004000 /* waiting for multi-plane status output */
246 #define STATE_DATAOUT_MASK     0x00007000 /* data output states mask */
247
248 /* Previous operation is done, ready to accept new requests */
249 #define STATE_READY            0x00000000
250
251 /* This state is used to mark that the next state isn't known yet */
252 #define STATE_UNKNOWN          0x10000000
253
254 /* Simulator's actions bit masks */
255 #define ACTION_CPY       0x00100000 /* copy page/OOB to the internal buffer */
256 #define ACTION_PRGPAGE   0x00200000 /* program the internal buffer to flash */
257 #define ACTION_SECERASE  0x00300000 /* erase sector */
258 #define ACTION_ZEROOFF   0x00400000 /* don't add any offset to address */
259 #define ACTION_HALFOFF   0x00500000 /* add to address half of page */
260 #define ACTION_OOBOFF    0x00600000 /* add to address OOB offset */
261 #define ACTION_MASK      0x00700000 /* action mask */
262
263 #define NS_OPER_NUM      13 /* Number of operations supported by the simulator */
264 #define NS_OPER_STATES   6  /* Maximum number of states in operation */
265
266 #define OPT_ANY          0xFFFFFFFF /* any chip supports this operation */
267 #define OPT_PAGE256      0x00000001 /* 256-byte  page chips */
268 #define OPT_PAGE512      0x00000002 /* 512-byte  page chips */
269 #define OPT_PAGE2048     0x00000008 /* 2048-byte page chips */
270 #define OPT_SMARTMEDIA   0x00000010 /* SmartMedia technology chips */
271 #define OPT_AUTOINCR     0x00000020 /* page number auto incrementation is possible */
272 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
273 #define OPT_PAGE4096     0x00000080 /* 4096-byte page chips */
274 #define OPT_LARGEPAGE    (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */
275 #define OPT_SMALLPAGE    (OPT_PAGE256  | OPT_PAGE512)  /* 256 and 512-byte page chips */
276
277 /* Remove action bits from state */
278 #define NS_STATE(x) ((x) & ~ACTION_MASK)
279
280 /*
281  * Maximum previous states which need to be saved. Currently saving is
282  * only needed for page program operation with preceded read command
283  * (which is only valid for 512-byte pages).
284  */
285 #define NS_MAX_PREVSTATES 1
286
287 /* Maximum page cache pages needed to read or write a NAND page to the cache_file */
288 #define NS_MAX_HELD_PAGES 16
289
290 /*
291  * A union to represent flash memory contents and flash buffer.
292  */
293 union ns_mem {
294         u_char *byte;    /* for byte access */
295         uint16_t *word;  /* for 16-bit word access */
296 };
297
298 /*
299  * The structure which describes all the internal simulator data.
300  */
301 struct nandsim {
302         struct mtd_partition partitions[CONFIG_NANDSIM_MAX_PARTS];
303         unsigned int nbparts;
304
305         uint busw;              /* flash chip bus width (8 or 16) */
306         u_char ids[4];          /* chip's ID bytes */
307         uint32_t options;       /* chip's characteristic bits */
308         uint32_t state;         /* current chip state */
309         uint32_t nxstate;       /* next expected state */
310
311         uint32_t *op;           /* current operation, NULL operations isn't known yet  */
312         uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
313         uint16_t npstates;      /* number of previous states saved */
314         uint16_t stateidx;      /* current state index */
315
316         /* The simulated NAND flash pages array */
317         union ns_mem *pages;
318
319         /* Slab allocator for nand pages */
320         struct kmem_cache *nand_pages_slab;
321
322         /* Internal buffer of page + OOB size bytes */
323         union ns_mem buf;
324
325         /* NAND flash "geometry" */
326         struct {
327                 uint64_t totsz;     /* total flash size, bytes */
328                 uint32_t secsz;     /* flash sector (erase block) size, bytes */
329                 uint pgsz;          /* NAND flash page size, bytes */
330                 uint oobsz;         /* page OOB area size, bytes */
331                 uint64_t totszoob;  /* total flash size including OOB, bytes */
332                 uint pgszoob;       /* page size including OOB , bytes*/
333                 uint secszoob;      /* sector size including OOB, bytes */
334                 uint pgnum;         /* total number of pages */
335                 uint pgsec;         /* number of pages per sector */
336                 uint secshift;      /* bits number in sector size */
337                 uint pgshift;       /* bits number in page size */
338                 uint oobshift;      /* bits number in OOB size */
339                 uint pgaddrbytes;   /* bytes per page address */
340                 uint secaddrbytes;  /* bytes per sector address */
341                 uint idbytes;       /* the number ID bytes that this chip outputs */
342         } geom;
343
344         /* NAND flash internal registers */
345         struct {
346                 unsigned command; /* the command register */
347                 u_char   status;  /* the status register */
348                 uint     row;     /* the page number */
349                 uint     column;  /* the offset within page */
350                 uint     count;   /* internal counter */
351                 uint     num;     /* number of bytes which must be processed */
352                 uint     off;     /* fixed page offset */
353         } regs;
354
355         /* NAND flash lines state */
356         struct {
357                 int ce;  /* chip Enable */
358                 int cle; /* command Latch Enable */
359                 int ale; /* address Latch Enable */
360                 int wp;  /* write Protect */
361         } lines;
362
363         /* Fields needed when using a cache file */
364         struct file *cfile; /* Open file */
365         unsigned char *pages_written; /* Which pages have been written */
366         void *file_buf;
367         struct page *held_pages[NS_MAX_HELD_PAGES];
368         int held_cnt;
369 };
370
371 /*
372  * Operations array. To perform any operation the simulator must pass
373  * through the correspondent states chain.
374  */
375 static struct nandsim_operations {
376         uint32_t reqopts;  /* options which are required to perform the operation */
377         uint32_t states[NS_OPER_STATES]; /* operation's states */
378 } ops[NS_OPER_NUM] = {
379         /* Read page + OOB from the beginning */
380         {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
381                         STATE_DATAOUT, STATE_READY}},
382         /* Read page + OOB from the second half */
383         {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
384                         STATE_DATAOUT, STATE_READY}},
385         /* Read OOB */
386         {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
387                         STATE_DATAOUT, STATE_READY}},
388         /* Program page starting from the beginning */
389         {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
390                         STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
391         /* Program page starting from the beginning */
392         {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
393                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
394         /* Program page starting from the second half */
395         {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
396                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
397         /* Program OOB */
398         {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
399                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
400         /* Erase sector */
401         {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
402         /* Read status */
403         {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
404         /* Read multi-plane status */
405         {OPT_SMARTMEDIA, {STATE_CMD_STATUS_M, STATE_DATAOUT_STATUS_M, STATE_READY}},
406         /* Read ID */
407         {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
408         /* Large page devices read page */
409         {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
410                                STATE_DATAOUT, STATE_READY}},
411         /* Large page devices random page read */
412         {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY,
413                                STATE_DATAOUT, STATE_READY}},
414 };
415
416 struct weak_block {
417         struct list_head list;
418         unsigned int erase_block_no;
419         unsigned int max_erases;
420         unsigned int erases_done;
421 };
422
423 static LIST_HEAD(weak_blocks);
424
425 struct weak_page {
426         struct list_head list;
427         unsigned int page_no;
428         unsigned int max_writes;
429         unsigned int writes_done;
430 };
431
432 static LIST_HEAD(weak_pages);
433
434 struct grave_page {
435         struct list_head list;
436         unsigned int page_no;
437         unsigned int max_reads;
438         unsigned int reads_done;
439 };
440
441 static LIST_HEAD(grave_pages);
442
443 static unsigned long *erase_block_wear = NULL;
444 static unsigned int wear_eb_count = 0;
445 static unsigned long total_wear = 0;
446 static unsigned int rptwear_cnt = 0;
447
448 /* MTD structure for NAND controller */
449 static struct mtd_info *nsmtd;
450
451 static u_char ns_verify_buf[NS_LARGEST_PAGE_SIZE];
452
453 /*
454  * Allocate array of page pointers, create slab allocation for an array
455  * and initialize the array by NULL pointers.
456  *
457  * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
458  */
459 static int alloc_device(struct nandsim *ns)
460 {
461         struct file *cfile;
462         int i, err;
463
464         if (cache_file) {
465                 cfile = filp_open(cache_file, O_CREAT | O_RDWR | O_LARGEFILE, 0600);
466                 if (IS_ERR(cfile))
467                         return PTR_ERR(cfile);
468                 if (!cfile->f_op || (!cfile->f_op->read && !cfile->f_op->aio_read)) {
469                         NS_ERR("alloc_device: cache file not readable\n");
470                         err = -EINVAL;
471                         goto err_close;
472                 }
473                 if (!cfile->f_op->write && !cfile->f_op->aio_write) {
474                         NS_ERR("alloc_device: cache file not writeable\n");
475                         err = -EINVAL;
476                         goto err_close;
477                 }
478                 ns->pages_written = vzalloc(ns->geom.pgnum);
479                 if (!ns->pages_written) {
480                         NS_ERR("alloc_device: unable to allocate pages written array\n");
481                         err = -ENOMEM;
482                         goto err_close;
483                 }
484                 ns->file_buf = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
485                 if (!ns->file_buf) {
486                         NS_ERR("alloc_device: unable to allocate file buf\n");
487                         err = -ENOMEM;
488                         goto err_free;
489                 }
490                 ns->cfile = cfile;
491                 return 0;
492         }
493
494         ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem));
495         if (!ns->pages) {
496                 NS_ERR("alloc_device: unable to allocate page array\n");
497                 return -ENOMEM;
498         }
499         for (i = 0; i < ns->geom.pgnum; i++) {
500                 ns->pages[i].byte = NULL;
501         }
502         ns->nand_pages_slab = kmem_cache_create("nandsim",
503                                                 ns->geom.pgszoob, 0, 0, NULL);
504         if (!ns->nand_pages_slab) {
505                 NS_ERR("cache_create: unable to create kmem_cache\n");
506                 return -ENOMEM;
507         }
508
509         return 0;
510
511 err_free:
512         vfree(ns->pages_written);
513 err_close:
514         filp_close(cfile, NULL);
515         return err;
516 }
517
518 /*
519  * Free any allocated pages, and free the array of page pointers.
520  */
521 static void free_device(struct nandsim *ns)
522 {
523         int i;
524
525         if (ns->cfile) {
526                 kfree(ns->file_buf);
527                 vfree(ns->pages_written);
528                 filp_close(ns->cfile, NULL);
529                 return;
530         }
531
532         if (ns->pages) {
533                 for (i = 0; i < ns->geom.pgnum; i++) {
534                         if (ns->pages[i].byte)
535                                 kmem_cache_free(ns->nand_pages_slab,
536                                                 ns->pages[i].byte);
537                 }
538                 kmem_cache_destroy(ns->nand_pages_slab);
539                 vfree(ns->pages);
540         }
541 }
542
543 static char *get_partition_name(int i)
544 {
545         char buf[64];
546         sprintf(buf, "NAND simulator partition %d", i);
547         return kstrdup(buf, GFP_KERNEL);
548 }
549
550 /*
551  * Initialize the nandsim structure.
552  *
553  * RETURNS: 0 if success, -ERRNO if failure.
554  */
555 static int init_nandsim(struct mtd_info *mtd)
556 {
557         struct nand_chip *chip = mtd->priv;
558         struct nandsim   *ns   = chip->priv;
559         int i, ret = 0;
560         uint64_t remains;
561         uint64_t next_offset;
562
563         if (NS_IS_INITIALIZED(ns)) {
564                 NS_ERR("init_nandsim: nandsim is already initialized\n");
565                 return -EIO;
566         }
567
568         /* Force mtd to not do delays */
569         chip->chip_delay = 0;
570
571         /* Initialize the NAND flash parameters */
572         ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
573         ns->geom.totsz    = mtd->size;
574         ns->geom.pgsz     = mtd->writesize;
575         ns->geom.oobsz    = mtd->oobsize;
576         ns->geom.secsz    = mtd->erasesize;
577         ns->geom.pgszoob  = ns->geom.pgsz + ns->geom.oobsz;
578         ns->geom.pgnum    = div_u64(ns->geom.totsz, ns->geom.pgsz);
579         ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz;
580         ns->geom.secshift = ffs(ns->geom.secsz) - 1;
581         ns->geom.pgshift  = chip->page_shift;
582         ns->geom.oobshift = ffs(ns->geom.oobsz) - 1;
583         ns->geom.pgsec    = ns->geom.secsz / ns->geom.pgsz;
584         ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
585         ns->options = 0;
586
587         if (ns->geom.pgsz == 256) {
588                 ns->options |= OPT_PAGE256;
589         }
590         else if (ns->geom.pgsz == 512) {
591                 ns->options |= (OPT_PAGE512 | OPT_AUTOINCR);
592                 if (ns->busw == 8)
593                         ns->options |= OPT_PAGE512_8BIT;
594         } else if (ns->geom.pgsz == 2048) {
595                 ns->options |= OPT_PAGE2048;
596         } else if (ns->geom.pgsz == 4096) {
597                 ns->options |= OPT_PAGE4096;
598         } else {
599                 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
600                 return -EIO;
601         }
602
603         if (ns->options & OPT_SMALLPAGE) {
604                 if (ns->geom.totsz <= (32 << 20)) {
605                         ns->geom.pgaddrbytes  = 3;
606                         ns->geom.secaddrbytes = 2;
607                 } else {
608                         ns->geom.pgaddrbytes  = 4;
609                         ns->geom.secaddrbytes = 3;
610                 }
611         } else {
612                 if (ns->geom.totsz <= (128 << 20)) {
613                         ns->geom.pgaddrbytes  = 4;
614                         ns->geom.secaddrbytes = 2;
615                 } else {
616                         ns->geom.pgaddrbytes  = 5;
617                         ns->geom.secaddrbytes = 3;
618                 }
619         }
620
621         /* Fill the partition_info structure */
622         if (parts_num > ARRAY_SIZE(ns->partitions)) {
623                 NS_ERR("too many partitions.\n");
624                 ret = -EINVAL;
625                 goto error;
626         }
627         remains = ns->geom.totsz;
628         next_offset = 0;
629         for (i = 0; i < parts_num; ++i) {
630                 uint64_t part_sz = (uint64_t)parts[i] * ns->geom.secsz;
631
632                 if (!part_sz || part_sz > remains) {
633                         NS_ERR("bad partition size.\n");
634                         ret = -EINVAL;
635                         goto error;
636                 }
637                 ns->partitions[i].name   = get_partition_name(i);
638                 ns->partitions[i].offset = next_offset;
639                 ns->partitions[i].size   = part_sz;
640                 next_offset += ns->partitions[i].size;
641                 remains -= ns->partitions[i].size;
642         }
643         ns->nbparts = parts_num;
644         if (remains) {
645                 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
646                         NS_ERR("too many partitions.\n");
647                         ret = -EINVAL;
648                         goto error;
649                 }
650                 ns->partitions[i].name   = get_partition_name(i);
651                 ns->partitions[i].offset = next_offset;
652                 ns->partitions[i].size   = remains;
653                 ns->nbparts += 1;
654         }
655
656         /* Detect how many ID bytes the NAND chip outputs */
657         for (i = 0; nand_flash_ids[i].name != NULL; i++) {
658                 if (second_id_byte != nand_flash_ids[i].id)
659                         continue;
660                 if (!(nand_flash_ids[i].options & NAND_NO_AUTOINCR))
661                         ns->options |= OPT_AUTOINCR;
662         }
663
664         if (ns->busw == 16)
665                 NS_WARN("16-bit flashes support wasn't tested\n");
666
667         printk("flash size: %llu MiB\n",
668                         (unsigned long long)ns->geom.totsz >> 20);
669         printk("page size: %u bytes\n",         ns->geom.pgsz);
670         printk("OOB area size: %u bytes\n",     ns->geom.oobsz);
671         printk("sector size: %u KiB\n",         ns->geom.secsz >> 10);
672         printk("pages number: %u\n",            ns->geom.pgnum);
673         printk("pages per sector: %u\n",        ns->geom.pgsec);
674         printk("bus width: %u\n",               ns->busw);
675         printk("bits in sector size: %u\n",     ns->geom.secshift);
676         printk("bits in page size: %u\n",       ns->geom.pgshift);
677         printk("bits in OOB size: %u\n",        ns->geom.oobshift);
678         printk("flash size with OOB: %llu KiB\n",
679                         (unsigned long long)ns->geom.totszoob >> 10);
680         printk("page address bytes: %u\n",      ns->geom.pgaddrbytes);
681         printk("sector address bytes: %u\n",    ns->geom.secaddrbytes);
682         printk("options: %#x\n",                ns->options);
683
684         if ((ret = alloc_device(ns)) != 0)
685                 goto error;
686
687         /* Allocate / initialize the internal buffer */
688         ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
689         if (!ns->buf.byte) {
690                 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
691                         ns->geom.pgszoob);
692                 ret = -ENOMEM;
693                 goto error;
694         }
695         memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
696
697         return 0;
698
699 error:
700         free_device(ns);
701
702         return ret;
703 }
704
705 /*
706  * Free the nandsim structure.
707  */
708 static void free_nandsim(struct nandsim *ns)
709 {
710         kfree(ns->buf.byte);
711         free_device(ns);
712
713         return;
714 }
715
716 static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
717 {
718         char *w;
719         int zero_ok;
720         unsigned int erase_block_no;
721         loff_t offset;
722
723         if (!badblocks)
724                 return 0;
725         w = badblocks;
726         do {
727                 zero_ok = (*w == '0' ? 1 : 0);
728                 erase_block_no = simple_strtoul(w, &w, 0);
729                 if (!zero_ok && !erase_block_no) {
730                         NS_ERR("invalid badblocks.\n");
731                         return -EINVAL;
732                 }
733                 offset = erase_block_no * ns->geom.secsz;
734                 if (mtd->block_markbad(mtd, offset)) {
735                         NS_ERR("invalid badblocks.\n");
736                         return -EINVAL;
737                 }
738                 if (*w == ',')
739                         w += 1;
740         } while (*w);
741         return 0;
742 }
743
744 static int parse_weakblocks(void)
745 {
746         char *w;
747         int zero_ok;
748         unsigned int erase_block_no;
749         unsigned int max_erases;
750         struct weak_block *wb;
751
752         if (!weakblocks)
753                 return 0;
754         w = weakblocks;
755         do {
756                 zero_ok = (*w == '0' ? 1 : 0);
757                 erase_block_no = simple_strtoul(w, &w, 0);
758                 if (!zero_ok && !erase_block_no) {
759                         NS_ERR("invalid weakblocks.\n");
760                         return -EINVAL;
761                 }
762                 max_erases = 3;
763                 if (*w == ':') {
764                         w += 1;
765                         max_erases = simple_strtoul(w, &w, 0);
766                 }
767                 if (*w == ',')
768                         w += 1;
769                 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
770                 if (!wb) {
771                         NS_ERR("unable to allocate memory.\n");
772                         return -ENOMEM;
773                 }
774                 wb->erase_block_no = erase_block_no;
775                 wb->max_erases = max_erases;
776                 list_add(&wb->list, &weak_blocks);
777         } while (*w);
778         return 0;
779 }
780
781 static int erase_error(unsigned int erase_block_no)
782 {
783         struct weak_block *wb;
784
785         list_for_each_entry(wb, &weak_blocks, list)
786                 if (wb->erase_block_no == erase_block_no) {
787                         if (wb->erases_done >= wb->max_erases)
788                                 return 1;
789                         wb->erases_done += 1;
790                         return 0;
791                 }
792         return 0;
793 }
794
795 static int parse_weakpages(void)
796 {
797         char *w;
798         int zero_ok;
799         unsigned int page_no;
800         unsigned int max_writes;
801         struct weak_page *wp;
802
803         if (!weakpages)
804                 return 0;
805         w = weakpages;
806         do {
807                 zero_ok = (*w == '0' ? 1 : 0);
808                 page_no = simple_strtoul(w, &w, 0);
809                 if (!zero_ok && !page_no) {
810                         NS_ERR("invalid weakpagess.\n");
811                         return -EINVAL;
812                 }
813                 max_writes = 3;
814                 if (*w == ':') {
815                         w += 1;
816                         max_writes = simple_strtoul(w, &w, 0);
817                 }
818                 if (*w == ',')
819                         w += 1;
820                 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
821                 if (!wp) {
822                         NS_ERR("unable to allocate memory.\n");
823                         return -ENOMEM;
824                 }
825                 wp->page_no = page_no;
826                 wp->max_writes = max_writes;
827                 list_add(&wp->list, &weak_pages);
828         } while (*w);
829         return 0;
830 }
831
832 static int write_error(unsigned int page_no)
833 {
834         struct weak_page *wp;
835
836         list_for_each_entry(wp, &weak_pages, list)
837                 if (wp->page_no == page_no) {
838                         if (wp->writes_done >= wp->max_writes)
839                                 return 1;
840                         wp->writes_done += 1;
841                         return 0;
842                 }
843         return 0;
844 }
845
846 static int parse_gravepages(void)
847 {
848         char *g;
849         int zero_ok;
850         unsigned int page_no;
851         unsigned int max_reads;
852         struct grave_page *gp;
853
854         if (!gravepages)
855                 return 0;
856         g = gravepages;
857         do {
858                 zero_ok = (*g == '0' ? 1 : 0);
859                 page_no = simple_strtoul(g, &g, 0);
860                 if (!zero_ok && !page_no) {
861                         NS_ERR("invalid gravepagess.\n");
862                         return -EINVAL;
863                 }
864                 max_reads = 3;
865                 if (*g == ':') {
866                         g += 1;
867                         max_reads = simple_strtoul(g, &g, 0);
868                 }
869                 if (*g == ',')
870                         g += 1;
871                 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
872                 if (!gp) {
873                         NS_ERR("unable to allocate memory.\n");
874                         return -ENOMEM;
875                 }
876                 gp->page_no = page_no;
877                 gp->max_reads = max_reads;
878                 list_add(&gp->list, &grave_pages);
879         } while (*g);
880         return 0;
881 }
882
883 static int read_error(unsigned int page_no)
884 {
885         struct grave_page *gp;
886
887         list_for_each_entry(gp, &grave_pages, list)
888                 if (gp->page_no == page_no) {
889                         if (gp->reads_done >= gp->max_reads)
890                                 return 1;
891                         gp->reads_done += 1;
892                         return 0;
893                 }
894         return 0;
895 }
896
897 static void free_lists(void)
898 {
899         struct list_head *pos, *n;
900         list_for_each_safe(pos, n, &weak_blocks) {
901                 list_del(pos);
902                 kfree(list_entry(pos, struct weak_block, list));
903         }
904         list_for_each_safe(pos, n, &weak_pages) {
905                 list_del(pos);
906                 kfree(list_entry(pos, struct weak_page, list));
907         }
908         list_for_each_safe(pos, n, &grave_pages) {
909                 list_del(pos);
910                 kfree(list_entry(pos, struct grave_page, list));
911         }
912         kfree(erase_block_wear);
913 }
914
915 static int setup_wear_reporting(struct mtd_info *mtd)
916 {
917         size_t mem;
918
919         if (!rptwear)
920                 return 0;
921         wear_eb_count = div_u64(mtd->size, mtd->erasesize);
922         mem = wear_eb_count * sizeof(unsigned long);
923         if (mem / sizeof(unsigned long) != wear_eb_count) {
924                 NS_ERR("Too many erase blocks for wear reporting\n");
925                 return -ENOMEM;
926         }
927         erase_block_wear = kzalloc(mem, GFP_KERNEL);
928         if (!erase_block_wear) {
929                 NS_ERR("Too many erase blocks for wear reporting\n");
930                 return -ENOMEM;
931         }
932         return 0;
933 }
934
935 static void update_wear(unsigned int erase_block_no)
936 {
937         unsigned long wmin = -1, wmax = 0, avg;
938         unsigned long deciles[10], decile_max[10], tot = 0;
939         unsigned int i;
940
941         if (!erase_block_wear)
942                 return;
943         total_wear += 1;
944         if (total_wear == 0)
945                 NS_ERR("Erase counter total overflow\n");
946         erase_block_wear[erase_block_no] += 1;
947         if (erase_block_wear[erase_block_no] == 0)
948                 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
949         rptwear_cnt += 1;
950         if (rptwear_cnt < rptwear)
951                 return;
952         rptwear_cnt = 0;
953         /* Calc wear stats */
954         for (i = 0; i < wear_eb_count; ++i) {
955                 unsigned long wear = erase_block_wear[i];
956                 if (wear < wmin)
957                         wmin = wear;
958                 if (wear > wmax)
959                         wmax = wear;
960                 tot += wear;
961         }
962         for (i = 0; i < 9; ++i) {
963                 deciles[i] = 0;
964                 decile_max[i] = (wmax * (i + 1) + 5) / 10;
965         }
966         deciles[9] = 0;
967         decile_max[9] = wmax;
968         for (i = 0; i < wear_eb_count; ++i) {
969                 int d;
970                 unsigned long wear = erase_block_wear[i];
971                 for (d = 0; d < 10; ++d)
972                         if (wear <= decile_max[d]) {
973                                 deciles[d] += 1;
974                                 break;
975                         }
976         }
977         avg = tot / wear_eb_count;
978         /* Output wear report */
979         NS_INFO("*** Wear Report ***\n");
980         NS_INFO("Total numbers of erases:  %lu\n", tot);
981         NS_INFO("Number of erase blocks:   %u\n", wear_eb_count);
982         NS_INFO("Average number of erases: %lu\n", avg);
983         NS_INFO("Maximum number of erases: %lu\n", wmax);
984         NS_INFO("Minimum number of erases: %lu\n", wmin);
985         for (i = 0; i < 10; ++i) {
986                 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
987                 if (from > decile_max[i])
988                         continue;
989                 NS_INFO("Number of ebs with erase counts from %lu to %lu : %lu\n",
990                         from,
991                         decile_max[i],
992                         deciles[i]);
993         }
994         NS_INFO("*** End of Wear Report ***\n");
995 }
996
997 /*
998  * Returns the string representation of 'state' state.
999  */
1000 static char *get_state_name(uint32_t state)
1001 {
1002         switch (NS_STATE(state)) {
1003                 case STATE_CMD_READ0:
1004                         return "STATE_CMD_READ0";
1005                 case STATE_CMD_READ1:
1006                         return "STATE_CMD_READ1";
1007                 case STATE_CMD_PAGEPROG:
1008                         return "STATE_CMD_PAGEPROG";
1009                 case STATE_CMD_READOOB:
1010                         return "STATE_CMD_READOOB";
1011                 case STATE_CMD_READSTART:
1012                         return "STATE_CMD_READSTART";
1013                 case STATE_CMD_ERASE1:
1014                         return "STATE_CMD_ERASE1";
1015                 case STATE_CMD_STATUS:
1016                         return "STATE_CMD_STATUS";
1017                 case STATE_CMD_STATUS_M:
1018                         return "STATE_CMD_STATUS_M";
1019                 case STATE_CMD_SEQIN:
1020                         return "STATE_CMD_SEQIN";
1021                 case STATE_CMD_READID:
1022                         return "STATE_CMD_READID";
1023                 case STATE_CMD_ERASE2:
1024                         return "STATE_CMD_ERASE2";
1025                 case STATE_CMD_RESET:
1026                         return "STATE_CMD_RESET";
1027                 case STATE_CMD_RNDOUT:
1028                         return "STATE_CMD_RNDOUT";
1029                 case STATE_CMD_RNDOUTSTART:
1030                         return "STATE_CMD_RNDOUTSTART";
1031                 case STATE_ADDR_PAGE:
1032                         return "STATE_ADDR_PAGE";
1033                 case STATE_ADDR_SEC:
1034                         return "STATE_ADDR_SEC";
1035                 case STATE_ADDR_ZERO:
1036                         return "STATE_ADDR_ZERO";
1037                 case STATE_ADDR_COLUMN:
1038                         return "STATE_ADDR_COLUMN";
1039                 case STATE_DATAIN:
1040                         return "STATE_DATAIN";
1041                 case STATE_DATAOUT:
1042                         return "STATE_DATAOUT";
1043                 case STATE_DATAOUT_ID:
1044                         return "STATE_DATAOUT_ID";
1045                 case STATE_DATAOUT_STATUS:
1046                         return "STATE_DATAOUT_STATUS";
1047                 case STATE_DATAOUT_STATUS_M:
1048                         return "STATE_DATAOUT_STATUS_M";
1049                 case STATE_READY:
1050                         return "STATE_READY";
1051                 case STATE_UNKNOWN:
1052                         return "STATE_UNKNOWN";
1053         }
1054
1055         NS_ERR("get_state_name: unknown state, BUG\n");
1056         return NULL;
1057 }
1058
1059 /*
1060  * Check if command is valid.
1061  *
1062  * RETURNS: 1 if wrong command, 0 if right.
1063  */
1064 static int check_command(int cmd)
1065 {
1066         switch (cmd) {
1067
1068         case NAND_CMD_READ0:
1069         case NAND_CMD_READ1:
1070         case NAND_CMD_READSTART:
1071         case NAND_CMD_PAGEPROG:
1072         case NAND_CMD_READOOB:
1073         case NAND_CMD_ERASE1:
1074         case NAND_CMD_STATUS:
1075         case NAND_CMD_SEQIN:
1076         case NAND_CMD_READID:
1077         case NAND_CMD_ERASE2:
1078         case NAND_CMD_RESET:
1079         case NAND_CMD_RNDOUT:
1080         case NAND_CMD_RNDOUTSTART:
1081                 return 0;
1082
1083         case NAND_CMD_STATUS_MULTI:
1084         default:
1085                 return 1;
1086         }
1087 }
1088
1089 /*
1090  * Returns state after command is accepted by command number.
1091  */
1092 static uint32_t get_state_by_command(unsigned command)
1093 {
1094         switch (command) {
1095                 case NAND_CMD_READ0:
1096                         return STATE_CMD_READ0;
1097                 case NAND_CMD_READ1:
1098                         return STATE_CMD_READ1;
1099                 case NAND_CMD_PAGEPROG:
1100                         return STATE_CMD_PAGEPROG;
1101                 case NAND_CMD_READSTART:
1102                         return STATE_CMD_READSTART;
1103                 case NAND_CMD_READOOB:
1104                         return STATE_CMD_READOOB;
1105                 case NAND_CMD_ERASE1:
1106                         return STATE_CMD_ERASE1;
1107                 case NAND_CMD_STATUS:
1108                         return STATE_CMD_STATUS;
1109                 case NAND_CMD_STATUS_MULTI:
1110                         return STATE_CMD_STATUS_M;
1111                 case NAND_CMD_SEQIN:
1112                         return STATE_CMD_SEQIN;
1113                 case NAND_CMD_READID:
1114                         return STATE_CMD_READID;
1115                 case NAND_CMD_ERASE2:
1116                         return STATE_CMD_ERASE2;
1117                 case NAND_CMD_RESET:
1118                         return STATE_CMD_RESET;
1119                 case NAND_CMD_RNDOUT:
1120                         return STATE_CMD_RNDOUT;
1121                 case NAND_CMD_RNDOUTSTART:
1122                         return STATE_CMD_RNDOUTSTART;
1123         }
1124
1125         NS_ERR("get_state_by_command: unknown command, BUG\n");
1126         return 0;
1127 }
1128
1129 /*
1130  * Move an address byte to the correspondent internal register.
1131  */
1132 static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
1133 {
1134         uint byte = (uint)bt;
1135
1136         if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1137                 ns->regs.column |= (byte << 8 * ns->regs.count);
1138         else {
1139                 ns->regs.row |= (byte << 8 * (ns->regs.count -
1140                                                 ns->geom.pgaddrbytes +
1141                                                 ns->geom.secaddrbytes));
1142         }
1143
1144         return;
1145 }
1146
1147 /*
1148  * Switch to STATE_READY state.
1149  */
1150 static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1151 {
1152         NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
1153
1154         ns->state       = STATE_READY;
1155         ns->nxstate     = STATE_UNKNOWN;
1156         ns->op          = NULL;
1157         ns->npstates    = 0;
1158         ns->stateidx    = 0;
1159         ns->regs.num    = 0;
1160         ns->regs.count  = 0;
1161         ns->regs.off    = 0;
1162         ns->regs.row    = 0;
1163         ns->regs.column = 0;
1164         ns->regs.status = status;
1165 }
1166
1167 /*
1168  * If the operation isn't known yet, try to find it in the global array
1169  * of supported operations.
1170  *
1171  * Operation can be unknown because of the following.
1172  *   1. New command was accepted and this is the first call to find the
1173  *      correspondent states chain. In this case ns->npstates = 0;
1174  *   2. There are several operations which begin with the same command(s)
1175  *      (for example program from the second half and read from the
1176  *      second half operations both begin with the READ1 command). In this
1177  *      case the ns->pstates[] array contains previous states.
1178  *
1179  * Thus, the function tries to find operation containing the following
1180  * states (if the 'flag' parameter is 0):
1181  *    ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1182  *
1183  * If (one and only one) matching operation is found, it is accepted (
1184  * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1185  * zeroed).
1186  *
1187  * If there are several matches, the current state is pushed to the
1188  * ns->pstates.
1189  *
1190  * The operation can be unknown only while commands are input to the chip.
1191  * As soon as address command is accepted, the operation must be known.
1192  * In such situation the function is called with 'flag' != 0, and the
1193  * operation is searched using the following pattern:
1194  *     ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1195  *
1196  * It is supposed that this pattern must either match one operation or
1197  * none. There can't be ambiguity in that case.
1198  *
1199  * If no matches found, the function does the following:
1200  *   1. if there are saved states present, try to ignore them and search
1201  *      again only using the last command. If nothing was found, switch
1202  *      to the STATE_READY state.
1203  *   2. if there are no saved states, switch to the STATE_READY state.
1204  *
1205  * RETURNS: -2 - no matched operations found.
1206  *          -1 - several matches.
1207  *           0 - operation is found.
1208  */
1209 static int find_operation(struct nandsim *ns, uint32_t flag)
1210 {
1211         int opsfound = 0;
1212         int i, j, idx = 0;
1213
1214         for (i = 0; i < NS_OPER_NUM; i++) {
1215
1216                 int found = 1;
1217
1218                 if (!(ns->options & ops[i].reqopts))
1219                         /* Ignore operations we can't perform */
1220                         continue;
1221
1222                 if (flag) {
1223                         if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1224                                 continue;
1225                 } else {
1226                         if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1227                                 continue;
1228                 }
1229
1230                 for (j = 0; j < ns->npstates; j++)
1231                         if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1232                                 && (ns->options & ops[idx].reqopts)) {
1233                                 found = 0;
1234                                 break;
1235                         }
1236
1237                 if (found) {
1238                         idx = i;
1239                         opsfound += 1;
1240                 }
1241         }
1242
1243         if (opsfound == 1) {
1244                 /* Exact match */
1245                 ns->op = &ops[idx].states[0];
1246                 if (flag) {
1247                         /*
1248                          * In this case the find_operation function was
1249                          * called when address has just began input. But it isn't
1250                          * yet fully input and the current state must
1251                          * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1252                          * state must be the next state (ns->nxstate).
1253                          */
1254                         ns->stateidx = ns->npstates - 1;
1255                 } else {
1256                         ns->stateidx = ns->npstates;
1257                 }
1258                 ns->npstates = 0;
1259                 ns->state = ns->op[ns->stateidx];
1260                 ns->nxstate = ns->op[ns->stateidx + 1];
1261                 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1262                                 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1263                 return 0;
1264         }
1265
1266         if (opsfound == 0) {
1267                 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1268                 if (ns->npstates != 0) {
1269                         NS_DBG("find_operation: no operation found, try again with state %s\n",
1270                                         get_state_name(ns->state));
1271                         ns->npstates = 0;
1272                         return find_operation(ns, 0);
1273
1274                 }
1275                 NS_DBG("find_operation: no operations found\n");
1276                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1277                 return -2;
1278         }
1279
1280         if (flag) {
1281                 /* This shouldn't happen */
1282                 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1283                 return -2;
1284         }
1285
1286         NS_DBG("find_operation: there is still ambiguity\n");
1287
1288         ns->pstates[ns->npstates++] = ns->state;
1289
1290         return -1;
1291 }
1292
1293 static void put_pages(struct nandsim *ns)
1294 {
1295         int i;
1296
1297         for (i = 0; i < ns->held_cnt; i++)
1298                 page_cache_release(ns->held_pages[i]);
1299 }
1300
1301 /* Get page cache pages in advance to provide NOFS memory allocation */
1302 static int get_pages(struct nandsim *ns, struct file *file, size_t count, loff_t pos)
1303 {
1304         pgoff_t index, start_index, end_index;
1305         struct page *page;
1306         struct address_space *mapping = file->f_mapping;
1307
1308         start_index = pos >> PAGE_CACHE_SHIFT;
1309         end_index = (pos + count - 1) >> PAGE_CACHE_SHIFT;
1310         if (end_index - start_index + 1 > NS_MAX_HELD_PAGES)
1311                 return -EINVAL;
1312         ns->held_cnt = 0;
1313         for (index = start_index; index <= end_index; index++) {
1314                 page = find_get_page(mapping, index);
1315                 if (page == NULL) {
1316                         page = find_or_create_page(mapping, index, GFP_NOFS);
1317                         if (page == NULL) {
1318                                 write_inode_now(mapping->host, 1);
1319                                 page = find_or_create_page(mapping, index, GFP_NOFS);
1320                         }
1321                         if (page == NULL) {
1322                                 put_pages(ns);
1323                                 return -ENOMEM;
1324                         }
1325                         unlock_page(page);
1326                 }
1327                 ns->held_pages[ns->held_cnt++] = page;
1328         }
1329         return 0;
1330 }
1331
1332 static int set_memalloc(void)
1333 {
1334         if (current->flags & PF_MEMALLOC)
1335                 return 0;
1336         current->flags |= PF_MEMALLOC;
1337         return 1;
1338 }
1339
1340 static void clear_memalloc(int memalloc)
1341 {
1342         if (memalloc)
1343                 current->flags &= ~PF_MEMALLOC;
1344 }
1345
1346 static ssize_t read_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t *pos)
1347 {
1348         mm_segment_t old_fs;
1349         ssize_t tx;
1350         int err, memalloc;
1351
1352         err = get_pages(ns, file, count, *pos);
1353         if (err)
1354                 return err;
1355         old_fs = get_fs();
1356         set_fs(get_ds());
1357         memalloc = set_memalloc();
1358         tx = vfs_read(file, (char __user *)buf, count, pos);
1359         clear_memalloc(memalloc);
1360         set_fs(old_fs);
1361         put_pages(ns);
1362         return tx;
1363 }
1364
1365 static ssize_t write_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t *pos)
1366 {
1367         mm_segment_t old_fs;
1368         ssize_t tx;
1369         int err, memalloc;
1370
1371         err = get_pages(ns, file, count, *pos);
1372         if (err)
1373                 return err;
1374         old_fs = get_fs();
1375         set_fs(get_ds());
1376         memalloc = set_memalloc();
1377         tx = vfs_write(file, (char __user *)buf, count, pos);
1378         clear_memalloc(memalloc);
1379         set_fs(old_fs);
1380         put_pages(ns);
1381         return tx;
1382 }
1383
1384 /*
1385  * Returns a pointer to the current page.
1386  */
1387 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1388 {
1389         return &(ns->pages[ns->regs.row]);
1390 }
1391
1392 /*
1393  * Retuns a pointer to the current byte, within the current page.
1394  */
1395 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1396 {
1397         return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1398 }
1399
1400 int do_read_error(struct nandsim *ns, int num)
1401 {
1402         unsigned int page_no = ns->regs.row;
1403
1404         if (read_error(page_no)) {
1405                 int i;
1406                 memset(ns->buf.byte, 0xFF, num);
1407                 for (i = 0; i < num; ++i)
1408                         ns->buf.byte[i] = random32();
1409                 NS_WARN("simulating read error in page %u\n", page_no);
1410                 return 1;
1411         }
1412         return 0;
1413 }
1414
1415 void do_bit_flips(struct nandsim *ns, int num)
1416 {
1417         if (bitflips && random32() < (1 << 22)) {
1418                 int flips = 1;
1419                 if (bitflips > 1)
1420                         flips = (random32() % (int) bitflips) + 1;
1421                 while (flips--) {
1422                         int pos = random32() % (num * 8);
1423                         ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1424                         NS_WARN("read_page: flipping bit %d in page %d "
1425                                 "reading from %d ecc: corrected=%u failed=%u\n",
1426                                 pos, ns->regs.row, ns->regs.column + ns->regs.off,
1427                                 nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1428                 }
1429         }
1430 }
1431
1432 /*
1433  * Fill the NAND buffer with data read from the specified page.
1434  */
1435 static void read_page(struct nandsim *ns, int num)
1436 {
1437         union ns_mem *mypage;
1438
1439         if (ns->cfile) {
1440                 if (!ns->pages_written[ns->regs.row]) {
1441                         NS_DBG("read_page: page %d not written\n", ns->regs.row);
1442                         memset(ns->buf.byte, 0xFF, num);
1443                 } else {
1444                         loff_t pos;
1445                         ssize_t tx;
1446
1447                         NS_DBG("read_page: page %d written, reading from %d\n",
1448                                 ns->regs.row, ns->regs.column + ns->regs.off);
1449                         if (do_read_error(ns, num))
1450                                 return;
1451                         pos = (loff_t)ns->regs.row * ns->geom.pgszoob + ns->regs.column + ns->regs.off;
1452                         tx = read_file(ns, ns->cfile, ns->buf.byte, num, &pos);
1453                         if (tx != num) {
1454                                 NS_ERR("read_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1455                                 return;
1456                         }
1457                         do_bit_flips(ns, num);
1458                 }
1459                 return;
1460         }
1461
1462         mypage = NS_GET_PAGE(ns);
1463         if (mypage->byte == NULL) {
1464                 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1465                 memset(ns->buf.byte, 0xFF, num);
1466         } else {
1467                 NS_DBG("read_page: page %d allocated, reading from %d\n",
1468                         ns->regs.row, ns->regs.column + ns->regs.off);
1469                 if (do_read_error(ns, num))
1470                         return;
1471                 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1472                 do_bit_flips(ns, num);
1473         }
1474 }
1475
1476 /*
1477  * Erase all pages in the specified sector.
1478  */
1479 static void erase_sector(struct nandsim *ns)
1480 {
1481         union ns_mem *mypage;
1482         int i;
1483
1484         if (ns->cfile) {
1485                 for (i = 0; i < ns->geom.pgsec; i++)
1486                         if (ns->pages_written[ns->regs.row + i]) {
1487                                 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row + i);
1488                                 ns->pages_written[ns->regs.row + i] = 0;
1489                         }
1490                 return;
1491         }
1492
1493         mypage = NS_GET_PAGE(ns);
1494         for (i = 0; i < ns->geom.pgsec; i++) {
1495                 if (mypage->byte != NULL) {
1496                         NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1497                         kmem_cache_free(ns->nand_pages_slab, mypage->byte);
1498                         mypage->byte = NULL;
1499                 }
1500                 mypage++;
1501         }
1502 }
1503
1504 /*
1505  * Program the specified page with the contents from the NAND buffer.
1506  */
1507 static int prog_page(struct nandsim *ns, int num)
1508 {
1509         int i;
1510         union ns_mem *mypage;
1511         u_char *pg_off;
1512
1513         if (ns->cfile) {
1514                 loff_t off, pos;
1515                 ssize_t tx;
1516                 int all;
1517
1518                 NS_DBG("prog_page: writing page %d\n", ns->regs.row);
1519                 pg_off = ns->file_buf + ns->regs.column + ns->regs.off;
1520                 off = (loff_t)ns->regs.row * ns->geom.pgszoob + ns->regs.column + ns->regs.off;
1521                 if (!ns->pages_written[ns->regs.row]) {
1522                         all = 1;
1523                         memset(ns->file_buf, 0xff, ns->geom.pgszoob);
1524                 } else {
1525                         all = 0;
1526                         pos = off;
1527                         tx = read_file(ns, ns->cfile, pg_off, num, &pos);
1528                         if (tx != num) {
1529                                 NS_ERR("prog_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1530                                 return -1;
1531                         }
1532                 }
1533                 for (i = 0; i < num; i++)
1534                         pg_off[i] &= ns->buf.byte[i];
1535                 if (all) {
1536                         pos = (loff_t)ns->regs.row * ns->geom.pgszoob;
1537                         tx = write_file(ns, ns->cfile, ns->file_buf, ns->geom.pgszoob, &pos);
1538                         if (tx != ns->geom.pgszoob) {
1539                                 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1540                                 return -1;
1541                         }
1542                         ns->pages_written[ns->regs.row] = 1;
1543                 } else {
1544                         pos = off;
1545                         tx = write_file(ns, ns->cfile, pg_off, num, &pos);
1546                         if (tx != num) {
1547                                 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1548                                 return -1;
1549                         }
1550                 }
1551                 return 0;
1552         }
1553
1554         mypage = NS_GET_PAGE(ns);
1555         if (mypage->byte == NULL) {
1556                 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1557                 /*
1558                  * We allocate memory with GFP_NOFS because a flash FS may
1559                  * utilize this. If it is holding an FS lock, then gets here,
1560                  * then kernel memory alloc runs writeback which goes to the FS
1561                  * again and deadlocks. This was seen in practice.
1562                  */
1563                 mypage->byte = kmem_cache_alloc(ns->nand_pages_slab, GFP_NOFS);
1564                 if (mypage->byte == NULL) {
1565                         NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1566                         return -1;
1567                 }
1568                 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1569         }
1570
1571         pg_off = NS_PAGE_BYTE_OFF(ns);
1572         for (i = 0; i < num; i++)
1573                 pg_off[i] &= ns->buf.byte[i];
1574
1575         return 0;
1576 }
1577
1578 /*
1579  * If state has any action bit, perform this action.
1580  *
1581  * RETURNS: 0 if success, -1 if error.
1582  */
1583 static int do_state_action(struct nandsim *ns, uint32_t action)
1584 {
1585         int num;
1586         int busdiv = ns->busw == 8 ? 1 : 2;
1587         unsigned int erase_block_no, page_no;
1588
1589         action &= ACTION_MASK;
1590
1591         /* Check that page address input is correct */
1592         if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1593                 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1594                 return -1;
1595         }
1596
1597         switch (action) {
1598
1599         case ACTION_CPY:
1600                 /*
1601                  * Copy page data to the internal buffer.
1602                  */
1603
1604                 /* Column shouldn't be very large */
1605                 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1606                         NS_ERR("do_state_action: column number is too large\n");
1607                         break;
1608                 }
1609                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1610                 read_page(ns, num);
1611
1612                 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1613                         num, NS_RAW_OFFSET(ns) + ns->regs.off);
1614
1615                 if (ns->regs.off == 0)
1616                         NS_LOG("read page %d\n", ns->regs.row);
1617                 else if (ns->regs.off < ns->geom.pgsz)
1618                         NS_LOG("read page %d (second half)\n", ns->regs.row);
1619                 else
1620                         NS_LOG("read OOB of page %d\n", ns->regs.row);
1621
1622                 NS_UDELAY(access_delay);
1623                 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1624
1625                 break;
1626
1627         case ACTION_SECERASE:
1628                 /*
1629                  * Erase sector.
1630                  */
1631
1632                 if (ns->lines.wp) {
1633                         NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1634                         return -1;
1635                 }
1636
1637                 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1638                         || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1639                         NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1640                         return -1;
1641                 }
1642
1643                 ns->regs.row = (ns->regs.row <<
1644                                 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1645                 ns->regs.column = 0;
1646
1647                 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1648
1649                 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1650                                 ns->regs.row, NS_RAW_OFFSET(ns));
1651                 NS_LOG("erase sector %u\n", erase_block_no);
1652
1653                 erase_sector(ns);
1654
1655                 NS_MDELAY(erase_delay);
1656
1657                 if (erase_block_wear)
1658                         update_wear(erase_block_no);
1659
1660                 if (erase_error(erase_block_no)) {
1661                         NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1662                         return -1;
1663                 }
1664
1665                 break;
1666
1667         case ACTION_PRGPAGE:
1668                 /*
1669                  * Program page - move internal buffer data to the page.
1670                  */
1671
1672                 if (ns->lines.wp) {
1673                         NS_WARN("do_state_action: device is write-protected, programm\n");
1674                         return -1;
1675                 }
1676
1677                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1678                 if (num != ns->regs.count) {
1679                         NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1680                                         ns->regs.count, num);
1681                         return -1;
1682                 }
1683
1684                 if (prog_page(ns, num) == -1)
1685                         return -1;
1686
1687                 page_no = ns->regs.row;
1688
1689                 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1690                         num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1691                 NS_LOG("programm page %d\n", ns->regs.row);
1692
1693                 NS_UDELAY(programm_delay);
1694                 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1695
1696                 if (write_error(page_no)) {
1697                         NS_WARN("simulating write failure in page %u\n", page_no);
1698                         return -1;
1699                 }
1700
1701                 break;
1702
1703         case ACTION_ZEROOFF:
1704                 NS_DBG("do_state_action: set internal offset to 0\n");
1705                 ns->regs.off = 0;
1706                 break;
1707
1708         case ACTION_HALFOFF:
1709                 if (!(ns->options & OPT_PAGE512_8BIT)) {
1710                         NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1711                                 "byte page size 8x chips\n");
1712                         return -1;
1713                 }
1714                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1715                 ns->regs.off = ns->geom.pgsz/2;
1716                 break;
1717
1718         case ACTION_OOBOFF:
1719                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1720                 ns->regs.off = ns->geom.pgsz;
1721                 break;
1722
1723         default:
1724                 NS_DBG("do_state_action: BUG! unknown action\n");
1725         }
1726
1727         return 0;
1728 }
1729
1730 /*
1731  * Switch simulator's state.
1732  */
1733 static void switch_state(struct nandsim *ns)
1734 {
1735         if (ns->op) {
1736                 /*
1737                  * The current operation have already been identified.
1738                  * Just follow the states chain.
1739                  */
1740
1741                 ns->stateidx += 1;
1742                 ns->state = ns->nxstate;
1743                 ns->nxstate = ns->op[ns->stateidx + 1];
1744
1745                 NS_DBG("switch_state: operation is known, switch to the next state, "
1746                         "state: %s, nxstate: %s\n",
1747                         get_state_name(ns->state), get_state_name(ns->nxstate));
1748
1749                 /* See, whether we need to do some action */
1750                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1751                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1752                         return;
1753                 }
1754
1755         } else {
1756                 /*
1757                  * We don't yet know which operation we perform.
1758                  * Try to identify it.
1759                  */
1760
1761                 /*
1762                  *  The only event causing the switch_state function to
1763                  *  be called with yet unknown operation is new command.
1764                  */
1765                 ns->state = get_state_by_command(ns->regs.command);
1766
1767                 NS_DBG("switch_state: operation is unknown, try to find it\n");
1768
1769                 if (find_operation(ns, 0) != 0)
1770                         return;
1771
1772                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1773                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1774                         return;
1775                 }
1776         }
1777
1778         /* For 16x devices column means the page offset in words */
1779         if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1780                 NS_DBG("switch_state: double the column number for 16x device\n");
1781                 ns->regs.column <<= 1;
1782         }
1783
1784         if (NS_STATE(ns->nxstate) == STATE_READY) {
1785                 /*
1786                  * The current state is the last. Return to STATE_READY
1787                  */
1788
1789                 u_char status = NS_STATUS_OK(ns);
1790
1791                 /* In case of data states, see if all bytes were input/output */
1792                 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1793                         && ns->regs.count != ns->regs.num) {
1794                         NS_WARN("switch_state: not all bytes were processed, %d left\n",
1795                                         ns->regs.num - ns->regs.count);
1796                         status = NS_STATUS_FAILED(ns);
1797                 }
1798
1799                 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1800
1801                 switch_to_ready_state(ns, status);
1802
1803                 return;
1804         } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1805                 /*
1806                  * If the next state is data input/output, switch to it now
1807                  */
1808
1809                 ns->state      = ns->nxstate;
1810                 ns->nxstate    = ns->op[++ns->stateidx + 1];
1811                 ns->regs.num   = ns->regs.count = 0;
1812
1813                 NS_DBG("switch_state: the next state is data I/O, switch, "
1814                         "state: %s, nxstate: %s\n",
1815                         get_state_name(ns->state), get_state_name(ns->nxstate));
1816
1817                 /*
1818                  * Set the internal register to the count of bytes which
1819                  * are expected to be input or output
1820                  */
1821                 switch (NS_STATE(ns->state)) {
1822                         case STATE_DATAIN:
1823                         case STATE_DATAOUT:
1824                                 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1825                                 break;
1826
1827                         case STATE_DATAOUT_ID:
1828                                 ns->regs.num = ns->geom.idbytes;
1829                                 break;
1830
1831                         case STATE_DATAOUT_STATUS:
1832                         case STATE_DATAOUT_STATUS_M:
1833                                 ns->regs.count = ns->regs.num = 0;
1834                                 break;
1835
1836                         default:
1837                                 NS_ERR("switch_state: BUG! unknown data state\n");
1838                 }
1839
1840         } else if (ns->nxstate & STATE_ADDR_MASK) {
1841                 /*
1842                  * If the next state is address input, set the internal
1843                  * register to the number of expected address bytes
1844                  */
1845
1846                 ns->regs.count = 0;
1847
1848                 switch (NS_STATE(ns->nxstate)) {
1849                         case STATE_ADDR_PAGE:
1850                                 ns->regs.num = ns->geom.pgaddrbytes;
1851
1852                                 break;
1853                         case STATE_ADDR_SEC:
1854                                 ns->regs.num = ns->geom.secaddrbytes;
1855                                 break;
1856
1857                         case STATE_ADDR_ZERO:
1858                                 ns->regs.num = 1;
1859                                 break;
1860
1861                         case STATE_ADDR_COLUMN:
1862                                 /* Column address is always 2 bytes */
1863                                 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes;
1864                                 break;
1865
1866                         default:
1867                                 NS_ERR("switch_state: BUG! unknown address state\n");
1868                 }
1869         } else {
1870                 /*
1871                  * Just reset internal counters.
1872                  */
1873
1874                 ns->regs.num = 0;
1875                 ns->regs.count = 0;
1876         }
1877 }
1878
1879 static u_char ns_nand_read_byte(struct mtd_info *mtd)
1880 {
1881         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1882         u_char outb = 0x00;
1883
1884         /* Sanity and correctness checks */
1885         if (!ns->lines.ce) {
1886                 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1887                 return outb;
1888         }
1889         if (ns->lines.ale || ns->lines.cle) {
1890                 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1891                 return outb;
1892         }
1893         if (!(ns->state & STATE_DATAOUT_MASK)) {
1894                 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1895                         "return %#x\n", get_state_name(ns->state), (uint)outb);
1896                 return outb;
1897         }
1898
1899         /* Status register may be read as many times as it is wanted */
1900         if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1901                 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1902                 return ns->regs.status;
1903         }
1904
1905         /* Check if there is any data in the internal buffer which may be read */
1906         if (ns->regs.count == ns->regs.num) {
1907                 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1908                 return outb;
1909         }
1910
1911         switch (NS_STATE(ns->state)) {
1912                 case STATE_DATAOUT:
1913                         if (ns->busw == 8) {
1914                                 outb = ns->buf.byte[ns->regs.count];
1915                                 ns->regs.count += 1;
1916                         } else {
1917                                 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1918                                 ns->regs.count += 2;
1919                         }
1920                         break;
1921                 case STATE_DATAOUT_ID:
1922                         NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1923                         outb = ns->ids[ns->regs.count];
1924                         ns->regs.count += 1;
1925                         break;
1926                 default:
1927                         BUG();
1928         }
1929
1930         if (ns->regs.count == ns->regs.num) {
1931                 NS_DBG("read_byte: all bytes were read\n");
1932
1933                 /*
1934                  * The OPT_AUTOINCR allows to read next consecutive pages without
1935                  * new read operation cycle.
1936                  */
1937                 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
1938                         ns->regs.count = 0;
1939                         if (ns->regs.row + 1 < ns->geom.pgnum)
1940                                 ns->regs.row += 1;
1941                         NS_DBG("read_byte: switch to the next page (%#x)\n", ns->regs.row);
1942                         do_state_action(ns, ACTION_CPY);
1943                 }
1944                 else if (NS_STATE(ns->nxstate) == STATE_READY)
1945                         switch_state(ns);
1946
1947         }
1948
1949         return outb;
1950 }
1951
1952 static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1953 {
1954         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1955
1956         /* Sanity and correctness checks */
1957         if (!ns->lines.ce) {
1958                 NS_ERR("write_byte: chip is disabled, ignore write\n");
1959                 return;
1960         }
1961         if (ns->lines.ale && ns->lines.cle) {
1962                 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1963                 return;
1964         }
1965
1966         if (ns->lines.cle == 1) {
1967                 /*
1968                  * The byte written is a command.
1969                  */
1970
1971                 if (byte == NAND_CMD_RESET) {
1972                         NS_LOG("reset chip\n");
1973                         switch_to_ready_state(ns, NS_STATUS_OK(ns));
1974                         return;
1975                 }
1976
1977                 /* Check that the command byte is correct */
1978                 if (check_command(byte)) {
1979                         NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
1980                         return;
1981                 }
1982
1983                 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
1984                         || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M
1985                         || NS_STATE(ns->state) == STATE_DATAOUT) {
1986                         int row = ns->regs.row;
1987
1988                         switch_state(ns);
1989                         if (byte == NAND_CMD_RNDOUT)
1990                                 ns->regs.row = row;
1991                 }
1992
1993                 /* Check if chip is expecting command */
1994                 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
1995                         /* Do not warn if only 2 id bytes are read */
1996                         if (!(ns->regs.command == NAND_CMD_READID &&
1997                             NS_STATE(ns->state) == STATE_DATAOUT_ID && ns->regs.count == 2)) {
1998                                 /*
1999                                  * We are in situation when something else (not command)
2000                                  * was expected but command was input. In this case ignore
2001                                  * previous command(s)/state(s) and accept the last one.
2002                                  */
2003                                 NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
2004                                         "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
2005                         }
2006                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2007                 }
2008
2009                 NS_DBG("command byte corresponding to %s state accepted\n",
2010                         get_state_name(get_state_by_command(byte)));
2011                 ns->regs.command = byte;
2012                 switch_state(ns);
2013
2014         } else if (ns->lines.ale == 1) {
2015                 /*
2016                  * The byte written is an address.
2017                  */
2018
2019                 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
2020
2021                         NS_DBG("write_byte: operation isn't known yet, identify it\n");
2022
2023                         if (find_operation(ns, 1) < 0)
2024                                 return;
2025
2026                         if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
2027                                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2028                                 return;
2029                         }
2030
2031                         ns->regs.count = 0;
2032                         switch (NS_STATE(ns->nxstate)) {
2033                                 case STATE_ADDR_PAGE:
2034                                         ns->regs.num = ns->geom.pgaddrbytes;
2035                                         break;
2036                                 case STATE_ADDR_SEC:
2037                                         ns->regs.num = ns->geom.secaddrbytes;
2038                                         break;
2039                                 case STATE_ADDR_ZERO:
2040                                         ns->regs.num = 1;
2041                                         break;
2042                                 default:
2043                                         BUG();
2044                         }
2045                 }
2046
2047                 /* Check that chip is expecting address */
2048                 if (!(ns->nxstate & STATE_ADDR_MASK)) {
2049                         NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
2050                                 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
2051                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2052                         return;
2053                 }
2054
2055                 /* Check if this is expected byte */
2056                 if (ns->regs.count == ns->regs.num) {
2057                         NS_ERR("write_byte: no more address bytes expected\n");
2058                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2059                         return;
2060                 }
2061
2062                 accept_addr_byte(ns, byte);
2063
2064                 ns->regs.count += 1;
2065
2066                 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
2067                                 (uint)byte, ns->regs.count, ns->regs.num);
2068
2069                 if (ns->regs.count == ns->regs.num) {
2070                         NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
2071                         switch_state(ns);
2072                 }
2073
2074         } else {
2075                 /*
2076                  * The byte written is an input data.
2077                  */
2078
2079                 /* Check that chip is expecting data input */
2080                 if (!(ns->state & STATE_DATAIN_MASK)) {
2081                         NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
2082                                 "switch to %s\n", (uint)byte,
2083                                 get_state_name(ns->state), get_state_name(STATE_READY));
2084                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2085                         return;
2086                 }
2087
2088                 /* Check if this is expected byte */
2089                 if (ns->regs.count == ns->regs.num) {
2090                         NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
2091                                         ns->regs.num);
2092                         return;
2093                 }
2094
2095                 if (ns->busw == 8) {
2096                         ns->buf.byte[ns->regs.count] = byte;
2097                         ns->regs.count += 1;
2098                 } else {
2099                         ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
2100                         ns->regs.count += 2;
2101                 }
2102         }
2103
2104         return;
2105 }
2106
2107 static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask)
2108 {
2109         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2110
2111         ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
2112         ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
2113         ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
2114
2115         if (cmd != NAND_CMD_NONE)
2116                 ns_nand_write_byte(mtd, cmd);
2117 }
2118
2119 static int ns_device_ready(struct mtd_info *mtd)
2120 {
2121         NS_DBG("device_ready\n");
2122         return 1;
2123 }
2124
2125 static uint16_t ns_nand_read_word(struct mtd_info *mtd)
2126 {
2127         struct nand_chip *chip = (struct nand_chip *)mtd->priv;
2128
2129         NS_DBG("read_word\n");
2130
2131         return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8);
2132 }
2133
2134 static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
2135 {
2136         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2137
2138         /* Check that chip is expecting data input */
2139         if (!(ns->state & STATE_DATAIN_MASK)) {
2140                 NS_ERR("write_buf: data input isn't expected, state is %s, "
2141                         "switch to STATE_READY\n", get_state_name(ns->state));
2142                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2143                 return;
2144         }
2145
2146         /* Check if these are expected bytes */
2147         if (ns->regs.count + len > ns->regs.num) {
2148                 NS_ERR("write_buf: too many input bytes\n");
2149                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2150                 return;
2151         }
2152
2153         memcpy(ns->buf.byte + ns->regs.count, buf, len);
2154         ns->regs.count += len;
2155
2156         if (ns->regs.count == ns->regs.num) {
2157                 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
2158         }
2159 }
2160
2161 static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
2162 {
2163         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2164
2165         /* Sanity and correctness checks */
2166         if (!ns->lines.ce) {
2167                 NS_ERR("read_buf: chip is disabled\n");
2168                 return;
2169         }
2170         if (ns->lines.ale || ns->lines.cle) {
2171                 NS_ERR("read_buf: ALE or CLE pin is high\n");
2172                 return;
2173         }
2174         if (!(ns->state & STATE_DATAOUT_MASK)) {
2175                 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
2176                         get_state_name(ns->state));
2177                 return;
2178         }
2179
2180         if (NS_STATE(ns->state) != STATE_DATAOUT) {
2181                 int i;
2182
2183                 for (i = 0; i < len; i++)
2184                         buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd);
2185
2186                 return;
2187         }
2188
2189         /* Check if these are expected bytes */
2190         if (ns->regs.count + len > ns->regs.num) {
2191                 NS_ERR("read_buf: too many bytes to read\n");
2192                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2193                 return;
2194         }
2195
2196         memcpy(buf, ns->buf.byte + ns->regs.count, len);
2197         ns->regs.count += len;
2198
2199         if (ns->regs.count == ns->regs.num) {
2200                 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
2201                         ns->regs.count = 0;
2202                         if (ns->regs.row + 1 < ns->geom.pgnum)
2203                                 ns->regs.row += 1;
2204                         NS_DBG("read_buf: switch to the next page (%#x)\n", ns->regs.row);
2205                         do_state_action(ns, ACTION_CPY);
2206                 }
2207                 else if (NS_STATE(ns->nxstate) == STATE_READY)
2208                         switch_state(ns);
2209         }
2210
2211         return;
2212 }
2213
2214 static int ns_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
2215 {
2216         ns_nand_read_buf(mtd, (u_char *)&ns_verify_buf[0], len);
2217
2218         if (!memcmp(buf, &ns_verify_buf[0], len)) {
2219                 NS_DBG("verify_buf: the buffer is OK\n");
2220                 return 0;
2221         } else {
2222                 NS_DBG("verify_buf: the buffer is wrong\n");
2223                 return -EFAULT;
2224         }
2225 }
2226
2227 /*
2228  * Module initialization function
2229  */
2230 static int __init ns_init_module(void)
2231 {
2232         struct nand_chip *chip;
2233         struct nandsim *nand;
2234         int retval = -ENOMEM, i;
2235
2236         if (bus_width != 8 && bus_width != 16) {
2237                 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
2238                 return -EINVAL;
2239         }
2240
2241         /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
2242         nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip)
2243                                 + sizeof(struct nandsim), GFP_KERNEL);
2244         if (!nsmtd) {
2245                 NS_ERR("unable to allocate core structures.\n");
2246                 return -ENOMEM;
2247         }
2248         chip        = (struct nand_chip *)(nsmtd + 1);
2249         nsmtd->priv = (void *)chip;
2250         nand        = (struct nandsim *)(chip + 1);
2251         chip->priv  = (void *)nand;
2252
2253         /*
2254          * Register simulator's callbacks.
2255          */
2256         chip->cmd_ctrl   = ns_hwcontrol;
2257         chip->read_byte  = ns_nand_read_byte;
2258         chip->dev_ready  = ns_device_ready;
2259         chip->write_buf  = ns_nand_write_buf;
2260         chip->read_buf   = ns_nand_read_buf;
2261         chip->verify_buf = ns_nand_verify_buf;
2262         chip->read_word  = ns_nand_read_word;
2263         chip->ecc.mode   = NAND_ECC_SOFT;
2264         /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
2265         /* and 'badblocks' parameters to work */
2266         chip->options   |= NAND_SKIP_BBTSCAN;
2267
2268         switch (bbt) {
2269         case 2:
2270                  chip->bbt_options |= NAND_BBT_NO_OOB;
2271         case 1:
2272                  chip->bbt_options |= NAND_BBT_USE_FLASH;
2273         case 0:
2274                 break;
2275         default:
2276                 NS_ERR("bbt has to be 0..2\n");
2277                 retval = -EINVAL;
2278                 goto error;
2279         }
2280         /*
2281          * Perform minimum nandsim structure initialization to handle
2282          * the initial ID read command correctly
2283          */
2284         if (third_id_byte != 0xFF || fourth_id_byte != 0xFF)
2285                 nand->geom.idbytes = 4;
2286         else
2287                 nand->geom.idbytes = 2;
2288         nand->regs.status = NS_STATUS_OK(nand);
2289         nand->nxstate = STATE_UNKNOWN;
2290         nand->options |= OPT_PAGE256; /* temporary value */
2291         nand->ids[0] = first_id_byte;
2292         nand->ids[1] = second_id_byte;
2293         nand->ids[2] = third_id_byte;
2294         nand->ids[3] = fourth_id_byte;
2295         if (bus_width == 16) {
2296                 nand->busw = 16;
2297                 chip->options |= NAND_BUSWIDTH_16;
2298         }
2299
2300         nsmtd->owner = THIS_MODULE;
2301
2302         if ((retval = parse_weakblocks()) != 0)
2303                 goto error;
2304
2305         if ((retval = parse_weakpages()) != 0)
2306                 goto error;
2307
2308         if ((retval = parse_gravepages()) != 0)
2309                 goto error;
2310
2311         retval = nand_scan_ident(nsmtd, 1, NULL);
2312         if (retval) {
2313                 NS_ERR("cannot scan NAND Simulator device\n");
2314                 if (retval > 0)
2315                         retval = -ENXIO;
2316                 goto error;
2317         }
2318
2319         if (bch) {
2320                 unsigned int eccsteps, eccbytes;
2321                 if (!mtd_nand_has_bch()) {
2322                         NS_ERR("BCH ECC support is disabled\n");
2323                         retval = -EINVAL;
2324                         goto error;
2325                 }
2326                 /* use 512-byte ecc blocks */
2327                 eccsteps = nsmtd->writesize/512;
2328                 eccbytes = (bch*13+7)/8;
2329                 /* do not bother supporting small page devices */
2330                 if ((nsmtd->oobsize < 64) || !eccsteps) {
2331                         NS_ERR("bch not available on small page devices\n");
2332                         retval = -EINVAL;
2333                         goto error;
2334                 }
2335                 if ((eccbytes*eccsteps+2) > nsmtd->oobsize) {
2336                         NS_ERR("invalid bch value %u\n", bch);
2337                         retval = -EINVAL;
2338                         goto error;
2339                 }
2340                 chip->ecc.mode = NAND_ECC_SOFT_BCH;
2341                 chip->ecc.size = 512;
2342                 chip->ecc.bytes = eccbytes;
2343                 NS_INFO("using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size);
2344         }
2345
2346         retval = nand_scan_tail(nsmtd);
2347         if (retval) {
2348                 NS_ERR("can't register NAND Simulator\n");
2349                 if (retval > 0)
2350                         retval = -ENXIO;
2351                 goto error;
2352         }
2353
2354         if (overridesize) {
2355                 uint64_t new_size = (uint64_t)nsmtd->erasesize << overridesize;
2356                 if (new_size >> overridesize != nsmtd->erasesize) {
2357                         NS_ERR("overridesize is too big\n");
2358                         retval = -EINVAL;
2359                         goto err_exit;
2360                 }
2361                 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2362                 nsmtd->size = new_size;
2363                 chip->chipsize = new_size;
2364                 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
2365                 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2366         }
2367
2368         if ((retval = setup_wear_reporting(nsmtd)) != 0)
2369                 goto err_exit;
2370
2371         if ((retval = init_nandsim(nsmtd)) != 0)
2372                 goto err_exit;
2373
2374         if ((retval = nand_default_bbt(nsmtd)) != 0)
2375                 goto err_exit;
2376
2377         if ((retval = parse_badblocks(nand, nsmtd)) != 0)
2378                 goto err_exit;
2379
2380         /* Register NAND partitions */
2381         retval = mtd_device_register(nsmtd, &nand->partitions[0],
2382                                      nand->nbparts);
2383         if (retval != 0)
2384                 goto err_exit;
2385
2386         return 0;
2387
2388 err_exit:
2389         free_nandsim(nand);
2390         nand_release(nsmtd);
2391         for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
2392                 kfree(nand->partitions[i].name);
2393 error:
2394         kfree(nsmtd);
2395         free_lists();
2396
2397         return retval;
2398 }
2399
2400 module_init(ns_init_module);
2401
2402 /*
2403  * Module clean-up function
2404  */
2405 static void __exit ns_cleanup_module(void)
2406 {
2407         struct nandsim *ns = ((struct nand_chip *)nsmtd->priv)->priv;
2408         int i;
2409
2410         free_nandsim(ns);    /* Free nandsim private resources */
2411         nand_release(nsmtd); /* Unregister driver */
2412         for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2413                 kfree(ns->partitions[i].name);
2414         kfree(nsmtd);        /* Free other structures */
2415         free_lists();
2416 }
2417
2418 module_exit(ns_cleanup_module);
2419
2420 MODULE_LICENSE ("GPL");
2421 MODULE_AUTHOR ("Artem B. Bityuckiy");
2422 MODULE_DESCRIPTION ("The NAND flash simulator");