drivers/mtd/chips/jedec_probe.c

   1 /*
   2    Common Flash Interface probe code.
   3    (C) 2000 Red Hat. GPL'd.
   4    See JEDEC (http://www.jedec.org/) standard JESD21C (section 3.5)
   5    for the standard this probe goes back to.
   6
   7    Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com
   8 */
   9
  10 #include <linux/module.h>
  11 #include <linux/init.h>
  12 #include <linux/types.h>
  13 #include <linux/kernel.h>
  14 #include <asm/io.h>
  15 #include <asm/byteorder.h>
  16 #include <linux/errno.h>
  17 #include <linux/slab.h>
  18 #include <linux/interrupt.h>
  19
  20 #include <linux/mtd/mtd.h>
  21 #include <linux/mtd/map.h>
  22 #include <linux/mtd/cfi.h>
  23 #include <linux/mtd/gen_probe.h>
  24
  25 /* AMD */
  26 #define AM29DL800BB     0x22CB
  27 #define AM29DL800BT     0x224A
  28
  29 #define AM29F800BB      0x2258
  30 #define AM29F800BT      0x22D6
  31 #define AM29LV400BB     0x22BA
  32 #define AM29LV400BT     0x22B9
  33 #define AM29LV800BB     0x225B
  34 #define AM29LV800BT     0x22DA
  35 #define AM29LV160DT     0x22C4
  36 #define AM29LV160DB     0x2249
  37 #define AM29F017D       0x003D
  38 #define AM29F016D       0x00AD
  39 #define AM29F080        0x00D5
  40 #define AM29F040        0x00A4
  41 #define AM29LV040B      0x004F
  42 #define AM29F032B       0x0041
  43 #define AM29F002T       0x00B0
  44 #define AM29SL800DB     0x226B
  45 #define AM29SL800DT     0x22EA
  46
  47 /* Atmel */
  48 #define AT49BV512       0x0003
  49 #define AT29LV512       0x003d
  50 #define AT49BV16X       0x00C0
  51 #define AT49BV16XT      0x00C2
  52 #define AT49BV32X       0x00C8
  53 #define AT49BV32XT      0x00C9
  54
  55 /* Eon */
  56 #define EN29SL800BB     0x226B
  57 #define EN29SL800BT     0x22EA
  58
  59 /* Fujitsu */
  60 #define MBM29F040C      0x00A4
  61 #define MBM29F800BA     0x2258
  62 #define MBM29LV650UE    0x22D7
  63 #define MBM29LV320TE    0x22F6
  64 #define MBM29LV320BE    0x22F9
  65 #define MBM29LV160TE    0x22C4
  66 #define MBM29LV160BE    0x2249
  67 #define MBM29LV800BA    0x225B
  68 #define MBM29LV800TA    0x22DA
  69 #define MBM29LV400TC    0x22B9
  70 #define MBM29LV400BC    0x22BA
  71
  72 /* Hyundai */
  73 #define HY29F002T       0x00B0
  74
  75 /* Intel */
  76 #define I28F004B3T      0x00d4
  77 #define I28F004B3B      0x00d5
  78 #define I28F400B3T      0x8894
  79 #define I28F400B3B      0x8895
  80 #define I28F008S5       0x00a6
  81 #define I28F016S5       0x00a0
  82 #define I28F008SA       0x00a2
  83 #define I28F008B3T      0x00d2
  84 #define I28F008B3B      0x00d3
  85 #define I28F800B3T      0x8892
  86 #define I28F800B3B      0x8893
  87 #define I28F016S3       0x00aa
  88 #define I28F016B3T      0x00d0
  89 #define I28F016B3B      0x00d1
  90 #define I28F160B3T      0x8890
  91 #define I28F160B3B      0x8891
  92 #define I28F320B3T      0x8896
  93 #define I28F320B3B      0x8897
  94 #define I28F640B3T      0x8898
  95 #define I28F640B3B      0x8899
  96 #define I28F640C3B      0x88CD
  97 #define I28F160F3T      0x88F3
  98 #define I28F160F3B      0x88F4
  99 #define I28F160C3T      0x88C2
 100 #define I28F160C3B      0x88C3
 101 #define I82802AB        0x00ad
 102 #define I82802AC        0x00ac
 103
 104 /* Macronix */
 105 #define MX29LV040C      0x004F
 106 #define MX29LV160T      0x22C4
 107 #define MX29LV160B      0x2249
 108 #define MX29F040        0x00A4
 109 #define MX29F016        0x00AD
 110 #define MX29F002T       0x00B0
 111 #define MX29F004T       0x0045
 112 #define MX29F004B       0x0046
 113
 114 /* NEC */
 115 #define UPD29F064115    0x221C
 116
 117 /* PMC */
 118 #define PM49FL002       0x006D
 119 #define PM49FL004       0x006E
 120 #define PM49FL008       0x006A
 121
 122 /* Sharp */
 123 #define LH28F640BF      0x00b0
 124
 125 /* ST - www.st.com */
 126 #define M29F800AB       0x0058
 127 #define M29W800DT       0x22D7
 128 #define M29W800DB       0x225B
 129 #define M29W400DT       0x00EE
 130 #define M29W400DB       0x00EF
 131 #define M29W160DT       0x22C4
 132 #define M29W160DB       0x2249
 133 #define M29W040B        0x00E3
 134 #define M50FW040        0x002C
 135 #define M50FW080        0x002D
 136 #define M50FW016        0x002E
 137 #define M50LPW080       0x002F
 138 #define M50FLW080A      0x0080
 139 #define M50FLW080B      0x0081
 140 #define PSD4256G6V      0x00e9
 141
 142 /* SST */
 143 #define SST29EE020      0x0010
 144 #define SST29LE020      0x0012
 145 #define SST29EE512      0x005d
 146 #define SST29LE512      0x003d
 147 #define SST39LF800      0x2781
 148 #define SST39LF160      0x2782
 149 #define SST39VF1601     0x234b
 150 #define SST39VF3201     0x235b
 151 #define SST39WF1601     0x274b
 152 #define SST39WF1602     0x274a
 153 #define SST39LF512      0x00D4
 154 #define SST39LF010      0x00D5
 155 #define SST39LF020      0x00D6
 156 #define SST39LF040      0x00D7
 157 #define SST39SF010A     0x00B5
 158 #define SST39SF020A     0x00B6
 159 #define SST39SF040      0x00B7
 160 #define SST49LF004B     0x0060
 161 #define SST49LF040B     0x0050
 162 #define SST49LF008A     0x005a
 163 #define SST49LF030A     0x001C
 164 #define SST49LF040A     0x0051
 165 #define SST49LF080A     0x005B
 166 #define SST36VF3203     0x7354
 167
 168 /* Toshiba */
 169 #define TC58FVT160      0x00C2
 170 #define TC58FVB160      0x0043
 171 #define TC58FVT321      0x009A
 172 #define TC58FVB321      0x009C
 173 #define TC58FVT641      0x0093
 174 #define TC58FVB641      0x0095
 175
 176 /* Winbond */
 177 #define W49V002A        0x00b0
 178
 179
 180 /*
 181  * Unlock address sets for AMD command sets.
 182  * Intel command sets use the MTD_UADDR_UNNECESSARY.
 183  * Each identifier, except MTD_UADDR_UNNECESSARY, and
 184  * MTD_UADDR_NO_SUPPORT must be defined below in unlock_addrs[].
 185  * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure
 186  * initialization need not require initializing all of the
 187  * unlock addresses for all bit widths.
 188  */
 189 enum uaddr {
 190         MTD_UADDR_NOT_SUPPORTED = 0,    /* data width not supported */
 191         MTD_UADDR_0x0555_0x02AA,
 192         MTD_UADDR_0x0555_0x0AAA,
 193         MTD_UADDR_0x5555_0x2AAA,
 194         MTD_UADDR_0x0AAA_0x0554,
 195         MTD_UADDR_0x0AAA_0x0555,
 196         MTD_UADDR_0xAAAA_0x5555,
 197         MTD_UADDR_DONT_CARE,            /* Requires an arbitrary address */
 198         MTD_UADDR_UNNECESSARY,          /* Does not require any address */
 199 };
 200
 201
 202 struct unlock_addr {
 203         uint32_t addr1;
 204         uint32_t addr2;
 205 };
 206
 207
 208 /*
 209  * I don't like the fact that the first entry in unlock_addrs[]
 210  * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore,
 211  * should not be used.  The  problem is that structures with
 212  * initializers have extra fields initialized to 0.  It is _very_
 213  * desirable to have the unlock address entries for unsupported
 214  * data widths automatically initialized - that means that
 215  * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here
 216  * must go unused.
 217  */
 218 static const struct unlock_addr  unlock_addrs[] = {
 219         [MTD_UADDR_NOT_SUPPORTED] = {
 220                 .addr1 = 0xffff,
 221                 .addr2 = 0xffff
 222         },
 223
 224         [MTD_UADDR_0x0555_0x02AA] = {
 225                 .addr1 = 0x0555,
 226                 .addr2 = 0x02aa
 227         },
 228
 229         [MTD_UADDR_0x0555_0x0AAA] = {
 230                 .addr1 = 0x0555,
 231                 .addr2 = 0x0aaa
 232         },
 233
 234         [MTD_UADDR_0x5555_0x2AAA] = {
 235                 .addr1 = 0x5555,
 236                 .addr2 = 0x2aaa
 237         },
 238
 239         [MTD_UADDR_0x0AAA_0x0554] = {
 240                 .addr1 = 0x0AAA,
 241                 .addr2 = 0x0554
 242         },
 243
 244         [MTD_UADDR_0x0AAA_0x0555] = {
 245                 .addr1 = 0x0AAA,
 246                 .addr2 = 0x0555
 247         },
 248
 249         [MTD_UADDR_0xAAAA_0x5555] = {
 250                 .addr1 = 0xaaaa,
 251                 .addr2 = 0x5555
 252         },
 253
 254         [MTD_UADDR_DONT_CARE] = {
 255                 .addr1 = 0x0000,      /* Doesn't matter which address */
 256                 .addr2 = 0x0000       /* is used - must be last entry */
 257         },
 258
 259         [MTD_UADDR_UNNECESSARY] = {
 260                 .addr1 = 0x0000,
 261                 .addr2 = 0x0000
 262         }
 263 };
 264
 265 struct amd_flash_info {
 266         const char *name;
 267         const uint16_t mfr_id;
 268         const uint16_t dev_id;
 269         const uint8_t dev_size;
 270         const uint8_t nr_regions;
 271         const uint16_t cmd_set;
 272         const uint32_t regions[6];
 273         const uint8_t devtypes;         /* Bitmask for x8, x16 etc. */
 274         const uint8_t uaddr;            /* unlock addrs for 8, 16, 32, 64 */
 275 };
 276
 277 #define ERASEINFO(size,blocks) (size<<8)|(blocks-1)
 278
 279 #define SIZE_64KiB  16
 280 #define SIZE_128KiB 17
 281 #define SIZE_256KiB 18
 282 #define SIZE_512KiB 19
 283 #define SIZE_1MiB   20
 284 #define SIZE_2MiB   21
 285 #define SIZE_4MiB   22
 286 #define SIZE_8MiB   23
 287
 288
 289 /*
 290  * Please keep this list ordered by manufacturer!
 291  * Fortunately, the list isn't searched often and so a
 292  * slow, linear search isn't so bad.
 293  */
 294 static const struct amd_flash_info jedec_table[] = {
 295         {
 296                 .mfr_id         = CFI_MFR_AMD,
 297                 .dev_id         = AM29F032B,
 298                 .name           = "AMD AM29F032B",
 299                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
 300                 .devtypes       = CFI_DEVICETYPE_X8,
 301                 .dev_size       = SIZE_4MiB,
 302                 .cmd_set        = P_ID_AMD_STD,
 303                 .nr_regions     = 1,
 304                 .regions        = {
 305                         ERASEINFO(0x10000,64)
 306                 }
 307         }, {
 308                 .mfr_id         = CFI_MFR_AMD,
 309                 .dev_id         = AM29LV160DT,
 310                 .name           = "AMD AM29LV160DT",
 311                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 312                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 313                 .dev_size       = SIZE_2MiB,
 314                 .cmd_set        = P_ID_AMD_STD,
 315                 .nr_regions     = 4,
 316                 .regions        = {
 317                         ERASEINFO(0x10000,31),
 318                         ERASEINFO(0x08000,1),
 319                         ERASEINFO(0x02000,2),
 320                         ERASEINFO(0x04000,1)
 321                 }
 322         }, {
 323                 .mfr_id         = CFI_MFR_AMD,
 324                 .dev_id         = AM29LV160DB,
 325                 .name           = "AMD AM29LV160DB",
 326                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 327                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 328                 .dev_size       = SIZE_2MiB,
 329                 .cmd_set        = P_ID_AMD_STD,
 330                 .nr_regions     = 4,
 331                 .regions        = {
 332                         ERASEINFO(0x04000,1),
 333                         ERASEINFO(0x02000,2),
 334                         ERASEINFO(0x08000,1),
 335                         ERASEINFO(0x10000,31)
 336                 }
 337         }, {
 338                 .mfr_id         = CFI_MFR_AMD,
 339                 .dev_id         = AM29LV400BB,
 340                 .name           = "AMD AM29LV400BB",
 341                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 342                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 343                 .dev_size       = SIZE_512KiB,
 344                 .cmd_set        = P_ID_AMD_STD,
 345                 .nr_regions     = 4,
 346                 .regions        = {
 347                         ERASEINFO(0x04000,1),
 348                         ERASEINFO(0x02000,2),
 349                         ERASEINFO(0x08000,1),
 350                         ERASEINFO(0x10000,7)
 351                 }
 352         }, {
 353                 .mfr_id         = CFI_MFR_AMD,
 354                 .dev_id         = AM29LV400BT,
 355                 .name           = "AMD AM29LV400BT",
 356                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 357                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 358                 .dev_size       = SIZE_512KiB,
 359                 .cmd_set        = P_ID_AMD_STD,
 360                 .nr_regions     = 4,
 361                 .regions        = {
 362                         ERASEINFO(0x10000,7),
 363                         ERASEINFO(0x08000,1),
 364                         ERASEINFO(0x02000,2),
 365                         ERASEINFO(0x04000,1)
 366                 }
 367         }, {
 368                 .mfr_id         = CFI_MFR_AMD,
 369                 .dev_id         = AM29LV800BB,
 370                 .name           = "AMD AM29LV800BB",
 371                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 372                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 373                 .dev_size       = SIZE_1MiB,
 374                 .cmd_set        = P_ID_AMD_STD,
 375                 .nr_regions     = 4,
 376                 .regions        = {
 377                         ERASEINFO(0x04000,1),
 378                         ERASEINFO(0x02000,2),
 379                         ERASEINFO(0x08000,1),
 380                         ERASEINFO(0x10000,15),
 381                 }
 382         }, {
 383 /* add DL */
 384                 .mfr_id         = CFI_MFR_AMD,
 385                 .dev_id         = AM29DL800BB,
 386                 .name           = "AMD AM29DL800BB",
 387                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 388                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 389                 .dev_size       = SIZE_1MiB,
 390                 .cmd_set        = P_ID_AMD_STD,
 391                 .nr_regions     = 6,
 392                 .regions        = {
 393                         ERASEINFO(0x04000,1),
 394                         ERASEINFO(0x08000,1),
 395                         ERASEINFO(0x02000,4),
 396                         ERASEINFO(0x08000,1),
 397                         ERASEINFO(0x04000,1),
 398                         ERASEINFO(0x10000,14)
 399                 }
 400         }, {
 401                 .mfr_id         = CFI_MFR_AMD,
 402                 .dev_id         = AM29DL800BT,
 403                 .name           = "AMD AM29DL800BT",
 404                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 405                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 406                 .dev_size       = SIZE_1MiB,
 407                 .cmd_set        = P_ID_AMD_STD,
 408                 .nr_regions     = 6,
 409                 .regions        = {
 410                         ERASEINFO(0x10000,14),
 411                         ERASEINFO(0x04000,1),
 412                         ERASEINFO(0x08000,1),
 413                         ERASEINFO(0x02000,4),
 414                         ERASEINFO(0x08000,1),
 415                         ERASEINFO(0x04000,1)
 416                 }
 417         }, {
 418                 .mfr_id         = CFI_MFR_AMD,
 419                 .dev_id         = AM29F800BB,
 420                 .name           = "AMD AM29F800BB",
 421                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 422                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 423                 .dev_size       = SIZE_1MiB,
 424                 .cmd_set        = P_ID_AMD_STD,
 425                 .nr_regions     = 4,
 426                 .regions        = {
 427                         ERASEINFO(0x04000,1),
 428                         ERASEINFO(0x02000,2),
 429                         ERASEINFO(0x08000,1),
 430                         ERASEINFO(0x10000,15),
 431                 }
 432         }, {
 433                 .mfr_id         = CFI_MFR_AMD,
 434                 .dev_id         = AM29LV800BT,
 435                 .name           = "AMD AM29LV800BT",
 436                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 437                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 438                 .dev_size       = SIZE_1MiB,
 439                 .cmd_set        = P_ID_AMD_STD,
 440                 .nr_regions     = 4,
 441                 .regions        = {
 442                         ERASEINFO(0x10000,15),
 443                         ERASEINFO(0x08000,1),
 444                         ERASEINFO(0x02000,2),
 445                         ERASEINFO(0x04000,1)
 446                 }
 447         }, {
 448                 .mfr_id         = CFI_MFR_AMD,
 449                 .dev_id         = AM29F800BT,
 450                 .name           = "AMD AM29F800BT",
 451                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 452                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 453                 .dev_size       = SIZE_1MiB,
 454                 .cmd_set        = P_ID_AMD_STD,
 455                 .nr_regions     = 4,
 456                 .regions        = {
 457                         ERASEINFO(0x10000,15),
 458                         ERASEINFO(0x08000,1),
 459                         ERASEINFO(0x02000,2),
 460                         ERASEINFO(0x04000,1)
 461                 }
 462         }, {
 463                 .mfr_id         = CFI_MFR_AMD,
 464                 .dev_id         = AM29F017D,
 465                 .name           = "AMD AM29F017D",
 466                 .devtypes       = CFI_DEVICETYPE_X8,
 467                 .uaddr          = MTD_UADDR_DONT_CARE,
 468                 .dev_size       = SIZE_2MiB,
 469                 .cmd_set        = P_ID_AMD_STD,
 470                 .nr_regions     = 1,
 471                 .regions        = {
 472                         ERASEINFO(0x10000,32),
 473                 }
 474         }, {
 475                 .mfr_id         = CFI_MFR_AMD,
 476                 .dev_id         = AM29F016D,
 477                 .name           = "AMD AM29F016D",
 478                 .devtypes       = CFI_DEVICETYPE_X8,
 479                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
 480                 .dev_size       = SIZE_2MiB,
 481                 .cmd_set        = P_ID_AMD_STD,
 482                 .nr_regions     = 1,
 483                 .regions        = {
 484                         ERASEINFO(0x10000,32),
 485                 }
 486         }, {
 487                 .mfr_id         = CFI_MFR_AMD,
 488                 .dev_id         = AM29F080,
 489                 .name           = "AMD AM29F080",
 490                 .devtypes       = CFI_DEVICETYPE_X8,
 491                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
 492                 .dev_size       = SIZE_1MiB,
 493                 .cmd_set        = P_ID_AMD_STD,
 494                 .nr_regions     = 1,
 495                 .regions        = {
 496                         ERASEINFO(0x10000,16),
 497                 }
 498         }, {
 499                 .mfr_id         = CFI_MFR_AMD,
 500                 .dev_id         = AM29F040,
 501                 .name           = "AMD AM29F040",
 502                 .devtypes       = CFI_DEVICETYPE_X8,
 503                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
 504                 .dev_size       = SIZE_512KiB,
 505                 .cmd_set        = P_ID_AMD_STD,
 506                 .nr_regions     = 1,
 507                 .regions        = {
 508                         ERASEINFO(0x10000,8),
 509                 }
 510         }, {
 511                 .mfr_id         = CFI_MFR_AMD,
 512                 .dev_id         = AM29LV040B,
 513                 .name           = "AMD AM29LV040B",
 514                 .devtypes       = CFI_DEVICETYPE_X8,
 515                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
 516                 .dev_size       = SIZE_512KiB,
 517                 .cmd_set        = P_ID_AMD_STD,
 518                 .nr_regions     = 1,
 519                 .regions        = {
 520                         ERASEINFO(0x10000,8),
 521                 }
 522         }, {
 523                 .mfr_id         = CFI_MFR_AMD,
 524                 .dev_id         = AM29F002T,
 525                 .name           = "AMD AM29F002T",
 526                 .devtypes       = CFI_DEVICETYPE_X8,
 527                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
 528                 .dev_size       = SIZE_256KiB,
 529                 .cmd_set        = P_ID_AMD_STD,
 530                 .nr_regions     = 4,
 531                 .regions        = {
 532                         ERASEINFO(0x10000,3),
 533                         ERASEINFO(0x08000,1),
 534                         ERASEINFO(0x02000,2),
 535                         ERASEINFO(0x04000,1),
 536                 }
 537         }, {
 538                 .mfr_id         = CFI_MFR_AMD,
 539                 .dev_id         = AM29SL800DT,
 540                 .name           = "AMD AM29SL800DT",
 541                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 542                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 543                 .dev_size       = SIZE_1MiB,
 544                 .cmd_set        = P_ID_AMD_STD,
 545                 .nr_regions     = 4,
 546                 .regions        = {
 547                         ERASEINFO(0x10000,15),
 548                         ERASEINFO(0x08000,1),
 549                         ERASEINFO(0x02000,2),
 550                         ERASEINFO(0x04000,1),
 551                 }
 552         }, {
 553                 .mfr_id         = CFI_MFR_AMD,
 554                 .dev_id         = AM29SL800DB,
 555                 .name           = "AMD AM29SL800DB",
 556                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 557                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 558                 .dev_size       = SIZE_1MiB,
 559                 .cmd_set        = P_ID_AMD_STD,
 560                 .nr_regions     = 4,
 561                 .regions        = {
 562                         ERASEINFO(0x04000,1),
 563                         ERASEINFO(0x02000,2),
 564                         ERASEINFO(0x08000,1),
 565                         ERASEINFO(0x10000,15),
 566                 }
 567         }, {
 568                 .mfr_id         = CFI_MFR_ATMEL,
 569                 .dev_id         = AT49BV512,
 570                 .name           = "Atmel AT49BV512",
 571                 .devtypes       = CFI_DEVICETYPE_X8,
 572                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
 573                 .dev_size       = SIZE_64KiB,
 574                 .cmd_set        = P_ID_AMD_STD,
 575                 .nr_regions     = 1,
 576                 .regions        = {
 577                         ERASEINFO(0x10000,1)
 578                 }
 579         }, {
 580                 .mfr_id         = CFI_MFR_ATMEL,
 581                 .dev_id         = AT29LV512,
 582                 .name           = "Atmel AT29LV512",
 583                 .devtypes       = CFI_DEVICETYPE_X8,
 584                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
 585                 .dev_size       = SIZE_64KiB,
 586                 .cmd_set        = P_ID_AMD_STD,
 587                 .nr_regions     = 1,
 588                 .regions        = {
 589                         ERASEINFO(0x80,256),
 590                         ERASEINFO(0x80,256)
 591                 }
 592         }, {
 593                 .mfr_id         = CFI_MFR_ATMEL,
 594                 .dev_id         = AT49BV16X,
 595                 .name           = "Atmel AT49BV16X",
 596                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 597                 .uaddr          = MTD_UADDR_0x0555_0x0AAA,      /* ???? */
 598                 .dev_size       = SIZE_2MiB,
 599                 .cmd_set        = P_ID_AMD_STD,
 600                 .nr_regions     = 2,
 601                 .regions        = {
 602                         ERASEINFO(0x02000,8),
 603                         ERASEINFO(0x10000,31)
 604                 }
 605         }, {
 606                 .mfr_id         = CFI_MFR_ATMEL,
 607                 .dev_id         = AT49BV16XT,
 608                 .name           = "Atmel AT49BV16XT",
 609                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 610                 .uaddr          = MTD_UADDR_0x0555_0x0AAA,      /* ???? */
 611                 .dev_size       = SIZE_2MiB,
 612                 .cmd_set        = P_ID_AMD_STD,
 613                 .nr_regions     = 2,
 614                 .regions        = {
 615                         ERASEINFO(0x10000,31),
 616                         ERASEINFO(0x02000,8)
 617                 }
 618         }, {
 619                 .mfr_id         = CFI_MFR_ATMEL,
 620                 .dev_id         = AT49BV32X,
 621                 .name           = "Atmel AT49BV32X",
 622                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 623                 .uaddr          = MTD_UADDR_0x0555_0x0AAA,      /* ???? */
 624                 .dev_size       = SIZE_4MiB,
 625                 .cmd_set        = P_ID_AMD_STD,
 626                 .nr_regions     = 2,
 627                 .regions        = {
 628                         ERASEINFO(0x02000,8),
 629                         ERASEINFO(0x10000,63)
 630                 }
 631         }, {
 632                 .mfr_id         = CFI_MFR_ATMEL,
 633                 .dev_id         = AT49BV32XT,
 634                 .name           = "Atmel AT49BV32XT",
 635                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 636                 .uaddr          = MTD_UADDR_0x0555_0x0AAA,      /* ???? */
 637                 .dev_size       = SIZE_4MiB,
 638                 .cmd_set        = P_ID_AMD_STD,
 639                 .nr_regions     = 2,
 640                 .regions        = {
 641                         ERASEINFO(0x10000,63),
 642                         ERASEINFO(0x02000,8)
 643                 }
 644         }, {
 645                 .mfr_id         = CFI_MFR_EON,
 646                 .dev_id         = EN29SL800BT,
 647                 .name           = "Eon EN29SL800BT",
 648                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 649                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 650                 .dev_size       = SIZE_1MiB,
 651                 .cmd_set        = P_ID_AMD_STD,
 652                 .nr_regions     = 4,
 653                 .regions        = {
 654                         ERASEINFO(0x10000,15),
 655                         ERASEINFO(0x08000,1),
 656                         ERASEINFO(0x02000,2),
 657                         ERASEINFO(0x04000,1),
 658                 }
 659         }, {
 660                 .mfr_id         = CFI_MFR_EON,
 661                 .dev_id         = EN29SL800BB,
 662                 .name           = "Eon EN29SL800BB",
 663                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 664                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 665                 .dev_size       = SIZE_1MiB,
 666                 .cmd_set        = P_ID_AMD_STD,
 667                 .nr_regions     = 4,
 668                 .regions        = {
 669                         ERASEINFO(0x04000,1),
 670                         ERASEINFO(0x02000,2),
 671                         ERASEINFO(0x08000,1),
 672                         ERASEINFO(0x10000,15),
 673                 }
 674         }, {
 675                 .mfr_id         = CFI_MFR_FUJITSU,
 676                 .dev_id         = MBM29F040C,
 677                 .name           = "Fujitsu MBM29F040C",
 678                 .devtypes       = CFI_DEVICETYPE_X8,
 679                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 680                 .dev_size       = SIZE_512KiB,
 681                 .cmd_set        = P_ID_AMD_STD,
 682                 .nr_regions     = 1,
 683                 .regions        = {
 684                         ERASEINFO(0x10000,8)
 685                 }
 686         }, {
 687                 .mfr_id         = CFI_MFR_FUJITSU,
 688                 .dev_id         = MBM29F800BA,
 689                 .name           = "Fujitsu MBM29F800BA",
 690                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 691                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 692                 .dev_size       = SIZE_1MiB,
 693                 .cmd_set        = P_ID_AMD_STD,
 694                 .nr_regions     = 4,
 695                 .regions        = {
 696                         ERASEINFO(0x04000,1),
 697                         ERASEINFO(0x02000,2),
 698                         ERASEINFO(0x08000,1),
 699                         ERASEINFO(0x10000,15),
 700                 }
 701         }, {
 702                 .mfr_id         = CFI_MFR_FUJITSU,
 703                 .dev_id         = MBM29LV650UE,
 704                 .name           = "Fujitsu MBM29LV650UE",
 705                 .devtypes       = CFI_DEVICETYPE_X8,
 706                 .uaddr          = MTD_UADDR_DONT_CARE,
 707                 .dev_size       = SIZE_8MiB,
 708                 .cmd_set        = P_ID_AMD_STD,
 709                 .nr_regions     = 1,
 710                 .regions        = {
 711                         ERASEINFO(0x10000,128)
 712                 }
 713         }, {
 714                 .mfr_id         = CFI_MFR_FUJITSU,
 715                 .dev_id         = MBM29LV320TE,
 716                 .name           = "Fujitsu MBM29LV320TE",
 717                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 718                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 719                 .dev_size       = SIZE_4MiB,
 720                 .cmd_set        = P_ID_AMD_STD,
 721                 .nr_regions     = 2,
 722                 .regions        = {
 723                         ERASEINFO(0x10000,63),
 724                         ERASEINFO(0x02000,8)
 725                 }
 726         }, {
 727                 .mfr_id         = CFI_MFR_FUJITSU,
 728                 .dev_id         = MBM29LV320BE,
 729                 .name           = "Fujitsu MBM29LV320BE",
 730                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 731                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 732                 .dev_size       = SIZE_4MiB,
 733                 .cmd_set        = P_ID_AMD_STD,
 734                 .nr_regions     = 2,
 735                 .regions        = {
 736                         ERASEINFO(0x02000,8),
 737                         ERASEINFO(0x10000,63)
 738                 }
 739         }, {
 740                 .mfr_id         = CFI_MFR_FUJITSU,
 741                 .dev_id         = MBM29LV160TE,
 742                 .name           = "Fujitsu MBM29LV160TE",
 743                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 744                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 745                 .dev_size       = SIZE_2MiB,
 746                 .cmd_set        = P_ID_AMD_STD,
 747                 .nr_regions     = 4,
 748                 .regions        = {
 749                         ERASEINFO(0x10000,31),
 750                         ERASEINFO(0x08000,1),
 751                         ERASEINFO(0x02000,2),
 752                         ERASEINFO(0x04000,1)
 753                 }
 754         }, {
 755                 .mfr_id         = CFI_MFR_FUJITSU,
 756                 .dev_id         = MBM29LV160BE,
 757                 .name           = "Fujitsu MBM29LV160BE",
 758                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 759                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 760                 .dev_size       = SIZE_2MiB,
 761                 .cmd_set        = P_ID_AMD_STD,
 762                 .nr_regions     = 4,
 763                 .regions        = {
 764                         ERASEINFO(0x04000,1),
 765                         ERASEINFO(0x02000,2),
 766                         ERASEINFO(0x08000,1),
 767                         ERASEINFO(0x10000,31)
 768                 }
 769         }, {
 770                 .mfr_id         = CFI_MFR_FUJITSU,
 771                 .dev_id         = MBM29LV800BA,
 772                 .name           = "Fujitsu MBM29LV800BA",
 773                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 774                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 775                 .dev_size       = SIZE_1MiB,
 776                 .cmd_set        = P_ID_AMD_STD,
 777                 .nr_regions     = 4,
 778                 .regions        = {
 779                         ERASEINFO(0x04000,1),
 780                         ERASEINFO(0x02000,2),
 781                         ERASEINFO(0x08000,1),
 782                         ERASEINFO(0x10000,15)
 783                 }
 784         }, {
 785                 .mfr_id         = CFI_MFR_FUJITSU,
 786                 .dev_id         = MBM29LV800TA,
 787                 .name           = "Fujitsu MBM29LV800TA",
 788                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 789                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 790                 .dev_size       = SIZE_1MiB,
 791                 .cmd_set        = P_ID_AMD_STD,
 792                 .nr_regions     = 4,
 793                 .regions        = {
 794                         ERASEINFO(0x10000,15),
 795                         ERASEINFO(0x08000,1),
 796                         ERASEINFO(0x02000,2),
 797                         ERASEINFO(0x04000,1)
 798                 }
 799         }, {
 800                 .mfr_id         = CFI_MFR_FUJITSU,
 801                 .dev_id         = MBM29LV400BC,
 802                 .name           = "Fujitsu MBM29LV400BC",
 803                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 804                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 805                 .dev_size       = SIZE_512KiB,
 806                 .cmd_set        = P_ID_AMD_STD,
 807                 .nr_regions     = 4,
 808                 .regions        = {
 809                         ERASEINFO(0x04000,1),
 810                         ERASEINFO(0x02000,2),
 811                         ERASEINFO(0x08000,1),
 812                         ERASEINFO(0x10000,7)
 813                 }
 814         }, {
 815                 .mfr_id         = CFI_MFR_FUJITSU,
 816                 .dev_id         = MBM29LV400TC,
 817                 .name           = "Fujitsu MBM29LV400TC",
 818                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 819                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 820                 .dev_size       = SIZE_512KiB,
 821                 .cmd_set        = P_ID_AMD_STD,
 822                 .nr_regions     = 4,
 823                 .regions        = {
 824                         ERASEINFO(0x10000,7),
 825                         ERASEINFO(0x08000,1),
 826                         ERASEINFO(0x02000,2),
 827                         ERASEINFO(0x04000,1)
 828                 }
 829         }, {
 830                 .mfr_id         = CFI_MFR_HYUNDAI,
 831                 .dev_id         = HY29F002T,
 832                 .name           = "Hyundai HY29F002T",
 833                 .devtypes       = CFI_DEVICETYPE_X8,
 834                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
 835                 .dev_size       = SIZE_256KiB,
 836                 .cmd_set        = P_ID_AMD_STD,
 837                 .nr_regions     = 4,
 838                 .regions        = {
 839                         ERASEINFO(0x10000,3),
 840                         ERASEINFO(0x08000,1),
 841                         ERASEINFO(0x02000,2),
 842                         ERASEINFO(0x04000,1),
 843                 }
 844         }, {
 845                 .mfr_id         = CFI_MFR_INTEL,
 846                 .dev_id         = I28F004B3B,
 847                 .name           = "Intel 28F004B3B",
 848                 .devtypes       = CFI_DEVICETYPE_X8,
 849                 .uaddr          = MTD_UADDR_UNNECESSARY,
 850                 .dev_size       = SIZE_512KiB,
 851                 .cmd_set        = P_ID_INTEL_STD,
 852                 .nr_regions     = 2,
 853                 .regions        = {
 854                         ERASEINFO(0x02000, 8),
 855                         ERASEINFO(0x10000, 7),
 856                 }
 857         }, {
 858                 .mfr_id         = CFI_MFR_INTEL,
 859                 .dev_id         = I28F004B3T,
 860                 .name           = "Intel 28F004B3T",
 861                 .devtypes       = CFI_DEVICETYPE_X8,
 862                 .uaddr          = MTD_UADDR_UNNECESSARY,
 863                 .dev_size       = SIZE_512KiB,
 864                 .cmd_set        = P_ID_INTEL_STD,
 865                 .nr_regions     = 2,
 866                 .regions        = {
 867                         ERASEINFO(0x10000, 7),
 868                         ERASEINFO(0x02000, 8),
 869                 }
 870         }, {
 871                 .mfr_id         = CFI_MFR_INTEL,
 872                 .dev_id         = I28F400B3B,
 873                 .name           = "Intel 28F400B3B",
 874                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 875                 .uaddr          = MTD_UADDR_UNNECESSARY,
 876                 .dev_size       = SIZE_512KiB,
 877                 .cmd_set        = P_ID_INTEL_STD,
 878                 .nr_regions     = 2,
 879                 .regions        = {
 880                         ERASEINFO(0x02000, 8),
 881                         ERASEINFO(0x10000, 7),
 882                 }
 883         }, {
 884                 .mfr_id         = CFI_MFR_INTEL,
 885                 .dev_id         = I28F400B3T,
 886                 .name           = "Intel 28F400B3T",
 887                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 888                 .uaddr          = MTD_UADDR_UNNECESSARY,
 889                 .dev_size       = SIZE_512KiB,
 890                 .cmd_set        = P_ID_INTEL_STD,
 891                 .nr_regions     = 2,
 892                 .regions        = {
 893                         ERASEINFO(0x10000, 7),
 894                         ERASEINFO(0x02000, 8),
 895                 }
 896         }, {
 897                 .mfr_id         = CFI_MFR_INTEL,
 898                 .dev_id         = I28F008B3B,
 899                 .name           = "Intel 28F008B3B",
 900                 .devtypes       = CFI_DEVICETYPE_X8,
 901                 .uaddr          = MTD_UADDR_UNNECESSARY,
 902                 .dev_size       = SIZE_1MiB,
 903                 .cmd_set        = P_ID_INTEL_STD,
 904                 .nr_regions     = 2,
 905                 .regions        = {
 906                         ERASEINFO(0x02000, 8),
 907                         ERASEINFO(0x10000, 15),
 908                 }
 909         }, {
 910                 .mfr_id         = CFI_MFR_INTEL,
 911                 .dev_id         = I28F008B3T,
 912                 .name           = "Intel 28F008B3T",
 913                 .devtypes       = CFI_DEVICETYPE_X8,
 914                 .uaddr          = MTD_UADDR_UNNECESSARY,
 915                 .dev_size       = SIZE_1MiB,
 916                 .cmd_set        = P_ID_INTEL_STD,
 917                 .nr_regions     = 2,
 918                 .regions        = {
 919                         ERASEINFO(0x10000, 15),
 920                         ERASEINFO(0x02000, 8),
 921                 }
 922         }, {
 923                 .mfr_id         = CFI_MFR_INTEL,
 924                 .dev_id         = I28F008S5,
 925                 .name           = "Intel 28F008S5",
 926                 .devtypes       = CFI_DEVICETYPE_X8,
 927                 .uaddr          = MTD_UADDR_UNNECESSARY,
 928                 .dev_size       = SIZE_1MiB,
 929                 .cmd_set        = P_ID_INTEL_EXT,
 930                 .nr_regions     = 1,
 931                 .regions        = {
 932                         ERASEINFO(0x10000,16),
 933                 }
 934         }, {
 935                 .mfr_id         = CFI_MFR_INTEL,
 936                 .dev_id         = I28F016S5,
 937                 .name           = "Intel 28F016S5",
 938                 .devtypes       = CFI_DEVICETYPE_X8,
 939                 .uaddr          = MTD_UADDR_UNNECESSARY,
 940                 .dev_size       = SIZE_2MiB,
 941                 .cmd_set        = P_ID_INTEL_EXT,
 942                 .nr_regions     = 1,
 943                 .regions        = {
 944                         ERASEINFO(0x10000,32),
 945                 }
 946         }, {
 947                 .mfr_id         = CFI_MFR_INTEL,
 948                 .dev_id         = I28F008SA,
 949                 .name           = "Intel 28F008SA",
 950                 .devtypes       = CFI_DEVICETYPE_X8,
 951                 .uaddr          = MTD_UADDR_UNNECESSARY,
 952                 .dev_size       = SIZE_1MiB,
 953                 .cmd_set        = P_ID_INTEL_STD,
 954                 .nr_regions     = 1,
 955                 .regions        = {
 956                         ERASEINFO(0x10000, 16),
 957                 }
 958         }, {
 959                 .mfr_id         = CFI_MFR_INTEL,
 960                 .dev_id         = I28F800B3B,
 961                 .name           = "Intel 28F800B3B",
 962                 .devtypes       = CFI_DEVICETYPE_X16,
 963                 .uaddr          = MTD_UADDR_UNNECESSARY,
 964                 .dev_size       = SIZE_1MiB,
 965                 .cmd_set        = P_ID_INTEL_STD,
 966                 .nr_regions     = 2,
 967                 .regions        = {
 968                         ERASEINFO(0x02000, 8),
 969                         ERASEINFO(0x10000, 15),
 970                 }
 971         }, {
 972                 .mfr_id         = CFI_MFR_INTEL,
 973                 .dev_id         = I28F800B3T,
 974                 .name           = "Intel 28F800B3T",
 975                 .devtypes       = CFI_DEVICETYPE_X16,
 976                 .uaddr          = MTD_UADDR_UNNECESSARY,
 977                 .dev_size       = SIZE_1MiB,
 978                 .cmd_set        = P_ID_INTEL_STD,
 979                 .nr_regions     = 2,
 980                 .regions        = {
 981                         ERASEINFO(0x10000, 15),
 982                         ERASEINFO(0x02000, 8),
 983                 }
 984         }, {
 985                 .mfr_id         = CFI_MFR_INTEL,
 986                 .dev_id         = I28F016B3B,
 987                 .name           = "Intel 28F016B3B",
 988                 .devtypes       = CFI_DEVICETYPE_X8,
 989                 .uaddr          = MTD_UADDR_UNNECESSARY,
 990                 .dev_size       = SIZE_2MiB,
 991                 .cmd_set        = P_ID_INTEL_STD,
 992                 .nr_regions     = 2,
 993                 .regions        = {
 994                         ERASEINFO(0x02000, 8),
 995                         ERASEINFO(0x10000, 31),
 996                 }
 997         }, {
 998                 .mfr_id         = CFI_MFR_INTEL,
 999                 .dev_id         = I28F016S3,
1000                 .name           = "Intel I28F016S3",
1001                 .devtypes       = CFI_DEVICETYPE_X8,
1002                 .uaddr          = MTD_UADDR_UNNECESSARY,
1003                 .dev_size       = SIZE_2MiB,
1004                 .cmd_set        = P_ID_INTEL_STD,
1005                 .nr_regions     = 1,
1006                 .regions        = {
1007                         ERASEINFO(0x10000, 32),
1008                 }
1009         }, {
1010                 .mfr_id         = CFI_MFR_INTEL,
1011                 .dev_id         = I28F016B3T,
1012                 .name           = "Intel 28F016B3T",
1013                 .devtypes       = CFI_DEVICETYPE_X8,
1014                 .uaddr          = MTD_UADDR_UNNECESSARY,
1015                 .dev_size       = SIZE_2MiB,
1016                 .cmd_set        = P_ID_INTEL_STD,
1017                 .nr_regions     = 2,
1018                 .regions        = {
1019                         ERASEINFO(0x10000, 31),
1020                         ERASEINFO(0x02000, 8),
1021                 }
1022         }, {
1023                 .mfr_id         = CFI_MFR_INTEL,
1024                 .dev_id         = I28F160B3B,
1025                 .name           = "Intel 28F160B3B",
1026                 .devtypes       = CFI_DEVICETYPE_X16,
1027                 .uaddr          = MTD_UADDR_UNNECESSARY,
1028                 .dev_size       = SIZE_2MiB,
1029                 .cmd_set        = P_ID_INTEL_STD,
1030                 .nr_regions     = 2,
1031                 .regions        = {
1032                         ERASEINFO(0x02000, 8),
1033                         ERASEINFO(0x10000, 31),
1034                 }
1035         }, {
1036                 .mfr_id         = CFI_MFR_INTEL,
1037                 .dev_id         = I28F160B3T,
1038                 .name           = "Intel 28F160B3T",
1039                 .devtypes       = CFI_DEVICETYPE_X16,
1040                 .uaddr          = MTD_UADDR_UNNECESSARY,
1041                 .dev_size       = SIZE_2MiB,
1042                 .cmd_set        = P_ID_INTEL_STD,
1043                 .nr_regions     = 2,
1044                 .regions        = {
1045                         ERASEINFO(0x10000, 31),
1046                         ERASEINFO(0x02000, 8),
1047                 }
1048         }, {
1049                 .mfr_id         = CFI_MFR_INTEL,
1050                 .dev_id         = I28F320B3B,
1051                 .name           = "Intel 28F320B3B",
1052                 .devtypes       = CFI_DEVICETYPE_X16,
1053                 .uaddr          = MTD_UADDR_UNNECESSARY,
1054                 .dev_size       = SIZE_4MiB,
1055                 .cmd_set        = P_ID_INTEL_STD,
1056                 .nr_regions     = 2,
1057                 .regions        = {
1058                         ERASEINFO(0x02000, 8),
1059                         ERASEINFO(0x10000, 63),
1060                 }
1061         }, {
1062                 .mfr_id         = CFI_MFR_INTEL,
1063                 .dev_id         = I28F320B3T,
1064                 .name           = "Intel 28F320B3T",
1065                 .devtypes       = CFI_DEVICETYPE_X16,
1066                 .uaddr          = MTD_UADDR_UNNECESSARY,
1067                 .dev_size       = SIZE_4MiB,
1068                 .cmd_set        = P_ID_INTEL_STD,
1069                 .nr_regions     = 2,
1070                 .regions        = {
1071                         ERASEINFO(0x10000, 63),
1072                         ERASEINFO(0x02000, 8),
1073                 }
1074         }, {
1075                 .mfr_id         = CFI_MFR_INTEL,
1076                 .dev_id         = I28F640B3B,
1077                 .name           = "Intel 28F640B3B",
1078                 .devtypes       = CFI_DEVICETYPE_X16,
1079                 .uaddr          = MTD_UADDR_UNNECESSARY,
1080                 .dev_size       = SIZE_8MiB,
1081                 .cmd_set        = P_ID_INTEL_STD,
1082                 .nr_regions     = 2,
1083                 .regions        = {
1084                         ERASEINFO(0x02000, 8),
1085                         ERASEINFO(0x10000, 127),
1086                 }
1087         }, {
1088                 .mfr_id         = CFI_MFR_INTEL,
1089                 .dev_id         = I28F640B3T,
1090                 .name           = "Intel 28F640B3T",
1091                 .devtypes       = CFI_DEVICETYPE_X16,
1092                 .uaddr          = MTD_UADDR_UNNECESSARY,
1093                 .dev_size       = SIZE_8MiB,
1094                 .cmd_set        = P_ID_INTEL_STD,
1095                 .nr_regions     = 2,
1096                 .regions        = {
1097                         ERASEINFO(0x10000, 127),
1098                         ERASEINFO(0x02000, 8),
1099                 }
1100         }, {
1101                 .mfr_id         = CFI_MFR_INTEL,
1102                 .dev_id         = I28F640C3B,
1103                 .name           = "Intel 28F640C3B",
1104                 .devtypes       = CFI_DEVICETYPE_X16,
1105                 .uaddr          = MTD_UADDR_UNNECESSARY,
1106                 .dev_size       = SIZE_8MiB,
1107                 .cmd_set        = P_ID_INTEL_STD,
1108                 .nr_regions     = 2,
1109                 .regions        = {
1110                         ERASEINFO(0x02000, 8),
1111                         ERASEINFO(0x10000, 127),
1112                 }
1113         }, {
1114                 .mfr_id         = CFI_MFR_INTEL,
1115                 .dev_id         = I82802AB,
1116                 .name           = "Intel 82802AB",
1117                 .devtypes       = CFI_DEVICETYPE_X8,
1118                 .uaddr          = MTD_UADDR_UNNECESSARY,
1119                 .dev_size       = SIZE_512KiB,
1120                 .cmd_set        = P_ID_INTEL_EXT,
1121                 .nr_regions     = 1,
1122                 .regions        = {
1123                         ERASEINFO(0x10000,8),
1124                 }
1125         }, {
1126                 .mfr_id         = CFI_MFR_INTEL,
1127                 .dev_id         = I82802AC,
1128                 .name           = "Intel 82802AC",
1129                 .devtypes       = CFI_DEVICETYPE_X8,
1130                 .uaddr          = MTD_UADDR_UNNECESSARY,
1131                 .dev_size       = SIZE_1MiB,
1132                 .cmd_set        = P_ID_INTEL_EXT,
1133                 .nr_regions     = 1,
1134                 .regions        = {
1135                         ERASEINFO(0x10000,16),
1136                 }
1137         }, {
1138                 .mfr_id         = CFI_MFR_MACRONIX,
1139                 .dev_id         = MX29LV040C,
1140                 .name           = "Macronix MX29LV040C",
1141                 .devtypes       = CFI_DEVICETYPE_X8,
1142                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
1143                 .dev_size       = SIZE_512KiB,
1144                 .cmd_set        = P_ID_AMD_STD,
1145                 .nr_regions     = 1,
1146                 .regions        = {
1147                         ERASEINFO(0x10000,8),
1148                 }
1149         }, {
1150                 .mfr_id         = CFI_MFR_MACRONIX,
1151                 .dev_id         = MX29LV160T,
1152                 .name           = "MXIC MX29LV160T",
1153                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1154                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1155                 .dev_size       = SIZE_2MiB,
1156                 .cmd_set        = P_ID_AMD_STD,
1157                 .nr_regions     = 4,
1158                 .regions        = {
1159                         ERASEINFO(0x10000,31),
1160                         ERASEINFO(0x08000,1),
1161                         ERASEINFO(0x02000,2),
1162                         ERASEINFO(0x04000,1)
1163                 }
1164         }, {
1165                 .mfr_id         = CFI_MFR_NEC,
1166                 .dev_id         = UPD29F064115,
1167                 .name           = "NEC uPD29F064115",
1168                 .devtypes       = CFI_DEVICETYPE_X16,
1169                 .uaddr          = MTD_UADDR_0xAAAA_0x5555,
1170                 .dev_size       = SIZE_8MiB,
1171                 .cmd_set        = P_ID_AMD_STD,
1172                 .nr_regions     = 3,
1173                 .regions        = {
1174                         ERASEINFO(0x2000,8),
1175                         ERASEINFO(0x10000,126),
1176                         ERASEINFO(0x2000,8),
1177                 }
1178         }, {
1179                 .mfr_id         = CFI_MFR_MACRONIX,
1180                 .dev_id         = MX29LV160B,
1181                 .name           = "MXIC MX29LV160B",
1182                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1183                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1184                 .dev_size       = SIZE_2MiB,
1185                 .cmd_set        = P_ID_AMD_STD,
1186                 .nr_regions     = 4,
1187                 .regions        = {
1188                         ERASEINFO(0x04000,1),
1189                         ERASEINFO(0x02000,2),
1190                         ERASEINFO(0x08000,1),
1191                         ERASEINFO(0x10000,31)
1192                 }
1193         }, {
1194                 .mfr_id         = CFI_MFR_MACRONIX,
1195                 .dev_id         = MX29F040,
1196                 .name           = "Macronix MX29F040",
1197                 .devtypes       = CFI_DEVICETYPE_X8,
1198                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
1199                 .dev_size       = SIZE_512KiB,
1200                 .cmd_set        = P_ID_AMD_STD,
1201                 .nr_regions     = 1,
1202                 .regions        = {
1203                         ERASEINFO(0x10000,8),
1204                 }
1205         }, {
1206                 .mfr_id         = CFI_MFR_MACRONIX,
1207                 .dev_id         = MX29F016,
1208                 .name           = "Macronix MX29F016",
1209                 .devtypes       = CFI_DEVICETYPE_X8,
1210                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
1211                 .dev_size       = SIZE_2MiB,
1212                 .cmd_set        = P_ID_AMD_STD,
1213                 .nr_regions     = 1,
1214                 .regions        = {
1215                         ERASEINFO(0x10000,32),
1216                 }
1217         }, {
1218                 .mfr_id         = CFI_MFR_MACRONIX,
1219                 .dev_id         = MX29F004T,
1220                 .name           = "Macronix MX29F004T",
1221                 .devtypes       = CFI_DEVICETYPE_X8,
1222                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
1223                 .dev_size       = SIZE_512KiB,
1224                 .cmd_set        = P_ID_AMD_STD,
1225                 .nr_regions     = 4,
1226                 .regions        = {
1227                         ERASEINFO(0x10000,7),
1228                         ERASEINFO(0x08000,1),
1229                         ERASEINFO(0x02000,2),
1230                         ERASEINFO(0x04000,1),
1231                 }
1232         }, {
1233                 .mfr_id         = CFI_MFR_MACRONIX,
1234                 .dev_id         = MX29F004B,
1235                 .name           = "Macronix MX29F004B",
1236                 .devtypes       = CFI_DEVICETYPE_X8,
1237                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
1238                 .dev_size       = SIZE_512KiB,
1239                 .cmd_set        = P_ID_AMD_STD,
1240                 .nr_regions     = 4,
1241                 .regions        = {
1242                         ERASEINFO(0x04000,1),
1243                         ERASEINFO(0x02000,2),
1244                         ERASEINFO(0x08000,1),
1245                         ERASEINFO(0x10000,7),
1246                 }
1247         }, {
1248                 .mfr_id         = CFI_MFR_MACRONIX,
1249                 .dev_id         = MX29F002T,
1250                 .name           = "Macronix MX29F002T",
1251                 .devtypes       = CFI_DEVICETYPE_X8,
1252                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
1253                 .dev_size       = SIZE_256KiB,
1254                 .cmd_set        = P_ID_AMD_STD,
1255                 .nr_regions     = 4,
1256                 .regions        = {
1257                         ERASEINFO(0x10000,3),
1258                         ERASEINFO(0x08000,1),
1259                         ERASEINFO(0x02000,2),
1260                         ERASEINFO(0x04000,1),
1261                 }
1262         }, {
1263                 .mfr_id         = CFI_MFR_PMC,
1264                 .dev_id         = PM49FL002,
1265                 .name           = "PMC Pm49FL002",
1266                 .devtypes       = CFI_DEVICETYPE_X8,
1267                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1268                 .dev_size       = SIZE_256KiB,
1269                 .cmd_set        = P_ID_AMD_STD,
1270                 .nr_regions     = 1,
1271                 .regions        = {
1272                         ERASEINFO( 0x01000, 64 )
1273                 }
1274         }, {
1275                 .mfr_id         = CFI_MFR_PMC,
1276                 .dev_id         = PM49FL004,
1277                 .name           = "PMC Pm49FL004",
1278                 .devtypes       = CFI_DEVICETYPE_X8,
1279                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1280                 .dev_size       = SIZE_512KiB,
1281                 .cmd_set        = P_ID_AMD_STD,
1282                 .nr_regions     = 1,
1283                 .regions        = {
1284                         ERASEINFO( 0x01000, 128 )
1285                 }
1286         }, {
1287                 .mfr_id         = CFI_MFR_PMC,
1288                 .dev_id         = PM49FL008,
1289                 .name           = "PMC Pm49FL008",
1290                 .devtypes       = CFI_DEVICETYPE_X8,
1291                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1292                 .dev_size       = SIZE_1MiB,
1293                 .cmd_set        = P_ID_AMD_STD,
1294                 .nr_regions     = 1,
1295                 .regions        = {
1296                         ERASEINFO( 0x01000, 256 )
1297                 }
1298         }, {
1299                 .mfr_id         = CFI_MFR_SHARP,
1300                 .dev_id         = LH28F640BF,
1301                 .name           = "LH28F640BF",
1302                 .devtypes       = CFI_DEVICETYPE_X8,
1303                 .uaddr          = MTD_UADDR_UNNECESSARY,
1304                 .dev_size       = SIZE_4MiB,
1305                 .cmd_set        = P_ID_INTEL_STD,
1306                 .nr_regions     = 1,
1307                 .regions        = {
1308                         ERASEINFO(0x40000,16),
1309                 }
1310         }, {
1311                 .mfr_id         = CFI_MFR_SST,
1312                 .dev_id         = SST39LF512,
1313                 .name           = "SST 39LF512",
1314                 .devtypes       = CFI_DEVICETYPE_X8,
1315                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1316                 .dev_size       = SIZE_64KiB,
1317                 .cmd_set        = P_ID_AMD_STD,
1318                 .nr_regions     = 1,
1319                 .regions        = {
1320                         ERASEINFO(0x01000,16),
1321                 }
1322         }, {
1323                 .mfr_id         = CFI_MFR_SST,
1324                 .dev_id         = SST39LF010,
1325                 .name           = "SST 39LF010",
1326                 .devtypes       = CFI_DEVICETYPE_X8,
1327                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1328                 .dev_size       = SIZE_128KiB,
1329                 .cmd_set        = P_ID_AMD_STD,
1330                 .nr_regions     = 1,
1331                 .regions        = {
1332                         ERASEINFO(0x01000,32),
1333                 }
1334         }, {
1335                 .mfr_id         = CFI_MFR_SST,
1336                 .dev_id         = SST29EE020,
1337                 .name           = "SST 29EE020",
1338                 .devtypes       = CFI_DEVICETYPE_X8,
1339                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1340                 .dev_size       = SIZE_256KiB,
1341                 .cmd_set        = P_ID_SST_PAGE,
1342                 .nr_regions     = 1,
1343                 .regions = {ERASEINFO(0x01000,64),
1344                 }
1345         }, {
1346                 .mfr_id         = CFI_MFR_SST,
1347                 .dev_id         = SST29LE020,
1348                 .name           = "SST 29LE020",
1349                 .devtypes       = CFI_DEVICETYPE_X8,
1350                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1351                 .dev_size       = SIZE_256KiB,
1352                 .cmd_set        = P_ID_SST_PAGE,
1353                 .nr_regions     = 1,
1354                 .regions = {ERASEINFO(0x01000,64),
1355                 }
1356         }, {
1357                 .mfr_id         = CFI_MFR_SST,
1358                 .dev_id         = SST39LF020,
1359                 .name           = "SST 39LF020",
1360                 .devtypes       = CFI_DEVICETYPE_X8,
1361                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1362                 .dev_size       = SIZE_256KiB,
1363                 .cmd_set        = P_ID_AMD_STD,
1364                 .nr_regions     = 1,
1365                 .regions        = {
1366                         ERASEINFO(0x01000,64),
1367                 }
1368         }, {
1369                 .mfr_id         = CFI_MFR_SST,
1370                 .dev_id         = SST39LF040,
1371                 .name           = "SST 39LF040",
1372                 .devtypes       = CFI_DEVICETYPE_X8,
1373                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1374                 .dev_size       = SIZE_512KiB,
1375                 .cmd_set        = P_ID_AMD_STD,
1376                 .nr_regions     = 1,
1377                 .regions        = {
1378                         ERASEINFO(0x01000,128),
1379                 }
1380         }, {
1381                 .mfr_id         = CFI_MFR_SST,
1382                 .dev_id         = SST39SF010A,
1383                 .name           = "SST 39SF010A",
1384                 .devtypes       = CFI_DEVICETYPE_X8,
1385                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1386                 .dev_size       = SIZE_128KiB,
1387                 .cmd_set        = P_ID_AMD_STD,
1388                 .nr_regions     = 1,
1389                 .regions        = {
1390                         ERASEINFO(0x01000,32),
1391                 }
1392         }, {
1393                 .mfr_id         = CFI_MFR_SST,
1394                 .dev_id         = SST39SF020A,
1395                 .name           = "SST 39SF020A",
1396                 .devtypes       = CFI_DEVICETYPE_X8,
1397                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1398                 .dev_size       = SIZE_256KiB,
1399                 .cmd_set        = P_ID_AMD_STD,
1400                 .nr_regions     = 1,
1401                 .regions        = {
1402                         ERASEINFO(0x01000,64),
1403                 }
1404         }, {
1405                 .mfr_id         = CFI_MFR_SST,
1406                 .dev_id         = SST39SF040,
1407                 .name           = "SST 39SF040",
1408                 .devtypes       = CFI_DEVICETYPE_X8,
1409                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1410                 .dev_size       = SIZE_512KiB,
1411                 .cmd_set        = P_ID_AMD_STD,
1412                 .nr_regions     = 1,
1413                 .regions        = {
1414                         ERASEINFO(0x01000,128),
1415                 }
1416         }, {
1417                 .mfr_id         = CFI_MFR_SST,
1418                 .dev_id         = SST49LF040B,
1419                 .name           = "SST 49LF040B",
1420                 .devtypes       = CFI_DEVICETYPE_X8,
1421                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1422                 .dev_size       = SIZE_512KiB,
1423                 .cmd_set        = P_ID_AMD_STD,
1424                 .nr_regions     = 1,
1425                 .regions        = {
1426                         ERASEINFO(0x01000,128),
1427                 }
1428         }, {
1429
1430                 .mfr_id         = CFI_MFR_SST,
1431                 .dev_id         = SST49LF004B,
1432                 .name           = "SST 49LF004B",
1433                 .devtypes       = CFI_DEVICETYPE_X8,
1434                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1435                 .dev_size       = SIZE_512KiB,
1436                 .cmd_set        = P_ID_AMD_STD,
1437                 .nr_regions     = 1,
1438                 .regions        = {
1439                         ERASEINFO(0x01000,128),
1440                 }
1441         }, {
1442                 .mfr_id         = CFI_MFR_SST,
1443                 .dev_id         = SST49LF008A,
1444                 .name           = "SST 49LF008A",
1445                 .devtypes       = CFI_DEVICETYPE_X8,
1446                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1447                 .dev_size       = SIZE_1MiB,
1448                 .cmd_set        = P_ID_AMD_STD,
1449                 .nr_regions     = 1,
1450                 .regions        = {
1451                         ERASEINFO(0x01000,256),
1452                 }
1453         }, {
1454                 .mfr_id         = CFI_MFR_SST,
1455                 .dev_id         = SST49LF030A,
1456                 .name           = "SST 49LF030A",
1457                 .devtypes       = CFI_DEVICETYPE_X8,
1458                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1459                 .dev_size       = SIZE_512KiB,
1460                 .cmd_set        = P_ID_AMD_STD,
1461                 .nr_regions     = 1,
1462                 .regions        = {
1463                         ERASEINFO(0x01000,96),
1464                 }
1465         }, {
1466                 .mfr_id         = CFI_MFR_SST,
1467                 .dev_id         = SST49LF040A,
1468                 .name           = "SST 49LF040A",
1469                 .devtypes       = CFI_DEVICETYPE_X8,
1470                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1471                 .dev_size       = SIZE_512KiB,
1472                 .cmd_set        = P_ID_AMD_STD,
1473                 .nr_regions     = 1,
1474                 .regions        = {
1475                         ERASEINFO(0x01000,128),
1476                 }
1477         }, {
1478                 .mfr_id         = CFI_MFR_SST,
1479                 .dev_id         = SST49LF080A,
1480                 .name           = "SST 49LF080A",
1481                 .devtypes       = CFI_DEVICETYPE_X8,
1482                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1483                 .dev_size       = SIZE_1MiB,
1484                 .cmd_set        = P_ID_AMD_STD,
1485                 .nr_regions     = 1,
1486                 .regions        = {
1487                         ERASEINFO(0x01000,256),
1488                 }
1489         }, {
1490                 .mfr_id         = CFI_MFR_SST,     /* should be CFI */
1491                 .dev_id         = SST39LF160,
1492                 .name           = "SST 39LF160",
1493                 .devtypes       = CFI_DEVICETYPE_X16,
1494                 .uaddr          = MTD_UADDR_0xAAAA_0x5555,
1495                 .dev_size       = SIZE_2MiB,
1496                 .cmd_set        = P_ID_AMD_STD,
1497                 .nr_regions     = 2,
1498                 .regions        = {
1499                         ERASEINFO(0x1000,256),
1500                         ERASEINFO(0x1000,256)
1501                 }
1502         }, {
1503                 .mfr_id         = CFI_MFR_SST,     /* should be CFI */
1504                 .dev_id         = SST39VF1601,
1505                 .name           = "SST 39VF1601",
1506                 .devtypes       = CFI_DEVICETYPE_X16,
1507                 .uaddr          = MTD_UADDR_0xAAAA_0x5555,
1508                 .dev_size       = SIZE_2MiB,
1509                 .cmd_set        = P_ID_AMD_STD,
1510                 .nr_regions     = 2,
1511                 .regions        = {
1512                         ERASEINFO(0x1000,256),
1513                         ERASEINFO(0x1000,256)
1514                 }
1515         }, {
1516                 /* CFI is broken: reports AMD_STD, but needs custom uaddr */
1517                 .mfr_id         = CFI_MFR_SST,
1518                 .dev_id         = SST39WF1601,
1519                 .name           = "SST 39WF1601",
1520                 .devtypes       = CFI_DEVICETYPE_X16,
1521                 .uaddr          = MTD_UADDR_0xAAAA_0x5555,
1522                 .dev_size       = SIZE_2MiB,
1523                 .cmd_set        = P_ID_AMD_STD,
1524                 .nr_regions     = 2,
1525                 .regions        = {
1526                         ERASEINFO(0x1000,256),
1527                         ERASEINFO(0x1000,256)
1528                 }
1529         }, {
1530                 /* CFI is broken: reports AMD_STD, but needs custom uaddr */
1531                 .mfr_id         = CFI_MFR_SST,
1532                 .dev_id         = SST39WF1602,
1533                 .name           = "SST 39WF1602",
1534                 .devtypes       = CFI_DEVICETYPE_X16,
1535                 .uaddr          = MTD_UADDR_0xAAAA_0x5555,
1536                 .dev_size       = SIZE_2MiB,
1537                 .cmd_set        = P_ID_AMD_STD,
1538                 .nr_regions     = 2,
1539                 .regions        = {
1540                         ERASEINFO(0x1000,256),
1541                         ERASEINFO(0x1000,256)
1542                 }
1543         }, {
1544                 .mfr_id         = CFI_MFR_SST,     /* should be CFI */
1545                 .dev_id         = SST39VF3201,
1546                 .name           = "SST 39VF3201",
1547                 .devtypes       = CFI_DEVICETYPE_X16,
1548                 .uaddr          = MTD_UADDR_0xAAAA_0x5555,
1549                 .dev_size       = SIZE_4MiB,
1550                 .cmd_set        = P_ID_AMD_STD,
1551                 .nr_regions     = 4,
1552                 .regions        = {
1553                         ERASEINFO(0x1000,256),
1554                         ERASEINFO(0x1000,256),
1555                         ERASEINFO(0x1000,256),
1556                         ERASEINFO(0x1000,256)
1557                 }
1558         }, {
1559                 .mfr_id         = CFI_MFR_SST,
1560                 .dev_id         = SST36VF3203,
1561                 .name           = "SST 36VF3203",
1562                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1563                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1564                 .dev_size       = SIZE_4MiB,
1565                 .cmd_set        = P_ID_AMD_STD,
1566                 .nr_regions     = 1,
1567                 .regions        = {
1568                         ERASEINFO(0x10000,64),
1569                 }
1570         }, {
1571                 .mfr_id         = CFI_MFR_ST,
1572                 .dev_id         = M29F800AB,
1573                 .name           = "ST M29F800AB",
1574                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1575                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1576                 .dev_size       = SIZE_1MiB,
1577                 .cmd_set        = P_ID_AMD_STD,
1578                 .nr_regions     = 4,
1579                 .regions        = {
1580                         ERASEINFO(0x04000,1),
1581                         ERASEINFO(0x02000,2),
1582                         ERASEINFO(0x08000,1),
1583                         ERASEINFO(0x10000,15),
1584                 }
1585         }, {
1586                 .mfr_id         = CFI_MFR_ST,   /* FIXME - CFI device? */
1587                 .dev_id         = M29W800DT,
1588                 .name           = "ST M29W800DT",
1589                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1590                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1591                 .dev_size       = SIZE_1MiB,
1592                 .cmd_set        = P_ID_AMD_STD,
1593                 .nr_regions     = 4,
1594                 .regions        = {
1595                         ERASEINFO(0x10000,15),
1596                         ERASEINFO(0x08000,1),
1597                         ERASEINFO(0x02000,2),
1598                         ERASEINFO(0x04000,1)
1599                 }
1600         }, {
1601                 .mfr_id         = CFI_MFR_ST,   /* FIXME - CFI device? */
1602                 .dev_id         = M29W800DB,
1603                 .name           = "ST M29W800DB",
1604                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1605                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1606                 .dev_size       = SIZE_1MiB,
1607                 .cmd_set        = P_ID_AMD_STD,
1608                 .nr_regions     = 4,
1609                 .regions        = {
1610                         ERASEINFO(0x04000,1),
1611                         ERASEINFO(0x02000,2),
1612                         ERASEINFO(0x08000,1),
1613                         ERASEINFO(0x10000,15)
1614                 }
1615         },  {
1616                 .mfr_id         = CFI_MFR_ST,
1617                 .dev_id         = M29W400DT,
1618                 .name           = "ST M29W400DT",
1619                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1620                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1621                 .dev_size       = SIZE_512KiB,
1622                 .cmd_set        = P_ID_AMD_STD,
1623                 .nr_regions     = 4,
1624                 .regions        = {
1625                         ERASEINFO(0x04000,7),
1626                         ERASEINFO(0x02000,1),
1627                         ERASEINFO(0x08000,2),
1628                         ERASEINFO(0x10000,1)
1629                 }
1630         }, {
1631                 .mfr_id         = CFI_MFR_ST,
1632                 .dev_id         = M29W400DB,
1633                 .name           = "ST M29W400DB",
1634                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1635                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1636                 .dev_size       = SIZE_512KiB,
1637                 .cmd_set        = P_ID_AMD_STD,
1638                 .nr_regions     = 4,
1639                 .regions        = {
1640                         ERASEINFO(0x04000,1),
1641                         ERASEINFO(0x02000,2),
1642                         ERASEINFO(0x08000,1),
1643                         ERASEINFO(0x10000,7)
1644                 }
1645         }, {
1646                 .mfr_id         = CFI_MFR_ST,   /* FIXME - CFI device? */
1647                 .dev_id         = M29W160DT,
1648                 .name           = "ST M29W160DT",
1649                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1650                 .uaddr          = MTD_UADDR_0x0555_0x02AA,      /* ???? */
1651                 .dev_size       = SIZE_2MiB,
1652                 .cmd_set        = P_ID_AMD_STD,
1653                 .nr_regions     = 4,
1654                 .regions        = {
1655                         ERASEINFO(0x10000,31),
1656                         ERASEINFO(0x08000,1),
1657                         ERASEINFO(0x02000,2),
1658                         ERASEINFO(0x04000,1)
1659                 }
1660         }, {
1661                 .mfr_id         = CFI_MFR_ST,   /* FIXME - CFI device? */
1662                 .dev_id         = M29W160DB,
1663                 .name           = "ST M29W160DB",
1664                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1665                 .uaddr          = MTD_UADDR_0x0555_0x02AA,      /* ???? */
1666                 .dev_size       = SIZE_2MiB,
1667                 .cmd_set        = P_ID_AMD_STD,
1668                 .nr_regions     = 4,
1669                 .regions        = {
1670                         ERASEINFO(0x04000,1),
1671                         ERASEINFO(0x02000,2),
1672                         ERASEINFO(0x08000,1),
1673                         ERASEINFO(0x10000,31)
1674                 }
1675         }, {
1676                 .mfr_id         = CFI_MFR_ST,
1677                 .dev_id         = M29W040B,
1678                 .name           = "ST M29W040B",
1679                 .devtypes       = CFI_DEVICETYPE_X8,
1680                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
1681                 .dev_size       = SIZE_512KiB,
1682                 .cmd_set        = P_ID_AMD_STD,
1683                 .nr_regions     = 1,
1684                 .regions        = {
1685                         ERASEINFO(0x10000,8),
1686                 }
1687         }, {
1688                 .mfr_id         = CFI_MFR_ST,
1689                 .dev_id         = M50FW040,
1690                 .name           = "ST M50FW040",
1691                 .devtypes       = CFI_DEVICETYPE_X8,
1692                 .uaddr          = MTD_UADDR_UNNECESSARY,
1693                 .dev_size       = SIZE_512KiB,
1694                 .cmd_set        = P_ID_INTEL_EXT,
1695                 .nr_regions     = 1,
1696                 .regions        = {
1697                         ERASEINFO(0x10000,8),
1698                 }
1699         }, {
1700                 .mfr_id         = CFI_MFR_ST,
1701                 .dev_id         = M50FW080,
1702                 .name           = "ST M50FW080",
1703                 .devtypes       = CFI_DEVICETYPE_X8,
1704                 .uaddr          = MTD_UADDR_UNNECESSARY,
1705                 .dev_size       = SIZE_1MiB,
1706                 .cmd_set        = P_ID_INTEL_EXT,
1707                 .nr_regions     = 1,
1708                 .regions        = {
1709                         ERASEINFO(0x10000,16),
1710                 }
1711         }, {
1712                 .mfr_id         = CFI_MFR_ST,
1713                 .dev_id         = M50FW016,
1714                 .name           = "ST M50FW016",
1715                 .devtypes       = CFI_DEVICETYPE_X8,
1716                 .uaddr          = MTD_UADDR_UNNECESSARY,
1717                 .dev_size       = SIZE_2MiB,
1718                 .cmd_set        = P_ID_INTEL_EXT,
1719                 .nr_regions     = 1,
1720                 .regions        = {
1721                         ERASEINFO(0x10000,32),
1722                 }
1723         }, {
1724                 .mfr_id         = CFI_MFR_ST,
1725                 .dev_id         = M50LPW080,
1726                 .name           = "ST M50LPW080",
1727                 .devtypes       = CFI_DEVICETYPE_X8,
1728                 .uaddr          = MTD_UADDR_UNNECESSARY,
1729                 .dev_size       = SIZE_1MiB,
1730                 .cmd_set        = P_ID_INTEL_EXT,
1731                 .nr_regions     = 1,
1732                 .regions        = {
1733                         ERASEINFO(0x10000,16),
1734                 },
1735         }, {
1736                 .mfr_id         = CFI_MFR_ST,
1737                 .dev_id         = M50FLW080A,
1738                 .name           = "ST M50FLW080A",
1739                 .devtypes       = CFI_DEVICETYPE_X8,
1740                 .uaddr          = MTD_UADDR_UNNECESSARY,
1741                 .dev_size       = SIZE_1MiB,
1742                 .cmd_set        = P_ID_INTEL_EXT,
1743                 .nr_regions     = 4,
1744                 .regions        = {
1745                         ERASEINFO(0x1000,16),
1746                         ERASEINFO(0x10000,13),
1747                         ERASEINFO(0x1000,16),
1748                         ERASEINFO(0x1000,16),
1749                 }
1750         }, {
1751                 .mfr_id         = CFI_MFR_ST,
1752                 .dev_id         = M50FLW080B,
1753                 .name           = "ST M50FLW080B",
1754                 .devtypes       = CFI_DEVICETYPE_X8,
1755                 .uaddr          = MTD_UADDR_UNNECESSARY,
1756                 .dev_size       = SIZE_1MiB,
1757                 .cmd_set        = P_ID_INTEL_EXT,
1758                 .nr_regions     = 4,
1759                 .regions        = {
1760                         ERASEINFO(0x1000,16),
1761                         ERASEINFO(0x1000,16),
1762                         ERASEINFO(0x10000,13),
1763                         ERASEINFO(0x1000,16),
1764                 }
1765         }, {
1766                 .mfr_id         = 0xff00 | CFI_MFR_ST,
1767                 .dev_id         = 0xff00 | PSD4256G6V,
1768                 .name           = "ST PSD4256G6V",
1769                 .devtypes       = CFI_DEVICETYPE_X16,
1770                 .uaddr          = MTD_UADDR_0x0AAA_0x0554,
1771                 .dev_size       = SIZE_1MiB,
1772                 .cmd_set        = P_ID_AMD_STD,
1773                 .nr_regions     = 1,
1774                 .regions        = {
1775                         ERASEINFO(0x10000,16),
1776                 }
1777         }, {
1778                 .mfr_id         = CFI_MFR_TOSHIBA,
1779                 .dev_id         = TC58FVT160,
1780                 .name           = "Toshiba TC58FVT160",
1781                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1782                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1783                 .dev_size       = SIZE_2MiB,
1784                 .cmd_set        = P_ID_AMD_STD,
1785                 .nr_regions     = 4,
1786                 .regions        = {
1787                         ERASEINFO(0x10000,31),
1788                         ERASEINFO(0x08000,1),
1789                         ERASEINFO(0x02000,2),
1790                         ERASEINFO(0x04000,1)
1791                 }
1792         }, {
1793                 .mfr_id         = CFI_MFR_TOSHIBA,
1794                 .dev_id         = TC58FVB160,
1795                 .name           = "Toshiba TC58FVB160",
1796                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1797                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1798                 .dev_size       = SIZE_2MiB,
1799                 .cmd_set        = P_ID_AMD_STD,
1800                 .nr_regions     = 4,
1801                 .regions        = {
1802                         ERASEINFO(0x04000,1),
1803                         ERASEINFO(0x02000,2),
1804                         ERASEINFO(0x08000,1),
1805                         ERASEINFO(0x10000,31)
1806                 }
1807         }, {
1808                 .mfr_id         = CFI_MFR_TOSHIBA,
1809                 .dev_id         = TC58FVB321,
1810                 .name           = "Toshiba TC58FVB321",
1811                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1812                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1813                 .dev_size       = SIZE_4MiB,
1814                 .cmd_set        = P_ID_AMD_STD,
1815                 .nr_regions     = 2,
1816                 .regions        = {
1817                         ERASEINFO(0x02000,8),
1818                         ERASEINFO(0x10000,63)
1819                 }
1820         }, {
1821                 .mfr_id         = CFI_MFR_TOSHIBA,
1822                 .dev_id         = TC58FVT321,
1823                 .name           = "Toshiba TC58FVT321",
1824                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1825                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1826                 .dev_size       = SIZE_4MiB,
1827                 .cmd_set        = P_ID_AMD_STD,
1828                 .nr_regions     = 2,
1829                 .regions        = {
1830                         ERASEINFO(0x10000,63),
1831                         ERASEINFO(0x02000,8)
1832                 }
1833         }, {
1834                 .mfr_id         = CFI_MFR_TOSHIBA,
1835                 .dev_id         = TC58FVB641,
1836                 .name           = "Toshiba TC58FVB641",
1837                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1838                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1839                 .dev_size       = SIZE_8MiB,
1840                 .cmd_set        = P_ID_AMD_STD,
1841                 .nr_regions     = 2,
1842                 .regions        = {
1843                         ERASEINFO(0x02000,8),
1844                         ERASEINFO(0x10000,127)
1845                 }
1846         }, {
1847                 .mfr_id         = CFI_MFR_TOSHIBA,
1848                 .dev_id         = TC58FVT641,
1849                 .name           = "Toshiba TC58FVT641",
1850                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1851                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1852                 .dev_size       = SIZE_8MiB,
1853                 .cmd_set        = P_ID_AMD_STD,
1854                 .nr_regions     = 2,
1855                 .regions        = {
1856                         ERASEINFO(0x10000,127),
1857                         ERASEINFO(0x02000,8)
1858                 }
1859         }, {
1860                 .mfr_id         = CFI_MFR_WINBOND,
1861                 .dev_id         = W49V002A,
1862                 .name           = "Winbond W49V002A",
1863                 .devtypes       = CFI_DEVICETYPE_X8,
1864                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1865                 .dev_size       = SIZE_256KiB,
1866                 .cmd_set        = P_ID_AMD_STD,
1867                 .nr_regions     = 4,
1868                 .regions        = {
1869                         ERASEINFO(0x10000, 3),
1870                         ERASEINFO(0x08000, 1),
1871                         ERASEINFO(0x02000, 2),
1872                         ERASEINFO(0x04000, 1),
1873                 }
1874         }
1875 };
1876
1877 static inline u32 jedec_read_mfr(struct map_info *map, uint32_t base,
1878         struct cfi_private *cfi)
1879 {
1880         map_word result;
1881         unsigned long mask;
1882         int bank = 0;
1883
1884         /* According to JEDEC "Standard Manufacturer's Identification Code"
1885          * (http://www.jedec.org/download/search/jep106W.pdf)
1886          * several first banks can contain 0x7f instead of actual ID
1887          */
1888         do {
1889                 uint32_t ofs = cfi_build_cmd_addr(0 + (bank << 8), map, cfi);
1890                 mask = (1 << (cfi->device_type * 8)) - 1;
1891                 result = map_read(map, base + ofs);
1892                 bank++;
1893         } while ((result.x[0] & mask) == CFI_MFR_CONTINUATION);
1894
1895         return result.x[0] & mask;
1896 }
1897
1898 static inline u32 jedec_read_id(struct map_info *map, uint32_t base,
1899         struct cfi_private *cfi)
1900 {
1901         map_word result;
1902         unsigned long mask;
1903         u32 ofs = cfi_build_cmd_addr(1, map, cfi);
1904         mask = (1 << (cfi->device_type * 8)) -1;
1905         result = map_read(map, base + ofs);
1906         return result.x[0] & mask;
1907 }
1908
1909 static void jedec_reset(u32 base, struct map_info *map, struct cfi_private *cfi)
1910 {
1911         /* Reset */
1912
1913         /* after checking the datasheets for SST, MACRONIX and ATMEL
1914          * (oh and incidentaly the jedec spec - 3.5.3.3) the reset
1915          * sequence is *supposed* to be 0xaa at 0x5555, 0x55 at
1916          * 0x2aaa, 0xF0 at 0x5555 this will not affect the AMD chips
1917          * as they will ignore the writes and dont care what address
1918          * the F0 is written to */
1919         if (cfi->addr_unlock1) {
1920                 DEBUG( MTD_DEBUG_LEVEL3,
1921                        "reset unlock called %x %x \n",
1922                        cfi->addr_unlock1,cfi->addr_unlock2);
1923                 cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
1924                 cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
1925         }
1926
1927         cfi_send_gen_cmd(0xF0, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
1928         /* Some misdesigned Intel chips do not respond for 0xF0 for a reset,
1929          * so ensure we're in read mode.  Send both the Intel and the AMD command
1930          * for this.  Intel uses 0xff for this, AMD uses 0xff for NOP, so
1931          * this should be safe.
1932          */
1933         cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL);
1934         /* FIXME - should have reset delay before continuing */
1935 }
1936
1937
1938 static int cfi_jedec_setup(struct map_info *map, struct cfi_private *cfi, int index)
1939 {
1940         int i,num_erase_regions;
1941         uint8_t uaddr;
1942
1943         if (!(jedec_table[index].devtypes & cfi->device_type)) {
1944                 DEBUG(MTD_DEBUG_LEVEL1, "Rejecting potential %s with incompatible %d-bit device type\n",
1945                       jedec_table[index].name, 4 * (1<<cfi->device_type));
1946                 return 0;
1947         }
1948
1949         printk(KERN_INFO "Found: %s\n",jedec_table[index].name);
1950
1951         num_erase_regions = jedec_table[index].nr_regions;
1952
1953         cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL);
1954         if (!cfi->cfiq) {
1955                 //xx printk(KERN_WARNING "%s: kmalloc failed for CFI ident structure\n", map->name);
1956                 return 0;
1957         }
1958
1959         memset(cfi->cfiq, 0, sizeof(struct cfi_ident));
1960
1961         cfi->cfiq->P_ID = jedec_table[index].cmd_set;
1962         cfi->cfiq->NumEraseRegions = jedec_table[index].nr_regions;
1963         cfi->cfiq->DevSize = jedec_table[index].dev_size;
1964         cfi->cfi_mode = CFI_MODE_JEDEC;
1965         cfi->sector_erase_cmd = CMD(0x30);
1966
1967         for (i=0; i<num_erase_regions; i++){
1968                 cfi->cfiq->EraseRegionInfo[i] = jedec_table[index].regions[i];
1969         }
1970         cfi->cmdset_priv = NULL;
1971
1972         /* This may be redundant for some cases, but it doesn't hurt */
1973         cfi->mfr = jedec_table[index].mfr_id;
1974         cfi->id = jedec_table[index].dev_id;
1975
1976         uaddr = jedec_table[index].uaddr;
1977
1978         /* The table has unlock addresses in _bytes_, and we try not to let
1979            our brains explode when we see the datasheets talking about address
1980            lines numbered from A-1 to A18. The CFI table has unlock addresses
1981            in device-words according to the mode the device is connected in */
1982         cfi->addr_unlock1 = unlock_addrs[uaddr].addr1 / cfi->device_type;
1983         cfi->addr_unlock2 = unlock_addrs[uaddr].addr2 / cfi->device_type;
1984
1985         return 1;       /* ok */
1986 }
1987
1988
1989 /*
1990  * There is a BIG problem properly ID'ing the JEDEC device and guaranteeing
1991  * the mapped address, unlock addresses, and proper chip ID.  This function
1992  * attempts to minimize errors.  It is doubtfull that this probe will ever
1993  * be perfect - consequently there should be some module parameters that
1994  * could be manually specified to force the chip info.
1995  */
1996 static inline int jedec_match( uint32_t base,
1997                                struct map_info *map,
1998                                struct cfi_private *cfi,
1999                                const struct amd_flash_info *finfo )
2000 {
2001         int rc = 0;           /* failure until all tests pass */
2002         u32 mfr, id;
2003         uint8_t uaddr;
2004
2005         /*
2006          * The IDs must match.  For X16 and X32 devices operating in
2007          * a lower width ( X8 or X16 ), the device ID's are usually just
2008          * the lower byte(s) of the larger device ID for wider mode.  If
2009          * a part is found that doesn't fit this assumption (device id for
2010          * smaller width mode is completely unrealated to full-width mode)
2011          * then the jedec_table[] will have to be augmented with the IDs
2012          * for different widths.
2013          */
2014         switch (cfi->device_type) {
2015         case CFI_DEVICETYPE_X8:
2016                 mfr = (uint8_t)finfo->mfr_id;
2017                 id = (uint8_t)finfo->dev_id;
2018
2019                 /* bjd: it seems that if we do this, we can end up
2020                  * detecting 16bit flashes as an 8bit device, even though
2021                  * there aren't.
2022                  */
2023                 if (finfo->dev_id > 0xff) {
2024                         DEBUG( MTD_DEBUG_LEVEL3, "%s(): ID is not 8bit\n",
2025                                __func__);
2026                         goto match_done;
2027                 }
2028                 break;
2029         case CFI_DEVICETYPE_X16:
2030                 mfr = (uint16_t)finfo->mfr_id;
2031                 id = (uint16_t)finfo->dev_id;
2032                 break;
2033         case CFI_DEVICETYPE_X32:
2034                 mfr = (uint16_t)finfo->mfr_id;
2035                 id = (uint32_t)finfo->dev_id;
2036                 break;
2037         default:
2038                 printk(KERN_WARNING
2039                        "MTD %s(): Unsupported device type %d\n",
2040                        __func__, cfi->device_type);
2041                 goto match_done;
2042         }
2043         if ( cfi->mfr != mfr || cfi->id != id ) {
2044                 goto match_done;
2045         }
2046
2047         /* the part size must fit in the memory window */
2048         DEBUG( MTD_DEBUG_LEVEL3,
2049                "MTD %s(): Check fit 0x%.8x + 0x%.8x = 0x%.8x\n",
2050                __func__, base, 1 << finfo->dev_size, base + (1 << finfo->dev_size) );
2051         if ( base + cfi_interleave(cfi) * ( 1 << finfo->dev_size ) > map->size ) {
2052                 DEBUG( MTD_DEBUG_LEVEL3,
2053                        "MTD %s(): 0x%.4x 0x%.4x %dKiB doesn't fit\n",
2054                        __func__, finfo->mfr_id, finfo->dev_id,
2055                        1 << finfo->dev_size );
2056                 goto match_done;
2057         }
2058
2059         if (! (finfo->devtypes & cfi->device_type))
2060                 goto match_done;
2061
2062         uaddr = finfo->uaddr;
2063
2064         DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n",
2065                __func__, cfi->addr_unlock1, cfi->addr_unlock2 );
2066         if ( MTD_UADDR_UNNECESSARY != uaddr && MTD_UADDR_DONT_CARE != uaddr
2067              && ( unlock_addrs[uaddr].addr1 / cfi->device_type != cfi->addr_unlock1 ||
2068                   unlock_addrs[uaddr].addr2 / cfi->device_type != cfi->addr_unlock2 ) ) {
2069                 DEBUG( MTD_DEBUG_LEVEL3,
2070                         "MTD %s(): 0x%.4x 0x%.4x did not match\n",
2071                         __func__,
2072                         unlock_addrs[uaddr].addr1,
2073                         unlock_addrs[uaddr].addr2);
2074                 goto match_done;
2075         }
2076
2077         /*
2078          * Make sure the ID's disappear when the device is taken out of
2079          * ID mode.  The only time this should fail when it should succeed
2080          * is when the ID's are written as data to the same
2081          * addresses.  For this rare and unfortunate case the chip
2082          * cannot be probed correctly.
2083          * FIXME - write a driver that takes all of the chip info as
2084          * module parameters, doesn't probe but forces a load.
2085          */
2086         DEBUG( MTD_DEBUG_LEVEL3,
2087                "MTD %s(): check ID's disappear when not in ID mode\n",
2088                __func__ );
2089         jedec_reset( base, map, cfi );
2090         mfr = jedec_read_mfr( map, base, cfi );
2091         id = jedec_read_id( map, base, cfi );
2092         if ( mfr == cfi->mfr && id == cfi->id ) {
2093                 DEBUG( MTD_DEBUG_LEVEL3,
2094                        "MTD %s(): ID 0x%.2x:0x%.2x did not change after reset:\n"
2095                        "You might need to manually specify JEDEC parameters.\n",
2096                         __func__, cfi->mfr, cfi->id );
2097                 goto match_done;
2098         }
2099
2100         /* all tests passed - mark  as success */
2101         rc = 1;
2102
2103         /*
2104          * Put the device back in ID mode - only need to do this if we
2105          * were truly frobbing a real device.
2106          */
2107         DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): return to ID mode\n", __func__ );
2108         if (cfi->addr_unlock1) {
2109                 cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
2110                 cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
2111         }
2112         cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
2113         /* FIXME - should have a delay before continuing */
2114
2115  match_done:
2116         return rc;
2117 }
2118
2119
2120 static int jedec_probe_chip(struct map_info *map, __u32 base,
2121                             unsigned long *chip_map, struct cfi_private *cfi)
2122 {
2123         int i;
2124         enum uaddr uaddr_idx = MTD_UADDR_NOT_SUPPORTED;
2125         u32 probe_offset1, probe_offset2;
2126
2127  retry:
2128         if (!cfi->numchips) {
2129                 uaddr_idx++;
2130
2131                 if (MTD_UADDR_UNNECESSARY == uaddr_idx)
2132                         return 0;
2133
2134                 cfi->addr_unlock1 = unlock_addrs[uaddr_idx].addr1 / cfi->device_type;
2135                 cfi->addr_unlock2 = unlock_addrs[uaddr_idx].addr2 / cfi->device_type;
2136         }
2137
2138         /* Make certain we aren't probing past the end of map */
2139         if (base >= map->size) {
2140                 printk(KERN_NOTICE
2141                         "Probe at base(0x%08x) past the end of the map(0x%08lx)\n",
2142                         base, map->size -1);
2143                 return 0;
2144
2145         }
2146         /* Ensure the unlock addresses we try stay inside the map */
2147         probe_offset1 = cfi_build_cmd_addr(cfi->addr_unlock1, map, cfi);
2148         probe_offset2 = cfi_build_cmd_addr(cfi->addr_unlock2, map, cfi);
2149         if (    ((base + probe_offset1 + map_bankwidth(map)) >= map->size) ||
2150                 ((base + probe_offset2 + map_bankwidth(map)) >= map->size))
2151                 goto retry;
2152
2153         /* Reset */
2154         jedec_reset(base, map, cfi);
2155
2156         /* Autoselect Mode */
2157         if(cfi->addr_unlock1) {
2158                 cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
2159                 cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
2160         }
2161         cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
2162         /* FIXME - should have a delay before continuing */
2163
2164         if (!cfi->numchips) {
2165                 /* This is the first time we're called. Set up the CFI
2166                    stuff accordingly and return */
2167
2168                 cfi->mfr = jedec_read_mfr(map, base, cfi);
2169                 cfi->id = jedec_read_id(map, base, cfi);
2170                 DEBUG(MTD_DEBUG_LEVEL3,
2171                       "Search for id:(%02x %02x) interleave(%d) type(%d)\n",
2172                         cfi->mfr, cfi->id, cfi_interleave(cfi), cfi->device_type);
2173                 for (i = 0; i < ARRAY_SIZE(jedec_table); i++) {
2174                         if ( jedec_match( base, map, cfi, &jedec_table[i] ) ) {
2175                                 DEBUG( MTD_DEBUG_LEVEL3,
2176                                        "MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n",
2177                                        __func__, cfi->mfr, cfi->id,
2178                                        cfi->addr_unlock1, cfi->addr_unlock2 );
2179                                 if (!cfi_jedec_setup(map, cfi, i))
2180                                         return 0;
2181                                 goto ok_out;
2182                         }
2183                 }
2184                 goto retry;
2185         } else {
2186                 uint16_t mfr;
2187                 uint16_t id;
2188
2189                 /* Make sure it is a chip of the same manufacturer and id */
2190                 mfr = jedec_read_mfr(map, base, cfi);
2191                 id = jedec_read_id(map, base, cfi);
2192
2193                 if ((mfr != cfi->mfr) || (id != cfi->id)) {
2194                         printk(KERN_DEBUG "%s: Found different chip or no chip at all (mfr 0x%x, id 0x%x) at 0x%x\n",
2195                                map->name, mfr, id, base);
2196                         jedec_reset(base, map, cfi);
2197                         return 0;
2198                 }
2199         }
2200
2201         /* Check each previous chip locations to see if it's an alias */
2202         for (i=0; i < (base >> cfi->chipshift); i++) {
2203                 unsigned long start;
2204                 if(!test_bit(i, chip_map)) {
2205                         continue; /* Skip location; no valid chip at this address */
2206                 }
2207                 start = i << cfi->chipshift;
2208                 if (jedec_read_mfr(map, start, cfi) == cfi->mfr &&
2209                     jedec_read_id(map, start, cfi) == cfi->id) {
2210                         /* Eep. This chip also looks like it's in autoselect mode.
2211                            Is it an alias for the new one? */
2212                         jedec_reset(start, map, cfi);
2213
2214                         /* If the device IDs go away, it's an alias */
2215                         if (jedec_read_mfr(map, base, cfi) != cfi->mfr ||
2216                             jedec_read_id(map, base, cfi) != cfi->id) {
2217                                 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
2218                                        map->name, base, start);
2219                                 return 0;
2220                         }
2221
2222                         /* Yes, it's actually got the device IDs as data. Most
2223                          * unfortunate. Stick the new chip in read mode
2224                          * too and if it's the same, assume it's an alias. */
2225                         /* FIXME: Use other modes to do a proper check */
2226                         jedec_reset(base, map, cfi);
2227                         if (jedec_read_mfr(map, base, cfi) == cfi->mfr &&
2228                             jedec_read_id(map, base, cfi) == cfi->id) {
2229                                 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
2230                                        map->name, base, start);
2231                                 return 0;
2232                         }
2233                 }
2234         }
2235
2236         /* OK, if we got to here, then none of the previous chips appear to
2237            be aliases for the current one. */
2238         set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */
2239         cfi->numchips++;
2240
2241 ok_out:
2242         /* Put it back into Read Mode */
2243         jedec_reset(base, map, cfi);
2244
2245         printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
2246                map->name, cfi_interleave(cfi), cfi->device_type*8, base,
2247                map->bankwidth*8);
2248
2249         return 1;
2250 }
2251
2252 static struct chip_probe jedec_chip_probe = {
2253         .name = "JEDEC",
2254         .probe_chip = jedec_probe_chip
2255 };
2256
2257 static struct mtd_info *jedec_probe(struct map_info *map)
2258 {
2259         /*
2260          * Just use the generic probe stuff to call our CFI-specific
2261          * chip_probe routine in all the possible permutations, etc.
2262          */
2263         return mtd_do_chip_probe(map, &jedec_chip_probe);
2264 }
2265
2266 static struct mtd_chip_driver jedec_chipdrv = {
2267         .probe  = jedec_probe,
2268         .name   = "jedec_probe",
2269         .module = THIS_MODULE
2270 };
2271
2272 static int __init jedec_probe_init(void)
2273 {
2274         register_mtd_chip_driver(&jedec_chipdrv);
2275         return 0;
2276 }
2277
2278 static void __exit jedec_probe_exit(void)
2279 {
2280         unregister_mtd_chip_driver(&jedec_chipdrv);
2281 }
2282
2283 module_init(jedec_probe_init);
2284 module_exit(jedec_probe_exit);
2285
2286 MODULE_LICENSE("GPL");
2287 MODULE_AUTHOR("Erwin Authried <eauth@softsys.co.at> et al.");
2288 MODULE_DESCRIPTION("Probe code for JEDEC-compliant flash chips");