2 * linux/drivers/mmc/host/tmio_mmc_pio.c
4 * Copyright (C) 2011 Guennadi Liakhovetski
5 * Copyright (C) 2007 Ian Molton
6 * Copyright (C) 2004 Ian Molton
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Driver for the MMC / SD / SDIO IP found in:
14 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
16 * This driver draws mainly on scattered spec sheets, Reverse engineering
17 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
18 * support). (Further 4 bit support from a later datasheet).
21 * Investigate using a workqueue for PIO transfers
24 * Better Power management
25 * Handle MMC errors better
26 * double buffer support
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/highmem.h>
33 #include <linux/interrupt.h>
35 #include <linux/irq.h>
36 #include <linux/mfd/tmio.h>
37 #include <linux/mmc/host.h>
38 #include <linux/mmc/tmio.h>
39 #include <linux/module.h>
40 #include <linux/pagemap.h>
41 #include <linux/platform_device.h>
42 #include <linux/pm_runtime.h>
43 #include <linux/scatterlist.h>
44 #include <linux/workqueue.h>
45 #include <linux/spinlock.h>
49 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
51 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
52 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
55 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
57 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
58 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
61 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
63 sd_ctrl_write32(host, CTL_STATUS, ~i);
66 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
68 host->sg_len = data->sg_len;
69 host->sg_ptr = data->sg;
70 host->sg_orig = data->sg;
74 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
76 host->sg_ptr = sg_next(host->sg_ptr);
78 return --host->sg_len;
81 #ifdef CONFIG_MMC_DEBUG
83 #define STATUS_TO_TEXT(a, status, i) \
85 if (status & TMIO_STAT_##a) { \
92 static void pr_debug_status(u32 status)
95 printk(KERN_DEBUG "status: %08x = ", status);
96 STATUS_TO_TEXT(CARD_REMOVE, status, i);
97 STATUS_TO_TEXT(CARD_INSERT, status, i);
98 STATUS_TO_TEXT(SIGSTATE, status, i);
99 STATUS_TO_TEXT(WRPROTECT, status, i);
100 STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
101 STATUS_TO_TEXT(CARD_INSERT_A, status, i);
102 STATUS_TO_TEXT(SIGSTATE_A, status, i);
103 STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
104 STATUS_TO_TEXT(STOPBIT_ERR, status, i);
105 STATUS_TO_TEXT(ILL_FUNC, status, i);
106 STATUS_TO_TEXT(CMD_BUSY, status, i);
107 STATUS_TO_TEXT(CMDRESPEND, status, i);
108 STATUS_TO_TEXT(DATAEND, status, i);
109 STATUS_TO_TEXT(CRCFAIL, status, i);
110 STATUS_TO_TEXT(DATATIMEOUT, status, i);
111 STATUS_TO_TEXT(CMDTIMEOUT, status, i);
112 STATUS_TO_TEXT(RXOVERFLOW, status, i);
113 STATUS_TO_TEXT(TXUNDERRUN, status, i);
114 STATUS_TO_TEXT(RXRDY, status, i);
115 STATUS_TO_TEXT(TXRQ, status, i);
116 STATUS_TO_TEXT(ILL_ACCESS, status, i);
121 #define pr_debug_status(s) do { } while (0)
124 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
126 struct tmio_mmc_host *host = mmc_priv(mmc);
129 host->sdio_irq_enabled = 1;
130 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
131 ~TMIO_SDIO_STAT_IOIRQ;
132 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
133 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
135 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
136 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
137 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
138 host->sdio_irq_enabled = 0;
142 static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
147 for (clock = host->mmc->f_min, clk = 0x80000080;
148 new_clock >= (clock<<1); clk >>= 1)
153 if (host->set_clk_div)
154 host->set_clk_div(host->pdev, (clk>>22) & 1);
156 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
159 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
161 struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
163 /* implicit BUG_ON(!res) */
164 if (resource_size(res) > 0x100) {
165 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
169 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
170 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
174 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
176 struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
178 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
179 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
182 /* implicit BUG_ON(!res) */
183 if (resource_size(res) > 0x100) {
184 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
189 static void tmio_mmc_reset(struct tmio_mmc_host *host)
191 struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
193 /* FIXME - should we set stop clock reg here */
194 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
195 /* implicit BUG_ON(!res) */
196 if (resource_size(res) > 0x100)
197 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
199 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
200 if (resource_size(res) > 0x100)
201 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
205 static void tmio_mmc_reset_work(struct work_struct *work)
207 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
208 delayed_reset_work.work);
209 struct mmc_request *mrq;
212 spin_lock_irqsave(&host->lock, flags);
216 * is request already finished? Since we use a non-blocking
217 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
218 * us, so, have to check for IS_ERR(host->mrq)
220 if (IS_ERR_OR_NULL(mrq)
221 || time_is_after_jiffies(host->last_req_ts +
222 msecs_to_jiffies(2000))) {
223 spin_unlock_irqrestore(&host->lock, flags);
227 dev_warn(&host->pdev->dev,
228 "timeout waiting for hardware interrupt (CMD%u)\n",
232 host->data->error = -ETIMEDOUT;
234 host->cmd->error = -ETIMEDOUT;
236 mrq->cmd->error = -ETIMEDOUT;
240 host->force_pio = false;
242 spin_unlock_irqrestore(&host->lock, flags);
244 tmio_mmc_reset(host);
246 /* Ready for new calls */
249 mmc_request_done(host->mmc, mrq);
252 /* called with host->lock held, interrupts disabled */
253 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
255 struct mmc_request *mrq;
258 spin_lock_irqsave(&host->lock, flags);
261 if (IS_ERR_OR_NULL(mrq)) {
262 spin_unlock_irqrestore(&host->lock, flags);
268 host->force_pio = false;
270 cancel_delayed_work(&host->delayed_reset_work);
273 spin_unlock_irqrestore(&host->lock, flags);
275 mmc_request_done(host->mmc, mrq);
278 static void tmio_mmc_done_work(struct work_struct *work)
280 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
282 tmio_mmc_finish_request(host);
285 /* These are the bitmasks the tmio chip requires to implement the MMC response
286 * types. Note that R1 and R6 are the same in this scheme. */
287 #define APP_CMD 0x0040
288 #define RESP_NONE 0x0300
289 #define RESP_R1 0x0400
290 #define RESP_R1B 0x0500
291 #define RESP_R2 0x0600
292 #define RESP_R3 0x0700
293 #define DATA_PRESENT 0x0800
294 #define TRANSFER_READ 0x1000
295 #define TRANSFER_MULTI 0x2000
296 #define SECURITY_CMD 0x4000
298 static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
300 struct mmc_data *data = host->data;
303 /* Command 12 is handled by hardware */
304 if (cmd->opcode == 12 && !cmd->arg) {
305 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
309 switch (mmc_resp_type(cmd)) {
310 case MMC_RSP_NONE: c |= RESP_NONE; break;
311 case MMC_RSP_R1: c |= RESP_R1; break;
312 case MMC_RSP_R1B: c |= RESP_R1B; break;
313 case MMC_RSP_R2: c |= RESP_R2; break;
314 case MMC_RSP_R3: c |= RESP_R3; break;
316 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
322 /* FIXME - this seems to be ok commented out but the spec suggest this bit
323 * should be set when issuing app commands.
324 * if(cmd->flags & MMC_FLAG_ACMD)
329 if (data->blocks > 1) {
330 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
333 if (data->flags & MMC_DATA_READ)
337 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
339 /* Fire off the command */
340 sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
341 sd_ctrl_write16(host, CTL_SD_CMD, c);
347 * This chip always returns (at least?) as much data as you ask for.
348 * I'm unsure what happens if you ask for less than a block. This should be
349 * looked into to ensure that a funny length read doesn't hose the controller.
351 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
353 struct mmc_data *data = host->data;
359 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
360 pr_err("PIO IRQ in DMA mode!\n");
363 pr_debug("Spurious PIO IRQ\n");
367 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
368 buf = (unsigned short *)(sg_virt + host->sg_off);
370 count = host->sg_ptr->length - host->sg_off;
371 if (count > data->blksz)
374 pr_debug("count: %08x offset: %08x flags %08x\n",
375 count, host->sg_off, data->flags);
377 /* Transfer the data */
378 if (data->flags & MMC_DATA_READ)
379 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
381 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
383 host->sg_off += count;
385 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
387 if (host->sg_off == host->sg_ptr->length)
388 tmio_mmc_next_sg(host);
393 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
395 if (host->sg_ptr == &host->bounce_sg) {
397 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
398 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
399 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
403 /* needs to be called with host->lock held */
404 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
406 struct mmc_data *data = host->data;
407 struct mmc_command *stop;
412 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
417 /* FIXME - return correct transfer count on errors */
419 data->bytes_xfered = data->blocks * data->blksz;
421 data->bytes_xfered = 0;
423 pr_debug("Completed data request\n");
426 * FIXME: other drivers allow an optional stop command of any given type
427 * which we dont do, as the chip can auto generate them.
428 * Perhaps we can be smarter about when to use auto CMD12 and
429 * only issue the auto request when we know this is the desired
430 * stop command, allowing fallback to the stop command the
431 * upper layers expect. For now, we do what works.
434 if (data->flags & MMC_DATA_READ) {
435 if (host->chan_rx && !host->force_pio)
436 tmio_mmc_check_bounce_buffer(host);
437 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
440 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
445 if (stop->opcode == 12 && !stop->arg)
446 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
451 schedule_work(&host->done);
454 static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
456 struct mmc_data *data;
457 spin_lock(&host->lock);
463 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
465 * Has all data been written out yet? Testing on SuperH showed,
466 * that in most cases the first interrupt comes already with the
467 * BUSY status bit clear, but on some operations, like mount or
468 * in the beginning of a write / sync / umount, there is one
469 * DATAEND interrupt with the BUSY bit set, in this cases
470 * waiting for one more interrupt fixes the problem.
472 if (!(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_CMD_BUSY)) {
473 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
474 tasklet_schedule(&host->dma_complete);
476 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
477 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
478 tasklet_schedule(&host->dma_complete);
480 tmio_mmc_do_data_irq(host);
481 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
484 spin_unlock(&host->lock);
487 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
490 struct mmc_command *cmd = host->cmd;
493 spin_lock(&host->lock);
496 pr_debug("Spurious CMD irq\n");
502 /* This controller is sicker than the PXA one. Not only do we need to
503 * drop the top 8 bits of the first response word, we also need to
504 * modify the order of the response for short response command types.
507 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
508 cmd->resp[i] = sd_ctrl_read32(host, addr);
510 if (cmd->flags & MMC_RSP_136) {
511 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
512 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
513 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
515 } else if (cmd->flags & MMC_RSP_R3) {
516 cmd->resp[0] = cmd->resp[3];
519 if (stat & TMIO_STAT_CMDTIMEOUT)
520 cmd->error = -ETIMEDOUT;
521 else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
522 cmd->error = -EILSEQ;
524 /* If there is data to handle we enable data IRQs here, and
525 * we will ultimatley finish the request in the data_end handler.
526 * If theres no data or we encountered an error, finish now.
528 if (host->data && !cmd->error) {
529 if (host->data->flags & MMC_DATA_READ) {
530 if (host->force_pio || !host->chan_rx)
531 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
533 tasklet_schedule(&host->dma_issue);
535 if (host->force_pio || !host->chan_tx)
536 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
538 tasklet_schedule(&host->dma_issue);
541 schedule_work(&host->done);
545 spin_unlock(&host->lock);
548 irqreturn_t tmio_mmc_irq(int irq, void *devid)
550 struct tmio_mmc_host *host = devid;
551 struct mmc_host *mmc = host->mmc;
552 struct tmio_mmc_data *pdata = host->pdata;
553 unsigned int ireg, status;
554 unsigned int sdio_ireg, sdio_status;
556 pr_debug("MMC IRQ begin\n");
558 status = sd_ctrl_read32(host, CTL_STATUS);
559 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
562 if (!ireg && pdata->flags & TMIO_MMC_SDIO_IRQ) {
563 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
564 sdio_ireg = sdio_status & TMIO_SDIO_MASK_ALL &
565 ~host->sdio_irq_mask;
567 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status & ~TMIO_SDIO_MASK_ALL);
569 if (sdio_ireg && !host->sdio_irq_enabled) {
570 pr_warning("tmio_mmc: Spurious SDIO IRQ, disabling! 0x%04x 0x%04x 0x%04x\n",
571 sdio_status, host->sdio_irq_mask, sdio_ireg);
572 tmio_mmc_enable_sdio_irq(mmc, 0);
576 if (mmc->caps & MMC_CAP_SDIO_IRQ &&
577 sdio_ireg & TMIO_SDIO_STAT_IOIRQ)
578 mmc_signal_sdio_irq(mmc);
584 pr_debug_status(status);
585 pr_debug_status(ireg);
587 /* Card insert / remove attempts */
588 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
589 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
590 TMIO_STAT_CARD_REMOVE);
591 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
592 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
593 !work_pending(&mmc->detect.work))
594 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
598 /* CRC and other errors */
599 /* if (ireg & TMIO_STAT_ERR_IRQ)
600 * handled |= tmio_error_irq(host, irq, stat);
603 /* Command completion */
604 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
605 tmio_mmc_ack_mmc_irqs(host,
606 TMIO_STAT_CMDRESPEND |
607 TMIO_STAT_CMDTIMEOUT);
608 tmio_mmc_cmd_irq(host, status);
613 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
614 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
615 tmio_mmc_pio_irq(host);
619 /* Data transfer completion */
620 if (ireg & TMIO_STAT_DATAEND) {
621 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
622 tmio_mmc_data_irq(host);
626 pr_warning("tmio_mmc: Spurious irq, disabling! "
627 "0x%08x 0x%08x 0x%08x\n", status, host->sdcard_irq_mask, ireg);
628 pr_debug_status(status);
629 tmio_mmc_disable_mmc_irqs(host, status & ~host->sdcard_irq_mask);
634 EXPORT_SYMBOL(tmio_mmc_irq);
636 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
637 struct mmc_data *data)
639 struct tmio_mmc_data *pdata = host->pdata;
641 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
642 data->blksz, data->blocks);
644 /* Some hardware cannot perform 2 byte requests in 4 bit mode */
645 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
646 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
648 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
649 pr_err("%s: %d byte block unsupported in 4 bit mode\n",
650 mmc_hostname(host->mmc), data->blksz);
655 tmio_mmc_init_sg(host, data);
658 /* Set transfer length / blocksize */
659 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
660 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
662 tmio_mmc_start_dma(host, data);
667 /* Process requests from the MMC layer */
668 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
670 struct tmio_mmc_host *host = mmc_priv(mmc);
674 spin_lock_irqsave(&host->lock, flags);
677 pr_debug("request not null\n");
678 if (IS_ERR(host->mrq)) {
679 spin_unlock_irqrestore(&host->lock, flags);
680 mrq->cmd->error = -EAGAIN;
681 mmc_request_done(mmc, mrq);
686 host->last_req_ts = jiffies;
690 spin_unlock_irqrestore(&host->lock, flags);
693 ret = tmio_mmc_start_data(host, mrq->data);
698 ret = tmio_mmc_start_command(host, mrq->cmd);
700 schedule_delayed_work(&host->delayed_reset_work,
701 msecs_to_jiffies(2000));
706 host->force_pio = false;
708 mrq->cmd->error = ret;
709 mmc_request_done(mmc, mrq);
712 /* Set MMC clock / power.
713 * Note: This controller uses a simple divider scheme therefore it cannot
714 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
715 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
718 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
720 struct tmio_mmc_host *host = mmc_priv(mmc);
721 struct tmio_mmc_data *pdata = host->pdata;
724 mutex_lock(&host->ios_lock);
726 spin_lock_irqsave(&host->lock, flags);
728 if (IS_ERR(host->mrq)) {
729 dev_dbg(&host->pdev->dev,
730 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
731 current->comm, task_pid_nr(current),
732 ios->clock, ios->power_mode);
733 host->mrq = ERR_PTR(-EINTR);
735 dev_dbg(&host->pdev->dev,
736 "%s.%d: CMD%u active since %lu, now %lu!\n",
737 current->comm, task_pid_nr(current),
738 host->mrq->cmd->opcode, host->last_req_ts, jiffies);
740 spin_unlock_irqrestore(&host->lock, flags);
742 mutex_unlock(&host->ios_lock);
746 host->mrq = ERR_PTR(-EBUSY);
748 spin_unlock_irqrestore(&host->lock, flags);
751 * pdata->power == false only if COLD_CD is available, otherwise only
752 * in short time intervals during probing or resuming
754 if (ios->power_mode == MMC_POWER_ON && ios->clock) {
756 pm_runtime_get_sync(&host->pdev->dev);
759 tmio_mmc_set_clock(host, ios->clock);
760 /* power up SD bus */
762 host->set_pwr(host->pdev, 1);
763 /* start bus clock */
764 tmio_mmc_clk_start(host);
765 } else if (ios->power_mode != MMC_POWER_UP) {
767 host->set_pwr(host->pdev, 0);
768 if ((pdata->flags & TMIO_MMC_HAS_COLD_CD) &&
770 pdata->power = false;
771 pm_runtime_put(&host->pdev->dev);
773 tmio_mmc_clk_stop(host);
776 switch (ios->bus_width) {
777 case MMC_BUS_WIDTH_1:
778 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
780 case MMC_BUS_WIDTH_4:
781 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
785 /* Let things settle. delay taken from winCE driver */
787 if (PTR_ERR(host->mrq) == -EINTR)
788 dev_dbg(&host->pdev->dev,
789 "%s.%d: IOS interrupted: clk %u, mode %u",
790 current->comm, task_pid_nr(current),
791 ios->clock, ios->power_mode);
794 mutex_unlock(&host->ios_lock);
797 static int tmio_mmc_get_ro(struct mmc_host *mmc)
799 struct tmio_mmc_host *host = mmc_priv(mmc);
800 struct tmio_mmc_data *pdata = host->pdata;
802 return !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
803 (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
806 static int tmio_mmc_get_cd(struct mmc_host *mmc)
808 struct tmio_mmc_host *host = mmc_priv(mmc);
809 struct tmio_mmc_data *pdata = host->pdata;
814 return pdata->get_cd(host->pdev);
817 static const struct mmc_host_ops tmio_mmc_ops = {
818 .request = tmio_mmc_request,
819 .set_ios = tmio_mmc_set_ios,
820 .get_ro = tmio_mmc_get_ro,
821 .get_cd = tmio_mmc_get_cd,
822 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
825 int __devinit tmio_mmc_host_probe(struct tmio_mmc_host **host,
826 struct platform_device *pdev,
827 struct tmio_mmc_data *pdata)
829 struct tmio_mmc_host *_host;
830 struct mmc_host *mmc;
831 struct resource *res_ctl;
833 u32 irq_mask = TMIO_MASK_CMD;
835 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
839 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
843 pdata->dev = &pdev->dev;
844 _host = mmc_priv(mmc);
845 _host->pdata = pdata;
848 platform_set_drvdata(pdev, mmc);
850 _host->set_pwr = pdata->set_pwr;
851 _host->set_clk_div = pdata->set_clk_div;
853 /* SD control register space size is 0x200, 0x400 for bus_shift=1 */
854 _host->bus_shift = resource_size(res_ctl) >> 10;
856 _host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
862 mmc->ops = &tmio_mmc_ops;
863 mmc->caps = MMC_CAP_4_BIT_DATA | pdata->capabilities;
864 mmc->f_max = pdata->hclk;
865 mmc->f_min = mmc->f_max / 512;
867 mmc->max_blk_size = 512;
868 mmc->max_blk_count = (PAGE_CACHE_SIZE / mmc->max_blk_size) *
870 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
871 mmc->max_seg_size = mmc->max_req_size;
873 mmc->ocr_avail = pdata->ocr_mask;
875 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
877 pdata->power = false;
878 pm_runtime_enable(&pdev->dev);
879 ret = pm_runtime_resume(&pdev->dev);
883 tmio_mmc_clk_stop(_host);
884 tmio_mmc_reset(_host);
886 _host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK);
887 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
888 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
889 tmio_mmc_enable_sdio_irq(mmc, 0);
891 spin_lock_init(&_host->lock);
892 mutex_init(&_host->ios_lock);
894 /* Init delayed work for request timeouts */
895 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
896 INIT_WORK(&_host->done, tmio_mmc_done_work);
898 /* See if we also get DMA */
899 tmio_mmc_request_dma(_host, pdata);
901 /* We have to keep the device powered for its card detection to work */
902 if (!(pdata->flags & TMIO_MMC_HAS_COLD_CD)) {
904 pm_runtime_get_noresume(&pdev->dev);
909 /* Unmask the IRQs we want to know about */
911 irq_mask |= TMIO_MASK_READOP;
913 irq_mask |= TMIO_MASK_WRITEOP;
915 tmio_mmc_enable_mmc_irqs(_host, irq_mask);
922 pm_runtime_disable(&pdev->dev);
929 EXPORT_SYMBOL(tmio_mmc_host_probe);
931 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
933 struct platform_device *pdev = host->pdev;
936 * We don't have to manipulate pdata->power here: if there is a card in
937 * the slot, the runtime PM is active and our .runtime_resume() will not
938 * be run. If there is no card in the slot and the platform can suspend
939 * the controller, the runtime PM is suspended and pdata->power == false,
940 * so, our .runtime_resume() will not try to detect a card in the slot.
942 if (host->pdata->flags & TMIO_MMC_HAS_COLD_CD)
943 pm_runtime_get_sync(&pdev->dev);
945 mmc_remove_host(host->mmc);
946 cancel_work_sync(&host->done);
947 cancel_delayed_work_sync(&host->delayed_reset_work);
948 tmio_mmc_release_dma(host);
950 pm_runtime_put_sync(&pdev->dev);
951 pm_runtime_disable(&pdev->dev);
954 mmc_free_host(host->mmc);
956 EXPORT_SYMBOL(tmio_mmc_host_remove);
959 int tmio_mmc_host_suspend(struct device *dev)
961 struct mmc_host *mmc = dev_get_drvdata(dev);
962 struct tmio_mmc_host *host = mmc_priv(mmc);
963 int ret = mmc_suspend_host(mmc);
966 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
968 host->pm_error = pm_runtime_put_sync(dev);
972 EXPORT_SYMBOL(tmio_mmc_host_suspend);
974 int tmio_mmc_host_resume(struct device *dev)
976 struct mmc_host *mmc = dev_get_drvdata(dev);
977 struct tmio_mmc_host *host = mmc_priv(mmc);
979 /* The MMC core will perform the complete set up */
980 host->pdata->power = false;
982 host->pm_global = true;
984 pm_runtime_get_sync(dev);
986 if (host->pm_global) {
987 /* Runtime PM resume callback didn't run */
988 tmio_mmc_reset(host);
989 tmio_mmc_enable_dma(host, true);
990 host->pm_global = false;
993 return mmc_resume_host(mmc);
995 EXPORT_SYMBOL(tmio_mmc_host_resume);
997 #endif /* CONFIG_PM */
999 int tmio_mmc_host_runtime_suspend(struct device *dev)
1003 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
1005 int tmio_mmc_host_runtime_resume(struct device *dev)
1007 struct mmc_host *mmc = dev_get_drvdata(dev);
1008 struct tmio_mmc_host *host = mmc_priv(mmc);
1009 struct tmio_mmc_data *pdata = host->pdata;
1011 tmio_mmc_reset(host);
1012 tmio_mmc_enable_dma(host, true);
1015 /* Only entered after a card-insert interrupt */
1017 tmio_mmc_set_ios(mmc, &mmc->ios);
1018 mmc_detect_change(mmc, msecs_to_jiffies(100));
1020 host->pm_global = false;
1024 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
1026 MODULE_LICENSE("GPL v2");