drivers/mmc/host/msm_sdcc.c

   1 /*
   2  *  linux/drivers/mmc/host/msm_sdcc.c - Qualcomm MSM 7X00A SDCC Driver
   3  *
   4  *  Copyright (C) 2007 Google Inc,
   5  *  Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
   6  *  Copyright (C) 2009, Code Aurora Forum. All Rights Reserved.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Based on mmci.c
  13  *
  14  * Author: San Mehat (san@android.com)
  15  *
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/moduleparam.h>
  20 #include <linux/init.h>
  21 #include <linux/ioport.h>
  22 #include <linux/device.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/delay.h>
  25 #include <linux/err.h>
  26 #include <linux/highmem.h>
  27 #include <linux/log2.h>
  28 #include <linux/mmc/host.h>
  29 #include <linux/mmc/card.h>
  30 #include <linux/mmc/sdio.h>
  31 #include <linux/clk.h>
  32 #include <linux/scatterlist.h>
  33 #include <linux/platform_device.h>
  34 #include <linux/dma-mapping.h>
  35 #include <linux/debugfs.h>
  36 #include <linux/io.h>
  37 #include <linux/memory.h>
  38 #include <linux/gfp.h>
  39 #include <linux/gpio.h>
  40
  41 #include <asm/cacheflush.h>
  42 #include <asm/div64.h>
  43 #include <asm/sizes.h>
  44
  45 #include <mach/mmc.h>
  46 #include <mach/msm_iomap.h>
  47 #include <mach/dma.h>
  48 #include <mach/clk.h>
  49
  50 #include "msm_sdcc.h"
  51
  52 #define DRIVER_NAME "msm-sdcc"
  53
  54 #define BUSCLK_PWRSAVE 1
  55 #define BUSCLK_TIMEOUT (HZ)
  56 static unsigned int msmsdcc_fmin = 144000;
  57 static unsigned int msmsdcc_fmax = 50000000;
  58 static unsigned int msmsdcc_4bit = 1;
  59 static unsigned int msmsdcc_pwrsave = 1;
  60 static unsigned int msmsdcc_piopoll = 1;
  61 static unsigned int msmsdcc_sdioirq;
  62
  63 #define PIO_SPINMAX 30
  64 #define CMD_SPINMAX 20
  65
  66
  67 static inline void
  68 msmsdcc_disable_clocks(struct msmsdcc_host *host, int deferr)
  69 {
  70         WARN_ON(!host->clks_on);
  71
  72         BUG_ON(host->curr.mrq);
  73
  74         if (deferr) {
  75                 mod_timer(&host->busclk_timer, jiffies + BUSCLK_TIMEOUT);
  76         } else {
  77                 del_timer_sync(&host->busclk_timer);
  78                 /* Need to check clks_on again in case the busclk
  79                  * timer fired
  80                  */
  81                 if (host->clks_on) {
  82                         clk_disable(host->clk);
  83                         clk_disable(host->pclk);
  84                         host->clks_on = 0;
  85                 }
  86         }
  87 }
  88
  89 static inline int
  90 msmsdcc_enable_clocks(struct msmsdcc_host *host)
  91 {
  92         int rc;
  93
  94         del_timer_sync(&host->busclk_timer);
  95
  96         if (!host->clks_on) {
  97                 rc = clk_enable(host->pclk);
  98                 if (rc)
  99                         return rc;
 100                 rc = clk_enable(host->clk);
 101                 if (rc) {
 102                         clk_disable(host->pclk);
 103                         return rc;
 104                 }
 105                 udelay(1 + ((3 * USEC_PER_SEC) /
 106                        (host->clk_rate ? host->clk_rate : msmsdcc_fmin)));
 107                 host->clks_on = 1;
 108         }
 109         return 0;
 110 }
 111
 112 static inline unsigned int
 113 msmsdcc_readl(struct msmsdcc_host *host, unsigned int reg)
 114 {
 115         return readl(host->base + reg);
 116 }
 117
 118 static inline void
 119 msmsdcc_writel(struct msmsdcc_host *host, u32 data, unsigned int reg)
 120 {
 121         writel(data, host->base + reg);
 122         /* 3 clk delay required! */
 123         udelay(1 + ((3 * USEC_PER_SEC) /
 124                (host->clk_rate ? host->clk_rate : msmsdcc_fmin)));
 125 }
 126
 127 static void
 128 msmsdcc_start_command(struct msmsdcc_host *host, struct mmc_command *cmd,
 129                       u32 c);
 130
 131 static void msmsdcc_reset_and_restore(struct msmsdcc_host *host)
 132 {
 133         u32     mci_clk = 0;
 134         u32     mci_mask0 = 0;
 135         int     ret = 0;
 136
 137         /* Save the controller state */
 138         mci_clk = readl(host->base + MMCICLOCK);
 139         mci_mask0 = readl(host->base + MMCIMASK0);
 140
 141         /* Reset the controller */
 142         ret = clk_reset(host->clk, CLK_RESET_ASSERT);
 143         if (ret)
 144                 pr_err("%s: Clock assert failed at %u Hz with err %d\n",
 145                                 mmc_hostname(host->mmc), host->clk_rate, ret);
 146
 147         ret = clk_reset(host->clk, CLK_RESET_DEASSERT);
 148         if (ret)
 149                 pr_err("%s: Clock deassert failed at %u Hz with err %d\n",
 150                                 mmc_hostname(host->mmc), host->clk_rate, ret);
 151
 152         pr_info("%s: Controller has been re-initialiazed\n",
 153                         mmc_hostname(host->mmc));
 154
 155         /* Restore the contoller state */
 156         writel(host->pwr, host->base + MMCIPOWER);
 157         writel(mci_clk, host->base + MMCICLOCK);
 158         writel(mci_mask0, host->base + MMCIMASK0);
 159         ret = clk_set_rate(host->clk, host->clk_rate);
 160         if (ret)
 161                 pr_err("%s: Failed to set clk rate %u Hz (%d)\n",
 162                                 mmc_hostname(host->mmc), host->clk_rate, ret);
 163 }
 164
 165 static void
 166 msmsdcc_request_end(struct msmsdcc_host *host, struct mmc_request *mrq)
 167 {
 168         BUG_ON(host->curr.data);
 169
 170         host->curr.mrq = NULL;
 171         host->curr.cmd = NULL;
 172
 173         if (mrq->data)
 174                 mrq->data->bytes_xfered = host->curr.data_xfered;
 175         if (mrq->cmd->error == -ETIMEDOUT)
 176                 mdelay(5);
 177
 178 #if BUSCLK_PWRSAVE
 179         msmsdcc_disable_clocks(host, 1);
 180 #endif
 181         /*
 182          * Need to drop the host lock here; mmc_request_done may call
 183          * back into the driver...
 184          */
 185         spin_unlock(&host->lock);
 186         mmc_request_done(host->mmc, mrq);
 187         spin_lock(&host->lock);
 188 }
 189
 190 static void
 191 msmsdcc_stop_data(struct msmsdcc_host *host)
 192 {
 193         host->curr.data = NULL;
 194         host->curr.got_dataend = 0;
 195 }
 196
 197 uint32_t msmsdcc_fifo_addr(struct msmsdcc_host *host)
 198 {
 199         return host->memres->start + MMCIFIFO;
 200 }
 201
 202 static inline void
 203 msmsdcc_start_command_exec(struct msmsdcc_host *host, u32 arg, u32 c) {
 204        msmsdcc_writel(host, arg, MMCIARGUMENT);
 205        msmsdcc_writel(host, c, MMCICOMMAND);
 206 }
 207
 208 static void
 209 msmsdcc_dma_exec_func(struct msm_dmov_cmd *cmd)
 210 {
 211         struct msmsdcc_host *host = (struct msmsdcc_host *)cmd->data;
 212
 213         msmsdcc_writel(host, host->cmd_timeout, MMCIDATATIMER);
 214         msmsdcc_writel(host, (unsigned int)host->curr.xfer_size,
 215                        MMCIDATALENGTH);
 216         msmsdcc_writel(host, host->cmd_pio_irqmask, MMCIMASK1);
 217         msmsdcc_writel(host, host->cmd_datactrl, MMCIDATACTRL);
 218
 219         if (host->cmd_cmd) {
 220                 msmsdcc_start_command_exec(host,
 221                                            (u32) host->cmd_cmd->arg,
 222                                            (u32) host->cmd_c);
 223         }
 224         host->dma.active = 1;
 225 }
 226
 227 static void
 228 msmsdcc_dma_complete_tlet(unsigned long data)
 229 {
 230         struct msmsdcc_host *host = (struct msmsdcc_host *)data;
 231         unsigned long           flags;
 232         struct mmc_request      *mrq;
 233         struct msm_dmov_errdata err;
 234
 235         spin_lock_irqsave(&host->lock, flags);
 236         host->dma.active = 0;
 237
 238         err = host->dma.err;
 239         mrq = host->curr.mrq;
 240         BUG_ON(!mrq);
 241         WARN_ON(!mrq->data);
 242
 243         if (!(host->dma.result & DMOV_RSLT_VALID)) {
 244                 pr_err("msmsdcc: Invalid DataMover result\n");
 245                 goto out;
 246         }
 247
 248         if (host->dma.result & DMOV_RSLT_DONE) {
 249                 host->curr.data_xfered = host->curr.xfer_size;
 250         } else {
 251                 /* Error or flush  */
 252                 if (host->dma.result & DMOV_RSLT_ERROR)
 253                         pr_err("%s: DMA error (0x%.8x)\n",
 254                                mmc_hostname(host->mmc), host->dma.result);
 255                 if (host->dma.result & DMOV_RSLT_FLUSH)
 256                         pr_err("%s: DMA channel flushed (0x%.8x)\n",
 257                                mmc_hostname(host->mmc), host->dma.result);
 258
 259                 pr_err("Flush data: %.8x %.8x %.8x %.8x %.8x %.8x\n",
 260                        err.flush[0], err.flush[1], err.flush[2],
 261                        err.flush[3], err.flush[4], err.flush[5]);
 262
 263                 msmsdcc_reset_and_restore(host);
 264                 if (!mrq->data->error)
 265                         mrq->data->error = -EIO;
 266         }
 267         dma_unmap_sg(mmc_dev(host->mmc), host->dma.sg, host->dma.num_ents,
 268                      host->dma.dir);
 269
 270         host->dma.sg = NULL;
 271         host->dma.busy = 0;
 272
 273         if (host->curr.got_dataend || mrq->data->error) {
 274
 275                 /*
 276                  * If we've already gotten our DATAEND / DATABLKEND
 277                  * for this request, then complete it through here.
 278                  */
 279                 msmsdcc_stop_data(host);
 280
 281                 if (!mrq->data->error)
 282                         host->curr.data_xfered = host->curr.xfer_size;
 283                 if (!mrq->data->stop || mrq->cmd->error) {
 284                         host->curr.mrq = NULL;
 285                         host->curr.cmd = NULL;
 286                         mrq->data->bytes_xfered = host->curr.data_xfered;
 287
 288                         spin_unlock_irqrestore(&host->lock, flags);
 289 #if BUSCLK_PWRSAVE
 290                         msmsdcc_disable_clocks(host, 1);
 291 #endif
 292                         mmc_request_done(host->mmc, mrq);
 293                         return;
 294                 } else
 295                         msmsdcc_start_command(host, mrq->data->stop, 0);
 296         }
 297
 298 out:
 299         spin_unlock_irqrestore(&host->lock, flags);
 300         return;
 301 }
 302
 303 static void
 304 msmsdcc_dma_complete_func(struct msm_dmov_cmd *cmd,
 305                           unsigned int result,
 306                           struct msm_dmov_errdata *err)
 307 {
 308         struct msmsdcc_dma_data *dma_data =
 309                 container_of(cmd, struct msmsdcc_dma_data, hdr);
 310         struct msmsdcc_host *host = dma_data->host;
 311
 312         dma_data->result = result;
 313         if (err)
 314                 memcpy(&dma_data->err, err, sizeof(struct msm_dmov_errdata));
 315
 316         tasklet_schedule(&host->dma_tlet);
 317 }
 318
 319 static int validate_dma(struct msmsdcc_host *host, struct mmc_data *data)
 320 {
 321         if (host->dma.channel == -1)
 322                 return -ENOENT;
 323
 324         if ((data->blksz * data->blocks) < MCI_FIFOSIZE)
 325                 return -EINVAL;
 326         if ((data->blksz * data->blocks) % MCI_FIFOSIZE)
 327                 return -EINVAL;
 328         return 0;
 329 }
 330
 331 static int msmsdcc_config_dma(struct msmsdcc_host *host, struct mmc_data *data)
 332 {
 333         struct msmsdcc_nc_dmadata *nc;
 334         dmov_box *box;
 335         uint32_t rows;
 336         uint32_t crci;
 337         unsigned int n;
 338         int i, rc;
 339         struct scatterlist *sg = data->sg;
 340
 341         rc = validate_dma(host, data);
 342         if (rc)
 343                 return rc;
 344
 345         host->dma.sg = data->sg;
 346         host->dma.num_ents = data->sg_len;
 347
 348        BUG_ON(host->dma.num_ents > NR_SG); /* Prevent memory corruption */
 349
 350         nc = host->dma.nc;
 351
 352         switch (host->pdev_id) {
 353         case 1:
 354                 crci = MSMSDCC_CRCI_SDC1;
 355                 break;
 356         case 2:
 357                 crci = MSMSDCC_CRCI_SDC2;
 358                 break;
 359         case 3:
 360                 crci = MSMSDCC_CRCI_SDC3;
 361                 break;
 362         case 4:
 363                 crci = MSMSDCC_CRCI_SDC4;
 364                 break;
 365         default:
 366                 host->dma.sg = NULL;
 367                 host->dma.num_ents = 0;
 368                 return -ENOENT;
 369         }
 370
 371         if (data->flags & MMC_DATA_READ)
 372                 host->dma.dir = DMA_FROM_DEVICE;
 373         else
 374                 host->dma.dir = DMA_TO_DEVICE;
 375
 376         host->curr.user_pages = 0;
 377
 378         box = &nc->cmd[0];
 379
 380         /* location of command block must be 64 bit aligned */
 381         BUG_ON(host->dma.cmd_busaddr & 0x07);
 382
 383         nc->cmdptr = (host->dma.cmd_busaddr >> 3) | CMD_PTR_LP;
 384         host->dma.hdr.cmdptr = DMOV_CMD_PTR_LIST |
 385                                DMOV_CMD_ADDR(host->dma.cmdptr_busaddr);
 386         host->dma.hdr.complete_func = msmsdcc_dma_complete_func;
 387
 388         n = dma_map_sg(mmc_dev(host->mmc), host->dma.sg,
 389                         host->dma.num_ents, host->dma.dir);
 390         if (n == 0) {
 391                 printk(KERN_ERR "%s: Unable to map in all sg elements\n",
 392                         mmc_hostname(host->mmc));
 393                 host->dma.sg = NULL;
 394                 host->dma.num_ents = 0;
 395                 return -ENOMEM;
 396         }
 397
 398         for_each_sg(host->dma.sg, sg, n, i) {
 399
 400                 box->cmd = CMD_MODE_BOX;
 401
 402                 if (i == n - 1)
 403                         box->cmd |= CMD_LC;
 404                 rows = (sg_dma_len(sg) % MCI_FIFOSIZE) ?
 405                         (sg_dma_len(sg) / MCI_FIFOSIZE) + 1 :
 406                         (sg_dma_len(sg) / MCI_FIFOSIZE) ;
 407
 408                 if (data->flags & MMC_DATA_READ) {
 409                         box->src_row_addr = msmsdcc_fifo_addr(host);
 410                         box->dst_row_addr = sg_dma_address(sg);
 411
 412                         box->src_dst_len = (MCI_FIFOSIZE << 16) |
 413                                            (MCI_FIFOSIZE);
 414                         box->row_offset = MCI_FIFOSIZE;
 415
 416                         box->num_rows = rows * ((1 << 16) + 1);
 417                         box->cmd |= CMD_SRC_CRCI(crci);
 418                 } else {
 419                         box->src_row_addr = sg_dma_address(sg);
 420                         box->dst_row_addr = msmsdcc_fifo_addr(host);
 421
 422                         box->src_dst_len = (MCI_FIFOSIZE << 16) |
 423                                            (MCI_FIFOSIZE);
 424                         box->row_offset = (MCI_FIFOSIZE << 16);
 425
 426                         box->num_rows = rows * ((1 << 16) + 1);
 427                         box->cmd |= CMD_DST_CRCI(crci);
 428                 }
 429                 box++;
 430         }
 431
 432         return 0;
 433 }
 434
 435 static int
 436 snoop_cccr_abort(struct mmc_command *cmd)
 437 {
 438         if ((cmd->opcode == 52) &&
 439             (cmd->arg & 0x80000000) &&
 440             (((cmd->arg >> 9) & 0x1ffff) == SDIO_CCCR_ABORT))
 441                 return 1;
 442         return 0;
 443 }
 444
 445 static void
 446 msmsdcc_start_command_deferred(struct msmsdcc_host *host,
 447                                 struct mmc_command *cmd, u32 *c)
 448 {
 449         *c |= (cmd->opcode | MCI_CPSM_ENABLE);
 450
 451         if (cmd->flags & MMC_RSP_PRESENT) {
 452                 if (cmd->flags & MMC_RSP_136)
 453                         *c |= MCI_CPSM_LONGRSP;
 454                 *c |= MCI_CPSM_RESPONSE;
 455         }
 456
 457         if (/*interrupt*/0)
 458                 *c |= MCI_CPSM_INTERRUPT;
 459
 460         if ((((cmd->opcode == 17) || (cmd->opcode == 18))  ||
 461              ((cmd->opcode == 24) || (cmd->opcode == 25))) ||
 462               (cmd->opcode == 53))
 463                 *c |= MCI_CSPM_DATCMD;
 464
 465         if (host->prog_scan && (cmd->opcode == 12)) {
 466                 *c |= MCI_CPSM_PROGENA;
 467                 host->prog_enable = true;
 468         }
 469
 470         if (cmd == cmd->mrq->stop)
 471                 *c |= MCI_CSPM_MCIABORT;
 472
 473         if (snoop_cccr_abort(cmd))
 474                 *c |= MCI_CSPM_MCIABORT;
 475
 476         if (host->curr.cmd != NULL) {
 477                 printk(KERN_ERR "%s: Overlapping command requests\n",
 478                         mmc_hostname(host->mmc));
 479         }
 480         host->curr.cmd = cmd;
 481 }
 482
 483 static void
 484 msmsdcc_start_data(struct msmsdcc_host *host, struct mmc_data *data,
 485                         struct mmc_command *cmd, u32 c)
 486 {
 487         unsigned int datactrl, timeout;
 488         unsigned long long clks;
 489         unsigned int pio_irqmask = 0;
 490
 491         host->curr.data = data;
 492         host->curr.xfer_size = data->blksz * data->blocks;
 493         host->curr.xfer_remain = host->curr.xfer_size;
 494         host->curr.data_xfered = 0;
 495         host->curr.got_dataend = 0;
 496
 497         memset(&host->pio, 0, sizeof(host->pio));
 498
 499         datactrl = MCI_DPSM_ENABLE | (data->blksz << 4);
 500
 501         if (!msmsdcc_config_dma(host, data))
 502                 datactrl |= MCI_DPSM_DMAENABLE;
 503         else {
 504                 host->pio.sg = data->sg;
 505                 host->pio.sg_len = data->sg_len;
 506                 host->pio.sg_off = 0;
 507
 508                 if (data->flags & MMC_DATA_READ) {
 509                         pio_irqmask = MCI_RXFIFOHALFFULLMASK;
 510                         if (host->curr.xfer_remain < MCI_FIFOSIZE)
 511                                 pio_irqmask |= MCI_RXDATAAVLBLMASK;
 512                 } else
 513                         pio_irqmask = MCI_TXFIFOHALFEMPTYMASK;
 514         }
 515
 516         if (data->flags & MMC_DATA_READ)
 517                 datactrl |= MCI_DPSM_DIRECTION;
 518
 519         clks = (unsigned long long)data->timeout_ns * host->clk_rate;
 520         do_div(clks, NSEC_PER_SEC);
 521         timeout = data->timeout_clks + (unsigned int)clks*2 ;
 522
 523         if (datactrl & MCI_DPSM_DMAENABLE) {
 524                 /* Save parameters for the exec function */
 525                 host->cmd_timeout = timeout;
 526                 host->cmd_pio_irqmask = pio_irqmask;
 527                 host->cmd_datactrl = datactrl;
 528                 host->cmd_cmd = cmd;
 529
 530                 host->dma.hdr.execute_func = msmsdcc_dma_exec_func;
 531                 host->dma.hdr.data = (void *)host;
 532                 host->dma.busy = 1;
 533
 534                 if (cmd) {
 535                         msmsdcc_start_command_deferred(host, cmd, &c);
 536                         host->cmd_c = c;
 537                 }
 538                 msm_dmov_enqueue_cmd(host->dma.channel, &host->dma.hdr);
 539                 if (data->flags & MMC_DATA_WRITE)
 540                         host->prog_scan = true;
 541         } else {
 542                 msmsdcc_writel(host, timeout, MMCIDATATIMER);
 543
 544                 msmsdcc_writel(host, host->curr.xfer_size, MMCIDATALENGTH);
 545
 546                 msmsdcc_writel(host, pio_irqmask, MMCIMASK1);
 547                 msmsdcc_writel(host, datactrl, MMCIDATACTRL);
 548
 549                 if (cmd) {
 550                         /* Daisy-chain the command if requested */
 551                         msmsdcc_start_command(host, cmd, c);
 552                 }
 553         }
 554 }
 555
 556 static void
 557 msmsdcc_start_command(struct msmsdcc_host *host, struct mmc_command *cmd, u32 c)
 558 {
 559         if (cmd == cmd->mrq->stop)
 560                 c |= MCI_CSPM_MCIABORT;
 561
 562         host->stats.cmds++;
 563
 564         msmsdcc_start_command_deferred(host, cmd, &c);
 565         msmsdcc_start_command_exec(host, cmd->arg, c);
 566 }
 567
 568 static void
 569 msmsdcc_data_err(struct msmsdcc_host *host, struct mmc_data *data,
 570                  unsigned int status)
 571 {
 572         if (status & MCI_DATACRCFAIL) {
 573                 pr_err("%s: Data CRC error\n", mmc_hostname(host->mmc));
 574                 pr_err("%s: opcode 0x%.8x\n", __func__,
 575                        data->mrq->cmd->opcode);
 576                 pr_err("%s: blksz %d, blocks %d\n", __func__,
 577                        data->blksz, data->blocks);
 578                 data->error = -EILSEQ;
 579         } else if (status & MCI_DATATIMEOUT) {
 580                 pr_err("%s: Data timeout\n", mmc_hostname(host->mmc));
 581                 data->error = -ETIMEDOUT;
 582         } else if (status & MCI_RXOVERRUN) {
 583                 pr_err("%s: RX overrun\n", mmc_hostname(host->mmc));
 584                 data->error = -EIO;
 585         } else if (status & MCI_TXUNDERRUN) {
 586                 pr_err("%s: TX underrun\n", mmc_hostname(host->mmc));
 587                 data->error = -EIO;
 588         } else {
 589                 pr_err("%s: Unknown error (0x%.8x)\n",
 590                        mmc_hostname(host->mmc), status);
 591                 data->error = -EIO;
 592         }
 593 }
 594
 595
 596 static int
 597 msmsdcc_pio_read(struct msmsdcc_host *host, char *buffer, unsigned int remain)
 598 {
 599         uint32_t        *ptr = (uint32_t *) buffer;
 600         int             count = 0;
 601
 602         if (remain % 4)
 603                 remain = ((remain >> 2) + 1) << 2;
 604
 605         while (msmsdcc_readl(host, MMCISTATUS) & MCI_RXDATAAVLBL) {
 606                 *ptr = msmsdcc_readl(host, MMCIFIFO + (count % MCI_FIFOSIZE));
 607                 ptr++;
 608                 count += sizeof(uint32_t);
 609
 610                 remain -=  sizeof(uint32_t);
 611                 if (remain == 0)
 612                         break;
 613         }
 614         return count;
 615 }
 616
 617 static int
 618 msmsdcc_pio_write(struct msmsdcc_host *host, char *buffer,
 619                   unsigned int remain, u32 status)
 620 {
 621         void __iomem *base = host->base;
 622         char *ptr = buffer;
 623
 624         do {
 625                 unsigned int count, maxcnt, sz;
 626
 627                 maxcnt = status & MCI_TXFIFOEMPTY ? MCI_FIFOSIZE :
 628                                                     MCI_FIFOHALFSIZE;
 629                 count = min(remain, maxcnt);
 630
 631                 sz = count % 4 ? (count >> 2) + 1 : (count >> 2);
 632                 writesl(base + MMCIFIFO, ptr, sz);
 633                 ptr += count;
 634                 remain -= count;
 635
 636                 if (remain == 0)
 637                         break;
 638
 639                 status = msmsdcc_readl(host, MMCISTATUS);
 640         } while (status & MCI_TXFIFOHALFEMPTY);
 641
 642         return ptr - buffer;
 643 }
 644
 645 static int
 646 msmsdcc_spin_on_status(struct msmsdcc_host *host, uint32_t mask, int maxspin)
 647 {
 648         while (maxspin) {
 649                 if ((msmsdcc_readl(host, MMCISTATUS) & mask))
 650                         return 0;
 651                 udelay(1);
 652                 --maxspin;
 653         }
 654         return -ETIMEDOUT;
 655 }
 656
 657 static irqreturn_t
 658 msmsdcc_pio_irq(int irq, void *dev_id)
 659 {
 660         struct msmsdcc_host     *host = dev_id;
 661         uint32_t                status;
 662
 663         status = msmsdcc_readl(host, MMCISTATUS);
 664
 665         do {
 666                 unsigned long flags;
 667                 unsigned int remain, len;
 668                 char *buffer;
 669
 670                 if (!(status & (MCI_TXFIFOHALFEMPTY | MCI_RXDATAAVLBL))) {
 671                         if (host->curr.xfer_remain == 0 || !msmsdcc_piopoll)
 672                                 break;
 673
 674                         if (msmsdcc_spin_on_status(host,
 675                                                    (MCI_TXFIFOHALFEMPTY |
 676                                                    MCI_RXDATAAVLBL),
 677                                                    PIO_SPINMAX)) {
 678                                 break;
 679                         }
 680                 }
 681
 682                 /* Map the current scatter buffer */
 683                 local_irq_save(flags);
 684                 buffer = kmap_atomic(sg_page(host->pio.sg),
 685                                      KM_BIO_SRC_IRQ) + host->pio.sg->offset;
 686                 buffer += host->pio.sg_off;
 687                 remain = host->pio.sg->length - host->pio.sg_off;
 688                 len = 0;
 689                 if (status & MCI_RXACTIVE)
 690                         len = msmsdcc_pio_read(host, buffer, remain);
 691                 if (status & MCI_TXACTIVE)
 692                         len = msmsdcc_pio_write(host, buffer, remain, status);
 693
 694                 /* Unmap the buffer */
 695                 kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
 696                 local_irq_restore(flags);
 697
 698                 host->pio.sg_off += len;
 699                 host->curr.xfer_remain -= len;
 700                 host->curr.data_xfered += len;
 701                 remain -= len;
 702
 703                 if (remain == 0) {
 704                         /* This sg page is full - do some housekeeping */
 705                         if (status & MCI_RXACTIVE && host->curr.user_pages)
 706                                 flush_dcache_page(sg_page(host->pio.sg));
 707
 708                         if (!--host->pio.sg_len) {
 709                                 memset(&host->pio, 0, sizeof(host->pio));
 710                                 break;
 711                         }
 712
 713                         /* Advance to next sg */
 714                         host->pio.sg++;
 715                         host->pio.sg_off = 0;
 716                 }
 717
 718                 status = msmsdcc_readl(host, MMCISTATUS);
 719         } while (1);
 720
 721         if (status & MCI_RXACTIVE && host->curr.xfer_remain < MCI_FIFOSIZE)
 722                 msmsdcc_writel(host, MCI_RXDATAAVLBLMASK, MMCIMASK1);
 723
 724         if (!host->curr.xfer_remain)
 725                 msmsdcc_writel(host, 0, MMCIMASK1);
 726
 727         return IRQ_HANDLED;
 728 }
 729
 730 static void msmsdcc_do_cmdirq(struct msmsdcc_host *host, uint32_t status)
 731 {
 732         struct mmc_command *cmd = host->curr.cmd;
 733
 734         host->curr.cmd = NULL;
 735         cmd->resp[0] = msmsdcc_readl(host, MMCIRESPONSE0);
 736         cmd->resp[1] = msmsdcc_readl(host, MMCIRESPONSE1);
 737         cmd->resp[2] = msmsdcc_readl(host, MMCIRESPONSE2);
 738         cmd->resp[3] = msmsdcc_readl(host, MMCIRESPONSE3);
 739
 740         if (status & MCI_CMDTIMEOUT) {
 741                 cmd->error = -ETIMEDOUT;
 742         } else if (status & MCI_CMDCRCFAIL &&
 743                    cmd->flags & MMC_RSP_CRC) {
 744                 pr_err("%s: Command CRC error\n", mmc_hostname(host->mmc));
 745                 cmd->error = -EILSEQ;
 746         }
 747
 748         if (!cmd->data || cmd->error) {
 749                 if (host->curr.data && host->dma.sg)
 750                         msm_dmov_stop_cmd(host->dma.channel,
 751                                           &host->dma.hdr, 0);
 752                 else if (host->curr.data) { /* Non DMA */
 753                         msmsdcc_reset_and_restore(host);
 754                         msmsdcc_stop_data(host);
 755                         msmsdcc_request_end(host, cmd->mrq);
 756                 } else { /* host->data == NULL */
 757                         if (!cmd->error && host->prog_enable) {
 758                                 if (status & MCI_PROGDONE) {
 759                                         host->prog_scan = false;
 760                                         host->prog_enable = false;
 761                                         msmsdcc_request_end(host, cmd->mrq);
 762                                 } else {
 763                                         host->curr.cmd = cmd;
 764                                 }
 765                         } else {
 766                                 if (host->prog_enable) {
 767                                         host->prog_scan = false;
 768                                         host->prog_enable = false;
 769                                 }
 770                                 msmsdcc_request_end(host, cmd->mrq);
 771                         }
 772                 }
 773         } else if (cmd->data)
 774                 if (!(cmd->data->flags & MMC_DATA_READ))
 775                         msmsdcc_start_data(host, cmd->data,
 776                                                 NULL, 0);
 777 }
 778
 779 static void
 780 msmsdcc_handle_irq_data(struct msmsdcc_host *host, u32 status,
 781                         void __iomem *base)
 782 {
 783         struct mmc_data *data = host->curr.data;
 784
 785         if (status & (MCI_CMDSENT | MCI_CMDRESPEND | MCI_CMDCRCFAIL |
 786                         MCI_CMDTIMEOUT | MCI_PROGDONE) && host->curr.cmd) {
 787                 msmsdcc_do_cmdirq(host, status);
 788         }
 789
 790         if (!data)
 791                 return;
 792
 793         /* Check for data errors */
 794         if (status & (MCI_DATACRCFAIL | MCI_DATATIMEOUT |
 795                       MCI_TXUNDERRUN | MCI_RXOVERRUN)) {
 796                 msmsdcc_data_err(host, data, status);
 797                 host->curr.data_xfered = 0;
 798                 if (host->dma.sg)
 799                         msm_dmov_stop_cmd(host->dma.channel,
 800                                           &host->dma.hdr, 0);
 801                 else {
 802                         msmsdcc_reset_and_restore(host);
 803                         if (host->curr.data)
 804                                 msmsdcc_stop_data(host);
 805                         if (!data->stop)
 806                                 msmsdcc_request_end(host, data->mrq);
 807                         else
 808                                 msmsdcc_start_command(host, data->stop, 0);
 809                 }
 810         }
 811
 812         /* Check for data done */
 813         if (!host->curr.got_dataend && (status & MCI_DATAEND))
 814                 host->curr.got_dataend = 1;
 815
 816         /*
 817          * If DMA is still in progress, we complete via the completion handler
 818          */
 819         if (host->curr.got_dataend && !host->dma.busy) {
 820                 /*
 821                  * There appears to be an issue in the controller where
 822                  * if you request a small block transfer (< fifo size),
 823                  * you may get your DATAEND/DATABLKEND irq without the
 824                  * PIO data irq.
 825                  *
 826                  * Check to see if there is still data to be read,
 827                  * and simulate a PIO irq.
 828                  */
 829                 if (readl(base + MMCISTATUS) & MCI_RXDATAAVLBL)
 830                         msmsdcc_pio_irq(1, host);
 831
 832                 msmsdcc_stop_data(host);
 833                 if (!data->error)
 834                         host->curr.data_xfered = host->curr.xfer_size;
 835
 836                 if (!data->stop)
 837                         msmsdcc_request_end(host, data->mrq);
 838                 else
 839                         msmsdcc_start_command(host, data->stop, 0);
 840         }
 841 }
 842
 843 static irqreturn_t
 844 msmsdcc_irq(int irq, void *dev_id)
 845 {
 846         struct msmsdcc_host     *host = dev_id;
 847         void __iomem            *base = host->base;
 848         u32                     status;
 849         int                     ret = 0;
 850         int                     cardint = 0;
 851
 852         spin_lock(&host->lock);
 853
 854         do {
 855                 status = msmsdcc_readl(host, MMCISTATUS);
 856                 status &= msmsdcc_readl(host, MMCIMASK0);
 857                 msmsdcc_writel(host, status, MMCICLEAR);
 858
 859                 if (status & MCI_SDIOINTR)
 860                         status &= ~MCI_SDIOINTR;
 861
 862                 if (!status)
 863                         break;
 864
 865                 msmsdcc_handle_irq_data(host, status, base);
 866
 867                 if (status & MCI_SDIOINTOPER) {
 868                         cardint = 1;
 869                         status &= ~MCI_SDIOINTOPER;
 870                 }
 871                 ret = 1;
 872         } while (status);
 873
 874         spin_unlock(&host->lock);
 875
 876         /*
 877          * We have to delay handling the card interrupt as it calls
 878          * back into the driver.
 879          */
 880         if (cardint)
 881                 mmc_signal_sdio_irq(host->mmc);
 882
 883         return IRQ_RETVAL(ret);
 884 }
 885
 886 static void
 887 msmsdcc_request(struct mmc_host *mmc, struct mmc_request *mrq)
 888 {
 889         struct msmsdcc_host *host = mmc_priv(mmc);
 890         unsigned long flags;
 891
 892         WARN_ON(host->curr.mrq != NULL);
 893         WARN_ON(host->pwr == 0);
 894
 895         spin_lock_irqsave(&host->lock, flags);
 896
 897         host->stats.reqs++;
 898
 899         if (host->eject) {
 900                 if (mrq->data && !(mrq->data->flags & MMC_DATA_READ)) {
 901                         mrq->cmd->error = 0;
 902                         mrq->data->bytes_xfered = mrq->data->blksz *
 903                                                   mrq->data->blocks;
 904                 } else
 905                         mrq->cmd->error = -ENOMEDIUM;
 906
 907                 spin_unlock_irqrestore(&host->lock, flags);
 908                 mmc_request_done(mmc, mrq);
 909                 return;
 910         }
 911
 912         msmsdcc_enable_clocks(host);
 913
 914         host->curr.mrq = mrq;
 915
 916         if (mrq->data && mrq->data->flags & MMC_DATA_READ)
 917                 /* Queue/read data, daisy-chain command when data starts */
 918                 msmsdcc_start_data(host, mrq->data, mrq->cmd, 0);
 919         else
 920                 msmsdcc_start_command(host, mrq->cmd, 0);
 921
 922         if (host->cmdpoll && !msmsdcc_spin_on_status(host,
 923                                 MCI_CMDRESPEND|MCI_CMDCRCFAIL|MCI_CMDTIMEOUT,
 924                                 CMD_SPINMAX)) {
 925                 uint32_t status = msmsdcc_readl(host, MMCISTATUS);
 926                 msmsdcc_do_cmdirq(host, status);
 927                 msmsdcc_writel(host,
 928                                MCI_CMDRESPEND | MCI_CMDCRCFAIL | MCI_CMDTIMEOUT,
 929                                MMCICLEAR);
 930                 host->stats.cmdpoll_hits++;
 931         } else {
 932                 host->stats.cmdpoll_misses++;
 933         }
 934         spin_unlock_irqrestore(&host->lock, flags);
 935 }
 936
 937 static void msmsdcc_setup_gpio(struct msmsdcc_host *host, bool enable)
 938 {
 939         struct msm_mmc_gpio_data *curr;
 940         int i, rc = 0;
 941
 942         if (!host->plat->gpio_data || host->gpio_config_status == enable)
 943                 return;
 944
 945         curr = host->plat->gpio_data;
 946         for (i = 0; i < curr->size; i++) {
 947                 if (enable) {
 948                         rc = gpio_request(curr->gpio[i].no,
 949                                                 curr->gpio[i].name);
 950                         if (rc) {
 951                                 pr_err("%s: gpio_request(%d, %s) failed %d\n",
 952                                         mmc_hostname(host->mmc),
 953                                         curr->gpio[i].no,
 954                                         curr->gpio[i].name, rc);
 955                                 goto free_gpios;
 956                         }
 957                 } else {
 958                         gpio_free(curr->gpio[i].no);
 959                 }
 960         }
 961         host->gpio_config_status = enable;
 962         return;
 963
 964 free_gpios:
 965         for (; i >= 0; i--)
 966                 gpio_free(curr->gpio[i].no);
 967 }
 968
 969 static void
 970 msmsdcc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 971 {
 972         struct msmsdcc_host *host = mmc_priv(mmc);
 973         u32 clk = 0, pwr = 0;
 974         int rc;
 975         unsigned long flags;
 976
 977         spin_lock_irqsave(&host->lock, flags);
 978
 979         msmsdcc_enable_clocks(host);
 980
 981         spin_unlock_irqrestore(&host->lock, flags);
 982
 983         if (ios->clock) {
 984                 if (ios->clock != host->clk_rate) {
 985                         rc = clk_set_rate(host->clk, ios->clock);
 986                         if (rc < 0)
 987                                 pr_err("%s: Error setting clock rate (%d)\n",
 988                                        mmc_hostname(host->mmc), rc);
 989                         else
 990                                 host->clk_rate = ios->clock;
 991                 }
 992                 clk |= MCI_CLK_ENABLE;
 993         }
 994
 995         if (ios->bus_width == MMC_BUS_WIDTH_4)
 996                 clk |= (2 << 10); /* Set WIDEBUS */
 997
 998         if (ios->clock > 400000 && msmsdcc_pwrsave)
 999                 clk |= (1 << 9); /* PWRSAVE */
1000
1001         clk |= (1 << 12); /* FLOW_ENA */
1002         clk |= (1 << 15); /* feedback clock */
1003
1004         if (host->plat->translate_vdd)
1005                 pwr |= host->plat->translate_vdd(mmc_dev(mmc), ios->vdd);
1006
1007         switch (ios->power_mode) {
1008         case MMC_POWER_OFF:
1009                 msmsdcc_setup_gpio(host, false);
1010                 break;
1011         case MMC_POWER_UP:
1012                 pwr |= MCI_PWR_UP;
1013                 msmsdcc_setup_gpio(host, true);
1014                 break;
1015         case MMC_POWER_ON:
1016                 pwr |= MCI_PWR_ON;
1017                 break;
1018         }
1019
1020         if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
1021                 pwr |= MCI_OD;
1022
1023         msmsdcc_writel(host, clk, MMCICLOCK);
1024
1025         if (host->pwr != pwr) {
1026                 host->pwr = pwr;
1027                 msmsdcc_writel(host, pwr, MMCIPOWER);
1028         }
1029 #if BUSCLK_PWRSAVE
1030         spin_lock_irqsave(&host->lock, flags);
1031         msmsdcc_disable_clocks(host, 1);
1032         spin_unlock_irqrestore(&host->lock, flags);
1033 #endif
1034 }
1035
1036 static void msmsdcc_enable_sdio_irq(struct mmc_host *mmc, int enable)
1037 {
1038         struct msmsdcc_host *host = mmc_priv(mmc);
1039         unsigned long flags;
1040         u32 status;
1041
1042         spin_lock_irqsave(&host->lock, flags);
1043         if (msmsdcc_sdioirq == 1) {
1044                 status = msmsdcc_readl(host, MMCIMASK0);
1045                 if (enable)
1046                         status |= MCI_SDIOINTOPERMASK;
1047                 else
1048                         status &= ~MCI_SDIOINTOPERMASK;
1049                 host->saved_irq0mask = status;
1050                 msmsdcc_writel(host, status, MMCIMASK0);
1051         }
1052         spin_unlock_irqrestore(&host->lock, flags);
1053 }
1054
1055 static void msmsdcc_init_card(struct mmc_host *mmc, struct mmc_card *card)
1056 {
1057         struct msmsdcc_host *host = mmc_priv(mmc);
1058
1059         if (host->plat->init_card)
1060                 host->plat->init_card(card);
1061 }
1062
1063 static const struct mmc_host_ops msmsdcc_ops = {
1064         .request        = msmsdcc_request,
1065         .set_ios        = msmsdcc_set_ios,
1066         .enable_sdio_irq = msmsdcc_enable_sdio_irq,
1067         .init_card      = msmsdcc_init_card,
1068 };
1069
1070 static void
1071 msmsdcc_check_status(unsigned long data)
1072 {
1073         struct msmsdcc_host *host = (struct msmsdcc_host *)data;
1074         unsigned int status;
1075
1076         if (!host->plat->status) {
1077                 mmc_detect_change(host->mmc, 0);
1078                 goto out;
1079         }
1080
1081         status = host->plat->status(mmc_dev(host->mmc));
1082         host->eject = !status;
1083         if (status ^ host->oldstat) {
1084                 pr_info("%s: Slot status change detected (%d -> %d)\n",
1085                         mmc_hostname(host->mmc), host->oldstat, status);
1086                 if (status)
1087                         mmc_detect_change(host->mmc, (5 * HZ) / 2);
1088                 else
1089                         mmc_detect_change(host->mmc, 0);
1090         }
1091
1092         host->oldstat = status;
1093
1094 out:
1095         if (host->timer.function)
1096                 mod_timer(&host->timer, jiffies + HZ);
1097 }
1098
1099 static irqreturn_t
1100 msmsdcc_platform_status_irq(int irq, void *dev_id)
1101 {
1102         struct msmsdcc_host *host = dev_id;
1103
1104         printk(KERN_DEBUG "%s: %d\n", __func__, irq);
1105         msmsdcc_check_status((unsigned long) host);
1106         return IRQ_HANDLED;
1107 }
1108
1109 static void
1110 msmsdcc_status_notify_cb(int card_present, void *dev_id)
1111 {
1112         struct msmsdcc_host *host = dev_id;
1113
1114         printk(KERN_DEBUG "%s: card_present %d\n", mmc_hostname(host->mmc),
1115                card_present);
1116         msmsdcc_check_status((unsigned long) host);
1117 }
1118
1119 static void
1120 msmsdcc_busclk_expired(unsigned long _data)
1121 {
1122         struct msmsdcc_host     *host = (struct msmsdcc_host *) _data;
1123
1124         if (host->clks_on)
1125                 msmsdcc_disable_clocks(host, 0);
1126 }
1127
1128 static int
1129 msmsdcc_init_dma(struct msmsdcc_host *host)
1130 {
1131         memset(&host->dma, 0, sizeof(struct msmsdcc_dma_data));
1132         host->dma.host = host;
1133         host->dma.channel = -1;
1134
1135         if (!host->dmares)
1136                 return -ENODEV;
1137
1138         host->dma.nc = dma_alloc_coherent(NULL,
1139                                           sizeof(struct msmsdcc_nc_dmadata),
1140                                           &host->dma.nc_busaddr,
1141                                           GFP_KERNEL);
1142         if (host->dma.nc == NULL) {
1143                 pr_err("Unable to allocate DMA buffer\n");
1144                 return -ENOMEM;
1145         }
1146         memset(host->dma.nc, 0x00, sizeof(struct msmsdcc_nc_dmadata));
1147         host->dma.cmd_busaddr = host->dma.nc_busaddr;
1148         host->dma.cmdptr_busaddr = host->dma.nc_busaddr +
1149                                 offsetof(struct msmsdcc_nc_dmadata, cmdptr);
1150         host->dma.channel = host->dmares->start;
1151
1152         return 0;
1153 }
1154
1155 static int
1156 msmsdcc_probe(struct platform_device *pdev)
1157 {
1158         struct msm_mmc_platform_data *plat = pdev->dev.platform_data;
1159         struct msmsdcc_host *host;
1160         struct mmc_host *mmc;
1161         struct resource *cmd_irqres = NULL;
1162         struct resource *pio_irqres = NULL;
1163         struct resource *stat_irqres = NULL;
1164         struct resource *memres = NULL;
1165         struct resource *dmares = NULL;
1166         int ret;
1167
1168         /* must have platform data */
1169         if (!plat) {
1170                 pr_err("%s: Platform data not available\n", __func__);
1171                 ret = -EINVAL;
1172                 goto out;
1173         }
1174
1175         if (pdev->id < 1 || pdev->id > 4)
1176                 return -EINVAL;
1177
1178         if (pdev->resource == NULL || pdev->num_resources < 2) {
1179                 pr_err("%s: Invalid resource\n", __func__);
1180                 return -ENXIO;
1181         }
1182
1183         memres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1184         dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1185         cmd_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
1186                                                   "cmd_irq");
1187         pio_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
1188                                                   "pio_irq");
1189         stat_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
1190                                                    "status_irq");
1191
1192         if (!cmd_irqres || !pio_irqres || !memres) {
1193                 pr_err("%s: Invalid resource\n", __func__);
1194                 return -ENXIO;
1195         }
1196
1197         /*
1198          * Setup our host structure
1199          */
1200
1201         mmc = mmc_alloc_host(sizeof(struct msmsdcc_host), &pdev->dev);
1202         if (!mmc) {
1203                 ret = -ENOMEM;
1204                 goto out;
1205         }
1206
1207         host = mmc_priv(mmc);
1208         host->pdev_id = pdev->id;
1209         host->plat = plat;
1210         host->mmc = mmc;
1211         host->curr.cmd = NULL;
1212
1213         host->cmdpoll = 1;
1214
1215         host->base = ioremap(memres->start, PAGE_SIZE);
1216         if (!host->base) {
1217                 ret = -ENOMEM;
1218                 goto out;
1219         }
1220
1221         host->cmd_irqres = cmd_irqres;
1222         host->pio_irqres = pio_irqres;
1223         host->memres = memres;
1224         host->dmares = dmares;
1225         spin_lock_init(&host->lock);
1226
1227         tasklet_init(&host->dma_tlet, msmsdcc_dma_complete_tlet,
1228                         (unsigned long)host);
1229
1230         /*
1231          * Setup DMA
1232          */
1233         msmsdcc_init_dma(host);
1234
1235         /* Get our clocks */
1236         host->pclk = clk_get(&pdev->dev, "sdc_pclk");
1237         if (IS_ERR(host->pclk)) {
1238                 ret = PTR_ERR(host->pclk);
1239                 goto host_free;
1240         }
1241
1242         host->clk = clk_get(&pdev->dev, "sdc_clk");
1243         if (IS_ERR(host->clk)) {
1244                 ret = PTR_ERR(host->clk);
1245                 goto pclk_put;
1246         }
1247
1248         /* Enable clocks */
1249         ret = msmsdcc_enable_clocks(host);
1250         if (ret)
1251                 goto clk_put;
1252
1253         ret = clk_set_rate(host->clk, msmsdcc_fmin);
1254         if (ret) {
1255                 pr_err("%s: Clock rate set failed (%d)\n", __func__, ret);
1256                 goto clk_disable;
1257         }
1258
1259         host->pclk_rate = clk_get_rate(host->pclk);
1260         host->clk_rate = clk_get_rate(host->clk);
1261
1262         /*
1263          * Setup MMC host structure
1264          */
1265         mmc->ops = &msmsdcc_ops;
1266         mmc->f_min = msmsdcc_fmin;
1267         mmc->f_max = msmsdcc_fmax;
1268         mmc->ocr_avail = plat->ocr_mask;
1269
1270         if (msmsdcc_4bit)
1271                 mmc->caps |= MMC_CAP_4_BIT_DATA;
1272         if (msmsdcc_sdioirq)
1273                 mmc->caps |= MMC_CAP_SDIO_IRQ;
1274         mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED;
1275
1276         mmc->max_segs = NR_SG;
1277         mmc->max_blk_size = 4096;       /* MCI_DATA_CTL BLOCKSIZE up to 4096 */
1278         mmc->max_blk_count = 65536;
1279
1280         mmc->max_req_size = 33554432;   /* MCI_DATA_LENGTH is 25 bits */
1281         mmc->max_seg_size = mmc->max_req_size;
1282
1283         msmsdcc_writel(host, 0, MMCIMASK0);
1284         msmsdcc_writel(host, 0x5e007ff, MMCICLEAR);
1285
1286         msmsdcc_writel(host, MCI_IRQENABLE, MMCIMASK0);
1287         host->saved_irq0mask = MCI_IRQENABLE;
1288
1289         /*
1290          * Setup card detect change
1291          */
1292
1293         memset(&host->timer, 0, sizeof(host->timer));
1294
1295         if (stat_irqres && !(stat_irqres->flags & IORESOURCE_DISABLED)) {
1296                 unsigned long irqflags = IRQF_SHARED |
1297                         (stat_irqres->flags & IRQF_TRIGGER_MASK);
1298
1299                 host->stat_irq = stat_irqres->start;
1300                 ret = request_irq(host->stat_irq,
1301                                   msmsdcc_platform_status_irq,
1302                                   irqflags,
1303                                   DRIVER_NAME " (slot)",
1304                                   host);
1305                 if (ret) {
1306                         pr_err("%s: Unable to get slot IRQ %d (%d)\n",
1307                                mmc_hostname(mmc), host->stat_irq, ret);
1308                         goto clk_disable;
1309                 }
1310         } else if (plat->register_status_notify) {
1311                 plat->register_status_notify(msmsdcc_status_notify_cb, host);
1312         } else if (!plat->status)
1313                 pr_err("%s: No card detect facilities available\n",
1314                        mmc_hostname(mmc));
1315         else {
1316                 init_timer(&host->timer);
1317                 host->timer.data = (unsigned long)host;
1318                 host->timer.function = msmsdcc_check_status;
1319                 host->timer.expires = jiffies + HZ;
1320                 add_timer(&host->timer);
1321         }
1322
1323         if (plat->status) {
1324                 host->oldstat = host->plat->status(mmc_dev(host->mmc));
1325                 host->eject = !host->oldstat;
1326         }
1327
1328         init_timer(&host->busclk_timer);
1329         host->busclk_timer.data = (unsigned long) host;
1330         host->busclk_timer.function = msmsdcc_busclk_expired;
1331
1332         ret = request_irq(cmd_irqres->start, msmsdcc_irq, IRQF_SHARED,
1333                           DRIVER_NAME " (cmd)", host);
1334         if (ret)
1335                 goto stat_irq_free;
1336
1337         ret = request_irq(pio_irqres->start, msmsdcc_pio_irq, IRQF_SHARED,
1338                           DRIVER_NAME " (pio)", host);
1339         if (ret)
1340                 goto cmd_irq_free;
1341
1342         mmc_set_drvdata(pdev, mmc);
1343         mmc_add_host(mmc);
1344
1345         pr_info("%s: Qualcomm MSM SDCC at 0x%016llx irq %d,%d dma %d\n",
1346                 mmc_hostname(mmc), (unsigned long long)memres->start,
1347                 (unsigned int) cmd_irqres->start,
1348                 (unsigned int) host->stat_irq, host->dma.channel);
1349         pr_info("%s: 4 bit data mode %s\n", mmc_hostname(mmc),
1350                 (mmc->caps & MMC_CAP_4_BIT_DATA ? "enabled" : "disabled"));
1351         pr_info("%s: MMC clock %u -> %u Hz, PCLK %u Hz\n",
1352                 mmc_hostname(mmc), msmsdcc_fmin, msmsdcc_fmax, host->pclk_rate);
1353         pr_info("%s: Slot eject status = %d\n", mmc_hostname(mmc), host->eject);
1354         pr_info("%s: Power save feature enable = %d\n",
1355                 mmc_hostname(mmc), msmsdcc_pwrsave);
1356
1357         if (host->dma.channel != -1) {
1358                 pr_info("%s: DM non-cached buffer at %p, dma_addr 0x%.8x\n",
1359                         mmc_hostname(mmc), host->dma.nc, host->dma.nc_busaddr);
1360                 pr_info("%s: DM cmd busaddr 0x%.8x, cmdptr busaddr 0x%.8x\n",
1361                         mmc_hostname(mmc), host->dma.cmd_busaddr,
1362                         host->dma.cmdptr_busaddr);
1363         } else
1364                 pr_info("%s: PIO transfer enabled\n", mmc_hostname(mmc));
1365         if (host->timer.function)
1366                 pr_info("%s: Polling status mode enabled\n", mmc_hostname(mmc));
1367
1368         return 0;
1369  cmd_irq_free:
1370         free_irq(cmd_irqres->start, host);
1371  stat_irq_free:
1372         if (host->stat_irq)
1373                 free_irq(host->stat_irq, host);
1374  clk_disable:
1375         msmsdcc_disable_clocks(host, 0);
1376  clk_put:
1377         clk_put(host->clk);
1378  pclk_put:
1379         clk_put(host->pclk);
1380  host_free:
1381         mmc_free_host(mmc);
1382  out:
1383         return ret;
1384 }
1385
1386 #ifdef CONFIG_PM
1387 #ifdef CONFIG_MMC_MSM7X00A_RESUME_IN_WQ
1388 static void
1389 do_resume_work(struct work_struct *work)
1390 {
1391         struct msmsdcc_host *host =
1392                 container_of(work, struct msmsdcc_host, resume_task);
1393         struct mmc_host *mmc = host->mmc;
1394
1395         if (mmc) {
1396                 mmc_resume_host(mmc);
1397                 if (host->stat_irq)
1398                         enable_irq(host->stat_irq);
1399         }
1400 }
1401 #endif
1402
1403
1404 static int
1405 msmsdcc_suspend(struct platform_device *dev, pm_message_t state)
1406 {
1407         struct mmc_host *mmc = mmc_get_drvdata(dev);
1408         int rc = 0;
1409
1410         if (mmc) {
1411                 struct msmsdcc_host *host = mmc_priv(mmc);
1412
1413                 if (host->stat_irq)
1414                         disable_irq(host->stat_irq);
1415
1416                 if (mmc->card && mmc->card->type != MMC_TYPE_SDIO)
1417                         rc = mmc_suspend_host(mmc);
1418                 if (!rc)
1419                         msmsdcc_writel(host, 0, MMCIMASK0);
1420                 if (host->clks_on)
1421                         msmsdcc_disable_clocks(host, 0);
1422         }
1423         return rc;
1424 }
1425
1426 static int
1427 msmsdcc_resume(struct platform_device *dev)
1428 {
1429         struct mmc_host *mmc = mmc_get_drvdata(dev);
1430
1431         if (mmc) {
1432                 struct msmsdcc_host *host = mmc_priv(mmc);
1433
1434                 msmsdcc_enable_clocks(host);
1435
1436                 msmsdcc_writel(host, host->saved_irq0mask, MMCIMASK0);
1437
1438                 if (mmc->card && mmc->card->type != MMC_TYPE_SDIO)
1439                         mmc_resume_host(mmc);
1440                 if (host->stat_irq)
1441                         enable_irq(host->stat_irq);
1442 #if BUSCLK_PWRSAVE
1443                 msmsdcc_disable_clocks(host, 1);
1444 #endif
1445         }
1446         return 0;
1447 }
1448 #else
1449 #define msmsdcc_suspend 0
1450 #define msmsdcc_resume 0
1451 #endif
1452
1453 static struct platform_driver msmsdcc_driver = {
1454         .probe          = msmsdcc_probe,
1455         .suspend        = msmsdcc_suspend,
1456         .resume         = msmsdcc_resume,
1457         .driver         = {
1458                 .name   = "msm_sdcc",
1459         },
1460 };
1461
1462 static int __init msmsdcc_init(void)
1463 {
1464         return platform_driver_register(&msmsdcc_driver);
1465 }
1466
1467 static void __exit msmsdcc_exit(void)
1468 {
1469         platform_driver_unregister(&msmsdcc_driver);
1470 }
1471
1472 module_init(msmsdcc_init);
1473 module_exit(msmsdcc_exit);
1474
1475 MODULE_DESCRIPTION("Qualcomm MSM 7X00A Multimedia Card Interface driver");
1476 MODULE_LICENSE("GPL");