drivers/mmc/host/atmel-mci.c

   1 /*
   2  * Atmel MultiMedia Card Interface driver
   3  *
   4  * Copyright (C) 2004-2008 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/blkdev.h>
  11 #include <linux/clk.h>
  12 #include <linux/debugfs.h>
  13 #include <linux/device.h>
  14 #include <linux/dmaengine.h>
  15 #include <linux/dma-mapping.h>
  16 #include <linux/err.h>
  17 #include <linux/gpio.h>
  18 #include <linux/init.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/ioport.h>
  21 #include <linux/module.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/scatterlist.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/slab.h>
  26 #include <linux/stat.h>
  27
  28 #include <linux/mmc/host.h>
  29 #include <linux/mmc/sdio.h>
  30
  31 #include <mach/atmel-mci.h>
  32 #include <linux/atmel-mci.h>
  33
  34 #include <asm/io.h>
  35 #include <asm/unaligned.h>
  36
  37 #include <mach/cpu.h>
  38 #include <mach/board.h>
  39
  40 #include "atmel-mci-regs.h"
  41
  42 #define ATMCI_DATA_ERROR_FLAGS  (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
  43 #define ATMCI_DMA_THRESHOLD     16
  44
  45 enum {
  46         EVENT_CMD_COMPLETE = 0,
  47         EVENT_XFER_COMPLETE,
  48         EVENT_DATA_COMPLETE,
  49         EVENT_DATA_ERROR,
  50 };
  51
  52 enum atmel_mci_state {
  53         STATE_IDLE = 0,
  54         STATE_SENDING_CMD,
  55         STATE_SENDING_DATA,
  56         STATE_DATA_BUSY,
  57         STATE_SENDING_STOP,
  58         STATE_DATA_ERROR,
  59 };
  60
  61 struct atmel_mci_dma {
  62 #ifdef CONFIG_MMC_ATMELMCI_DMA
  63         struct dma_chan                 *chan;
  64         struct dma_async_tx_descriptor  *data_desc;
  65 #endif
  66 };
  67
  68 /**
  69  * struct atmel_mci - MMC controller state shared between all slots
  70  * @lock: Spinlock protecting the queue and associated data.
  71  * @regs: Pointer to MMIO registers.
  72  * @sg: Scatterlist entry currently being processed by PIO code, if any.
  73  * @pio_offset: Offset into the current scatterlist entry.
  74  * @cur_slot: The slot which is currently using the controller.
  75  * @mrq: The request currently being processed on @cur_slot,
  76  *      or NULL if the controller is idle.
  77  * @cmd: The command currently being sent to the card, or NULL.
  78  * @data: The data currently being transferred, or NULL if no data
  79  *      transfer is in progress.
  80  * @dma: DMA client state.
  81  * @data_chan: DMA channel being used for the current data transfer.
  82  * @cmd_status: Snapshot of SR taken upon completion of the current
  83  *      command. Only valid when EVENT_CMD_COMPLETE is pending.
  84  * @data_status: Snapshot of SR taken upon completion of the current
  85  *      data transfer. Only valid when EVENT_DATA_COMPLETE or
  86  *      EVENT_DATA_ERROR is pending.
  87  * @stop_cmdr: Value to be loaded into CMDR when the stop command is
  88  *      to be sent.
  89  * @tasklet: Tasklet running the request state machine.
  90  * @pending_events: Bitmask of events flagged by the interrupt handler
  91  *      to be processed by the tasklet.
  92  * @completed_events: Bitmask of events which the state machine has
  93  *      processed.
  94  * @state: Tasklet state.
  95  * @queue: List of slots waiting for access to the controller.
  96  * @need_clock_update: Update the clock rate before the next request.
  97  * @need_reset: Reset controller before next request.
  98  * @mode_reg: Value of the MR register.
  99  * @cfg_reg: Value of the CFG register.
 100  * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
 101  *      rate and timeout calculations.
 102  * @mapbase: Physical address of the MMIO registers.
 103  * @mck: The peripheral bus clock hooked up to the MMC controller.
 104  * @pdev: Platform device associated with the MMC controller.
 105  * @slot: Slots sharing this MMC controller.
 106  *
 107  * Locking
 108  * =======
 109  *
 110  * @lock is a softirq-safe spinlock protecting @queue as well as
 111  * @cur_slot, @mrq and @state. These must always be updated
 112  * at the same time while holding @lock.
 113  *
 114  * @lock also protects mode_reg and need_clock_update since these are
 115  * used to synchronize mode register updates with the queue
 116  * processing.
 117  *
 118  * The @mrq field of struct atmel_mci_slot is also protected by @lock,
 119  * and must always be written at the same time as the slot is added to
 120  * @queue.
 121  *
 122  * @pending_events and @completed_events are accessed using atomic bit
 123  * operations, so they don't need any locking.
 124  *
 125  * None of the fields touched by the interrupt handler need any
 126  * locking. However, ordering is important: Before EVENT_DATA_ERROR or
 127  * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
 128  * interrupts must be disabled and @data_status updated with a
 129  * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
 130  * CMDRDY interrupt must be disabled and @cmd_status updated with a
 131  * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
 132  * bytes_xfered field of @data must be written. This is ensured by
 133  * using barriers.
 134  */
 135 struct atmel_mci {
 136         spinlock_t              lock;
 137         void __iomem            *regs;
 138
 139         struct scatterlist      *sg;
 140         unsigned int            pio_offset;
 141
 142         struct atmel_mci_slot   *cur_slot;
 143         struct mmc_request      *mrq;
 144         struct mmc_command      *cmd;
 145         struct mmc_data         *data;
 146
 147         struct atmel_mci_dma    dma;
 148         struct dma_chan         *data_chan;
 149
 150         u32                     cmd_status;
 151         u32                     data_status;
 152         u32                     stop_cmdr;
 153
 154         struct tasklet_struct   tasklet;
 155         unsigned long           pending_events;
 156         unsigned long           completed_events;
 157         enum atmel_mci_state    state;
 158         struct list_head        queue;
 159
 160         bool                    need_clock_update;
 161         bool                    need_reset;
 162         u32                     mode_reg;
 163         u32                     cfg_reg;
 164         unsigned long           bus_hz;
 165         unsigned long           mapbase;
 166         struct clk              *mck;
 167         struct platform_device  *pdev;
 168
 169         struct atmel_mci_slot   *slot[ATMEL_MCI_MAX_NR_SLOTS];
 170 };
 171
 172 /**
 173  * struct atmel_mci_slot - MMC slot state
 174  * @mmc: The mmc_host representing this slot.
 175  * @host: The MMC controller this slot is using.
 176  * @sdc_reg: Value of SDCR to be written before using this slot.
 177  * @sdio_irq: SDIO irq mask for this slot.
 178  * @mrq: mmc_request currently being processed or waiting to be
 179  *      processed, or NULL when the slot is idle.
 180  * @queue_node: List node for placing this node in the @queue list of
 181  *      &struct atmel_mci.
 182  * @clock: Clock rate configured by set_ios(). Protected by host->lock.
 183  * @flags: Random state bits associated with the slot.
 184  * @detect_pin: GPIO pin used for card detection, or negative if not
 185  *      available.
 186  * @wp_pin: GPIO pin used for card write protect sending, or negative
 187  *      if not available.
 188  * @detect_is_active_high: The state of the detect pin when it is active.
 189  * @detect_timer: Timer used for debouncing @detect_pin interrupts.
 190  */
 191 struct atmel_mci_slot {
 192         struct mmc_host         *mmc;
 193         struct atmel_mci        *host;
 194
 195         u32                     sdc_reg;
 196         u32                     sdio_irq;
 197
 198         struct mmc_request      *mrq;
 199         struct list_head        queue_node;
 200
 201         unsigned int            clock;
 202         unsigned long           flags;
 203 #define ATMCI_CARD_PRESENT      0
 204 #define ATMCI_CARD_NEED_INIT    1
 205 #define ATMCI_SHUTDOWN          2
 206 #define ATMCI_SUSPENDED         3
 207
 208         int                     detect_pin;
 209         int                     wp_pin;
 210         bool                    detect_is_active_high;
 211
 212         struct timer_list       detect_timer;
 213 };
 214
 215 #define atmci_test_and_clear_pending(host, event)               \
 216         test_and_clear_bit(event, &host->pending_events)
 217 #define atmci_set_completed(host, event)                        \
 218         set_bit(event, &host->completed_events)
 219 #define atmci_set_pending(host, event)                          \
 220         set_bit(event, &host->pending_events)
 221
 222 /*
 223  * Enable or disable features/registers based on
 224  * whether the processor supports them
 225  */
 226 static bool mci_has_rwproof(void)
 227 {
 228         if (cpu_is_at91sam9261() || cpu_is_at91rm9200())
 229                 return false;
 230         else
 231                 return true;
 232 }
 233
 234 /*
 235  * The new MCI2 module isn't 100% compatible with the old MCI module,
 236  * and it has a few nice features which we want to use...
 237  */
 238 static inline bool atmci_is_mci2(void)
 239 {
 240         if (cpu_is_at91sam9g45())
 241                 return true;
 242
 243         return false;
 244 }
 245
 246
 247 /*
 248  * The debugfs stuff below is mostly optimized away when
 249  * CONFIG_DEBUG_FS is not set.
 250  */
 251 static int atmci_req_show(struct seq_file *s, void *v)
 252 {
 253         struct atmel_mci_slot   *slot = s->private;
 254         struct mmc_request      *mrq;
 255         struct mmc_command      *cmd;
 256         struct mmc_command      *stop;
 257         struct mmc_data         *data;
 258
 259         /* Make sure we get a consistent snapshot */
 260         spin_lock_bh(&slot->host->lock);
 261         mrq = slot->mrq;
 262
 263         if (mrq) {
 264                 cmd = mrq->cmd;
 265                 data = mrq->data;
 266                 stop = mrq->stop;
 267
 268                 if (cmd)
 269                         seq_printf(s,
 270                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
 271                                 cmd->opcode, cmd->arg, cmd->flags,
 272                                 cmd->resp[0], cmd->resp[1], cmd->resp[2],
 273                                 cmd->resp[3], cmd->error);
 274                 if (data)
 275                         seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
 276                                 data->bytes_xfered, data->blocks,
 277                                 data->blksz, data->flags, data->error);
 278                 if (stop)
 279                         seq_printf(s,
 280                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
 281                                 stop->opcode, stop->arg, stop->flags,
 282                                 stop->resp[0], stop->resp[1], stop->resp[2],
 283                                 stop->resp[3], stop->error);
 284         }
 285
 286         spin_unlock_bh(&slot->host->lock);
 287
 288         return 0;
 289 }
 290
 291 static int atmci_req_open(struct inode *inode, struct file *file)
 292 {
 293         return single_open(file, atmci_req_show, inode->i_private);
 294 }
 295
 296 static const struct file_operations atmci_req_fops = {
 297         .owner          = THIS_MODULE,
 298         .open           = atmci_req_open,
 299         .read           = seq_read,
 300         .llseek         = seq_lseek,
 301         .release        = single_release,
 302 };
 303
 304 static void atmci_show_status_reg(struct seq_file *s,
 305                 const char *regname, u32 value)
 306 {
 307         static const char       *sr_bit[] = {
 308                 [0]     = "CMDRDY",
 309                 [1]     = "RXRDY",
 310                 [2]     = "TXRDY",
 311                 [3]     = "BLKE",
 312                 [4]     = "DTIP",
 313                 [5]     = "NOTBUSY",
 314                 [6]     = "ENDRX",
 315                 [7]     = "ENDTX",
 316                 [8]     = "SDIOIRQA",
 317                 [9]     = "SDIOIRQB",
 318                 [12]    = "SDIOWAIT",
 319                 [14]    = "RXBUFF",
 320                 [15]    = "TXBUFE",
 321                 [16]    = "RINDE",
 322                 [17]    = "RDIRE",
 323                 [18]    = "RCRCE",
 324                 [19]    = "RENDE",
 325                 [20]    = "RTOE",
 326                 [21]    = "DCRCE",
 327                 [22]    = "DTOE",
 328                 [23]    = "CSTOE",
 329                 [24]    = "BLKOVRE",
 330                 [25]    = "DMADONE",
 331                 [26]    = "FIFOEMPTY",
 332                 [27]    = "XFRDONE",
 333                 [30]    = "OVRE",
 334                 [31]    = "UNRE",
 335         };
 336         unsigned int            i;
 337
 338         seq_printf(s, "%s:\t0x%08x", regname, value);
 339         for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
 340                 if (value & (1 << i)) {
 341                         if (sr_bit[i])
 342                                 seq_printf(s, " %s", sr_bit[i]);
 343                         else
 344                                 seq_puts(s, " UNKNOWN");
 345                 }
 346         }
 347         seq_putc(s, '\n');
 348 }
 349
 350 static int atmci_regs_show(struct seq_file *s, void *v)
 351 {
 352         struct atmel_mci        *host = s->private;
 353         u32                     *buf;
 354
 355         buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL);
 356         if (!buf)
 357                 return -ENOMEM;
 358
 359         /*
 360          * Grab a more or less consistent snapshot. Note that we're
 361          * not disabling interrupts, so IMR and SR may not be
 362          * consistent.
 363          */
 364         spin_lock_bh(&host->lock);
 365         clk_enable(host->mck);
 366         memcpy_fromio(buf, host->regs, MCI_REGS_SIZE);
 367         clk_disable(host->mck);
 368         spin_unlock_bh(&host->lock);
 369
 370         seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
 371                         buf[MCI_MR / 4],
 372                         buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "",
 373                         buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "",
 374                         buf[MCI_MR / 4] & 0xff);
 375         seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]);
 376         seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]);
 377         seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]);
 378         seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
 379                         buf[MCI_BLKR / 4],
 380                         buf[MCI_BLKR / 4] & 0xffff,
 381                         (buf[MCI_BLKR / 4] >> 16) & 0xffff);
 382         if (atmci_is_mci2())
 383                 seq_printf(s, "CSTOR:\t0x%08x\n", buf[MCI_CSTOR / 4]);
 384
 385         /* Don't read RSPR and RDR; it will consume the data there */
 386
 387         atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]);
 388         atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]);
 389
 390         if (atmci_is_mci2()) {
 391                 u32 val;
 392
 393                 val = buf[MCI_DMA / 4];
 394                 seq_printf(s, "DMA:\t0x%08x OFFSET=%u CHKSIZE=%u%s\n",
 395                                 val, val & 3,
 396                                 ((val >> 4) & 3) ?
 397                                         1 << (((val >> 4) & 3) + 1) : 1,
 398                                 val & MCI_DMAEN ? " DMAEN" : "");
 399
 400                 val = buf[MCI_CFG / 4];
 401                 seq_printf(s, "CFG:\t0x%08x%s%s%s%s\n",
 402                                 val,
 403                                 val & MCI_CFG_FIFOMODE_1DATA ? " FIFOMODE_ONE_DATA" : "",
 404                                 val & MCI_CFG_FERRCTRL_COR ? " FERRCTRL_CLEAR_ON_READ" : "",
 405                                 val & MCI_CFG_HSMODE ? " HSMODE" : "",
 406                                 val & MCI_CFG_LSYNC ? " LSYNC" : "");
 407         }
 408
 409         kfree(buf);
 410
 411         return 0;
 412 }
 413
 414 static int atmci_regs_open(struct inode *inode, struct file *file)
 415 {
 416         return single_open(file, atmci_regs_show, inode->i_private);
 417 }
 418
 419 static const struct file_operations atmci_regs_fops = {
 420         .owner          = THIS_MODULE,
 421         .open           = atmci_regs_open,
 422         .read           = seq_read,
 423         .llseek         = seq_lseek,
 424         .release        = single_release,
 425 };
 426
 427 static void atmci_init_debugfs(struct atmel_mci_slot *slot)
 428 {
 429         struct mmc_host         *mmc = slot->mmc;
 430         struct atmel_mci        *host = slot->host;
 431         struct dentry           *root;
 432         struct dentry           *node;
 433
 434         root = mmc->debugfs_root;
 435         if (!root)
 436                 return;
 437
 438         node = debugfs_create_file("regs", S_IRUSR, root, host,
 439                         &atmci_regs_fops);
 440         if (IS_ERR(node))
 441                 return;
 442         if (!node)
 443                 goto err;
 444
 445         node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
 446         if (!node)
 447                 goto err;
 448
 449         node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
 450         if (!node)
 451                 goto err;
 452
 453         node = debugfs_create_x32("pending_events", S_IRUSR, root,
 454                                      (u32 *)&host->pending_events);
 455         if (!node)
 456                 goto err;
 457
 458         node = debugfs_create_x32("completed_events", S_IRUSR, root,
 459                                      (u32 *)&host->completed_events);
 460         if (!node)
 461                 goto err;
 462
 463         return;
 464
 465 err:
 466         dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
 467 }
 468
 469 static inline unsigned int ns_to_clocks(struct atmel_mci *host,
 470                                         unsigned int ns)
 471 {
 472         return (ns * (host->bus_hz / 1000000) + 999) / 1000;
 473 }
 474
 475 static void atmci_set_timeout(struct atmel_mci *host,
 476                 struct atmel_mci_slot *slot, struct mmc_data *data)
 477 {
 478         static unsigned dtomul_to_shift[] = {
 479                 0, 4, 7, 8, 10, 12, 16, 20
 480         };
 481         unsigned        timeout;
 482         unsigned        dtocyc;
 483         unsigned        dtomul;
 484
 485         timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
 486
 487         for (dtomul = 0; dtomul < 8; dtomul++) {
 488                 unsigned shift = dtomul_to_shift[dtomul];
 489                 dtocyc = (timeout + (1 << shift) - 1) >> shift;
 490                 if (dtocyc < 15)
 491                         break;
 492         }
 493
 494         if (dtomul >= 8) {
 495                 dtomul = 7;
 496                 dtocyc = 15;
 497         }
 498
 499         dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
 500                         dtocyc << dtomul_to_shift[dtomul]);
 501         mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc)));
 502 }
 503
 504 /*
 505  * Return mask with command flags to be enabled for this command.
 506  */
 507 static u32 atmci_prepare_command(struct mmc_host *mmc,
 508                                  struct mmc_command *cmd)
 509 {
 510         struct mmc_data *data;
 511         u32             cmdr;
 512
 513         cmd->error = -EINPROGRESS;
 514
 515         cmdr = MCI_CMDR_CMDNB(cmd->opcode);
 516
 517         if (cmd->flags & MMC_RSP_PRESENT) {
 518                 if (cmd->flags & MMC_RSP_136)
 519                         cmdr |= MCI_CMDR_RSPTYP_136BIT;
 520                 else
 521                         cmdr |= MCI_CMDR_RSPTYP_48BIT;
 522         }
 523
 524         /*
 525          * This should really be MAXLAT_5 for CMD2 and ACMD41, but
 526          * it's too difficult to determine whether this is an ACMD or
 527          * not. Better make it 64.
 528          */
 529         cmdr |= MCI_CMDR_MAXLAT_64CYC;
 530
 531         if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
 532                 cmdr |= MCI_CMDR_OPDCMD;
 533
 534         data = cmd->data;
 535         if (data) {
 536                 cmdr |= MCI_CMDR_START_XFER;
 537
 538                 if (cmd->opcode == SD_IO_RW_EXTENDED) {
 539                         cmdr |= MCI_CMDR_SDIO_BLOCK;
 540                 } else {
 541                         if (data->flags & MMC_DATA_STREAM)
 542                                 cmdr |= MCI_CMDR_STREAM;
 543                         else if (data->blocks > 1)
 544                                 cmdr |= MCI_CMDR_MULTI_BLOCK;
 545                         else
 546                                 cmdr |= MCI_CMDR_BLOCK;
 547                 }
 548
 549                 if (data->flags & MMC_DATA_READ)
 550                         cmdr |= MCI_CMDR_TRDIR_READ;
 551         }
 552
 553         return cmdr;
 554 }
 555
 556 static void atmci_start_command(struct atmel_mci *host,
 557                 struct mmc_command *cmd, u32 cmd_flags)
 558 {
 559         WARN_ON(host->cmd);
 560         host->cmd = cmd;
 561
 562         dev_vdbg(&host->pdev->dev,
 563                         "start command: ARGR=0x%08x CMDR=0x%08x\n",
 564                         cmd->arg, cmd_flags);
 565
 566         mci_writel(host, ARGR, cmd->arg);
 567         mci_writel(host, CMDR, cmd_flags);
 568 }
 569
 570 static void send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
 571 {
 572         atmci_start_command(host, data->stop, host->stop_cmdr);
 573         mci_writel(host, IER, MCI_CMDRDY);
 574 }
 575
 576 #ifdef CONFIG_MMC_ATMELMCI_DMA
 577 static void atmci_dma_cleanup(struct atmel_mci *host)
 578 {
 579         struct mmc_data                 *data = host->data;
 580
 581         if (data)
 582                 dma_unmap_sg(host->dma.chan->device->dev,
 583                              data->sg, data->sg_len,
 584                              ((data->flags & MMC_DATA_WRITE)
 585                               ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
 586 }
 587
 588 static void atmci_stop_dma(struct atmel_mci *host)
 589 {
 590         struct dma_chan *chan = host->data_chan;
 591
 592         if (chan) {
 593                 dmaengine_terminate_all(chan);
 594                 atmci_dma_cleanup(host);
 595         } else {
 596                 /* Data transfer was stopped by the interrupt handler */
 597                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
 598                 mci_writel(host, IER, MCI_NOTBUSY);
 599         }
 600 }
 601
 602 /* This function is called by the DMA driver from tasklet context. */
 603 static void atmci_dma_complete(void *arg)
 604 {
 605         struct atmel_mci        *host = arg;
 606         struct mmc_data         *data = host->data;
 607
 608         dev_vdbg(&host->pdev->dev, "DMA complete\n");
 609
 610         if (atmci_is_mci2())
 611                 /* Disable DMA hardware handshaking on MCI */
 612                 mci_writel(host, DMA, mci_readl(host, DMA) & ~MCI_DMAEN);
 613
 614         atmci_dma_cleanup(host);
 615
 616         /*
 617          * If the card was removed, data will be NULL. No point trying
 618          * to send the stop command or waiting for NBUSY in this case.
 619          */
 620         if (data) {
 621                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
 622                 tasklet_schedule(&host->tasklet);
 623
 624                 /*
 625                  * Regardless of what the documentation says, we have
 626                  * to wait for NOTBUSY even after block read
 627                  * operations.
 628                  *
 629                  * When the DMA transfer is complete, the controller
 630                  * may still be reading the CRC from the card, i.e.
 631                  * the data transfer is still in progress and we
 632                  * haven't seen all the potential error bits yet.
 633                  *
 634                  * The interrupt handler will schedule a different
 635                  * tasklet to finish things up when the data transfer
 636                  * is completely done.
 637                  *
 638                  * We may not complete the mmc request here anyway
 639                  * because the mmc layer may call back and cause us to
 640                  * violate the "don't submit new operations from the
 641                  * completion callback" rule of the dma engine
 642                  * framework.
 643                  */
 644                 mci_writel(host, IER, MCI_NOTBUSY);
 645         }
 646 }
 647
 648 static int
 649 atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
 650 {
 651         struct dma_chan                 *chan;
 652         struct dma_async_tx_descriptor  *desc;
 653         struct scatterlist              *sg;
 654         unsigned int                    i;
 655         enum dma_data_direction         direction;
 656         unsigned int                    sglen;
 657
 658         /*
 659          * We don't do DMA on "complex" transfers, i.e. with
 660          * non-word-aligned buffers or lengths. Also, we don't bother
 661          * with all the DMA setup overhead for short transfers.
 662          */
 663         if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
 664                 return -EINVAL;
 665         if (data->blksz & 3)
 666                 return -EINVAL;
 667
 668         for_each_sg(data->sg, sg, data->sg_len, i) {
 669                 if (sg->offset & 3 || sg->length & 3)
 670                         return -EINVAL;
 671         }
 672
 673         /* If we don't have a channel, we can't do DMA */
 674         chan = host->dma.chan;
 675         if (chan)
 676                 host->data_chan = chan;
 677
 678         if (!chan)
 679                 return -ENODEV;
 680
 681         if (atmci_is_mci2())
 682                 mci_writel(host, DMA, MCI_DMA_CHKSIZE(3) | MCI_DMAEN);
 683
 684         if (data->flags & MMC_DATA_READ)
 685                 direction = DMA_FROM_DEVICE;
 686         else
 687                 direction = DMA_TO_DEVICE;
 688
 689         sglen = dma_map_sg(chan->device->dev, data->sg,
 690                            data->sg_len, direction);
 691
 692         desc = chan->device->device_prep_slave_sg(chan,
 693                         data->sg, sglen, direction,
 694                         DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 695         if (!desc)
 696                 goto unmap_exit;
 697
 698         host->dma.data_desc = desc;
 699         desc->callback = atmci_dma_complete;
 700         desc->callback_param = host;
 701
 702         return 0;
 703 unmap_exit:
 704         dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, direction);
 705         return -ENOMEM;
 706 }
 707
 708 static void atmci_submit_data(struct atmel_mci *host)
 709 {
 710         struct dma_chan                 *chan = host->data_chan;
 711         struct dma_async_tx_descriptor  *desc = host->dma.data_desc;
 712
 713         if (chan) {
 714                 dmaengine_submit(desc);
 715                 dma_async_issue_pending(chan);
 716         }
 717 }
 718
 719 #else /* CONFIG_MMC_ATMELMCI_DMA */
 720
 721 static int atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
 722 {
 723         return -ENOSYS;
 724 }
 725
 726 static void atmci_submit_data(struct atmel_mci *host) {}
 727
 728 static void atmci_stop_dma(struct atmel_mci *host)
 729 {
 730         /* Data transfer was stopped by the interrupt handler */
 731         atmci_set_pending(host, EVENT_XFER_COMPLETE);
 732         mci_writel(host, IER, MCI_NOTBUSY);
 733 }
 734
 735 #endif /* CONFIG_MMC_ATMELMCI_DMA */
 736
 737 /*
 738  * Returns a mask of interrupt flags to be enabled after the whole
 739  * request has been prepared.
 740  */
 741 static u32 atmci_prepare_data(struct atmel_mci *host, struct mmc_data *data)
 742 {
 743         u32 iflags;
 744
 745         data->error = -EINPROGRESS;
 746
 747         WARN_ON(host->data);
 748         host->sg = NULL;
 749         host->data = data;
 750
 751         iflags = ATMCI_DATA_ERROR_FLAGS;
 752         if (atmci_prepare_data_dma(host, data)) {
 753                 host->data_chan = NULL;
 754
 755                 /*
 756                  * Errata: MMC data write operation with less than 12
 757                  * bytes is impossible.
 758                  *
 759                  * Errata: MCI Transmit Data Register (TDR) FIFO
 760                  * corruption when length is not multiple of 4.
 761                  */
 762                 if (data->blocks * data->blksz < 12
 763                                 || (data->blocks * data->blksz) & 3)
 764                         host->need_reset = true;
 765
 766                 host->sg = data->sg;
 767                 host->pio_offset = 0;
 768                 if (data->flags & MMC_DATA_READ)
 769                         iflags |= MCI_RXRDY;
 770                 else
 771                         iflags |= MCI_TXRDY;
 772         }
 773
 774         return iflags;
 775 }
 776
 777 static void atmci_start_request(struct atmel_mci *host,
 778                 struct atmel_mci_slot *slot)
 779 {
 780         struct mmc_request      *mrq;
 781         struct mmc_command      *cmd;
 782         struct mmc_data         *data;
 783         u32                     iflags;
 784         u32                     cmdflags;
 785
 786         mrq = slot->mrq;
 787         host->cur_slot = slot;
 788         host->mrq = mrq;
 789
 790         host->pending_events = 0;
 791         host->completed_events = 0;
 792         host->data_status = 0;
 793
 794         if (host->need_reset) {
 795                 mci_writel(host, CR, MCI_CR_SWRST);
 796                 mci_writel(host, CR, MCI_CR_MCIEN);
 797                 mci_writel(host, MR, host->mode_reg);
 798                 if (atmci_is_mci2())
 799                         mci_writel(host, CFG, host->cfg_reg);
 800                 host->need_reset = false;
 801         }
 802         mci_writel(host, SDCR, slot->sdc_reg);
 803
 804         iflags = mci_readl(host, IMR);
 805         if (iflags & ~(MCI_SDIOIRQA | MCI_SDIOIRQB))
 806                 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
 807                                 iflags);
 808
 809         if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
 810                 /* Send init sequence (74 clock cycles) */
 811                 mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT);
 812                 while (!(mci_readl(host, SR) & MCI_CMDRDY))
 813                         cpu_relax();
 814         }
 815         iflags = 0;
 816         data = mrq->data;
 817         if (data) {
 818                 atmci_set_timeout(host, slot, data);
 819
 820                 /* Must set block count/size before sending command */
 821                 mci_writel(host, BLKR, MCI_BCNT(data->blocks)
 822                                 | MCI_BLKLEN(data->blksz));
 823                 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
 824                         MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz));
 825
 826                 iflags |= atmci_prepare_data(host, data);
 827         }
 828
 829         iflags |= MCI_CMDRDY;
 830         cmd = mrq->cmd;
 831         cmdflags = atmci_prepare_command(slot->mmc, cmd);
 832         atmci_start_command(host, cmd, cmdflags);
 833
 834         if (data)
 835                 atmci_submit_data(host);
 836
 837         if (mrq->stop) {
 838                 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
 839                 host->stop_cmdr |= MCI_CMDR_STOP_XFER;
 840                 if (!(data->flags & MMC_DATA_WRITE))
 841                         host->stop_cmdr |= MCI_CMDR_TRDIR_READ;
 842                 if (data->flags & MMC_DATA_STREAM)
 843                         host->stop_cmdr |= MCI_CMDR_STREAM;
 844                 else
 845                         host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK;
 846         }
 847
 848         /*
 849          * We could have enabled interrupts earlier, but I suspect
 850          * that would open up a nice can of interesting race
 851          * conditions (e.g. command and data complete, but stop not
 852          * prepared yet.)
 853          */
 854         mci_writel(host, IER, iflags);
 855 }
 856
 857 static void atmci_queue_request(struct atmel_mci *host,
 858                 struct atmel_mci_slot *slot, struct mmc_request *mrq)
 859 {
 860         dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
 861                         host->state);
 862
 863         spin_lock_bh(&host->lock);
 864         slot->mrq = mrq;
 865         if (host->state == STATE_IDLE) {
 866                 host->state = STATE_SENDING_CMD;
 867                 atmci_start_request(host, slot);
 868         } else {
 869                 list_add_tail(&slot->queue_node, &host->queue);
 870         }
 871         spin_unlock_bh(&host->lock);
 872 }
 873
 874 static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
 875 {
 876         struct atmel_mci_slot   *slot = mmc_priv(mmc);
 877         struct atmel_mci        *host = slot->host;
 878         struct mmc_data         *data;
 879
 880         WARN_ON(slot->mrq);
 881
 882         /*
 883          * We may "know" the card is gone even though there's still an
 884          * electrical connection. If so, we really need to communicate
 885          * this to the MMC core since there won't be any more
 886          * interrupts as the card is completely removed. Otherwise,
 887          * the MMC core might believe the card is still there even
 888          * though the card was just removed very slowly.
 889          */
 890         if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
 891                 mrq->cmd->error = -ENOMEDIUM;
 892                 mmc_request_done(mmc, mrq);
 893                 return;
 894         }
 895
 896         /* We don't support multiple blocks of weird lengths. */
 897         data = mrq->data;
 898         if (data && data->blocks > 1 && data->blksz & 3) {
 899                 mrq->cmd->error = -EINVAL;
 900                 mmc_request_done(mmc, mrq);
 901         }
 902
 903         atmci_queue_request(host, slot, mrq);
 904 }
 905
 906 static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 907 {
 908         struct atmel_mci_slot   *slot = mmc_priv(mmc);
 909         struct atmel_mci        *host = slot->host;
 910         unsigned int            i;
 911
 912         slot->sdc_reg &= ~MCI_SDCBUS_MASK;
 913         switch (ios->bus_width) {
 914         case MMC_BUS_WIDTH_1:
 915                 slot->sdc_reg |= MCI_SDCBUS_1BIT;
 916                 break;
 917         case MMC_BUS_WIDTH_4:
 918                 slot->sdc_reg |= MCI_SDCBUS_4BIT;
 919                 break;
 920         }
 921
 922         if (ios->clock) {
 923                 unsigned int clock_min = ~0U;
 924                 u32 clkdiv;
 925
 926                 spin_lock_bh(&host->lock);
 927                 if (!host->mode_reg) {
 928                         clk_enable(host->mck);
 929                         mci_writel(host, CR, MCI_CR_SWRST);
 930                         mci_writel(host, CR, MCI_CR_MCIEN);
 931                         if (atmci_is_mci2())
 932                                 mci_writel(host, CFG, host->cfg_reg);
 933                 }
 934
 935                 /*
 936                  * Use mirror of ios->clock to prevent race with mmc
 937                  * core ios update when finding the minimum.
 938                  */
 939                 slot->clock = ios->clock;
 940                 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
 941                         if (host->slot[i] && host->slot[i]->clock
 942                                         && host->slot[i]->clock < clock_min)
 943                                 clock_min = host->slot[i]->clock;
 944                 }
 945
 946                 /* Calculate clock divider */
 947                 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
 948                 if (clkdiv > 255) {
 949                         dev_warn(&mmc->class_dev,
 950                                 "clock %u too slow; using %lu\n",
 951                                 clock_min, host->bus_hz / (2 * 256));
 952                         clkdiv = 255;
 953                 }
 954
 955                 host->mode_reg = MCI_MR_CLKDIV(clkdiv);
 956
 957                 /*
 958                  * WRPROOF and RDPROOF prevent overruns/underruns by
 959                  * stopping the clock when the FIFO is full/empty.
 960                  * This state is not expected to last for long.
 961                  */
 962                 if (mci_has_rwproof())
 963                         host->mode_reg |= (MCI_MR_WRPROOF | MCI_MR_RDPROOF);
 964
 965                 if (atmci_is_mci2()) {
 966                         /* setup High Speed mode in relation with card capacity */
 967                         if (ios->timing == MMC_TIMING_SD_HS)
 968                                 host->cfg_reg |= MCI_CFG_HSMODE;
 969                         else
 970                                 host->cfg_reg &= ~MCI_CFG_HSMODE;
 971                 }
 972
 973                 if (list_empty(&host->queue)) {
 974                         mci_writel(host, MR, host->mode_reg);
 975                         if (atmci_is_mci2())
 976                                 mci_writel(host, CFG, host->cfg_reg);
 977                 } else {
 978                         host->need_clock_update = true;
 979                 }
 980
 981                 spin_unlock_bh(&host->lock);
 982         } else {
 983                 bool any_slot_active = false;
 984
 985                 spin_lock_bh(&host->lock);
 986                 slot->clock = 0;
 987                 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
 988                         if (host->slot[i] && host->slot[i]->clock) {
 989                                 any_slot_active = true;
 990                                 break;
 991                         }
 992                 }
 993                 if (!any_slot_active) {
 994                         mci_writel(host, CR, MCI_CR_MCIDIS);
 995                         if (host->mode_reg) {
 996                                 mci_readl(host, MR);
 997                                 clk_disable(host->mck);
 998                         }
 999                         host->mode_reg = 0;
1000                 }
1001                 spin_unlock_bh(&host->lock);
1002         }
1003
1004         switch (ios->power_mode) {
1005         case MMC_POWER_UP:
1006                 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
1007                 break;
1008         default:
1009                 /*
1010                  * TODO: None of the currently available AVR32-based
1011                  * boards allow MMC power to be turned off. Implement
1012                  * power control when this can be tested properly.
1013                  *
1014                  * We also need to hook this into the clock management
1015                  * somehow so that newly inserted cards aren't
1016                  * subjected to a fast clock before we have a chance
1017                  * to figure out what the maximum rate is. Currently,
1018                  * there's no way to avoid this, and there never will
1019                  * be for boards that don't support power control.
1020                  */
1021                 break;
1022         }
1023 }
1024
1025 static int atmci_get_ro(struct mmc_host *mmc)
1026 {
1027         int                     read_only = -ENOSYS;
1028         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1029
1030         if (gpio_is_valid(slot->wp_pin)) {
1031                 read_only = gpio_get_value(slot->wp_pin);
1032                 dev_dbg(&mmc->class_dev, "card is %s\n",
1033                                 read_only ? "read-only" : "read-write");
1034         }
1035
1036         return read_only;
1037 }
1038
1039 static int atmci_get_cd(struct mmc_host *mmc)
1040 {
1041         int                     present = -ENOSYS;
1042         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1043
1044         if (gpio_is_valid(slot->detect_pin)) {
1045                 present = !(gpio_get_value(slot->detect_pin) ^
1046                             slot->detect_is_active_high);
1047                 dev_dbg(&mmc->class_dev, "card is %spresent\n",
1048                                 present ? "" : "not ");
1049         }
1050
1051         return present;
1052 }
1053
1054 static void atmci_enable_sdio_irq(struct mmc_host *mmc, int enable)
1055 {
1056         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1057         struct atmel_mci        *host = slot->host;
1058
1059         if (enable)
1060                 mci_writel(host, IER, slot->sdio_irq);
1061         else
1062                 mci_writel(host, IDR, slot->sdio_irq);
1063 }
1064
1065 static const struct mmc_host_ops atmci_ops = {
1066         .request        = atmci_request,
1067         .set_ios        = atmci_set_ios,
1068         .get_ro         = atmci_get_ro,
1069         .get_cd         = atmci_get_cd,
1070         .enable_sdio_irq = atmci_enable_sdio_irq,
1071 };
1072
1073 /* Called with host->lock held */
1074 static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
1075         __releases(&host->lock)
1076         __acquires(&host->lock)
1077 {
1078         struct atmel_mci_slot   *slot = NULL;
1079         struct mmc_host         *prev_mmc = host->cur_slot->mmc;
1080
1081         WARN_ON(host->cmd || host->data);
1082
1083         /*
1084          * Update the MMC clock rate if necessary. This may be
1085          * necessary if set_ios() is called when a different slot is
1086          * busy transferring data.
1087          */
1088         if (host->need_clock_update) {
1089                 mci_writel(host, MR, host->mode_reg);
1090                 if (atmci_is_mci2())
1091                         mci_writel(host, CFG, host->cfg_reg);
1092         }
1093
1094         host->cur_slot->mrq = NULL;
1095         host->mrq = NULL;
1096         if (!list_empty(&host->queue)) {
1097                 slot = list_entry(host->queue.next,
1098                                 struct atmel_mci_slot, queue_node);
1099                 list_del(&slot->queue_node);
1100                 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
1101                                 mmc_hostname(slot->mmc));
1102                 host->state = STATE_SENDING_CMD;
1103                 atmci_start_request(host, slot);
1104         } else {
1105                 dev_vdbg(&host->pdev->dev, "list empty\n");
1106                 host->state = STATE_IDLE;
1107         }
1108
1109         spin_unlock(&host->lock);
1110         mmc_request_done(prev_mmc, mrq);
1111         spin_lock(&host->lock);
1112 }
1113
1114 static void atmci_command_complete(struct atmel_mci *host,
1115                         struct mmc_command *cmd)
1116 {
1117         u32             status = host->cmd_status;
1118
1119         /* Read the response from the card (up to 16 bytes) */
1120         cmd->resp[0] = mci_readl(host, RSPR);
1121         cmd->resp[1] = mci_readl(host, RSPR);
1122         cmd->resp[2] = mci_readl(host, RSPR);
1123         cmd->resp[3] = mci_readl(host, RSPR);
1124
1125         if (status & MCI_RTOE)
1126                 cmd->error = -ETIMEDOUT;
1127         else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE))
1128                 cmd->error = -EILSEQ;
1129         else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE))
1130                 cmd->error = -EIO;
1131         else
1132                 cmd->error = 0;
1133
1134         if (cmd->error) {
1135                 dev_dbg(&host->pdev->dev,
1136                         "command error: status=0x%08x\n", status);
1137
1138                 if (cmd->data) {
1139                         atmci_stop_dma(host);
1140                         host->data = NULL;
1141                         mci_writel(host, IDR, MCI_NOTBUSY
1142                                         | MCI_TXRDY | MCI_RXRDY
1143                                         | ATMCI_DATA_ERROR_FLAGS);
1144                 }
1145         }
1146 }
1147
1148 static void atmci_detect_change(unsigned long data)
1149 {
1150         struct atmel_mci_slot   *slot = (struct atmel_mci_slot *)data;
1151         bool                    present;
1152         bool                    present_old;
1153
1154         /*
1155          * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1156          * freeing the interrupt. We must not re-enable the interrupt
1157          * if it has been freed, and if we're shutting down, it
1158          * doesn't really matter whether the card is present or not.
1159          */
1160         smp_rmb();
1161         if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
1162                 return;
1163
1164         enable_irq(gpio_to_irq(slot->detect_pin));
1165         present = !(gpio_get_value(slot->detect_pin) ^
1166                     slot->detect_is_active_high);
1167         present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
1168
1169         dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
1170                         present, present_old);
1171
1172         if (present != present_old) {
1173                 struct atmel_mci        *host = slot->host;
1174                 struct mmc_request      *mrq;
1175
1176                 dev_dbg(&slot->mmc->class_dev, "card %s\n",
1177                         present ? "inserted" : "removed");
1178
1179                 spin_lock(&host->lock);
1180
1181                 if (!present)
1182                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1183                 else
1184                         set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1185
1186                 /* Clean up queue if present */
1187                 mrq = slot->mrq;
1188                 if (mrq) {
1189                         if (mrq == host->mrq) {
1190                                 /*
1191                                  * Reset controller to terminate any ongoing
1192                                  * commands or data transfers.
1193                                  */
1194                                 mci_writel(host, CR, MCI_CR_SWRST);
1195                                 mci_writel(host, CR, MCI_CR_MCIEN);
1196                                 mci_writel(host, MR, host->mode_reg);
1197                                 if (atmci_is_mci2())
1198                                         mci_writel(host, CFG, host->cfg_reg);
1199
1200                                 host->data = NULL;
1201                                 host->cmd = NULL;
1202
1203                                 switch (host->state) {
1204                                 case STATE_IDLE:
1205                                         break;
1206                                 case STATE_SENDING_CMD:
1207                                         mrq->cmd->error = -ENOMEDIUM;
1208                                         if (!mrq->data)
1209                                                 break;
1210                                         /* fall through */
1211                                 case STATE_SENDING_DATA:
1212                                         mrq->data->error = -ENOMEDIUM;
1213                                         atmci_stop_dma(host);
1214                                         break;
1215                                 case STATE_DATA_BUSY:
1216                                 case STATE_DATA_ERROR:
1217                                         if (mrq->data->error == -EINPROGRESS)
1218                                                 mrq->data->error = -ENOMEDIUM;
1219                                         if (!mrq->stop)
1220                                                 break;
1221                                         /* fall through */
1222                                 case STATE_SENDING_STOP:
1223                                         mrq->stop->error = -ENOMEDIUM;
1224                                         break;
1225                                 }
1226
1227                                 atmci_request_end(host, mrq);
1228                         } else {
1229                                 list_del(&slot->queue_node);
1230                                 mrq->cmd->error = -ENOMEDIUM;
1231                                 if (mrq->data)
1232                                         mrq->data->error = -ENOMEDIUM;
1233                                 if (mrq->stop)
1234                                         mrq->stop->error = -ENOMEDIUM;
1235
1236                                 spin_unlock(&host->lock);
1237                                 mmc_request_done(slot->mmc, mrq);
1238                                 spin_lock(&host->lock);
1239                         }
1240                 }
1241                 spin_unlock(&host->lock);
1242
1243                 mmc_detect_change(slot->mmc, 0);
1244         }
1245 }
1246
1247 static void atmci_tasklet_func(unsigned long priv)
1248 {
1249         struct atmel_mci        *host = (struct atmel_mci *)priv;
1250         struct mmc_request      *mrq = host->mrq;
1251         struct mmc_data         *data = host->data;
1252         struct mmc_command      *cmd = host->cmd;
1253         enum atmel_mci_state    state = host->state;
1254         enum atmel_mci_state    prev_state;
1255         u32                     status;
1256
1257         spin_lock(&host->lock);
1258
1259         state = host->state;
1260
1261         dev_vdbg(&host->pdev->dev,
1262                 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1263                 state, host->pending_events, host->completed_events,
1264                 mci_readl(host, IMR));
1265
1266         do {
1267                 prev_state = state;
1268
1269                 switch (state) {
1270                 case STATE_IDLE:
1271                         break;
1272
1273                 case STATE_SENDING_CMD:
1274                         if (!atmci_test_and_clear_pending(host,
1275                                                 EVENT_CMD_COMPLETE))
1276                                 break;
1277
1278                         host->cmd = NULL;
1279                         atmci_set_completed(host, EVENT_CMD_COMPLETE);
1280                         atmci_command_complete(host, mrq->cmd);
1281                         if (!mrq->data || cmd->error) {
1282                                 atmci_request_end(host, host->mrq);
1283                                 goto unlock;
1284                         }
1285
1286                         prev_state = state = STATE_SENDING_DATA;
1287                         /* fall through */
1288
1289                 case STATE_SENDING_DATA:
1290                         if (atmci_test_and_clear_pending(host,
1291                                                 EVENT_DATA_ERROR)) {
1292                                 atmci_stop_dma(host);
1293                                 if (data->stop)
1294                                         send_stop_cmd(host, data);
1295                                 state = STATE_DATA_ERROR;
1296                                 break;
1297                         }
1298
1299                         if (!atmci_test_and_clear_pending(host,
1300                                                 EVENT_XFER_COMPLETE))
1301                                 break;
1302
1303                         atmci_set_completed(host, EVENT_XFER_COMPLETE);
1304                         prev_state = state = STATE_DATA_BUSY;
1305                         /* fall through */
1306
1307                 case STATE_DATA_BUSY:
1308                         if (!atmci_test_and_clear_pending(host,
1309                                                 EVENT_DATA_COMPLETE))
1310                                 break;
1311
1312                         host->data = NULL;
1313                         atmci_set_completed(host, EVENT_DATA_COMPLETE);
1314                         status = host->data_status;
1315                         if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
1316                                 if (status & MCI_DTOE) {
1317                                         dev_dbg(&host->pdev->dev,
1318                                                         "data timeout error\n");
1319                                         data->error = -ETIMEDOUT;
1320                                 } else if (status & MCI_DCRCE) {
1321                                         dev_dbg(&host->pdev->dev,
1322                                                         "data CRC error\n");
1323                                         data->error = -EILSEQ;
1324                                 } else {
1325                                         dev_dbg(&host->pdev->dev,
1326                                                 "data FIFO error (status=%08x)\n",
1327                                                 status);
1328                                         data->error = -EIO;
1329                                 }
1330                         } else {
1331                                 data->bytes_xfered = data->blocks * data->blksz;
1332                                 data->error = 0;
1333                                 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS);
1334                         }
1335
1336                         if (!data->stop) {
1337                                 atmci_request_end(host, host->mrq);
1338                                 goto unlock;
1339                         }
1340
1341                         prev_state = state = STATE_SENDING_STOP;
1342                         if (!data->error)
1343                                 send_stop_cmd(host, data);
1344                         /* fall through */
1345
1346                 case STATE_SENDING_STOP:
1347                         if (!atmci_test_and_clear_pending(host,
1348                                                 EVENT_CMD_COMPLETE))
1349                                 break;
1350
1351                         host->cmd = NULL;
1352                         atmci_command_complete(host, mrq->stop);
1353                         atmci_request_end(host, host->mrq);
1354                         goto unlock;
1355
1356                 case STATE_DATA_ERROR:
1357                         if (!atmci_test_and_clear_pending(host,
1358                                                 EVENT_XFER_COMPLETE))
1359                                 break;
1360
1361                         state = STATE_DATA_BUSY;
1362                         break;
1363                 }
1364         } while (state != prev_state);
1365
1366         host->state = state;
1367
1368 unlock:
1369         spin_unlock(&host->lock);
1370 }
1371
1372 static void atmci_read_data_pio(struct atmel_mci *host)
1373 {
1374         struct scatterlist      *sg = host->sg;
1375         void                    *buf = sg_virt(sg);
1376         unsigned int            offset = host->pio_offset;
1377         struct mmc_data         *data = host->data;
1378         u32                     value;
1379         u32                     status;
1380         unsigned int            nbytes = 0;
1381
1382         do {
1383                 value = mci_readl(host, RDR);
1384                 if (likely(offset + 4 <= sg->length)) {
1385                         put_unaligned(value, (u32 *)(buf + offset));
1386
1387                         offset += 4;
1388                         nbytes += 4;
1389
1390                         if (offset == sg->length) {
1391                                 flush_dcache_page(sg_page(sg));
1392                                 host->sg = sg = sg_next(sg);
1393                                 if (!sg)
1394                                         goto done;
1395
1396                                 offset = 0;
1397                                 buf = sg_virt(sg);
1398                         }
1399                 } else {
1400                         unsigned int remaining = sg->length - offset;
1401                         memcpy(buf + offset, &value, remaining);
1402                         nbytes += remaining;
1403
1404                         flush_dcache_page(sg_page(sg));
1405                         host->sg = sg = sg_next(sg);
1406                         if (!sg)
1407                                 goto done;
1408
1409                         offset = 4 - remaining;
1410                         buf = sg_virt(sg);
1411                         memcpy(buf, (u8 *)&value + remaining, offset);
1412                         nbytes += offset;
1413                 }
1414
1415                 status = mci_readl(host, SR);
1416                 if (status & ATMCI_DATA_ERROR_FLAGS) {
1417                         mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY
1418                                                 | ATMCI_DATA_ERROR_FLAGS));
1419                         host->data_status = status;
1420                         data->bytes_xfered += nbytes;
1421                         smp_wmb();
1422                         atmci_set_pending(host, EVENT_DATA_ERROR);
1423                         tasklet_schedule(&host->tasklet);
1424                         return;
1425                 }
1426         } while (status & MCI_RXRDY);
1427
1428         host->pio_offset = offset;
1429         data->bytes_xfered += nbytes;
1430
1431         return;
1432
1433 done:
1434         mci_writel(host, IDR, MCI_RXRDY);
1435         mci_writel(host, IER, MCI_NOTBUSY);
1436         data->bytes_xfered += nbytes;
1437         smp_wmb();
1438         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1439 }
1440
1441 static void atmci_write_data_pio(struct atmel_mci *host)
1442 {
1443         struct scatterlist      *sg = host->sg;
1444         void                    *buf = sg_virt(sg);
1445         unsigned int            offset = host->pio_offset;
1446         struct mmc_data         *data = host->data;
1447         u32                     value;
1448         u32                     status;
1449         unsigned int            nbytes = 0;
1450
1451         do {
1452                 if (likely(offset + 4 <= sg->length)) {
1453                         value = get_unaligned((u32 *)(buf + offset));
1454                         mci_writel(host, TDR, value);
1455
1456                         offset += 4;
1457                         nbytes += 4;
1458                         if (offset == sg->length) {
1459                                 host->sg = sg = sg_next(sg);
1460                                 if (!sg)
1461                                         goto done;
1462
1463                                 offset = 0;
1464                                 buf = sg_virt(sg);
1465                         }
1466                 } else {
1467                         unsigned int remaining = sg->length - offset;
1468
1469                         value = 0;
1470                         memcpy(&value, buf + offset, remaining);
1471                         nbytes += remaining;
1472
1473                         host->sg = sg = sg_next(sg);
1474                         if (!sg) {
1475                                 mci_writel(host, TDR, value);
1476                                 goto done;
1477                         }
1478
1479                         offset = 4 - remaining;
1480                         buf = sg_virt(sg);
1481                         memcpy((u8 *)&value + remaining, buf, offset);
1482                         mci_writel(host, TDR, value);
1483                         nbytes += offset;
1484                 }
1485
1486                 status = mci_readl(host, SR);
1487                 if (status & ATMCI_DATA_ERROR_FLAGS) {
1488                         mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY
1489                                                 | ATMCI_DATA_ERROR_FLAGS));
1490                         host->data_status = status;
1491                         data->bytes_xfered += nbytes;
1492                         smp_wmb();
1493                         atmci_set_pending(host, EVENT_DATA_ERROR);
1494                         tasklet_schedule(&host->tasklet);
1495                         return;
1496                 }
1497         } while (status & MCI_TXRDY);
1498
1499         host->pio_offset = offset;
1500         data->bytes_xfered += nbytes;
1501
1502         return;
1503
1504 done:
1505         mci_writel(host, IDR, MCI_TXRDY);
1506         mci_writel(host, IER, MCI_NOTBUSY);
1507         data->bytes_xfered += nbytes;
1508         smp_wmb();
1509         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1510 }
1511
1512 static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)
1513 {
1514         mci_writel(host, IDR, MCI_CMDRDY);
1515
1516         host->cmd_status = status;
1517         smp_wmb();
1518         atmci_set_pending(host, EVENT_CMD_COMPLETE);
1519         tasklet_schedule(&host->tasklet);
1520 }
1521
1522 static void atmci_sdio_interrupt(struct atmel_mci *host, u32 status)
1523 {
1524         int     i;
1525
1526         for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1527                 struct atmel_mci_slot *slot = host->slot[i];
1528                 if (slot && (status & slot->sdio_irq)) {
1529                         mmc_signal_sdio_irq(slot->mmc);
1530                 }
1531         }
1532 }
1533
1534
1535 static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1536 {
1537         struct atmel_mci        *host = dev_id;
1538         u32                     status, mask, pending;
1539         unsigned int            pass_count = 0;
1540
1541         do {
1542                 status = mci_readl(host, SR);
1543                 mask = mci_readl(host, IMR);
1544                 pending = status & mask;
1545                 if (!pending)
1546                         break;
1547
1548                 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1549                         mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS
1550                                         | MCI_RXRDY | MCI_TXRDY);
1551                         pending &= mci_readl(host, IMR);
1552
1553                         host->data_status = status;
1554                         smp_wmb();
1555                         atmci_set_pending(host, EVENT_DATA_ERROR);
1556                         tasklet_schedule(&host->tasklet);
1557                 }
1558                 if (pending & MCI_NOTBUSY) {
1559                         mci_writel(host, IDR,
1560                                         ATMCI_DATA_ERROR_FLAGS | MCI_NOTBUSY);
1561                         if (!host->data_status)
1562                                 host->data_status = status;
1563                         smp_wmb();
1564                         atmci_set_pending(host, EVENT_DATA_COMPLETE);
1565                         tasklet_schedule(&host->tasklet);
1566                 }
1567                 if (pending & MCI_RXRDY)
1568                         atmci_read_data_pio(host);
1569                 if (pending & MCI_TXRDY)
1570                         atmci_write_data_pio(host);
1571
1572                 if (pending & MCI_CMDRDY)
1573                         atmci_cmd_interrupt(host, status);
1574
1575                 if (pending & (MCI_SDIOIRQA | MCI_SDIOIRQB))
1576                         atmci_sdio_interrupt(host, status);
1577
1578         } while (pass_count++ < 5);
1579
1580         return pass_count ? IRQ_HANDLED : IRQ_NONE;
1581 }
1582
1583 static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
1584 {
1585         struct atmel_mci_slot   *slot = dev_id;
1586
1587         /*
1588          * Disable interrupts until the pin has stabilized and check
1589          * the state then. Use mod_timer() since we may be in the
1590          * middle of the timer routine when this interrupt triggers.
1591          */
1592         disable_irq_nosync(irq);
1593         mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
1594
1595         return IRQ_HANDLED;
1596 }
1597
1598 static int __init atmci_init_slot(struct atmel_mci *host,
1599                 struct mci_slot_pdata *slot_data, unsigned int id,
1600                 u32 sdc_reg, u32 sdio_irq)
1601 {
1602         struct mmc_host                 *mmc;
1603         struct atmel_mci_slot           *slot;
1604
1605         mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
1606         if (!mmc)
1607                 return -ENOMEM;
1608
1609         slot = mmc_priv(mmc);
1610         slot->mmc = mmc;
1611         slot->host = host;
1612         slot->detect_pin = slot_data->detect_pin;
1613         slot->wp_pin = slot_data->wp_pin;
1614         slot->detect_is_active_high = slot_data->detect_is_active_high;
1615         slot->sdc_reg = sdc_reg;
1616         slot->sdio_irq = sdio_irq;
1617
1618         mmc->ops = &atmci_ops;
1619         mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
1620         mmc->f_max = host->bus_hz / 2;
1621         mmc->ocr_avail  = MMC_VDD_32_33 | MMC_VDD_33_34;
1622         if (sdio_irq)
1623                 mmc->caps |= MMC_CAP_SDIO_IRQ;
1624         if (atmci_is_mci2())
1625                 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1626         if (slot_data->bus_width >= 4)
1627                 mmc->caps |= MMC_CAP_4_BIT_DATA;
1628
1629         mmc->max_segs = 64;
1630         mmc->max_req_size = 32768 * 512;
1631         mmc->max_blk_size = 32768;
1632         mmc->max_blk_count = 512;
1633
1634         /* Assume card is present initially */
1635         set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1636         if (gpio_is_valid(slot->detect_pin)) {
1637                 if (gpio_request(slot->detect_pin, "mmc_detect")) {
1638                         dev_dbg(&mmc->class_dev, "no detect pin available\n");
1639                         slot->detect_pin = -EBUSY;
1640                 } else if (gpio_get_value(slot->detect_pin) ^
1641                                 slot->detect_is_active_high) {
1642                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1643                 }
1644         }
1645
1646         if (!gpio_is_valid(slot->detect_pin))
1647                 mmc->caps |= MMC_CAP_NEEDS_POLL;
1648
1649         if (gpio_is_valid(slot->wp_pin)) {
1650                 if (gpio_request(slot->wp_pin, "mmc_wp")) {
1651                         dev_dbg(&mmc->class_dev, "no WP pin available\n");
1652                         slot->wp_pin = -EBUSY;
1653                 }
1654         }
1655
1656         host->slot[id] = slot;
1657         mmc_add_host(mmc);
1658
1659         if (gpio_is_valid(slot->detect_pin)) {
1660                 int ret;
1661
1662                 setup_timer(&slot->detect_timer, atmci_detect_change,
1663                                 (unsigned long)slot);
1664
1665                 ret = request_irq(gpio_to_irq(slot->detect_pin),
1666                                 atmci_detect_interrupt,
1667                                 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1668                                 "mmc-detect", slot);
1669                 if (ret) {
1670                         dev_dbg(&mmc->class_dev,
1671                                 "could not request IRQ %d for detect pin\n",
1672                                 gpio_to_irq(slot->detect_pin));
1673                         gpio_free(slot->detect_pin);
1674                         slot->detect_pin = -EBUSY;
1675                 }
1676         }
1677
1678         atmci_init_debugfs(slot);
1679
1680         return 0;
1681 }
1682
1683 static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
1684                 unsigned int id)
1685 {
1686         /* Debugfs stuff is cleaned up by mmc core */
1687
1688         set_bit(ATMCI_SHUTDOWN, &slot->flags);
1689         smp_wmb();
1690
1691         mmc_remove_host(slot->mmc);
1692
1693         if (gpio_is_valid(slot->detect_pin)) {
1694                 int pin = slot->detect_pin;
1695
1696                 free_irq(gpio_to_irq(pin), slot);
1697                 del_timer_sync(&slot->detect_timer);
1698                 gpio_free(pin);
1699         }
1700         if (gpio_is_valid(slot->wp_pin))
1701                 gpio_free(slot->wp_pin);
1702
1703         slot->host->slot[id] = NULL;
1704         mmc_free_host(slot->mmc);
1705 }
1706
1707 #ifdef CONFIG_MMC_ATMELMCI_DMA
1708 static bool filter(struct dma_chan *chan, void *slave)
1709 {
1710         struct mci_dma_data     *sl = slave;
1711
1712         if (sl && find_slave_dev(sl) == chan->device->dev) {
1713                 chan->private = slave_data_ptr(sl);
1714                 return true;
1715         } else {
1716                 return false;
1717         }
1718 }
1719
1720 static void atmci_configure_dma(struct atmel_mci *host)
1721 {
1722         struct mci_platform_data        *pdata;
1723
1724         if (host == NULL)
1725                 return;
1726
1727         pdata = host->pdev->dev.platform_data;
1728
1729         if (pdata && find_slave_dev(pdata->dma_slave)) {
1730                 dma_cap_mask_t mask;
1731
1732                 setup_dma_addr(pdata->dma_slave,
1733                                host->mapbase + MCI_TDR,
1734                                host->mapbase + MCI_RDR);
1735
1736                 /* Try to grab a DMA channel */
1737                 dma_cap_zero(mask);
1738                 dma_cap_set(DMA_SLAVE, mask);
1739                 host->dma.chan =
1740                         dma_request_channel(mask, filter, pdata->dma_slave);
1741         }
1742         if (!host->dma.chan)
1743                 dev_notice(&host->pdev->dev, "DMA not available, using PIO\n");
1744         else
1745                 dev_info(&host->pdev->dev,
1746                                         "Using %s for DMA transfers\n",
1747                                         dma_chan_name(host->dma.chan));
1748 }
1749 #else
1750 static void atmci_configure_dma(struct atmel_mci *host) {}
1751 #endif
1752
1753 static int __init atmci_probe(struct platform_device *pdev)
1754 {
1755         struct mci_platform_data        *pdata;
1756         struct atmel_mci                *host;
1757         struct resource                 *regs;
1758         unsigned int                    nr_slots;
1759         int                             irq;
1760         int                             ret;
1761
1762         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1763         if (!regs)
1764                 return -ENXIO;
1765         pdata = pdev->dev.platform_data;
1766         if (!pdata)
1767                 return -ENXIO;
1768         irq = platform_get_irq(pdev, 0);
1769         if (irq < 0)
1770                 return irq;
1771
1772         host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL);
1773         if (!host)
1774                 return -ENOMEM;
1775
1776         host->pdev = pdev;
1777         spin_lock_init(&host->lock);
1778         INIT_LIST_HEAD(&host->queue);
1779
1780         host->mck = clk_get(&pdev->dev, "mci_clk");
1781         if (IS_ERR(host->mck)) {
1782                 ret = PTR_ERR(host->mck);
1783                 goto err_clk_get;
1784         }
1785
1786         ret = -ENOMEM;
1787         host->regs = ioremap(regs->start, resource_size(regs));
1788         if (!host->regs)
1789                 goto err_ioremap;
1790
1791         clk_enable(host->mck);
1792         mci_writel(host, CR, MCI_CR_SWRST);
1793         host->bus_hz = clk_get_rate(host->mck);
1794         clk_disable(host->mck);
1795
1796         host->mapbase = regs->start;
1797
1798         tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
1799
1800         ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host);
1801         if (ret)
1802                 goto err_request_irq;
1803
1804         atmci_configure_dma(host);
1805
1806         platform_set_drvdata(pdev, host);
1807
1808         /* We need at least one slot to succeed */
1809         nr_slots = 0;
1810         ret = -ENODEV;
1811         if (pdata->slot[0].bus_width) {
1812                 ret = atmci_init_slot(host, &pdata->slot[0],
1813                                 0, MCI_SDCSEL_SLOT_A, MCI_SDIOIRQA);
1814                 if (!ret)
1815                         nr_slots++;
1816         }
1817         if (pdata->slot[1].bus_width) {
1818                 ret = atmci_init_slot(host, &pdata->slot[1],
1819                                 1, MCI_SDCSEL_SLOT_B, MCI_SDIOIRQB);
1820                 if (!ret)
1821                         nr_slots++;
1822         }
1823
1824         if (!nr_slots) {
1825                 dev_err(&pdev->dev, "init failed: no slot defined\n");
1826                 goto err_init_slot;
1827         }
1828
1829         dev_info(&pdev->dev,
1830                         "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
1831                         host->mapbase, irq, nr_slots);
1832
1833         return 0;
1834
1835 err_init_slot:
1836 #ifdef CONFIG_MMC_ATMELMCI_DMA
1837         if (host->dma.chan)
1838                 dma_release_channel(host->dma.chan);
1839 #endif
1840         free_irq(irq, host);
1841 err_request_irq:
1842         iounmap(host->regs);
1843 err_ioremap:
1844         clk_put(host->mck);
1845 err_clk_get:
1846         kfree(host);
1847         return ret;
1848 }
1849
1850 static int __exit atmci_remove(struct platform_device *pdev)
1851 {
1852         struct atmel_mci        *host = platform_get_drvdata(pdev);
1853         unsigned int            i;
1854
1855         platform_set_drvdata(pdev, NULL);
1856
1857         for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1858                 if (host->slot[i])
1859                         atmci_cleanup_slot(host->slot[i], i);
1860         }
1861
1862         clk_enable(host->mck);
1863         mci_writel(host, IDR, ~0UL);
1864         mci_writel(host, CR, MCI_CR_MCIDIS);
1865         mci_readl(host, SR);
1866         clk_disable(host->mck);
1867
1868 #ifdef CONFIG_MMC_ATMELMCI_DMA
1869         if (host->dma.chan)
1870                 dma_release_channel(host->dma.chan);
1871 #endif
1872
1873         free_irq(platform_get_irq(pdev, 0), host);
1874         iounmap(host->regs);
1875
1876         clk_put(host->mck);
1877         kfree(host);
1878
1879         return 0;
1880 }
1881
1882 #ifdef CONFIG_PM
1883 static int atmci_suspend(struct device *dev)
1884 {
1885         struct atmel_mci *host = dev_get_drvdata(dev);
1886         int i;
1887
1888          for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1889                 struct atmel_mci_slot *slot = host->slot[i];
1890                 int ret;
1891
1892                 if (!slot)
1893                         continue;
1894                 ret = mmc_suspend_host(slot->mmc);
1895                 if (ret < 0) {
1896                         while (--i >= 0) {
1897                                 slot = host->slot[i];
1898                                 if (slot
1899                                 && test_bit(ATMCI_SUSPENDED, &slot->flags)) {
1900                                         mmc_resume_host(host->slot[i]->mmc);
1901                                         clear_bit(ATMCI_SUSPENDED, &slot->flags);
1902                                 }
1903                         }
1904                         return ret;
1905                 } else {
1906                         set_bit(ATMCI_SUSPENDED, &slot->flags);
1907                 }
1908         }
1909
1910         return 0;
1911 }
1912
1913 static int atmci_resume(struct device *dev)
1914 {
1915         struct atmel_mci *host = dev_get_drvdata(dev);
1916         int i;
1917         int ret = 0;
1918
1919         for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1920                 struct atmel_mci_slot *slot = host->slot[i];
1921                 int err;
1922
1923                 slot = host->slot[i];
1924                 if (!slot)
1925                         continue;
1926                 if (!test_bit(ATMCI_SUSPENDED, &slot->flags))
1927                         continue;
1928                 err = mmc_resume_host(slot->mmc);
1929                 if (err < 0)
1930                         ret = err;
1931                 else
1932                         clear_bit(ATMCI_SUSPENDED, &slot->flags);
1933         }
1934
1935         return ret;
1936 }
1937 static SIMPLE_DEV_PM_OPS(atmci_pm, atmci_suspend, atmci_resume);
1938 #define ATMCI_PM_OPS    (&atmci_pm)
1939 #else
1940 #define ATMCI_PM_OPS    NULL
1941 #endif
1942
1943 static struct platform_driver atmci_driver = {
1944         .remove         = __exit_p(atmci_remove),
1945         .driver         = {
1946                 .name           = "atmel_mci",
1947                 .pm             = ATMCI_PM_OPS,
1948         },
1949 };
1950
1951 static int __init atmci_init(void)
1952 {
1953         return platform_driver_probe(&atmci_driver, atmci_probe);
1954 }
1955
1956 static void __exit atmci_exit(void)
1957 {
1958         platform_driver_unregister(&atmci_driver);
1959 }
1960
1961 late_initcall(atmci_init); /* try to load after dma driver when built-in */
1962 module_exit(atmci_exit);
1963
1964 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
1965 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
1966 MODULE_LICENSE("GPL v2");