drivers/misc/sgi-gru/grufile.c

   1 /*
   2  * SN Platform GRU Driver
   3  *
   4  *              FILE OPERATIONS & DRIVER INITIALIZATION
   5  *
   6  * This file supports the user system call for file open, close, mmap, etc.
   7  * This also incudes the driver initialization code.
   8  *
   9  *  Copyright (c) 2008 Silicon Graphics, Inc.  All Rights Reserved.
  10  *
  11  *  This program is free software; you can redistribute it and/or modify
  12  *  it under the terms of the GNU General Public License as published by
  13  *  the Free Software Foundation; either version 2 of the License, or
  14  *  (at your option) any later version.
  15  *
  16  *  This program is distributed in the hope that it will be useful,
  17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *  GNU General Public License for more details.
  20  *
  21  *  You should have received a copy of the GNU General Public License
  22  *  along with this program; if not, write to the Free Software
  23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  24  */
  25
  26 #include <linux/module.h>
  27 #include <linux/kernel.h>
  28 #include <linux/errno.h>
  29 #include <linux/slab.h>
  30 #include <linux/mm.h>
  31 #include <linux/io.h>
  32 #include <linux/spinlock.h>
  33 #include <linux/device.h>
  34 #include <linux/miscdevice.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/proc_fs.h>
  37 #include <linux/uaccess.h>
  38 #ifdef CONFIG_X86_64
  39 #include <asm/uv/uv_irq.h>
  40 #endif
  41 #include <asm/uv/uv.h>
  42 #include "gru.h"
  43 #include "grulib.h"
  44 #include "grutables.h"
  45
  46 #include <asm/uv/uv_hub.h>
  47 #include <asm/uv/uv_mmrs.h>
  48
  49 struct gru_blade_state *gru_base[GRU_MAX_BLADES] __read_mostly;
  50 unsigned long gru_start_paddr __read_mostly;
  51 void *gru_start_vaddr __read_mostly;
  52 unsigned long gru_end_paddr __read_mostly;
  53 unsigned int gru_max_gids __read_mostly;
  54 struct gru_stats_s gru_stats;
  55
  56 /* Guaranteed user available resources on each node */
  57 static int max_user_cbrs, max_user_dsr_bytes;
  58
  59 static struct miscdevice gru_miscdev;
  60
  61
  62 /*
  63  * gru_vma_close
  64  *
  65  * Called when unmapping a device mapping. Frees all gru resources
  66  * and tables belonging to the vma.
  67  */
  68 static void gru_vma_close(struct vm_area_struct *vma)
  69 {
  70         struct gru_vma_data *vdata;
  71         struct gru_thread_state *gts;
  72         struct list_head *entry, *next;
  73
  74         if (!vma->vm_private_data)
  75                 return;
  76
  77         vdata = vma->vm_private_data;
  78         vma->vm_private_data = NULL;
  79         gru_dbg(grudev, "vma %p, file %p, vdata %p\n", vma, vma->vm_file,
  80                                 vdata);
  81         list_for_each_safe(entry, next, &vdata->vd_head) {
  82                 gts =
  83                     list_entry(entry, struct gru_thread_state, ts_next);
  84                 list_del(&gts->ts_next);
  85                 mutex_lock(&gts->ts_ctxlock);
  86                 if (gts->ts_gru)
  87                         gru_unload_context(gts, 0);
  88                 mutex_unlock(&gts->ts_ctxlock);
  89                 gts_drop(gts);
  90         }
  91         kfree(vdata);
  92         STAT(vdata_free);
  93 }
  94
  95 /*
  96  * gru_file_mmap
  97  *
  98  * Called when mmapping the device.  Initializes the vma with a fault handler
  99  * and private data structure necessary to allocate, track, and free the
 100  * underlying pages.
 101  */
 102 static int gru_file_mmap(struct file *file, struct vm_area_struct *vma)
 103 {
 104         if ((vma->vm_flags & (VM_SHARED | VM_WRITE)) != (VM_SHARED | VM_WRITE))
 105                 return -EPERM;
 106
 107         if (vma->vm_start & (GRU_GSEG_PAGESIZE - 1) ||
 108                                 vma->vm_end & (GRU_GSEG_PAGESIZE - 1))
 109                 return -EINVAL;
 110
 111         vma->vm_flags |=
 112             (VM_IO | VM_DONTCOPY | VM_LOCKED | VM_DONTEXPAND | VM_PFNMAP |
 113                         VM_RESERVED);
 114         vma->vm_page_prot = PAGE_SHARED;
 115         vma->vm_ops = &gru_vm_ops;
 116
 117         vma->vm_private_data = gru_alloc_vma_data(vma, 0);
 118         if (!vma->vm_private_data)
 119                 return -ENOMEM;
 120
 121         gru_dbg(grudev, "file %p, vaddr 0x%lx, vma %p, vdata %p\n",
 122                 file, vma->vm_start, vma, vma->vm_private_data);
 123         return 0;
 124 }
 125
 126 /*
 127  * Create a new GRU context
 128  */
 129 static int gru_create_new_context(unsigned long arg)
 130 {
 131         struct gru_create_context_req req;
 132         struct vm_area_struct *vma;
 133         struct gru_vma_data *vdata;
 134         int ret = -EINVAL;
 135
 136         if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
 137                 return -EFAULT;
 138
 139         if (req.data_segment_bytes > max_user_dsr_bytes)
 140                 return -EINVAL;
 141         if (req.control_blocks > max_user_cbrs || !req.maximum_thread_count)
 142                 return -EINVAL;
 143
 144         if (!(req.options & GRU_OPT_MISS_MASK))
 145                 req.options |= GRU_OPT_MISS_FMM_INTR;
 146
 147         down_write(&current->mm->mmap_sem);
 148         vma = gru_find_vma(req.gseg);
 149         if (vma) {
 150                 vdata = vma->vm_private_data;
 151                 vdata->vd_user_options = req.options;
 152                 vdata->vd_dsr_au_count =
 153                     GRU_DS_BYTES_TO_AU(req.data_segment_bytes);
 154                 vdata->vd_cbr_au_count = GRU_CB_COUNT_TO_AU(req.control_blocks);
 155                 vdata->vd_tlb_preload_count = req.tlb_preload_count;
 156                 ret = 0;
 157         }
 158         up_write(&current->mm->mmap_sem);
 159
 160         return ret;
 161 }
 162
 163 /*
 164  * Get GRU configuration info (temp - for emulator testing)
 165  */
 166 static long gru_get_config_info(unsigned long arg)
 167 {
 168         struct gru_config_info info;
 169         int nodesperblade;
 170
 171         if (num_online_nodes() > 1 &&
 172                         (uv_node_to_blade_id(1) == uv_node_to_blade_id(0)))
 173                 nodesperblade = 2;
 174         else
 175                 nodesperblade = 1;
 176         info.cpus = num_online_cpus();
 177         info.nodes = num_online_nodes();
 178         info.blades = info.nodes / nodesperblade;
 179         info.chiplets = GRU_CHIPLETS_PER_BLADE * info.blades;
 180
 181         if (copy_to_user((void __user *)arg, &info, sizeof(info)))
 182                 return -EFAULT;
 183         return 0;
 184 }
 185
 186 /*
 187  * gru_file_unlocked_ioctl
 188  *
 189  * Called to update file attributes via IOCTL calls.
 190  */
 191 static long gru_file_unlocked_ioctl(struct file *file, unsigned int req,
 192                                     unsigned long arg)
 193 {
 194         int err = -EBADRQC;
 195
 196         gru_dbg(grudev, "file %p, req 0x%x, 0x%lx\n", file, req, arg);
 197
 198         switch (req) {
 199         case GRU_CREATE_CONTEXT:
 200                 err = gru_create_new_context(arg);
 201                 break;
 202         case GRU_SET_CONTEXT_OPTION:
 203                 err = gru_set_context_option(arg);
 204                 break;
 205         case GRU_USER_GET_EXCEPTION_DETAIL:
 206                 err = gru_get_exception_detail(arg);
 207                 break;
 208         case GRU_USER_UNLOAD_CONTEXT:
 209                 err = gru_user_unload_context(arg);
 210                 break;
 211         case GRU_USER_FLUSH_TLB:
 212                 err = gru_user_flush_tlb(arg);
 213                 break;
 214         case GRU_USER_CALL_OS:
 215                 err = gru_handle_user_call_os(arg);
 216                 break;
 217         case GRU_GET_GSEG_STATISTICS:
 218                 err = gru_get_gseg_statistics(arg);
 219                 break;
 220         case GRU_KTEST:
 221                 err = gru_ktest(arg);
 222                 break;
 223         case GRU_GET_CONFIG_INFO:
 224                 err = gru_get_config_info(arg);
 225                 break;
 226         case GRU_DUMP_CHIPLET_STATE:
 227                 err = gru_dump_chiplet_request(arg);
 228                 break;
 229         }
 230         return err;
 231 }
 232
 233 /*
 234  * Called at init time to build tables for all GRUs that are present in the
 235  * system.
 236  */
 237 static void gru_init_chiplet(struct gru_state *gru, unsigned long paddr,
 238                              void *vaddr, int blade_id, int chiplet_id)
 239 {
 240         spin_lock_init(&gru->gs_lock);
 241         spin_lock_init(&gru->gs_asid_lock);
 242         gru->gs_gru_base_paddr = paddr;
 243         gru->gs_gru_base_vaddr = vaddr;
 244         gru->gs_gid = blade_id * GRU_CHIPLETS_PER_BLADE + chiplet_id;
 245         gru->gs_blade = gru_base[blade_id];
 246         gru->gs_blade_id = blade_id;
 247         gru->gs_chiplet_id = chiplet_id;
 248         gru->gs_cbr_map = (GRU_CBR_AU == 64) ? ~0 : (1UL << GRU_CBR_AU) - 1;
 249         gru->gs_dsr_map = (1UL << GRU_DSR_AU) - 1;
 250         gru->gs_asid_limit = MAX_ASID;
 251         gru_tgh_flush_init(gru);
 252         if (gru->gs_gid >= gru_max_gids)
 253                 gru_max_gids = gru->gs_gid + 1;
 254         gru_dbg(grudev, "bid %d, gid %d, vaddr %p (0x%lx)\n",
 255                 blade_id, gru->gs_gid, gru->gs_gru_base_vaddr,
 256                 gru->gs_gru_base_paddr);
 257 }
 258
 259 static int gru_init_tables(unsigned long gru_base_paddr, void *gru_base_vaddr)
 260 {
 261         int pnode, nid, bid, chip;
 262         int cbrs, dsrbytes, n;
 263         int order = get_order(sizeof(struct gru_blade_state));
 264         struct page *page;
 265         struct gru_state *gru;
 266         unsigned long paddr;
 267         void *vaddr;
 268
 269         max_user_cbrs = GRU_NUM_CB;
 270         max_user_dsr_bytes = GRU_NUM_DSR_BYTES;
 271         for_each_possible_blade(bid) {
 272                 pnode = uv_blade_to_pnode(bid);
 273                 nid = uv_blade_to_memory_nid(bid);/* -1 if no memory on blade */
 274                 page = alloc_pages_node(nid, GFP_KERNEL, order);
 275                 if (!page)
 276                         goto fail;
 277                 gru_base[bid] = page_address(page);
 278                 memset(gru_base[bid], 0, sizeof(struct gru_blade_state));
 279                 gru_base[bid]->bs_lru_gru = &gru_base[bid]->bs_grus[0];
 280                 spin_lock_init(&gru_base[bid]->bs_lock);
 281                 init_rwsem(&gru_base[bid]->bs_kgts_sema);
 282
 283                 dsrbytes = 0;
 284                 cbrs = 0;
 285                 for (gru = gru_base[bid]->bs_grus, chip = 0;
 286                                 chip < GRU_CHIPLETS_PER_BLADE;
 287                                 chip++, gru++) {
 288                         paddr = gru_chiplet_paddr(gru_base_paddr, pnode, chip);
 289                         vaddr = gru_chiplet_vaddr(gru_base_vaddr, pnode, chip);
 290                         gru_init_chiplet(gru, paddr, vaddr, bid, chip);
 291                         n = hweight64(gru->gs_cbr_map) * GRU_CBR_AU_SIZE;
 292                         cbrs = max(cbrs, n);
 293                         n = hweight64(gru->gs_dsr_map) * GRU_DSR_AU_BYTES;
 294                         dsrbytes = max(dsrbytes, n);
 295                 }
 296                 max_user_cbrs = min(max_user_cbrs, cbrs);
 297                 max_user_dsr_bytes = min(max_user_dsr_bytes, dsrbytes);
 298         }
 299
 300         return 0;
 301
 302 fail:
 303         for (bid--; bid >= 0; bid--)
 304                 free_pages((unsigned long)gru_base[bid], order);
 305         return -ENOMEM;
 306 }
 307
 308 static void gru_free_tables(void)
 309 {
 310         int bid;
 311         int order = get_order(sizeof(struct gru_state) *
 312                               GRU_CHIPLETS_PER_BLADE);
 313
 314         for (bid = 0; bid < GRU_MAX_BLADES; bid++)
 315                 free_pages((unsigned long)gru_base[bid], order);
 316 }
 317
 318 static unsigned long gru_chiplet_cpu_to_mmr(int chiplet, int cpu, int *corep)
 319 {
 320         unsigned long mmr = 0;
 321         int core;
 322
 323         /*
 324          * We target the cores of a blade and not the hyperthreads themselves.
 325          * There is a max of 8 cores per socket and 2 sockets per blade,
 326          * making for a max total of 16 cores (i.e., 16 CPUs without
 327          * hyperthreading and 32 CPUs with hyperthreading).
 328          */
 329         core = uv_cpu_core_number(cpu) + UV_MAX_INT_CORES * uv_cpu_socket_number(cpu);
 330         if (core >= GRU_NUM_TFM || uv_cpu_ht_number(cpu))
 331                 return 0;
 332
 333         if (chiplet == 0) {
 334                 mmr = UVH_GR0_TLB_INT0_CONFIG +
 335                     core * (UVH_GR0_TLB_INT1_CONFIG - UVH_GR0_TLB_INT0_CONFIG);
 336         } else if (chiplet == 1) {
 337                 mmr = UVH_GR1_TLB_INT0_CONFIG +
 338                     core * (UVH_GR1_TLB_INT1_CONFIG - UVH_GR1_TLB_INT0_CONFIG);
 339         } else {
 340                 BUG();
 341         }
 342
 343         *corep = core;
 344         return mmr;
 345 }
 346
 347 #ifdef CONFIG_IA64
 348
 349 static int gru_irq_count[GRU_CHIPLETS_PER_BLADE];
 350
 351 static void gru_noop(struct irq_data *d)
 352 {
 353 }
 354
 355 static struct irq_chip gru_chip[GRU_CHIPLETS_PER_BLADE] = {
 356         [0 ... GRU_CHIPLETS_PER_BLADE - 1] {
 357                 .irq_mask       = gru_noop,
 358                 .irq_unmask     = gru_noop,
 359                 .irq_ack        = gru_noop
 360         }
 361 };
 362
 363 static int gru_chiplet_setup_tlb_irq(int chiplet, char *irq_name,
 364                         irq_handler_t irq_handler, int cpu, int blade)
 365 {
 366         unsigned long mmr;
 367         int irq = IRQ_GRU + chiplet;
 368         int ret, core;
 369
 370         mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core);
 371         if (mmr == 0)
 372                 return 0;
 373
 374         if (gru_irq_count[chiplet] == 0) {
 375                 gru_chip[chiplet].name = irq_name;
 376                 ret = irq_set_chip(irq, &gru_chip[chiplet]);
 377                 if (ret) {
 378                         printk(KERN_ERR "%s: set_irq_chip failed, errno=%d\n",
 379                                GRU_DRIVER_ID_STR, -ret);
 380                         return ret;
 381                 }
 382
 383                 ret = request_irq(irq, irq_handler, 0, irq_name, NULL);
 384                 if (ret) {
 385                         printk(KERN_ERR "%s: request_irq failed, errno=%d\n",
 386                                GRU_DRIVER_ID_STR, -ret);
 387                         return ret;
 388                 }
 389         }
 390         gru_irq_count[chiplet]++;
 391
 392         return 0;
 393 }
 394
 395 static void gru_chiplet_teardown_tlb_irq(int chiplet, int cpu, int blade)
 396 {
 397         unsigned long mmr;
 398         int core, irq = IRQ_GRU + chiplet;
 399
 400         if (gru_irq_count[chiplet] == 0)
 401                 return;
 402
 403         mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core);
 404         if (mmr == 0)
 405                 return;
 406
 407         if (--gru_irq_count[chiplet] == 0)
 408                 free_irq(irq, NULL);
 409 }
 410
 411 #elif defined CONFIG_X86_64
 412
 413 static int gru_chiplet_setup_tlb_irq(int chiplet, char *irq_name,
 414                         irq_handler_t irq_handler, int cpu, int blade)
 415 {
 416         unsigned long mmr;
 417         int irq, core;
 418         int ret;
 419
 420         mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core);
 421         if (mmr == 0)
 422                 return 0;
 423
 424         irq = uv_setup_irq(irq_name, cpu, blade, mmr, UV_AFFINITY_CPU);
 425         if (irq < 0) {
 426                 printk(KERN_ERR "%s: uv_setup_irq failed, errno=%d\n",
 427                        GRU_DRIVER_ID_STR, -irq);
 428                 return irq;
 429         }
 430
 431         ret = request_irq(irq, irq_handler, 0, irq_name, NULL);
 432         if (ret) {
 433                 uv_teardown_irq(irq);
 434                 printk(KERN_ERR "%s: request_irq failed, errno=%d\n",
 435                        GRU_DRIVER_ID_STR, -ret);
 436                 return ret;
 437         }
 438         gru_base[blade]->bs_grus[chiplet].gs_irq[core] = irq;
 439         return 0;
 440 }
 441
 442 static void gru_chiplet_teardown_tlb_irq(int chiplet, int cpu, int blade)
 443 {
 444         int irq, core;
 445         unsigned long mmr;
 446
 447         mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core);
 448         if (mmr) {
 449                 irq = gru_base[blade]->bs_grus[chiplet].gs_irq[core];
 450                 if (irq) {
 451                         free_irq(irq, NULL);
 452                         uv_teardown_irq(irq);
 453                 }
 454         }
 455 }
 456
 457 #endif
 458
 459 static void gru_teardown_tlb_irqs(void)
 460 {
 461         int blade;
 462         int cpu;
 463
 464         for_each_online_cpu(cpu) {
 465                 blade = uv_cpu_to_blade_id(cpu);
 466                 gru_chiplet_teardown_tlb_irq(0, cpu, blade);
 467                 gru_chiplet_teardown_tlb_irq(1, cpu, blade);
 468         }
 469         for_each_possible_blade(blade) {
 470                 if (uv_blade_nr_possible_cpus(blade))
 471                         continue;
 472                 gru_chiplet_teardown_tlb_irq(0, 0, blade);
 473                 gru_chiplet_teardown_tlb_irq(1, 0, blade);
 474         }
 475 }
 476
 477 static int gru_setup_tlb_irqs(void)
 478 {
 479         int blade;
 480         int cpu;
 481         int ret;
 482
 483         for_each_online_cpu(cpu) {
 484                 blade = uv_cpu_to_blade_id(cpu);
 485                 ret = gru_chiplet_setup_tlb_irq(0, "GRU0_TLB", gru0_intr, cpu, blade);
 486                 if (ret != 0)
 487                         goto exit1;
 488
 489                 ret = gru_chiplet_setup_tlb_irq(1, "GRU1_TLB", gru1_intr, cpu, blade);
 490                 if (ret != 0)
 491                         goto exit1;
 492         }
 493         for_each_possible_blade(blade) {
 494                 if (uv_blade_nr_possible_cpus(blade))
 495                         continue;
 496                 ret = gru_chiplet_setup_tlb_irq(0, "GRU0_TLB", gru_intr_mblade, 0, blade);
 497                 if (ret != 0)
 498                         goto exit1;
 499
 500                 ret = gru_chiplet_setup_tlb_irq(1, "GRU1_TLB", gru_intr_mblade, 0, blade);
 501                 if (ret != 0)
 502                         goto exit1;
 503         }
 504
 505         return 0;
 506
 507 exit1:
 508         gru_teardown_tlb_irqs();
 509         return ret;
 510 }
 511
 512 /*
 513  * gru_init
 514  *
 515  * Called at boot or module load time to initialize the GRUs.
 516  */
 517 static int __init gru_init(void)
 518 {
 519         int ret;
 520
 521         if (!is_uv_system())
 522                 return 0;
 523
 524 #if defined CONFIG_IA64
 525         gru_start_paddr = 0xd000000000UL; /* ZZZZZZZZZZZZZZZZZZZ fixme */
 526 #else
 527         gru_start_paddr = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR) &
 528                                 0x7fffffffffffUL;
 529 #endif
 530         gru_start_vaddr = __va(gru_start_paddr);
 531         gru_end_paddr = gru_start_paddr + GRU_MAX_BLADES * GRU_SIZE;
 532         printk(KERN_INFO "GRU space: 0x%lx - 0x%lx\n",
 533                gru_start_paddr, gru_end_paddr);
 534         ret = misc_register(&gru_miscdev);
 535         if (ret) {
 536                 printk(KERN_ERR "%s: misc_register failed\n",
 537                        GRU_DRIVER_ID_STR);
 538                 goto exit0;
 539         }
 540
 541         ret = gru_proc_init();
 542         if (ret) {
 543                 printk(KERN_ERR "%s: proc init failed\n", GRU_DRIVER_ID_STR);
 544                 goto exit1;
 545         }
 546
 547         ret = gru_init_tables(gru_start_paddr, gru_start_vaddr);
 548         if (ret) {
 549                 printk(KERN_ERR "%s: init tables failed\n", GRU_DRIVER_ID_STR);
 550                 goto exit2;
 551         }
 552
 553         ret = gru_setup_tlb_irqs();
 554         if (ret != 0)
 555                 goto exit3;
 556
 557         gru_kservices_init();
 558
 559         printk(KERN_INFO "%s: v%s\n", GRU_DRIVER_ID_STR,
 560                GRU_DRIVER_VERSION_STR);
 561         return 0;
 562
 563 exit3:
 564         gru_free_tables();
 565 exit2:
 566         gru_proc_exit();
 567 exit1:
 568         misc_deregister(&gru_miscdev);
 569 exit0:
 570         return ret;
 571
 572 }
 573
 574 static void __exit gru_exit(void)
 575 {
 576         if (!is_uv_system())
 577                 return;
 578
 579         gru_teardown_tlb_irqs();
 580         gru_kservices_exit();
 581         gru_free_tables();
 582         misc_deregister(&gru_miscdev);
 583         gru_proc_exit();
 584 }
 585
 586 static const struct file_operations gru_fops = {
 587         .owner          = THIS_MODULE,
 588         .unlocked_ioctl = gru_file_unlocked_ioctl,
 589         .mmap           = gru_file_mmap,
 590         .llseek         = noop_llseek,
 591 };
 592
 593 static struct miscdevice gru_miscdev = {
 594         .minor          = MISC_DYNAMIC_MINOR,
 595         .name           = "gru",
 596         .fops           = &gru_fops,
 597 };
 598
 599 const struct vm_operations_struct gru_vm_ops = {
 600         .close          = gru_vma_close,
 601         .fault          = gru_fault,
 602 };
 603
 604 #ifndef MODULE
 605 fs_initcall(gru_init);
 606 #else
 607 module_init(gru_init);
 608 #endif
 609 module_exit(gru_exit);
 610
 611 module_param(gru_options, ulong, 0644);
 612 MODULE_PARM_DESC(gru_options, "Various debug options");
 613
 614 MODULE_AUTHOR("Silicon Graphics, Inc.");
 615 MODULE_LICENSE("GPL");
 616 MODULE_DESCRIPTION(GRU_DRIVER_ID_STR GRU_DRIVER_VERSION_STR);
 617 MODULE_VERSION(GRU_DRIVER_VERSION_STR);
 618