drivers/memstick/host/jmb38x_ms.c

   1 /*
   2  *  jmb38x_ms.c - JMicron jmb38x MemoryStick card reader
   3  *
   4  *  Copyright (C) 2008 Alex Dubov <oakad@yahoo.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  */
  11
  12 #include <linux/spinlock.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/pci.h>
  15 #include <linux/dma-mapping.h>
  16 #include <linux/delay.h>
  17 #include <linux/highmem.h>
  18 #include <linux/memstick.h>
  19
  20 #define DRIVER_NAME "jmb38x_ms"
  21
  22 static int no_dma;
  23 module_param(no_dma, bool, 0644);
  24
  25 enum {
  26         DMA_ADDRESS       = 0x00,
  27         BLOCK             = 0x04,
  28         DMA_CONTROL       = 0x08,
  29         TPC_P0            = 0x0c,
  30         TPC_P1            = 0x10,
  31         TPC               = 0x14,
  32         HOST_CONTROL      = 0x18,
  33         DATA              = 0x1c,
  34         STATUS            = 0x20,
  35         INT_STATUS        = 0x24,
  36         INT_STATUS_ENABLE = 0x28,
  37         INT_SIGNAL_ENABLE = 0x2c,
  38         TIMER             = 0x30,
  39         TIMER_CONTROL     = 0x34,
  40         PAD_OUTPUT_ENABLE = 0x38,
  41         PAD_PU_PD         = 0x3c,
  42         CLOCK_DELAY       = 0x40,
  43         ADMA_ADDRESS      = 0x44,
  44         CLOCK_CONTROL     = 0x48,
  45         LED_CONTROL       = 0x4c,
  46         VERSION           = 0x50
  47 };
  48
  49 struct jmb38x_ms_host {
  50         struct jmb38x_ms        *chip;
  51         void __iomem            *addr;
  52         spinlock_t              lock;
  53         struct tasklet_struct   notify;
  54         int                     id;
  55         char                    host_id[32];
  56         int                     irq;
  57         unsigned int            block_pos;
  58         unsigned long           timeout_jiffies;
  59         struct timer_list       timer;
  60         struct memstick_request *req;
  61         unsigned char           cmd_flags;
  62         unsigned char           io_pos;
  63         unsigned int            io_word[2];
  64 };
  65
  66 struct jmb38x_ms {
  67         struct pci_dev        *pdev;
  68         int                   host_cnt;
  69         struct memstick_host  *hosts[];
  70 };
  71
  72 #define BLOCK_COUNT_MASK       0xffff0000
  73 #define BLOCK_SIZE_MASK        0x00000fff
  74
  75 #define DMA_CONTROL_ENABLE     0x00000001
  76
  77 #define TPC_DATA_SEL           0x00008000
  78 #define TPC_DIR                0x00004000
  79 #define TPC_WAIT_INT           0x00002000
  80 #define TPC_GET_INT            0x00000800
  81 #define TPC_CODE_SZ_MASK       0x00000700
  82 #define TPC_DATA_SZ_MASK       0x00000007
  83
  84 #define HOST_CONTROL_RESET_REQ 0x00008000
  85 #define HOST_CONTROL_REI       0x00004000
  86 #define HOST_CONTROL_LED       0x00000400
  87 #define HOST_CONTROL_FAST_CLK  0x00000200
  88 #define HOST_CONTROL_RESET     0x00000100
  89 #define HOST_CONTROL_POWER_EN  0x00000080
  90 #define HOST_CONTROL_CLOCK_EN  0x00000040
  91 #define HOST_CONTROL_IF_SHIFT  4
  92
  93 #define HOST_CONTROL_IF_SERIAL 0x0
  94 #define HOST_CONTROL_IF_PAR4   0x1
  95 #define HOST_CONTROL_IF_PAR8   0x3
  96
  97 #define STATUS_BUSY             0x00080000
  98 #define STATUS_MS_DAT7          0x00040000
  99 #define STATUS_MS_DAT6          0x00020000
 100 #define STATUS_MS_DAT5          0x00010000
 101 #define STATUS_MS_DAT4          0x00008000
 102 #define STATUS_MS_DAT3          0x00004000
 103 #define STATUS_MS_DAT2          0x00002000
 104 #define STATUS_MS_DAT1          0x00001000
 105 #define STATUS_MS_DAT0          0x00000800
 106 #define STATUS_HAS_MEDIA        0x00000400
 107 #define STATUS_FIFO_EMPTY       0x00000200
 108 #define STATUS_FIFO_FULL        0x00000100
 109 #define STATUS_MS_CED           0x00000080
 110 #define STATUS_MS_ERR           0x00000040
 111 #define STATUS_MS_BRQ           0x00000020
 112 #define STATUS_MS_CNK           0x00000001
 113
 114 #define INT_STATUS_TPC_ERR      0x00080000
 115 #define INT_STATUS_CRC_ERR      0x00040000
 116 #define INT_STATUS_TIMER_TO     0x00020000
 117 #define INT_STATUS_HSK_TO       0x00010000
 118 #define INT_STATUS_ANY_ERR      0x00008000
 119 #define INT_STATUS_FIFO_WRDY    0x00000080
 120 #define INT_STATUS_FIFO_RRDY    0x00000040
 121 #define INT_STATUS_MEDIA_OUT    0x00000010
 122 #define INT_STATUS_MEDIA_IN     0x00000008
 123 #define INT_STATUS_DMA_BOUNDARY 0x00000004
 124 #define INT_STATUS_EOTRAN       0x00000002
 125 #define INT_STATUS_EOTPC        0x00000001
 126
 127 #define INT_STATUS_ALL          0x000f801f
 128
 129 #define PAD_OUTPUT_ENABLE_MS  0x0F3F
 130
 131 #define PAD_PU_PD_OFF         0x7FFF0000
 132 #define PAD_PU_PD_ON_MS_SOCK0 0x5f8f0000
 133 #define PAD_PU_PD_ON_MS_SOCK1 0x0f0f0000
 134
 135 #define CLOCK_CONTROL_40MHZ   0x00000001
 136 #define CLOCK_CONTROL_50MHZ   0x00000002
 137 #define CLOCK_CONTROL_60MHZ   0x00000008
 138 #define CLOCK_CONTROL_62_5MHZ 0x0000000c
 139 #define CLOCK_CONTROL_OFF     0x00000000
 140
 141 enum {
 142         CMD_READY    = 0x01,
 143         FIFO_READY   = 0x02,
 144         REG_DATA     = 0x04,
 145         DMA_DATA     = 0x08
 146 };
 147
 148 static unsigned int jmb38x_ms_read_data(struct jmb38x_ms_host *host,
 149                                         unsigned char *buf, unsigned int length)
 150 {
 151         unsigned int off = 0;
 152
 153         while (host->io_pos && length) {
 154                 buf[off++] = host->io_word[0] & 0xff;
 155                 host->io_word[0] >>= 8;
 156                 length--;
 157                 host->io_pos--;
 158         }
 159
 160         if (!length)
 161                 return off;
 162
 163         while (!(STATUS_FIFO_EMPTY & readl(host->addr + STATUS))) {
 164                 if (length < 4)
 165                         break;
 166                 *(unsigned int *)(buf + off) = __raw_readl(host->addr + DATA);
 167                 length -= 4;
 168                 off += 4;
 169         }
 170
 171         if (length
 172             && !(STATUS_FIFO_EMPTY & readl(host->addr + STATUS))) {
 173                 host->io_word[0] = readl(host->addr + DATA);
 174                 for (host->io_pos = 4; host->io_pos; --host->io_pos) {
 175                         buf[off++] = host->io_word[0] & 0xff;
 176                         host->io_word[0] >>= 8;
 177                         length--;
 178                         if (!length)
 179                                 break;
 180                 }
 181         }
 182
 183         return off;
 184 }
 185
 186 static unsigned int jmb38x_ms_read_reg_data(struct jmb38x_ms_host *host,
 187                                             unsigned char *buf,
 188                                             unsigned int length)
 189 {
 190         unsigned int off = 0;
 191
 192         while (host->io_pos > 4 && length) {
 193                 buf[off++] = host->io_word[0] & 0xff;
 194                 host->io_word[0] >>= 8;
 195                 length--;
 196                 host->io_pos--;
 197         }
 198
 199         if (!length)
 200                 return off;
 201
 202         while (host->io_pos && length) {
 203                 buf[off++] = host->io_word[1] & 0xff;
 204                 host->io_word[1] >>= 8;
 205                 length--;
 206                 host->io_pos--;
 207         }
 208
 209         return off;
 210 }
 211
 212 static unsigned int jmb38x_ms_write_data(struct jmb38x_ms_host *host,
 213                                          unsigned char *buf,
 214                                          unsigned int length)
 215 {
 216         unsigned int off = 0;
 217
 218         if (host->io_pos) {
 219                 while (host->io_pos < 4 && length) {
 220                         host->io_word[0] |=  buf[off++] << (host->io_pos * 8);
 221                         host->io_pos++;
 222                         length--;
 223                 }
 224         }
 225
 226         if (host->io_pos == 4
 227             && !(STATUS_FIFO_FULL & readl(host->addr + STATUS))) {
 228                 writel(host->io_word[0], host->addr + DATA);
 229                 host->io_pos = 0;
 230                 host->io_word[0] = 0;
 231         } else if (host->io_pos) {
 232                 return off;
 233         }
 234
 235         if (!length)
 236                 return off;
 237
 238         while (!(STATUS_FIFO_FULL & readl(host->addr + STATUS))) {
 239                 if (length < 4)
 240                         break;
 241
 242                 __raw_writel(*(unsigned int *)(buf + off),
 243                              host->addr + DATA);
 244                 length -= 4;
 245                 off += 4;
 246         }
 247
 248         switch (length) {
 249         case 3:
 250                 host->io_word[0] |= buf[off + 2] << 16;
 251                 host->io_pos++;
 252         case 2:
 253                 host->io_word[0] |= buf[off + 1] << 8;
 254                 host->io_pos++;
 255         case 1:
 256                 host->io_word[0] |= buf[off];
 257                 host->io_pos++;
 258         }
 259
 260         off += host->io_pos;
 261
 262         return off;
 263 }
 264
 265 static unsigned int jmb38x_ms_write_reg_data(struct jmb38x_ms_host *host,
 266                                              unsigned char *buf,
 267                                              unsigned int length)
 268 {
 269         unsigned int off = 0;
 270
 271         while (host->io_pos < 4 && length) {
 272                 host->io_word[0] &= ~(0xff << (host->io_pos * 8));
 273                 host->io_word[0] |=  buf[off++] << (host->io_pos * 8);
 274                 host->io_pos++;
 275                 length--;
 276         }
 277
 278         if (!length)
 279                 return off;
 280
 281         while (host->io_pos < 8 && length) {
 282                 host->io_word[1] &= ~(0xff << (host->io_pos * 8));
 283                 host->io_word[1] |=  buf[off++] << (host->io_pos * 8);
 284                 host->io_pos++;
 285                 length--;
 286         }
 287
 288         return off;
 289 }
 290
 291 static int jmb38x_ms_transfer_data(struct jmb38x_ms_host *host)
 292 {
 293         unsigned int length;
 294         unsigned int off;
 295         unsigned int t_size, p_cnt;
 296         unsigned char *buf;
 297         struct page *pg;
 298         unsigned long flags = 0;
 299
 300         if (host->req->long_data) {
 301                 length = host->req->sg.length - host->block_pos;
 302                 off = host->req->sg.offset + host->block_pos;
 303         } else {
 304                 length = host->req->data_len - host->block_pos;
 305                 off = 0;
 306         }
 307
 308         while (length) {
 309                 unsigned int uninitialized_var(p_off);
 310
 311                 if (host->req->long_data) {
 312                         pg = nth_page(sg_page(&host->req->sg),
 313                                       off >> PAGE_SHIFT);
 314                         p_off = offset_in_page(off);
 315                         p_cnt = PAGE_SIZE - p_off;
 316                         p_cnt = min(p_cnt, length);
 317
 318                         local_irq_save(flags);
 319                         buf = kmap_atomic(pg, KM_BIO_SRC_IRQ) + p_off;
 320                 } else {
 321                         buf = host->req->data + host->block_pos;
 322                         p_cnt = host->req->data_len - host->block_pos;
 323                 }
 324
 325                 if (host->req->data_dir == WRITE)
 326                         t_size = !(host->cmd_flags & REG_DATA)
 327                                  ? jmb38x_ms_write_data(host, buf, p_cnt)
 328                                  : jmb38x_ms_write_reg_data(host, buf, p_cnt);
 329                 else
 330                         t_size = !(host->cmd_flags & REG_DATA)
 331                                  ? jmb38x_ms_read_data(host, buf, p_cnt)
 332                                  : jmb38x_ms_read_reg_data(host, buf, p_cnt);
 333
 334                 if (host->req->long_data) {
 335                         kunmap_atomic(buf - p_off, KM_BIO_SRC_IRQ);
 336                         local_irq_restore(flags);
 337                 }
 338
 339                 if (!t_size)
 340                         break;
 341                 host->block_pos += t_size;
 342                 length -= t_size;
 343                 off += t_size;
 344         }
 345
 346         if (!length && host->req->data_dir == WRITE) {
 347                 if (host->cmd_flags & REG_DATA) {
 348                         writel(host->io_word[0], host->addr + TPC_P0);
 349                         writel(host->io_word[1], host->addr + TPC_P1);
 350                 } else if (host->io_pos) {
 351                         writel(host->io_word[0], host->addr + DATA);
 352                 }
 353         }
 354
 355         return length;
 356 }
 357
 358 static int jmb38x_ms_issue_cmd(struct memstick_host *msh)
 359 {
 360         struct jmb38x_ms_host *host = memstick_priv(msh);
 361         unsigned char *data;
 362         unsigned int data_len, cmd, t_val;
 363
 364         if (!(STATUS_HAS_MEDIA & readl(host->addr + STATUS))) {
 365                 dev_dbg(&msh->dev, "no media status\n");
 366                 host->req->error = -ETIME;
 367                 return host->req->error;
 368         }
 369
 370         dev_dbg(&msh->dev, "control %08x\n",
 371                 readl(host->addr + HOST_CONTROL));
 372         dev_dbg(&msh->dev, "status %08x\n", readl(host->addr + INT_STATUS));
 373         dev_dbg(&msh->dev, "hstatus %08x\n", readl(host->addr + STATUS));
 374
 375         host->cmd_flags = 0;
 376         host->block_pos = 0;
 377         host->io_pos = 0;
 378         host->io_word[0] = 0;
 379         host->io_word[1] = 0;
 380
 381         cmd = host->req->tpc << 16;
 382         cmd |= TPC_DATA_SEL;
 383
 384         if (host->req->data_dir == READ)
 385                 cmd |= TPC_DIR;
 386         if (host->req->need_card_int)
 387                 cmd |= TPC_WAIT_INT;
 388
 389         data = host->req->data;
 390
 391         if (!no_dma)
 392                 host->cmd_flags |= DMA_DATA;
 393
 394         if (host->req->long_data) {
 395                 data_len = host->req->sg.length;
 396         } else {
 397                 data_len = host->req->data_len;
 398                 host->cmd_flags &= ~DMA_DATA;
 399         }
 400
 401         if (data_len <= 8) {
 402                 cmd &= ~(TPC_DATA_SEL | 0xf);
 403                 host->cmd_flags |= REG_DATA;
 404                 cmd |= data_len & 0xf;
 405                 host->cmd_flags &= ~DMA_DATA;
 406         }
 407
 408         if (host->cmd_flags & DMA_DATA) {
 409                 if (1 != pci_map_sg(host->chip->pdev, &host->req->sg, 1,
 410                                     host->req->data_dir == READ
 411                                     ? PCI_DMA_FROMDEVICE
 412                                     : PCI_DMA_TODEVICE)) {
 413                         host->req->error = -ENOMEM;
 414                         return host->req->error;
 415                 }
 416                 data_len = sg_dma_len(&host->req->sg);
 417                 writel(sg_dma_address(&host->req->sg),
 418                        host->addr + DMA_ADDRESS);
 419                 writel(((1 << 16) & BLOCK_COUNT_MASK)
 420                        | (data_len & BLOCK_SIZE_MASK),
 421                        host->addr + BLOCK);
 422                 writel(DMA_CONTROL_ENABLE, host->addr + DMA_CONTROL);
 423         } else if (!(host->cmd_flags & REG_DATA)) {
 424                 writel(((1 << 16) & BLOCK_COUNT_MASK)
 425                        | (data_len & BLOCK_SIZE_MASK),
 426                        host->addr + BLOCK);
 427                         t_val = readl(host->addr + INT_STATUS_ENABLE);
 428                         t_val |= host->req->data_dir == READ
 429                                  ? INT_STATUS_FIFO_RRDY
 430                                  : INT_STATUS_FIFO_WRDY;
 431
 432                         writel(t_val, host->addr + INT_STATUS_ENABLE);
 433                         writel(t_val, host->addr + INT_SIGNAL_ENABLE);
 434         } else {
 435                 cmd &= ~(TPC_DATA_SEL | 0xf);
 436                 host->cmd_flags |= REG_DATA;
 437                 cmd |= data_len & 0xf;
 438
 439                 if (host->req->data_dir == WRITE) {
 440                         jmb38x_ms_transfer_data(host);
 441                         writel(host->io_word[0], host->addr + TPC_P0);
 442                         writel(host->io_word[1], host->addr + TPC_P1);
 443                 }
 444         }
 445
 446         mod_timer(&host->timer, jiffies + host->timeout_jiffies);
 447         writel(HOST_CONTROL_LED | readl(host->addr + HOST_CONTROL),
 448                host->addr + HOST_CONTROL);
 449         host->req->error = 0;
 450
 451         writel(cmd, host->addr + TPC);
 452         dev_dbg(&msh->dev, "executing TPC %08x, len %x\n", cmd, data_len);
 453
 454         return 0;
 455 }
 456
 457 static void jmb38x_ms_complete_cmd(struct memstick_host *msh, int last)
 458 {
 459         struct jmb38x_ms_host *host = memstick_priv(msh);
 460         unsigned int t_val = 0;
 461         int rc;
 462
 463         del_timer(&host->timer);
 464
 465         dev_dbg(&msh->dev, "c control %08x\n",
 466                 readl(host->addr + HOST_CONTROL));
 467         dev_dbg(&msh->dev, "c status %08x\n",
 468                 readl(host->addr + INT_STATUS));
 469         dev_dbg(&msh->dev, "c hstatus %08x\n", readl(host->addr + STATUS));
 470
 471         host->req->int_reg = readl(host->addr + STATUS) & 0xff;
 472
 473         writel(0, host->addr + BLOCK);
 474         writel(0, host->addr + DMA_CONTROL);
 475
 476         if (host->cmd_flags & DMA_DATA) {
 477                 pci_unmap_sg(host->chip->pdev, &host->req->sg, 1,
 478                              host->req->data_dir == READ
 479                              ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
 480         } else {
 481                 t_val = readl(host->addr + INT_STATUS_ENABLE);
 482                 if (host->req->data_dir == READ)
 483                         t_val &= ~INT_STATUS_FIFO_RRDY;
 484                 else
 485                         t_val &= ~INT_STATUS_FIFO_WRDY;
 486
 487                 writel(t_val, host->addr + INT_STATUS_ENABLE);
 488                 writel(t_val, host->addr + INT_SIGNAL_ENABLE);
 489         }
 490
 491         writel((~HOST_CONTROL_LED) & readl(host->addr + HOST_CONTROL),
 492                host->addr + HOST_CONTROL);
 493
 494         if (!last) {
 495                 do {
 496                         rc = memstick_next_req(msh, &host->req);
 497                 } while (!rc && jmb38x_ms_issue_cmd(msh));
 498         } else {
 499                 do {
 500                         rc = memstick_next_req(msh, &host->req);
 501                         if (!rc)
 502                                 host->req->error = -ETIME;
 503                 } while (!rc);
 504         }
 505 }
 506
 507 static irqreturn_t jmb38x_ms_isr(int irq, void *dev_id)
 508 {
 509         struct memstick_host *msh = dev_id;
 510         struct jmb38x_ms_host *host = memstick_priv(msh);
 511         unsigned int irq_status;
 512
 513         spin_lock(&host->lock);
 514         irq_status = readl(host->addr + INT_STATUS);
 515         dev_dbg(&host->chip->pdev->dev, "irq_status = %08x\n", irq_status);
 516         if (irq_status == 0 || irq_status == (~0)) {
 517                 spin_unlock(&host->lock);
 518                 return IRQ_NONE;
 519         }
 520
 521         if (host->req) {
 522                 if (irq_status & INT_STATUS_ANY_ERR) {
 523                         if (irq_status & INT_STATUS_CRC_ERR)
 524                                 host->req->error = -EILSEQ;
 525                         else
 526                                 host->req->error = -ETIME;
 527                 } else {
 528                         if (host->cmd_flags & DMA_DATA) {
 529                                 if (irq_status & INT_STATUS_EOTRAN)
 530                                         host->cmd_flags |= FIFO_READY;
 531                         } else {
 532                                 if (irq_status & (INT_STATUS_FIFO_RRDY
 533                                                   | INT_STATUS_FIFO_WRDY))
 534                                         jmb38x_ms_transfer_data(host);
 535
 536                                 if (irq_status & INT_STATUS_EOTRAN) {
 537                                         jmb38x_ms_transfer_data(host);
 538                                         host->cmd_flags |= FIFO_READY;
 539                                 }
 540                         }
 541
 542                         if (irq_status & INT_STATUS_EOTPC) {
 543                                 host->cmd_flags |= CMD_READY;
 544                                 if (host->cmd_flags & REG_DATA) {
 545                                         if (host->req->data_dir == READ) {
 546                                                 host->io_word[0]
 547                                                         = readl(host->addr
 548                                                                 + TPC_P0);
 549                                                 host->io_word[1]
 550                                                         = readl(host->addr
 551                                                                 + TPC_P1);
 552                                                 host->io_pos = 8;
 553
 554                                                 jmb38x_ms_transfer_data(host);
 555                                         }
 556                                         host->cmd_flags |= FIFO_READY;
 557                                 }
 558                         }
 559                 }
 560         }
 561
 562         if (irq_status & (INT_STATUS_MEDIA_IN | INT_STATUS_MEDIA_OUT)) {
 563                 dev_dbg(&host->chip->pdev->dev, "media changed\n");
 564                 memstick_detect_change(msh);
 565         }
 566
 567         writel(irq_status, host->addr + INT_STATUS);
 568
 569         if (host->req
 570             && (((host->cmd_flags & CMD_READY)
 571                  && (host->cmd_flags & FIFO_READY))
 572                 || host->req->error))
 573                 jmb38x_ms_complete_cmd(msh, 0);
 574
 575         spin_unlock(&host->lock);
 576         return IRQ_HANDLED;
 577 }
 578
 579 static void jmb38x_ms_abort(unsigned long data)
 580 {
 581         struct memstick_host *msh = (struct memstick_host *)data;
 582         struct jmb38x_ms_host *host = memstick_priv(msh);
 583         unsigned long flags;
 584
 585         dev_dbg(&host->chip->pdev->dev, "abort\n");
 586         spin_lock_irqsave(&host->lock, flags);
 587         if (host->req) {
 588                 host->req->error = -ETIME;
 589                 jmb38x_ms_complete_cmd(msh, 0);
 590         }
 591         spin_unlock_irqrestore(&host->lock, flags);
 592 }
 593
 594 static void jmb38x_ms_req_tasklet(unsigned long data)
 595 {
 596         struct memstick_host *msh = (struct memstick_host *)data;
 597         struct jmb38x_ms_host *host = memstick_priv(msh);
 598         unsigned long flags;
 599         int rc;
 600
 601         spin_lock_irqsave(&host->lock, flags);
 602         if (!host->req) {
 603                 do {
 604                         rc = memstick_next_req(msh, &host->req);
 605                         dev_dbg(&host->chip->pdev->dev, "tasklet req %d\n", rc);
 606                 } while (!rc && jmb38x_ms_issue_cmd(msh));
 607         }
 608         spin_unlock_irqrestore(&host->lock, flags);
 609 }
 610
 611 static void jmb38x_ms_dummy_submit(struct memstick_host *msh)
 612 {
 613         return;
 614 }
 615
 616 static void jmb38x_ms_submit_req(struct memstick_host *msh)
 617 {
 618         struct jmb38x_ms_host *host = memstick_priv(msh);
 619
 620         tasklet_schedule(&host->notify);
 621 }
 622
 623 static int jmb38x_ms_reset(struct jmb38x_ms_host *host)
 624 {
 625         int cnt;
 626
 627         writel(HOST_CONTROL_RESET_REQ | HOST_CONTROL_CLOCK_EN
 628                | readl(host->addr + HOST_CONTROL),
 629                host->addr + HOST_CONTROL);
 630         mmiowb();
 631
 632         for (cnt = 0; cnt < 20; ++cnt) {
 633                 if (!(HOST_CONTROL_RESET_REQ
 634                       & readl(host->addr + HOST_CONTROL)))
 635                         goto reset_next;
 636
 637                 ndelay(20);
 638         }
 639         dev_dbg(&host->chip->pdev->dev, "reset_req timeout\n");
 640         return -EIO;
 641
 642 reset_next:
 643         writel(HOST_CONTROL_RESET | HOST_CONTROL_CLOCK_EN
 644                | readl(host->addr + HOST_CONTROL),
 645                host->addr + HOST_CONTROL);
 646         mmiowb();
 647
 648         for (cnt = 0; cnt < 20; ++cnt) {
 649                 if (!(HOST_CONTROL_RESET
 650                       & readl(host->addr + HOST_CONTROL)))
 651                         goto reset_ok;
 652
 653                 ndelay(20);
 654         }
 655         dev_dbg(&host->chip->pdev->dev, "reset timeout\n");
 656         return -EIO;
 657
 658 reset_ok:
 659         mmiowb();
 660         writel(INT_STATUS_ALL, host->addr + INT_SIGNAL_ENABLE);
 661         writel(INT_STATUS_ALL, host->addr + INT_STATUS_ENABLE);
 662         return 0;
 663 }
 664
 665 static int jmb38x_ms_set_param(struct memstick_host *msh,
 666                                enum memstick_param param,
 667                                int value)
 668 {
 669         struct jmb38x_ms_host *host = memstick_priv(msh);
 670         unsigned int host_ctl = readl(host->addr + HOST_CONTROL);
 671         unsigned int clock_ctl = CLOCK_CONTROL_40MHZ, clock_delay = 0;
 672         int rc = 0;
 673
 674         switch (param) {
 675         case MEMSTICK_POWER:
 676                 if (value == MEMSTICK_POWER_ON) {
 677                         rc = jmb38x_ms_reset(host);
 678                         if (rc)
 679                                 return rc;
 680
 681                         host_ctl = 7;
 682                         host_ctl |= HOST_CONTROL_POWER_EN
 683                                  | HOST_CONTROL_CLOCK_EN;
 684                         writel(host_ctl, host->addr + HOST_CONTROL);
 685
 686                         writel(host->id ? PAD_PU_PD_ON_MS_SOCK1
 687                                         : PAD_PU_PD_ON_MS_SOCK0,
 688                                host->addr + PAD_PU_PD);
 689
 690                         writel(PAD_OUTPUT_ENABLE_MS,
 691                                host->addr + PAD_OUTPUT_ENABLE);
 692
 693                         msleep(10);
 694                         dev_dbg(&host->chip->pdev->dev, "power on\n");
 695                 } else if (value == MEMSTICK_POWER_OFF) {
 696                         host_ctl &= ~(HOST_CONTROL_POWER_EN
 697                                       | HOST_CONTROL_CLOCK_EN);
 698                         writel(host_ctl, host->addr +  HOST_CONTROL);
 699                         writel(0, host->addr + PAD_OUTPUT_ENABLE);
 700                         writel(PAD_PU_PD_OFF, host->addr + PAD_PU_PD);
 701                         dev_dbg(&host->chip->pdev->dev, "power off\n");
 702                 } else
 703                         return -EINVAL;
 704                 break;
 705         case MEMSTICK_INTERFACE:
 706                 host_ctl &= ~(3 << HOST_CONTROL_IF_SHIFT);
 707
 708                 if (value == MEMSTICK_SERIAL) {
 709                         host_ctl &= ~HOST_CONTROL_FAST_CLK;
 710                         host_ctl |= HOST_CONTROL_IF_SERIAL
 711                                     << HOST_CONTROL_IF_SHIFT;
 712                         host_ctl |= HOST_CONTROL_REI;
 713                         clock_ctl = CLOCK_CONTROL_40MHZ;
 714                         clock_delay = 0;
 715                 } else if (value == MEMSTICK_PAR4) {
 716                         host_ctl |= HOST_CONTROL_FAST_CLK;
 717                         host_ctl |= HOST_CONTROL_IF_PAR4
 718                                     << HOST_CONTROL_IF_SHIFT;
 719                         host_ctl &= ~HOST_CONTROL_REI;
 720                         clock_ctl = CLOCK_CONTROL_40MHZ;
 721                         clock_delay = 4;
 722                 } else if (value == MEMSTICK_PAR8) {
 723                         host_ctl |= HOST_CONTROL_FAST_CLK;
 724                         host_ctl |= HOST_CONTROL_IF_PAR8
 725                                     << HOST_CONTROL_IF_SHIFT;
 726                         host_ctl &= ~HOST_CONTROL_REI;
 727                         clock_ctl = CLOCK_CONTROL_60MHZ;
 728                         clock_delay = 0;
 729                 } else
 730                         return -EINVAL;
 731                 writel(host_ctl, host->addr + HOST_CONTROL);
 732                 writel(clock_ctl, host->addr + CLOCK_CONTROL);
 733                 writel(clock_delay, host->addr + CLOCK_DELAY);
 734                 break;
 735         };
 736         return 0;
 737 }
 738
 739 #ifdef CONFIG_PM
 740
 741 static int jmb38x_ms_suspend(struct pci_dev *dev, pm_message_t state)
 742 {
 743         struct jmb38x_ms *jm = pci_get_drvdata(dev);
 744         int cnt;
 745
 746         for (cnt = 0; cnt < jm->host_cnt; ++cnt) {
 747                 if (!jm->hosts[cnt])
 748                         break;
 749                 memstick_suspend_host(jm->hosts[cnt]);
 750         }
 751
 752         pci_save_state(dev);
 753         pci_enable_wake(dev, pci_choose_state(dev, state), 0);
 754         pci_disable_device(dev);
 755         pci_set_power_state(dev, pci_choose_state(dev, state));
 756         return 0;
 757 }
 758
 759 static int jmb38x_ms_resume(struct pci_dev *dev)
 760 {
 761         struct jmb38x_ms *jm = pci_get_drvdata(dev);
 762         int rc;
 763
 764         pci_set_power_state(dev, PCI_D0);
 765         pci_restore_state(dev);
 766         rc = pci_enable_device(dev);
 767         if (rc)
 768                 return rc;
 769         pci_set_master(dev);
 770
 771         pci_read_config_dword(dev, 0xac, &rc);
 772         pci_write_config_dword(dev, 0xac, rc | 0x00470000);
 773
 774         for (rc = 0; rc < jm->host_cnt; ++rc) {
 775                 if (!jm->hosts[rc])
 776                         break;
 777                 memstick_resume_host(jm->hosts[rc]);
 778                 memstick_detect_change(jm->hosts[rc]);
 779         }
 780
 781         return 0;
 782 }
 783
 784 #else
 785
 786 #define jmb38x_ms_suspend NULL
 787 #define jmb38x_ms_resume NULL
 788
 789 #endif /* CONFIG_PM */
 790
 791 static int jmb38x_ms_count_slots(struct pci_dev *pdev)
 792 {
 793         int cnt, rc = 0;
 794
 795         for (cnt = 0; cnt < PCI_ROM_RESOURCE; ++cnt) {
 796                 if (!(IORESOURCE_MEM & pci_resource_flags(pdev, cnt)))
 797                         break;
 798
 799                 if (256 != pci_resource_len(pdev, cnt))
 800                         break;
 801
 802                 ++rc;
 803         }
 804         return rc;
 805 }
 806
 807 static struct memstick_host *jmb38x_ms_alloc_host(struct jmb38x_ms *jm, int cnt)
 808 {
 809         struct memstick_host *msh;
 810         struct jmb38x_ms_host *host;
 811
 812         msh = memstick_alloc_host(sizeof(struct jmb38x_ms_host),
 813                                   &jm->pdev->dev);
 814         if (!msh)
 815                 return NULL;
 816
 817         host = memstick_priv(msh);
 818         host->chip = jm;
 819         host->addr = ioremap(pci_resource_start(jm->pdev, cnt),
 820                              pci_resource_len(jm->pdev, cnt));
 821         if (!host->addr)
 822                 goto err_out_free;
 823
 824         spin_lock_init(&host->lock);
 825         host->id = cnt;
 826         snprintf(host->host_id, sizeof(host->host_id), DRIVER_NAME ":slot%d",
 827                  host->id);
 828         host->irq = jm->pdev->irq;
 829         host->timeout_jiffies = msecs_to_jiffies(1000);
 830
 831         tasklet_init(&host->notify, jmb38x_ms_req_tasklet, (unsigned long)msh);
 832         msh->request = jmb38x_ms_submit_req;
 833         msh->set_param = jmb38x_ms_set_param;
 834
 835         msh->caps = MEMSTICK_CAP_PAR4 | MEMSTICK_CAP_PAR8;
 836
 837         setup_timer(&host->timer, jmb38x_ms_abort, (unsigned long)msh);
 838
 839         if (!request_irq(host->irq, jmb38x_ms_isr, IRQF_SHARED, host->host_id,
 840                          msh))
 841                 return msh;
 842
 843         iounmap(host->addr);
 844 err_out_free:
 845         kfree(msh);
 846         return NULL;
 847 }
 848
 849 static void jmb38x_ms_free_host(struct memstick_host *msh)
 850 {
 851         struct jmb38x_ms_host *host = memstick_priv(msh);
 852
 853         free_irq(host->irq, msh);
 854         iounmap(host->addr);
 855         memstick_free_host(msh);
 856 }
 857
 858 static int jmb38x_ms_probe(struct pci_dev *pdev,
 859                            const struct pci_device_id *dev_id)
 860 {
 861         struct jmb38x_ms *jm;
 862         int pci_dev_busy = 0;
 863         int rc, cnt;
 864
 865         rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
 866         if (rc)
 867                 return rc;
 868
 869         rc = pci_enable_device(pdev);
 870         if (rc)
 871                 return rc;
 872
 873         pci_set_master(pdev);
 874
 875         rc = pci_request_regions(pdev, DRIVER_NAME);
 876         if (rc) {
 877                 pci_dev_busy = 1;
 878                 goto err_out;
 879         }
 880
 881         pci_read_config_dword(pdev, 0xac, &rc);
 882         pci_write_config_dword(pdev, 0xac, rc | 0x00470000);
 883
 884         cnt = jmb38x_ms_count_slots(pdev);
 885         if (!cnt) {
 886                 rc = -ENODEV;
 887                 pci_dev_busy = 1;
 888                 goto err_out;
 889         }
 890
 891         jm = kzalloc(sizeof(struct jmb38x_ms)
 892                      + cnt * sizeof(struct memstick_host *), GFP_KERNEL);
 893         if (!jm) {
 894                 rc = -ENOMEM;
 895                 goto err_out_int;
 896         }
 897
 898         jm->pdev = pdev;
 899         jm->host_cnt = cnt;
 900         pci_set_drvdata(pdev, jm);
 901
 902         for (cnt = 0; cnt < jm->host_cnt; ++cnt) {
 903                 jm->hosts[cnt] = jmb38x_ms_alloc_host(jm, cnt);
 904                 if (!jm->hosts[cnt])
 905                         break;
 906
 907                 rc = memstick_add_host(jm->hosts[cnt]);
 908
 909                 if (rc) {
 910                         jmb38x_ms_free_host(jm->hosts[cnt]);
 911                         jm->hosts[cnt] = NULL;
 912                         break;
 913                 }
 914         }
 915
 916         if (cnt)
 917                 return 0;
 918
 919         rc = -ENODEV;
 920
 921         pci_set_drvdata(pdev, NULL);
 922         kfree(jm);
 923 err_out_int:
 924         pci_release_regions(pdev);
 925 err_out:
 926         if (!pci_dev_busy)
 927                 pci_disable_device(pdev);
 928         return rc;
 929 }
 930
 931 static void jmb38x_ms_remove(struct pci_dev *dev)
 932 {
 933         struct jmb38x_ms *jm = pci_get_drvdata(dev);
 934         struct jmb38x_ms_host *host;
 935         int cnt;
 936         unsigned long flags;
 937
 938         for (cnt = 0; cnt < jm->host_cnt; ++cnt) {
 939                 if (!jm->hosts[cnt])
 940                         break;
 941
 942                 host = memstick_priv(jm->hosts[cnt]);
 943
 944                 jm->hosts[cnt]->request = jmb38x_ms_dummy_submit;
 945                 tasklet_kill(&host->notify);
 946                 writel(0, host->addr + INT_SIGNAL_ENABLE);
 947                 writel(0, host->addr + INT_STATUS_ENABLE);
 948                 mmiowb();
 949                 dev_dbg(&jm->pdev->dev, "interrupts off\n");
 950                 spin_lock_irqsave(&host->lock, flags);
 951                 if (host->req) {
 952                         host->req->error = -ETIME;
 953                         jmb38x_ms_complete_cmd(jm->hosts[cnt], 1);
 954                 }
 955                 spin_unlock_irqrestore(&host->lock, flags);
 956
 957                 memstick_remove_host(jm->hosts[cnt]);
 958                 dev_dbg(&jm->pdev->dev, "host removed\n");
 959
 960                 jmb38x_ms_free_host(jm->hosts[cnt]);
 961         }
 962
 963         pci_set_drvdata(dev, NULL);
 964         pci_release_regions(dev);
 965         pci_disable_device(dev);
 966         kfree(jm);
 967 }
 968
 969 static struct pci_device_id jmb38x_ms_id_tbl [] = {
 970         { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB38X_MS, PCI_ANY_ID,
 971           PCI_ANY_ID, 0, 0, 0 },
 972         { }
 973 };
 974
 975 static struct pci_driver jmb38x_ms_driver = {
 976         .name = DRIVER_NAME,
 977         .id_table = jmb38x_ms_id_tbl,
 978         .probe = jmb38x_ms_probe,
 979         .remove = jmb38x_ms_remove,
 980         .suspend = jmb38x_ms_suspend,
 981         .resume = jmb38x_ms_resume
 982 };
 983
 984 static int __init jmb38x_ms_init(void)
 985 {
 986         return pci_register_driver(&jmb38x_ms_driver);
 987 }
 988
 989 static void __exit jmb38x_ms_exit(void)
 990 {
 991         pci_unregister_driver(&jmb38x_ms_driver);
 992 }
 993
 994 MODULE_AUTHOR("Alex Dubov");
 995 MODULE_DESCRIPTION("JMicron jmb38x MemoryStick driver");
 996 MODULE_LICENSE("GPL");
 997 MODULE_DEVICE_TABLE(pci, jmb38x_ms_id_tbl);
 998
 999 module_init(jmb38x_ms_init);
1000 module_exit(jmb38x_ms_exit);