2 * Register definition file for Samsung Camera Interface (FIMC) driver
4 * Copyright (c) 2010 Samsung Electronics
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
14 /* Input source format */
15 #define S5P_CISRCFMT 0x00
16 #define S5P_CISRCFMT_ITU601_8BIT (1 << 31)
17 #define S5P_CISRCFMT_ITU601_16BIT (1 << 29)
18 #define S5P_CISRCFMT_ORDER422_YCBYCR (0 << 14)
19 #define S5P_CISRCFMT_ORDER422_YCRYCB (1 << 14)
20 #define S5P_CISRCFMT_ORDER422_CBYCRY (2 << 14)
21 #define S5P_CISRCFMT_ORDER422_CRYCBY (3 << 14)
22 #define S5P_CISRCFMT_HSIZE(x) ((x) << 16)
23 #define S5P_CISRCFMT_VSIZE(x) ((x) << 0)
26 #define S5P_CIWDOFST 0x04
27 #define S5P_CIWDOFST_OFF_EN (1 << 31)
28 #define S5P_CIWDOFST_CLROVFIY (1 << 30)
29 #define S5P_CIWDOFST_CLROVRLB (1 << 29)
30 #define S5P_CIWDOFST_HOROFF_MASK (0x7ff << 16)
31 #define S5P_CIWDOFST_CLROVFICB (1 << 15)
32 #define S5P_CIWDOFST_CLROVFICR (1 << 14)
33 #define S5P_CIWDOFST_HOROFF(x) ((x) << 16)
34 #define S5P_CIWDOFST_VEROFF(x) ((x) << 0)
35 #define S5P_CIWDOFST_VEROFF_MASK (0xfff << 0)
38 #define S5P_CIGCTRL 0x08
39 #define S5P_CIGCTRL_SWRST (1 << 31)
40 #define S5P_CIGCTRL_CAMRST_A (1 << 30)
41 #define S5P_CIGCTRL_SELCAM_ITU_A (1 << 29)
42 #define S5P_CIGCTRL_TESTPAT_NORMAL (0 << 27)
43 #define S5P_CIGCTRL_TESTPAT_COLOR_BAR (1 << 27)
44 #define S5P_CIGCTRL_TESTPAT_HOR_INC (2 << 27)
45 #define S5P_CIGCTRL_TESTPAT_VER_INC (3 << 27)
46 #define S5P_CIGCTRL_TESTPAT_MASK (3 << 27)
47 #define S5P_CIGCTRL_TESTPAT_SHIFT (27)
48 #define S5P_CIGCTRL_INVPOLPCLK (1 << 26)
49 #define S5P_CIGCTRL_INVPOLVSYNC (1 << 25)
50 #define S5P_CIGCTRL_INVPOLHREF (1 << 24)
51 #define S5P_CIGCTRL_IRQ_OVFEN (1 << 22)
52 #define S5P_CIGCTRL_HREF_MASK (1 << 21)
53 #define S5P_CIGCTRL_IRQ_LEVEL (1 << 20)
54 #define S5P_CIGCTRL_IRQ_CLR (1 << 19)
55 #define S5P_CIGCTRL_IRQ_ENABLE (1 << 16)
56 #define S5P_CIGCTRL_SHDW_DISABLE (1 << 12)
57 #define S5P_CIGCTRL_SELCAM_MIPI_A (1 << 7)
58 #define S5P_CIGCTRL_CAMIF_SELWB (1 << 6)
59 /* 0 - ITU601; 1 - ITU709 */
60 #define S5P_CIGCTRL_CSC_ITU601_709 (1 << 5)
61 #define S5P_CIGCTRL_INVPOLHSYNC (1 << 4)
62 #define S5P_CIGCTRL_SELCAM_MIPI (1 << 3)
63 #define S5P_CIGCTRL_INTERLACE (1 << 0)
66 #define S5P_CIWDOFST2 0x14
67 #define S5P_CIWDOFST2_HOROFF_MASK (0xfff << 16)
68 #define S5P_CIWDOFST2_VEROFF_MASK (0xfff << 0)
69 #define S5P_CIWDOFST2_HOROFF(x) ((x) << 16)
70 #define S5P_CIWDOFST2_VEROFF(x) ((x) << 0)
72 /* Output DMA Y/Cb/Cr plane start addresses */
73 #define S5P_CIOYSA(n) (0x18 + (n) * 4)
74 #define S5P_CIOCBSA(n) (0x28 + (n) * 4)
75 #define S5P_CIOCRSA(n) (0x38 + (n) * 4)
77 /* Target image format */
78 #define S5P_CITRGFMT 0x48
79 #define S5P_CITRGFMT_INROT90 (1 << 31)
80 #define S5P_CITRGFMT_YCBCR420 (0 << 29)
81 #define S5P_CITRGFMT_YCBCR422 (1 << 29)
82 #define S5P_CITRGFMT_YCBCR422_1P (2 << 29)
83 #define S5P_CITRGFMT_RGB (3 << 29)
84 #define S5P_CITRGFMT_FMT_MASK (3 << 29)
85 #define S5P_CITRGFMT_HSIZE_MASK (0xfff << 16)
86 #define S5P_CITRGFMT_FLIP_SHIFT (14)
87 #define S5P_CITRGFMT_FLIP_NORMAL (0 << 14)
88 #define S5P_CITRGFMT_FLIP_X_MIRROR (1 << 14)
89 #define S5P_CITRGFMT_FLIP_Y_MIRROR (2 << 14)
90 #define S5P_CITRGFMT_FLIP_180 (3 << 14)
91 #define S5P_CITRGFMT_FLIP_MASK (3 << 14)
92 #define S5P_CITRGFMT_OUTROT90 (1 << 13)
93 #define S5P_CITRGFMT_VSIZE_MASK (0xfff << 0)
94 #define S5P_CITRGFMT_HSIZE(x) ((x) << 16)
95 #define S5P_CITRGFMT_VSIZE(x) ((x) << 0)
97 /* Output DMA control */
98 #define S5P_CIOCTRL 0x4c
99 #define S5P_CIOCTRL_ORDER422_MASK (3 << 0)
100 #define S5P_CIOCTRL_ORDER422_CRYCBY (0 << 0)
101 #define S5P_CIOCTRL_ORDER422_YCRYCB (1 << 0)
102 #define S5P_CIOCTRL_ORDER422_CBYCRY (2 << 0)
103 #define S5P_CIOCTRL_ORDER422_YCBYCR (3 << 0)
104 #define S5P_CIOCTRL_LASTIRQ_ENABLE (1 << 2)
105 #define S5P_CIOCTRL_YCBCR_3PLANE (0 << 3)
106 #define S5P_CIOCTRL_YCBCR_2PLANE (1 << 3)
107 #define S5P_CIOCTRL_YCBCR_PLANE_MASK (1 << 3)
108 #define S5P_CIOCTRL_ORDER2P_SHIFT (24)
109 #define S5P_CIOCTRL_ORDER2P_MASK (3 << 24)
110 #define S5P_CIOCTRL_ORDER422_2P_LSB_CRCB (0 << 24)
112 /* Pre-scaler control 1 */
113 #define S5P_CISCPRERATIO 0x50
114 #define S5P_CISCPRERATIO_SHFACTOR(x) ((x) << 28)
115 #define S5P_CISCPRERATIO_HOR(x) ((x) << 16)
116 #define S5P_CISCPRERATIO_VER(x) ((x) << 0)
118 #define S5P_CISCPREDST 0x54
119 #define S5P_CISCPREDST_WIDTH(x) ((x) << 16)
120 #define S5P_CISCPREDST_HEIGHT(x) ((x) << 0)
122 /* Main scaler control */
123 #define S5P_CISCCTRL 0x58
124 #define S5P_CISCCTRL_SCALERBYPASS (1 << 31)
125 #define S5P_CISCCTRL_SCALEUP_H (1 << 30)
126 #define S5P_CISCCTRL_SCALEUP_V (1 << 29)
127 #define S5P_CISCCTRL_CSCR2Y_WIDE (1 << 28)
128 #define S5P_CISCCTRL_CSCY2R_WIDE (1 << 27)
129 #define S5P_CISCCTRL_LCDPATHEN_FIFO (1 << 26)
130 #define S5P_CISCCTRL_INTERLACE (1 << 25)
131 #define S5P_CISCCTRL_SCALERSTART (1 << 15)
132 #define S5P_CISCCTRL_INRGB_FMT_RGB565 (0 << 13)
133 #define S5P_CISCCTRL_INRGB_FMT_RGB666 (1 << 13)
134 #define S5P_CISCCTRL_INRGB_FMT_RGB888 (2 << 13)
135 #define S5P_CISCCTRL_INRGB_FMT_MASK (3 << 13)
136 #define S5P_CISCCTRL_OUTRGB_FMT_RGB565 (0 << 11)
137 #define S5P_CISCCTRL_OUTRGB_FMT_RGB666 (1 << 11)
138 #define S5P_CISCCTRL_OUTRGB_FMT_RGB888 (2 << 11)
139 #define S5P_CISCCTRL_OUTRGB_FMT_MASK (3 << 11)
140 #define S5P_CISCCTRL_RGB_EXT (1 << 10)
141 #define S5P_CISCCTRL_ONE2ONE (1 << 9)
142 #define S5P_CISCCTRL_SC_HORRATIO(x) ((x) << 16)
143 #define S5P_CISCCTRL_SC_VERRATIO(x) ((x) << 0)
146 #define S5P_CITAREA 0x5c
147 #define S5P_CITAREA_MASK 0x0fffffff
150 #define S5P_CISTATUS 0x64
151 #define S5P_CISTATUS_OVFIY (1 << 31)
152 #define S5P_CISTATUS_OVFICB (1 << 30)
153 #define S5P_CISTATUS_OVFICR (1 << 29)
154 #define S5P_CISTATUS_VSYNC (1 << 28)
155 #define S5P_CISTATUS_FRAMECNT_MASK (3 << 26)
156 #define S5P_CISTATUS_FRAMECNT_SHIFT 26
157 #define S5P_CISTATUS_WINOFF_EN (1 << 25)
158 #define S5P_CISTATUS_IMGCPT_EN (1 << 22)
159 #define S5P_CISTATUS_IMGCPT_SCEN (1 << 21)
160 #define S5P_CISTATUS_VSYNC_A (1 << 20)
161 #define S5P_CISTATUS_VSYNC_B (1 << 19)
162 #define S5P_CISTATUS_OVRLB (1 << 18)
163 #define S5P_CISTATUS_FRAME_END (1 << 17)
164 #define S5P_CISTATUS_LASTCAPT_END (1 << 16)
165 #define S5P_CISTATUS_VVALID_A (1 << 15)
166 #define S5P_CISTATUS_VVALID_B (1 << 14)
168 /* Image capture control */
169 #define S5P_CIIMGCPT 0xc0
170 #define S5P_CIIMGCPT_IMGCPTEN (1 << 31)
171 #define S5P_CIIMGCPT_IMGCPTEN_SC (1 << 30)
172 #define S5P_CIIMGCPT_CPT_FREN_ENABLE (1 << 25)
173 #define S5P_CIIMGCPT_CPT_FRMOD_CNT (1 << 18)
175 /* Frame capture sequence */
176 #define S5P_CICPTSEQ 0xc4
179 #define S5P_CIIMGEFF 0xd0
180 #define S5P_CIIMGEFF_IE_DISABLE (0 << 30)
181 #define S5P_CIIMGEFF_IE_ENABLE (1 << 30)
182 #define S5P_CIIMGEFF_IE_SC_BEFORE (0 << 29)
183 #define S5P_CIIMGEFF_IE_SC_AFTER (1 << 29)
184 #define S5P_CIIMGEFF_FIN_BYPASS (0 << 26)
185 #define S5P_CIIMGEFF_FIN_ARBITRARY (1 << 26)
186 #define S5P_CIIMGEFF_FIN_NEGATIVE (2 << 26)
187 #define S5P_CIIMGEFF_FIN_ARTFREEZE (3 << 26)
188 #define S5P_CIIMGEFF_FIN_EMBOSSING (4 << 26)
189 #define S5P_CIIMGEFF_FIN_SILHOUETTE (5 << 26)
190 #define S5P_CIIMGEFF_FIN_MASK (7 << 26)
191 #define S5P_CIIMGEFF_PAT_CBCR_MASK ((0xff < 13) | (0xff < 0))
192 #define S5P_CIIMGEFF_PAT_CB(x) ((x) << 13)
193 #define S5P_CIIMGEFF_PAT_CR(x) ((x) << 0)
195 /* Input DMA Y/Cb/Cr plane start address 0/1 */
196 #define S5P_CIIYSA(n) (0xd4 + (n) * 0x70)
197 #define S5P_CIICBSA(n) (0xd8 + (n) * 0x70)
198 #define S5P_CIICRSA(n) (0xdc + (n) * 0x70)
200 /* Real input DMA image size */
201 #define S5P_CIREAL_ISIZE 0xf8
202 #define S5P_CIREAL_ISIZE_AUTOLOAD_EN (1 << 31)
203 #define S5P_CIREAL_ISIZE_ADDR_CH_DIS (1 << 30)
204 #define S5P_CIREAL_ISIZE_HEIGHT(x) ((x) << 16)
205 #define S5P_CIREAL_ISIZE_WIDTH(x) ((x) << 0)
208 /* Input DMA control */
209 #define S5P_MSCTRL 0xfc
210 #define S5P_MSCTRL_IN_BURST_COUNT_MASK (3 << 24)
211 #define S5P_MSCTRL_2P_IN_ORDER_MASK (3 << 16)
212 #define S5P_MSCTRL_2P_IN_ORDER_SHIFT 16
213 #define S5P_MSCTRL_C_INT_IN_3PLANE (0 << 15)
214 #define S5P_MSCTRL_C_INT_IN_2PLANE (1 << 15)
215 #define S5P_MSCTRL_C_INT_IN_MASK (1 << 15)
216 #define S5P_MSCTRL_FLIP_SHIFT 13
217 #define S5P_MSCTRL_FLIP_MASK (3 << 13)
218 #define S5P_MSCTRL_FLIP_NORMAL (0 << 13)
219 #define S5P_MSCTRL_FLIP_X_MIRROR (1 << 13)
220 #define S5P_MSCTRL_FLIP_Y_MIRROR (2 << 13)
221 #define S5P_MSCTRL_FLIP_180 (3 << 13)
222 #define S5P_MSCTRL_ORDER422_SHIFT 4
223 #define S5P_MSCTRL_ORDER422_CRYCBY (0 << 4)
224 #define S5P_MSCTRL_ORDER422_YCRYCB (1 << 4)
225 #define S5P_MSCTRL_ORDER422_CBYCRY (2 << 4)
226 #define S5P_MSCTRL_ORDER422_YCBYCR (3 << 4)
227 #define S5P_MSCTRL_ORDER422_MASK (3 << 4)
228 #define S5P_MSCTRL_INPUT_EXTCAM (0 << 3)
229 #define S5P_MSCTRL_INPUT_MEMORY (1 << 3)
230 #define S5P_MSCTRL_INPUT_MASK (1 << 3)
231 #define S5P_MSCTRL_INFORMAT_YCBCR420 (0 << 1)
232 #define S5P_MSCTRL_INFORMAT_YCBCR422 (1 << 1)
233 #define S5P_MSCTRL_INFORMAT_YCBCR422_1P (2 << 1)
234 #define S5P_MSCTRL_INFORMAT_RGB (3 << 1)
235 #define S5P_MSCTRL_INFORMAT_MASK (3 << 1)
236 #define S5P_MSCTRL_ENVID (1 << 0)
237 #define S5P_MSCTRL_FRAME_COUNT(x) ((x) << 24)
239 /* Output DMA Y/Cb/Cr offset */
240 #define S5P_CIOYOFF 0x168
241 #define S5P_CIOCBOFF 0x16c
242 #define S5P_CIOCROFF 0x170
244 /* Input DMA Y/Cb/Cr offset */
245 #define S5P_CIIYOFF 0x174
246 #define S5P_CIICBOFF 0x178
247 #define S5P_CIICROFF 0x17c
249 #define S5P_CIO_OFFS_VER(x) ((x) << 16)
250 #define S5P_CIO_OFFS_HOR(x) ((x) << 0)
252 /* Input DMA original image size */
253 #define S5P_ORGISIZE 0x180
255 /* Output DMA original image size */
256 #define S5P_ORGOSIZE 0x184
258 #define S5P_ORIG_SIZE_VER(x) ((x) << 16)
259 #define S5P_ORIG_SIZE_HOR(x) ((x) << 0)
261 /* Real output DMA image size (extension register) */
262 #define S5P_CIEXTEN 0x188
264 #define S5P_CIDMAPARAM 0x18c
265 #define S5P_CIDMAPARAM_R_LINEAR (0 << 29)
266 #define S5P_CIDMAPARAM_R_64X32 (3 << 29)
267 #define S5P_CIDMAPARAM_W_LINEAR (0 << 13)
268 #define S5P_CIDMAPARAM_W_64X32 (3 << 13)
269 #define S5P_CIDMAPARAM_TILE_MASK ((3 << 29) | (3 << 13))
271 /* MIPI CSI image format */
272 #define S5P_CSIIMGFMT 0x194
273 #define S5P_CSIIMGFMT_YCBCR422_8BIT 0x1e
274 #define S5P_CSIIMGFMT_RAW8 0x2a
275 #define S5P_CSIIMGFMT_RAW10 0x2b
276 #define S5P_CSIIMGFMT_RAW12 0x2c
277 #define S5P_CSIIMGFMT_USER1 0x30
278 #define S5P_CSIIMGFMT_USER2 0x31
279 #define S5P_CSIIMGFMT_USER3 0x32
280 #define S5P_CSIIMGFMT_USER4 0x33
282 /* Output frame buffer sequence mask */
283 #define S5P_CIFCNTSEQ 0x1FC
285 #endif /* REGS_FIMC_H_ */
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