2 * V4L2 SoC Camera driver for OmniVision OV6650 Camera Sensor
4 * Copyright (C) 2010 Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
6 * Based on OmniVision OV96xx Camera Driver
7 * Copyright (C) 2009 Marek Vasut <marek.vasut@gmail.com>
9 * Based on ov772x camera driver:
10 * Copyright (C) 2008 Renesas Solutions Corp.
11 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
13 * Based on ov7670 and soc_camera_platform driver,
14 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
15 * Copyright (C) 2008 Magnus Damm
16 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
18 * Hardware specific bits initialy based on former work by Matt Callow
19 * drivers/media/video/omap/sensor_ov6650.c
20 * Copyright (C) 2006 Matt Callow
22 * This program is free software; you can redistribute it and/or modify
23 * it under the terms of the GNU General Public License version 2 as
24 * published by the Free Software Foundation.
27 #include <linux/bitops.h>
28 #include <linux/delay.h>
29 #include <linux/i2c.h>
30 #include <linux/slab.h>
32 #include <media/soc_camera.h>
33 #include <media/soc_mediabus.h>
34 #include <media/v4l2-chip-ident.h>
36 /* Register definitions */
37 #define REG_GAIN 0x00 /* range 00 - 3F */
40 #define REG_SAT 0x03 /* [7:4] saturation [0:3] reserved */
41 #define REG_HUE 0x04 /* [7:6] rsrvd [5] hue en [4:0] hue */
49 #define REG_CLKRC 0x11 /* Data Format and Internal Clock */
50 /* [7:6] Input system clock (MHz)*/
51 /* 00=8, 01=12, 10=16, 11=24 */
52 /* [5:0]: Internal Clock Pre-Scaler */
53 #define REG_COMA 0x12 /* [7] Reset */
58 #define REG_HSTRT 0x17
59 #define REG_HSTOP 0x18
60 #define REG_VSTRT 0x19
61 #define REG_VSTOP 0x1a
62 #define REG_PSHFT 0x1b
65 #define REG_HSYNS 0x1e
66 #define REG_HSYNE 0x1f
78 #define REG_FRARL 0x2b
85 #define REG_FRAJH 0x32
86 #define REG_FRAJL 0x33
88 #define REG_L1AEC 0x35
100 #define REG_ADCL 0x69
102 #define REG_RMCO 0x6c
103 #define REG_GMCO 0x6d
104 #define REG_BMCO 0x6e
107 /* Register bits, values, etc. */
108 #define OV6650_PIDH 0x66 /* high byte of product ID number */
109 #define OV6650_PIDL 0x50 /* low byte of product ID number */
110 #define OV6650_MIDH 0x7F /* high byte of mfg ID */
111 #define OV6650_MIDL 0xA2 /* low byte of mfg ID */
113 #define DEF_GAIN 0x00
114 #define DEF_BLUE 0x80
118 #define SAT_MASK (0xf << SAT_SHIFT)
119 #define SET_SAT(x) (((x) << SAT_SHIFT) & SAT_MASK)
121 #define HUE_EN BIT(5)
122 #define HUE_MASK 0x1f
124 #define SET_HUE(x) (HUE_EN | ((x) & HUE_MASK))
126 #define DEF_AECH 0x4D
128 #define CLKRC_6MHz 0x00
129 #define CLKRC_12MHz 0x40
130 #define CLKRC_16MHz 0x80
131 #define CLKRC_24MHz 0xc0
132 #define CLKRC_DIV_MASK 0x3f
133 #define GET_CLKRC_DIV(x) (((x) & CLKRC_DIV_MASK) + 1)
135 #define COMA_RESET BIT(7)
136 #define COMA_QCIF BIT(5)
137 #define COMA_RAW_RGB BIT(4)
138 #define COMA_RGB BIT(3)
139 #define COMA_BW BIT(2)
140 #define COMA_WORD_SWAP BIT(1)
141 #define COMA_BYTE_SWAP BIT(0)
142 #define DEF_COMA 0x00
144 #define COMB_FLIP_V BIT(7)
145 #define COMB_FLIP_H BIT(5)
146 #define COMB_BAND_FILTER BIT(4)
147 #define COMB_AWB BIT(2)
148 #define COMB_AGC BIT(1)
149 #define COMB_AEC BIT(0)
150 #define DEF_COMB 0x5f
152 #define COML_ONE_CHANNEL BIT(7)
154 #define DEF_HSTRT 0x24
155 #define DEF_HSTOP 0xd4
156 #define DEF_VSTRT 0x04
157 #define DEF_VSTOP 0x94
159 #define COMF_HREF_LOW BIT(4)
161 #define COMJ_PCLK_RISING BIT(4)
162 #define COMJ_VSYNC_HIGH BIT(0)
164 /* supported resolutions */
165 #define W_QCIF (DEF_HSTOP - DEF_HSTRT)
166 #define W_CIF (W_QCIF << 1)
167 #define H_QCIF (DEF_VSTOP - DEF_VSTRT)
168 #define H_CIF (H_QCIF << 1)
170 #define FRAME_RATE_MAX 30
179 struct v4l2_subdev subdev;
194 bool half_scale; /* scale down output by 2 */
195 struct v4l2_rect rect; /* sensor cropping window */
196 unsigned long pclk_limit; /* from host */
197 unsigned long pclk_max; /* from resolution and format */
198 struct v4l2_fract tpf; /* as requested with s_parm */
199 enum v4l2_mbus_pixelcode code;
200 enum v4l2_colorspace colorspace;
204 static enum v4l2_mbus_pixelcode ov6650_codes[] = {
205 V4L2_MBUS_FMT_YUYV8_2X8,
206 V4L2_MBUS_FMT_UYVY8_2X8,
207 V4L2_MBUS_FMT_YVYU8_2X8,
208 V4L2_MBUS_FMT_VYUY8_2X8,
209 V4L2_MBUS_FMT_SBGGR8_1X8,
210 V4L2_MBUS_FMT_Y8_1X8,
213 static const struct v4l2_queryctrl ov6650_controls[] = {
215 .id = V4L2_CID_AUTOGAIN,
216 .type = V4L2_CTRL_TYPE_BOOLEAN,
225 .type = V4L2_CTRL_TYPE_INTEGER,
230 .default_value = DEF_GAIN,
233 .id = V4L2_CID_AUTO_WHITE_BALANCE,
234 .type = V4L2_CTRL_TYPE_BOOLEAN,
242 .id = V4L2_CID_BLUE_BALANCE,
243 .type = V4L2_CTRL_TYPE_INTEGER,
248 .default_value = DEF_BLUE,
251 .id = V4L2_CID_RED_BALANCE,
252 .type = V4L2_CTRL_TYPE_INTEGER,
257 .default_value = DEF_RED,
260 .id = V4L2_CID_SATURATION,
261 .type = V4L2_CTRL_TYPE_INTEGER,
262 .name = "Saturation",
266 .default_value = 0x8,
270 .type = V4L2_CTRL_TYPE_INTEGER,
275 .default_value = DEF_HUE,
278 .id = V4L2_CID_BRIGHTNESS,
279 .type = V4L2_CTRL_TYPE_INTEGER,
280 .name = "Brightness",
284 .default_value = 0x80,
287 .id = V4L2_CID_EXPOSURE_AUTO,
288 .type = V4L2_CTRL_TYPE_INTEGER,
296 .id = V4L2_CID_EXPOSURE,
297 .type = V4L2_CTRL_TYPE_INTEGER,
302 .default_value = DEF_AECH,
305 .id = V4L2_CID_GAMMA,
306 .type = V4L2_CTRL_TYPE_INTEGER,
311 .default_value = 0x12,
314 .id = V4L2_CID_VFLIP,
315 .type = V4L2_CTRL_TYPE_BOOLEAN,
316 .name = "Flip Vertically",
323 .id = V4L2_CID_HFLIP,
324 .type = V4L2_CTRL_TYPE_BOOLEAN,
325 .name = "Flip Horizontally",
333 /* read a register */
334 static int ov6650_reg_read(struct i2c_client *client, u8 reg, u8 *val)
338 struct i2c_msg msg = {
339 .addr = client->addr,
345 ret = i2c_transfer(client->adapter, &msg, 1);
349 msg.flags = I2C_M_RD;
350 ret = i2c_transfer(client->adapter, &msg, 1);
358 dev_err(&client->dev, "Failed reading register 0x%02x!\n", reg);
362 /* write a register */
363 static int ov6650_reg_write(struct i2c_client *client, u8 reg, u8 val)
366 unsigned char data[2] = { reg, val };
367 struct i2c_msg msg = {
368 .addr = client->addr,
374 ret = i2c_transfer(client->adapter, &msg, 1);
378 dev_err(&client->dev, "Failed writing register 0x%02x!\n", reg);
385 /* Read a register, alter its bits, write it back */
386 static int ov6650_reg_rmw(struct i2c_client *client, u8 reg, u8 set, u8 mask)
391 ret = ov6650_reg_read(client, reg, &val);
393 dev_err(&client->dev,
394 "[Read]-Modify-Write of register 0x%02x failed!\n",
402 ret = ov6650_reg_write(client, reg, val);
404 dev_err(&client->dev,
405 "Read-Modify-[Write] of register 0x%02x failed!\n",
411 static struct ov6650 *to_ov6650(const struct i2c_client *client)
413 return container_of(i2c_get_clientdata(client), struct ov6650, subdev);
416 /* Start/Stop streaming from the device */
417 static int ov6650_s_stream(struct v4l2_subdev *sd, int enable)
422 /* Get status of additional camera capabilities */
423 static int ov6650_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
425 struct i2c_client *client = v4l2_get_subdevdata(sd);
426 struct ov6650 *priv = to_ov6650(client);
431 case V4L2_CID_AUTOGAIN:
432 ctrl->value = priv->agc;
436 ret = ov6650_reg_read(client, REG_GAIN, ®);
439 ctrl->value = priv->gain;
442 case V4L2_CID_AUTO_WHITE_BALANCE:
443 ctrl->value = priv->awb;
445 case V4L2_CID_BLUE_BALANCE:
447 ret = ov6650_reg_read(client, REG_BLUE, ®);
450 ctrl->value = priv->blue;
453 case V4L2_CID_RED_BALANCE:
455 ret = ov6650_reg_read(client, REG_RED, ®);
458 ctrl->value = priv->red;
461 case V4L2_CID_SATURATION:
462 ctrl->value = priv->saturation;
465 ctrl->value = priv->hue;
467 case V4L2_CID_BRIGHTNESS:
468 ctrl->value = priv->brightness;
470 case V4L2_CID_EXPOSURE_AUTO:
471 ctrl->value = priv->aec;
473 case V4L2_CID_EXPOSURE:
475 ret = ov6650_reg_read(client, REG_AECH, ®);
478 ctrl->value = priv->exposure;
482 ctrl->value = priv->gamma;
485 ctrl->value = priv->vflip;
488 ctrl->value = priv->hflip;
494 /* Set status of additional camera capabilities */
495 static int ov6650_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
497 struct i2c_client *client = v4l2_get_subdevdata(sd);
498 struct ov6650 *priv = to_ov6650(client);
502 case V4L2_CID_AUTOGAIN:
503 ret = ov6650_reg_rmw(client, REG_COMB,
504 ctrl->value ? COMB_AGC : 0, COMB_AGC);
506 priv->agc = ctrl->value;
509 ret = ov6650_reg_write(client, REG_GAIN, ctrl->value);
511 priv->gain = ctrl->value;
513 case V4L2_CID_AUTO_WHITE_BALANCE:
514 ret = ov6650_reg_rmw(client, REG_COMB,
515 ctrl->value ? COMB_AWB : 0, COMB_AWB);
517 priv->awb = ctrl->value;
519 case V4L2_CID_BLUE_BALANCE:
520 ret = ov6650_reg_write(client, REG_BLUE, ctrl->value);
522 priv->blue = ctrl->value;
524 case V4L2_CID_RED_BALANCE:
525 ret = ov6650_reg_write(client, REG_RED, ctrl->value);
527 priv->red = ctrl->value;
529 case V4L2_CID_SATURATION:
530 ret = ov6650_reg_rmw(client, REG_SAT, SET_SAT(ctrl->value),
533 priv->saturation = ctrl->value;
536 ret = ov6650_reg_rmw(client, REG_HUE, SET_HUE(ctrl->value),
539 priv->hue = ctrl->value;
541 case V4L2_CID_BRIGHTNESS:
542 ret = ov6650_reg_write(client, REG_BRT, ctrl->value);
544 priv->brightness = ctrl->value;
546 case V4L2_CID_EXPOSURE_AUTO:
547 switch (ctrl->value) {
548 case V4L2_EXPOSURE_AUTO:
549 ret = ov6650_reg_rmw(client, REG_COMB, COMB_AEC, 0);
552 ret = ov6650_reg_rmw(client, REG_COMB, 0, COMB_AEC);
556 priv->aec = ctrl->value;
558 case V4L2_CID_EXPOSURE:
559 ret = ov6650_reg_write(client, REG_AECH, ctrl->value);
561 priv->exposure = ctrl->value;
564 ret = ov6650_reg_write(client, REG_GAM1, ctrl->value);
566 priv->gamma = ctrl->value;
569 ret = ov6650_reg_rmw(client, REG_COMB,
570 ctrl->value ? COMB_FLIP_V : 0, COMB_FLIP_V);
572 priv->vflip = ctrl->value;
575 ret = ov6650_reg_rmw(client, REG_COMB,
576 ctrl->value ? COMB_FLIP_H : 0, COMB_FLIP_H);
578 priv->hflip = ctrl->value;
585 /* Get chip identification */
586 static int ov6650_g_chip_ident(struct v4l2_subdev *sd,
587 struct v4l2_dbg_chip_ident *id)
589 id->ident = V4L2_IDENT_OV6650;
595 #ifdef CONFIG_VIDEO_ADV_DEBUG
596 static int ov6650_get_register(struct v4l2_subdev *sd,
597 struct v4l2_dbg_register *reg)
599 struct i2c_client *client = v4l2_get_subdevdata(sd);
603 if (reg->reg & ~0xff)
608 ret = ov6650_reg_read(client, reg->reg, &val);
610 reg->val = (__u64)val;
615 static int ov6650_set_register(struct v4l2_subdev *sd,
616 struct v4l2_dbg_register *reg)
618 struct i2c_client *client = v4l2_get_subdevdata(sd);
620 if (reg->reg & ~0xff || reg->val & ~0xff)
623 return ov6650_reg_write(client, reg->reg, reg->val);
627 static int ov6650_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
629 struct i2c_client *client = v4l2_get_subdevdata(sd);
630 struct ov6650 *priv = to_ov6650(client);
632 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
638 static int ov6650_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
640 struct i2c_client *client = v4l2_get_subdevdata(sd);
641 struct ov6650 *priv = to_ov6650(client);
642 struct v4l2_rect *rect = &a->c;
645 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
648 rect->left = ALIGN(rect->left, 2);
649 rect->width = ALIGN(rect->width, 2);
650 rect->top = ALIGN(rect->top, 2);
651 rect->height = ALIGN(rect->height, 2);
652 soc_camera_limit_side(&rect->left, &rect->width,
653 DEF_HSTRT << 1, 2, W_CIF);
654 soc_camera_limit_side(&rect->top, &rect->height,
655 DEF_VSTRT << 1, 2, H_CIF);
657 ret = ov6650_reg_write(client, REG_HSTRT, rect->left >> 1);
659 priv->rect.left = rect->left;
660 ret = ov6650_reg_write(client, REG_HSTOP,
661 (rect->left + rect->width) >> 1);
664 priv->rect.width = rect->width;
665 ret = ov6650_reg_write(client, REG_VSTRT, rect->top >> 1);
668 priv->rect.top = rect->top;
669 ret = ov6650_reg_write(client, REG_VSTOP,
670 (rect->top + rect->height) >> 1);
673 priv->rect.height = rect->height;
678 static int ov6650_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
680 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
683 a->bounds.left = DEF_HSTRT << 1;
684 a->bounds.top = DEF_VSTRT << 1;
685 a->bounds.width = W_CIF;
686 a->bounds.height = H_CIF;
687 a->defrect = a->bounds;
688 a->pixelaspect.numerator = 1;
689 a->pixelaspect.denominator = 1;
694 static int ov6650_g_fmt(struct v4l2_subdev *sd,
695 struct v4l2_mbus_framefmt *mf)
697 struct i2c_client *client = v4l2_get_subdevdata(sd);
698 struct ov6650 *priv = to_ov6650(client);
700 mf->width = priv->rect.width >> priv->half_scale;
701 mf->height = priv->rect.height >> priv->half_scale;
702 mf->code = priv->code;
703 mf->colorspace = priv->colorspace;
704 mf->field = V4L2_FIELD_NONE;
709 static bool is_unscaled_ok(int width, int height, struct v4l2_rect *rect)
711 return width > rect->width >> 1 || height > rect->height >> 1;
714 static u8 to_clkrc(struct v4l2_fract *timeperframe,
715 unsigned long pclk_limit, unsigned long pclk_max)
719 if (timeperframe->numerator && timeperframe->denominator)
720 pclk = pclk_max * timeperframe->denominator /
721 (FRAME_RATE_MAX * timeperframe->numerator);
725 if (pclk_limit && pclk_limit < pclk)
728 return (pclk_max - 1) / pclk;
731 /* set the format we will capture in */
732 static int ov6650_s_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *mf)
734 struct i2c_client *client = v4l2_get_subdevdata(sd);
735 struct soc_camera_device *icd = client->dev.platform_data;
736 struct soc_camera_sense *sense = icd->sense;
737 struct ov6650 *priv = to_ov6650(client);
738 bool half_scale = !is_unscaled_ok(mf->width, mf->height, &priv->rect);
739 struct v4l2_crop a = {
740 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
742 .left = priv->rect.left + (priv->rect.width >> 1) -
743 (mf->width >> (1 - half_scale)),
744 .top = priv->rect.top + (priv->rect.height >> 1) -
745 (mf->height >> (1 - half_scale)),
746 .width = mf->width << half_scale,
747 .height = mf->height << half_scale,
750 enum v4l2_mbus_pixelcode code = mf->code;
751 unsigned long mclk, pclk;
752 u8 coma_set = 0, coma_mask = 0, coml_set, coml_mask, clkrc;
755 /* select color matrix configuration for given color encoding */
757 case V4L2_MBUS_FMT_Y8_1X8:
758 dev_dbg(&client->dev, "pixel format GREY8_1X8\n");
759 coma_mask |= COMA_RGB | COMA_WORD_SWAP | COMA_BYTE_SWAP;
762 case V4L2_MBUS_FMT_YUYV8_2X8:
763 dev_dbg(&client->dev, "pixel format YUYV8_2X8_LE\n");
764 coma_mask |= COMA_RGB | COMA_BW | COMA_BYTE_SWAP;
765 coma_set |= COMA_WORD_SWAP;
767 case V4L2_MBUS_FMT_YVYU8_2X8:
768 dev_dbg(&client->dev, "pixel format YVYU8_2X8_LE (untested)\n");
769 coma_mask |= COMA_RGB | COMA_BW | COMA_WORD_SWAP |
772 case V4L2_MBUS_FMT_UYVY8_2X8:
773 dev_dbg(&client->dev, "pixel format YUYV8_2X8_BE\n");
775 coma_mask |= COMA_RGB | COMA_BW | COMA_WORD_SWAP;
776 coma_set |= COMA_BYTE_SWAP;
778 coma_mask |= COMA_RGB | COMA_BW;
779 coma_set |= COMA_BYTE_SWAP | COMA_WORD_SWAP;
782 case V4L2_MBUS_FMT_VYUY8_2X8:
783 dev_dbg(&client->dev, "pixel format YVYU8_2X8_BE (untested)\n");
785 coma_mask |= COMA_RGB | COMA_BW;
786 coma_set |= COMA_BYTE_SWAP | COMA_WORD_SWAP;
788 coma_mask |= COMA_RGB | COMA_BW | COMA_WORD_SWAP;
789 coma_set |= COMA_BYTE_SWAP;
792 case V4L2_MBUS_FMT_SBGGR8_1X8:
793 dev_dbg(&client->dev, "pixel format SBGGR8_1X8 (untested)\n");
794 coma_mask |= COMA_BW | COMA_BYTE_SWAP | COMA_WORD_SWAP;
795 coma_set |= COMA_RAW_RGB | COMA_RGB;
798 dev_err(&client->dev, "Pixel format not handled: 0x%x\n", code);
803 if (code == V4L2_MBUS_FMT_Y8_1X8 ||
804 code == V4L2_MBUS_FMT_SBGGR8_1X8) {
805 coml_mask = COML_ONE_CHANNEL;
807 priv->pclk_max = 4000000;
810 coml_set = COML_ONE_CHANNEL;
811 priv->pclk_max = 8000000;
814 if (code == V4L2_MBUS_FMT_SBGGR8_1X8)
815 priv->colorspace = V4L2_COLORSPACE_SRGB;
817 priv->colorspace = V4L2_COLORSPACE_JPEG;
820 dev_dbg(&client->dev, "max resolution: QCIF\n");
821 coma_set |= COMA_QCIF;
824 dev_dbg(&client->dev, "max resolution: CIF\n");
825 coma_mask |= COMA_QCIF;
827 priv->half_scale = half_scale;
830 if (sense->master_clock == 8000000) {
831 dev_dbg(&client->dev, "8MHz input clock\n");
833 } else if (sense->master_clock == 12000000) {
834 dev_dbg(&client->dev, "12MHz input clock\n");
836 } else if (sense->master_clock == 16000000) {
837 dev_dbg(&client->dev, "16MHz input clock\n");
839 } else if (sense->master_clock == 24000000) {
840 dev_dbg(&client->dev, "24MHz input clock\n");
843 dev_err(&client->dev,
844 "unspported input clock, check platform data\n");
847 mclk = sense->master_clock;
848 priv->pclk_limit = sense->pixel_clock_max;
852 priv->pclk_limit = 0;
853 dev_dbg(&client->dev, "using default 24MHz input clock\n");
856 clkrc |= to_clkrc(&priv->tpf, priv->pclk_limit, priv->pclk_max);
858 pclk = priv->pclk_max / GET_CLKRC_DIV(clkrc);
859 dev_dbg(&client->dev, "pixel clock divider: %ld.%ld\n",
860 mclk / pclk, 10 * mclk % pclk / pclk);
862 ret = ov6650_s_crop(sd, &a);
864 ret = ov6650_reg_rmw(client, REG_COMA, coma_set, coma_mask);
866 ret = ov6650_reg_write(client, REG_CLKRC, clkrc);
868 ret = ov6650_reg_rmw(client, REG_COML, coml_set, coml_mask);
871 mf->colorspace = priv->colorspace;
872 mf->width = priv->rect.width >> half_scale;
873 mf->height = priv->rect.height >> half_scale;
879 static int ov6650_try_fmt(struct v4l2_subdev *sd,
880 struct v4l2_mbus_framefmt *mf)
882 struct i2c_client *client = v4l2_get_subdevdata(sd);
883 struct ov6650 *priv = to_ov6650(client);
885 if (is_unscaled_ok(mf->width, mf->height, &priv->rect))
886 v4l_bound_align_image(&mf->width, 2, W_CIF, 1,
887 &mf->height, 2, H_CIF, 1, 0);
889 mf->field = V4L2_FIELD_NONE;
892 case V4L2_MBUS_FMT_Y10_1X10:
893 mf->code = V4L2_MBUS_FMT_Y8_1X8;
894 case V4L2_MBUS_FMT_Y8_1X8:
895 case V4L2_MBUS_FMT_YVYU8_2X8:
896 case V4L2_MBUS_FMT_YUYV8_2X8:
897 case V4L2_MBUS_FMT_VYUY8_2X8:
898 case V4L2_MBUS_FMT_UYVY8_2X8:
899 mf->colorspace = V4L2_COLORSPACE_JPEG;
902 mf->code = V4L2_MBUS_FMT_SBGGR8_1X8;
903 case V4L2_MBUS_FMT_SBGGR8_1X8:
904 mf->colorspace = V4L2_COLORSPACE_SRGB;
911 static int ov6650_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
912 enum v4l2_mbus_pixelcode *code)
914 if (index >= ARRAY_SIZE(ov6650_codes))
917 *code = ov6650_codes[index];
921 static int ov6650_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
923 struct i2c_client *client = v4l2_get_subdevdata(sd);
924 struct ov6650 *priv = to_ov6650(client);
925 struct v4l2_captureparm *cp = &parms->parm.capture;
927 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
930 memset(cp, 0, sizeof(*cp));
931 cp->capability = V4L2_CAP_TIMEPERFRAME;
932 cp->timeperframe.numerator = GET_CLKRC_DIV(to_clkrc(&priv->tpf,
933 priv->pclk_limit, priv->pclk_max));
934 cp->timeperframe.denominator = FRAME_RATE_MAX;
936 dev_dbg(&client->dev, "Frame interval: %u/%u s\n",
937 cp->timeperframe.numerator, cp->timeperframe.denominator);
942 static int ov6650_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
944 struct i2c_client *client = v4l2_get_subdevdata(sd);
945 struct ov6650 *priv = to_ov6650(client);
946 struct v4l2_captureparm *cp = &parms->parm.capture;
947 struct v4l2_fract *tpf = &cp->timeperframe;
951 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
954 if (cp->extendedmode != 0)
957 if (tpf->numerator == 0 || tpf->denominator == 0)
958 div = 1; /* Reset to full rate */
960 div = (tpf->numerator * FRAME_RATE_MAX) / tpf->denominator;
964 else if (div > GET_CLKRC_DIV(CLKRC_DIV_MASK))
965 div = GET_CLKRC_DIV(CLKRC_DIV_MASK);
968 * Keep result to be used as tpf limit
969 * for subseqent clock divider calculations
971 priv->tpf.numerator = div;
972 priv->tpf.denominator = FRAME_RATE_MAX;
974 clkrc = to_clkrc(&priv->tpf, priv->pclk_limit, priv->pclk_max);
976 ret = ov6650_reg_rmw(client, REG_CLKRC, clkrc, CLKRC_DIV_MASK);
978 tpf->numerator = GET_CLKRC_DIV(clkrc);
979 tpf->denominator = FRAME_RATE_MAX;
985 /* Soft reset the camera. This has nothing to do with the RESET pin! */
986 static int ov6650_reset(struct i2c_client *client)
990 dev_dbg(&client->dev, "reset\n");
992 ret = ov6650_reg_rmw(client, REG_COMA, COMA_RESET, 0);
994 dev_err(&client->dev,
995 "An error occurred while entering soft reset!\n");
1000 /* program default register values */
1001 static int ov6650_prog_dflt(struct i2c_client *client)
1005 dev_dbg(&client->dev, "initializing\n");
1007 ret = ov6650_reg_write(client, REG_COMA, 0); /* ~COMA_RESET */
1009 ret = ov6650_reg_rmw(client, REG_COMB, 0, COMB_BAND_FILTER);
1014 static int ov6650_video_probe(struct soc_camera_device *icd,
1015 struct i2c_client *client)
1017 u8 pidh, pidl, midh, midl;
1021 * check and show product ID and manufacturer ID
1023 ret = ov6650_reg_read(client, REG_PIDH, &pidh);
1025 ret = ov6650_reg_read(client, REG_PIDL, &pidl);
1027 ret = ov6650_reg_read(client, REG_MIDH, &midh);
1029 ret = ov6650_reg_read(client, REG_MIDL, &midl);
1034 if ((pidh != OV6650_PIDH) || (pidl != OV6650_PIDL)) {
1035 dev_err(&client->dev, "Product ID error 0x%02x:0x%02x\n",
1040 dev_info(&client->dev,
1041 "ov6650 Product ID 0x%02x:0x%02x Manufacturer ID 0x%02x:0x%02x\n",
1042 pidh, pidl, midh, midl);
1044 ret = ov6650_reset(client);
1046 ret = ov6650_prog_dflt(client);
1051 static struct soc_camera_ops ov6650_ops = {
1052 .controls = ov6650_controls,
1053 .num_controls = ARRAY_SIZE(ov6650_controls),
1056 static struct v4l2_subdev_core_ops ov6650_core_ops = {
1057 .g_ctrl = ov6650_g_ctrl,
1058 .s_ctrl = ov6650_s_ctrl,
1059 .g_chip_ident = ov6650_g_chip_ident,
1060 #ifdef CONFIG_VIDEO_ADV_DEBUG
1061 .g_register = ov6650_get_register,
1062 .s_register = ov6650_set_register,
1066 /* Request bus settings on camera side */
1067 static int ov6650_g_mbus_config(struct v4l2_subdev *sd,
1068 struct v4l2_mbus_config *cfg)
1070 struct i2c_client *client = v4l2_get_subdevdata(sd);
1071 struct soc_camera_device *icd = client->dev.platform_data;
1072 struct soc_camera_link *icl = to_soc_camera_link(icd);
1074 cfg->flags = V4L2_MBUS_MASTER |
1075 V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING |
1076 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_LOW |
1077 V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW |
1078 V4L2_MBUS_DATA_ACTIVE_HIGH;
1079 cfg->type = V4L2_MBUS_PARALLEL;
1080 cfg->flags = soc_camera_apply_board_flags(icl, cfg);
1085 /* Alter bus settings on camera side */
1086 static int ov6650_s_mbus_config(struct v4l2_subdev *sd,
1087 const struct v4l2_mbus_config *cfg)
1089 struct i2c_client *client = v4l2_get_subdevdata(sd);
1090 struct soc_camera_device *icd = client->dev.platform_data;
1091 struct soc_camera_link *icl = to_soc_camera_link(icd);
1092 unsigned long flags = soc_camera_apply_board_flags(icl, cfg);
1095 if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
1096 ret = ov6650_reg_rmw(client, REG_COMJ, COMJ_PCLK_RISING, 0);
1098 ret = ov6650_reg_rmw(client, REG_COMJ, 0, COMJ_PCLK_RISING);
1102 if (flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
1103 ret = ov6650_reg_rmw(client, REG_COMF, COMF_HREF_LOW, 0);
1105 ret = ov6650_reg_rmw(client, REG_COMF, 0, COMF_HREF_LOW);
1109 if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
1110 ret = ov6650_reg_rmw(client, REG_COMJ, COMJ_VSYNC_HIGH, 0);
1112 ret = ov6650_reg_rmw(client, REG_COMJ, 0, COMJ_VSYNC_HIGH);
1117 static struct v4l2_subdev_video_ops ov6650_video_ops = {
1118 .s_stream = ov6650_s_stream,
1119 .g_mbus_fmt = ov6650_g_fmt,
1120 .s_mbus_fmt = ov6650_s_fmt,
1121 .try_mbus_fmt = ov6650_try_fmt,
1122 .enum_mbus_fmt = ov6650_enum_fmt,
1123 .cropcap = ov6650_cropcap,
1124 .g_crop = ov6650_g_crop,
1125 .s_crop = ov6650_s_crop,
1126 .g_parm = ov6650_g_parm,
1127 .s_parm = ov6650_s_parm,
1128 .g_mbus_config = ov6650_g_mbus_config,
1129 .s_mbus_config = ov6650_s_mbus_config,
1132 static struct v4l2_subdev_ops ov6650_subdev_ops = {
1133 .core = &ov6650_core_ops,
1134 .video = &ov6650_video_ops,
1138 * i2c_driver function
1140 static int ov6650_probe(struct i2c_client *client,
1141 const struct i2c_device_id *did)
1143 struct ov6650 *priv;
1144 struct soc_camera_device *icd = client->dev.platform_data;
1145 struct soc_camera_link *icl;
1149 dev_err(&client->dev, "Missing soc-camera data!\n");
1153 icl = to_soc_camera_link(icd);
1155 dev_err(&client->dev, "Missing platform_data for driver\n");
1159 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1161 dev_err(&client->dev,
1162 "Failed to allocate memory for private data!\n");
1166 v4l2_i2c_subdev_init(&priv->subdev, client, &ov6650_subdev_ops);
1168 icd->ops = &ov6650_ops;
1170 priv->rect.left = DEF_HSTRT << 1;
1171 priv->rect.top = DEF_VSTRT << 1;
1172 priv->rect.width = W_CIF;
1173 priv->rect.height = H_CIF;
1174 priv->half_scale = false;
1175 priv->code = V4L2_MBUS_FMT_YUYV8_2X8;
1176 priv->colorspace = V4L2_COLORSPACE_JPEG;
1178 ret = ov6650_video_probe(icd, client);
1188 static int ov6650_remove(struct i2c_client *client)
1190 struct ov6650 *priv = to_ov6650(client);
1196 static const struct i2c_device_id ov6650_id[] = {
1200 MODULE_DEVICE_TABLE(i2c, ov6650_id);
1202 static struct i2c_driver ov6650_i2c_driver = {
1206 .probe = ov6650_probe,
1207 .remove = ov6650_remove,
1208 .id_table = ov6650_id,
1211 static int __init ov6650_module_init(void)
1213 return i2c_add_driver(&ov6650_i2c_driver);
1216 static void __exit ov6650_module_exit(void)
1218 i2c_del_driver(&ov6650_i2c_driver);
1221 module_init(ov6650_module_init);
1222 module_exit(ov6650_module_exit);
1224 MODULE_DESCRIPTION("SoC Camera driver for OmniVision OV6650");
1225 MODULE_AUTHOR("Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>");
1226 MODULE_LICENSE("GPL v2");