2 em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
4 Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
5 Markus Rechberger <mrechberger@gmail.com>
6 Mauro Carvalho Chehab <mchehab@infradead.org>
7 Sascha Sommer <saschasommer@freenet.de>
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/init.h>
25 #include <linux/list.h>
26 #include <linux/module.h>
27 #include <linux/slab.h>
28 #include <linux/usb.h>
29 #include <linux/vmalloc.h>
30 #include <media/v4l2-common.h>
34 /* #define ENABLE_DEBUG_ISOC_FRAMES */
36 static unsigned int core_debug;
37 module_param(core_debug, int, 0644);
38 MODULE_PARM_DESC(core_debug, "enable debug messages [core]");
40 #define em28xx_coredbg(fmt, arg...) do {\
42 printk(KERN_INFO "%s %s :"fmt, \
43 dev->name, __func__ , ##arg); } while (0)
45 static unsigned int reg_debug;
46 module_param(reg_debug, int, 0644);
47 MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
49 #define em28xx_regdbg(fmt, arg...) do {\
51 printk(KERN_INFO "%s %s :"fmt, \
52 dev->name, __func__ , ##arg); } while (0)
55 module_param(alt, int, 0644);
56 MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
58 static unsigned int disable_vbi;
59 module_param(disable_vbi, int, 0644);
60 MODULE_PARM_DESC(disable_vbi, "disable vbi support");
63 #define em28xx_isocdbg(fmt, arg...) do {\
65 printk(KERN_INFO "%s %s :"fmt, \
66 dev->name, __func__ , ##arg); } while (0)
69 * em28xx_read_reg_req()
70 * reads data from the usb device specifying bRequest
72 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
76 int pipe = usb_rcvctrlpipe(dev->udev, 0);
78 if (dev->state & DEV_DISCONNECTED)
81 if (len > URB_MAX_CTRL_SIZE)
85 printk(KERN_DEBUG "(pipe 0x%08x): "
86 "IN: %02x %02x %02x %02x %02x %02x %02x %02x ",
88 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
91 len & 0xff, len >> 8);
94 mutex_lock(&dev->ctrl_urb_lock);
95 ret = usb_control_msg(dev->udev, pipe, req,
96 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
97 0x0000, reg, dev->urb_buf, len, HZ);
100 printk(" failed!\n");
101 mutex_unlock(&dev->ctrl_urb_lock);
106 memcpy(buf, dev->urb_buf, len);
108 mutex_unlock(&dev->ctrl_urb_lock);
114 for (byte = 0; byte < len; byte++)
115 printk(" %02x", (unsigned char)buf[byte]);
123 * em28xx_read_reg_req()
124 * reads data from the usb device specifying bRequest
126 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
131 ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1);
138 int em28xx_read_reg(struct em28xx *dev, u16 reg)
140 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
144 * em28xx_write_regs_req()
145 * sends data to the usb device, specifying bRequest
147 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
151 int pipe = usb_sndctrlpipe(dev->udev, 0);
153 if (dev->state & DEV_DISCONNECTED)
156 if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
162 printk(KERN_DEBUG "(pipe 0x%08x): "
163 "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
165 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
167 reg & 0xff, reg >> 8,
168 len & 0xff, len >> 8);
170 for (byte = 0; byte < len; byte++)
171 printk(" %02x", (unsigned char)buf[byte]);
175 mutex_lock(&dev->ctrl_urb_lock);
176 memcpy(dev->urb_buf, buf, len);
177 ret = usb_control_msg(dev->udev, pipe, req,
178 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
179 0x0000, reg, dev->urb_buf, len, HZ);
180 mutex_unlock(&dev->ctrl_urb_lock);
182 if (dev->wait_after_write)
183 msleep(dev->wait_after_write);
188 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
192 rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
194 /* Stores GPO/GPIO values at the cache, if changed
195 Only write values should be stored, since input on a GPIO
196 register will return the input bits.
197 Not sure what happens on reading GPO register.
200 if (reg == dev->reg_gpo_num)
201 dev->reg_gpo = buf[0];
202 else if (reg == dev->reg_gpio_num)
203 dev->reg_gpio = buf[0];
209 /* Write a single register */
210 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
212 return em28xx_write_regs(dev, reg, &val, 1);
216 * em28xx_write_reg_bits()
217 * sets only some bits (specified by bitmask) of a register, by first reading
220 int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
226 /* Uses cache for gpo/gpio registers */
227 if (reg == dev->reg_gpo_num)
228 oldval = dev->reg_gpo;
229 else if (reg == dev->reg_gpio_num)
230 oldval = dev->reg_gpio;
232 oldval = em28xx_read_reg(dev, reg);
237 newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
239 return em28xx_write_regs(dev, reg, &newval, 1);
243 * em28xx_is_ac97_ready()
244 * Checks if ac97 is ready
246 static int em28xx_is_ac97_ready(struct em28xx *dev)
250 /* Wait up to 50 ms for AC97 command to complete */
251 for (i = 0; i < 10; i++, msleep(5)) {
252 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
260 em28xx_warn("AC97 command still being executed: not handled properly!\n");
266 * write a 16 bit value to the specified AC97 address (LSB first!)
268 int em28xx_read_ac97(struct em28xx *dev, u8 reg)
271 u8 addr = (reg & 0x7f) | 0x80;
274 ret = em28xx_is_ac97_ready(dev);
278 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
282 ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
283 (u8 *)&val, sizeof(val));
287 return le16_to_cpu(val);
289 EXPORT_SYMBOL_GPL(em28xx_read_ac97);
292 * em28xx_write_ac97()
293 * write a 16 bit value to the specified AC97 address (LSB first!)
295 int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
298 u8 addr = reg & 0x7f;
301 value = cpu_to_le16(val);
303 ret = em28xx_is_ac97_ready(dev);
307 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2);
311 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
317 EXPORT_SYMBOL_GPL(em28xx_write_ac97);
319 struct em28xx_vol_itable {
320 enum em28xx_amux mux;
324 static struct em28xx_vol_itable inputs[] = {
325 { EM28XX_AMUX_VIDEO, AC97_VIDEO_VOL },
326 { EM28XX_AMUX_LINE_IN, AC97_LINEIN_VOL },
327 { EM28XX_AMUX_PHONE, AC97_PHONE_VOL },
328 { EM28XX_AMUX_MIC, AC97_MIC_VOL },
329 { EM28XX_AMUX_CD, AC97_CD_VOL },
330 { EM28XX_AMUX_AUX, AC97_AUX_VOL },
331 { EM28XX_AMUX_PCM_OUT, AC97_PCM_OUT_VOL },
334 static int set_ac97_input(struct em28xx *dev)
337 enum em28xx_amux amux = dev->ctl_ainput;
339 /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
340 em28xx should point to LINE IN, while AC97 should use VIDEO
342 if (amux == EM28XX_AMUX_VIDEO2)
343 amux = EM28XX_AMUX_VIDEO;
345 /* Mute all entres but the one that were selected */
346 for (i = 0; i < ARRAY_SIZE(inputs); i++) {
347 if (amux == inputs[i].mux)
348 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
350 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
353 em28xx_warn("couldn't setup AC97 register %d\n",
359 static int em28xx_set_audio_source(struct em28xx *dev)
364 if (dev->board.is_em2800) {
365 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
366 input = EM2800_AUDIO_SRC_TUNER;
368 input = EM2800_AUDIO_SRC_LINE;
370 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
375 if (dev->board.has_msp34xx)
376 input = EM28XX_AUDIO_SRC_TUNER;
378 switch (dev->ctl_ainput) {
379 case EM28XX_AMUX_VIDEO:
380 input = EM28XX_AUDIO_SRC_TUNER;
383 input = EM28XX_AUDIO_SRC_LINE;
388 if (dev->board.mute_gpio && dev->mute)
389 em28xx_gpio_set(dev, dev->board.mute_gpio);
391 em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
393 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
398 switch (dev->audio_mode.ac97) {
402 ret = set_ac97_input(dev);
408 struct em28xx_vol_otable {
409 enum em28xx_aout mux;
413 static const struct em28xx_vol_otable outputs[] = {
414 { EM28XX_AOUT_MASTER, AC97_MASTER_VOL },
415 { EM28XX_AOUT_LINE, AC97_LINE_LEVEL_VOL },
416 { EM28XX_AOUT_MONO, AC97_MASTER_MONO_VOL },
417 { EM28XX_AOUT_LFE, AC97_LFE_MASTER_VOL },
418 { EM28XX_AOUT_SURR, AC97_SURR_MASTER_VOL },
421 int em28xx_audio_analog_set(struct em28xx *dev)
426 if (!dev->audio_mode.has_audio)
429 /* It is assumed that all devices use master volume for output.
430 It would be possible to use also line output.
432 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
433 /* Mute all outputs */
434 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
435 ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
437 em28xx_warn("couldn't setup AC97 register %d\n",
442 xclk = dev->board.xclk & 0x7f;
444 xclk |= EM28XX_XCLK_AUDIO_UNMUTE;
446 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
451 /* Selects the proper audio input */
452 ret = em28xx_set_audio_source(dev);
455 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
458 em28xx_write_ac97(dev, AC97_POWER_DOWN_CTRL, 0x4200);
459 em28xx_write_ac97(dev, AC97_EXT_AUD_CTRL, 0x0031);
460 em28xx_write_ac97(dev, AC97_PCM_IN_SRATE, 0xbb80);
462 /* LSB: left channel - both channels with the same level */
463 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
465 /* Mute device, if needed */
470 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
471 if (dev->ctl_aoutput & outputs[i].mux)
472 ret = em28xx_write_ac97(dev, outputs[i].reg,
475 em28xx_warn("couldn't setup AC97 register %d\n",
479 if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) {
480 int sel = ac97_return_record_select(dev->ctl_aoutput);
482 /* Use the same input for both left and right
486 em28xx_write_ac97(dev, AC97_RECORD_SELECT, sel);
492 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
494 int em28xx_audio_setup(struct em28xx *dev)
496 int vid1, vid2, feat, cfg;
499 if (dev->chip_id == CHIP_ID_EM2870 || dev->chip_id == CHIP_ID_EM2874
500 || dev->chip_id == CHIP_ID_EM28174) {
501 /* Digital only device - don't load any alsa module */
502 dev->audio_mode.has_audio = 0;
503 dev->has_audio_class = 0;
504 dev->has_alsa_audio = 0;
508 /* If device doesn't support Usb Audio Class, use vendor class */
509 if (!dev->has_audio_class)
510 dev->has_alsa_audio = 1;
512 dev->audio_mode.has_audio = 1;
514 /* See how this device is configured */
515 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
516 em28xx_info("Config register raw data: 0x%02x\n", cfg);
518 /* Register read error? */
519 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */
520 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) {
521 /* The device doesn't have vendor audio at all */
522 dev->has_alsa_audio = 0;
523 dev->audio_mode.has_audio = 0;
525 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
526 EM28XX_CHIPCFG_I2S_3_SAMPRATES) {
527 em28xx_info("I2S Audio (3 sample rates)\n");
528 dev->audio_mode.i2s_3rates = 1;
529 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
530 EM28XX_CHIPCFG_I2S_5_SAMPRATES) {
531 em28xx_info("I2S Audio (5 sample rates)\n");
532 dev->audio_mode.i2s_5rates = 1;
535 if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) {
536 /* Skip the code that does AC97 vendor detection */
537 dev->audio_mode.ac97 = EM28XX_NO_AC97;
541 dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
543 vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
546 * Device likely doesn't support AC97
547 * Note: (some) em2800 devices without eeprom reports 0x91 on
548 * CHIPCFG register, even not having an AC97 chip
550 em28xx_warn("AC97 chip type couldn't be determined\n");
551 dev->audio_mode.ac97 = EM28XX_NO_AC97;
552 dev->has_alsa_audio = 0;
553 dev->audio_mode.has_audio = 0;
557 vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
561 vid = vid1 << 16 | vid2;
563 dev->audio_mode.ac97_vendor_id = vid;
564 em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
566 feat = em28xx_read_ac97(dev, AC97_RESET);
570 dev->audio_mode.ac97_feat = feat;
571 em28xx_warn("AC97 features = 0x%04x\n", feat);
573 /* Try to identify what audio processor we have */
574 if ((vid == 0xffffffff) && (feat == 0x6a90))
575 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
576 else if ((vid >> 8) == 0x838476)
577 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
580 /* Reports detected AC97 processor */
581 switch (dev->audio_mode.ac97) {
583 em28xx_info("No AC97 audio processor\n");
585 case EM28XX_AC97_EM202:
586 em28xx_info("Empia 202 AC97 audio processor detected\n");
588 case EM28XX_AC97_SIGMATEL:
589 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n",
590 dev->audio_mode.ac97_vendor_id & 0xff);
592 case EM28XX_AC97_OTHER:
593 em28xx_warn("Unknown AC97 audio processor detected!\n");
599 return em28xx_audio_analog_set(dev);
601 EXPORT_SYMBOL_GPL(em28xx_audio_setup);
603 int em28xx_colorlevels_set_default(struct em28xx *dev)
605 em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10); /* contrast */
606 em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x00); /* brightness */
607 em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10); /* saturation */
608 em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
609 em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
610 em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x00);
612 em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
613 em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
614 em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
615 em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
616 em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
617 em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
618 return em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
621 int em28xx_capture_start(struct em28xx *dev, int start)
625 if (dev->chip_id == CHIP_ID_EM2874 || dev->chip_id == CHIP_ID_EM28174) {
626 /* The Transport Stream Enable Register moved in em2874 */
628 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
630 EM2874_TS1_CAPTURE_ENABLE);
634 /* Enable Transport Stream */
635 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
636 EM2874_TS1_CAPTURE_ENABLE,
637 EM2874_TS1_CAPTURE_ENABLE);
642 /* FIXME: which is the best order? */
643 /* video registers are sampled by VREF */
644 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
645 start ? 0x10 : 0x00, 0x10);
650 /* disable video capture */
651 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
655 if (dev->board.is_webcam)
656 rc = em28xx_write_reg(dev, 0x13, 0x0c);
658 /* enable video capture */
659 rc = em28xx_write_reg(dev, 0x48, 0x00);
661 if (dev->mode == EM28XX_ANALOG_MODE)
662 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
664 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
671 int em28xx_vbi_supported(struct em28xx *dev)
673 /* Modprobe option to manually disable */
674 if (disable_vbi == 1)
677 if (dev->chip_id == CHIP_ID_EM2860 ||
678 dev->chip_id == CHIP_ID_EM2883)
681 /* Version of em28xx that does not support VBI */
685 int em28xx_set_outfmt(struct em28xx *dev)
690 ret = em28xx_write_reg_bits(dev, EM28XX_R27_OUTFMT,
691 dev->format->reg | 0x20, 0xff);
695 ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, dev->vinmode);
699 vinctrl = dev->vinctl;
700 if (em28xx_vbi_supported(dev) == 1) {
701 vinctrl |= EM28XX_VINCTRL_VBI_RAW;
702 em28xx_write_reg(dev, EM28XX_R34_VBI_START_H, 0x00);
703 em28xx_write_reg(dev, EM28XX_R36_VBI_WIDTH, dev->vbi_width/4);
704 em28xx_write_reg(dev, EM28XX_R37_VBI_HEIGHT, dev->vbi_height);
705 if (dev->norm & V4L2_STD_525_60) {
707 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x09);
708 } else if (dev->norm & V4L2_STD_625_50) {
710 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x07);
714 return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, vinctrl);
717 static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
720 em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
721 xmin, ymin, xmax, ymax);
723 em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
724 em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
725 em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
726 return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
729 static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
730 u16 width, u16 height)
734 u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
736 em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
737 (width | (overflow & 2) << 7),
738 (height | (overflow & 1) << 8));
740 em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
741 em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
742 em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
743 em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
744 return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
747 static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
750 /* the em2800 scaler only supports scaling down to 50% */
752 if (dev->board.is_em2800) {
753 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
759 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
763 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
764 /* it seems that both H and V scalers must be active
766 mode = (h || v) ? 0x30 : 0x00;
768 return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
771 /* FIXME: this only function read values from dev */
772 int em28xx_resolution_set(struct em28xx *dev)
775 width = norm_maxw(dev);
776 height = norm_maxh(dev);
778 /* Properly setup VBI */
779 dev->vbi_width = 720;
780 if (dev->norm & V4L2_STD_525_60)
781 dev->vbi_height = 12;
783 dev->vbi_height = 18;
785 if (!dev->progressive)
786 height >>= norm_maxh(dev);
788 em28xx_set_outfmt(dev);
791 em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
793 /* If we don't set the start position to 2 in VBI mode, we end up
794 with line 20/21 being YUYV encoded instead of being in 8-bit
795 greyscale. The core of the issue is that line 21 (and line 23 for
796 PAL WSS) are inside of active video region, and as a result they
797 get the pixelformatting associated with that area. So by cropping
798 it out, we end up with the same format as the rest of the VBI
800 if (em28xx_vbi_supported(dev) == 1)
801 em28xx_capture_area_set(dev, 0, 2, width >> 2, height >> 2);
803 em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
805 return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
808 int em28xx_set_alternate(struct em28xx *dev)
810 int errCode, prev_alt = dev->alt;
812 unsigned int min_pkt_size = dev->width * 2 + 4;
815 * alt = 0 is used only for control messages, so, only values
816 * greater than 0 can be used for streaming.
818 if (alt && alt < dev->num_alt) {
819 em28xx_coredbg("alternate forced to %d\n", dev->alt);
824 /* When image size is bigger than a certain value,
825 the frame size should be increased, otherwise, only
826 green screen will be received.
828 if (dev->width * 2 * dev->height > 720 * 240 * 2)
831 for (i = 0; i < dev->num_alt; i++) {
832 /* stop when the selected alt setting offers enough bandwidth */
833 if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
836 /* otherwise make sure that we end up with the maximum bandwidth
837 because the min_pkt_size equation might be wrong...
839 } else if (dev->alt_max_pkt_size[i] >
840 dev->alt_max_pkt_size[dev->alt])
845 if (dev->alt != prev_alt) {
846 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
847 min_pkt_size, dev->alt);
848 dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
849 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
850 dev->alt, dev->max_pkt_size);
851 errCode = usb_set_interface(dev->udev, 0, dev->alt);
853 em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
861 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
868 if (dev->mode != EM28XX_SUSPEND) {
869 em28xx_write_reg(dev, 0x48, 0x00);
870 if (dev->mode == EM28XX_ANALOG_MODE)
871 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
873 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
877 /* Send GPIO reset sequences specified at board entry */
878 while (gpio->sleep >= 0) {
879 if (gpio->reg >= 0) {
880 rc = em28xx_write_reg_bits(dev,
895 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
897 if (dev->mode == set_mode)
900 if (set_mode == EM28XX_SUSPEND) {
901 dev->mode = set_mode;
903 /* FIXME: add suspend support for ac97 */
905 return em28xx_gpio_set(dev, dev->board.suspend_gpio);
908 dev->mode = set_mode;
910 if (dev->mode == EM28XX_DIGITAL_MODE)
911 return em28xx_gpio_set(dev, dev->board.dvb_gpio);
913 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
915 EXPORT_SYMBOL_GPL(em28xx_set_mode);
917 /* ------------------------------------------------------------------
919 ------------------------------------------------------------------*/
922 * IRQ callback, called by URB callback
924 static void em28xx_irq_callback(struct urb *urb)
926 struct em28xx *dev = urb->context;
929 switch (urb->status) {
930 case 0: /* success */
931 case -ETIMEDOUT: /* NAK */
933 case -ECONNRESET: /* kill */
938 em28xx_isocdbg("urb completition error %d.\n", urb->status);
942 /* Copy data from URB */
943 spin_lock(&dev->slock);
944 dev->isoc_ctl.isoc_copy(dev, urb);
945 spin_unlock(&dev->slock);
947 /* Reset urb buffers */
948 for (i = 0; i < urb->number_of_packets; i++) {
949 urb->iso_frame_desc[i].status = 0;
950 urb->iso_frame_desc[i].actual_length = 0;
954 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
956 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
962 * Stop and Deallocate URBs
964 void em28xx_uninit_isoc(struct em28xx *dev)
969 em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");
971 dev->isoc_ctl.nfields = -1;
972 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
973 urb = dev->isoc_ctl.urb[i];
975 if (!irqs_disabled())
980 if (dev->isoc_ctl.transfer_buffer[i]) {
981 usb_free_coherent(dev->udev,
982 urb->transfer_buffer_length,
983 dev->isoc_ctl.transfer_buffer[i],
987 dev->isoc_ctl.urb[i] = NULL;
989 dev->isoc_ctl.transfer_buffer[i] = NULL;
992 kfree(dev->isoc_ctl.urb);
993 kfree(dev->isoc_ctl.transfer_buffer);
995 dev->isoc_ctl.urb = NULL;
996 dev->isoc_ctl.transfer_buffer = NULL;
997 dev->isoc_ctl.num_bufs = 0;
999 em28xx_capture_start(dev, 0);
1001 EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
1004 * Allocate URBs and start IRQ
1006 int em28xx_init_isoc(struct em28xx *dev, int max_packets,
1007 int num_bufs, int max_pkt_size,
1008 int (*isoc_copy) (struct em28xx *dev, struct urb *urb))
1010 struct em28xx_dmaqueue *dma_q = &dev->vidq;
1011 struct em28xx_dmaqueue *vbi_dma_q = &dev->vbiq;
1018 em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");
1020 /* De-allocates all pending stuff */
1021 em28xx_uninit_isoc(dev);
1023 dev->isoc_ctl.isoc_copy = isoc_copy;
1024 dev->isoc_ctl.num_bufs = num_bufs;
1026 dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL);
1027 if (!dev->isoc_ctl.urb) {
1028 em28xx_errdev("cannot alloc memory for usb buffers\n");
1032 dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
1034 if (!dev->isoc_ctl.transfer_buffer) {
1035 em28xx_errdev("cannot allocate memory for usb transfer\n");
1036 kfree(dev->isoc_ctl.urb);
1040 dev->isoc_ctl.max_pkt_size = max_pkt_size;
1041 dev->isoc_ctl.vid_buf = NULL;
1042 dev->isoc_ctl.vbi_buf = NULL;
1044 sb_size = max_packets * dev->isoc_ctl.max_pkt_size;
1046 /* allocate urbs and transfer buffers */
1047 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
1048 urb = usb_alloc_urb(max_packets, GFP_KERNEL);
1050 em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
1051 em28xx_uninit_isoc(dev);
1054 dev->isoc_ctl.urb[i] = urb;
1056 dev->isoc_ctl.transfer_buffer[i] = usb_alloc_coherent(dev->udev,
1057 sb_size, GFP_KERNEL, &urb->transfer_dma);
1058 if (!dev->isoc_ctl.transfer_buffer[i]) {
1059 em28xx_err("unable to allocate %i bytes for transfer"
1062 in_interrupt() ? " while in int" : "");
1063 em28xx_uninit_isoc(dev);
1066 memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);
1068 /* FIXME: this is a hack - should be
1069 'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
1070 should also be using 'desc.bInterval'
1072 pipe = usb_rcvisocpipe(dev->udev,
1073 dev->mode == EM28XX_ANALOG_MODE ? 0x82 : 0x84);
1075 usb_fill_int_urb(urb, dev->udev, pipe,
1076 dev->isoc_ctl.transfer_buffer[i], sb_size,
1077 em28xx_irq_callback, dev, 1);
1079 urb->number_of_packets = max_packets;
1080 urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
1083 for (j = 0; j < max_packets; j++) {
1084 urb->iso_frame_desc[j].offset = k;
1085 urb->iso_frame_desc[j].length =
1086 dev->isoc_ctl.max_pkt_size;
1087 k += dev->isoc_ctl.max_pkt_size;
1091 init_waitqueue_head(&dma_q->wq);
1092 init_waitqueue_head(&vbi_dma_q->wq);
1094 em28xx_capture_start(dev, 1);
1096 /* submit urbs and enables IRQ */
1097 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
1098 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
1100 em28xx_err("submit of urb %i failed (error=%i)\n", i,
1102 em28xx_uninit_isoc(dev);
1109 EXPORT_SYMBOL_GPL(em28xx_init_isoc);
1111 /* Determine the packet size for the DVB stream for the given device
1112 (underlying value programmed into the eeprom) */
1113 int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev)
1115 unsigned int chip_cfg2;
1116 unsigned int packet_size = 564;
1118 if (dev->chip_id == CHIP_ID_EM2874) {
1119 /* FIXME - for now assume 564 like it was before, but the
1120 em2874 code should be added to return the proper value... */
1122 } else if (dev->chip_id == CHIP_ID_EM28174) {
1123 /* FIXME same as em2874. 564 was enough for 22 Mbit DVB-T
1124 but too much for 44 Mbit DVB-C. */
1127 /* TS max packet size stored in bits 1-0 of R01 */
1128 chip_cfg2 = em28xx_read_reg(dev, EM28XX_R01_CHIPCFG2);
1129 switch (chip_cfg2 & EM28XX_CHIPCFG2_TS_PACKETSIZE_MASK) {
1130 case EM28XX_CHIPCFG2_TS_PACKETSIZE_188:
1133 case EM28XX_CHIPCFG2_TS_PACKETSIZE_376:
1136 case EM28XX_CHIPCFG2_TS_PACKETSIZE_564:
1139 case EM28XX_CHIPCFG2_TS_PACKETSIZE_752:
1145 em28xx_coredbg("dvb max packet size=%d\n", packet_size);
1148 EXPORT_SYMBOL_GPL(em28xx_isoc_dvb_max_packetsize);
1152 * configure i2c attached devices
1154 void em28xx_wake_i2c(struct em28xx *dev)
1156 v4l2_device_call_all(&dev->v4l2_dev, 0, core, reset, 0);
1157 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_routing,
1158 INPUT(dev->ctl_input)->vmux, 0, 0);
1159 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 0);
1163 * Device control list
1166 static LIST_HEAD(em28xx_devlist);
1167 static DEFINE_MUTEX(em28xx_devlist_mutex);
1170 * em28xx_realease_resources()
1171 * unregisters the v4l2,i2c and usb devices
1172 * called when the device gets disconected or at module unload
1174 void em28xx_remove_from_devlist(struct em28xx *dev)
1176 mutex_lock(&em28xx_devlist_mutex);
1177 list_del(&dev->devlist);
1178 mutex_unlock(&em28xx_devlist_mutex);
1181 void em28xx_add_into_devlist(struct em28xx *dev)
1183 mutex_lock(&em28xx_devlist_mutex);
1184 list_add_tail(&dev->devlist, &em28xx_devlist);
1185 mutex_unlock(&em28xx_devlist_mutex);
1189 * Extension interface
1192 static LIST_HEAD(em28xx_extension_devlist);
1194 int em28xx_register_extension(struct em28xx_ops *ops)
1196 struct em28xx *dev = NULL;
1198 mutex_lock(&em28xx_devlist_mutex);
1199 list_add_tail(&ops->next, &em28xx_extension_devlist);
1200 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1203 printk(KERN_INFO "Em28xx: Initialized (%s) extension\n", ops->name);
1204 mutex_unlock(&em28xx_devlist_mutex);
1207 EXPORT_SYMBOL(em28xx_register_extension);
1209 void em28xx_unregister_extension(struct em28xx_ops *ops)
1211 struct em28xx *dev = NULL;
1213 mutex_lock(&em28xx_devlist_mutex);
1214 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1217 printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name);
1218 list_del(&ops->next);
1219 mutex_unlock(&em28xx_devlist_mutex);
1221 EXPORT_SYMBOL(em28xx_unregister_extension);
1223 void em28xx_init_extension(struct em28xx *dev)
1225 struct em28xx_ops *ops = NULL;
1227 mutex_lock(&em28xx_devlist_mutex);
1228 if (!list_empty(&em28xx_extension_devlist)) {
1229 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1234 mutex_unlock(&em28xx_devlist_mutex);
1237 void em28xx_close_extension(struct em28xx *dev)
1239 struct em28xx_ops *ops = NULL;
1241 mutex_lock(&em28xx_devlist_mutex);
1242 if (!list_empty(&em28xx_extension_devlist)) {
1243 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1248 mutex_unlock(&em28xx_devlist_mutex);