Merge branch 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind...
[pandora-kernel.git] / drivers / media / video / cx18 / cx18-i2c.c
1 /*
2  *  cx18 I2C functions
3  *
4  *  Derived from ivtv-i2c.c
5  *
6  *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
7  *  Copyright (C) 2008  Andy Walls <awalls@radix.net>
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; either version 2 of the License, or
12  *  (at your option) any later version.
13  *
14  *  This program is distributed in the hope that it will be useful,
15  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *  GNU General Public License for more details.
18  *
19  *  You should have received a copy of the GNU General Public License
20  *  along with this program; if not, write to the Free Software
21  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22  *  02111-1307  USA
23  */
24
25 #include "cx18-driver.h"
26 #include "cx18-io.h"
27 #include "cx18-cards.h"
28 #include "cx18-gpio.h"
29 #include "cx18-i2c.h"
30 #include "cx18-irq.h"
31
32 #define CX18_REG_I2C_1_WR   0xf15000
33 #define CX18_REG_I2C_1_RD   0xf15008
34 #define CX18_REG_I2C_2_WR   0xf25100
35 #define CX18_REG_I2C_2_RD   0xf25108
36
37 #define SETSCL_BIT      0x0001
38 #define SETSDL_BIT      0x0002
39 #define GETSCL_BIT      0x0004
40 #define GETSDL_BIT      0x0008
41
42 #define CX18_CS5345_I2C_ADDR            0x4c
43 #define CX18_Z8F0811_IR_TX_I2C_ADDR     0x70
44 #define CX18_Z8F0811_IR_RX_I2C_ADDR     0x71
45
46 /* This array should match the CX18_HW_ defines */
47 static const u8 hw_addrs[] = {
48         0,                              /* CX18_HW_TUNER */
49         0,                              /* CX18_HW_TVEEPROM */
50         CX18_CS5345_I2C_ADDR,           /* CX18_HW_CS5345 */
51         0,                              /* CX18_HW_DVB */
52         0,                              /* CX18_HW_418_AV */
53         0,                              /* CX18_HW_GPIO_MUX */
54         0,                              /* CX18_HW_GPIO_RESET_CTRL */
55         CX18_Z8F0811_IR_TX_I2C_ADDR,    /* CX18_HW_Z8F0811_IR_TX_HAUP */
56         CX18_Z8F0811_IR_RX_I2C_ADDR,    /* CX18_HW_Z8F0811_IR_RX_HAUP */
57 };
58
59 /* This array should match the CX18_HW_ defines */
60 /* This might well become a card-specific array */
61 static const u8 hw_bus[] = {
62         1,      /* CX18_HW_TUNER */
63         0,      /* CX18_HW_TVEEPROM */
64         0,      /* CX18_HW_CS5345 */
65         0,      /* CX18_HW_DVB */
66         0,      /* CX18_HW_418_AV */
67         0,      /* CX18_HW_GPIO_MUX */
68         0,      /* CX18_HW_GPIO_RESET_CTRL */
69         0,      /* CX18_HW_Z8F0811_IR_TX_HAUP */
70         0,      /* CX18_HW_Z8F0811_IR_RX_HAUP */
71 };
72
73 /* This array should match the CX18_HW_ defines */
74 static const char * const hw_modules[] = {
75         "tuner",        /* CX18_HW_TUNER */
76         NULL,           /* CX18_HW_TVEEPROM */
77         "cs5345",       /* CX18_HW_CS5345 */
78         NULL,           /* CX18_HW_DVB */
79         NULL,           /* CX18_HW_418_AV */
80         NULL,           /* CX18_HW_GPIO_MUX */
81         NULL,           /* CX18_HW_GPIO_RESET_CTRL */
82         NULL,           /* CX18_HW_Z8F0811_IR_TX_HAUP */
83         NULL,           /* CX18_HW_Z8F0811_IR_RX_HAUP */
84 };
85
86 /* This array should match the CX18_HW_ defines */
87 static const char * const hw_devicenames[] = {
88         "tuner",
89         "tveeprom",
90         "cs5345",
91         "cx23418_DTV",
92         "cx23418_AV",
93         "gpio_mux",
94         "gpio_reset_ctrl",
95         "ir_tx_z8f0811_haup",
96         "ir_rx_z8f0811_haup",
97 };
98
99 static int cx18_i2c_new_ir(struct cx18 *cx, struct i2c_adapter *adap, u32 hw,
100                            const char *type, u8 addr)
101 {
102         struct i2c_board_info info;
103         struct IR_i2c_init_data *init_data = &cx->ir_i2c_init_data;
104         unsigned short addr_list[2] = { addr, I2C_CLIENT_END };
105
106         memset(&info, 0, sizeof(struct i2c_board_info));
107         strlcpy(info.type, type, I2C_NAME_SIZE);
108
109         /* Our default information for ir-kbd-i2c.c to use */
110         switch (hw) {
111         case CX18_HW_Z8F0811_IR_RX_HAUP:
112                 init_data->ir_codes = RC_MAP_HAUPPAUGE_NEW;
113                 init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
114                 init_data->type = IR_TYPE_RC5;
115                 init_data->name = cx->card_name;
116                 info.platform_data = init_data;
117                 break;
118         }
119
120         return i2c_new_probed_device(adap, &info, addr_list) == NULL ? -1 : 0;
121 }
122
123 int cx18_i2c_register(struct cx18 *cx, unsigned idx)
124 {
125         struct v4l2_subdev *sd;
126         int bus = hw_bus[idx];
127         struct i2c_adapter *adap = &cx->i2c_adap[bus];
128         const char *mod = hw_modules[idx];
129         const char *type = hw_devicenames[idx];
130         u32 hw = 1 << idx;
131
132         if (idx >= ARRAY_SIZE(hw_addrs))
133                 return -1;
134
135         if (hw == CX18_HW_TUNER) {
136                 /* special tuner group handling */
137                 sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
138                                 adap, mod, type, 0, cx->card_i2c->radio);
139                 if (sd != NULL)
140                         sd->grp_id = hw;
141                 sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
142                                 adap, mod, type, 0, cx->card_i2c->demod);
143                 if (sd != NULL)
144                         sd->grp_id = hw;
145                 sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
146                                 adap, mod, type, 0, cx->card_i2c->tv);
147                 if (sd != NULL)
148                         sd->grp_id = hw;
149                 return sd != NULL ? 0 : -1;
150         }
151
152         if (hw & CX18_HW_IR_ANY)
153                 return cx18_i2c_new_ir(cx, adap, hw, type, hw_addrs[idx]);
154
155         /* Is it not an I2C device or one we do not wish to register? */
156         if (!hw_addrs[idx])
157                 return -1;
158
159         /* It's an I2C device other than an analog tuner or IR chip */
160         sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, mod, type, hw_addrs[idx], NULL);
161         if (sd != NULL)
162                 sd->grp_id = hw;
163         return sd != NULL ? 0 : -1;
164 }
165
166 /* Find the first member of the subdev group id in hw */
167 struct v4l2_subdev *cx18_find_hw(struct cx18 *cx, u32 hw)
168 {
169         struct v4l2_subdev *result = NULL;
170         struct v4l2_subdev *sd;
171
172         spin_lock(&cx->v4l2_dev.lock);
173         v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
174                 if (sd->grp_id == hw) {
175                         result = sd;
176                         break;
177                 }
178         }
179         spin_unlock(&cx->v4l2_dev.lock);
180         return result;
181 }
182
183 static void cx18_setscl(void *data, int state)
184 {
185         struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
186         int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
187         u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
188         u32 r = cx18_read_reg(cx, addr);
189
190         if (state)
191                 cx18_write_reg(cx, r | SETSCL_BIT, addr);
192         else
193                 cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
194 }
195
196 static void cx18_setsda(void *data, int state)
197 {
198         struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
199         int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
200         u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
201         u32 r = cx18_read_reg(cx, addr);
202
203         if (state)
204                 cx18_write_reg(cx, r | SETSDL_BIT, addr);
205         else
206                 cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
207 }
208
209 static int cx18_getscl(void *data)
210 {
211         struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
212         int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
213         u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
214
215         return cx18_read_reg(cx, addr) & GETSCL_BIT;
216 }
217
218 static int cx18_getsda(void *data)
219 {
220         struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
221         int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
222         u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
223
224         return cx18_read_reg(cx, addr) & GETSDL_BIT;
225 }
226
227 /* template for i2c-bit-algo */
228 static struct i2c_adapter cx18_i2c_adap_template = {
229         .name = "cx18 i2c driver",
230         .algo = NULL,                   /* set by i2c-algo-bit */
231         .algo_data = NULL,              /* filled from template */
232         .owner = THIS_MODULE,
233 };
234
235 #define CX18_SCL_PERIOD (10) /* usecs. 10 usec is period for a 100 KHz clock */
236 #define CX18_ALGO_BIT_TIMEOUT (2) /* seconds */
237
238 static struct i2c_algo_bit_data cx18_i2c_algo_template = {
239         .setsda         = cx18_setsda,
240         .setscl         = cx18_setscl,
241         .getsda         = cx18_getsda,
242         .getscl         = cx18_getscl,
243         .udelay         = CX18_SCL_PERIOD/2,       /* 1/2 clock period in usec*/
244         .timeout        = CX18_ALGO_BIT_TIMEOUT*HZ /* jiffies */
245 };
246
247 /* init + register i2c algo-bit adapter */
248 int init_cx18_i2c(struct cx18 *cx)
249 {
250         int i, err;
251         CX18_DEBUG_I2C("i2c init\n");
252
253         for (i = 0; i < 2; i++) {
254                 /* Setup algorithm for adapter */
255                 memcpy(&cx->i2c_algo[i], &cx18_i2c_algo_template,
256                         sizeof(struct i2c_algo_bit_data));
257                 cx->i2c_algo_cb_data[i].cx = cx;
258                 cx->i2c_algo_cb_data[i].bus_index = i;
259                 cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];
260
261                 /* Setup adapter */
262                 memcpy(&cx->i2c_adap[i], &cx18_i2c_adap_template,
263                         sizeof(struct i2c_adapter));
264                 cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
265                 sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
266                                 " #%d-%d", cx->instance, i);
267                 i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
268                 cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
269         }
270
271         if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
272                 /* Reset/Unreset I2C hardware block */
273                 /* Clock select 220MHz */
274                 cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
275                                           0x00000000, 0x10001000);
276                 /* Clock Enable */
277                 cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
278                                           0x00001000, 0x10001000);
279         }
280         /* courtesy of Steven Toth <stoth@hauppauge.com> */
281         cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
282         mdelay(10);
283         cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
284         mdelay(10);
285         cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
286         mdelay(10);
287
288         /* Set to edge-triggered intrs. */
289         cx18_write_reg(cx, 0x00c00000, 0xc730c8);
290         /* Clear any stale intrs */
291         cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
292                        ~(HW2_I2C1_INT|HW2_I2C2_INT), HW2_I2C1_INT|HW2_I2C2_INT);
293
294         /* Hw I2C1 Clock Freq ~100kHz */
295         cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
296         cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
297         cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
298
299         /* Hw I2C2 Clock Freq ~100kHz */
300         cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
301         cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
302         cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
303
304         cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
305                      core, reset, (u32) CX18_GPIO_RESET_I2C);
306
307         err = i2c_bit_add_bus(&cx->i2c_adap[0]);
308         if (err)
309                 goto err;
310         err = i2c_bit_add_bus(&cx->i2c_adap[1]);
311         if (err)
312                 goto err_del_bus_0;
313         return 0;
314
315  err_del_bus_0:
316         i2c_del_adapter(&cx->i2c_adap[0]);
317  err:
318         return err;
319 }
320
321 void exit_cx18_i2c(struct cx18 *cx)
322 {
323         int i;
324         CX18_DEBUG_I2C("i2c exit\n");
325         cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
326                                                         CX18_REG_I2C_1_WR);
327         cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
328                                                         CX18_REG_I2C_2_WR);
329
330         for (i = 0; i < 2; i++) {
331                 i2c_del_adapter(&cx->i2c_adap[i]);
332         }
333 }
334
335 /*
336    Hauppauge HVR1600 should have:
337    32 cx24227
338    98 unknown
339    a0 eeprom
340    c2 tuner
341    e? zilog ir
342    */