drivers/media/dvb/frontends/tda10048.c

   1 /*
   2     NXP TDA10048HN DVB OFDM demodulator driver
   3
   4     Copyright (C) 2009 Steven Toth <stoth@kernellabs.com>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 */
  21
  22 #include <linux/kernel.h>
  23 #include <linux/init.h>
  24 #include <linux/module.h>
  25 #include <linux/string.h>
  26 #include <linux/slab.h>
  27 #include <linux/delay.h>
  28 #include <asm/div64.h>
  29 #include "dvb_frontend.h"
  30 #include "dvb_math.h"
  31 #include "tda10048.h"
  32
  33 #define TDA10048_DEFAULT_FIRMWARE "dvb-fe-tda10048-1.0.fw"
  34 #define TDA10048_DEFAULT_FIRMWARE_SIZE 24878
  35
  36 /* Register name definitions */
  37 #define TDA10048_IDENTITY          0x00
  38 #define TDA10048_VERSION           0x01
  39 #define TDA10048_DSP_CODE_CPT      0x0C
  40 #define TDA10048_DSP_CODE_IN       0x0E
  41 #define TDA10048_IN_CONF1          0x10
  42 #define TDA10048_IN_CONF2          0x11
  43 #define TDA10048_IN_CONF3          0x12
  44 #define TDA10048_OUT_CONF1         0x14
  45 #define TDA10048_OUT_CONF2         0x15
  46 #define TDA10048_OUT_CONF3         0x16
  47 #define TDA10048_AUTO              0x18
  48 #define TDA10048_SYNC_STATUS       0x1A
  49 #define TDA10048_CONF_C4_1         0x1E
  50 #define TDA10048_CONF_C4_2         0x1F
  51 #define TDA10048_CODE_IN_RAM       0x20
  52 #define TDA10048_CHANNEL_INFO_1_R  0x22
  53 #define TDA10048_CHANNEL_INFO_2_R  0x23
  54 #define TDA10048_CHANNEL_INFO1     0x24
  55 #define TDA10048_CHANNEL_INFO2     0x25
  56 #define TDA10048_TIME_ERROR_R      0x26
  57 #define TDA10048_TIME_ERROR        0x27
  58 #define TDA10048_FREQ_ERROR_LSB_R  0x28
  59 #define TDA10048_FREQ_ERROR_MSB_R  0x29
  60 #define TDA10048_FREQ_ERROR_LSB    0x2A
  61 #define TDA10048_FREQ_ERROR_MSB    0x2B
  62 #define TDA10048_IT_SEL            0x30
  63 #define TDA10048_IT_STAT           0x32
  64 #define TDA10048_DSP_AD_LSB        0x3C
  65 #define TDA10048_DSP_AD_MSB        0x3D
  66 #define TDA10048_DSP_REF_LSB       0x3E
  67 #define TDA10048_DSP_REF_MSB       0x3F
  68 #define TDA10048_CONF_TRISTATE1    0x44
  69 #define TDA10048_CONF_TRISTATE2    0x45
  70 #define TDA10048_CONF_POLARITY     0x46
  71 #define TDA10048_GPIO_SP_DS0       0x48
  72 #define TDA10048_GPIO_SP_DS1       0x49
  73 #define TDA10048_GPIO_SP_DS2       0x4A
  74 #define TDA10048_GPIO_SP_DS3       0x4B
  75 #define TDA10048_GPIO_OUT_SEL      0x4C
  76 #define TDA10048_GPIO_SELECT       0x4D
  77 #define TDA10048_IC_MODE           0x4E
  78 #define TDA10048_CONF_XO           0x50
  79 #define TDA10048_CONF_PLL1         0x51
  80 #define TDA10048_CONF_PLL2         0x52
  81 #define TDA10048_CONF_PLL3         0x53
  82 #define TDA10048_CONF_ADC          0x54
  83 #define TDA10048_CONF_ADC_2        0x55
  84 #define TDA10048_CONF_C1_1         0x60
  85 #define TDA10048_CONF_C1_3         0x62
  86 #define TDA10048_AGC_CONF          0x70
  87 #define TDA10048_AGC_THRESHOLD_LSB 0x72
  88 #define TDA10048_AGC_THRESHOLD_MSB 0x73
  89 #define TDA10048_AGC_RENORM        0x74
  90 #define TDA10048_AGC_GAINS         0x76
  91 #define TDA10048_AGC_TUN_MIN       0x78
  92 #define TDA10048_AGC_TUN_MAX       0x79
  93 #define TDA10048_AGC_IF_MIN        0x7A
  94 #define TDA10048_AGC_IF_MAX        0x7B
  95 #define TDA10048_AGC_TUN_LEVEL     0x7E
  96 #define TDA10048_AGC_IF_LEVEL      0x7F
  97 #define TDA10048_DIG_AGC_LEVEL     0x81
  98 #define TDA10048_FREQ_PHY2_LSB     0x86
  99 #define TDA10048_FREQ_PHY2_MSB     0x87
 100 #define TDA10048_TIME_INVWREF_LSB  0x88
 101 #define TDA10048_TIME_INVWREF_MSB  0x89
 102 #define TDA10048_TIME_WREF_LSB     0x8A
 103 #define TDA10048_TIME_WREF_MID1    0x8B
 104 #define TDA10048_TIME_WREF_MID2    0x8C
 105 #define TDA10048_TIME_WREF_MSB     0x8D
 106 #define TDA10048_NP_OUT            0xA2
 107 #define TDA10048_CELL_ID_LSB       0xA4
 108 #define TDA10048_CELL_ID_MSB       0xA5
 109 #define TDA10048_EXTTPS_ODD        0xAA
 110 #define TDA10048_EXTTPS_EVEN       0xAB
 111 #define TDA10048_TPS_LENGTH        0xAC
 112 #define TDA10048_FREE_REG_1        0xB2
 113 #define TDA10048_FREE_REG_2        0xB3
 114 #define TDA10048_CONF_C3_1         0xC0
 115 #define TDA10048_CYBER_CTRL        0xC2
 116 #define TDA10048_CBER_NMAX_LSB     0xC4
 117 #define TDA10048_CBER_NMAX_MSB     0xC5
 118 #define TDA10048_CBER_LSB          0xC6
 119 #define TDA10048_CBER_MSB          0xC7
 120 #define TDA10048_VBER_LSB          0xC8
 121 #define TDA10048_VBER_MID          0xC9
 122 #define TDA10048_VBER_MSB          0xCA
 123 #define TDA10048_CYBER_LUT         0xCC
 124 #define TDA10048_UNCOR_CTRL        0xCD
 125 #define TDA10048_UNCOR_CPT_LSB     0xCE
 126 #define TDA10048_UNCOR_CPT_MSB     0xCF
 127 #define TDA10048_SOFT_IT_C3        0xD6
 128 #define TDA10048_CONF_TS2          0xE0
 129 #define TDA10048_CONF_TS1          0xE1
 130
 131 static unsigned int debug;
 132
 133 #define dprintk(level, fmt, arg...)\
 134         do { if (debug >= level)\
 135                 printk(KERN_DEBUG "tda10048: " fmt, ## arg);\
 136         } while (0)
 137
 138 struct tda10048_state {
 139
 140         struct i2c_adapter *i2c;
 141
 142         /* We'll cache and update the attach config settings */
 143         struct tda10048_config config;
 144         struct dvb_frontend frontend;
 145
 146         int fwloaded;
 147
 148         u32 freq_if_hz;
 149         u32 xtal_hz;
 150         u32 pll_mfactor;
 151         u32 pll_nfactor;
 152         u32 pll_pfactor;
 153         u32 sample_freq;
 154
 155         enum fe_bandwidth bandwidth;
 156 };
 157
 158 static struct init_tab {
 159         u8      reg;
 160         u16     data;
 161 } init_tab[] = {
 162         { TDA10048_CONF_PLL1, 0x08 },
 163         { TDA10048_CONF_ADC_2, 0x00 },
 164         { TDA10048_CONF_C4_1, 0x00 },
 165         { TDA10048_CONF_PLL1, 0x0f },
 166         { TDA10048_CONF_PLL2, 0x0a },
 167         { TDA10048_CONF_PLL3, 0x43 },
 168         { TDA10048_FREQ_PHY2_LSB, 0x02 },
 169         { TDA10048_FREQ_PHY2_MSB, 0x0a },
 170         { TDA10048_TIME_WREF_LSB, 0xbd },
 171         { TDA10048_TIME_WREF_MID1, 0xe4 },
 172         { TDA10048_TIME_WREF_MID2, 0xa8 },
 173         { TDA10048_TIME_WREF_MSB, 0x02 },
 174         { TDA10048_TIME_INVWREF_LSB, 0x04 },
 175         { TDA10048_TIME_INVWREF_MSB, 0x06 },
 176         { TDA10048_CONF_C4_1, 0x00 },
 177         { TDA10048_CONF_C1_1, 0xa8 },
 178         { TDA10048_AGC_CONF, 0x16 },
 179         { TDA10048_CONF_C1_3, 0x0b },
 180         { TDA10048_AGC_TUN_MIN, 0x00 },
 181         { TDA10048_AGC_TUN_MAX, 0xff },
 182         { TDA10048_AGC_IF_MIN, 0x00 },
 183         { TDA10048_AGC_IF_MAX, 0xff },
 184         { TDA10048_AGC_THRESHOLD_MSB, 0x00 },
 185         { TDA10048_AGC_THRESHOLD_LSB, 0x70 },
 186         { TDA10048_CYBER_CTRL, 0x38 },
 187         { TDA10048_AGC_GAINS, 0x12 },
 188         { TDA10048_CONF_XO, 0x00 },
 189         { TDA10048_CONF_TS1, 0x07 },
 190         { TDA10048_IC_MODE, 0x00 },
 191         { TDA10048_CONF_TS2, 0xc0 },
 192         { TDA10048_CONF_TRISTATE1, 0x21 },
 193         { TDA10048_CONF_TRISTATE2, 0x00 },
 194         { TDA10048_CONF_POLARITY, 0x00 },
 195         { TDA10048_CONF_C4_2, 0x04 },
 196         { TDA10048_CONF_ADC, 0x60 },
 197         { TDA10048_CONF_ADC_2, 0x10 },
 198         { TDA10048_CONF_ADC, 0x60 },
 199         { TDA10048_CONF_ADC_2, 0x00 },
 200         { TDA10048_CONF_C1_1, 0xa8 },
 201         { TDA10048_UNCOR_CTRL, 0x00 },
 202         { TDA10048_CONF_C4_2, 0x04 },
 203 };
 204
 205 static struct pll_tab {
 206         u32     clk_freq_khz;
 207         u32     if_freq_khz;
 208         u8      m, n, p;
 209 } pll_tab[] = {
 210         { TDA10048_CLK_4000,  TDA10048_IF_36130, 10, 0, 0 },
 211         { TDA10048_CLK_16000, TDA10048_IF_3300,  10, 3, 0 },
 212         { TDA10048_CLK_16000, TDA10048_IF_3500,  10, 3, 0 },
 213         { TDA10048_CLK_16000, TDA10048_IF_3800,  10, 3, 0 },
 214         { TDA10048_CLK_16000, TDA10048_IF_4000,  10, 3, 0 },
 215         { TDA10048_CLK_16000, TDA10048_IF_4300,  10, 3, 0 },
 216         { TDA10048_CLK_16000, TDA10048_IF_36130, 10, 3, 0 },
 217 };
 218
 219 static int tda10048_writereg(struct tda10048_state *state, u8 reg, u8 data)
 220 {
 221         struct tda10048_config *config = &state->config;
 222         int ret;
 223         u8 buf[] = { reg, data };
 224         struct i2c_msg msg = {
 225                 .addr = config->demod_address,
 226                 .flags = 0, .buf = buf, .len = 2 };
 227
 228         dprintk(2, "%s(reg = 0x%02x, data = 0x%02x)\n", __func__, reg, data);
 229
 230         ret = i2c_transfer(state->i2c, &msg, 1);
 231
 232         if (ret != 1)
 233                 printk("%s: writereg error (ret == %i)\n", __func__, ret);
 234
 235         return (ret != 1) ? -1 : 0;
 236 }
 237
 238 static u8 tda10048_readreg(struct tda10048_state *state, u8 reg)
 239 {
 240         struct tda10048_config *config = &state->config;
 241         int ret;
 242         u8 b0[] = { reg };
 243         u8 b1[] = { 0 };
 244         struct i2c_msg msg[] = {
 245                 { .addr = config->demod_address,
 246                         .flags = 0, .buf = b0, .len = 1 },
 247                 { .addr = config->demod_address,
 248                         .flags = I2C_M_RD, .buf = b1, .len = 1 } };
 249
 250         dprintk(2, "%s(reg = 0x%02x)\n", __func__, reg);
 251
 252         ret = i2c_transfer(state->i2c, msg, 2);
 253
 254         if (ret != 2)
 255                 printk(KERN_ERR "%s: readreg error (ret == %i)\n",
 256                         __func__, ret);
 257
 258         return b1[0];
 259 }
 260
 261 static int tda10048_writeregbulk(struct tda10048_state *state, u8 reg,
 262                                  const u8 *data, u16 len)
 263 {
 264         struct tda10048_config *config = &state->config;
 265         int ret = -EREMOTEIO;
 266         struct i2c_msg msg;
 267         u8 *buf;
 268
 269         dprintk(2, "%s(%d, ?, len = %d)\n", __func__, reg, len);
 270
 271         buf = kmalloc(len + 1, GFP_KERNEL);
 272         if (buf == NULL) {
 273                 ret = -ENOMEM;
 274                 goto error;
 275         }
 276
 277         *buf = reg;
 278         memcpy(buf + 1, data, len);
 279
 280         msg.addr = config->demod_address;
 281         msg.flags = 0;
 282         msg.buf = buf;
 283         msg.len = len + 1;
 284
 285         dprintk(2, "%s():  write len = %d\n",
 286                 __func__, msg.len);
 287
 288         ret = i2c_transfer(state->i2c, &msg, 1);
 289         if (ret != 1) {
 290                 printk(KERN_ERR "%s(): writereg error err %i\n",
 291                          __func__, ret);
 292                 ret = -EREMOTEIO;
 293         }
 294
 295 error:
 296         kfree(buf);
 297
 298         return ret;
 299 }
 300
 301 static int tda10048_set_phy2(struct dvb_frontend *fe, u32 sample_freq_hz,
 302                              u32 if_hz)
 303 {
 304         struct tda10048_state *state = fe->demodulator_priv;
 305         u64 t;
 306
 307         dprintk(1, "%s()\n", __func__);
 308
 309         if (sample_freq_hz == 0)
 310                 return -EINVAL;
 311
 312         if (if_hz < (sample_freq_hz / 2)) {
 313                 /* PHY2 = (if2/fs) * 2^15 */
 314                 t = if_hz;
 315                 t *= 10;
 316                 t *= 32768;
 317                 do_div(t, sample_freq_hz);
 318                 t += 5;
 319                 do_div(t, 10);
 320         } else {
 321                 /* PHY2 = ((IF1-fs)/fs) * 2^15 */
 322                 t = sample_freq_hz - if_hz;
 323                 t *= 10;
 324                 t *= 32768;
 325                 do_div(t, sample_freq_hz);
 326                 t += 5;
 327                 do_div(t, 10);
 328                 t = ~t + 1;
 329         }
 330
 331         tda10048_writereg(state, TDA10048_FREQ_PHY2_LSB, (u8)t);
 332         tda10048_writereg(state, TDA10048_FREQ_PHY2_MSB, (u8)(t >> 8));
 333
 334         return 0;
 335 }
 336
 337 static int tda10048_set_wref(struct dvb_frontend *fe, u32 sample_freq_hz,
 338                              u32 bw)
 339 {
 340         struct tda10048_state *state = fe->demodulator_priv;
 341         u64 t, z;
 342         u32 b = 8000000;
 343
 344         dprintk(1, "%s()\n", __func__);
 345
 346         if (sample_freq_hz == 0)
 347                 return -EINVAL;
 348
 349         if (bw == BANDWIDTH_6_MHZ)
 350                 b = 6000000;
 351         else
 352         if (bw == BANDWIDTH_7_MHZ)
 353                 b = 7000000;
 354
 355         /* WREF = (B / (7 * fs)) * 2^31 */
 356         t = b * 10;
 357         /* avoid warning: this decimal constant is unsigned only in ISO C90 */
 358         /* t *= 2147483648 on 32bit platforms */
 359         t *= (2048 * 1024);
 360         t *= 1024;
 361         z = 7 * sample_freq_hz;
 362         do_div(t, z);
 363         t += 5;
 364         do_div(t, 10);
 365
 366         tda10048_writereg(state, TDA10048_TIME_WREF_LSB, (u8)t);
 367         tda10048_writereg(state, TDA10048_TIME_WREF_MID1, (u8)(t >> 8));
 368         tda10048_writereg(state, TDA10048_TIME_WREF_MID2, (u8)(t >> 16));
 369         tda10048_writereg(state, TDA10048_TIME_WREF_MSB, (u8)(t >> 24));
 370
 371         return 0;
 372 }
 373
 374 static int tda10048_set_invwref(struct dvb_frontend *fe, u32 sample_freq_hz,
 375                                 u32 bw)
 376 {
 377         struct tda10048_state *state = fe->demodulator_priv;
 378         u64 t;
 379         u32 b = 8000000;
 380
 381         dprintk(1, "%s()\n", __func__);
 382
 383         if (sample_freq_hz == 0)
 384                 return -EINVAL;
 385
 386         if (bw == BANDWIDTH_6_MHZ)
 387                 b = 6000000;
 388         else
 389         if (bw == BANDWIDTH_7_MHZ)
 390                 b = 7000000;
 391
 392         /* INVWREF = ((7 * fs) / B) * 2^5 */
 393         t = sample_freq_hz;
 394         t *= 7;
 395         t *= 32;
 396         t *= 10;
 397         do_div(t, b);
 398         t += 5;
 399         do_div(t, 10);
 400
 401         tda10048_writereg(state, TDA10048_TIME_INVWREF_LSB, (u8)t);
 402         tda10048_writereg(state, TDA10048_TIME_INVWREF_MSB, (u8)(t >> 8));
 403
 404         return 0;
 405 }
 406
 407 static int tda10048_set_bandwidth(struct dvb_frontend *fe,
 408         enum fe_bandwidth bw)
 409 {
 410         struct tda10048_state *state = fe->demodulator_priv;
 411         dprintk(1, "%s(bw=%d)\n", __func__, bw);
 412
 413         /* Bandwidth setting may need to be adjusted */
 414         switch (bw) {
 415         case BANDWIDTH_6_MHZ:
 416         case BANDWIDTH_7_MHZ:
 417         case BANDWIDTH_8_MHZ:
 418                 tda10048_set_wref(fe, state->sample_freq, bw);
 419                 tda10048_set_invwref(fe, state->sample_freq, bw);
 420                 break;
 421         default:
 422                 printk(KERN_ERR "%s() invalid bandwidth\n", __func__);
 423                 return -EINVAL;
 424         }
 425
 426         state->bandwidth = bw;
 427
 428         return 0;
 429 }
 430
 431 static int tda10048_set_if(struct dvb_frontend *fe, enum fe_bandwidth bw)
 432 {
 433         struct tda10048_state *state = fe->demodulator_priv;
 434         struct tda10048_config *config = &state->config;
 435         int i;
 436         u32 if_freq_khz;
 437
 438         dprintk(1, "%s(bw = %d)\n", __func__, bw);
 439
 440         /* based on target bandwidth and clk we calculate pll factors */
 441         switch (bw) {
 442         case BANDWIDTH_6_MHZ:
 443                 if_freq_khz = config->dtv6_if_freq_khz;
 444                 break;
 445         case BANDWIDTH_7_MHZ:
 446                 if_freq_khz = config->dtv7_if_freq_khz;
 447                 break;
 448         case BANDWIDTH_8_MHZ:
 449                 if_freq_khz = config->dtv8_if_freq_khz;
 450                 break;
 451         default:
 452                 printk(KERN_ERR "%s() no default\n", __func__);
 453                 return -EINVAL;
 454         }
 455
 456         for (i = 0; i < ARRAY_SIZE(pll_tab); i++) {
 457                 if ((pll_tab[i].clk_freq_khz == config->clk_freq_khz) &&
 458                         (pll_tab[i].if_freq_khz == if_freq_khz)) {
 459
 460                         state->freq_if_hz = pll_tab[i].if_freq_khz * 1000;
 461                         state->xtal_hz = pll_tab[i].clk_freq_khz * 1000;
 462                         state->pll_mfactor = pll_tab[i].m;
 463                         state->pll_nfactor = pll_tab[i].n;
 464                         state->pll_pfactor = pll_tab[i].p;
 465                         break;
 466                 }
 467         }
 468         if (i == ARRAY_SIZE(pll_tab)) {
 469                 printk(KERN_ERR "%s() Incorrect attach settings\n",
 470                         __func__);
 471                 return -EINVAL;
 472         }
 473
 474         dprintk(1, "- freq_if_hz = %d\n", state->freq_if_hz);
 475         dprintk(1, "- xtal_hz = %d\n", state->xtal_hz);
 476         dprintk(1, "- pll_mfactor = %d\n", state->pll_mfactor);
 477         dprintk(1, "- pll_nfactor = %d\n", state->pll_nfactor);
 478         dprintk(1, "- pll_pfactor = %d\n", state->pll_pfactor);
 479
 480         /* Calculate the sample frequency */
 481         state->sample_freq = state->xtal_hz * (state->pll_mfactor + 45);
 482         state->sample_freq /= (state->pll_nfactor + 1);
 483         state->sample_freq /= (state->pll_pfactor + 4);
 484         dprintk(1, "- sample_freq = %d\n", state->sample_freq);
 485
 486         /* Update the I/F */
 487         tda10048_set_phy2(fe, state->sample_freq, state->freq_if_hz);
 488
 489         return 0;
 490 }
 491
 492 static int tda10048_firmware_upload(struct dvb_frontend *fe)
 493 {
 494         struct tda10048_state *state = fe->demodulator_priv;
 495         struct tda10048_config *config = &state->config;
 496         const struct firmware *fw;
 497         int ret;
 498         int pos = 0;
 499         int cnt;
 500         u8 wlen = config->fwbulkwritelen;
 501
 502         if ((wlen != TDA10048_BULKWRITE_200) && (wlen != TDA10048_BULKWRITE_50))
 503                 wlen = TDA10048_BULKWRITE_200;
 504
 505         /* request the firmware, this will block and timeout */
 506         printk(KERN_INFO "%s: waiting for firmware upload (%s)...\n",
 507                 __func__,
 508                 TDA10048_DEFAULT_FIRMWARE);
 509
 510         ret = request_firmware(&fw, TDA10048_DEFAULT_FIRMWARE,
 511                 state->i2c->dev.parent);
 512         if (ret) {
 513                 printk(KERN_ERR "%s: Upload failed. (file not found?)\n",
 514                         __func__);
 515                 return -EIO;
 516         } else {
 517                 printk(KERN_INFO "%s: firmware read %Zu bytes.\n",
 518                         __func__,
 519                         fw->size);
 520                 ret = 0;
 521         }
 522
 523         if (fw->size != TDA10048_DEFAULT_FIRMWARE_SIZE) {
 524                 printk(KERN_ERR "%s: firmware incorrect size\n", __func__);
 525                 ret = -EIO;
 526         } else {
 527                 printk(KERN_INFO "%s: firmware uploading\n", __func__);
 528
 529                 /* Soft reset */
 530                 tda10048_writereg(state, TDA10048_CONF_TRISTATE1,
 531                         tda10048_readreg(state, TDA10048_CONF_TRISTATE1)
 532                                 & 0xfe);
 533                 tda10048_writereg(state, TDA10048_CONF_TRISTATE1,
 534                         tda10048_readreg(state, TDA10048_CONF_TRISTATE1)
 535                                 | 0x01);
 536
 537                 /* Put the demod into host download mode */
 538                 tda10048_writereg(state, TDA10048_CONF_C4_1,
 539                         tda10048_readreg(state, TDA10048_CONF_C4_1) & 0xf9);
 540
 541                 /* Boot the DSP */
 542                 tda10048_writereg(state, TDA10048_CONF_C4_1,
 543                         tda10048_readreg(state, TDA10048_CONF_C4_1) | 0x08);
 544
 545                 /* Prepare for download */
 546                 tda10048_writereg(state, TDA10048_DSP_CODE_CPT, 0);
 547
 548                 /* Download the firmware payload */
 549                 while (pos < fw->size) {
 550
 551                         if ((fw->size - pos) > wlen)
 552                                 cnt = wlen;
 553                         else
 554                                 cnt = fw->size - pos;
 555
 556                         tda10048_writeregbulk(state, TDA10048_DSP_CODE_IN,
 557                                 &fw->data[pos], cnt);
 558
 559                         pos += cnt;
 560                 }
 561
 562                 ret = -EIO;
 563                 /* Wait up to 250ms for the DSP to boot */
 564                 for (cnt = 0; cnt < 250 ; cnt += 10) {
 565
 566                         msleep(10);
 567
 568                         if (tda10048_readreg(state, TDA10048_SYNC_STATUS)
 569                                 & 0x40) {
 570                                 ret = 0;
 571                                 break;
 572                         }
 573                 }
 574         }
 575
 576         release_firmware(fw);
 577
 578         if (ret == 0) {
 579                 printk(KERN_INFO "%s: firmware uploaded\n", __func__);
 580                 state->fwloaded = 1;
 581         } else
 582                 printk(KERN_ERR "%s: firmware upload failed\n", __func__);
 583
 584         return ret;
 585 }
 586
 587 static int tda10048_set_inversion(struct dvb_frontend *fe, int inversion)
 588 {
 589         struct tda10048_state *state = fe->demodulator_priv;
 590
 591         dprintk(1, "%s(%d)\n", __func__, inversion);
 592
 593         if (inversion == TDA10048_INVERSION_ON)
 594                 tda10048_writereg(state, TDA10048_CONF_C1_1,
 595                         tda10048_readreg(state, TDA10048_CONF_C1_1) | 0x20);
 596         else
 597                 tda10048_writereg(state, TDA10048_CONF_C1_1,
 598                         tda10048_readreg(state, TDA10048_CONF_C1_1) & 0xdf);
 599
 600         return 0;
 601 }
 602
 603 /* Retrieve the demod settings */
 604 static int tda10048_get_tps(struct tda10048_state *state,
 605         struct dvb_ofdm_parameters *p)
 606 {
 607         u8 val;
 608
 609         /* Make sure the TPS regs are valid */
 610         if (!(tda10048_readreg(state, TDA10048_AUTO) & 0x01))
 611                 return -EAGAIN;
 612
 613         val = tda10048_readreg(state, TDA10048_OUT_CONF2);
 614         switch ((val & 0x60) >> 5) {
 615         case 0:
 616                 p->constellation = QPSK;
 617                 break;
 618         case 1:
 619                 p->constellation = QAM_16;
 620                 break;
 621         case 2:
 622                 p->constellation = QAM_64;
 623                 break;
 624         }
 625         switch ((val & 0x18) >> 3) {
 626         case 0:
 627                 p->hierarchy_information = HIERARCHY_NONE;
 628                 break;
 629         case 1:
 630                 p->hierarchy_information = HIERARCHY_1;
 631                 break;
 632         case 2:
 633                 p->hierarchy_information = HIERARCHY_2;
 634                 break;
 635         case 3:
 636                 p->hierarchy_information = HIERARCHY_4;
 637                 break;
 638         }
 639         switch (val & 0x07) {
 640         case 0:
 641                 p->code_rate_HP = FEC_1_2;
 642                 break;
 643         case 1:
 644                 p->code_rate_HP = FEC_2_3;
 645                 break;
 646         case 2:
 647                 p->code_rate_HP = FEC_3_4;
 648                 break;
 649         case 3:
 650                 p->code_rate_HP = FEC_5_6;
 651                 break;
 652         case 4:
 653                 p->code_rate_HP = FEC_7_8;
 654                 break;
 655         }
 656
 657         val = tda10048_readreg(state, TDA10048_OUT_CONF3);
 658         switch (val & 0x07) {
 659         case 0:
 660                 p->code_rate_LP = FEC_1_2;
 661                 break;
 662         case 1:
 663                 p->code_rate_LP = FEC_2_3;
 664                 break;
 665         case 2:
 666                 p->code_rate_LP = FEC_3_4;
 667                 break;
 668         case 3:
 669                 p->code_rate_LP = FEC_5_6;
 670                 break;
 671         case 4:
 672                 p->code_rate_LP = FEC_7_8;
 673                 break;
 674         }
 675
 676         val = tda10048_readreg(state, TDA10048_OUT_CONF1);
 677         switch ((val & 0x0c) >> 2) {
 678         case 0:
 679                 p->guard_interval = GUARD_INTERVAL_1_32;
 680                 break;
 681         case 1:
 682                 p->guard_interval = GUARD_INTERVAL_1_16;
 683                 break;
 684         case 2:
 685                 p->guard_interval =  GUARD_INTERVAL_1_8;
 686                 break;
 687         case 3:
 688                 p->guard_interval =  GUARD_INTERVAL_1_4;
 689                 break;
 690         }
 691         switch (val & 0x02) {
 692         case 0:
 693                 p->transmission_mode = TRANSMISSION_MODE_2K;
 694                 break;
 695         case 1:
 696                 p->transmission_mode = TRANSMISSION_MODE_8K;
 697                 break;
 698         }
 699
 700         return 0;
 701 }
 702
 703 static int tda10048_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
 704 {
 705         struct tda10048_state *state = fe->demodulator_priv;
 706         struct tda10048_config *config = &state->config;
 707         dprintk(1, "%s(%d)\n", __func__, enable);
 708
 709         if (config->disable_gate_access)
 710                 return 0;
 711
 712         if (enable)
 713                 return tda10048_writereg(state, TDA10048_CONF_C4_1,
 714                         tda10048_readreg(state, TDA10048_CONF_C4_1) | 0x02);
 715         else
 716                 return tda10048_writereg(state, TDA10048_CONF_C4_1,
 717                         tda10048_readreg(state, TDA10048_CONF_C4_1) & 0xfd);
 718 }
 719
 720 static int tda10048_output_mode(struct dvb_frontend *fe, int serial)
 721 {
 722         struct tda10048_state *state = fe->demodulator_priv;
 723         dprintk(1, "%s(%d)\n", __func__, serial);
 724
 725         /* Ensure pins are out of tri-state */
 726         tda10048_writereg(state, TDA10048_CONF_TRISTATE1, 0x21);
 727         tda10048_writereg(state, TDA10048_CONF_TRISTATE2, 0x00);
 728
 729         if (serial) {
 730                 tda10048_writereg(state, TDA10048_IC_MODE, 0x80 | 0x20);
 731                 tda10048_writereg(state, TDA10048_CONF_TS2, 0xc0);
 732         } else {
 733                 tda10048_writereg(state, TDA10048_IC_MODE, 0x00);
 734                 tda10048_writereg(state, TDA10048_CONF_TS2, 0x01);
 735         }
 736
 737         return 0;
 738 }
 739
 740 /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
 741 /* TODO: Support manual tuning with specific params */
 742 static int tda10048_set_frontend(struct dvb_frontend *fe,
 743         struct dvb_frontend_parameters *p)
 744 {
 745         struct tda10048_state *state = fe->demodulator_priv;
 746
 747         dprintk(1, "%s(frequency=%d)\n", __func__, p->frequency);
 748
 749         /* Update the I/F pll's if the bandwidth changes */
 750         if (p->u.ofdm.bandwidth != state->bandwidth) {
 751                 tda10048_set_if(fe, p->u.ofdm.bandwidth);
 752                 tda10048_set_bandwidth(fe, p->u.ofdm.bandwidth);
 753         }
 754
 755         if (fe->ops.tuner_ops.set_params) {
 756
 757                 if (fe->ops.i2c_gate_ctrl)
 758                         fe->ops.i2c_gate_ctrl(fe, 1);
 759
 760                 fe->ops.tuner_ops.set_params(fe, p);
 761
 762                 if (fe->ops.i2c_gate_ctrl)
 763                         fe->ops.i2c_gate_ctrl(fe, 0);
 764         }
 765
 766         /* Enable demod TPS auto detection and begin acquisition */
 767         tda10048_writereg(state, TDA10048_AUTO, 0x57);
 768
 769         return 0;
 770 }
 771
 772 /* Establish sane defaults and load firmware. */
 773 static int tda10048_init(struct dvb_frontend *fe)
 774 {
 775         struct tda10048_state *state = fe->demodulator_priv;
 776         struct tda10048_config *config = &state->config;
 777         int ret = 0, i;
 778
 779         dprintk(1, "%s()\n", __func__);
 780
 781         /* Apply register defaults */
 782         for (i = 0; i < ARRAY_SIZE(init_tab); i++)
 783                 tda10048_writereg(state, init_tab[i].reg, init_tab[i].data);
 784
 785         if (state->fwloaded == 0)
 786                 ret = tda10048_firmware_upload(fe);
 787
 788         /* Set either serial or parallel */
 789         tda10048_output_mode(fe, config->output_mode);
 790
 791         /* Set inversion */
 792         tda10048_set_inversion(fe, config->inversion);
 793
 794         /* Establish default RF values */
 795         tda10048_set_if(fe, BANDWIDTH_8_MHZ);
 796         tda10048_set_bandwidth(fe, BANDWIDTH_8_MHZ);
 797
 798         /* Ensure we leave the gate closed */
 799         tda10048_i2c_gate_ctrl(fe, 0);
 800
 801         return ret;
 802 }
 803
 804 static int tda10048_read_status(struct dvb_frontend *fe, fe_status_t *status)
 805 {
 806         struct tda10048_state *state = fe->demodulator_priv;
 807         u8 reg;
 808
 809         *status = 0;
 810
 811         reg = tda10048_readreg(state, TDA10048_SYNC_STATUS);
 812
 813         dprintk(1, "%s() status =0x%02x\n", __func__, reg);
 814
 815         if (reg & 0x02)
 816                 *status |= FE_HAS_CARRIER;
 817
 818         if (reg & 0x04)
 819                 *status |= FE_HAS_SIGNAL;
 820
 821         if (reg & 0x08) {
 822                 *status |= FE_HAS_LOCK;
 823                 *status |= FE_HAS_VITERBI;
 824                 *status |= FE_HAS_SYNC;
 825         }
 826
 827         return 0;
 828 }
 829
 830 static int tda10048_read_ber(struct dvb_frontend *fe, u32 *ber)
 831 {
 832         struct tda10048_state *state = fe->demodulator_priv;
 833
 834         dprintk(1, "%s()\n", __func__);
 835
 836         /* TODO: A reset may be required here */
 837         *ber = tda10048_readreg(state, TDA10048_CBER_MSB) << 8 |
 838                 tda10048_readreg(state, TDA10048_CBER_LSB);
 839
 840         return 0;
 841 }
 842
 843 static int tda10048_read_signal_strength(struct dvb_frontend *fe,
 844         u16 *signal_strength)
 845 {
 846         struct tda10048_state *state = fe->demodulator_priv;
 847         u8 v;
 848
 849         dprintk(1, "%s()\n", __func__);
 850
 851         *signal_strength = 65535;
 852
 853         v = tda10048_readreg(state, TDA10048_NP_OUT);
 854         if (v > 0)
 855                 *signal_strength -= (v << 8) | v;
 856
 857         return 0;
 858 }
 859
 860 /* SNR lookup table */
 861 static struct snr_tab {
 862         u8 val;
 863         u8 data;
 864 } snr_tab[] = {
 865         {   0,   0 },
 866         {   1, 246 },
 867         {   2, 215 },
 868         {   3, 198 },
 869         {   4, 185 },
 870         {   5, 176 },
 871         {   6, 168 },
 872         {   7, 161 },
 873         {   8, 155 },
 874         {   9, 150 },
 875         {  10, 146 },
 876         {  11, 141 },
 877         {  12, 138 },
 878         {  13, 134 },
 879         {  14, 131 },
 880         {  15, 128 },
 881         {  16, 125 },
 882         {  17, 122 },
 883         {  18, 120 },
 884         {  19, 118 },
 885         {  20, 115 },
 886         {  21, 113 },
 887         {  22, 111 },
 888         {  23, 109 },
 889         {  24, 107 },
 890         {  25, 106 },
 891         {  26, 104 },
 892         {  27, 102 },
 893         {  28, 101 },
 894         {  29,  99 },
 895         {  30,  98 },
 896         {  31,  96 },
 897         {  32,  95 },
 898         {  33,  94 },
 899         {  34,  92 },
 900         {  35,  91 },
 901         {  36,  90 },
 902         {  37,  89 },
 903         {  38,  88 },
 904         {  39,  86 },
 905         {  40,  85 },
 906         {  41,  84 },
 907         {  42,  83 },
 908         {  43,  82 },
 909         {  44,  81 },
 910         {  45,  80 },
 911         {  46,  79 },
 912         {  47,  78 },
 913         {  48,  77 },
 914         {  49,  76 },
 915         {  50,  76 },
 916         {  51,  75 },
 917         {  52,  74 },
 918         {  53,  73 },
 919         {  54,  72 },
 920         {  56,  71 },
 921         {  57,  70 },
 922         {  58,  69 },
 923         {  60,  68 },
 924         {  61,  67 },
 925         {  63,  66 },
 926         {  64,  65 },
 927         {  66,  64 },
 928         {  67,  63 },
 929         {  68,  62 },
 930         {  69,  62 },
 931         {  70,  61 },
 932         {  72,  60 },
 933         {  74,  59 },
 934         {  75,  58 },
 935         {  77,  57 },
 936         {  79,  56 },
 937         {  81,  55 },
 938         {  83,  54 },
 939         {  85,  53 },
 940         {  87,  52 },
 941         {  89,  51 },
 942         {  91,  50 },
 943         {  93,  49 },
 944         {  95,  48 },
 945         {  97,  47 },
 946         { 100,  46 },
 947         { 102,  45 },
 948         { 104,  44 },
 949         { 107,  43 },
 950         { 109,  42 },
 951         { 112,  41 },
 952         { 114,  40 },
 953         { 117,  39 },
 954         { 120,  38 },
 955         { 123,  37 },
 956         { 125,  36 },
 957         { 128,  35 },
 958         { 131,  34 },
 959         { 134,  33 },
 960         { 138,  32 },
 961         { 141,  31 },
 962         { 144,  30 },
 963         { 147,  29 },
 964         { 151,  28 },
 965         { 154,  27 },
 966         { 158,  26 },
 967         { 162,  25 },
 968         { 165,  24 },
 969         { 169,  23 },
 970         { 173,  22 },
 971         { 177,  21 },
 972         { 181,  20 },
 973         { 186,  19 },
 974         { 190,  18 },
 975         { 194,  17 },
 976         { 199,  16 },
 977         { 204,  15 },
 978         { 208,  14 },
 979         { 213,  13 },
 980         { 218,  12 },
 981         { 223,  11 },
 982         { 229,  10 },
 983         { 234,   9 },
 984         { 239,   8 },
 985         { 245,   7 },
 986         { 251,   6 },
 987         { 255,   5 },
 988 };
 989
 990 static int tda10048_read_snr(struct dvb_frontend *fe, u16 *snr)
 991 {
 992         struct tda10048_state *state = fe->demodulator_priv;
 993         u8 v;
 994         int i, ret = -EINVAL;
 995
 996         dprintk(1, "%s()\n", __func__);
 997
 998         v = tda10048_readreg(state, TDA10048_NP_OUT);
 999         for (i = 0; i < ARRAY_SIZE(snr_tab); i++) {
1000                 if (v <= snr_tab[i].val) {
1001                         *snr = snr_tab[i].data;
1002                         ret = 0;
1003                         break;
1004                 }
1005         }
1006
1007         return ret;
1008 }
1009
1010 static int tda10048_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1011 {
1012         struct tda10048_state *state = fe->demodulator_priv;
1013
1014         dprintk(1, "%s()\n", __func__);
1015
1016         *ucblocks = tda10048_readreg(state, TDA10048_UNCOR_CPT_MSB) << 8 |
1017                 tda10048_readreg(state, TDA10048_UNCOR_CPT_LSB);
1018
1019         return 0;
1020 }
1021
1022 static int tda10048_get_frontend(struct dvb_frontend *fe,
1023         struct dvb_frontend_parameters *p)
1024 {
1025         struct tda10048_state *state = fe->demodulator_priv;
1026
1027         dprintk(1, "%s()\n", __func__);
1028
1029         p->inversion = tda10048_readreg(state, TDA10048_CONF_C1_1)
1030                 & 0x20 ? INVERSION_ON : INVERSION_OFF;
1031
1032         return tda10048_get_tps(state, &p->u.ofdm);
1033 }
1034
1035 static int tda10048_get_tune_settings(struct dvb_frontend *fe,
1036         struct dvb_frontend_tune_settings *tune)
1037 {
1038         tune->min_delay_ms = 1000;
1039         return 0;
1040 }
1041
1042 static void tda10048_release(struct dvb_frontend *fe)
1043 {
1044         struct tda10048_state *state = fe->demodulator_priv;
1045         dprintk(1, "%s()\n", __func__);
1046         kfree(state);
1047 }
1048
1049 static void tda10048_establish_defaults(struct dvb_frontend *fe)
1050 {
1051         struct tda10048_state *state = fe->demodulator_priv;
1052         struct tda10048_config *config = &state->config;
1053
1054         /* Validate/default the config */
1055         if (config->dtv6_if_freq_khz == 0) {
1056                 config->dtv6_if_freq_khz = TDA10048_IF_4300;
1057                 printk(KERN_WARNING "%s() tda10048_config.dtv6_if_freq_khz "
1058                         "is not set (defaulting to %d)\n",
1059                         __func__,
1060                         config->dtv6_if_freq_khz);
1061         }
1062
1063         if (config->dtv7_if_freq_khz == 0) {
1064                 config->dtv7_if_freq_khz = TDA10048_IF_4300;
1065                 printk(KERN_WARNING "%s() tda10048_config.dtv7_if_freq_khz "
1066                         "is not set (defaulting to %d)\n",
1067                         __func__,
1068                         config->dtv7_if_freq_khz);
1069         }
1070
1071         if (config->dtv8_if_freq_khz == 0) {
1072                 config->dtv8_if_freq_khz = TDA10048_IF_4300;
1073                 printk(KERN_WARNING "%s() tda10048_config.dtv8_if_freq_khz "
1074                         "is not set (defaulting to %d)\n",
1075                         __func__,
1076                         config->dtv8_if_freq_khz);
1077         }
1078
1079         if (config->clk_freq_khz == 0) {
1080                 config->clk_freq_khz = TDA10048_CLK_16000;
1081                 printk(KERN_WARNING "%s() tda10048_config.clk_freq_khz "
1082                         "is not set (defaulting to %d)\n",
1083                         __func__,
1084                         config->clk_freq_khz);
1085         }
1086 }
1087
1088 static struct dvb_frontend_ops tda10048_ops;
1089
1090 struct dvb_frontend *tda10048_attach(const struct tda10048_config *config,
1091         struct i2c_adapter *i2c)
1092 {
1093         struct tda10048_state *state = NULL;
1094
1095         dprintk(1, "%s()\n", __func__);
1096
1097         /* allocate memory for the internal state */
1098         state = kmalloc(sizeof(struct tda10048_state), GFP_KERNEL);
1099         if (state == NULL)
1100                 goto error;
1101
1102         /* setup the state and clone the config */
1103         memcpy(&state->config, config, sizeof(*config));
1104         state->i2c = i2c;
1105         state->fwloaded = 0;
1106         state->bandwidth = BANDWIDTH_8_MHZ;
1107
1108         /* check if the demod is present */
1109         if (tda10048_readreg(state, TDA10048_IDENTITY) != 0x048)
1110                 goto error;
1111
1112         /* create dvb_frontend */
1113         memcpy(&state->frontend.ops, &tda10048_ops,
1114                 sizeof(struct dvb_frontend_ops));
1115         state->frontend.demodulator_priv = state;
1116
1117         /* Establish any defaults the the user didn't pass */
1118         tda10048_establish_defaults(&state->frontend);
1119
1120         /* Set the xtal and freq defaults */
1121         if (tda10048_set_if(&state->frontend, BANDWIDTH_8_MHZ) != 0)
1122                 goto error;
1123
1124         /* Default bandwidth */
1125         if (tda10048_set_bandwidth(&state->frontend, BANDWIDTH_8_MHZ) != 0)
1126                 goto error;
1127
1128         /* Leave the gate closed */
1129         tda10048_i2c_gate_ctrl(&state->frontend, 0);
1130
1131         return &state->frontend;
1132
1133 error:
1134         kfree(state);
1135         return NULL;
1136 }
1137 EXPORT_SYMBOL(tda10048_attach);
1138
1139 static struct dvb_frontend_ops tda10048_ops = {
1140
1141         .info = {
1142                 .name                   = "NXP TDA10048HN DVB-T",
1143                 .type                   = FE_OFDM,
1144                 .frequency_min          = 177000000,
1145                 .frequency_max          = 858000000,
1146                 .frequency_stepsize     = 166666,
1147                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1148                 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1149                 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
1150                 FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
1151                 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
1152         },
1153
1154         .release = tda10048_release,
1155         .init = tda10048_init,
1156         .i2c_gate_ctrl = tda10048_i2c_gate_ctrl,
1157         .set_frontend = tda10048_set_frontend,
1158         .get_frontend = tda10048_get_frontend,
1159         .get_tune_settings = tda10048_get_tune_settings,
1160         .read_status = tda10048_read_status,
1161         .read_ber = tda10048_read_ber,
1162         .read_signal_strength = tda10048_read_signal_strength,
1163         .read_snr = tda10048_read_snr,
1164         .read_ucblocks = tda10048_read_ucblocks,
1165 };
1166
1167 module_param(debug, int, 0644);
1168 MODULE_PARM_DESC(debug, "Enable verbose debug messages");
1169
1170 MODULE_DESCRIPTION("NXP TDA10048HN DVB-T Demodulator driver");
1171 MODULE_AUTHOR("Steven Toth");
1172 MODULE_LICENSE("GPL");