drivers/media/dvb/b2c2/flexcop-dma.c

   1 /*
   2  * This file is part of linux driver the digital TV devices equipped with B2C2 FlexcopII(b)/III
   3  *
   4  * flexcop-dma.c - methods for configuring and controlling the DMA of the FlexCop.
   5  *
   6  * see flexcop.c for copyright information.
   7  */
   8 #include "flexcop.h"
   9
  10 int flexcop_dma_allocate(struct pci_dev *pdev, struct flexcop_dma *dma, u32 size)
  11 {
  12         u8 *tcpu;
  13         dma_addr_t tdma;
  14
  15         if (size % 2) {
  16                 err("dma buffersize has to be even.");
  17                 return -EINVAL;
  18         }
  19
  20         if ((tcpu = pci_alloc_consistent(pdev, size, &tdma)) != NULL) {
  21                 dma->pdev = pdev;
  22                 dma->cpu_addr0 = tcpu;
  23                 dma->dma_addr0 = tdma;
  24                 dma->cpu_addr1 = tcpu + size/2;
  25                 dma->dma_addr1 = tdma + size/2;
  26                 dma->size = size/2;
  27                 return 0;
  28         }
  29         return -ENOMEM;
  30 }
  31 EXPORT_SYMBOL(flexcop_dma_allocate);
  32
  33 void flexcop_dma_free(struct flexcop_dma *dma)
  34 {
  35         pci_free_consistent(dma->pdev, dma->size*2,dma->cpu_addr0, dma->dma_addr0);
  36         memset(dma,0,sizeof(struct flexcop_dma));
  37 }
  38 EXPORT_SYMBOL(flexcop_dma_free);
  39
  40 int flexcop_dma_config(struct flexcop_device *fc,
  41                 struct flexcop_dma *dma,
  42                 flexcop_dma_index_t dma_idx)
  43 {
  44         flexcop_ibi_value v0x0,v0x4,v0xc;
  45         v0x0.raw = v0x4.raw = v0xc.raw = 0;
  46
  47         v0x0.dma_0x0.dma_address0        = dma->dma_addr0 >> 2;
  48         v0xc.dma_0xc.dma_address1        = dma->dma_addr1 >> 2;
  49         v0x4.dma_0x4_write.dma_addr_size = dma->size / 4;
  50
  51         if ((dma_idx & FC_DMA_1) == dma_idx) {
  52                 fc->write_ibi_reg(fc,dma1_000,v0x0);
  53                 fc->write_ibi_reg(fc,dma1_004,v0x4);
  54                 fc->write_ibi_reg(fc,dma1_00c,v0xc);
  55         } else if ((dma_idx & FC_DMA_2) == dma_idx) {
  56                 fc->write_ibi_reg(fc,dma2_010,v0x0);
  57                 fc->write_ibi_reg(fc,dma2_014,v0x4);
  58                 fc->write_ibi_reg(fc,dma2_01c,v0xc);
  59         } else {
  60                 err("either DMA1 or DMA2 can be configured at the within one flexcop_dma_config call.");
  61                 return -EINVAL;
  62         }
  63
  64         return 0;
  65 }
  66 EXPORT_SYMBOL(flexcop_dma_config);
  67
  68 /* start the DMA transfers, but not the DMA IRQs */
  69 int flexcop_dma_xfer_control(struct flexcop_device *fc,
  70                 flexcop_dma_index_t dma_idx,
  71                 flexcop_dma_addr_index_t index,
  72                 int onoff)
  73 {
  74         flexcop_ibi_value v0x0,v0xc;
  75         flexcop_ibi_register r0x0,r0xc;
  76
  77         if ((dma_idx & FC_DMA_1) == dma_idx) {
  78                 r0x0 = dma1_000;
  79                 r0xc = dma1_00c;
  80         } else if ((dma_idx & FC_DMA_2) == dma_idx) {
  81                 r0x0 = dma2_010;
  82                 r0xc = dma2_01c;
  83         } else {
  84                 err("either transfer DMA1 or DMA2 can be started within one flexcop_dma_xfer_control call.");
  85                 return -EINVAL;
  86         }
  87
  88         v0x0 = fc->read_ibi_reg(fc,r0x0);
  89         v0xc = fc->read_ibi_reg(fc,r0xc);
  90
  91         deb_rdump("reg: %03x: %x\n",r0x0,v0x0.raw);
  92         deb_rdump("reg: %03x: %x\n",r0xc,v0xc.raw);
  93
  94         if (index & FC_DMA_SUBADDR_0)
  95                 v0x0.dma_0x0.dma_0start = onoff;
  96
  97         if (index & FC_DMA_SUBADDR_1)
  98                 v0xc.dma_0xc.dma_1start = onoff;
  99
 100         fc->write_ibi_reg(fc,r0x0,v0x0);
 101         fc->write_ibi_reg(fc,r0xc,v0xc);
 102
 103         deb_rdump("reg: %03x: %x\n",r0x0,v0x0.raw);
 104         deb_rdump("reg: %03x: %x\n",r0xc,v0xc.raw);
 105         return 0;
 106 }
 107 EXPORT_SYMBOL(flexcop_dma_xfer_control);
 108
 109 static int flexcop_dma_remap(struct flexcop_device *fc,
 110                 flexcop_dma_index_t dma_idx,
 111                 int onoff)
 112 {
 113         flexcop_ibi_register r = (dma_idx & FC_DMA_1) ? dma1_00c : dma2_01c;
 114         flexcop_ibi_value v = fc->read_ibi_reg(fc,r);
 115         deb_info("%s\n",__FUNCTION__);
 116         v.dma_0xc.remap_enable = onoff;
 117         fc->write_ibi_reg(fc,r,v);
 118         return 0;
 119 }
 120
 121 int flexcop_dma_control_size_irq(struct flexcop_device *fc,
 122                 flexcop_dma_index_t no,
 123                 int onoff)
 124 {
 125         flexcop_ibi_value v = fc->read_ibi_reg(fc,ctrl_208);
 126
 127         if (no & FC_DMA_1)
 128                 v.ctrl_208.DMA1_IRQ_Enable_sig = onoff;
 129
 130         if (no & FC_DMA_2)
 131                 v.ctrl_208.DMA2_IRQ_Enable_sig = onoff;
 132
 133         fc->write_ibi_reg(fc,ctrl_208,v);
 134         return 0;
 135 }
 136 EXPORT_SYMBOL(flexcop_dma_control_size_irq);
 137
 138 int flexcop_dma_control_timer_irq(struct flexcop_device *fc,
 139                 flexcop_dma_index_t no,
 140                 int onoff)
 141 {
 142         flexcop_ibi_value v = fc->read_ibi_reg(fc,ctrl_208);
 143
 144         if (no & FC_DMA_1)
 145                 v.ctrl_208.DMA1_Timer_Enable_sig = onoff;
 146
 147         if (no & FC_DMA_2)
 148                 v.ctrl_208.DMA2_Timer_Enable_sig = onoff;
 149
 150         fc->write_ibi_reg(fc,ctrl_208,v);
 151         return 0;
 152 }
 153 EXPORT_SYMBOL(flexcop_dma_control_timer_irq);
 154
 155 /* 1 cycles = 1.97 msec */
 156 int flexcop_dma_config_timer(struct flexcop_device *fc,
 157                 flexcop_dma_index_t dma_idx,
 158                 u8 cycles)
 159 {
 160         flexcop_ibi_register r = (dma_idx & FC_DMA_1) ? dma1_004 : dma2_014;
 161         flexcop_ibi_value v = fc->read_ibi_reg(fc,r);
 162
 163         flexcop_dma_remap(fc,dma_idx,0);
 164
 165         deb_info("%s\n",__FUNCTION__);
 166         v.dma_0x4_write.dmatimer = cycles;
 167         fc->write_ibi_reg(fc,r,v);
 168         return 0;
 169 }
 170 EXPORT_SYMBOL(flexcop_dma_config_timer);
 171
 172 /* packet IRQ does not exist in FCII or FCIIb - according to data book and tests */
 173 int flexcop_dma_control_packet_irq(struct flexcop_device *fc,
 174                 flexcop_dma_index_t no,
 175                 int onoff)
 176 {
 177         flexcop_ibi_value v = fc->read_ibi_reg(fc,ctrl_208);
 178
 179         deb_rdump("reg: %03x: %x\n",ctrl_208,v.raw);
 180         if (no & FC_DMA_1)
 181                 v.ctrl_208.DMA1_Size_IRQ_Enable_sig = onoff;
 182
 183         if (no & FC_DMA_2)
 184                 v.ctrl_208.DMA2_Size_IRQ_Enable_sig = onoff;
 185
 186         fc->write_ibi_reg(fc,ctrl_208,v);
 187         deb_rdump("reg: %03x: %x\n",ctrl_208,v.raw);
 188
 189         return 0;
 190 }
 191 EXPORT_SYMBOL(flexcop_dma_control_packet_irq);
 192
 193 int flexcop_dma_config_packet_count(struct flexcop_device *fc,
 194                 flexcop_dma_index_t dma_idx,
 195                 u8 packets)
 196 {
 197         flexcop_ibi_register r = (dma_idx & FC_DMA_1) ? dma1_004 : dma2_014;
 198         flexcop_ibi_value v = fc->read_ibi_reg(fc,r);
 199
 200         flexcop_dma_remap(fc,dma_idx,1);
 201
 202         v.dma_0x4_remap.DMA_maxpackets = packets;
 203         fc->write_ibi_reg(fc,r,v);
 204         return 0;
 205 }
 206 EXPORT_SYMBOL(flexcop_dma_config_packet_count);