drivers/kvm/svm.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * AMD SVM support
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  *
   8  * Authors:
   9  *   Yaniv Kamay  <yaniv@qumranet.com>
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *
  12  * This work is licensed under the terms of the GNU GPL, version 2.  See
  13  * the COPYING file in the top-level directory.
  14  *
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/vmalloc.h>
  19 #include <linux/highmem.h>
  20 #include <asm/desc.h>
  21
  22 #include "kvm_svm.h"
  23 #include "x86_emulate.h"
  24
  25 MODULE_AUTHOR("Qumranet");
  26 MODULE_LICENSE("GPL");
  27
  28 #define IOPM_ALLOC_ORDER 2
  29 #define MSRPM_ALLOC_ORDER 1
  30
  31 #define DB_VECTOR 1
  32 #define UD_VECTOR 6
  33 #define GP_VECTOR 13
  34
  35 #define DR7_GD_MASK (1 << 13)
  36 #define DR6_BD_MASK (1 << 13)
  37 #define CR4_DE_MASK (1UL << 3)
  38
  39 #define SEG_TYPE_LDT 2
  40 #define SEG_TYPE_BUSY_TSS16 3
  41
  42 #define KVM_EFER_LMA (1 << 10)
  43 #define KVM_EFER_LME (1 << 8)
  44
  45 unsigned long iopm_base;
  46 unsigned long msrpm_base;
  47
  48 struct kvm_ldttss_desc {
  49         u16 limit0;
  50         u16 base0;
  51         unsigned base1 : 8, type : 5, dpl : 2, p : 1;
  52         unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
  53         u32 base3;
  54         u32 zero1;
  55 } __attribute__((packed));
  56
  57 struct svm_cpu_data {
  58         int cpu;
  59
  60         uint64_t asid_generation;
  61         uint32_t max_asid;
  62         uint32_t next_asid;
  63         struct kvm_ldttss_desc *tss_desc;
  64
  65         struct page *save_area;
  66 };
  67
  68 static DEFINE_PER_CPU(struct svm_cpu_data *, svm_data);
  69
  70 struct svm_init_data {
  71         int cpu;
  72         int r;
  73 };
  74
  75 static u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000};
  76
  77 #define NUM_MSR_MAPS (sizeof(msrpm_ranges) / sizeof(*msrpm_ranges))
  78 #define MSRS_RANGE_SIZE 2048
  79 #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
  80
  81 #define MAX_INST_SIZE 15
  82
  83 static unsigned get_addr_size(struct kvm_vcpu *vcpu)
  84 {
  85         struct vmcb_save_area *sa = &vcpu->svm->vmcb->save;
  86         u16 cs_attrib;
  87
  88         if (!(sa->cr0 & CR0_PE_MASK) || (sa->rflags & X86_EFLAGS_VM))
  89                 return 2;
  90
  91         cs_attrib = sa->cs.attrib;
  92
  93         return (cs_attrib & SVM_SELECTOR_L_MASK) ? 8 :
  94                                 (cs_attrib & SVM_SELECTOR_DB_MASK) ? 4 : 2;
  95 }
  96
  97 static inline u8 pop_irq(struct kvm_vcpu *vcpu)
  98 {
  99         int word_index = __ffs(vcpu->irq_summary);
 100         int bit_index = __ffs(vcpu->irq_pending[word_index]);
 101         int irq = word_index * BITS_PER_LONG + bit_index;
 102
 103         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
 104         if (!vcpu->irq_pending[word_index])
 105                 clear_bit(word_index, &vcpu->irq_summary);
 106         return irq;
 107 }
 108
 109 static inline void push_irq(struct kvm_vcpu *vcpu, u8 irq)
 110 {
 111         set_bit(irq, vcpu->irq_pending);
 112         set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
 113 }
 114
 115 static inline void clgi(void)
 116 {
 117         asm volatile (SVM_CLGI);
 118 }
 119
 120 static inline void stgi(void)
 121 {
 122         asm volatile (SVM_STGI);
 123 }
 124
 125 static inline void invlpga(unsigned long addr, u32 asid)
 126 {
 127         asm volatile (SVM_INVLPGA :: "a"(addr), "c"(asid));
 128 }
 129
 130 static inline unsigned long kvm_read_cr2(void)
 131 {
 132         unsigned long cr2;
 133
 134         asm volatile ("mov %%cr2, %0" : "=r" (cr2));
 135         return cr2;
 136 }
 137
 138 static inline void kvm_write_cr2(unsigned long val)
 139 {
 140         asm volatile ("mov %0, %%cr2" :: "r" (val));
 141 }
 142
 143 static inline unsigned long read_dr6(void)
 144 {
 145         unsigned long dr6;
 146
 147         asm volatile ("mov %%dr6, %0" : "=r" (dr6));
 148         return dr6;
 149 }
 150
 151 static inline void write_dr6(unsigned long val)
 152 {
 153         asm volatile ("mov %0, %%dr6" :: "r" (val));
 154 }
 155
 156 static inline unsigned long read_dr7(void)
 157 {
 158         unsigned long dr7;
 159
 160         asm volatile ("mov %%dr7, %0" : "=r" (dr7));
 161         return dr7;
 162 }
 163
 164 static inline void write_dr7(unsigned long val)
 165 {
 166         asm volatile ("mov %0, %%dr7" :: "r" (val));
 167 }
 168
 169 static inline void force_new_asid(struct kvm_vcpu *vcpu)
 170 {
 171         vcpu->svm->asid_generation--;
 172 }
 173
 174 static inline void flush_guest_tlb(struct kvm_vcpu *vcpu)
 175 {
 176         force_new_asid(vcpu);
 177 }
 178
 179 static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
 180 {
 181         if (!(efer & KVM_EFER_LMA))
 182                 efer &= ~KVM_EFER_LME;
 183
 184         vcpu->svm->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
 185         vcpu->shadow_efer = efer;
 186 }
 187
 188 static void svm_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 189 {
 190         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
 191                                                 SVM_EVTINJ_VALID_ERR |
 192                                                 SVM_EVTINJ_TYPE_EXEPT |
 193                                                 GP_VECTOR;
 194         vcpu->svm->vmcb->control.event_inj_err = error_code;
 195 }
 196
 197 static void inject_ud(struct kvm_vcpu *vcpu)
 198 {
 199         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
 200                                                 SVM_EVTINJ_TYPE_EXEPT |
 201                                                 UD_VECTOR;
 202 }
 203
 204 static void inject_db(struct kvm_vcpu *vcpu)
 205 {
 206         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
 207                                                 SVM_EVTINJ_TYPE_EXEPT |
 208                                                 DB_VECTOR;
 209 }
 210
 211 static int is_page_fault(uint32_t info)
 212 {
 213         info &= SVM_EVTINJ_VEC_MASK | SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
 214         return info == (PF_VECTOR | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT);
 215 }
 216
 217 static int is_external_interrupt(u32 info)
 218 {
 219         info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
 220         return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
 221 }
 222
 223 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 224 {
 225         if (!vcpu->svm->next_rip) {
 226                 printk(KERN_DEBUG "%s: NOP\n", __FUNCTION__);
 227                 return;
 228         }
 229         if (vcpu->svm->next_rip - vcpu->svm->vmcb->save.rip > 15) {
 230                 printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n",
 231                        __FUNCTION__,
 232                        vcpu->svm->vmcb->save.rip,
 233                        vcpu->svm->next_rip);
 234         }
 235
 236         vcpu->rip = vcpu->svm->vmcb->save.rip = vcpu->svm->next_rip;
 237         vcpu->svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
 238 }
 239
 240 static int has_svm(void)
 241 {
 242         uint32_t eax, ebx, ecx, edx;
 243
 244         if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
 245                 printk(KERN_INFO "has_svm: not amd\n");
 246                 return 0;
 247         }
 248
 249         cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
 250         if (eax < SVM_CPUID_FUNC) {
 251                 printk(KERN_INFO "has_svm: can't execute cpuid_8000000a\n");
 252                 return 0;
 253         }
 254
 255         cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
 256         if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
 257                 printk(KERN_DEBUG "has_svm: svm not available\n");
 258                 return 0;
 259         }
 260         return 1;
 261 }
 262
 263 static void svm_hardware_disable(void *garbage)
 264 {
 265         struct svm_cpu_data *svm_data
 266                 = per_cpu(svm_data, raw_smp_processor_id());
 267
 268         if (svm_data) {
 269                 uint64_t efer;
 270
 271                 wrmsrl(MSR_VM_HSAVE_PA, 0);
 272                 rdmsrl(MSR_EFER, efer);
 273                 wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
 274                 per_cpu(svm_data, raw_smp_processor_id()) = 0;
 275                 __free_page(svm_data->save_area);
 276                 kfree(svm_data);
 277         }
 278 }
 279
 280 static void svm_hardware_enable(void *garbage)
 281 {
 282
 283         struct svm_cpu_data *svm_data;
 284         uint64_t efer;
 285 #ifdef CONFIG_X86_64
 286         struct desc_ptr gdt_descr;
 287 #else
 288         struct Xgt_desc_struct gdt_descr;
 289 #endif
 290         struct desc_struct *gdt;
 291         int me = raw_smp_processor_id();
 292
 293         if (!has_svm()) {
 294                 printk(KERN_ERR "svm_cpu_init: err EOPNOTSUPP on %d\n", me);
 295                 return;
 296         }
 297         svm_data = per_cpu(svm_data, me);
 298
 299         if (!svm_data) {
 300                 printk(KERN_ERR "svm_cpu_init: svm_data is NULL on %d\n",
 301                        me);
 302                 return;
 303         }
 304
 305         svm_data->asid_generation = 1;
 306         svm_data->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1;
 307         svm_data->next_asid = svm_data->max_asid + 1;
 308
 309         asm volatile ( "sgdt %0" : "=m"(gdt_descr) );
 310         gdt = (struct desc_struct *)gdt_descr.address;
 311         svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
 312
 313         rdmsrl(MSR_EFER, efer);
 314         wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
 315
 316         wrmsrl(MSR_VM_HSAVE_PA,
 317                page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
 318 }
 319
 320 static int svm_cpu_init(int cpu)
 321 {
 322         struct svm_cpu_data *svm_data;
 323         int r;
 324
 325         svm_data = kzalloc(sizeof(struct svm_cpu_data), GFP_KERNEL);
 326         if (!svm_data)
 327                 return -ENOMEM;
 328         svm_data->cpu = cpu;
 329         svm_data->save_area = alloc_page(GFP_KERNEL);
 330         r = -ENOMEM;
 331         if (!svm_data->save_area)
 332                 goto err_1;
 333
 334         per_cpu(svm_data, cpu) = svm_data;
 335
 336         return 0;
 337
 338 err_1:
 339         kfree(svm_data);
 340         return r;
 341
 342 }
 343
 344 static int set_msr_interception(u32 *msrpm, unsigned msr,
 345                                 int read, int write)
 346 {
 347         int i;
 348
 349         for (i = 0; i < NUM_MSR_MAPS; i++) {
 350                 if (msr >= msrpm_ranges[i] &&
 351                     msr < msrpm_ranges[i] + MSRS_IN_RANGE) {
 352                         u32 msr_offset = (i * MSRS_IN_RANGE + msr -
 353                                           msrpm_ranges[i]) * 2;
 354
 355                         u32 *base = msrpm + (msr_offset / 32);
 356                         u32 msr_shift = msr_offset % 32;
 357                         u32 mask = ((write) ? 0 : 2) | ((read) ? 0 : 1);
 358                         *base = (*base & ~(0x3 << msr_shift)) |
 359                                 (mask << msr_shift);
 360                         return 1;
 361                 }
 362         }
 363         printk(KERN_DEBUG "%s: not found 0x%x\n", __FUNCTION__, msr);
 364         return 0;
 365 }
 366
 367 static __init int svm_hardware_setup(void)
 368 {
 369         int cpu;
 370         struct page *iopm_pages;
 371         struct page *msrpm_pages;
 372         void *msrpm_va;
 373         int r;
 374
 375         kvm_emulator_want_group7_invlpg();
 376
 377         iopm_pages = alloc_pages(GFP_KERNEL, IOPM_ALLOC_ORDER);
 378
 379         if (!iopm_pages)
 380                 return -ENOMEM;
 381         memset(page_address(iopm_pages), 0xff,
 382                                         PAGE_SIZE * (1 << IOPM_ALLOC_ORDER));
 383         iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT;
 384
 385
 386         msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
 387
 388         r = -ENOMEM;
 389         if (!msrpm_pages)
 390                 goto err_1;
 391
 392         msrpm_va = page_address(msrpm_pages);
 393         memset(msrpm_va, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));
 394         msrpm_base = page_to_pfn(msrpm_pages) << PAGE_SHIFT;
 395
 396 #ifdef CONFIG_X86_64
 397         set_msr_interception(msrpm_va, MSR_GS_BASE, 1, 1);
 398         set_msr_interception(msrpm_va, MSR_FS_BASE, 1, 1);
 399         set_msr_interception(msrpm_va, MSR_KERNEL_GS_BASE, 1, 1);
 400         set_msr_interception(msrpm_va, MSR_LSTAR, 1, 1);
 401         set_msr_interception(msrpm_va, MSR_CSTAR, 1, 1);
 402         set_msr_interception(msrpm_va, MSR_SYSCALL_MASK, 1, 1);
 403 #endif
 404         set_msr_interception(msrpm_va, MSR_K6_STAR, 1, 1);
 405         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_CS, 1, 1);
 406         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_ESP, 1, 1);
 407         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_EIP, 1, 1);
 408
 409         for_each_online_cpu(cpu) {
 410                 r = svm_cpu_init(cpu);
 411                 if (r)
 412                         goto err_2;
 413         }
 414         return 0;
 415
 416 err_2:
 417         __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
 418         msrpm_base = 0;
 419 err_1:
 420         __free_pages(iopm_pages, IOPM_ALLOC_ORDER);
 421         iopm_base = 0;
 422         return r;
 423 }
 424
 425 static __exit void svm_hardware_unsetup(void)
 426 {
 427         __free_pages(pfn_to_page(msrpm_base >> PAGE_SHIFT), MSRPM_ALLOC_ORDER);
 428         __free_pages(pfn_to_page(iopm_base >> PAGE_SHIFT), IOPM_ALLOC_ORDER);
 429         iopm_base = msrpm_base = 0;
 430 }
 431
 432 static void init_seg(struct vmcb_seg *seg)
 433 {
 434         seg->selector = 0;
 435         seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK |
 436                 SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */
 437         seg->limit = 0xffff;
 438         seg->base = 0;
 439 }
 440
 441 static void init_sys_seg(struct vmcb_seg *seg, uint32_t type)
 442 {
 443         seg->selector = 0;
 444         seg->attrib = SVM_SELECTOR_P_MASK | type;
 445         seg->limit = 0xffff;
 446         seg->base = 0;
 447 }
 448
 449 static int svm_vcpu_setup(struct kvm_vcpu *vcpu)
 450 {
 451         return 0;
 452 }
 453
 454 static void init_vmcb(struct vmcb *vmcb)
 455 {
 456         struct vmcb_control_area *control = &vmcb->control;
 457         struct vmcb_save_area *save = &vmcb->save;
 458         u64 tsc;
 459
 460         control->intercept_cr_read =    INTERCEPT_CR0_MASK |
 461                                         INTERCEPT_CR3_MASK |
 462                                         INTERCEPT_CR4_MASK;
 463
 464         control->intercept_cr_write =   INTERCEPT_CR0_MASK |
 465                                         INTERCEPT_CR3_MASK |
 466                                         INTERCEPT_CR4_MASK;
 467
 468         control->intercept_dr_read =    INTERCEPT_DR0_MASK |
 469                                         INTERCEPT_DR1_MASK |
 470                                         INTERCEPT_DR2_MASK |
 471                                         INTERCEPT_DR3_MASK;
 472
 473         control->intercept_dr_write =   INTERCEPT_DR0_MASK |
 474                                         INTERCEPT_DR1_MASK |
 475                                         INTERCEPT_DR2_MASK |
 476                                         INTERCEPT_DR3_MASK |
 477                                         INTERCEPT_DR5_MASK |
 478                                         INTERCEPT_DR7_MASK;
 479
 480         control->intercept_exceptions = 1 << PF_VECTOR;
 481
 482
 483         control->intercept =    (1ULL << INTERCEPT_INTR) |
 484                                 (1ULL << INTERCEPT_NMI) |
 485                 /*
 486                  * selective cr0 intercept bug?
 487                  *      0:   0f 22 d8                mov    %eax,%cr3
 488                  *      3:   0f 20 c0                mov    %cr0,%eax
 489                  *      6:   0d 00 00 00 80          or     $0x80000000,%eax
 490                  *      b:   0f 22 c0                mov    %eax,%cr0
 491                  * set cr3 ->interception
 492                  * get cr0 ->interception
 493                  * set cr0 -> no interception
 494                  */
 495                 /*              (1ULL << INTERCEPT_SELECTIVE_CR0) | */
 496                                 (1ULL << INTERCEPT_CPUID) |
 497                                 (1ULL << INTERCEPT_HLT) |
 498                                 (1ULL << INTERCEPT_INVLPG) |
 499                                 (1ULL << INTERCEPT_INVLPGA) |
 500                                 (1ULL << INTERCEPT_IOIO_PROT) |
 501                                 (1ULL << INTERCEPT_MSR_PROT) |
 502                                 (1ULL << INTERCEPT_TASK_SWITCH) |
 503                                 (1ULL << INTERCEPT_VMRUN) |
 504                                 (1ULL << INTERCEPT_VMMCALL) |
 505                                 (1ULL << INTERCEPT_VMLOAD) |
 506                                 (1ULL << INTERCEPT_VMSAVE) |
 507                                 (1ULL << INTERCEPT_STGI) |
 508                                 (1ULL << INTERCEPT_CLGI) |
 509                                 (1ULL << INTERCEPT_SKINIT);
 510
 511         control->iopm_base_pa = iopm_base;
 512         control->msrpm_base_pa = msrpm_base;
 513         rdtscll(tsc);
 514         control->tsc_offset = -tsc;
 515         control->int_ctl = V_INTR_MASKING_MASK;
 516
 517         init_seg(&save->es);
 518         init_seg(&save->ss);
 519         init_seg(&save->ds);
 520         init_seg(&save->fs);
 521         init_seg(&save->gs);
 522
 523         save->cs.selector = 0xf000;
 524         /* Executable/Readable Code Segment */
 525         save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
 526                 SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK;
 527         save->cs.limit = 0xffff;
 528         save->cs.base = 0xffff0000;
 529
 530         save->gdtr.limit = 0xffff;
 531         save->idtr.limit = 0xffff;
 532
 533         init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
 534         init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
 535
 536         save->efer = MSR_EFER_SVME_MASK;
 537
 538         save->dr6 = 0xffff0ff0;
 539         save->dr7 = 0x400;
 540         save->rflags = 2;
 541         save->rip = 0x0000fff0;
 542
 543         /*
 544          * cr0 val on cpu init should be 0x60000010, we enable cpu
 545          * cache by default. the orderly way is to enable cache in bios.
 546          */
 547         save->cr0 = 0x00000010 | CR0_PG_MASK;
 548         save->cr4 = CR4_PAE_MASK;
 549         /* rdx = ?? */
 550 }
 551
 552 static int svm_create_vcpu(struct kvm_vcpu *vcpu)
 553 {
 554         struct page *page;
 555         int r;
 556
 557         r = -ENOMEM;
 558         vcpu->svm = kzalloc(sizeof *vcpu->svm, GFP_KERNEL);
 559         if (!vcpu->svm)
 560                 goto out1;
 561         page = alloc_page(GFP_KERNEL);
 562         if (!page)
 563                 goto out2;
 564
 565         vcpu->svm->vmcb = page_address(page);
 566         memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
 567         vcpu->svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
 568         vcpu->svm->cr0 = 0x00000010;
 569         vcpu->svm->asid_generation = 0;
 570         memset(vcpu->svm->db_regs, 0, sizeof(vcpu->svm->db_regs));
 571         init_vmcb(vcpu->svm->vmcb);
 572
 573         fx_init(vcpu);
 574
 575         return 0;
 576
 577 out2:
 578         kfree(vcpu->svm);
 579 out1:
 580         return r;
 581 }
 582
 583 static void svm_free_vcpu(struct kvm_vcpu *vcpu)
 584 {
 585         if (!vcpu->svm)
 586                 return;
 587         if (vcpu->svm->vmcb)
 588                 __free_page(pfn_to_page(vcpu->svm->vmcb_pa >> PAGE_SHIFT));
 589         kfree(vcpu->svm);
 590 }
 591
 592 static struct kvm_vcpu *svm_vcpu_load(struct kvm_vcpu *vcpu)
 593 {
 594         get_cpu();
 595         return vcpu;
 596 }
 597
 598 static void svm_vcpu_put(struct kvm_vcpu *vcpu)
 599 {
 600         put_cpu();
 601 }
 602
 603 static void svm_cache_regs(struct kvm_vcpu *vcpu)
 604 {
 605         vcpu->regs[VCPU_REGS_RAX] = vcpu->svm->vmcb->save.rax;
 606         vcpu->regs[VCPU_REGS_RSP] = vcpu->svm->vmcb->save.rsp;
 607         vcpu->rip = vcpu->svm->vmcb->save.rip;
 608 }
 609
 610 static void svm_decache_regs(struct kvm_vcpu *vcpu)
 611 {
 612         vcpu->svm->vmcb->save.rax = vcpu->regs[VCPU_REGS_RAX];
 613         vcpu->svm->vmcb->save.rsp = vcpu->regs[VCPU_REGS_RSP];
 614         vcpu->svm->vmcb->save.rip = vcpu->rip;
 615 }
 616
 617 static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
 618 {
 619         return vcpu->svm->vmcb->save.rflags;
 620 }
 621
 622 static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 623 {
 624         vcpu->svm->vmcb->save.rflags = rflags;
 625 }
 626
 627 static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
 628 {
 629         struct vmcb_save_area *save = &vcpu->svm->vmcb->save;
 630
 631         switch (seg) {
 632         case VCPU_SREG_CS: return &save->cs;
 633         case VCPU_SREG_DS: return &save->ds;
 634         case VCPU_SREG_ES: return &save->es;
 635         case VCPU_SREG_FS: return &save->fs;
 636         case VCPU_SREG_GS: return &save->gs;
 637         case VCPU_SREG_SS: return &save->ss;
 638         case VCPU_SREG_TR: return &save->tr;
 639         case VCPU_SREG_LDTR: return &save->ldtr;
 640         }
 641         BUG();
 642         return 0;
 643 }
 644
 645 static u64 svm_get_segment_base(struct kvm_vcpu *vcpu, int seg)
 646 {
 647         struct vmcb_seg *s = svm_seg(vcpu, seg);
 648
 649         return s->base;
 650 }
 651
 652 static void svm_get_segment(struct kvm_vcpu *vcpu,
 653                             struct kvm_segment *var, int seg)
 654 {
 655         struct vmcb_seg *s = svm_seg(vcpu, seg);
 656
 657         var->base = s->base;
 658         var->limit = s->limit;
 659         var->selector = s->selector;
 660         var->type = s->attrib & SVM_SELECTOR_TYPE_MASK;
 661         var->s = (s->attrib >> SVM_SELECTOR_S_SHIFT) & 1;
 662         var->dpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3;
 663         var->present = (s->attrib >> SVM_SELECTOR_P_SHIFT) & 1;
 664         var->avl = (s->attrib >> SVM_SELECTOR_AVL_SHIFT) & 1;
 665         var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
 666         var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
 667         var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
 668         var->unusable = !var->present;
 669 }
 670
 671 static void svm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
 672 {
 673         struct vmcb_seg *s = svm_seg(vcpu, VCPU_SREG_CS);
 674
 675         *db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
 676         *l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
 677 }
 678
 679 static void svm_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 680 {
 681         dt->limit = vcpu->svm->vmcb->save.ldtr.limit;
 682         dt->base = vcpu->svm->vmcb->save.ldtr.base;
 683 }
 684
 685 static void svm_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 686 {
 687         vcpu->svm->vmcb->save.ldtr.limit = dt->limit;
 688         vcpu->svm->vmcb->save.ldtr.base = dt->base ;
 689 }
 690
 691 static void svm_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 692 {
 693         dt->limit = vcpu->svm->vmcb->save.gdtr.limit;
 694         dt->base = vcpu->svm->vmcb->save.gdtr.base;
 695 }
 696
 697 static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 698 {
 699         vcpu->svm->vmcb->save.gdtr.limit = dt->limit;
 700         vcpu->svm->vmcb->save.gdtr.base = dt->base ;
 701 }
 702
 703 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 704 {
 705 #ifdef CONFIG_X86_64
 706         if (vcpu->shadow_efer & KVM_EFER_LME) {
 707                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK)) {
 708                         vcpu->shadow_efer |= KVM_EFER_LMA;
 709                         vcpu->svm->vmcb->save.efer |= KVM_EFER_LMA | KVM_EFER_LME;
 710                 }
 711
 712                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK) ) {
 713                         vcpu->shadow_efer &= ~KVM_EFER_LMA;
 714                         vcpu->svm->vmcb->save.efer &= ~(KVM_EFER_LMA | KVM_EFER_LME);
 715                 }
 716         }
 717 #endif
 718         vcpu->svm->cr0 = cr0;
 719         vcpu->svm->vmcb->save.cr0 = cr0 | CR0_PG_MASK;
 720         vcpu->cr0 = cr0;
 721 }
 722
 723 static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 724 {
 725        vcpu->cr4 = cr4;
 726        vcpu->svm->vmcb->save.cr4 = cr4 | CR4_PAE_MASK;
 727 }
 728
 729 static void svm_set_segment(struct kvm_vcpu *vcpu,
 730                             struct kvm_segment *var, int seg)
 731 {
 732         struct vmcb_seg *s = svm_seg(vcpu, seg);
 733
 734         s->base = var->base;
 735         s->limit = var->limit;
 736         s->selector = var->selector;
 737         if (var->unusable)
 738                 s->attrib = 0;
 739         else {
 740                 s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK);
 741                 s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT;
 742                 s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT;
 743                 s->attrib |= (var->present & 1) << SVM_SELECTOR_P_SHIFT;
 744                 s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT;
 745                 s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT;
 746                 s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT;
 747                 s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT;
 748         }
 749         if (seg == VCPU_SREG_CS)
 750                 vcpu->svm->vmcb->save.cpl
 751                         = (vcpu->svm->vmcb->save.cs.attrib
 752                            >> SVM_SELECTOR_DPL_SHIFT) & 3;
 753
 754 }
 755
 756 /* FIXME:
 757
 758         vcpu->svm->vmcb->control.int_ctl &= ~V_TPR_MASK;
 759         vcpu->svm->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
 760
 761 */
 762
 763 static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 764 {
 765         return -EOPNOTSUPP;
 766 }
 767
 768 static void load_host_msrs(struct kvm_vcpu *vcpu)
 769 {
 770         int i;
 771
 772         for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
 773                 wrmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
 774 }
 775
 776 static void save_host_msrs(struct kvm_vcpu *vcpu)
 777 {
 778         int i;
 779
 780         for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
 781                 rdmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
 782 }
 783
 784 static void new_asid(struct kvm_vcpu *vcpu, struct svm_cpu_data *svm_data)
 785 {
 786         if (svm_data->next_asid > svm_data->max_asid) {
 787                 ++svm_data->asid_generation;
 788                 svm_data->next_asid = 1;
 789                 vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
 790         }
 791
 792         vcpu->cpu = svm_data->cpu;
 793         vcpu->svm->asid_generation = svm_data->asid_generation;
 794         vcpu->svm->vmcb->control.asid = svm_data->next_asid++;
 795 }
 796
 797 static void svm_invlpg(struct kvm_vcpu *vcpu, gva_t address)
 798 {
 799         invlpga(address, vcpu->svm->vmcb->control.asid); // is needed?
 800 }
 801
 802 static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
 803 {
 804         return vcpu->svm->db_regs[dr];
 805 }
 806
 807 static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
 808                        int *exception)
 809 {
 810         *exception = 0;
 811
 812         if (vcpu->svm->vmcb->save.dr7 & DR7_GD_MASK) {
 813                 vcpu->svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
 814                 vcpu->svm->vmcb->save.dr6 |= DR6_BD_MASK;
 815                 *exception = DB_VECTOR;
 816                 return;
 817         }
 818
 819         switch (dr) {
 820         case 0 ... 3:
 821                 vcpu->svm->db_regs[dr] = value;
 822                 return;
 823         case 4 ... 5:
 824                 if (vcpu->cr4 & CR4_DE_MASK) {
 825                         *exception = UD_VECTOR;
 826                         return;
 827                 }
 828         case 7: {
 829                 if (value & ~((1ULL << 32) - 1)) {
 830                         *exception = GP_VECTOR;
 831                         return;
 832                 }
 833                 vcpu->svm->vmcb->save.dr7 = value;
 834                 return;
 835         }
 836         default:
 837                 printk(KERN_DEBUG "%s: unexpected dr %u\n",
 838                        __FUNCTION__, dr);
 839                 *exception = UD_VECTOR;
 840                 return;
 841         }
 842 }
 843
 844 static int pf_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 845 {
 846         u32 exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
 847         u64 fault_address;
 848         u32 error_code;
 849         enum emulation_result er;
 850
 851         if (is_external_interrupt(exit_int_info))
 852                 push_irq(vcpu, exit_int_info & SVM_EVTINJ_VEC_MASK);
 853
 854         spin_lock(&vcpu->kvm->lock);
 855
 856         fault_address  = vcpu->svm->vmcb->control.exit_info_2;
 857         error_code = vcpu->svm->vmcb->control.exit_info_1;
 858         if (!vcpu->mmu.page_fault(vcpu, fault_address, error_code)) {
 859                 spin_unlock(&vcpu->kvm->lock);
 860                 return 1;
 861         }
 862         er = emulate_instruction(vcpu, kvm_run, fault_address, error_code);
 863         spin_unlock(&vcpu->kvm->lock);
 864
 865         switch (er) {
 866         case EMULATE_DONE:
 867                 return 1;
 868         case EMULATE_DO_MMIO:
 869                 ++kvm_stat.mmio_exits;
 870                 kvm_run->exit_reason = KVM_EXIT_MMIO;
 871                 return 0;
 872         case EMULATE_FAIL:
 873                 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
 874                 break;
 875         default:
 876                 BUG();
 877         }
 878
 879         kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
 880         return 0;
 881 }
 882
 883 static int io_get_override(struct kvm_vcpu *vcpu,
 884                           struct vmcb_seg **seg,
 885                           int *addr_override)
 886 {
 887         u8 inst[MAX_INST_SIZE];
 888         unsigned ins_length;
 889         gva_t rip;
 890         int i;
 891
 892         rip =  vcpu->svm->vmcb->save.rip;
 893         ins_length = vcpu->svm->next_rip - rip;
 894         rip += vcpu->svm->vmcb->save.cs.base;
 895
 896         if (ins_length > MAX_INST_SIZE)
 897                 printk(KERN_DEBUG
 898                        "%s: inst length err, cs base 0x%llx rip 0x%llx "
 899                        "next rip 0x%llx ins_length %u\n",
 900                        __FUNCTION__,
 901                        vcpu->svm->vmcb->save.cs.base,
 902                        vcpu->svm->vmcb->save.rip,
 903                        vcpu->svm->vmcb->control.exit_info_2,
 904                        ins_length);
 905
 906         if (kvm_read_guest(vcpu, rip, ins_length, inst) != ins_length)
 907                 /* #PF */
 908                 return 0;
 909
 910         *addr_override = 0;
 911         *seg = 0;
 912         for (i = 0; i < ins_length; i++)
 913                 switch (inst[i]) {
 914                 case 0xf0:
 915                 case 0xf2:
 916                 case 0xf3:
 917                 case 0x66:
 918                         continue;
 919                 case 0x67:
 920                         *addr_override = 1;
 921                         continue;
 922                 case 0x2e:
 923                         *seg = &vcpu->svm->vmcb->save.cs;
 924                         continue;
 925                 case 0x36:
 926                         *seg = &vcpu->svm->vmcb->save.ss;
 927                         continue;
 928                 case 0x3e:
 929                         *seg = &vcpu->svm->vmcb->save.ds;
 930                         continue;
 931                 case 0x26:
 932                         *seg = &vcpu->svm->vmcb->save.es;
 933                         continue;
 934                 case 0x64:
 935                         *seg = &vcpu->svm->vmcb->save.fs;
 936                         continue;
 937                 case 0x65:
 938                         *seg = &vcpu->svm->vmcb->save.gs;
 939                         continue;
 940                 default:
 941                         return 1;
 942                 }
 943         printk(KERN_DEBUG "%s: unexpected\n", __FUNCTION__);
 944         return 0;
 945 }
 946
 947 static unsigned long io_adress(struct kvm_vcpu *vcpu, int ins, u64 *address)
 948 {
 949         unsigned long addr_mask;
 950         unsigned long *reg;
 951         struct vmcb_seg *seg;
 952         int addr_override;
 953         struct vmcb_save_area *save_area = &vcpu->svm->vmcb->save;
 954         u16 cs_attrib = save_area->cs.attrib;
 955         unsigned addr_size = get_addr_size(vcpu);
 956
 957         if (!io_get_override(vcpu, &seg, &addr_override))
 958                 return 0;
 959
 960         if (addr_override)
 961                 addr_size = (addr_size == 2) ? 4: (addr_size >> 1);
 962
 963         if (ins) {
 964                 reg = &vcpu->regs[VCPU_REGS_RDI];
 965                 seg = &vcpu->svm->vmcb->save.es;
 966         } else {
 967                 reg = &vcpu->regs[VCPU_REGS_RSI];
 968                 seg = (seg) ? seg : &vcpu->svm->vmcb->save.ds;
 969         }
 970
 971         addr_mask = ~0ULL >> (64 - (addr_size * 8));
 972
 973         if ((cs_attrib & SVM_SELECTOR_L_MASK) &&
 974             !(vcpu->svm->vmcb->save.rflags & X86_EFLAGS_VM)) {
 975                 *address = (*reg & addr_mask);
 976                 return addr_mask;
 977         }
 978
 979         if (!(seg->attrib & SVM_SELECTOR_P_SHIFT)) {
 980                 svm_inject_gp(vcpu, 0);
 981                 return 0;
 982         }
 983
 984         *address = (*reg & addr_mask) + seg->base;
 985         return addr_mask;
 986 }
 987
 988 static int io_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 989 {
 990         u32 io_info = vcpu->svm->vmcb->control.exit_info_1; //address size bug?
 991         int _in = io_info & SVM_IOIO_TYPE_MASK;
 992
 993         ++kvm_stat.io_exits;
 994
 995         vcpu->svm->next_rip = vcpu->svm->vmcb->control.exit_info_2;
 996
 997         kvm_run->exit_reason = KVM_EXIT_IO;
 998         kvm_run->io.port = io_info >> 16;
 999         kvm_run->io.direction = (_in) ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1000         kvm_run->io.size = ((io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT);
1001         kvm_run->io.string = (io_info & SVM_IOIO_STR_MASK) != 0;
1002         kvm_run->io.rep = (io_info & SVM_IOIO_REP_MASK) != 0;
1003
1004         if (kvm_run->io.string) {
1005                 unsigned addr_mask;
1006
1007                 addr_mask = io_adress(vcpu, _in, &kvm_run->io.address);
1008                 if (!addr_mask) {
1009                         printk(KERN_DEBUG "%s: get io address failed\n", __FUNCTION__);
1010                         return 1;
1011                 }
1012
1013                 if (kvm_run->io.rep) {
1014                         kvm_run->io.count = vcpu->regs[VCPU_REGS_RCX] & addr_mask;
1015                         kvm_run->io.string_down = (vcpu->svm->vmcb->save.rflags
1016                                                    & X86_EFLAGS_DF) != 0;
1017                 }
1018         } else {
1019                 kvm_run->io.value = vcpu->svm->vmcb->save.rax;
1020         }
1021         return 0;
1022 }
1023
1024
1025 static int nop_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1026 {
1027         return 1;
1028 }
1029
1030 static int halt_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1031 {
1032         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 1;
1033         skip_emulated_instruction(vcpu);
1034         if (vcpu->irq_summary && (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF))
1035                 return 1;
1036
1037         kvm_run->exit_reason = KVM_EXIT_HLT;
1038         return 0;
1039 }
1040
1041 static int invalid_op_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1042 {
1043         inject_ud(vcpu);
1044         return 1;
1045 }
1046
1047 static int task_switch_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1048 {
1049         printk(KERN_DEBUG "%s: task swiche is unsupported\n", __FUNCTION__);
1050         kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1051         return 0;
1052 }
1053
1054 static int cpuid_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1055 {
1056         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1057         kvm_run->exit_reason = KVM_EXIT_CPUID;
1058         return 0;
1059 }
1060
1061 static int emulate_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1062 {
1063         if (emulate_instruction(vcpu, 0, 0, 0) != EMULATE_DONE)
1064                 printk(KERN_ERR "%s: failed\n", __FUNCTION__);
1065         return 1;
1066 }
1067
1068 static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
1069 {
1070         switch (ecx) {
1071         case MSR_IA32_TIME_STAMP_COUNTER: {
1072                 u64 tsc;
1073
1074                 rdtscll(tsc);
1075                 *data = vcpu->svm->vmcb->control.tsc_offset + tsc;
1076                 break;
1077         }
1078         case MSR_K6_STAR:
1079                 *data = vcpu->svm->vmcb->save.star;
1080                 break;
1081 #ifdef CONFIG_X86_64
1082         case MSR_LSTAR:
1083                 *data = vcpu->svm->vmcb->save.lstar;
1084                 break;
1085         case MSR_CSTAR:
1086                 *data = vcpu->svm->vmcb->save.cstar;
1087                 break;
1088         case MSR_KERNEL_GS_BASE:
1089                 *data = vcpu->svm->vmcb->save.kernel_gs_base;
1090                 break;
1091         case MSR_SYSCALL_MASK:
1092                 *data = vcpu->svm->vmcb->save.sfmask;
1093                 break;
1094 #endif
1095         case MSR_IA32_SYSENTER_CS:
1096                 *data = vcpu->svm->vmcb->save.sysenter_cs;
1097                 break;
1098         case MSR_IA32_SYSENTER_EIP:
1099                 *data = vcpu->svm->vmcb->save.sysenter_eip;
1100                 break;
1101         case MSR_IA32_SYSENTER_ESP:
1102                 *data = vcpu->svm->vmcb->save.sysenter_esp;
1103                 break;
1104         default:
1105                 return kvm_get_msr_common(vcpu, ecx, data);
1106         }
1107         return 0;
1108 }
1109
1110 static int rdmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1111 {
1112         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1113         u64 data;
1114
1115         if (svm_get_msr(vcpu, ecx, &data))
1116                 svm_inject_gp(vcpu, 0);
1117         else {
1118                 vcpu->svm->vmcb->save.rax = data & 0xffffffff;
1119                 vcpu->regs[VCPU_REGS_RDX] = data >> 32;
1120                 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1121                 skip_emulated_instruction(vcpu);
1122         }
1123         return 1;
1124 }
1125
1126 static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
1127 {
1128         switch (ecx) {
1129         case MSR_IA32_TIME_STAMP_COUNTER: {
1130                 u64 tsc;
1131
1132                 rdtscll(tsc);
1133                 vcpu->svm->vmcb->control.tsc_offset = data - tsc;
1134                 break;
1135         }
1136         case MSR_K6_STAR:
1137                 vcpu->svm->vmcb->save.star = data;
1138                 break;
1139 #ifdef CONFIG_X86_64_
1140         case MSR_LSTAR:
1141                 vcpu->svm->vmcb->save.lstar = data;
1142                 break;
1143         case MSR_CSTAR:
1144                 vcpu->svm->vmcb->save.cstar = data;
1145                 break;
1146         case MSR_KERNEL_GS_BASE:
1147                 vcpu->svm->vmcb->save.kernel_gs_base = data;
1148                 break;
1149         case MSR_SYSCALL_MASK:
1150                 vcpu->svm->vmcb->save.sfmask = data;
1151                 break;
1152 #endif
1153         case MSR_IA32_SYSENTER_CS:
1154                 vcpu->svm->vmcb->save.sysenter_cs = data;
1155                 break;
1156         case MSR_IA32_SYSENTER_EIP:
1157                 vcpu->svm->vmcb->save.sysenter_eip = data;
1158                 break;
1159         case MSR_IA32_SYSENTER_ESP:
1160                 vcpu->svm->vmcb->save.sysenter_esp = data;
1161                 break;
1162         default:
1163                 return kvm_set_msr_common(vcpu, ecx, data);
1164         }
1165         return 0;
1166 }
1167
1168 static int wrmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1169 {
1170         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1171         u64 data = (vcpu->svm->vmcb->save.rax & -1u)
1172                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1173         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1174         if (svm_set_msr(vcpu, ecx, data))
1175                 svm_inject_gp(vcpu, 0);
1176         else
1177                 skip_emulated_instruction(vcpu);
1178         return 1;
1179 }
1180
1181 static int msr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1182 {
1183         if (vcpu->svm->vmcb->control.exit_info_1)
1184                 return wrmsr_interception(vcpu, kvm_run);
1185         else
1186                 return rdmsr_interception(vcpu, kvm_run);
1187 }
1188
1189 static int (*svm_exit_handlers[])(struct kvm_vcpu *vcpu,
1190                                       struct kvm_run *kvm_run) = {
1191         [SVM_EXIT_READ_CR0]                     = emulate_on_interception,
1192         [SVM_EXIT_READ_CR3]                     = emulate_on_interception,
1193         [SVM_EXIT_READ_CR4]                     = emulate_on_interception,
1194         /* for now: */
1195         [SVM_EXIT_WRITE_CR0]                    = emulate_on_interception,
1196         [SVM_EXIT_WRITE_CR3]                    = emulate_on_interception,
1197         [SVM_EXIT_WRITE_CR4]                    = emulate_on_interception,
1198         [SVM_EXIT_READ_DR0]                     = emulate_on_interception,
1199         [SVM_EXIT_READ_DR1]                     = emulate_on_interception,
1200         [SVM_EXIT_READ_DR2]                     = emulate_on_interception,
1201         [SVM_EXIT_READ_DR3]                     = emulate_on_interception,
1202         [SVM_EXIT_WRITE_DR0]                    = emulate_on_interception,
1203         [SVM_EXIT_WRITE_DR1]                    = emulate_on_interception,
1204         [SVM_EXIT_WRITE_DR2]                    = emulate_on_interception,
1205         [SVM_EXIT_WRITE_DR3]                    = emulate_on_interception,
1206         [SVM_EXIT_WRITE_DR5]                    = emulate_on_interception,
1207         [SVM_EXIT_WRITE_DR7]                    = emulate_on_interception,
1208         [SVM_EXIT_EXCP_BASE + PF_VECTOR]        = pf_interception,
1209         [SVM_EXIT_INTR]                         = nop_on_interception,
1210         [SVM_EXIT_NMI]                          = nop_on_interception,
1211         [SVM_EXIT_SMI]                          = nop_on_interception,
1212         [SVM_EXIT_INIT]                         = nop_on_interception,
1213         /* [SVM_EXIT_CR0_SEL_WRITE]             = emulate_on_interception, */
1214         [SVM_EXIT_CPUID]                        = cpuid_interception,
1215         [SVM_EXIT_HLT]                          = halt_interception,
1216         [SVM_EXIT_INVLPG]                       = emulate_on_interception,
1217         [SVM_EXIT_INVLPGA]                      = invalid_op_interception,
1218         [SVM_EXIT_IOIO]                         = io_interception,
1219         [SVM_EXIT_MSR]                          = msr_interception,
1220         [SVM_EXIT_TASK_SWITCH]                  = task_switch_interception,
1221         [SVM_EXIT_VMRUN]                        = invalid_op_interception,
1222         [SVM_EXIT_VMMCALL]                      = invalid_op_interception,
1223         [SVM_EXIT_VMLOAD]                       = invalid_op_interception,
1224         [SVM_EXIT_VMSAVE]                       = invalid_op_interception,
1225         [SVM_EXIT_STGI]                         = invalid_op_interception,
1226         [SVM_EXIT_CLGI]                         = invalid_op_interception,
1227         [SVM_EXIT_SKINIT]                       = invalid_op_interception,
1228 };
1229
1230
1231 static int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1232 {
1233         u32 exit_code = vcpu->svm->vmcb->control.exit_code;
1234
1235         kvm_run->exit_type = KVM_EXIT_TYPE_VM_EXIT;
1236
1237         if (is_external_interrupt(vcpu->svm->vmcb->control.exit_int_info) &&
1238             exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR)
1239                 printk(KERN_ERR "%s: unexpected exit_ini_info 0x%x "
1240                        "exit_code 0x%x\n",
1241                        __FUNCTION__, vcpu->svm->vmcb->control.exit_int_info,
1242                        exit_code);
1243
1244         if (exit_code >= sizeof(svm_exit_handlers) / sizeof(*svm_exit_handlers)
1245             || svm_exit_handlers[exit_code] == 0) {
1246                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1247                 printk(KERN_ERR "%s: 0x%x @ 0x%llx cr0 0x%lx rflags 0x%llx\n",
1248                        __FUNCTION__,
1249                        exit_code,
1250                        vcpu->svm->vmcb->save.rip,
1251                        vcpu->cr0,
1252                        vcpu->svm->vmcb->save.rflags);
1253                 return 0;
1254         }
1255
1256         return svm_exit_handlers[exit_code](vcpu, kvm_run);
1257 }
1258
1259 static void reload_tss(struct kvm_vcpu *vcpu)
1260 {
1261         int cpu = raw_smp_processor_id();
1262
1263         struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1264         svm_data->tss_desc->type = 9; //available 32/64-bit TSS
1265         load_TR_desc();
1266 }
1267
1268 static void pre_svm_run(struct kvm_vcpu *vcpu)
1269 {
1270         int cpu = raw_smp_processor_id();
1271
1272         struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1273
1274         vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
1275         if (vcpu->cpu != cpu ||
1276             vcpu->svm->asid_generation != svm_data->asid_generation)
1277                 new_asid(vcpu, svm_data);
1278 }
1279
1280
1281 static inline void kvm_try_inject_irq(struct kvm_vcpu *vcpu)
1282 {
1283         struct vmcb_control_area *control;
1284
1285         if (!vcpu->irq_summary)
1286                 return;
1287
1288         control = &vcpu->svm->vmcb->control;
1289
1290         control->int_vector = pop_irq(vcpu);
1291         control->int_ctl &= ~V_INTR_PRIO_MASK;
1292         control->int_ctl |= V_IRQ_MASK |
1293                 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
1294 }
1295
1296 static void kvm_reput_irq(struct kvm_vcpu *vcpu)
1297 {
1298         struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1299
1300         if (control->int_ctl & V_IRQ_MASK) {
1301                 control->int_ctl &= ~V_IRQ_MASK;
1302                 push_irq(vcpu, control->int_vector);
1303         }
1304 }
1305
1306 static void save_db_regs(unsigned long *db_regs)
1307 {
1308         asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
1309         asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
1310         asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
1311         asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
1312 }
1313
1314 static void load_db_regs(unsigned long *db_regs)
1315 {
1316         asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
1317         asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
1318         asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
1319         asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
1320 }
1321
1322 static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1323 {
1324         u16 fs_selector;
1325         u16 gs_selector;
1326         u16 ldt_selector;
1327
1328 again:
1329         kvm_try_inject_irq(vcpu);
1330
1331         clgi();
1332
1333         pre_svm_run(vcpu);
1334
1335         save_host_msrs(vcpu);
1336         fs_selector = read_fs();
1337         gs_selector = read_gs();
1338         ldt_selector = read_ldt();
1339         vcpu->svm->host_cr2 = kvm_read_cr2();
1340         vcpu->svm->host_dr6 = read_dr6();
1341         vcpu->svm->host_dr7 = read_dr7();
1342         vcpu->svm->vmcb->save.cr2 = vcpu->cr2;
1343
1344         if (vcpu->svm->vmcb->save.dr7 & 0xff) {
1345                 write_dr7(0);
1346                 save_db_regs(vcpu->svm->host_db_regs);
1347                 load_db_regs(vcpu->svm->db_regs);
1348         }
1349
1350         fx_save(vcpu->host_fx_image);
1351         fx_restore(vcpu->guest_fx_image);
1352
1353         asm volatile (
1354 #ifdef CONFIG_X86_64
1355                 "push %%rbx; push %%rcx; push %%rdx;"
1356                 "push %%rsi; push %%rdi; push %%rbp;"
1357                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
1358                 "push %%r12; push %%r13; push %%r14; push %%r15;"
1359 #else
1360                 "push %%ebx; push %%ecx; push %%edx;"
1361                 "push %%esi; push %%edi; push %%ebp;"
1362 #endif
1363
1364 #ifdef CONFIG_X86_64
1365                 "mov %c[rbx](%[vcpu]), %%rbx \n\t"
1366                 "mov %c[rcx](%[vcpu]), %%rcx \n\t"
1367                 "mov %c[rdx](%[vcpu]), %%rdx \n\t"
1368                 "mov %c[rsi](%[vcpu]), %%rsi \n\t"
1369                 "mov %c[rdi](%[vcpu]), %%rdi \n\t"
1370                 "mov %c[rbp](%[vcpu]), %%rbp \n\t"
1371                 "mov %c[r8](%[vcpu]),  %%r8  \n\t"
1372                 "mov %c[r9](%[vcpu]),  %%r9  \n\t"
1373                 "mov %c[r10](%[vcpu]), %%r10 \n\t"
1374                 "mov %c[r11](%[vcpu]), %%r11 \n\t"
1375                 "mov %c[r12](%[vcpu]), %%r12 \n\t"
1376                 "mov %c[r13](%[vcpu]), %%r13 \n\t"
1377                 "mov %c[r14](%[vcpu]), %%r14 \n\t"
1378                 "mov %c[r15](%[vcpu]), %%r15 \n\t"
1379 #else
1380                 "mov %c[rbx](%[vcpu]), %%ebx \n\t"
1381                 "mov %c[rcx](%[vcpu]), %%ecx \n\t"
1382                 "mov %c[rdx](%[vcpu]), %%edx \n\t"
1383                 "mov %c[rsi](%[vcpu]), %%esi \n\t"
1384                 "mov %c[rdi](%[vcpu]), %%edi \n\t"
1385                 "mov %c[rbp](%[vcpu]), %%ebp \n\t"
1386 #endif
1387
1388 #ifdef CONFIG_X86_64
1389                 /* Enter guest mode */
1390                 "push %%rax \n\t"
1391                 "mov %c[svm](%[vcpu]), %%rax \n\t"
1392                 "mov %c[vmcb](%%rax), %%rax \n\t"
1393                 SVM_VMLOAD "\n\t"
1394                 SVM_VMRUN "\n\t"
1395                 SVM_VMSAVE "\n\t"
1396                 "pop %%rax \n\t"
1397 #else
1398                 /* Enter guest mode */
1399                 "push %%eax \n\t"
1400                 "mov %c[svm](%[vcpu]), %%eax \n\t"
1401                 "mov %c[vmcb](%%eax), %%eax \n\t"
1402                 SVM_VMLOAD "\n\t"
1403                 SVM_VMRUN "\n\t"
1404                 SVM_VMSAVE "\n\t"
1405                 "pop %%eax \n\t"
1406 #endif
1407
1408                 /* Save guest registers, load host registers */
1409 #ifdef CONFIG_X86_64
1410                 "mov %%rbx, %c[rbx](%[vcpu]) \n\t"
1411                 "mov %%rcx, %c[rcx](%[vcpu]) \n\t"
1412                 "mov %%rdx, %c[rdx](%[vcpu]) \n\t"
1413                 "mov %%rsi, %c[rsi](%[vcpu]) \n\t"
1414                 "mov %%rdi, %c[rdi](%[vcpu]) \n\t"
1415                 "mov %%rbp, %c[rbp](%[vcpu]) \n\t"
1416                 "mov %%r8,  %c[r8](%[vcpu]) \n\t"
1417                 "mov %%r9,  %c[r9](%[vcpu]) \n\t"
1418                 "mov %%r10, %c[r10](%[vcpu]) \n\t"
1419                 "mov %%r11, %c[r11](%[vcpu]) \n\t"
1420                 "mov %%r12, %c[r12](%[vcpu]) \n\t"
1421                 "mov %%r13, %c[r13](%[vcpu]) \n\t"
1422                 "mov %%r14, %c[r14](%[vcpu]) \n\t"
1423                 "mov %%r15, %c[r15](%[vcpu]) \n\t"
1424
1425                 "pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
1426                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
1427                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
1428                 "pop  %%rdx; pop  %%rcx; pop  %%rbx; \n\t"
1429 #else
1430                 "mov %%ebx, %c[rbx](%[vcpu]) \n\t"
1431                 "mov %%ecx, %c[rcx](%[vcpu]) \n\t"
1432                 "mov %%edx, %c[rdx](%[vcpu]) \n\t"
1433                 "mov %%esi, %c[rsi](%[vcpu]) \n\t"
1434                 "mov %%edi, %c[rdi](%[vcpu]) \n\t"
1435                 "mov %%ebp, %c[rbp](%[vcpu]) \n\t"
1436
1437                 "pop  %%ebp; pop  %%edi; pop  %%esi;"
1438                 "pop  %%edx; pop  %%ecx; pop  %%ebx; \n\t"
1439 #endif
1440                 :
1441                 : [vcpu]"a"(vcpu),
1442                   [svm]"i"(offsetof(struct kvm_vcpu, svm)),
1443                   [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
1444                   [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1445                   [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1446                   [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1447                   [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1448                   [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1449                   [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP]))
1450 #ifdef CONFIG_X86_64
1451                   ,[r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1452                   [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1453                   [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1454                   [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1455                   [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1456                   [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1457                   [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1458                   [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15]))
1459 #endif
1460                 : "cc", "memory" );
1461
1462         fx_save(vcpu->guest_fx_image);
1463         fx_restore(vcpu->host_fx_image);
1464
1465         if ((vcpu->svm->vmcb->save.dr7 & 0xff))
1466                 load_db_regs(vcpu->svm->host_db_regs);
1467
1468         vcpu->cr2 = vcpu->svm->vmcb->save.cr2;
1469
1470         write_dr6(vcpu->svm->host_dr6);
1471         write_dr7(vcpu->svm->host_dr7);
1472         kvm_write_cr2(vcpu->svm->host_cr2);
1473
1474         load_fs(fs_selector);
1475         load_gs(gs_selector);
1476         load_ldt(ldt_selector);
1477         load_host_msrs(vcpu);
1478
1479         reload_tss(vcpu);
1480
1481         stgi();
1482
1483         kvm_reput_irq(vcpu);
1484
1485         vcpu->svm->next_rip = 0;
1486
1487         if (vcpu->svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
1488                 kvm_run->exit_type = KVM_EXIT_TYPE_FAIL_ENTRY;
1489                 kvm_run->exit_reason = vcpu->svm->vmcb->control.exit_code;
1490                 return 0;
1491         }
1492
1493         if (handle_exit(vcpu, kvm_run)) {
1494                 if (signal_pending(current)) {
1495                         ++kvm_stat.signal_exits;
1496                         return -EINTR;
1497                 }
1498                 kvm_resched(vcpu);
1499                 goto again;
1500         }
1501         return 0;
1502 }
1503
1504 static void svm_flush_tlb(struct kvm_vcpu *vcpu)
1505 {
1506         force_new_asid(vcpu);
1507 }
1508
1509 static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
1510 {
1511         vcpu->svm->vmcb->save.cr3 = root;
1512         force_new_asid(vcpu);
1513 }
1514
1515 static void svm_inject_page_fault(struct kvm_vcpu *vcpu,
1516                                   unsigned long  addr,
1517                                   uint32_t err_code)
1518 {
1519         uint32_t exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
1520
1521         ++kvm_stat.pf_guest;
1522
1523         if (is_page_fault(exit_int_info)) {
1524
1525                 vcpu->svm->vmcb->control.event_inj_err = 0;
1526                 vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
1527                                                         SVM_EVTINJ_VALID_ERR |
1528                                                         SVM_EVTINJ_TYPE_EXEPT |
1529                                                         DF_VECTOR;
1530                 return;
1531         }
1532         vcpu->cr2 = addr;
1533         vcpu->svm->vmcb->save.cr2 = addr;
1534         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
1535                                                 SVM_EVTINJ_VALID_ERR |
1536                                                 SVM_EVTINJ_TYPE_EXEPT |
1537                                                 PF_VECTOR;
1538         vcpu->svm->vmcb->control.event_inj_err = err_code;
1539 }
1540
1541
1542 static int is_disabled(void)
1543 {
1544         return 0;
1545 }
1546
1547 static struct kvm_arch_ops svm_arch_ops = {
1548         .cpu_has_kvm_support = has_svm,
1549         .disabled_by_bios = is_disabled,
1550         .hardware_setup = svm_hardware_setup,
1551         .hardware_unsetup = svm_hardware_unsetup,
1552         .hardware_enable = svm_hardware_enable,
1553         .hardware_disable = svm_hardware_disable,
1554
1555         .vcpu_create = svm_create_vcpu,
1556         .vcpu_free = svm_free_vcpu,
1557
1558         .vcpu_load = svm_vcpu_load,
1559         .vcpu_put = svm_vcpu_put,
1560
1561         .set_guest_debug = svm_guest_debug,
1562         .get_msr = svm_get_msr,
1563         .set_msr = svm_set_msr,
1564         .get_segment_base = svm_get_segment_base,
1565         .get_segment = svm_get_segment,
1566         .set_segment = svm_set_segment,
1567         .get_cs_db_l_bits = svm_get_cs_db_l_bits,
1568         .set_cr0 = svm_set_cr0,
1569         .set_cr0_no_modeswitch = svm_set_cr0,
1570         .set_cr3 = svm_set_cr3,
1571         .set_cr4 = svm_set_cr4,
1572         .set_efer = svm_set_efer,
1573         .get_idt = svm_get_idt,
1574         .set_idt = svm_set_idt,
1575         .get_gdt = svm_get_gdt,
1576         .set_gdt = svm_set_gdt,
1577         .get_dr = svm_get_dr,
1578         .set_dr = svm_set_dr,
1579         .cache_regs = svm_cache_regs,
1580         .decache_regs = svm_decache_regs,
1581         .get_rflags = svm_get_rflags,
1582         .set_rflags = svm_set_rflags,
1583
1584         .invlpg = svm_invlpg,
1585         .tlb_flush = svm_flush_tlb,
1586         .inject_page_fault = svm_inject_page_fault,
1587
1588         .inject_gp = svm_inject_gp,
1589
1590         .run = svm_vcpu_run,
1591         .skip_emulated_instruction = skip_emulated_instruction,
1592         .vcpu_setup = svm_vcpu_setup,
1593 };
1594
1595 static int __init svm_init(void)
1596 {
1597         return kvm_init_arch(&svm_arch_ops, THIS_MODULE);
1598 }
1599
1600 static void __exit svm_exit(void)
1601 {
1602         kvm_exit_arch();
1603 }
1604
1605 module_init(svm_init)
1606 module_exit(svm_exit)