drivers/infiniband/hw/ipath/ipath_driver.c

   1 /*
   2  * Copyright (c) 2006, 2007, 2008 QLogic Corporation. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/sched.h>
  35 #include <linux/spinlock.h>
  36 #include <linux/idr.h>
  37 #include <linux/pci.h>
  38 #include <linux/io.h>
  39 #include <linux/delay.h>
  40 #include <linux/netdevice.h>
  41 #include <linux/vmalloc.h>
  42 #include <linux/bitmap.h>
  43 #include <linux/slab.h>
  44
  45 #include "ipath_kernel.h"
  46 #include "ipath_verbs.h"
  47
  48 static void ipath_update_pio_bufs(struct ipath_devdata *);
  49
  50 const char *ipath_get_unit_name(int unit)
  51 {
  52         static char iname[16];
  53         snprintf(iname, sizeof iname, "infinipath%u", unit);
  54         return iname;
  55 }
  56
  57 #define DRIVER_LOAD_MSG "QLogic " IPATH_DRV_NAME " loaded: "
  58 #define PFX IPATH_DRV_NAME ": "
  59
  60 /*
  61  * The size has to be longer than this string, so we can append
  62  * board/chip information to it in the init code.
  63  */
  64 const char ib_ipath_version[] = IPATH_IDSTR "\n";
  65
  66 static struct idr unit_table;
  67 DEFINE_SPINLOCK(ipath_devs_lock);
  68 LIST_HEAD(ipath_dev_list);
  69
  70 wait_queue_head_t ipath_state_wait;
  71
  72 unsigned ipath_debug = __IPATH_INFO;
  73
  74 module_param_named(debug, ipath_debug, uint, S_IWUSR | S_IRUGO);
  75 MODULE_PARM_DESC(debug, "mask for debug prints");
  76 EXPORT_SYMBOL_GPL(ipath_debug);
  77
  78 unsigned ipath_mtu4096 = 1; /* max 4KB IB mtu by default, if supported */
  79 module_param_named(mtu4096, ipath_mtu4096, uint, S_IRUGO);
  80 MODULE_PARM_DESC(mtu4096, "enable MTU of 4096 bytes, if supported");
  81
  82 static unsigned ipath_hol_timeout_ms = 13000;
  83 module_param_named(hol_timeout_ms, ipath_hol_timeout_ms, uint, S_IRUGO);
  84 MODULE_PARM_DESC(hol_timeout_ms,
  85         "duration of user app suspension after link failure");
  86
  87 unsigned ipath_linkrecovery = 1;
  88 module_param_named(linkrecovery, ipath_linkrecovery, uint, S_IWUSR | S_IRUGO);
  89 MODULE_PARM_DESC(linkrecovery, "enable workaround for link recovery issue");
  90
  91 MODULE_LICENSE("GPL");
  92 MODULE_AUTHOR("QLogic <support@qlogic.com>");
  93 MODULE_DESCRIPTION("QLogic InfiniPath driver");
  94
  95 /*
  96  * Table to translate the LINKTRAININGSTATE portion of
  97  * IBCStatus to a human-readable form.
  98  */
  99 const char *ipath_ibcstatus_str[] = {
 100         "Disabled",
 101         "LinkUp",
 102         "PollActive",
 103         "PollQuiet",
 104         "SleepDelay",
 105         "SleepQuiet",
 106         "LState6",              /* unused */
 107         "LState7",              /* unused */
 108         "CfgDebounce",
 109         "CfgRcvfCfg",
 110         "CfgWaitRmt",
 111         "CfgIdle",
 112         "RecovRetrain",
 113         "CfgTxRevLane",         /* unused before IBA7220 */
 114         "RecovWaitRmt",
 115         "RecovIdle",
 116         /* below were added for IBA7220 */
 117         "CfgEnhanced",
 118         "CfgTest",
 119         "CfgWaitRmtTest",
 120         "CfgWaitCfgEnhanced",
 121         "SendTS_T",
 122         "SendTstIdles",
 123         "RcvTS_T",
 124         "SendTst_TS1s",
 125         "LTState18", "LTState19", "LTState1A", "LTState1B",
 126         "LTState1C", "LTState1D", "LTState1E", "LTState1F"
 127 };
 128
 129 static void __devexit ipath_remove_one(struct pci_dev *);
 130 static int __devinit ipath_init_one(struct pci_dev *,
 131                                     const struct pci_device_id *);
 132
 133 /* Only needed for registration, nothing else needs this info */
 134 #define PCI_VENDOR_ID_PATHSCALE 0x1fc1
 135 #define PCI_DEVICE_ID_INFINIPATH_HT 0xd
 136
 137 /* Number of seconds before our card status check...  */
 138 #define STATUS_TIMEOUT 60
 139
 140 static const struct pci_device_id ipath_pci_tbl[] = {
 141         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_HT) },
 142         { 0, }
 143 };
 144
 145 MODULE_DEVICE_TABLE(pci, ipath_pci_tbl);
 146
 147 static struct pci_driver ipath_driver = {
 148         .name = IPATH_DRV_NAME,
 149         .probe = ipath_init_one,
 150         .remove = __devexit_p(ipath_remove_one),
 151         .id_table = ipath_pci_tbl,
 152         .driver = {
 153                 .groups = ipath_driver_attr_groups,
 154         },
 155 };
 156
 157 static inline void read_bars(struct ipath_devdata *dd, struct pci_dev *dev,
 158                              u32 *bar0, u32 *bar1)
 159 {
 160         int ret;
 161
 162         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
 163         if (ret)
 164                 ipath_dev_err(dd, "failed to read bar0 before enable: "
 165                               "error %d\n", -ret);
 166
 167         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, bar1);
 168         if (ret)
 169                 ipath_dev_err(dd, "failed to read bar1 before enable: "
 170                               "error %d\n", -ret);
 171
 172         ipath_dbg("Read bar0 %x bar1 %x\n", *bar0, *bar1);
 173 }
 174
 175 static void ipath_free_devdata(struct pci_dev *pdev,
 176                                struct ipath_devdata *dd)
 177 {
 178         unsigned long flags;
 179
 180         pci_set_drvdata(pdev, NULL);
 181
 182         if (dd->ipath_unit != -1) {
 183                 spin_lock_irqsave(&ipath_devs_lock, flags);
 184                 idr_remove(&unit_table, dd->ipath_unit);
 185                 list_del(&dd->ipath_list);
 186                 spin_unlock_irqrestore(&ipath_devs_lock, flags);
 187         }
 188         vfree(dd);
 189 }
 190
 191 static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev)
 192 {
 193         unsigned long flags;
 194         struct ipath_devdata *dd;
 195         int ret;
 196
 197         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
 198                 dd = ERR_PTR(-ENOMEM);
 199                 goto bail;
 200         }
 201
 202         dd = vzalloc(sizeof(*dd));
 203         if (!dd) {
 204                 dd = ERR_PTR(-ENOMEM);
 205                 goto bail;
 206         }
 207         dd->ipath_unit = -1;
 208
 209         spin_lock_irqsave(&ipath_devs_lock, flags);
 210
 211         ret = idr_get_new(&unit_table, dd, &dd->ipath_unit);
 212         if (ret < 0) {
 213                 printk(KERN_ERR IPATH_DRV_NAME
 214                        ": Could not allocate unit ID: error %d\n", -ret);
 215                 ipath_free_devdata(pdev, dd);
 216                 dd = ERR_PTR(ret);
 217                 goto bail_unlock;
 218         }
 219
 220         dd->pcidev = pdev;
 221         pci_set_drvdata(pdev, dd);
 222
 223         list_add(&dd->ipath_list, &ipath_dev_list);
 224
 225 bail_unlock:
 226         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 227
 228 bail:
 229         return dd;
 230 }
 231
 232 static inline struct ipath_devdata *__ipath_lookup(int unit)
 233 {
 234         return idr_find(&unit_table, unit);
 235 }
 236
 237 struct ipath_devdata *ipath_lookup(int unit)
 238 {
 239         struct ipath_devdata *dd;
 240         unsigned long flags;
 241
 242         spin_lock_irqsave(&ipath_devs_lock, flags);
 243         dd = __ipath_lookup(unit);
 244         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 245
 246         return dd;
 247 }
 248
 249 int ipath_count_units(int *npresentp, int *nupp, int *maxportsp)
 250 {
 251         int nunits, npresent, nup;
 252         struct ipath_devdata *dd;
 253         unsigned long flags;
 254         int maxports;
 255
 256         nunits = npresent = nup = maxports = 0;
 257
 258         spin_lock_irqsave(&ipath_devs_lock, flags);
 259
 260         list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
 261                 nunits++;
 262                 if ((dd->ipath_flags & IPATH_PRESENT) && dd->ipath_kregbase)
 263                         npresent++;
 264                 if (dd->ipath_lid &&
 265                     !(dd->ipath_flags & (IPATH_DISABLED | IPATH_LINKDOWN
 266                                          | IPATH_LINKUNK)))
 267                         nup++;
 268                 if (dd->ipath_cfgports > maxports)
 269                         maxports = dd->ipath_cfgports;
 270         }
 271
 272         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 273
 274         if (npresentp)
 275                 *npresentp = npresent;
 276         if (nupp)
 277                 *nupp = nup;
 278         if (maxportsp)
 279                 *maxportsp = maxports;
 280
 281         return nunits;
 282 }
 283
 284 /*
 285  * These next two routines are placeholders in case we don't have per-arch
 286  * code for controlling write combining.  If explicit control of write
 287  * combining is not available, performance will probably be awful.
 288  */
 289
 290 int __attribute__((weak)) ipath_enable_wc(struct ipath_devdata *dd)
 291 {
 292         return -EOPNOTSUPP;
 293 }
 294
 295 void __attribute__((weak)) ipath_disable_wc(struct ipath_devdata *dd)
 296 {
 297 }
 298
 299 /*
 300  * Perform a PIO buffer bandwidth write test, to verify proper system
 301  * configuration.  Even when all the setup calls work, occasionally
 302  * BIOS or other issues can prevent write combining from working, or
 303  * can cause other bandwidth problems to the chip.
 304  *
 305  * This test simply writes the same buffer over and over again, and
 306  * measures close to the peak bandwidth to the chip (not testing
 307  * data bandwidth to the wire).   On chips that use an address-based
 308  * trigger to send packets to the wire, this is easy.  On chips that
 309  * use a count to trigger, we want to make sure that the packet doesn't
 310  * go out on the wire, or trigger flow control checks.
 311  */
 312 static void ipath_verify_pioperf(struct ipath_devdata *dd)
 313 {
 314         u32 pbnum, cnt, lcnt;
 315         u32 __iomem *piobuf;
 316         u32 *addr;
 317         u64 msecs, emsecs;
 318
 319         piobuf = ipath_getpiobuf(dd, 0, &pbnum);
 320         if (!piobuf) {
 321                 dev_info(&dd->pcidev->dev,
 322                         "No PIObufs for checking perf, skipping\n");
 323                 return;
 324         }
 325
 326         /*
 327          * Enough to give us a reasonable test, less than piobuf size, and
 328          * likely multiple of store buffer length.
 329          */
 330         cnt = 1024;
 331
 332         addr = vmalloc(cnt);
 333         if (!addr) {
 334                 dev_info(&dd->pcidev->dev,
 335                         "Couldn't get memory for checking PIO perf,"
 336                         " skipping\n");
 337                 goto done;
 338         }
 339
 340         preempt_disable();  /* we want reasonably accurate elapsed time */
 341         msecs = 1 + jiffies_to_msecs(jiffies);
 342         for (lcnt = 0; lcnt < 10000U; lcnt++) {
 343                 /* wait until we cross msec boundary */
 344                 if (jiffies_to_msecs(jiffies) >= msecs)
 345                         break;
 346                 udelay(1);
 347         }
 348
 349         ipath_disable_armlaunch(dd);
 350
 351         /*
 352          * length 0, no dwords actually sent, and mark as VL15
 353          * on chips where that may matter (due to IB flowcontrol)
 354          */
 355         if ((dd->ipath_flags & IPATH_HAS_PBC_CNT))
 356                 writeq(1UL << 63, piobuf);
 357         else
 358                 writeq(0, piobuf);
 359         ipath_flush_wc();
 360
 361         /*
 362          * this is only roughly accurate, since even with preempt we
 363          * still take interrupts that could take a while.   Running for
 364          * >= 5 msec seems to get us "close enough" to accurate values
 365          */
 366         msecs = jiffies_to_msecs(jiffies);
 367         for (emsecs = lcnt = 0; emsecs <= 5UL; lcnt++) {
 368                 __iowrite32_copy(piobuf + 64, addr, cnt >> 2);
 369                 emsecs = jiffies_to_msecs(jiffies) - msecs;
 370         }
 371
 372         /* 1 GiB/sec, slightly over IB SDR line rate */
 373         if (lcnt < (emsecs * 1024U))
 374                 ipath_dev_err(dd,
 375                         "Performance problem: bandwidth to PIO buffers is "
 376                         "only %u MiB/sec\n",
 377                         lcnt / (u32) emsecs);
 378         else
 379                 ipath_dbg("PIO buffer bandwidth %u MiB/sec is OK\n",
 380                         lcnt / (u32) emsecs);
 381
 382         preempt_enable();
 383
 384         vfree(addr);
 385
 386 done:
 387         /* disarm piobuf, so it's available again */
 388         ipath_disarm_piobufs(dd, pbnum, 1);
 389         ipath_enable_armlaunch(dd);
 390 }
 391
 392 static void cleanup_device(struct ipath_devdata *dd);
 393
 394 static int __devinit ipath_init_one(struct pci_dev *pdev,
 395                                     const struct pci_device_id *ent)
 396 {
 397         int ret, len, j;
 398         struct ipath_devdata *dd;
 399         unsigned long long addr;
 400         u32 bar0 = 0, bar1 = 0;
 401
 402         dd = ipath_alloc_devdata(pdev);
 403         if (IS_ERR(dd)) {
 404                 ret = PTR_ERR(dd);
 405                 printk(KERN_ERR IPATH_DRV_NAME
 406                        ": Could not allocate devdata: error %d\n", -ret);
 407                 goto bail;
 408         }
 409
 410         ipath_cdbg(VERBOSE, "initializing unit #%u\n", dd->ipath_unit);
 411
 412         ret = pci_enable_device(pdev);
 413         if (ret) {
 414                 /* This can happen iff:
 415                  *
 416                  * We did a chip reset, and then failed to reprogram the
 417                  * BAR, or the chip reset due to an internal error.  We then
 418                  * unloaded the driver and reloaded it.
 419                  *
 420                  * Both reset cases set the BAR back to initial state.  For
 421                  * the latter case, the AER sticky error bit at offset 0x718
 422                  * should be set, but the Linux kernel doesn't yet know
 423                  * about that, it appears.  If the original BAR was retained
 424                  * in the kernel data structures, this may be OK.
 425                  */
 426                 ipath_dev_err(dd, "enable unit %d failed: error %d\n",
 427                               dd->ipath_unit, -ret);
 428                 goto bail_devdata;
 429         }
 430         addr = pci_resource_start(pdev, 0);
 431         len = pci_resource_len(pdev, 0);
 432         ipath_cdbg(VERBOSE, "regbase (0) %llx len %d irq %d, vend %x/%x "
 433                    "driver_data %lx\n", addr, len, pdev->irq, ent->vendor,
 434                    ent->device, ent->driver_data);
 435
 436         read_bars(dd, pdev, &bar0, &bar1);
 437
 438         if (!bar1 && !(bar0 & ~0xf)) {
 439                 if (addr) {
 440                         dev_info(&pdev->dev, "BAR is 0 (probable RESET), "
 441                                  "rewriting as %llx\n", addr);
 442                         ret = pci_write_config_dword(
 443                                 pdev, PCI_BASE_ADDRESS_0, addr);
 444                         if (ret) {
 445                                 ipath_dev_err(dd, "rewrite of BAR0 "
 446                                               "failed: err %d\n", -ret);
 447                                 goto bail_disable;
 448                         }
 449                         ret = pci_write_config_dword(
 450                                 pdev, PCI_BASE_ADDRESS_1, addr >> 32);
 451                         if (ret) {
 452                                 ipath_dev_err(dd, "rewrite of BAR1 "
 453                                               "failed: err %d\n", -ret);
 454                                 goto bail_disable;
 455                         }
 456                 } else {
 457                         ipath_dev_err(dd, "BAR is 0 (probable RESET), "
 458                                       "not usable until reboot\n");
 459                         ret = -ENODEV;
 460                         goto bail_disable;
 461                 }
 462         }
 463
 464         ret = pci_request_regions(pdev, IPATH_DRV_NAME);
 465         if (ret) {
 466                 dev_info(&pdev->dev, "pci_request_regions unit %u fails: "
 467                          "err %d\n", dd->ipath_unit, -ret);
 468                 goto bail_disable;
 469         }
 470
 471         ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
 472         if (ret) {
 473                 /*
 474                  * if the 64 bit setup fails, try 32 bit.  Some systems
 475                  * do not setup 64 bit maps on systems with 2GB or less
 476                  * memory installed.
 477                  */
 478                 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
 479                 if (ret) {
 480                         dev_info(&pdev->dev,
 481                                 "Unable to set DMA mask for unit %u: %d\n",
 482                                 dd->ipath_unit, ret);
 483                         goto bail_regions;
 484                 }
 485                 else {
 486                         ipath_dbg("No 64bit DMA mask, used 32 bit mask\n");
 487                         ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
 488                         if (ret)
 489                                 dev_info(&pdev->dev,
 490                                         "Unable to set DMA consistent mask "
 491                                         "for unit %u: %d\n",
 492                                         dd->ipath_unit, ret);
 493
 494                 }
 495         }
 496         else {
 497                 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
 498                 if (ret)
 499                         dev_info(&pdev->dev,
 500                                 "Unable to set DMA consistent mask "
 501                                 "for unit %u: %d\n",
 502                                 dd->ipath_unit, ret);
 503         }
 504
 505         pci_set_master(pdev);
 506
 507         /*
 508          * Save BARs to rewrite after device reset.  Save all 64 bits of
 509          * BAR, just in case.
 510          */
 511         dd->ipath_pcibar0 = addr;
 512         dd->ipath_pcibar1 = addr >> 32;
 513         dd->ipath_deviceid = ent->device;       /* save for later use */
 514         dd->ipath_vendorid = ent->vendor;
 515
 516         /* setup the chip-specific functions, as early as possible. */
 517         switch (ent->device) {
 518         case PCI_DEVICE_ID_INFINIPATH_HT:
 519                 ipath_init_iba6110_funcs(dd);
 520                 break;
 521
 522         default:
 523                 ipath_dev_err(dd, "Found unknown QLogic deviceid 0x%x, "
 524                               "failing\n", ent->device);
 525                 return -ENODEV;
 526         }
 527
 528         for (j = 0; j < 6; j++) {
 529                 if (!pdev->resource[j].start)
 530                         continue;
 531                 ipath_cdbg(VERBOSE, "BAR %d %pR, len %llx\n",
 532                            j, &pdev->resource[j],
 533                            (unsigned long long)pci_resource_len(pdev, j));
 534         }
 535
 536         if (!addr) {
 537                 ipath_dev_err(dd, "No valid address in BAR 0!\n");
 538                 ret = -ENODEV;
 539                 goto bail_regions;
 540         }
 541
 542         dd->ipath_pcirev = pdev->revision;
 543
 544 #if defined(__powerpc__)
 545         /* There isn't a generic way to specify writethrough mappings */
 546         dd->ipath_kregbase = __ioremap(addr, len,
 547                 (_PAGE_NO_CACHE|_PAGE_WRITETHRU));
 548 #else
 549         dd->ipath_kregbase = ioremap_nocache(addr, len);
 550 #endif
 551
 552         if (!dd->ipath_kregbase) {
 553                 ipath_dbg("Unable to map io addr %llx to kvirt, failing\n",
 554                           addr);
 555                 ret = -ENOMEM;
 556                 goto bail_iounmap;
 557         }
 558         dd->ipath_kregend = (u64 __iomem *)
 559                 ((void __iomem *)dd->ipath_kregbase + len);
 560         dd->ipath_physaddr = addr;      /* used for io_remap, etc. */
 561         /* for user mmap */
 562         ipath_cdbg(VERBOSE, "mapped io addr %llx to kregbase %p\n",
 563                    addr, dd->ipath_kregbase);
 564
 565         if (dd->ipath_f_bus(dd, pdev))
 566                 ipath_dev_err(dd, "Failed to setup config space; "
 567                               "continuing anyway\n");
 568
 569         /*
 570          * set up our interrupt handler; IRQF_SHARED probably not needed,
 571          * since MSI interrupts shouldn't be shared but won't  hurt for now.
 572          * check 0 irq after we return from chip-specific bus setup, since
 573          * that can affect this due to setup
 574          */
 575         if (!dd->ipath_irq)
 576                 ipath_dev_err(dd, "irq is 0, BIOS error?  Interrupts won't "
 577                               "work\n");
 578         else {
 579                 ret = request_irq(dd->ipath_irq, ipath_intr, IRQF_SHARED,
 580                                   IPATH_DRV_NAME, dd);
 581                 if (ret) {
 582                         ipath_dev_err(dd, "Couldn't setup irq handler, "
 583                                       "irq=%d: %d\n", dd->ipath_irq, ret);
 584                         goto bail_iounmap;
 585                 }
 586         }
 587
 588         ret = ipath_init_chip(dd, 0);   /* do the chip-specific init */
 589         if (ret)
 590                 goto bail_irqsetup;
 591
 592         ret = ipath_enable_wc(dd);
 593
 594         if (ret) {
 595                 ipath_dev_err(dd, "Write combining not enabled "
 596                               "(err %d): performance may be poor\n",
 597                               -ret);
 598                 ret = 0;
 599         }
 600
 601         ipath_verify_pioperf(dd);
 602
 603         ipath_device_create_group(&pdev->dev, dd);
 604         ipathfs_add_device(dd);
 605         ipath_user_add(dd);
 606         ipath_diag_add(dd);
 607         ipath_register_ib_device(dd);
 608
 609         goto bail;
 610
 611 bail_irqsetup:
 612         cleanup_device(dd);
 613
 614         if (dd->ipath_irq)
 615                 dd->ipath_f_free_irq(dd);
 616
 617         if (dd->ipath_f_cleanup)
 618                 dd->ipath_f_cleanup(dd);
 619
 620 bail_iounmap:
 621         iounmap((volatile void __iomem *) dd->ipath_kregbase);
 622
 623 bail_regions:
 624         pci_release_regions(pdev);
 625
 626 bail_disable:
 627         pci_disable_device(pdev);
 628
 629 bail_devdata:
 630         ipath_free_devdata(pdev, dd);
 631
 632 bail:
 633         return ret;
 634 }
 635
 636 static void cleanup_device(struct ipath_devdata *dd)
 637 {
 638         int port;
 639         struct ipath_portdata **tmp;
 640         unsigned long flags;
 641
 642         if (*dd->ipath_statusp & IPATH_STATUS_CHIP_PRESENT) {
 643                 /* can't do anything more with chip; needs re-init */
 644                 *dd->ipath_statusp &= ~IPATH_STATUS_CHIP_PRESENT;
 645                 if (dd->ipath_kregbase) {
 646                         /*
 647                          * if we haven't already cleaned up before these are
 648                          * to ensure any register reads/writes "fail" until
 649                          * re-init
 650                          */
 651                         dd->ipath_kregbase = NULL;
 652                         dd->ipath_uregbase = 0;
 653                         dd->ipath_sregbase = 0;
 654                         dd->ipath_cregbase = 0;
 655                         dd->ipath_kregsize = 0;
 656                 }
 657                 ipath_disable_wc(dd);
 658         }
 659
 660         if (dd->ipath_spectriggerhit)
 661                 dev_info(&dd->pcidev->dev, "%lu special trigger hits\n",
 662                          dd->ipath_spectriggerhit);
 663
 664         if (dd->ipath_pioavailregs_dma) {
 665                 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
 666                                   (void *) dd->ipath_pioavailregs_dma,
 667                                   dd->ipath_pioavailregs_phys);
 668                 dd->ipath_pioavailregs_dma = NULL;
 669         }
 670         if (dd->ipath_dummy_hdrq) {
 671                 dma_free_coherent(&dd->pcidev->dev,
 672                         dd->ipath_pd[0]->port_rcvhdrq_size,
 673                         dd->ipath_dummy_hdrq, dd->ipath_dummy_hdrq_phys);
 674                 dd->ipath_dummy_hdrq = NULL;
 675         }
 676
 677         if (dd->ipath_pageshadow) {
 678                 struct page **tmpp = dd->ipath_pageshadow;
 679                 dma_addr_t *tmpd = dd->ipath_physshadow;
 680                 int i, cnt = 0;
 681
 682                 ipath_cdbg(VERBOSE, "Unlocking any expTID pages still "
 683                            "locked\n");
 684                 for (port = 0; port < dd->ipath_cfgports; port++) {
 685                         int port_tidbase = port * dd->ipath_rcvtidcnt;
 686                         int maxtid = port_tidbase + dd->ipath_rcvtidcnt;
 687                         for (i = port_tidbase; i < maxtid; i++) {
 688                                 if (!tmpp[i])
 689                                         continue;
 690                                 pci_unmap_page(dd->pcidev, tmpd[i],
 691                                         PAGE_SIZE, PCI_DMA_FROMDEVICE);
 692                                 ipath_release_user_pages(&tmpp[i], 1);
 693                                 tmpp[i] = NULL;
 694                                 cnt++;
 695                         }
 696                 }
 697                 if (cnt) {
 698                         ipath_stats.sps_pageunlocks += cnt;
 699                         ipath_cdbg(VERBOSE, "There were still %u expTID "
 700                                    "entries locked\n", cnt);
 701                 }
 702                 if (ipath_stats.sps_pagelocks ||
 703                     ipath_stats.sps_pageunlocks)
 704                         ipath_cdbg(VERBOSE, "%llu pages locked, %llu "
 705                                    "unlocked via ipath_m{un}lock\n",
 706                                    (unsigned long long)
 707                                    ipath_stats.sps_pagelocks,
 708                                    (unsigned long long)
 709                                    ipath_stats.sps_pageunlocks);
 710
 711                 ipath_cdbg(VERBOSE, "Free shadow page tid array at %p\n",
 712                            dd->ipath_pageshadow);
 713                 tmpp = dd->ipath_pageshadow;
 714                 dd->ipath_pageshadow = NULL;
 715                 vfree(tmpp);
 716
 717                 dd->ipath_egrtidbase = NULL;
 718         }
 719
 720         /*
 721          * free any resources still in use (usually just kernel ports)
 722          * at unload; we do for portcnt, because that's what we allocate.
 723          * We acquire lock to be really paranoid that ipath_pd isn't being
 724          * accessed from some interrupt-related code (that should not happen,
 725          * but best to be sure).
 726          */
 727         spin_lock_irqsave(&dd->ipath_uctxt_lock, flags);
 728         tmp = dd->ipath_pd;
 729         dd->ipath_pd = NULL;
 730         spin_unlock_irqrestore(&dd->ipath_uctxt_lock, flags);
 731         for (port = 0; port < dd->ipath_portcnt; port++) {
 732                 struct ipath_portdata *pd = tmp[port];
 733                 tmp[port] = NULL; /* debugging paranoia */
 734                 ipath_free_pddata(dd, pd);
 735         }
 736         kfree(tmp);
 737 }
 738
 739 static void __devexit ipath_remove_one(struct pci_dev *pdev)
 740 {
 741         struct ipath_devdata *dd = pci_get_drvdata(pdev);
 742
 743         ipath_cdbg(VERBOSE, "removing, pdev=%p, dd=%p\n", pdev, dd);
 744
 745         /*
 746          * disable the IB link early, to be sure no new packets arrive, which
 747          * complicates the shutdown process
 748          */
 749         ipath_shutdown_device(dd);
 750
 751         flush_workqueue(ib_wq);
 752
 753         if (dd->verbs_dev)
 754                 ipath_unregister_ib_device(dd->verbs_dev);
 755
 756         ipath_diag_remove(dd);
 757         ipath_user_remove(dd);
 758         ipathfs_remove_device(dd);
 759         ipath_device_remove_group(&pdev->dev, dd);
 760
 761         ipath_cdbg(VERBOSE, "Releasing pci memory regions, dd %p, "
 762                    "unit %u\n", dd, (u32) dd->ipath_unit);
 763
 764         cleanup_device(dd);
 765
 766         /*
 767          * turn off rcv, send, and interrupts for all ports, all drivers
 768          * should also hard reset the chip here?
 769          * free up port 0 (kernel) rcvhdr, egr bufs, and eventually tid bufs
 770          * for all versions of the driver, if they were allocated
 771          */
 772         if (dd->ipath_irq) {
 773                 ipath_cdbg(VERBOSE, "unit %u free irq %d\n",
 774                            dd->ipath_unit, dd->ipath_irq);
 775                 dd->ipath_f_free_irq(dd);
 776         } else
 777                 ipath_dbg("irq is 0, not doing free_irq "
 778                           "for unit %u\n", dd->ipath_unit);
 779         /*
 780          * we check for NULL here, because it's outside
 781          * the kregbase check, and we need to call it
 782          * after the free_irq.  Thus it's possible that
 783          * the function pointers were never initialized.
 784          */
 785         if (dd->ipath_f_cleanup)
 786                 /* clean up chip-specific stuff */
 787                 dd->ipath_f_cleanup(dd);
 788
 789         ipath_cdbg(VERBOSE, "Unmapping kregbase %p\n", dd->ipath_kregbase);
 790         iounmap((volatile void __iomem *) dd->ipath_kregbase);
 791         pci_release_regions(pdev);
 792         ipath_cdbg(VERBOSE, "calling pci_disable_device\n");
 793         pci_disable_device(pdev);
 794
 795         ipath_free_devdata(pdev, dd);
 796 }
 797
 798 /* general driver use */
 799 DEFINE_MUTEX(ipath_mutex);
 800
 801 static DEFINE_SPINLOCK(ipath_pioavail_lock);
 802
 803 /**
 804  * ipath_disarm_piobufs - cancel a range of PIO buffers
 805  * @dd: the infinipath device
 806  * @first: the first PIO buffer to cancel
 807  * @cnt: the number of PIO buffers to cancel
 808  *
 809  * cancel a range of PIO buffers, used when they might be armed, but
 810  * not triggered.  Used at init to ensure buffer state, and also user
 811  * process close, in case it died while writing to a PIO buffer
 812  * Also after errors.
 813  */
 814 void ipath_disarm_piobufs(struct ipath_devdata *dd, unsigned first,
 815                           unsigned cnt)
 816 {
 817         unsigned i, last = first + cnt;
 818         unsigned long flags;
 819
 820         ipath_cdbg(PKT, "disarm %u PIObufs first=%u\n", cnt, first);
 821         for (i = first; i < last; i++) {
 822                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
 823                 /*
 824                  * The disarm-related bits are write-only, so it
 825                  * is ok to OR them in with our copy of sendctrl
 826                  * while we hold the lock.
 827                  */
 828                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 829                         dd->ipath_sendctrl | INFINIPATH_S_DISARM |
 830                         (i << INFINIPATH_S_DISARMPIOBUF_SHIFT));
 831                 /* can't disarm bufs back-to-back per iba7220 spec */
 832                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 833                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
 834         }
 835         /* on some older chips, update may not happen after cancel */
 836         ipath_force_pio_avail_update(dd);
 837 }
 838
 839 /**
 840  * ipath_wait_linkstate - wait for an IB link state change to occur
 841  * @dd: the infinipath device
 842  * @state: the state to wait for
 843  * @msecs: the number of milliseconds to wait
 844  *
 845  * wait up to msecs milliseconds for IB link state change to occur for
 846  * now, take the easy polling route.  Currently used only by
 847  * ipath_set_linkstate.  Returns 0 if state reached, otherwise
 848  * -ETIMEDOUT state can have multiple states set, for any of several
 849  * transitions.
 850  */
 851 int ipath_wait_linkstate(struct ipath_devdata *dd, u32 state, int msecs)
 852 {
 853         dd->ipath_state_wanted = state;
 854         wait_event_interruptible_timeout(ipath_state_wait,
 855                                          (dd->ipath_flags & state),
 856                                          msecs_to_jiffies(msecs));
 857         dd->ipath_state_wanted = 0;
 858
 859         if (!(dd->ipath_flags & state)) {
 860                 u64 val;
 861                 ipath_cdbg(VERBOSE, "Didn't reach linkstate %s within %u"
 862                            " ms\n",
 863                            /* test INIT ahead of DOWN, both can be set */
 864                            (state & IPATH_LINKINIT) ? "INIT" :
 865                            ((state & IPATH_LINKDOWN) ? "DOWN" :
 866                             ((state & IPATH_LINKARMED) ? "ARM" : "ACTIVE")),
 867                            msecs);
 868                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
 869                 ipath_cdbg(VERBOSE, "ibcc=%llx ibcstatus=%llx (%s)\n",
 870                            (unsigned long long) ipath_read_kreg64(
 871                                    dd, dd->ipath_kregs->kr_ibcctrl),
 872                            (unsigned long long) val,
 873                            ipath_ibcstatus_str[val & dd->ibcs_lts_mask]);
 874         }
 875         return (dd->ipath_flags & state) ? 0 : -ETIMEDOUT;
 876 }
 877
 878 static void decode_sdma_errs(struct ipath_devdata *dd, ipath_err_t err,
 879         char *buf, size_t blen)
 880 {
 881         static const struct {
 882                 ipath_err_t err;
 883                 const char *msg;
 884         } errs[] = {
 885                 { INFINIPATH_E_SDMAGENMISMATCH, "SDmaGenMismatch" },
 886                 { INFINIPATH_E_SDMAOUTOFBOUND, "SDmaOutOfBound" },
 887                 { INFINIPATH_E_SDMATAILOUTOFBOUND, "SDmaTailOutOfBound" },
 888                 { INFINIPATH_E_SDMABASE, "SDmaBase" },
 889                 { INFINIPATH_E_SDMA1STDESC, "SDma1stDesc" },
 890                 { INFINIPATH_E_SDMARPYTAG, "SDmaRpyTag" },
 891                 { INFINIPATH_E_SDMADWEN, "SDmaDwEn" },
 892                 { INFINIPATH_E_SDMAMISSINGDW, "SDmaMissingDw" },
 893                 { INFINIPATH_E_SDMAUNEXPDATA, "SDmaUnexpData" },
 894                 { INFINIPATH_E_SDMADESCADDRMISALIGN, "SDmaDescAddrMisalign" },
 895                 { INFINIPATH_E_SENDBUFMISUSE, "SendBufMisuse" },
 896                 { INFINIPATH_E_SDMADISABLED, "SDmaDisabled" },
 897         };
 898         int i;
 899         int expected;
 900         size_t bidx = 0;
 901
 902         for (i = 0; i < ARRAY_SIZE(errs); i++) {
 903                 expected = (errs[i].err != INFINIPATH_E_SDMADISABLED) ? 0 :
 904                         test_bit(IPATH_SDMA_ABORTING, &dd->ipath_sdma_status);
 905                 if ((err & errs[i].err) && !expected)
 906                         bidx += snprintf(buf + bidx, blen - bidx,
 907                                          "%s ", errs[i].msg);
 908         }
 909 }
 910
 911 /*
 912  * Decode the error status into strings, deciding whether to always
 913  * print * it or not depending on "normal packet errors" vs everything
 914  * else.   Return 1 if "real" errors, otherwise 0 if only packet
 915  * errors, so caller can decide what to print with the string.
 916  */
 917 int ipath_decode_err(struct ipath_devdata *dd, char *buf, size_t blen,
 918         ipath_err_t err)
 919 {
 920         int iserr = 1;
 921         *buf = '\0';
 922         if (err & INFINIPATH_E_PKTERRS) {
 923                 if (!(err & ~INFINIPATH_E_PKTERRS))
 924                         iserr = 0; // if only packet errors.
 925                 if (ipath_debug & __IPATH_ERRPKTDBG) {
 926                         if (err & INFINIPATH_E_REBP)
 927                                 strlcat(buf, "EBP ", blen);
 928                         if (err & INFINIPATH_E_RVCRC)
 929                                 strlcat(buf, "VCRC ", blen);
 930                         if (err & INFINIPATH_E_RICRC) {
 931                                 strlcat(buf, "CRC ", blen);
 932                                 // clear for check below, so only once
 933                                 err &= INFINIPATH_E_RICRC;
 934                         }
 935                         if (err & INFINIPATH_E_RSHORTPKTLEN)
 936                                 strlcat(buf, "rshortpktlen ", blen);
 937                         if (err & INFINIPATH_E_SDROPPEDDATAPKT)
 938                                 strlcat(buf, "sdroppeddatapkt ", blen);
 939                         if (err & INFINIPATH_E_SPKTLEN)
 940                                 strlcat(buf, "spktlen ", blen);
 941                 }
 942                 if ((err & INFINIPATH_E_RICRC) &&
 943                         !(err&(INFINIPATH_E_RVCRC|INFINIPATH_E_REBP)))
 944                         strlcat(buf, "CRC ", blen);
 945                 if (!iserr)
 946                         goto done;
 947         }
 948         if (err & INFINIPATH_E_RHDRLEN)
 949                 strlcat(buf, "rhdrlen ", blen);
 950         if (err & INFINIPATH_E_RBADTID)
 951                 strlcat(buf, "rbadtid ", blen);
 952         if (err & INFINIPATH_E_RBADVERSION)
 953                 strlcat(buf, "rbadversion ", blen);
 954         if (err & INFINIPATH_E_RHDR)
 955                 strlcat(buf, "rhdr ", blen);
 956         if (err & INFINIPATH_E_SENDSPECIALTRIGGER)
 957                 strlcat(buf, "sendspecialtrigger ", blen);
 958         if (err & INFINIPATH_E_RLONGPKTLEN)
 959                 strlcat(buf, "rlongpktlen ", blen);
 960         if (err & INFINIPATH_E_RMAXPKTLEN)
 961                 strlcat(buf, "rmaxpktlen ", blen);
 962         if (err & INFINIPATH_E_RMINPKTLEN)
 963                 strlcat(buf, "rminpktlen ", blen);
 964         if (err & INFINIPATH_E_SMINPKTLEN)
 965                 strlcat(buf, "sminpktlen ", blen);
 966         if (err & INFINIPATH_E_RFORMATERR)
 967                 strlcat(buf, "rformaterr ", blen);
 968         if (err & INFINIPATH_E_RUNSUPVL)
 969                 strlcat(buf, "runsupvl ", blen);
 970         if (err & INFINIPATH_E_RUNEXPCHAR)
 971                 strlcat(buf, "runexpchar ", blen);
 972         if (err & INFINIPATH_E_RIBFLOW)
 973                 strlcat(buf, "ribflow ", blen);
 974         if (err & INFINIPATH_E_SUNDERRUN)
 975                 strlcat(buf, "sunderrun ", blen);
 976         if (err & INFINIPATH_E_SPIOARMLAUNCH)
 977                 strlcat(buf, "spioarmlaunch ", blen);
 978         if (err & INFINIPATH_E_SUNEXPERRPKTNUM)
 979                 strlcat(buf, "sunexperrpktnum ", blen);
 980         if (err & INFINIPATH_E_SDROPPEDSMPPKT)
 981                 strlcat(buf, "sdroppedsmppkt ", blen);
 982         if (err & INFINIPATH_E_SMAXPKTLEN)
 983                 strlcat(buf, "smaxpktlen ", blen);
 984         if (err & INFINIPATH_E_SUNSUPVL)
 985                 strlcat(buf, "sunsupVL ", blen);
 986         if (err & INFINIPATH_E_INVALIDADDR)
 987                 strlcat(buf, "invalidaddr ", blen);
 988         if (err & INFINIPATH_E_RRCVEGRFULL)
 989                 strlcat(buf, "rcvegrfull ", blen);
 990         if (err & INFINIPATH_E_RRCVHDRFULL)
 991                 strlcat(buf, "rcvhdrfull ", blen);
 992         if (err & INFINIPATH_E_IBSTATUSCHANGED)
 993                 strlcat(buf, "ibcstatuschg ", blen);
 994         if (err & INFINIPATH_E_RIBLOSTLINK)
 995                 strlcat(buf, "riblostlink ", blen);
 996         if (err & INFINIPATH_E_HARDWARE)
 997                 strlcat(buf, "hardware ", blen);
 998         if (err & INFINIPATH_E_RESET)
 999                 strlcat(buf, "reset ", blen);
1000         if (err & INFINIPATH_E_SDMAERRS)
1001                 decode_sdma_errs(dd, err, buf, blen);
1002         if (err & INFINIPATH_E_INVALIDEEPCMD)
1003                 strlcat(buf, "invalideepromcmd ", blen);
1004 done:
1005         return iserr;
1006 }
1007
1008 /**
1009  * get_rhf_errstring - decode RHF errors
1010  * @err: the err number
1011  * @msg: the output buffer
1012  * @len: the length of the output buffer
1013  *
1014  * only used one place now, may want more later
1015  */
1016 static void get_rhf_errstring(u32 err, char *msg, size_t len)
1017 {
1018         /* if no errors, and so don't need to check what's first */
1019         *msg = '\0';
1020
1021         if (err & INFINIPATH_RHF_H_ICRCERR)
1022                 strlcat(msg, "icrcerr ", len);
1023         if (err & INFINIPATH_RHF_H_VCRCERR)
1024                 strlcat(msg, "vcrcerr ", len);
1025         if (err & INFINIPATH_RHF_H_PARITYERR)
1026                 strlcat(msg, "parityerr ", len);
1027         if (err & INFINIPATH_RHF_H_LENERR)
1028                 strlcat(msg, "lenerr ", len);
1029         if (err & INFINIPATH_RHF_H_MTUERR)
1030                 strlcat(msg, "mtuerr ", len);
1031         if (err & INFINIPATH_RHF_H_IHDRERR)
1032                 /* infinipath hdr checksum error */
1033                 strlcat(msg, "ipathhdrerr ", len);
1034         if (err & INFINIPATH_RHF_H_TIDERR)
1035                 strlcat(msg, "tiderr ", len);
1036         if (err & INFINIPATH_RHF_H_MKERR)
1037                 /* bad port, offset, etc. */
1038                 strlcat(msg, "invalid ipathhdr ", len);
1039         if (err & INFINIPATH_RHF_H_IBERR)
1040                 strlcat(msg, "iberr ", len);
1041         if (err & INFINIPATH_RHF_L_SWA)
1042                 strlcat(msg, "swA ", len);
1043         if (err & INFINIPATH_RHF_L_SWB)
1044                 strlcat(msg, "swB ", len);
1045 }
1046
1047 /**
1048  * ipath_get_egrbuf - get an eager buffer
1049  * @dd: the infinipath device
1050  * @bufnum: the eager buffer to get
1051  *
1052  * must only be called if ipath_pd[port] is known to be allocated
1053  */
1054 static inline void *ipath_get_egrbuf(struct ipath_devdata *dd, u32 bufnum)
1055 {
1056         return dd->ipath_port0_skbinfo ?
1057                 (void *) dd->ipath_port0_skbinfo[bufnum].skb->data : NULL;
1058 }
1059
1060 /**
1061  * ipath_alloc_skb - allocate an skb and buffer with possible constraints
1062  * @dd: the infinipath device
1063  * @gfp_mask: the sk_buff SFP mask
1064  */
1065 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd,
1066                                 gfp_t gfp_mask)
1067 {
1068         struct sk_buff *skb;
1069         u32 len;
1070
1071         /*
1072          * Only fully supported way to handle this is to allocate lots
1073          * extra, align as needed, and then do skb_reserve().  That wastes
1074          * a lot of memory...  I'll have to hack this into infinipath_copy
1075          * also.
1076          */
1077
1078         /*
1079          * We need 2 extra bytes for ipath_ether data sent in the
1080          * key header.  In order to keep everything dword aligned,
1081          * we'll reserve 4 bytes.
1082          */
1083         len = dd->ipath_ibmaxlen + 4;
1084
1085         if (dd->ipath_flags & IPATH_4BYTE_TID) {
1086                 /* We need a 2KB multiple alignment, and there is no way
1087                  * to do it except to allocate extra and then skb_reserve
1088                  * enough to bring it up to the right alignment.
1089                  */
1090                 len += 2047;
1091         }
1092
1093         skb = __dev_alloc_skb(len, gfp_mask);
1094         if (!skb) {
1095                 ipath_dev_err(dd, "Failed to allocate skbuff, length %u\n",
1096                               len);
1097                 goto bail;
1098         }
1099
1100         skb_reserve(skb, 4);
1101
1102         if (dd->ipath_flags & IPATH_4BYTE_TID) {
1103                 u32 una = (unsigned long)skb->data & 2047;
1104                 if (una)
1105                         skb_reserve(skb, 2048 - una);
1106         }
1107
1108 bail:
1109         return skb;
1110 }
1111
1112 static void ipath_rcv_hdrerr(struct ipath_devdata *dd,
1113                              u32 eflags,
1114                              u32 l,
1115                              u32 etail,
1116                              __le32 *rhf_addr,
1117                              struct ipath_message_header *hdr)
1118 {
1119         char emsg[128];
1120
1121         get_rhf_errstring(eflags, emsg, sizeof emsg);
1122         ipath_cdbg(PKT, "RHFerrs %x hdrqtail=%x typ=%u "
1123                    "tlen=%x opcode=%x egridx=%x: %s\n",
1124                    eflags, l,
1125                    ipath_hdrget_rcv_type(rhf_addr),
1126                    ipath_hdrget_length_in_bytes(rhf_addr),
1127                    be32_to_cpu(hdr->bth[0]) >> 24,
1128                    etail, emsg);
1129
1130         /* Count local link integrity errors. */
1131         if (eflags & (INFINIPATH_RHF_H_ICRCERR | INFINIPATH_RHF_H_VCRCERR)) {
1132                 u8 n = (dd->ipath_ibcctrl >>
1133                         INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT) &
1134                         INFINIPATH_IBCC_PHYERRTHRESHOLD_MASK;
1135
1136                 if (++dd->ipath_lli_counter > n) {
1137                         dd->ipath_lli_counter = 0;
1138                         dd->ipath_lli_errors++;
1139                 }
1140         }
1141 }
1142
1143 /*
1144  * ipath_kreceive - receive a packet
1145  * @pd: the infinipath port
1146  *
1147  * called from interrupt handler for errors or receive interrupt
1148  */
1149 void ipath_kreceive(struct ipath_portdata *pd)
1150 {
1151         struct ipath_devdata *dd = pd->port_dd;
1152         __le32 *rhf_addr;
1153         void *ebuf;
1154         const u32 rsize = dd->ipath_rcvhdrentsize;      /* words */
1155         const u32 maxcnt = dd->ipath_rcvhdrcnt * rsize; /* words */
1156         u32 etail = -1, l, hdrqtail;
1157         struct ipath_message_header *hdr;
1158         u32 eflags, i, etype, tlen, pkttot = 0, updegr = 0, reloop = 0;
1159         static u64 totcalls;    /* stats, may eventually remove */
1160         int last;
1161
1162         l = pd->port_head;
1163         rhf_addr = (__le32 *) pd->port_rcvhdrq + l + dd->ipath_rhf_offset;
1164         if (dd->ipath_flags & IPATH_NODMA_RTAIL) {
1165                 u32 seq = ipath_hdrget_seq(rhf_addr);
1166
1167                 if (seq != pd->port_seq_cnt)
1168                         goto bail;
1169                 hdrqtail = 0;
1170         } else {
1171                 hdrqtail = ipath_get_rcvhdrtail(pd);
1172                 if (l == hdrqtail)
1173                         goto bail;
1174                 smp_rmb();
1175         }
1176
1177 reloop:
1178         for (last = 0, i = 1; !last; i += !last) {
1179                 hdr = dd->ipath_f_get_msgheader(dd, rhf_addr);
1180                 eflags = ipath_hdrget_err_flags(rhf_addr);
1181                 etype = ipath_hdrget_rcv_type(rhf_addr);
1182                 /* total length */
1183                 tlen = ipath_hdrget_length_in_bytes(rhf_addr);
1184                 ebuf = NULL;
1185                 if ((dd->ipath_flags & IPATH_NODMA_RTAIL) ?
1186                     ipath_hdrget_use_egr_buf(rhf_addr) :
1187                     (etype != RCVHQ_RCV_TYPE_EXPECTED)) {
1188                         /*
1189                          * It turns out that the chip uses an eager buffer
1190                          * for all non-expected packets, whether it "needs"
1191                          * one or not.  So always get the index, but don't
1192                          * set ebuf (so we try to copy data) unless the
1193                          * length requires it.
1194                          */
1195                         etail = ipath_hdrget_index(rhf_addr);
1196                         updegr = 1;
1197                         if (tlen > sizeof(*hdr) ||
1198                             etype == RCVHQ_RCV_TYPE_NON_KD)
1199                                 ebuf = ipath_get_egrbuf(dd, etail);
1200                 }
1201
1202                 /*
1203                  * both tiderr and ipathhdrerr are set for all plain IB
1204                  * packets; only ipathhdrerr should be set.
1205                  */
1206
1207                 if (etype != RCVHQ_RCV_TYPE_NON_KD &&
1208                     etype != RCVHQ_RCV_TYPE_ERROR &&
1209                     ipath_hdrget_ipath_ver(hdr->iph.ver_port_tid_offset) !=
1210                     IPS_PROTO_VERSION)
1211                         ipath_cdbg(PKT, "Bad InfiniPath protocol version "
1212                                    "%x\n", etype);
1213
1214                 if (unlikely(eflags))
1215                         ipath_rcv_hdrerr(dd, eflags, l, etail, rhf_addr, hdr);
1216                 else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
1217                         ipath_ib_rcv(dd->verbs_dev, (u32 *)hdr, ebuf, tlen);
1218                         if (dd->ipath_lli_counter)
1219                                 dd->ipath_lli_counter--;
1220                 } else if (etype == RCVHQ_RCV_TYPE_EAGER) {
1221                         u8 opcode = be32_to_cpu(hdr->bth[0]) >> 24;
1222                         u32 qp = be32_to_cpu(hdr->bth[1]) & 0xffffff;
1223                         ipath_cdbg(PKT, "typ %x, opcode %x (eager, "
1224                                    "qp=%x), len %x; ignored\n",
1225                                    etype, opcode, qp, tlen);
1226                 }
1227                 else if (etype == RCVHQ_RCV_TYPE_EXPECTED)
1228                         ipath_dbg("Bug: Expected TID, opcode %x; ignored\n",
1229                                   be32_to_cpu(hdr->bth[0]) >> 24);
1230                 else {
1231                         /*
1232                          * error packet, type of error unknown.
1233                          * Probably type 3, but we don't know, so don't
1234                          * even try to print the opcode, etc.
1235                          * Usually caused by a "bad packet", that has no
1236                          * BTH, when the LRH says it should.
1237                          */
1238                         ipath_cdbg(ERRPKT, "Error Pkt, but no eflags! egrbuf"
1239                                   " %x, len %x hdrq+%x rhf: %Lx\n",
1240                                   etail, tlen, l, (unsigned long long)
1241                                   le64_to_cpu(*(__le64 *) rhf_addr));
1242                         if (ipath_debug & __IPATH_ERRPKTDBG) {
1243                                 u32 j, *d, dw = rsize-2;
1244                                 if (rsize > (tlen>>2))
1245                                         dw = tlen>>2;
1246                                 d = (u32 *)hdr;
1247                                 printk(KERN_DEBUG "EPkt rcvhdr(%x dw):\n",
1248                                         dw);
1249                                 for (j = 0; j < dw; j++)
1250                                         printk(KERN_DEBUG "%8x%s", d[j],
1251                                                 (j%8) == 7 ? "\n" : " ");
1252                                 printk(KERN_DEBUG ".\n");
1253                         }
1254                 }
1255                 l += rsize;
1256                 if (l >= maxcnt)
1257                         l = 0;
1258                 rhf_addr = (__le32 *) pd->port_rcvhdrq +
1259                         l + dd->ipath_rhf_offset;
1260                 if (dd->ipath_flags & IPATH_NODMA_RTAIL) {
1261                         u32 seq = ipath_hdrget_seq(rhf_addr);
1262
1263                         if (++pd->port_seq_cnt > 13)
1264                                 pd->port_seq_cnt = 1;
1265                         if (seq != pd->port_seq_cnt)
1266                                 last = 1;
1267                 } else if (l == hdrqtail)
1268                         last = 1;
1269                 /*
1270                  * update head regs on last packet, and every 16 packets.
1271                  * Reduce bus traffic, while still trying to prevent
1272                  * rcvhdrq overflows, for when the queue is nearly full
1273                  */
1274                 if (last || !(i & 0xf)) {
1275                         u64 lval = l;
1276
1277                         /* request IBA6120 and 7220 interrupt only on last */
1278                         if (last)
1279                                 lval |= dd->ipath_rhdrhead_intr_off;
1280                         ipath_write_ureg(dd, ur_rcvhdrhead, lval,
1281                                 pd->port_port);
1282                         if (updegr) {
1283                                 ipath_write_ureg(dd, ur_rcvegrindexhead,
1284                                                  etail, pd->port_port);
1285                                 updegr = 0;
1286                         }
1287                 }
1288         }
1289
1290         if (!dd->ipath_rhdrhead_intr_off && !reloop &&
1291             !(dd->ipath_flags & IPATH_NODMA_RTAIL)) {
1292                 /* IBA6110 workaround; we can have a race clearing chip
1293                  * interrupt with another interrupt about to be delivered,
1294                  * and can clear it before it is delivered on the GPIO
1295                  * workaround.  By doing the extra check here for the
1296                  * in-memory tail register updating while we were doing
1297                  * earlier packets, we "almost" guarantee we have covered
1298                  * that case.
1299                  */
1300                 u32 hqtail = ipath_get_rcvhdrtail(pd);
1301                 if (hqtail != hdrqtail) {
1302                         hdrqtail = hqtail;
1303                         reloop = 1; /* loop 1 extra time at most */
1304                         goto reloop;
1305                 }
1306         }
1307
1308         pkttot += i;
1309
1310         pd->port_head = l;
1311
1312         if (pkttot > ipath_stats.sps_maxpkts_call)
1313                 ipath_stats.sps_maxpkts_call = pkttot;
1314         ipath_stats.sps_port0pkts += pkttot;
1315         ipath_stats.sps_avgpkts_call =
1316                 ipath_stats.sps_port0pkts / ++totcalls;
1317
1318 bail:;
1319 }
1320
1321 /**
1322  * ipath_update_pio_bufs - update shadow copy of the PIO availability map
1323  * @dd: the infinipath device
1324  *
1325  * called whenever our local copy indicates we have run out of send buffers
1326  * NOTE: This can be called from interrupt context by some code
1327  * and from non-interrupt context by ipath_getpiobuf().
1328  */
1329
1330 static void ipath_update_pio_bufs(struct ipath_devdata *dd)
1331 {
1332         unsigned long flags;
1333         int i;
1334         const unsigned piobregs = (unsigned)dd->ipath_pioavregs;
1335
1336         /* If the generation (check) bits have changed, then we update the
1337          * busy bit for the corresponding PIO buffer.  This algorithm will
1338          * modify positions to the value they already have in some cases
1339          * (i.e., no change), but it's faster than changing only the bits
1340          * that have changed.
1341          *
1342          * We would like to do this atomicly, to avoid spinlocks in the
1343          * critical send path, but that's not really possible, given the
1344          * type of changes, and that this routine could be called on
1345          * multiple cpu's simultaneously, so we lock in this routine only,
1346          * to avoid conflicting updates; all we change is the shadow, and
1347          * it's a single 64 bit memory location, so by definition the update
1348          * is atomic in terms of what other cpu's can see in testing the
1349          * bits.  The spin_lock overhead isn't too bad, since it only
1350          * happens when all buffers are in use, so only cpu overhead, not
1351          * latency or bandwidth is affected.
1352          */
1353         if (!dd->ipath_pioavailregs_dma) {
1354                 ipath_dbg("Update shadow pioavail, but regs_dma NULL!\n");
1355                 return;
1356         }
1357         if (ipath_debug & __IPATH_VERBDBG) {
1358                 /* only if packet debug and verbose */
1359                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1360                 unsigned long *shadow = dd->ipath_pioavailshadow;
1361
1362                 ipath_cdbg(PKT, "Refill avail, dma0=%llx shad0=%lx, "
1363                            "d1=%llx s1=%lx, d2=%llx s2=%lx, d3=%llx "
1364                            "s3=%lx\n",
1365                            (unsigned long long) le64_to_cpu(dma[0]),
1366                            shadow[0],
1367                            (unsigned long long) le64_to_cpu(dma[1]),
1368                            shadow[1],
1369                            (unsigned long long) le64_to_cpu(dma[2]),
1370                            shadow[2],
1371                            (unsigned long long) le64_to_cpu(dma[3]),
1372                            shadow[3]);
1373                 if (piobregs > 4)
1374                         ipath_cdbg(
1375                                 PKT, "2nd group, dma4=%llx shad4=%lx, "
1376                                 "d5=%llx s5=%lx, d6=%llx s6=%lx, "
1377                                 "d7=%llx s7=%lx\n",
1378                                 (unsigned long long) le64_to_cpu(dma[4]),
1379                                 shadow[4],
1380                                 (unsigned long long) le64_to_cpu(dma[5]),
1381                                 shadow[5],
1382                                 (unsigned long long) le64_to_cpu(dma[6]),
1383                                 shadow[6],
1384                                 (unsigned long long) le64_to_cpu(dma[7]),
1385                                 shadow[7]);
1386         }
1387         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1388         for (i = 0; i < piobregs; i++) {
1389                 u64 pchbusy, pchg, piov, pnew;
1390                 /*
1391                  * Chip Errata: bug 6641; even and odd qwords>3 are swapped
1392                  */
1393                 if (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS))
1394                         piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i ^ 1]);
1395                 else
1396                         piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i]);
1397                 pchg = dd->ipath_pioavailkernel[i] &
1398                         ~(dd->ipath_pioavailshadow[i] ^ piov);
1399                 pchbusy = pchg << INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT;
1400                 if (pchg && (pchbusy & dd->ipath_pioavailshadow[i])) {
1401                         pnew = dd->ipath_pioavailshadow[i] & ~pchbusy;
1402                         pnew |= piov & pchbusy;
1403                         dd->ipath_pioavailshadow[i] = pnew;
1404                 }
1405         }
1406         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1407 }
1408
1409 /*
1410  * used to force update of pioavailshadow if we can't get a pio buffer.
1411  * Needed primarily due to exitting freeze mode after recovering
1412  * from errors.  Done lazily, because it's safer (known to not
1413  * be writing pio buffers).
1414  */
1415 static void ipath_reset_availshadow(struct ipath_devdata *dd)
1416 {
1417         int i, im;
1418         unsigned long flags;
1419
1420         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1421         for (i = 0; i < dd->ipath_pioavregs; i++) {
1422                 u64 val, oldval;
1423                 /* deal with 6110 chip bug on high register #s */
1424                 im = (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS)) ?
1425                         i ^ 1 : i;
1426                 val = le64_to_cpu(dd->ipath_pioavailregs_dma[im]);
1427                 /*
1428                  * busy out the buffers not in the kernel avail list,
1429                  * without changing the generation bits.
1430                  */
1431                 oldval = dd->ipath_pioavailshadow[i];
1432                 dd->ipath_pioavailshadow[i] = val |
1433                         ((~dd->ipath_pioavailkernel[i] <<
1434                         INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT) &
1435                         0xaaaaaaaaaaaaaaaaULL); /* All BUSY bits in qword */
1436                 if (oldval != dd->ipath_pioavailshadow[i])
1437                         ipath_dbg("shadow[%d] was %Lx, now %lx\n",
1438                                 i, (unsigned long long) oldval,
1439                                 dd->ipath_pioavailshadow[i]);
1440         }
1441         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1442 }
1443
1444 /**
1445  * ipath_setrcvhdrsize - set the receive header size
1446  * @dd: the infinipath device
1447  * @rhdrsize: the receive header size
1448  *
1449  * called from user init code, and also layered driver init
1450  */
1451 int ipath_setrcvhdrsize(struct ipath_devdata *dd, unsigned rhdrsize)
1452 {
1453         int ret = 0;
1454
1455         if (dd->ipath_flags & IPATH_RCVHDRSZ_SET) {
1456                 if (dd->ipath_rcvhdrsize != rhdrsize) {
1457                         dev_info(&dd->pcidev->dev,
1458                                  "Error: can't set protocol header "
1459                                  "size %u, already %u\n",
1460                                  rhdrsize, dd->ipath_rcvhdrsize);
1461                         ret = -EAGAIN;
1462                 } else
1463                         ipath_cdbg(VERBOSE, "Reuse same protocol header "
1464                                    "size %u\n", dd->ipath_rcvhdrsize);
1465         } else if (rhdrsize > (dd->ipath_rcvhdrentsize -
1466                                (sizeof(u64) / sizeof(u32)))) {
1467                 ipath_dbg("Error: can't set protocol header size %u "
1468                           "(> max %u)\n", rhdrsize,
1469                           dd->ipath_rcvhdrentsize -
1470                           (u32) (sizeof(u64) / sizeof(u32)));
1471                 ret = -EOVERFLOW;
1472         } else {
1473                 dd->ipath_flags |= IPATH_RCVHDRSZ_SET;
1474                 dd->ipath_rcvhdrsize = rhdrsize;
1475                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
1476                                  dd->ipath_rcvhdrsize);
1477                 ipath_cdbg(VERBOSE, "Set protocol header size to %u\n",
1478                            dd->ipath_rcvhdrsize);
1479         }
1480         return ret;
1481 }
1482
1483 /*
1484  * debugging code and stats updates if no pio buffers available.
1485  */
1486 static noinline void no_pio_bufs(struct ipath_devdata *dd)
1487 {
1488         unsigned long *shadow = dd->ipath_pioavailshadow;
1489         __le64 *dma = (__le64 *)dd->ipath_pioavailregs_dma;
1490
1491         dd->ipath_upd_pio_shadow = 1;
1492
1493         /*
1494          * not atomic, but if we lose a stat count in a while, that's OK
1495          */
1496         ipath_stats.sps_nopiobufs++;
1497         if (!(++dd->ipath_consec_nopiobuf % 100000)) {
1498                 ipath_force_pio_avail_update(dd); /* at start */
1499                 ipath_dbg("%u tries no piobufavail ts%lx; dmacopy: "
1500                         "%llx %llx %llx %llx\n"
1501                         "ipath  shadow:  %lx %lx %lx %lx\n",
1502                         dd->ipath_consec_nopiobuf,
1503                         (unsigned long)get_cycles(),
1504                         (unsigned long long) le64_to_cpu(dma[0]),
1505                         (unsigned long long) le64_to_cpu(dma[1]),
1506                         (unsigned long long) le64_to_cpu(dma[2]),
1507                         (unsigned long long) le64_to_cpu(dma[3]),
1508                         shadow[0], shadow[1], shadow[2], shadow[3]);
1509                 /*
1510                  * 4 buffers per byte, 4 registers above, cover rest
1511                  * below
1512                  */
1513                 if ((dd->ipath_piobcnt2k + dd->ipath_piobcnt4k) >
1514                     (sizeof(shadow[0]) * 4 * 4))
1515                         ipath_dbg("2nd group: dmacopy: "
1516                                   "%llx %llx %llx %llx\n"
1517                                   "ipath  shadow:  %lx %lx %lx %lx\n",
1518                                   (unsigned long long)le64_to_cpu(dma[4]),
1519                                   (unsigned long long)le64_to_cpu(dma[5]),
1520                                   (unsigned long long)le64_to_cpu(dma[6]),
1521                                   (unsigned long long)le64_to_cpu(dma[7]),
1522                                   shadow[4], shadow[5], shadow[6], shadow[7]);
1523
1524                 /* at end, so update likely happened */
1525                 ipath_reset_availshadow(dd);
1526         }
1527 }
1528
1529 /*
1530  * common code for normal driver pio buffer allocation, and reserved
1531  * allocation.
1532  *
1533  * do appropriate marking as busy, etc.
1534  * returns buffer number if one found (>=0), negative number is error.
1535  */
1536 static u32 __iomem *ipath_getpiobuf_range(struct ipath_devdata *dd,
1537         u32 *pbufnum, u32 first, u32 last, u32 firsti)
1538 {
1539         int i, j, updated = 0;
1540         unsigned piobcnt;
1541         unsigned long flags;
1542         unsigned long *shadow = dd->ipath_pioavailshadow;
1543         u32 __iomem *buf;
1544
1545         piobcnt = last - first;
1546         if (dd->ipath_upd_pio_shadow) {
1547                 /*
1548                  * Minor optimization.  If we had no buffers on last call,
1549                  * start out by doing the update; continue and do scan even
1550                  * if no buffers were updated, to be paranoid
1551                  */
1552                 ipath_update_pio_bufs(dd);
1553                 updated++;
1554                 i = first;
1555         } else
1556                 i = firsti;
1557 rescan:
1558         /*
1559          * while test_and_set_bit() is atomic, we do that and then the
1560          * change_bit(), and the pair is not.  See if this is the cause
1561          * of the remaining armlaunch errors.
1562          */
1563         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1564         for (j = 0; j < piobcnt; j++, i++) {
1565                 if (i >= last)
1566                         i = first;
1567                 if (__test_and_set_bit((2 * i) + 1, shadow))
1568                         continue;
1569                 /* flip generation bit */
1570                 __change_bit(2 * i, shadow);
1571                 break;
1572         }
1573         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1574
1575         if (j == piobcnt) {
1576                 if (!updated) {
1577                         /*
1578                          * first time through; shadow exhausted, but may be
1579                          * buffers available, try an update and then rescan.
1580                          */
1581                         ipath_update_pio_bufs(dd);
1582                         updated++;
1583                         i = first;
1584                         goto rescan;
1585                 } else if (updated == 1 && piobcnt <=
1586                         ((dd->ipath_sendctrl
1587                         >> INFINIPATH_S_UPDTHRESH_SHIFT) &
1588                         INFINIPATH_S_UPDTHRESH_MASK)) {
1589                         /*
1590                          * for chips supporting and using the update
1591                          * threshold we need to force an update of the
1592                          * in-memory copy if the count is less than the
1593                          * thershold, then check one more time.
1594                          */
1595                         ipath_force_pio_avail_update(dd);
1596                         ipath_update_pio_bufs(dd);
1597                         updated++;
1598                         i = first;
1599                         goto rescan;
1600                 }
1601
1602                 no_pio_bufs(dd);
1603                 buf = NULL;
1604         } else {
1605                 if (i < dd->ipath_piobcnt2k)
1606                         buf = (u32 __iomem *) (dd->ipath_pio2kbase +
1607                                                i * dd->ipath_palign);
1608                 else
1609                         buf = (u32 __iomem *)
1610                                 (dd->ipath_pio4kbase +
1611                                  (i - dd->ipath_piobcnt2k) * dd->ipath_4kalign);
1612                 if (pbufnum)
1613                         *pbufnum = i;
1614         }
1615
1616         return buf;
1617 }
1618
1619 /**
1620  * ipath_getpiobuf - find an available pio buffer
1621  * @dd: the infinipath device
1622  * @plen: the size of the PIO buffer needed in 32-bit words
1623  * @pbufnum: the buffer number is placed here
1624  */
1625 u32 __iomem *ipath_getpiobuf(struct ipath_devdata *dd, u32 plen, u32 *pbufnum)
1626 {
1627         u32 __iomem *buf;
1628         u32 pnum, nbufs;
1629         u32 first, lasti;
1630
1631         if (plen + 1 >= IPATH_SMALLBUF_DWORDS) {
1632                 first = dd->ipath_piobcnt2k;
1633                 lasti = dd->ipath_lastpioindexl;
1634         } else {
1635                 first = 0;
1636                 lasti = dd->ipath_lastpioindex;
1637         }
1638         nbufs = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
1639         buf = ipath_getpiobuf_range(dd, &pnum, first, nbufs, lasti);
1640
1641         if (buf) {
1642                 /*
1643                  * Set next starting place.  It's just an optimization,
1644                  * it doesn't matter who wins on this, so no locking
1645                  */
1646                 if (plen + 1 >= IPATH_SMALLBUF_DWORDS)
1647                         dd->ipath_lastpioindexl = pnum + 1;
1648                 else
1649                         dd->ipath_lastpioindex = pnum + 1;
1650                 if (dd->ipath_upd_pio_shadow)
1651                         dd->ipath_upd_pio_shadow = 0;
1652                 if (dd->ipath_consec_nopiobuf)
1653                         dd->ipath_consec_nopiobuf = 0;
1654                 ipath_cdbg(VERBOSE, "Return piobuf%u %uk @ %p\n",
1655                            pnum, (pnum < dd->ipath_piobcnt2k) ? 2 : 4, buf);
1656                 if (pbufnum)
1657                         *pbufnum = pnum;
1658
1659         }
1660         return buf;
1661 }
1662
1663 /**
1664  * ipath_chg_pioavailkernel - change which send buffers are available for kernel
1665  * @dd: the infinipath device
1666  * @start: the starting send buffer number
1667  * @len: the number of send buffers
1668  * @avail: true if the buffers are available for kernel use, false otherwise
1669  */
1670 void ipath_chg_pioavailkernel(struct ipath_devdata *dd, unsigned start,
1671                               unsigned len, int avail)
1672 {
1673         unsigned long flags;
1674         unsigned end, cnt = 0;
1675
1676         /* There are two bits per send buffer (busy and generation) */
1677         start *= 2;
1678         end = start + len * 2;
1679
1680         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1681         /* Set or clear the busy bit in the shadow. */
1682         while (start < end) {
1683                 if (avail) {
1684                         unsigned long dma;
1685                         int i, im;
1686                         /*
1687                          * the BUSY bit will never be set, because we disarm
1688                          * the user buffers before we hand them back to the
1689                          * kernel.  We do have to make sure the generation
1690                          * bit is set correctly in shadow, since it could
1691                          * have changed many times while allocated to user.
1692                          * We can't use the bitmap functions on the full
1693                          * dma array because it is always little-endian, so
1694                          * we have to flip to host-order first.
1695                          * BITS_PER_LONG is slightly wrong, since it's
1696                          * always 64 bits per register in chip...
1697                          * We only work on 64 bit kernels, so that's OK.
1698                          */
1699                         /* deal with 6110 chip bug on high register #s */
1700                         i = start / BITS_PER_LONG;
1701                         im = (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS)) ?
1702                                 i ^ 1 : i;
1703                         __clear_bit(INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT
1704                                 + start, dd->ipath_pioavailshadow);
1705                         dma = (unsigned long) le64_to_cpu(
1706                                 dd->ipath_pioavailregs_dma[im]);
1707                         if (test_bit((INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT
1708                                 + start) % BITS_PER_LONG, &dma))
1709                                 __set_bit(INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT
1710                                         + start, dd->ipath_pioavailshadow);
1711                         else
1712                                 __clear_bit(INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT
1713                                         + start, dd->ipath_pioavailshadow);
1714                         __set_bit(start, dd->ipath_pioavailkernel);
1715                 } else {
1716                         __set_bit(start + INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT,
1717                                 dd->ipath_pioavailshadow);
1718                         __clear_bit(start, dd->ipath_pioavailkernel);
1719                 }
1720                 start += 2;
1721         }
1722
1723         if (dd->ipath_pioupd_thresh) {
1724                 end = 2 * (dd->ipath_piobcnt2k + dd->ipath_piobcnt4k);
1725                 cnt = bitmap_weight(dd->ipath_pioavailkernel, end);
1726         }
1727         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1728
1729         /*
1730          * When moving buffers from kernel to user, if number assigned to
1731          * the user is less than the pio update threshold, and threshold
1732          * is supported (cnt was computed > 0), drop the update threshold
1733          * so we update at least once per allocated number of buffers.
1734          * In any case, if the kernel buffers are less than the threshold,
1735          * drop the threshold.  We don't bother increasing it, having once
1736          * decreased it, since it would typically just cycle back and forth.
1737          * If we don't decrease below buffers in use, we can wait a long
1738          * time for an update, until some other context uses PIO buffers.
1739          */
1740         if (!avail && len < cnt)
1741                 cnt = len;
1742         if (cnt < dd->ipath_pioupd_thresh) {
1743                 dd->ipath_pioupd_thresh = cnt;
1744                 ipath_dbg("Decreased pio update threshold to %u\n",
1745                         dd->ipath_pioupd_thresh);
1746                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1747                 dd->ipath_sendctrl &= ~(INFINIPATH_S_UPDTHRESH_MASK
1748                         << INFINIPATH_S_UPDTHRESH_SHIFT);
1749                 dd->ipath_sendctrl |= dd->ipath_pioupd_thresh
1750                         << INFINIPATH_S_UPDTHRESH_SHIFT;
1751                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1752                         dd->ipath_sendctrl);
1753                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1754         }
1755 }
1756
1757 /**
1758  * ipath_create_rcvhdrq - create a receive header queue
1759  * @dd: the infinipath device
1760  * @pd: the port data
1761  *
1762  * this must be contiguous memory (from an i/o perspective), and must be
1763  * DMA'able (which means for some systems, it will go through an IOMMU,
1764  * or be forced into a low address range).
1765  */
1766 int ipath_create_rcvhdrq(struct ipath_devdata *dd,
1767                          struct ipath_portdata *pd)
1768 {
1769         int ret = 0;
1770
1771         if (!pd->port_rcvhdrq) {
1772                 dma_addr_t phys_hdrqtail;
1773                 gfp_t gfp_flags = GFP_USER | __GFP_COMP;
1774                 int amt = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize *
1775                                 sizeof(u32), PAGE_SIZE);
1776
1777                 pd->port_rcvhdrq = dma_alloc_coherent(
1778                         &dd->pcidev->dev, amt, &pd->port_rcvhdrq_phys,
1779                         gfp_flags);
1780
1781                 if (!pd->port_rcvhdrq) {
1782                         ipath_dev_err(dd, "attempt to allocate %d bytes "
1783                                       "for port %u rcvhdrq failed\n",
1784                                       amt, pd->port_port);
1785                         ret = -ENOMEM;
1786                         goto bail;
1787                 }
1788
1789                 if (!(dd->ipath_flags & IPATH_NODMA_RTAIL)) {
1790                         pd->port_rcvhdrtail_kvaddr = dma_alloc_coherent(
1791                                 &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail,
1792                                 GFP_KERNEL);
1793                         if (!pd->port_rcvhdrtail_kvaddr) {
1794                                 ipath_dev_err(dd, "attempt to allocate 1 page "
1795                                         "for port %u rcvhdrqtailaddr "
1796                                         "failed\n", pd->port_port);
1797                                 ret = -ENOMEM;
1798                                 dma_free_coherent(&dd->pcidev->dev, amt,
1799                                         pd->port_rcvhdrq,
1800                                         pd->port_rcvhdrq_phys);
1801                                 pd->port_rcvhdrq = NULL;
1802                                 goto bail;
1803                         }
1804                         pd->port_rcvhdrqtailaddr_phys = phys_hdrqtail;
1805                         ipath_cdbg(VERBOSE, "port %d hdrtailaddr, %llx "
1806                                    "physical\n", pd->port_port,
1807                                    (unsigned long long) phys_hdrqtail);
1808                 }
1809
1810                 pd->port_rcvhdrq_size = amt;
1811
1812                 ipath_cdbg(VERBOSE, "%d pages at %p (phys %lx) size=%lu "
1813                            "for port %u rcvhdr Q\n",
1814                            amt >> PAGE_SHIFT, pd->port_rcvhdrq,
1815                            (unsigned long) pd->port_rcvhdrq_phys,
1816                            (unsigned long) pd->port_rcvhdrq_size,
1817                            pd->port_port);
1818         }
1819         else
1820                 ipath_cdbg(VERBOSE, "reuse port %d rcvhdrq @%p %llx phys; "
1821                            "hdrtailaddr@%p %llx physical\n",
1822                            pd->port_port, pd->port_rcvhdrq,
1823                            (unsigned long long) pd->port_rcvhdrq_phys,
1824                            pd->port_rcvhdrtail_kvaddr, (unsigned long long)
1825                            pd->port_rcvhdrqtailaddr_phys);
1826
1827         /* clear for security and sanity on each use */
1828         memset(pd->port_rcvhdrq, 0, pd->port_rcvhdrq_size);
1829         if (pd->port_rcvhdrtail_kvaddr)
1830                 memset(pd->port_rcvhdrtail_kvaddr, 0, PAGE_SIZE);
1831
1832         /*
1833          * tell chip each time we init it, even if we are re-using previous
1834          * memory (we zero the register at process close)
1835          */
1836         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdrtailaddr,
1837                               pd->port_port, pd->port_rcvhdrqtailaddr_phys);
1838         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdraddr,
1839                               pd->port_port, pd->port_rcvhdrq_phys);
1840
1841 bail:
1842         return ret;
1843 }
1844
1845
1846 /*
1847  * Flush all sends that might be in the ready to send state, as well as any
1848  * that are in the process of being sent.   Used whenever we need to be
1849  * sure the send side is idle.  Cleans up all buffer state by canceling
1850  * all pio buffers, and issuing an abort, which cleans up anything in the
1851  * launch fifo.  The cancel is superfluous on some chip versions, but
1852  * it's safer to always do it.
1853  * PIOAvail bits are updated by the chip as if normal send had happened.
1854  */
1855 void ipath_cancel_sends(struct ipath_devdata *dd, int restore_sendctrl)
1856 {
1857         unsigned long flags;
1858
1859         if (dd->ipath_flags & IPATH_IB_AUTONEG_INPROG) {
1860                 ipath_cdbg(VERBOSE, "Ignore while in autonegotiation\n");
1861                 goto bail;
1862         }
1863         /*
1864          * If we have SDMA, and it's not disabled, we have to kick off the
1865          * abort state machine, provided we aren't already aborting.
1866          * If we are in the process of aborting SDMA (!DISABLED, but ABORTING),
1867          * we skip the rest of this routine. It is already "in progress"
1868          */
1869         if (dd->ipath_flags & IPATH_HAS_SEND_DMA) {
1870                 int skip_cancel;
1871                 unsigned long *statp = &dd->ipath_sdma_status;
1872
1873                 spin_lock_irqsave(&dd->ipath_sdma_lock, flags);
1874                 skip_cancel =
1875                         test_and_set_bit(IPATH_SDMA_ABORTING, statp)
1876                         && !test_bit(IPATH_SDMA_DISABLED, statp);
1877                 spin_unlock_irqrestore(&dd->ipath_sdma_lock, flags);
1878                 if (skip_cancel)
1879                         goto bail;
1880         }
1881
1882         ipath_dbg("Cancelling all in-progress send buffers\n");
1883
1884         /* skip armlaunch errs for a while */
1885         dd->ipath_lastcancel = jiffies + HZ / 2;
1886
1887         /*
1888          * The abort bit is auto-clearing.  We also don't want pioavail
1889          * update happening during this, and we don't want any other
1890          * sends going out, so turn those off for the duration.  We read
1891          * the scratch register to be sure that cancels and the abort
1892          * have taken effect in the chip.  Otherwise two parts are same
1893          * as ipath_force_pio_avail_update()
1894          */
1895         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1896         dd->ipath_sendctrl &= ~(INFINIPATH_S_PIOBUFAVAILUPD
1897                 | INFINIPATH_S_PIOENABLE);
1898         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1899                 dd->ipath_sendctrl | INFINIPATH_S_ABORT);
1900         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1901         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1902
1903         /* disarm all send buffers */
1904         ipath_disarm_piobufs(dd, 0,
1905                 dd->ipath_piobcnt2k + dd->ipath_piobcnt4k);
1906
1907         if (dd->ipath_flags & IPATH_HAS_SEND_DMA)
1908                 set_bit(IPATH_SDMA_DISARMED, &dd->ipath_sdma_status);
1909
1910         if (restore_sendctrl) {
1911                 /* else done by caller later if needed */
1912                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1913                 dd->ipath_sendctrl |= INFINIPATH_S_PIOBUFAVAILUPD |
1914                         INFINIPATH_S_PIOENABLE;
1915                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1916                         dd->ipath_sendctrl);
1917                 /* and again, be sure all have hit the chip */
1918                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1919                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1920         }
1921
1922         if ((dd->ipath_flags & IPATH_HAS_SEND_DMA) &&
1923             !test_bit(IPATH_SDMA_DISABLED, &dd->ipath_sdma_status) &&
1924             test_bit(IPATH_SDMA_RUNNING, &dd->ipath_sdma_status)) {
1925                 spin_lock_irqsave(&dd->ipath_sdma_lock, flags);
1926                 /* only wait so long for intr */
1927                 dd->ipath_sdma_abort_intr_timeout = jiffies + HZ;
1928                 dd->ipath_sdma_reset_wait = 200;
1929                 if (!test_bit(IPATH_SDMA_SHUTDOWN, &dd->ipath_sdma_status))
1930                         tasklet_hi_schedule(&dd->ipath_sdma_abort_task);
1931                 spin_unlock_irqrestore(&dd->ipath_sdma_lock, flags);
1932         }
1933 bail:;
1934 }
1935
1936 /*
1937  * Force an update of in-memory copy of the pioavail registers, when
1938  * needed for any of a variety of reasons.  We read the scratch register
1939  * to make it highly likely that the update will have happened by the
1940  * time we return.  If already off (as in cancel_sends above), this
1941  * routine is a nop, on the assumption that the caller will "do the
1942  * right thing".
1943  */
1944 void ipath_force_pio_avail_update(struct ipath_devdata *dd)
1945 {
1946         unsigned long flags;
1947
1948         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
1949         if (dd->ipath_sendctrl & INFINIPATH_S_PIOBUFAVAILUPD) {
1950                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1951                         dd->ipath_sendctrl & ~INFINIPATH_S_PIOBUFAVAILUPD);
1952                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1953                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1954                         dd->ipath_sendctrl);
1955                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1956         }
1957         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
1958 }
1959
1960 static void ipath_set_ib_lstate(struct ipath_devdata *dd, int linkcmd,
1961                                 int linitcmd)
1962 {
1963         u64 mod_wd;
1964         static const char *what[4] = {
1965                 [0] = "NOP",
1966                 [INFINIPATH_IBCC_LINKCMD_DOWN] = "DOWN",
1967                 [INFINIPATH_IBCC_LINKCMD_ARMED] = "ARMED",
1968                 [INFINIPATH_IBCC_LINKCMD_ACTIVE] = "ACTIVE"
1969         };
1970
1971         if (linitcmd == INFINIPATH_IBCC_LINKINITCMD_DISABLE) {
1972                 /*
1973                  * If we are told to disable, note that so link-recovery
1974                  * code does not attempt to bring us back up.
1975                  */
1976                 preempt_disable();
1977                 dd->ipath_flags |= IPATH_IB_LINK_DISABLED;
1978                 preempt_enable();
1979         } else if (linitcmd) {
1980                 /*
1981                  * Any other linkinitcmd will lead to LINKDOWN and then
1982                  * to INIT (if all is well), so clear flag to let
1983                  * link-recovery code attempt to bring us back up.
1984                  */
1985                 preempt_disable();
1986                 dd->ipath_flags &= ~IPATH_IB_LINK_DISABLED;
1987                 preempt_enable();
1988         }
1989
1990         mod_wd = (linkcmd << dd->ibcc_lc_shift) |
1991                 (linitcmd << INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1992         ipath_cdbg(VERBOSE,
1993                 "Moving unit %u to %s (initcmd=0x%x), current ltstate is %s\n",
1994                 dd->ipath_unit, what[linkcmd], linitcmd,
1995                 ipath_ibcstatus_str[ipath_ib_linktrstate(dd,
1996                         ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus))]);
1997
1998         ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1999                          dd->ipath_ibcctrl | mod_wd);
2000         /* read from chip so write is flushed */
2001         (void) ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
2002 }
2003
2004 int ipath_set_linkstate(struct ipath_devdata *dd, u8 newstate)
2005 {
2006         u32 lstate;
2007         int ret;
2008
2009         switch (newstate) {
2010         case IPATH_IB_LINKDOWN_ONLY:
2011                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_DOWN, 0);
2012                 /* don't wait */
2013                 ret = 0;
2014                 goto bail;
2015
2016         case IPATH_IB_LINKDOWN:
2017                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_DOWN,
2018                                         INFINIPATH_IBCC_LINKINITCMD_POLL);
2019                 /* don't wait */
2020                 ret = 0;
2021                 goto bail;
2022
2023         case IPATH_IB_LINKDOWN_SLEEP:
2024                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_DOWN,
2025                                         INFINIPATH_IBCC_LINKINITCMD_SLEEP);
2026                 /* don't wait */
2027                 ret = 0;
2028                 goto bail;
2029
2030         case IPATH_IB_LINKDOWN_DISABLE:
2031                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_DOWN,
2032                                         INFINIPATH_IBCC_LINKINITCMD_DISABLE);
2033                 /* don't wait */
2034                 ret = 0;
2035                 goto bail;
2036
2037         case IPATH_IB_LINKARM:
2038                 if (dd->ipath_flags & IPATH_LINKARMED) {
2039                         ret = 0;
2040                         goto bail;
2041                 }
2042                 if (!(dd->ipath_flags &
2043                       (IPATH_LINKINIT | IPATH_LINKACTIVE))) {
2044                         ret = -EINVAL;
2045                         goto bail;
2046                 }
2047                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_ARMED, 0);
2048
2049                 /*
2050                  * Since the port can transition to ACTIVE by receiving
2051                  * a non VL 15 packet, wait for either state.
2052                  */
2053                 lstate = IPATH_LINKARMED | IPATH_LINKACTIVE;
2054                 break;
2055
2056         case IPATH_IB_LINKACTIVE:
2057                 if (dd->ipath_flags & IPATH_LINKACTIVE) {
2058                         ret = 0;
2059                         goto bail;
2060                 }
2061                 if (!(dd->ipath_flags & IPATH_LINKARMED)) {
2062                         ret = -EINVAL;
2063                         goto bail;
2064                 }
2065                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_ACTIVE, 0);
2066                 lstate = IPATH_LINKACTIVE;
2067                 break;
2068
2069         case IPATH_IB_LINK_LOOPBACK:
2070                 dev_info(&dd->pcidev->dev, "Enabling IB local loopback\n");
2071                 dd->ipath_ibcctrl |= INFINIPATH_IBCC_LOOPBACK;
2072                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
2073                                  dd->ipath_ibcctrl);
2074
2075                 /* turn heartbeat off, as it causes loopback to fail */
2076                 dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_HRTBT,
2077                                        IPATH_IB_HRTBT_OFF);
2078                 /* don't wait */
2079                 ret = 0;
2080                 goto bail;
2081
2082         case IPATH_IB_LINK_EXTERNAL:
2083                 dev_info(&dd->pcidev->dev,
2084                         "Disabling IB local loopback (normal)\n");
2085                 dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_HRTBT,
2086                                        IPATH_IB_HRTBT_ON);
2087                 dd->ipath_ibcctrl &= ~INFINIPATH_IBCC_LOOPBACK;
2088                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
2089                                  dd->ipath_ibcctrl);
2090                 /* don't wait */
2091                 ret = 0;
2092                 goto bail;
2093
2094         /*
2095          * Heartbeat can be explicitly enabled by the user via
2096          * "hrtbt_enable" "file", and if disabled, trying to enable here
2097          * will have no effect.  Implicit changes (heartbeat off when
2098          * loopback on, and vice versa) are included to ease testing.
2099          */
2100         case IPATH_IB_LINK_HRTBT:
2101                 ret = dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_HRTBT,
2102                         IPATH_IB_HRTBT_ON);
2103                 goto bail;
2104
2105         case IPATH_IB_LINK_NO_HRTBT:
2106                 ret = dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_HRTBT,
2107                         IPATH_IB_HRTBT_OFF);
2108                 goto bail;
2109
2110         default:
2111                 ipath_dbg("Invalid linkstate 0x%x requested\n", newstate);
2112                 ret = -EINVAL;
2113                 goto bail;
2114         }
2115         ret = ipath_wait_linkstate(dd, lstate, 2000);
2116
2117 bail:
2118         return ret;
2119 }
2120
2121 /**
2122  * ipath_set_mtu - set the MTU
2123  * @dd: the infinipath device
2124  * @arg: the new MTU
2125  *
2126  * we can handle "any" incoming size, the issue here is whether we
2127  * need to restrict our outgoing size.   For now, we don't do any
2128  * sanity checking on this, and we don't deal with what happens to
2129  * programs that are already running when the size changes.
2130  * NOTE: changing the MTU will usually cause the IBC to go back to
2131  * link INIT state...
2132  */
2133 int ipath_set_mtu(struct ipath_devdata *dd, u16 arg)
2134 {
2135         u32 piosize;
2136         int changed = 0;
2137         int ret;
2138
2139         /*
2140          * mtu is IB data payload max.  It's the largest power of 2 less
2141          * than piosize (or even larger, since it only really controls the
2142          * largest we can receive; we can send the max of the mtu and
2143          * piosize).  We check that it's one of the valid IB sizes.
2144          */
2145         if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
2146             (arg != 4096 || !ipath_mtu4096)) {
2147                 ipath_dbg("Trying to set invalid mtu %u, failing\n", arg);
2148                 ret = -EINVAL;
2149                 goto bail;
2150         }
2151         if (dd->ipath_ibmtu == arg) {
2152                 ret = 0;        /* same as current */
2153                 goto bail;
2154         }
2155
2156         piosize = dd->ipath_ibmaxlen;
2157         dd->ipath_ibmtu = arg;
2158
2159         if (arg >= (piosize - IPATH_PIO_MAXIBHDR)) {
2160                 /* Only if it's not the initial value (or reset to it) */
2161                 if (piosize != dd->ipath_init_ibmaxlen) {
2162                         if (arg > piosize && arg <= dd->ipath_init_ibmaxlen)
2163                                 piosize = dd->ipath_init_ibmaxlen;
2164                         dd->ipath_ibmaxlen = piosize;
2165                         changed = 1;
2166                 }
2167         } else if ((arg + IPATH_PIO_MAXIBHDR) != dd->ipath_ibmaxlen) {
2168                 piosize = arg + IPATH_PIO_MAXIBHDR;
2169                 ipath_cdbg(VERBOSE, "ibmaxlen was 0x%x, setting to 0x%x "
2170                            "(mtu 0x%x)\n", dd->ipath_ibmaxlen, piosize,
2171                            arg);
2172                 dd->ipath_ibmaxlen = piosize;
2173                 changed = 1;
2174         }
2175
2176         if (changed) {
2177                 u64 ibc = dd->ipath_ibcctrl, ibdw;
2178                 /*
2179                  * update our housekeeping variables, and set IBC max
2180                  * size, same as init code; max IBC is max we allow in
2181                  * buffer, less the qword pbc, plus 1 for ICRC, in dwords
2182                  */
2183                 dd->ipath_ibmaxlen = piosize - 2 * sizeof(u32);
2184                 ibdw = (dd->ipath_ibmaxlen >> 2) + 1;
2185                 ibc &= ~(INFINIPATH_IBCC_MAXPKTLEN_MASK <<
2186                          dd->ibcc_mpl_shift);
2187                 ibc |= ibdw << dd->ibcc_mpl_shift;
2188                 dd->ipath_ibcctrl = ibc;
2189                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
2190                                  dd->ipath_ibcctrl);
2191                 dd->ipath_f_tidtemplate(dd);
2192         }
2193
2194         ret = 0;
2195
2196 bail:
2197         return ret;
2198 }
2199
2200 int ipath_set_lid(struct ipath_devdata *dd, u32 lid, u8 lmc)
2201 {
2202         dd->ipath_lid = lid;
2203         dd->ipath_lmc = lmc;
2204
2205         dd->ipath_f_set_ib_cfg(dd, IPATH_IB_CFG_LIDLMC, lid |
2206                 (~((1U << lmc) - 1)) << 16);
2207
2208         dev_info(&dd->pcidev->dev, "We got a lid: 0x%x\n", lid);
2209
2210         return 0;
2211 }
2212
2213
2214 /**
2215  * ipath_write_kreg_port - write a device's per-port 64-bit kernel register
2216  * @dd: the infinipath device
2217  * @regno: the register number to write
2218  * @port: the port containing the register
2219  * @value: the value to write
2220  *
2221  * Registers that vary with the chip implementation constants (port)
2222  * use this routine.
2223  */
2224 void ipath_write_kreg_port(const struct ipath_devdata *dd, ipath_kreg regno,
2225                           unsigned port, u64 value)
2226 {
2227         u16 where;
2228
2229         if (port < dd->ipath_portcnt &&
2230             (regno == dd->ipath_kregs->kr_rcvhdraddr ||
2231              regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
2232                 where = regno + port;
2233         else
2234                 where = -1;
2235
2236         ipath_write_kreg(dd, where, value);
2237 }
2238
2239 /*
2240  * Following deal with the "obviously simple" task of overriding the state
2241  * of the LEDS, which normally indicate link physical and logical status.
2242  * The complications arise in dealing with different hardware mappings
2243  * and the board-dependent routine being called from interrupts.
2244  * and then there's the requirement to _flash_ them.
2245  */
2246 #define LED_OVER_FREQ_SHIFT 8
2247 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
2248 /* Below is "non-zero" to force override, but both actual LEDs are off */
2249 #define LED_OVER_BOTH_OFF (8)
2250
2251 static void ipath_run_led_override(unsigned long opaque)
2252 {
2253         struct ipath_devdata *dd = (struct ipath_devdata *)opaque;
2254         int timeoff;
2255         int pidx;
2256         u64 lstate, ltstate, val;
2257
2258         if (!(dd->ipath_flags & IPATH_INITTED))
2259                 return;
2260
2261         pidx = dd->ipath_led_override_phase++ & 1;
2262         dd->ipath_led_override = dd->ipath_led_override_vals[pidx];
2263         timeoff = dd->ipath_led_override_timeoff;
2264
2265         /*
2266          * below potentially restores the LED values per current status,
2267          * should also possibly setup the traffic-blink register,
2268          * but leave that to per-chip functions.
2269          */
2270         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
2271         ltstate = ipath_ib_linktrstate(dd, val);
2272         lstate = ipath_ib_linkstate(dd, val);
2273
2274         dd->ipath_f_setextled(dd, lstate, ltstate);
2275         mod_timer(&dd->ipath_led_override_timer, jiffies + timeoff);
2276 }
2277
2278 void ipath_set_led_override(struct ipath_devdata *dd, unsigned int val)
2279 {
2280         int timeoff, freq;
2281
2282         if (!(dd->ipath_flags & IPATH_INITTED))
2283                 return;
2284
2285         /* First check if we are blinking. If not, use 1HZ polling */
2286         timeoff = HZ;
2287         freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
2288
2289         if (freq) {
2290                 /* For blink, set each phase from one nybble of val */
2291                 dd->ipath_led_override_vals[0] = val & 0xF;
2292                 dd->ipath_led_override_vals[1] = (val >> 4) & 0xF;
2293                 timeoff = (HZ << 4)/freq;
2294         } else {
2295                 /* Non-blink set both phases the same. */
2296                 dd->ipath_led_override_vals[0] = val & 0xF;
2297                 dd->ipath_led_override_vals[1] = val & 0xF;
2298         }
2299         dd->ipath_led_override_timeoff = timeoff;
2300
2301         /*
2302          * If the timer has not already been started, do so. Use a "quick"
2303          * timeout so the function will be called soon, to look at our request.
2304          */
2305         if (atomic_inc_return(&dd->ipath_led_override_timer_active) == 1) {
2306                 /* Need to start timer */
2307                 init_timer(&dd->ipath_led_override_timer);
2308                 dd->ipath_led_override_timer.function =
2309                                                  ipath_run_led_override;
2310                 dd->ipath_led_override_timer.data = (unsigned long) dd;
2311                 dd->ipath_led_override_timer.expires = jiffies + 1;
2312                 add_timer(&dd->ipath_led_override_timer);
2313         } else
2314                 atomic_dec(&dd->ipath_led_override_timer_active);
2315 }
2316
2317 /**
2318  * ipath_shutdown_device - shut down a device
2319  * @dd: the infinipath device
2320  *
2321  * This is called to make the device quiet when we are about to
2322  * unload the driver, and also when the device is administratively
2323  * disabled.   It does not free any data structures.
2324  * Everything it does has to be setup again by ipath_init_chip(dd,1)
2325  */
2326 void ipath_shutdown_device(struct ipath_devdata *dd)
2327 {
2328         unsigned long flags;
2329
2330         ipath_dbg("Shutting down the device\n");
2331
2332         ipath_hol_up(dd); /* make sure user processes aren't suspended */
2333
2334         dd->ipath_flags |= IPATH_LINKUNK;
2335         dd->ipath_flags &= ~(IPATH_INITTED | IPATH_LINKDOWN |
2336                              IPATH_LINKINIT | IPATH_LINKARMED |
2337                              IPATH_LINKACTIVE);
2338         *dd->ipath_statusp &= ~(IPATH_STATUS_IB_CONF |
2339                                 IPATH_STATUS_IB_READY);
2340
2341         /* mask interrupts, but not errors */
2342         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
2343
2344         dd->ipath_rcvctrl = 0;
2345         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
2346                          dd->ipath_rcvctrl);
2347
2348         if (dd->ipath_flags & IPATH_HAS_SEND_DMA)
2349                 teardown_sdma(dd);
2350
2351         /*
2352          * gracefully stop all sends allowing any in progress to trickle out
2353          * first.
2354          */
2355         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
2356         dd->ipath_sendctrl = 0;
2357         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, dd->ipath_sendctrl);
2358         /* flush it */
2359         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
2360         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
2361
2362         /*
2363          * enough for anything that's going to trickle out to have actually
2364          * done so.
2365          */
2366         udelay(5);
2367
2368         dd->ipath_f_setextled(dd, 0, 0); /* make sure LEDs are off */
2369
2370         ipath_set_ib_lstate(dd, 0, INFINIPATH_IBCC_LINKINITCMD_DISABLE);
2371         ipath_cancel_sends(dd, 0);
2372
2373         /*
2374          * we are shutting down, so tell components that care.  We don't do
2375          * this on just a link state change, much like ethernet, a cable
2376          * unplug, etc. doesn't change driver state
2377          */
2378         signal_ib_event(dd, IB_EVENT_PORT_ERR);
2379
2380         /* disable IBC */
2381         dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
2382         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
2383                          dd->ipath_control | INFINIPATH_C_FREEZEMODE);
2384
2385         /*
2386          * clear SerdesEnable and turn the leds off; do this here because
2387          * we are unloading, so don't count on interrupts to move along
2388          * Turn the LEDs off explicitly for the same reason.
2389          */
2390         dd->ipath_f_quiet_serdes(dd);
2391
2392         /* stop all the timers that might still be running */
2393         del_timer_sync(&dd->ipath_hol_timer);
2394         if (dd->ipath_stats_timer_active) {
2395                 del_timer_sync(&dd->ipath_stats_timer);
2396                 dd->ipath_stats_timer_active = 0;
2397         }
2398         if (dd->ipath_intrchk_timer.data) {
2399                 del_timer_sync(&dd->ipath_intrchk_timer);
2400                 dd->ipath_intrchk_timer.data = 0;
2401         }
2402         if (atomic_read(&dd->ipath_led_override_timer_active)) {
2403                 del_timer_sync(&dd->ipath_led_override_timer);
2404                 atomic_set(&dd->ipath_led_override_timer_active, 0);
2405         }
2406
2407         /*
2408          * clear all interrupts and errors, so that the next time the driver
2409          * is loaded or device is enabled, we know that whatever is set
2410          * happened while we were unloaded
2411          */
2412         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
2413                          ~0ULL & ~INFINIPATH_HWE_MEMBISTFAILED);
2414         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
2415         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
2416
2417         ipath_cdbg(VERBOSE, "Flush time and errors to EEPROM\n");
2418         ipath_update_eeprom_log(dd);
2419 }
2420
2421 /**
2422  * ipath_free_pddata - free a port's allocated data
2423  * @dd: the infinipath device
2424  * @pd: the portdata structure
2425  *
2426  * free up any allocated data for a port
2427  * This should not touch anything that would affect a simultaneous
2428  * re-allocation of port data, because it is called after ipath_mutex
2429  * is released (and can be called from reinit as well).
2430  * It should never change any chip state, or global driver state.
2431  * (The only exception to global state is freeing the port0 port0_skbs.)
2432  */
2433 void ipath_free_pddata(struct ipath_devdata *dd, struct ipath_portdata *pd)
2434 {
2435         if (!pd)
2436                 return;
2437
2438         if (pd->port_rcvhdrq) {
2439                 ipath_cdbg(VERBOSE, "free closed port %d rcvhdrq @ %p "
2440                            "(size=%lu)\n", pd->port_port, pd->port_rcvhdrq,
2441                            (unsigned long) pd->port_rcvhdrq_size);
2442                 dma_free_coherent(&dd->pcidev->dev, pd->port_rcvhdrq_size,
2443                                   pd->port_rcvhdrq, pd->port_rcvhdrq_phys);
2444                 pd->port_rcvhdrq = NULL;
2445                 if (pd->port_rcvhdrtail_kvaddr) {
2446                         dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
2447                                          pd->port_rcvhdrtail_kvaddr,
2448                                          pd->port_rcvhdrqtailaddr_phys);
2449                         pd->port_rcvhdrtail_kvaddr = NULL;
2450                 }
2451         }
2452         if (pd->port_port && pd->port_rcvegrbuf) {
2453                 unsigned e;
2454
2455                 for (e = 0; e < pd->port_rcvegrbuf_chunks; e++) {
2456                         void *base = pd->port_rcvegrbuf[e];
2457                         size_t size = pd->port_rcvegrbuf_size;
2458
2459                         ipath_cdbg(VERBOSE, "egrbuf free(%p, %lu), "
2460                                    "chunk %u/%u\n", base,
2461                                    (unsigned long) size,
2462                                    e, pd->port_rcvegrbuf_chunks);
2463                         dma_free_coherent(&dd->pcidev->dev, size,
2464                                 base, pd->port_rcvegrbuf_phys[e]);
2465                 }
2466                 kfree(pd->port_rcvegrbuf);
2467                 pd->port_rcvegrbuf = NULL;
2468                 kfree(pd->port_rcvegrbuf_phys);
2469                 pd->port_rcvegrbuf_phys = NULL;
2470                 pd->port_rcvegrbuf_chunks = 0;
2471         } else if (pd->port_port == 0 && dd->ipath_port0_skbinfo) {
2472                 unsigned e;
2473                 struct ipath_skbinfo *skbinfo = dd->ipath_port0_skbinfo;
2474
2475                 dd->ipath_port0_skbinfo = NULL;
2476                 ipath_cdbg(VERBOSE, "free closed port %d "
2477                            "ipath_port0_skbinfo @ %p\n", pd->port_port,
2478                            skbinfo);
2479                 for (e = 0; e < dd->ipath_p0_rcvegrcnt; e++)
2480                         if (skbinfo[e].skb) {
2481                                 pci_unmap_single(dd->pcidev, skbinfo[e].phys,
2482                                                  dd->ipath_ibmaxlen,
2483                                                  PCI_DMA_FROMDEVICE);
2484                                 dev_kfree_skb(skbinfo[e].skb);
2485                         }
2486                 vfree(skbinfo);
2487         }
2488         kfree(pd->port_tid_pg_list);
2489         vfree(pd->subport_uregbase);
2490         vfree(pd->subport_rcvegrbuf);
2491         vfree(pd->subport_rcvhdr_base);
2492         kfree(pd);
2493 }
2494
2495 static int __init infinipath_init(void)
2496 {
2497         int ret;
2498
2499         if (ipath_debug & __IPATH_DBG)
2500                 printk(KERN_INFO DRIVER_LOAD_MSG "%s", ib_ipath_version);
2501
2502         /*
2503          * These must be called before the driver is registered with
2504          * the PCI subsystem.
2505          */
2506         idr_init(&unit_table);
2507         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
2508                 printk(KERN_ERR IPATH_DRV_NAME ": idr_pre_get() failed\n");
2509                 ret = -ENOMEM;
2510                 goto bail;
2511         }
2512
2513         ret = pci_register_driver(&ipath_driver);
2514         if (ret < 0) {
2515                 printk(KERN_ERR IPATH_DRV_NAME
2516                        ": Unable to register driver: error %d\n", -ret);
2517                 goto bail_unit;
2518         }
2519
2520         ret = ipath_init_ipathfs();
2521         if (ret < 0) {
2522                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create "
2523                        "ipathfs: error %d\n", -ret);
2524                 goto bail_pci;
2525         }
2526
2527         goto bail;
2528
2529 bail_pci:
2530         pci_unregister_driver(&ipath_driver);
2531
2532 bail_unit:
2533         idr_destroy(&unit_table);
2534
2535 bail:
2536         return ret;
2537 }
2538
2539 static void __exit infinipath_cleanup(void)
2540 {
2541         ipath_exit_ipathfs();
2542
2543         ipath_cdbg(VERBOSE, "Unregistering pci driver\n");
2544         pci_unregister_driver(&ipath_driver);
2545
2546         idr_destroy(&unit_table);
2547 }
2548
2549 /**
2550  * ipath_reset_device - reset the chip if possible
2551  * @unit: the device to reset
2552  *
2553  * Whether or not reset is successful, we attempt to re-initialize the chip
2554  * (that is, much like a driver unload/reload).  We clear the INITTED flag
2555  * so that the various entry points will fail until we reinitialize.  For
2556  * now, we only allow this if no user ports are open that use chip resources
2557  */
2558 int ipath_reset_device(int unit)
2559 {
2560         int ret, i;
2561         struct ipath_devdata *dd = ipath_lookup(unit);
2562         unsigned long flags;
2563
2564         if (!dd) {
2565                 ret = -ENODEV;
2566                 goto bail;
2567         }
2568
2569         if (atomic_read(&dd->ipath_led_override_timer_active)) {
2570                 /* Need to stop LED timer, _then_ shut off LEDs */
2571                 del_timer_sync(&dd->ipath_led_override_timer);
2572                 atomic_set(&dd->ipath_led_override_timer_active, 0);
2573         }
2574
2575         /* Shut off LEDs after we are sure timer is not running */
2576         dd->ipath_led_override = LED_OVER_BOTH_OFF;
2577         dd->ipath_f_setextled(dd, 0, 0);
2578
2579         dev_info(&dd->pcidev->dev, "Reset on unit %u requested\n", unit);
2580
2581         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT)) {
2582                 dev_info(&dd->pcidev->dev, "Invalid unit number %u or "
2583                          "not initialized or not present\n", unit);
2584                 ret = -ENXIO;
2585                 goto bail;
2586         }
2587
2588         spin_lock_irqsave(&dd->ipath_uctxt_lock, flags);
2589         if (dd->ipath_pd)
2590                 for (i = 1; i < dd->ipath_cfgports; i++) {
2591                         if (!dd->ipath_pd[i] || !dd->ipath_pd[i]->port_cnt)
2592                                 continue;
2593                         spin_unlock_irqrestore(&dd->ipath_uctxt_lock, flags);
2594                         ipath_dbg("unit %u port %d is in use "
2595                                   "(PID %u cmd %s), can't reset\n",
2596                                   unit, i,
2597                                   pid_nr(dd->ipath_pd[i]->port_pid),
2598                                   dd->ipath_pd[i]->port_comm);
2599                         ret = -EBUSY;
2600                         goto bail;
2601                 }
2602         spin_unlock_irqrestore(&dd->ipath_uctxt_lock, flags);
2603
2604         if (dd->ipath_flags & IPATH_HAS_SEND_DMA)
2605                 teardown_sdma(dd);
2606
2607         dd->ipath_flags &= ~IPATH_INITTED;
2608         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
2609         ret = dd->ipath_f_reset(dd);
2610         if (ret == 1) {
2611                 ipath_dbg("Reinitializing unit %u after reset attempt\n",
2612                           unit);
2613                 ret = ipath_init_chip(dd, 1);
2614         } else
2615                 ret = -EAGAIN;
2616         if (ret)
2617                 ipath_dev_err(dd, "Reinitialize unit %u after "
2618                               "reset failed with %d\n", unit, ret);
2619         else
2620                 dev_info(&dd->pcidev->dev, "Reinitialized unit %u after "
2621                          "resetting\n", unit);
2622
2623 bail:
2624         return ret;
2625 }
2626
2627 /*
2628  * send a signal to all the processes that have the driver open
2629  * through the normal interfaces (i.e., everything other than diags
2630  * interface).  Returns number of signalled processes.
2631  */
2632 static int ipath_signal_procs(struct ipath_devdata *dd, int sig)
2633 {
2634         int i, sub, any = 0;
2635         struct pid *pid;
2636         unsigned long flags;
2637
2638         if (!dd->ipath_pd)
2639                 return 0;
2640
2641         spin_lock_irqsave(&dd->ipath_uctxt_lock, flags);
2642         for (i = 1; i < dd->ipath_cfgports; i++) {
2643                 if (!dd->ipath_pd[i] || !dd->ipath_pd[i]->port_cnt)
2644                         continue;
2645                 pid = dd->ipath_pd[i]->port_pid;
2646                 if (!pid)
2647                         continue;
2648
2649                 dev_info(&dd->pcidev->dev, "context %d in use "
2650                           "(PID %u), sending signal %d\n",
2651                           i, pid_nr(pid), sig);
2652                 kill_pid(pid, sig, 1);
2653                 any++;
2654                 for (sub = 0; sub < INFINIPATH_MAX_SUBPORT; sub++) {
2655                         pid = dd->ipath_pd[i]->port_subpid[sub];
2656                         if (!pid)
2657                                 continue;
2658                         dev_info(&dd->pcidev->dev, "sub-context "
2659                                 "%d:%d in use (PID %u), sending "
2660                                 "signal %d\n", i, sub, pid_nr(pid), sig);
2661                         kill_pid(pid, sig, 1);
2662                         any++;
2663                 }
2664         }
2665         spin_unlock_irqrestore(&dd->ipath_uctxt_lock, flags);
2666         return any;
2667 }
2668
2669 static void ipath_hol_signal_down(struct ipath_devdata *dd)
2670 {
2671         if (ipath_signal_procs(dd, SIGSTOP))
2672                 ipath_dbg("Stopped some processes\n");
2673         ipath_cancel_sends(dd, 1);
2674 }
2675
2676
2677 static void ipath_hol_signal_up(struct ipath_devdata *dd)
2678 {
2679         if (ipath_signal_procs(dd, SIGCONT))
2680                 ipath_dbg("Continued some processes\n");
2681 }
2682
2683 /*
2684  * link is down, stop any users processes, and flush pending sends
2685  * to prevent HoL blocking, then start the HoL timer that
2686  * periodically continues, then stop procs, so they can detect
2687  * link down if they want, and do something about it.
2688  * Timer may already be running, so use mod_timer, not add_timer.
2689  */
2690 void ipath_hol_down(struct ipath_devdata *dd)
2691 {
2692         dd->ipath_hol_state = IPATH_HOL_DOWN;
2693         ipath_hol_signal_down(dd);
2694         dd->ipath_hol_next = IPATH_HOL_DOWNCONT;
2695         dd->ipath_hol_timer.expires = jiffies +
2696                 msecs_to_jiffies(ipath_hol_timeout_ms);
2697         mod_timer(&dd->ipath_hol_timer, dd->ipath_hol_timer.expires);
2698 }
2699
2700 /*
2701  * link is up, continue any user processes, and ensure timer
2702  * is a nop, if running.  Let timer keep running, if set; it
2703  * will nop when it sees the link is up
2704  */
2705 void ipath_hol_up(struct ipath_devdata *dd)
2706 {
2707         ipath_hol_signal_up(dd);
2708         dd->ipath_hol_state = IPATH_HOL_UP;
2709 }
2710
2711 /*
2712  * toggle the running/not running state of user proceses
2713  * to prevent HoL blocking on chip resources, but still allow
2714  * user processes to do link down special case handling.
2715  * Should only be called via the timer
2716  */
2717 void ipath_hol_event(unsigned long opaque)
2718 {
2719         struct ipath_devdata *dd = (struct ipath_devdata *)opaque;
2720
2721         if (dd->ipath_hol_next == IPATH_HOL_DOWNSTOP
2722                 && dd->ipath_hol_state != IPATH_HOL_UP) {
2723                 dd->ipath_hol_next = IPATH_HOL_DOWNCONT;
2724                 ipath_dbg("Stopping processes\n");
2725                 ipath_hol_signal_down(dd);
2726         } else { /* may do "extra" if also in ipath_hol_up() */
2727                 dd->ipath_hol_next = IPATH_HOL_DOWNSTOP;
2728                 ipath_dbg("Continuing processes\n");
2729                 ipath_hol_signal_up(dd);
2730         }
2731         if (dd->ipath_hol_state == IPATH_HOL_UP)
2732                 ipath_dbg("link's up, don't resched timer\n");
2733         else {
2734                 dd->ipath_hol_timer.expires = jiffies +
2735                         msecs_to_jiffies(ipath_hol_timeout_ms);
2736                 mod_timer(&dd->ipath_hol_timer,
2737                         dd->ipath_hol_timer.expires);
2738         }
2739 }
2740
2741 int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv)
2742 {
2743         u64 val;
2744
2745         if (new_pol_inv > INFINIPATH_XGXS_RX_POL_MASK)
2746                 return -1;
2747         if (dd->ipath_rx_pol_inv != new_pol_inv) {
2748                 dd->ipath_rx_pol_inv = new_pol_inv;
2749                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig);
2750                 val &= ~(INFINIPATH_XGXS_RX_POL_MASK <<
2751                          INFINIPATH_XGXS_RX_POL_SHIFT);
2752                 val |= ((u64)dd->ipath_rx_pol_inv) <<
2753                         INFINIPATH_XGXS_RX_POL_SHIFT;
2754                 ipath_write_kreg(dd, dd->ipath_kregs->kr_xgxsconfig, val);
2755         }
2756         return 0;
2757 }
2758
2759 /*
2760  * Disable and enable the armlaunch error.  Used for PIO bandwidth testing on
2761  * the 7220, which is count-based, rather than trigger-based.  Safe for the
2762  * driver check, since it's at init.   Not completely safe when used for
2763  * user-mode checking, since some error checking can be lost, but not
2764  * particularly risky, and only has problematic side-effects in the face of
2765  * very buggy user code.  There is no reference counting, but that's also
2766  * fine, given the intended use.
2767  */
2768 void ipath_enable_armlaunch(struct ipath_devdata *dd)
2769 {
2770         dd->ipath_lasterror &= ~INFINIPATH_E_SPIOARMLAUNCH;
2771         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear,
2772                 INFINIPATH_E_SPIOARMLAUNCH);
2773         dd->ipath_errormask |= INFINIPATH_E_SPIOARMLAUNCH;
2774         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
2775                 dd->ipath_errormask);
2776 }
2777
2778 void ipath_disable_armlaunch(struct ipath_devdata *dd)
2779 {
2780         /* so don't re-enable if already set */
2781         dd->ipath_maskederrs &= ~INFINIPATH_E_SPIOARMLAUNCH;
2782         dd->ipath_errormask &= ~INFINIPATH_E_SPIOARMLAUNCH;
2783         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
2784                 dd->ipath_errormask);
2785 }
2786
2787 module_init(infinipath_init);
2788 module_exit(infinipath_cleanup);